ATTEN 3.5G PIN Name 변경 / ATTEN 3.5G PIN 추가 / Protocol 변경

Debug/Src/PE43711.su

@@ -1,4 +1,4 @@
-PE43711.c:69:6:Bit_Compare	0	static
-PE43711.c:77:6:PE43711_ALL_atten_ctrl	56	static
-PE43711.c:55:6:PE43711_PinInit	152	static
-PE43711.c:97:6:PE43711_atten_ctrl	40	static
+PE43711.c:79:6:Bit_Compare	0	static
+PE43711.c:87:6:PE43711_ALL_atten_ctrl	56	static
+PE43711.c:63:6:PE43711_PinInit	176	static
+PE43711.c:108:6:PE43711_atten_ctrl	40	static

Debug/Src/main.su

@@ -1,5 +1,5 @@
 main.c:83:6:HAL_TIM_PeriodElapsedCallback	0	static
 main.c:92:5:_write	8	static
-main.c:170:6:SystemClock_Config	96	static
+main.c:171:6:SystemClock_Config	96	static
 main.c:104:5:main	56	static
-main.c:611:6:Error_Handler	0	static
+main.c:613:6:Error_Handler	0	static

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h

@@ -0,0 +1,320 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_exti.h
+  * @author  MCD Application Team
+  * @brief   Header file of EXTI HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F1xx_HAL_EXTI_H
+#define STM32F1xx_HAL_EXTI_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup EXTI EXTI
+  * @brief EXTI HAL module driver
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup EXTI_Exported_Types EXTI Exported Types
+  * @{
+  */
+
+/**
+  * @brief  HAL EXTI common Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_EXTI_COMMON_CB_ID          = 0x00U
+} EXTI_CallbackIDTypeDef;
+
+/**
+  * @brief  EXTI Handle structure definition
+  */
+typedef struct
+{
+  uint32_t Line;                    /*!<  Exti line number */
+  void (* PendingCallback)(void);   /*!<  Exti pending callback */
+} EXTI_HandleTypeDef;
+
+/**
+  * @brief  EXTI Configuration structure definition
+  */
+typedef struct
+{
+  uint32_t Line;      /*!< The Exti line to be configured. This parameter
+                           can be a value of @ref EXTI_Line */
+  uint32_t Mode;      /*!< The Exit Mode to be configured for a core.
+                           This parameter can be a combination of @ref EXTI_Mode */
+  uint32_t Trigger;   /*!< The Exti Trigger to be configured. This parameter
+                           can be a value of @ref EXTI_Trigger */
+  uint32_t GPIOSel;   /*!< The Exti GPIO multiplexer selection to be configured.
+                           This parameter is only possible for line 0 to 15. It
+                           can be a value of @ref EXTI_GPIOSel */
+} EXTI_ConfigTypeDef;
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
+  * @{
+  */
+
+/** @defgroup EXTI_Line  EXTI Line
+  * @{
+  */
+#define EXTI_LINE_0                        (EXTI_GPIO     | 0x00u)    /*!< External interrupt line 0 */
+#define EXTI_LINE_1                        (EXTI_GPIO     | 0x01u)    /*!< External interrupt line 1 */
+#define EXTI_LINE_2                        (EXTI_GPIO     | 0x02u)    /*!< External interrupt line 2 */
+#define EXTI_LINE_3                        (EXTI_GPIO     | 0x03u)    /*!< External interrupt line 3 */
+#define EXTI_LINE_4                        (EXTI_GPIO     | 0x04u)    /*!< External interrupt line 4 */
+#define EXTI_LINE_5                        (EXTI_GPIO     | 0x05u)    /*!< External interrupt line 5 */
+#define EXTI_LINE_6                        (EXTI_GPIO     | 0x06u)    /*!< External interrupt line 6 */
+#define EXTI_LINE_7                        (EXTI_GPIO     | 0x07u)    /*!< External interrupt line 7 */
+#define EXTI_LINE_8                        (EXTI_GPIO     | 0x08u)    /*!< External interrupt line 8 */
+#define EXTI_LINE_9                        (EXTI_GPIO     | 0x09u)    /*!< External interrupt line 9 */
+#define EXTI_LINE_10                       (EXTI_GPIO     | 0x0Au)    /*!< External interrupt line 10 */
+#define EXTI_LINE_11                       (EXTI_GPIO     | 0x0Bu)    /*!< External interrupt line 11 */
+#define EXTI_LINE_12                       (EXTI_GPIO     | 0x0Cu)    /*!< External interrupt line 12 */
+#define EXTI_LINE_13                       (EXTI_GPIO     | 0x0Du)    /*!< External interrupt line 13 */
+#define EXTI_LINE_14                       (EXTI_GPIO     | 0x0Eu)    /*!< External interrupt line 14 */
+#define EXTI_LINE_15                       (EXTI_GPIO     | 0x0Fu)    /*!< External interrupt line 15 */
+#define EXTI_LINE_16                       (EXTI_CONFIG   | 0x10u)    /*!< External interrupt line 16 Connected to the PVD Output */
+#define EXTI_LINE_17                       (EXTI_CONFIG   | 0x11u)    /*!< External interrupt line 17 Connected to the RTC Alarm event */
+#if defined(EXTI_IMR_IM18)
+#define EXTI_LINE_18                       (EXTI_CONFIG   | 0x12u)    /*!< External interrupt line 18 Connected to the USB Wakeup from suspend event */
+#endif /* EXTI_IMR_IM18 */
+#if defined(EXTI_IMR_IM19)
+#define EXTI_LINE_19                       (EXTI_CONFIG   | 0x13u)    /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
+#endif /* EXTI_IMR_IM19 */
+
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_Mode  EXTI Mode
+  * @{
+  */
+#define EXTI_MODE_NONE                      0x00000000u
+#define EXTI_MODE_INTERRUPT                 0x00000001u
+#define EXTI_MODE_EVENT                     0x00000002u
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_Trigger  EXTI Trigger
+  * @{
+  */
+#define EXTI_TRIGGER_NONE                   0x00000000u
+#define EXTI_TRIGGER_RISING                 0x00000001u
+#define EXTI_TRIGGER_FALLING                0x00000002u
+#define EXTI_TRIGGER_RISING_FALLING         (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_GPIOSel  EXTI GPIOSel
+  * @brief
+  * @{
+  */
+#define EXTI_GPIOA                          0x00000000u
+#define EXTI_GPIOB                          0x00000001u
+#define EXTI_GPIOC                          0x00000002u
+#define EXTI_GPIOD                          0x00000003u
+#if defined (GPIOE)
+#define EXTI_GPIOE                          0x00000004u
+#endif /* GPIOE */
+#if defined (GPIOF)
+#define EXTI_GPIOF                          0x00000005u
+#endif /* GPIOF */
+#if defined (GPIOG)
+#define EXTI_GPIOG                          0x00000006u
+#endif /* GPIOG */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Private constants --------------------------------------------------------*/
+/** @defgroup EXTI_Private_Constants EXTI Private Constants
+  * @{
+  */
+/**
+  * @brief  EXTI Line property definition
+  */
+#define EXTI_PROPERTY_SHIFT                 24u
+#define EXTI_CONFIG                         (0x02uL << EXTI_PROPERTY_SHIFT)
+#define EXTI_GPIO                           ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
+#define EXTI_PROPERTY_MASK                  (EXTI_CONFIG | EXTI_GPIO)
+
+/**
+  * @brief  EXTI bit usage
+  */
+#define EXTI_PIN_MASK                       0x0000001Fu
+
+/**
+  * @brief  EXTI Mask for interrupt & event mode
+  */
+#define EXTI_MODE_MASK                      (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
+
+/**
+  * @brief  EXTI Mask for trigger possibilities
+  */
+#define EXTI_TRIGGER_MASK                   (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
+
+/**
+  * @brief  EXTI Line number
+  */
+#if defined(EXTI_IMR_IM19)
+#define EXTI_LINE_NB                        20UL
+#elif defined(EXTI_IMR_IM18)
+#define EXTI_LINE_NB                        19UL
+#else /* EXTI_IMR_IM17 */
+#define EXTI_LINE_NB                        18UL
+#endif /* EXTI_IMR_IM19 */
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup EXTI_Private_Macros EXTI Private Macros
+  * @{
+  */
+#define IS_EXTI_LINE(__LINE__)          ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
+                                        ((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG)   || \
+                                         (((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO))    && \
+                                         (((__LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
+
+#define IS_EXTI_MODE(__LINE__)          ((((__LINE__) & EXTI_MODE_MASK) != 0x00u) && \
+                                         (((__LINE__) & ~EXTI_MODE_MASK) == 0x00u))
+
+#define IS_EXTI_TRIGGER(__LINE__)       (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
+
+#define IS_EXTI_PENDING_EDGE(__LINE__)  ((__LINE__) == EXTI_TRIGGER_RISING_FALLING)
+
+#define IS_EXTI_CONFIG_LINE(__LINE__)   (((__LINE__) & EXTI_CONFIG) != 0x00u)
+
+#if defined (GPIOG)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE) || \
+                                         ((__PORT__) == EXTI_GPIOF) || \
+                                         ((__PORT__) == EXTI_GPIOG))
+#elif defined (GPIOF)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE) || \
+                                         ((__PORT__) == EXTI_GPIOF))
+#elif defined (GPIOE)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE))
+#else
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD))
+#endif /* GPIOG */
+
+#define IS_EXTI_GPIO_PIN(__PIN__)       ((__PIN__) < 16u)
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
+  * @brief    EXTI Exported Functions
+  * @{
+  */
+
+/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
+  * @brief    Configuration functions
+  * @{
+  */
+/* Configuration functions ****************************************************/
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
+HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
+HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
+  * @brief    IO operation functions
+  * @{
+  */
+/* IO operation functions *****************************************************/
+void              HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
+uint32_t          HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void              HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void              HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32F1xx_HAL_EXTI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c

@@ -0,0 +1,559 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_exti.c
+  * @author  MCD Application Team
+  * @brief   EXTI HAL module driver.
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the Extended Interrupts and events controller (EXTI) peripheral:
+  *           + Initialization and de-initialization functions
+  *           + IO operation functions
+  *
+  @verbatim
+  ==============================================================================
+                    ##### EXTI Peripheral features #####
+  ==============================================================================
+  [..]
+    (+) Each Exti line can be configured within this driver.
+
+    (+) Exti line can be configured in 3 different modes
+        (++) Interrupt
+        (++) Event
+        (++) Both of them
+
+    (+) Configurable Exti lines can be configured with 3 different triggers
+        (++) Rising
+        (++) Falling
+        (++) Both of them
+
+    (+) When set in interrupt mode, configurable Exti lines have two different
+        interrupts pending registers which allow to distinguish which transition
+        occurs:
+        (++) Rising edge pending interrupt
+        (++) Falling
+
+    (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
+        be selected through multiplexer.
+
+                     ##### How to use this driver #####
+  ==============================================================================
+  [..]
+
+    (#) Configure the EXTI line using HAL_EXTI_SetConfigLine().
+        (++) Choose the interrupt line number by setting "Line" member from
+             EXTI_ConfigTypeDef structure.
+        (++) Configure the interrupt and/or event mode using "Mode" member from
+             EXTI_ConfigTypeDef structure.
+        (++) For configurable lines, configure rising and/or falling trigger
+             "Trigger" member from EXTI_ConfigTypeDef structure.
+        (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
+             member from GPIO_InitTypeDef structure.
+
+    (#) Get current Exti configuration of a dedicated line using
+        HAL_EXTI_GetConfigLine().
+        (++) Provide exiting handle as parameter.
+        (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
+
+    (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
+        (++) Provide exiting handle as parameter.
+
+    (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
+        (++) Provide exiting handle as first parameter.
+        (++) Provide which callback will be registered using one value from
+             EXTI_CallbackIDTypeDef.
+        (++) Provide callback function pointer.
+
+    (#) Get interrupt pending bit using HAL_EXTI_GetPending().
+
+    (#) Clear interrupt pending bit using HAL_EXTI_GetPending().
+
+    (#) Generate software interrupt using HAL_EXTI_GenerateSWI().
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup EXTI
+  * @{
+  */
+/** MISRA C:2012 deviation rule has been granted for following rule:
+  * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out
+  * of bounds [0,3] in following API :
+  * HAL_EXTI_SetConfigLine
+  * HAL_EXTI_GetConfigLine
+  * HAL_EXTI_ClearConfigLine
+  */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private defines -----------------------------------------------------------*/
+/** @defgroup EXTI_Private_Constants EXTI Private Constants
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup EXTI_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup EXTI_Exported_Functions_Group1
+  *  @brief    Configuration functions
+  *
+@verbatim
+ ===============================================================================
+              ##### Configuration functions #####
+ ===============================================================================
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Set configuration of a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @param  pExtiConfig Pointer on EXTI configuration to be set.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+{
+  uint32_t regval;
+  uint32_t linepos;
+  uint32_t maskline;
+
+  /* Check null pointer */
+  if ((hexti == NULL) || (pExtiConfig == NULL))
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(pExtiConfig->Line));
+  assert_param(IS_EXTI_MODE(pExtiConfig->Mode));
+
+  /* Assign line number to handle */
+  hexti->Line = pExtiConfig->Line;
+
+  /* Compute line mask */
+  linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* Configure triggers for configurable lines */
+  if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
+  {
+    assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger));
+
+    /* Configure rising trigger */
+    /* Mask or set line */
+    if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u)
+    {
+      EXTI->RTSR |= maskline;
+    }
+    else
+    {
+      EXTI->RTSR &= ~maskline;
+    }
+
+    /* Configure falling trigger */
+    /* Mask or set line */
+    if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u)
+    {
+      EXTI->FTSR |= maskline;
+    }
+    else
+    {
+      EXTI->FTSR &= ~maskline;
+    }
+
+
+    /* Configure gpio port selection in case of gpio exti line */
+    if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
+    {
+      assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel));
+      assert_param(IS_EXTI_GPIO_PIN(linepos));
+      
+      regval = AFIO->EXTICR[linepos >> 2u];
+      regval &= ~(AFIO_EXTICR1_EXTI0 << (AFIO_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
+      regval |= (pExtiConfig->GPIOSel << (AFIO_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
+      AFIO->EXTICR[linepos >> 2u] = regval;
+    }
+  }
+
+  /* Configure interrupt mode : read current mode */
+  /* Mask or set line */
+  if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u)
+  {
+    EXTI->IMR |= maskline;
+  }
+  else
+  {
+    EXTI->IMR &= ~maskline;
+  }
+
+  /* Configure event mode : read current mode */
+  /* Mask or set line */
+  if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
+  {
+    EXTI->EMR |= maskline;
+  }
+  else
+  {
+    EXTI->EMR &= ~maskline;
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Get configuration of a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @param  pExtiConfig Pointer on structure to store Exti configuration.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+{
+  uint32_t regval;
+  uint32_t linepos;
+  uint32_t maskline;
+
+  /* Check null pointer */
+  if ((hexti == NULL) || (pExtiConfig == NULL))
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameter */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+
+  /* Store handle line number to configuration structure */
+  pExtiConfig->Line = hexti->Line;
+
+  /* Compute line mask */
+  linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* 1] Get core mode : interrupt */
+
+  /* Check if selected line is enable */
+  if ((EXTI->IMR & maskline) != 0x00u)
+  {
+    pExtiConfig->Mode = EXTI_MODE_INTERRUPT;
+  }
+  else
+  {
+    pExtiConfig->Mode = EXTI_MODE_NONE;
+  }
+
+  /* Get event mode */
+  /* Check if selected line is enable */
+  if ((EXTI->EMR & maskline) != 0x00u)
+  {
+    pExtiConfig->Mode |= EXTI_MODE_EVENT;
+  }
+
+  /* 2] Get trigger for configurable lines : rising */
+  if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
+  {
+    /* Check if configuration of selected line is enable */
+    if ((EXTI->RTSR & maskline) != 0x00u)
+    {
+      pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
+    }
+    else
+    {
+      pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
+    }
+
+    /* Get falling configuration */
+    /* Check if configuration of selected line is enable */
+    if ((EXTI->FTSR & maskline) != 0x00u)
+    {
+      pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
+    }
+
+    /* Get Gpio port selection for gpio lines */
+    if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
+    {
+      assert_param(IS_EXTI_GPIO_PIN(linepos));
+
+      regval = AFIO->EXTICR[linepos >> 2u];
+      pExtiConfig->GPIOSel = ((regval << (AFIO_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 24);
+    }
+    else
+    {
+      pExtiConfig->GPIOSel = 0x00u;
+    }
+  }
+  else
+  {
+    /* No Trigger selected */
+    pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
+    pExtiConfig->GPIOSel = 0x00u;
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Clear whole configuration of a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
+{
+  uint32_t regval;
+  uint32_t linepos;
+  uint32_t maskline;
+
+  /* Check null pointer */
+  if (hexti == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameter */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+
+  /* compute line mask */
+  linepos = (hexti->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* 1] Clear interrupt mode */
+  EXTI->IMR = (EXTI->IMR & ~maskline);
+
+  /* 2] Clear event mode */
+  EXTI->EMR = (EXTI->EMR & ~maskline);
+
+  /* 3] Clear triggers in case of configurable lines */
+  if ((hexti->Line & EXTI_CONFIG) != 0x00u)
+  {
+    EXTI->RTSR = (EXTI->RTSR & ~maskline);
+    EXTI->FTSR = (EXTI->FTSR & ~maskline);
+
+    /* Get Gpio port selection for gpio lines */
+    if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
+    {
+      assert_param(IS_EXTI_GPIO_PIN(linepos));
+
+      regval = AFIO->EXTICR[linepos >> 2u];
+      regval &= ~(AFIO_EXTICR1_EXTI0 << (AFIO_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
+      AFIO->EXTICR[linepos >> 2u] = regval;
+    }
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Register callback for a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @param  CallbackID User callback identifier.
+  *         This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
+  * @param  pPendingCbfn function pointer to be stored as callback.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
+{
+  HAL_StatusTypeDef status = HAL_OK;
+
+  switch (CallbackID)
+  {
+    case  HAL_EXTI_COMMON_CB_ID:
+      hexti->PendingCallback = pPendingCbfn;
+      break;
+
+    default:
+      status = HAL_ERROR;
+      break;
+  }
+
+  return status;
+}
+
+/**
+  * @brief  Store line number as handle private field.
+  * @param  hexti Exti handle.
+  * @param  ExtiLine Exti line number.
+  *         This parameter can be from 0 to @ref EXTI_LINE_NB.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
+{
+  /* Check the parameters */
+  assert_param(IS_EXTI_LINE(ExtiLine));
+
+  /* Check null pointer */
+  if (hexti == NULL)
+  {
+    return HAL_ERROR;
+  }
+  else
+  {
+    /* Store line number as handle private field */
+    hexti->Line = ExtiLine;
+
+    return HAL_OK;
+  }
+}
+
+/**
+  * @}
+  */
+
+/** @addtogroup EXTI_Exported_Functions_Group2
+  *  @brief EXTI IO functions.
+  *
+@verbatim
+ ===============================================================================
+                       ##### IO operation functions #####
+ ===============================================================================
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Handle EXTI interrupt request.
+  * @param  hexti Exti handle.
+  * @retval none.
+  */
+void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
+{
+  uint32_t regval;
+  uint32_t maskline;
+
+  /* Compute line mask */
+  maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
+
+  /* Get pending bit  */
+  regval = (EXTI->PR & maskline);
+  if (regval != 0x00u)
+  {
+    /* Clear pending bit */
+    EXTI->PR = maskline;
+
+    /* Call callback */
+    if (hexti->PendingCallback != NULL)
+    {
+      hexti->PendingCallback();
+    }
+  }
+}
+
+/**
+  * @brief  Get interrupt pending bit of a dedicated line.
+  * @param  hexti Exti handle.
+  * @param  Edge Specify which pending edge as to be checked.
+  *         This parameter can be one of the following values:
+  *           @arg @ref EXTI_TRIGGER_RISING_FALLING
+  *         This parameter is kept for compatibility with other series.
+  * @retval 1 if interrupt is pending else 0.
+  */
+uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
+{
+  uint32_t regval;
+  uint32_t maskline;
+  uint32_t linepos;
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+  assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
+  assert_param(IS_EXTI_PENDING_EDGE(Edge));
+
+  /* Compute line mask */
+  linepos = (hexti->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* return 1 if bit is set else 0 */
+  regval = ((EXTI->PR & maskline) >> linepos);
+  return regval;
+}
+
+/**
+  * @brief  Clear interrupt pending bit of a dedicated line.
+  * @param  hexti Exti handle.
+  * @param  Edge Specify which pending edge as to be clear.
+  *         This parameter can be one of the following values:
+  *           @arg @ref EXTI_TRIGGER_RISING_FALLING
+  *         This parameter is kept for compatibility with other series.
+  * @retval None.
+  */
+void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
+{
+  uint32_t maskline;
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+  assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
+  assert_param(IS_EXTI_PENDING_EDGE(Edge));
+
+  /* Compute line mask */
+  maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
+
+  /* Clear Pending bit */
+  EXTI->PR =  maskline;
+}
+
+/**
+  * @brief  Generate a software interrupt for a dedicated line.
+  * @param  hexti Exti handle.
+  * @retval None.
+  */
+void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
+{
+  uint32_t maskline;
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+  assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
+
+  /* Compute line mask */
+  maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
+
+  /* Generate Software interrupt */
+  EXTI->SWIER = maskline;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* HAL_EXTI_MODULE_ENABLED */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Inc/PE43711.h

@@ -23,16 +23,18 @@
  }PE43711_st;
  
  typedef struct{
-     PE43711_st ATT0;
-     uint8_t    data0;
-     PE43711_st ATT1;
-     uint8_t    data1;
-     PE43711_st ATT2;
-     uint8_t    data2;
-     PE43711_st ATT3;
-     uint8_t    data3;
-     PE43711_st ATT4;    
-     uint8_t    data4;
+   PE43711_st ATT0;
+   uint8_t    data0;
+   PE43711_st ATT1;
+   uint8_t    data1;
+   PE43711_st ATT2;
+   uint8_t    data2;
+   PE43711_st ATT3;
+   uint8_t    data3;
+   PE43711_st ATT4;    
+   uint8_t    data4;
+   PE43711_st ATT5;    
+   uint8_t    data5;
  }ALL_PE43711_st;
 ALL_PE43711_st ALL_ATT_3_5G;
 

Inc/main.h

@@ -196,16 +196,16 @@ extern void ATTEN_PLL_PATH_Initialize(void);
 #define ATT_CLK_3_5G_GPIO_Port GPIOD
 #define ATT_EN_3_5G_Pin GPIO_PIN_1
 #define ATT_EN_3_5G_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_DL_Pin GPIO_PIN_2
-#define ATT_DATA_3_5G_DL_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_UL_Pin GPIO_PIN_3
-#define ATT_DATA_3_5G_UL_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_LOW1_Pin GPIO_PIN_2
+#define ATT_DATA_3_5G_LOW1_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_HIGH1_Pin GPIO_PIN_3
+#define ATT_DATA_3_5G_HIGH1_GPIO_Port GPIOD
 #define ATT_DATA_3_5G_COM1_Pin GPIO_PIN_4
 #define ATT_DATA_3_5G_COM1_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_COM2_Pin GPIO_PIN_5
+#define ATT_DATA_3_5G_LOW2_Pin GPIO_PIN_5
+#define ATT_DATA_3_5G_LOW2_GPIO_Port GPIOD
+#define ATT_DATA_3_5G_COM2_Pin GPIO_PIN_6
 #define ATT_DATA_3_5G_COM2_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_COM3_Pin GPIO_PIN_6
-#define ATT_DATA_3_5G_COM3_GPIO_Port GPIOD
 #define PATH_EN_3_5G_L_Pin GPIO_PIN_7
 #define PATH_EN_3_5G_L_GPIO_Port GPIOD
 #define PATH_EN_3_5G_H_Pin GPIO_PIN_9
@@ -216,8 +216,8 @@ extern void ATTEN_PLL_PATH_Initialize(void);
 #define PATH_EN_3_5G_UL_GPIO_Port GPIOG
 #define PLL_ON_OFF_3_5G_LG12_Pin GPIO_PIN_12
 #define PLL_ON_OFF_3_5G_LG12_GPIO_Port GPIOG
-#define PLL_ON_OFF_3_5G_HG13_Pin GPIO_PIN_13
-#define PLL_ON_OFF_3_5G_HG13_GPIO_Port GPIOG
+#define ATT_DATA_3_5G_HIGH2_Pin GPIO_PIN_13
+#define ATT_DATA_3_5G_HIGH2_GPIO_Port GPIOG
 #define BOOT_LED_Pin GPIO_PIN_14
 #define BOOT_LED_GPIO_Port GPIOG
 #define PLL_EN_2_1G_DL_Pin GPIO_PIN_3

Inc/stm32f1xx_hal_conf.h

@@ -5,29 +5,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
   */ 
@@ -49,9 +33,10 @@
   */
   
 #define HAL_MODULE_ENABLED  
-#define HAL_ADC_MODULE_ENABLED
+  #define HAL_ADC_MODULE_ENABLED
 /*#define HAL_CRYP_MODULE_ENABLED   */
 /*#define HAL_CAN_MODULE_ENABLED   */
+/*#define HAL_CAN_LEGACY_MODULE_ENABLED   */
 /*#define HAL_CEC_MODULE_ENABLED   */
 /*#define HAL_CORTEX_MODULE_ENABLED   */
 /*#define HAL_CRC_MODULE_ENABLED   */
@@ -87,6 +72,7 @@
 #define HAL_CORTEX_MODULE_ENABLED
 #define HAL_DMA_MODULE_ENABLED
 #define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
 #define HAL_GPIO_MODULE_ENABLED
 #define HAL_PWR_MODULE_ENABLED
 #define HAL_RCC_MODULE_ENABLED
@@ -147,6 +133,30 @@
 #define  USE_RTOS                     0
 #define  PREFETCH_ENABLE              1
 
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
 /* ########################## Assert Selection ############################## */
 /**
   * @brief Uncomment the line below to expanse the "assert_param" macro in the 
@@ -210,155 +220,167 @@
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
 
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     0U
+
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
- #include "stm32f1xx_hal_rcc.h"
+#include "stm32f1xx_hal_rcc.h"
 #endif /* HAL_RCC_MODULE_ENABLED */
 
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32f1xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
 #ifdef HAL_EXTI_MODULE_ENABLED
- #include "stm32f1xx_hal_exti.h"
+#include "stm32f1xx_hal_exti.h"
 #endif /* HAL_EXTI_MODULE_ENABLED */
 
-#ifdef HAL_GPIO_MODULE_ENABLED
- #include "stm32f1xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-   
 #ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f1xx_hal_dma.h"
+#include "stm32f1xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f1xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */  
-   
+#include "stm32f1xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
 #ifdef HAL_CAN_MODULE_ENABLED
- #include "stm32f1xx_hal_can.h"
+#include "stm32f1xx_hal_can.h"
 #endif /* HAL_CAN_MODULE_ENABLED */
 
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "Legacy/stm32f1xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
 #ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f1xx_hal_cec.h"
+#include "stm32f1xx_hal_cec.h"
 #endif /* HAL_CEC_MODULE_ENABLED */
 
 #ifdef HAL_CORTEX_MODULE_ENABLED
- #include "stm32f1xx_hal_cortex.h"
+#include "stm32f1xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
 
 #ifdef HAL_ADC_MODULE_ENABLED
- #include "stm32f1xx_hal_adc.h"
+#include "stm32f1xx_hal_adc.h"
 #endif /* HAL_ADC_MODULE_ENABLED */
 
 #ifdef HAL_CRC_MODULE_ENABLED
- #include "stm32f1xx_hal_crc.h"
+#include "stm32f1xx_hal_crc.h"
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_DAC_MODULE_ENABLED
- #include "stm32f1xx_hal_dac.h"
+#include "stm32f1xx_hal_dac.h"
 #endif /* HAL_DAC_MODULE_ENABLED */
 
 #ifdef HAL_FLASH_MODULE_ENABLED
- #include "stm32f1xx_hal_flash.h"
+#include "stm32f1xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
 
 #ifdef HAL_SRAM_MODULE_ENABLED
- #include "stm32f1xx_hal_sram.h"
+#include "stm32f1xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
 
 #ifdef HAL_NOR_MODULE_ENABLED
- #include "stm32f1xx_hal_nor.h"
+#include "stm32f1xx_hal_nor.h"
 #endif /* HAL_NOR_MODULE_ENABLED */
 
 #ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f1xx_hal_i2c.h"
+#include "stm32f1xx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
 
 #ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f1xx_hal_i2s.h"
+#include "stm32f1xx_hal_i2s.h"
 #endif /* HAL_I2S_MODULE_ENABLED */
 
 #ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f1xx_hal_iwdg.h"
+#include "stm32f1xx_hal_iwdg.h"
 #endif /* HAL_IWDG_MODULE_ENABLED */
 
 #ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f1xx_hal_pwr.h"
+#include "stm32f1xx_hal_pwr.h"
 #endif /* HAL_PWR_MODULE_ENABLED */
 
 #ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f1xx_hal_rtc.h"
+#include "stm32f1xx_hal_rtc.h"
 #endif /* HAL_RTC_MODULE_ENABLED */
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
- #include "stm32f1xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+#include "stm32f1xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
 
 #ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f1xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */  
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f1xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
+#include "stm32f1xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
 
 #ifdef HAL_NAND_MODULE_ENABLED
- #include "stm32f1xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */     
+#include "stm32f1xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
 
 #ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f1xx_hal_spi.h"
+#include "stm32f1xx_hal_spi.h"
 #endif /* HAL_SPI_MODULE_ENABLED */
 
 #ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f1xx_hal_tim.h"
+#include "stm32f1xx_hal_tim.h"
 #endif /* HAL_TIM_MODULE_ENABLED */
 
 #ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f1xx_hal_uart.h"
+#include "stm32f1xx_hal_uart.h"
 #endif /* HAL_UART_MODULE_ENABLED */
 
 #ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f1xx_hal_usart.h"
+#include "stm32f1xx_hal_usart.h"
 #endif /* HAL_USART_MODULE_ENABLED */
 
 #ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f1xx_hal_irda.h"
+#include "stm32f1xx_hal_irda.h"
 #endif /* HAL_IRDA_MODULE_ENABLED */
 
 #ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f1xx_hal_smartcard.h"
+#include "stm32f1xx_hal_smartcard.h"
 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
 
 #ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f1xx_hal_wwdg.h"
+#include "stm32f1xx_hal_wwdg.h"
 #endif /* HAL_WWDG_MODULE_ENABLED */
 
 #ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f1xx_hal_pcd.h"
+#include "stm32f1xx_hal_pcd.h"
 #endif /* HAL_PCD_MODULE_ENABLED */
 
 #ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f1xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */   
-   
+#include "stm32f1xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32f1xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
 
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
 /**
   * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
+  * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
+void assert_failed(uint8_t* file, uint32_t line);
 #else
-  #define assert_param(expr) ((void)0U)
+#define assert_param(expr) ((void)0U)
 #endif /* USE_FULL_ASSERT */
 
 #ifdef __cplusplus

Inc/zig_operate.h

@@ -44,10 +44,11 @@ typedef enum{
     INDEX_ATT_2_1G_UL3 , 
     INDEX_ATT_2_1G_UL4 ,
     INDEX_ATT_3_5G_LOW1  ,
-    INDEX_ATT_3_5G_UL  ,
+    INDEX_ATT_3_5G_HIGH1  ,
     INDEX_ATT_3_5G_COM1,
-    INDEX_ATT_3_5G_COM2, 
-    INDEX_ATT_3_5G_COM3 = 20,
+    INDEX_ATT_3_5G_LOW2  ,
+    INDEX_ATT_3_5G_HIGH2= 20  ,    
+    INDEX_ATT_3_5G_COM2,
     INDEX_PLL_1_8G_DL_H,
     INDEX_PLL_1_8G_DL_L,
     INDEX_PLL_1_8G_UL_H,
@@ -57,7 +58,7 @@ typedef enum{
     INDEX_PLL_2_1G_UL_H,
     INDEX_PLL_2_1G_UL_L,
     INDEX_PLL_3_5G_DL_H ,
-    INDEX_PLL_3_5G_DL_L = 30,
+    INDEX_PLL_3_5G_DL_L , //30
     INDEX_PLL_3_5G_UL_H ,
     INDEX_PLL_3_5G_UL_L ,
     INDEX_PLL_LD_6_BIT  ,
@@ -66,8 +67,8 @@ typedef enum{
     INDEX_DET_1_8G_DL_OUT_H ,
     INDEX_DET_1_8G_DL_OUT_L ,
     INDEX_DET_1_8G_UL_IN_H  ,
-    INDEX_DET_1_8G_UL_IN_L  ,
-    INDEX_DET_1_8G_UL_OUT_H = 40,
+    INDEX_DET_1_8G_UL_IN_L  ,//40
+    INDEX_DET_1_8G_UL_OUT_H ,
     INDEX_DET_1_8G_UL_OUT_L ,
     INDEX_DET_2_1G_DL_IN_H  ,
     INDEX_DET_2_1G_DL_IN_L  ,
@@ -76,8 +77,8 @@ typedef enum{
     INDEX_DET_2_1G_UL_IN_H  ,
     INDEX_DET_2_1G_UL_IN_L  ,
     INDEX_DET_2_1G_UL_OUT_H ,
-    INDEX_DET_2_1G_UL_OUT_L ,
-    INDEX_DET_3_5G_DL_IN_H  = 50,
+    INDEX_DET_2_1G_UL_OUT_L ,//50
+    INDEX_DET_3_5G_DL_IN_H  ,
     INDEX_DET_3_5G_DL_IN_L  ,
     INDEX_DET_3_5G_DL_OUT_H ,
     INDEX_DET_3_5G_DL_OUT_L ,
@@ -86,8 +87,8 @@ typedef enum{
     INDEX_DET_3_5G_UL_OUT_H ,
     INDEX_DET_3_5G_UL_OUT_L ,
     INDEX_RFU_TEMP_H    ,
-    INDEX_RFU_TEMP_L    ,
-    INDEX__28V_DET_H    = 60,
+    INDEX_RFU_TEMP_L    ,//60
+    INDEX__28V_DET_H    ,
     INDEX__28V_DET_L    ,
     INDEX_ALARM_AC      ,
     INDEX_ALARM_DC      ,
@@ -96,8 +97,8 @@ typedef enum{
     INDEX_PATH_EN_2_1G_DL   ,
     INDEX_PATH_EN_2_1G_UL   ,
     INDEX_PATH_EN_3_5G_DL,
-    INDEX_PATH_EN_3_5G_UL   ,
-    INDEX_PATH_EN_3_5G_H = 70,
+    INDEX_PATH_EN_3_5G_UL   ,//70
+    INDEX_PATH_EN_3_5G_H ,
     INDEX_PATH_EN_3_5G_L,
     INDEX_PLL_ON_OFF_3_5G_H ,
     INDEX_PLL_ON_OFF_3_5G_L ,
@@ -107,7 +108,7 @@ typedef enum{
     INDEX__T_SYNC_UL,    
     INDEX_DAC_VCtrl_A_H,
     INDEX_DAC_VCtrl_A_L,
-    INDEX_DAC_VCtrl_B_H = 80, 
+    INDEX_DAC_VCtrl_B_H, //80
     INDEX_DAC_VCtrl_B_L,
     INDEX_DAC_VCtrl_C_H,
     INDEX_DAC_VCtrl_C_L,
@@ -116,13 +117,13 @@ typedef enum{
     INDEX_DAC_VCtrl_E_H,
     INDEX_DAC_VCtrl_E_L,
     INDEX_DAC_VCtrl_F_H,
-    INDEX_DAC_VCtrl_F_L,
-    INDEX_DAC_VCtrl_G_H = 90,
+    INDEX_DAC_VCtrl_F_L,//90
+    INDEX_DAC_VCtrl_G_H ,
     INDEX_DAC_VCtrl_G_L,
     INDEX_DAC_VCtrl_H_H,
     INDEX_DAC_VCtrl_H_L,   
     INDEX_BLUE_CRC, 
-    INDEX_BLUE_EOF,//95
+    INDEX_BLUE_EOF,//96
 }Bluecell_Prot_Index;
 uint8_t Prev_data[INDEX_BLUE_EOF + 1];
 uint8_t Flash_Save_data[INDEX_BLUE_EOF + 1];

STM32F103_ATTEN_PLL_Zig.ioc

@@ -175,8 +175,8 @@ Mcu.PinsNb=80
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F103ZETx
-MxCube.Version=5.2.1
-MxDb.Version=DB.5.0.21
+MxCube.Version=5.3.0
+MxDb.Version=DB.5.0.30
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:true\:true\:3\:false\:true
 NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:true\:true\:4\:false\:true
@@ -337,11 +337,11 @@ PD15.GPIO_Label=DA_LDAC
 PD15.Locked=true
 PD15.Signal=GPIO_Output
 PD2.GPIOParameters=GPIO_Label
-PD2.GPIO_Label=ATT_DATA_3.5G_DL
+PD2.GPIO_Label=ATT_DATA_3.5G_LOW1
 PD2.Locked=true
 PD2.Signal=GPIO_Output
 PD3.GPIOParameters=GPIO_Label
-PD3.GPIO_Label=ATT_DATA_3.5G_UL
+PD3.GPIO_Label=ATT_DATA_3.5G_HIGH1
 PD3.Locked=true
 PD3.Signal=GPIO_Output
 PD4.GPIOParameters=GPIO_Label
@@ -349,11 +349,11 @@ PD4.GPIO_Label=ATT_DATA_3.5G_COM1
 PD4.Locked=true
 PD4.Signal=GPIO_Output
 PD5.GPIOParameters=GPIO_Label
-PD5.GPIO_Label=ATT_DATA_3.5G_COM2
+PD5.GPIO_Label=ATT_DATA_3.5G_LOW2
 PD5.Locked=true
 PD5.Signal=GPIO_Output
 PD6.GPIOParameters=GPIO_Label
-PD6.GPIO_Label=ATT_DATA_3.5G_COM3
+PD6.GPIO_Label=ATT_DATA_3.5G_COM2
 PD6.Locked=true
 PD6.Signal=GPIO_Output
 PD7.GPIOParameters=GPIO_Label
@@ -447,7 +447,7 @@ PG12.GPIO_Label=PLL_ON_OFF_3.5G_L
 PG12.Locked=true
 PG12.Signal=GPIO_Output
 PG13.GPIOParameters=GPIO_Label
-PG13.GPIO_Label=PLL_ON_OFF_3.5G_H
+PG13.GPIO_Label=ATT_DATA_3.5G_HIGH2
 PG13.Locked=true
 PG13.Signal=GPIO_Output
 PG14.GPIOParameters=GPIO_Label

Src/PE43711.c

@@ -15,16 +15,16 @@ ALL_PE43711_st ALL_ATT_3_5G;
 PE43711_st ATT_3_5G_LOW1 ={
     ATT_CLK_3_5G_GPIO_Port,
     ATT_CLK_3_5G_Pin,
-    ATT_DATA_3_5G_DL_GPIO_Port,
-    ATT_DATA_3_5G_DL_Pin,
+    ATT_DATA_3_5G_LOW1_GPIO_Port,
+    ATT_DATA_3_5G_LOW1_Pin,
     ATT_EN_3_5G_GPIO_Port,
     ATT_EN_3_5G_Pin,
 }; 
 PE43711_st ATT_3_5G_HIGH1 ={
     ATT_CLK_3_5G_GPIO_Port,
     ATT_CLK_3_5G_Pin,
-    ATT_DATA_3_5G_UL_GPIO_Port,
-    ATT_DATA_3_5G_UL_Pin,
+    ATT_DATA_3_5G_HIGH1_GPIO_Port,
+    ATT_DATA_3_5G_HIGH1_Pin,
     ATT_EN_3_5G_GPIO_Port,
     ATT_EN_3_5G_Pin,
 }; 
@@ -36,6 +36,22 @@ PE43711_st ATT_3_5G_COM1={
     ATT_EN_3_5G_GPIO_Port,
     ATT_EN_3_5G_Pin,
 }; 
+PE43711_st ATT_3_5G_LOW2 ={
+  ATT_CLK_3_5G_GPIO_Port,
+  ATT_CLK_3_5G_Pin,
+  ATT_DATA_3_5G_LOW2_GPIO_Port,
+  ATT_DATA_3_5G_LOW2_Pin,
+  ATT_EN_3_5G_GPIO_Port,
+  ATT_EN_3_5G_Pin,
+}; 
+PE43711_st ATT_3_5G_HIGH2 ={
+  ATT_CLK_3_5G_GPIO_Port,
+  ATT_CLK_3_5G_Pin,
+  ATT_DATA_3_5G_HIGH2_GPIO_Port,
+  ATT_DATA_3_5G_HIGH2_Pin,
+  ATT_EN_3_5G_GPIO_Port,
+  ATT_EN_3_5G_Pin,
+}; 
 PE43711_st ATT_3_5G_COM2={
     ATT_CLK_3_5G_GPIO_Port,
     ATT_CLK_3_5G_Pin,
@@ -44,26 +60,20 @@ PE43711_st ATT_3_5G_COM2={
     ATT_EN_3_5G_GPIO_Port,
     ATT_EN_3_5G_Pin,
 }; 
-PE43711_st ATT_3_5G_COM3={
-    ATT_CLK_3_5G_GPIO_Port,
-    ATT_CLK_3_5G_Pin,
-    ATT_DATA_3_5G_COM3_GPIO_Port,
-    ATT_DATA_3_5G_COM3_Pin,
-    ATT_EN_3_5G_GPIO_Port,
-    ATT_EN_3_5G_Pin,
-}; 
 void PE43711_PinInit(void){
-    ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1;
-    ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
-    ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
-    ALL_ATT_3_5G.ATT3 = ATT_3_5G_COM2;
-    ALL_ATT_3_5G.ATT4 = ATT_3_5G_COM3;
-    ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
-    ALL_ATT_3_5G.data1 = ATTEN_3_5G_Initial_Val;
-    ALL_ATT_3_5G.data2 = ATTEN_3_5G_Initial_Val;
-    ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val;
-    ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
-    PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+  ALL_ATT_3_5G.ATT0 = ATT_3_5G_LOW1;
+  ALL_ATT_3_5G.ATT1 = ATT_3_5G_HIGH1;
+  ALL_ATT_3_5G.ATT2 = ATT_3_5G_COM1;
+  ALL_ATT_3_5G.ATT3 = ATT_3_5G_LOW2;
+  ALL_ATT_3_5G.ATT4 = ATT_3_5G_HIGH2;    
+  ALL_ATT_3_5G.ATT5 = ATT_3_5G_COM2;
+  ALL_ATT_3_5G.data0 = ATTEN_3_5G_Initial_Val;    
+  ALL_ATT_3_5G.data1 = ATTEN_3_5G_Initial_Val;
+  ALL_ATT_3_5G.data2 = ATTEN_3_5G_Initial_Val;
+  ALL_ATT_3_5G.data3 = ATTEN_3_5G_Initial_Val;
+  ALL_ATT_3_5G.data4 = ATTEN_3_5G_Initial_Val;    
+  ALL_ATT_3_5G.data5 = ATTEN_3_5G_Initial_Val;        
+  PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
 }
 #endif // PYJ.2019.07.26_END -- 
 void Bit_Compare(PE43711_st ATT,uint8_t data,uint8_t Shift_Index){
@@ -79,14 +89,15 @@ void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){
     Pol_Delay_us(10);
 //    printf("why not? \r\n");
     for(uint8_t i = 0; i < 8; i++){
-        Bit_Compare(ATT.ATT0,ATT.data0,i);
-        Bit_Compare(ATT.ATT1,ATT.data1,i);
-        Bit_Compare(ATT.ATT2,ATT.data2,i);
-        Bit_Compare(ATT.ATT3,ATT.data3,i);
-        Bit_Compare(ATT.ATT4,ATT.data4,i);
-		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK
-		Pol_Delay_us(10);
-		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK
+      Bit_Compare(ATT.ATT0,ATT.data0,i);
+      Bit_Compare(ATT.ATT1,ATT.data1,i);
+      Bit_Compare(ATT.ATT2,ATT.data2,i);
+      Bit_Compare(ATT.ATT3,ATT.data3,i);
+      Bit_Compare(ATT.ATT4,ATT.data4,i);
+      Bit_Compare(ATT.ATT5,ATT.data5,i);
+  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK
+  		Pol_Delay_us(10);
+  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK
     }
     HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
     HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_SET);//LE

Src/includes.c

@@ -24,10 +24,11 @@ char *Bluecell_Prot_IndexStr[] = {
     MACROSTR(INDEX_ATT_2_1G_UL3     ),
     MACROSTR(INDEX_ATT_2_1G_UL4     ),
     MACROSTR(INDEX_ATT_3_5G_LOW1      ),
-    MACROSTR(INDEX_ATT_3_5G_UL      ),
+    MACROSTR(INDEX_ATT_3_5G_HIGH1      ),
     MACROSTR(INDEX_ATT_3_5G_COM1    ),
+    MACROSTR(INDEX_ATT_3_5G_LOW2     ),
+    MACROSTR(INDEX_ATT_3_5G_HIGH2      ),
     MACROSTR(INDEX_ATT_3_5G_COM2    ),
-    MACROSTR(INDEX_ATT_3_5G_COM3    ),
     MACROSTR(INDEX_PLL_1_8G_DL_H    ),
     MACROSTR(INDEX_PLL_1_8G_DL_L    ),
     MACROSTR(INDEX_PLL_1_8G_UL_H    ),

Src/main.c

@@ -143,6 +143,7 @@ int main(void)
   Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
   ADF4153_Initialize();
   ADF4113_Initialize();
+  PE43711_PinInit();
   ATTEN_PLL_PATH_Initialize();
   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
   /* USER CODE END 2 */
@@ -454,6 +455,7 @@ static void MX_USART1_UART_Init(void)
   */
 static void MX_DMA_Init(void) 
 {
+
   /* DMA controller clock enable */
   __HAL_RCC_DMA1_CLK_ENABLE();
 
@@ -491,14 +493,14 @@ static void MX_GPIO_Init(void)
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
-                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
-                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_LOW1_Pin 
+                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
                           |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
                           |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
-                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
                           |BOOT_LED_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
@@ -541,12 +543,12 @@ static void MX_GPIO_Init(void)
   HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 
   /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
-                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
-                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin 
+                           ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin 
                            PATH_EN_3_5G_L_Pin */
   GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
-                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
-                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_LOW1_Pin 
+                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
                           |PATH_EN_3_5G_L_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
@@ -561,11 +563,11 @@ static void MX_GPIO_Init(void)
 
   /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
                            T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
-                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin 
+                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin 
                            BOOT_LED_Pin */
   GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
                           |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
-                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
                           |BOOT_LED_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;

Src/pll_4113.c

@@ -74,20 +74,20 @@ typedef struct{
 }Adf4113_st;
 void ADF4113_Initialize(void){
   if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
-    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((18425 & 0xFF00) >> 8);//0x47;
-    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (18425 & 0x00FF);
+    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47;
+    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF);
   }
   if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
-    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((17475 & 0xFF00) >> 8);
-    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (17475 & 0x00FF);
+    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF);
   }
   if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
-    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((21400 & 0xFF00) >> 8);
-    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (21400 & 0x00FF);
+    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF);
   }
   if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
-    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((19500 & 0xFF00) >> 8);
-    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (19500 & 0x00FF);    
+    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF);    
   }
 //    ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
 //    HAL_Delay(1);

Src/zig_operate.c

@@ -305,16 +305,18 @@ void RF_Operate(uint8_t* data_buf){
         Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
     }
     if(   (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1])
-        ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL])
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1])
         ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
+        ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2])
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2])
         ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
-        ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3])
     ){
-        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1]   = data_buf[INDEX_ATT_3_5G_LOW1];
-        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL]   = data_buf[INDEX_ATT_3_5G_UL];
-        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1];
-        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2];
-        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3];
+        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1]  = data_buf[INDEX_ATT_3_5G_LOW1];
+        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
+        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
+        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
+        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
+        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
         PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
     }
     if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/PE43711(6269).h

@@ -0,0 +1,40 @@
+/*
+ * PE43711.h
+ *
+ *  Created on: 2019. 6. 28.
+ *      Author: parkyj
+ */
+
+#ifndef PE43711_H_
+#define PE43711_H_
+#include "main.h"
+ void PE43711_PinInit(void);
+
+
+ typedef struct{
+    GPIO_TypeDef * CLK_PORT;
+    uint16_t CLK_PIN;
+
+    GPIO_TypeDef *DATA_PORT;
+    uint16_t DATA_PIN;
+
+    GPIO_TypeDef *LE_PORT;
+    uint16_t LE_PIN;
+ }PE43711_st;
+ 
+ typedef struct{
+     PE43711_st ATT0;
+     uint8_t    data0;
+     PE43711_st ATT1;
+     uint8_t    data1;
+     PE43711_st ATT2;
+     uint8_t    data2;
+     PE43711_st ATT3;
+     uint8_t    data3;
+     PE43711_st ATT4;    
+     uint8_t    data4;
+ }ALL_PE43711_st;
+ALL_PE43711_st ALL_ATT_3_5G;
+
+
+#endif /* PE43711_H_ */

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(5963).c

@@ -0,0 +1,637 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim6;
+
+UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_usart1_rx;
+DMA_HandleTypeDef hdma_usart1_tx;
+
+/* USER CODE BEGIN PV */
+volatile uint32_t AdcTimerCnt = 0;
+volatile uint32_t LedTimerCnt = 0;
+volatile uint32_t UartRxTimerCnt = 0;
+volatile uint32_t LDTimerCnt = 0;
+
+extern PLL_Setting_st Pll_3_5_H;
+extern PLL_Setting_st Pll_3_5_L;
+
+//volatile uint32_t UartTxTimerCnt = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_TIM6_Init(void);
+static void MX_NVIC_Init(void);
+/* USER CODE BEGIN PFP */
+void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+    if(htim->Instance == TIM6){
+        UartRxTimerCnt++;
+        LedTimerCnt++;
+        AdcTimerCnt++;
+        LDTimerCnt++;
+    }
+} 
+int _write (int file, uint8_t *ptr, uint16_t len)
+{
+    HAL_UART_Transmit(&huart1, ptr, len,10);
+    return len;
+}
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+ 
+
+  /* USER CODE END 1 */
+  
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_ADC1_Init();
+  MX_USART1_UART_Init();
+  MX_TIM6_Init();
+
+  /* Initialize interrupts */
+  MX_NVIC_Init();
+  /* USER CODE BEGIN 2 */
+  InitUartQueue(&TerminalQueue);
+  PE43711_PinInit();
+  Power_ON_OFF_Initialize();  
+  Path_Init();
+  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
+  Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
+  ADF4153_Initialize();
+  ADF4113_Initialize();
+  ATTEN_PLL_PATH_Initialize();
+  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+//    ADF4113_Check();
+//    ADF4153_Check();
+    Boot_LED_Toggle();
+    Uart_Check();
+    ADC_Check();
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief NVIC Configuration.
+  * @retval None
+  */
+static void MX_NVIC_Init(void)
+{
+  /* USART1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* TIM6_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+  /* DMA1_Channel4_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
+  /* DMA1_Channel5_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+  /** Common config 
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+  hadc1.Init.ContinuousConvMode = ENABLE;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.NbrOfConversion = 14;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_0;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_1;
+  sConfig.Rank = ADC_REGULAR_RANK_2;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_2;
+  sConfig.Rank = ADC_REGULAR_RANK_3;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_3;
+  sConfig.Rank = ADC_REGULAR_RANK_4;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_4;
+  sConfig.Rank = ADC_REGULAR_RANK_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_5;
+  sConfig.Rank = ADC_REGULAR_RANK_6;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+  sConfig.Rank = ADC_REGULAR_RANK_7;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_7;
+  sConfig.Rank = ADC_REGULAR_RANK_8;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_8;
+  sConfig.Rank = ADC_REGULAR_RANK_9;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_9;
+  sConfig.Rank = ADC_REGULAR_RANK_10;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_10;
+  sConfig.Rank = ADC_REGULAR_RANK_11;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_11;
+  sConfig.Rank = ADC_REGULAR_RANK_12;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_12;
+  sConfig.Rank = ADC_REGULAR_RANK_13;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_13;
+  sConfig.Rank = ADC_REGULAR_RANK_14;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM6 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM6_Init(void)
+{
+
+  /* USER CODE BEGIN TIM6_Init 0 */
+
+  /* USER CODE END TIM6_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM6_Init 1 */
+
+  /* USER CODE END TIM6_Init 1 */
+  htim6.Instance = TIM6;
+  htim6.Init.Prescaler = 5600-1;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim6.Init.Period = 10;
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM6_Init 2 */
+
+  /* USER CODE END TIM6_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/** 
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void) 
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_LOW1_Pin 
+                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
+                          |BOOT_LED_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
+                           PLL_EN_3_5G_H_Pin PLL_ON_OFF_3_5G_L_Pin PLL_DATA_3_5G_Pin PLL_ON_OFF_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_LOW1_Pin 
+                           ATT_DATA_3_5G_HIGH1_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_LOW2_Pin ATT_DATA_3_5G_COM2_Pin 
+                           PATH_EN_3_5G_L_Pin */
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_LOW1_Pin 
+                          |ATT_DATA_3_5G_HIGH1_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_LOW2_Pin|ATT_DATA_3_5G_COM2_Pin 
+                          |PATH_EN_3_5G_L_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
+                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin ATT_DATA_3_5G_HIGH2_Pin 
+                           BOOT_LED_Pin */
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|ATT_DATA_3_5G_HIGH2_Pin 
+                          |BOOT_LED_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
+  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{ 
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/pll_4113(6978).c

@@ -0,0 +1,329 @@
+/**************************************************************************************************
+  Filename:       hal_adf4113.c
+  Revised:        $Date: 2013-11-17 $
+  Revision:       $Revision:  $
+  Description:   This file contains the interface to the ADF4113 frequency synthesizer.
+**************************************************************************************************/
+#include "pll_4113.h"
+void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2);
+
+uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN);
+
+#define ADF4113_PRESCALE8         0
+#define ADF4113_PRESCALE16        1
+#define ADF4113_PRESCALE32        2
+#define ADF4113_PRESCALE64        3
+// ADF4113 Prescale value for minimum required division ratio
+#define ADF4113_PRE8_MIN_N        56
+#define ADF4113_PRE16_MIN_N       240
+#define ADF4113_PRE32_MIN_N       992
+#define ADF4113_PRE64_MIN_N       4032
+// Frequency Settings
+// Initally, the synthesizer will operate at 2450 MHz
+#define ADF4113_CH_STEP          50000
+#define HAL_SYN_INVALID_PRESCALE  0x04
+#define ADF4113_REF_FREQ_MHZ    13000000
+
+uint8_t PLL_1_8_DL_Error_Cnt = 0;
+uint8_t PLL_1_8_UL_Error_Cnt = 0;
+uint8_t PLL_2_1_DL_Error_Cnt = 0;
+uint8_t PLL_2_1_UL_Error_Cnt = 0;
+
+
+PLL_Setting_st ADF4113_1_8G_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_DL_GPIO_Port,    
+    PLL_EN_1_8G_DL_Pin,
+};
+PLL_Setting_st ADF4113_1_8G_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_UL_GPIO_Port,    
+    PLL_EN_1_8G_UL_Pin,
+};
+PLL_Setting_st ADF4113_2_1G_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st ADF4113_2_1G_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+
+
+
+// Error Code
+typedef struct{
+    uint16_t B;
+    uint16_t P;
+    uint16_t A;   
+    uint16_t N;       
+}Adf4113_st;
+void ADF4113_Initialize(void){
+  if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
+    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((18425 & 0xFF00) >> 8);//0x47;
+    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (18425 & 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
+    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((17475 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (17475 & 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
+    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((21400 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (21400 & 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
+    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((19500 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (19500 & 0x00FF);    
+  }
+//    ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+}
+
+
+void ADF4113_Check(void){
+  uint16_t temp_val = 0;
+    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_DL_GPIO_Port, PLL_LD_1_8G_DL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_1_8G_DL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_DL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+            ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
+      if(PLL_1_8_DL_Error_Cnt == 3){
+        Error_Message_Occur(DL_1_8);
+      }
+      if(PLL_1_8_DL_Error_Cnt < 4)
+        PLL_1_8_DL_Error_Cnt++;    
+      HAL_Delay(1);
+    }else{
+      PLL_1_8_DL_Error_Cnt = 0;
+    }
+
+    
+    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_UL_GPIO_Port, PLL_LD_1_8G_UL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_1_8G_UL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_UL_L]);
+      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+    //      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+      if(PLL_1_8_UL_Error_Cnt == 3){
+        Error_Message_Occur(UL_1_8);
+      }
+      if(PLL_1_8_UL_Error_Cnt < 4)
+        PLL_1_8_UL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_1_8_UL_Error_Cnt = 0;
+    }
+    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_DL_GPIO_Port, PLL_LD_2_1G_DL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_2_1G_DL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_DL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+          ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+      if(PLL_2_1_DL_Error_Cnt == 3){
+        Error_Message_Occur(DL_2_1);
+      }
+      
+      if(PLL_2_1_DL_Error_Cnt < 4)
+        PLL_2_1_DL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_2_1_DL_Error_Cnt = 0;
+    }
+
+    
+    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_UL_GPIO_Port, PLL_LD_2_1G_UL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_2_1G_UL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_UL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+          ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+      if(PLL_2_1_UL_Error_Cnt == 3){
+        Error_Message_Occur(UL_2_1);
+      }
+      if(PLL_2_1_UL_Error_Cnt < 4)
+        PLL_2_1_UL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_2_1_UL_Error_Cnt = 0;
+    }
+}
+
+
+uint32_t halSynSetFreq(uint32_t rf_Freq)
+{
+    uint32_t  R, B;
+    uint32_t  A, P, p_mode;
+    uint32_t  N_val = 0;
+    N_val = (rf_Freq / ADF4113_CH_STEP);
+    if( N_val < ADF4113_PRE8_MIN_N) { 
+        return HAL_SYN_INVALID_PRESCALE; 
+    } else if(( N_val> ADF4113_PRE8_MIN_N) && (N_val < ADF4113_PRE16_MIN_N)) { 
+        P = 8;  
+        p_mode = ADF4113_PRESCALE8;
+    } else if(( N_val > ADF4113_PRE16_MIN_N) && (N_val < ADF4113_PRE32_MIN_N)) { 
+        P = 16;
+        p_mode = ADF4113_PRESCALE16;
+        
+    } else if((N_val > ADF4113_PRE32_MIN_N) && ( N_val < ADF4113_PRE64_MIN_N)) { 
+        P = 32;
+        p_mode = ADF4113_PRESCALE32;
+        
+    } else if( N_val > ADF4113_PRE64_MIN_N) { 
+        P = 64; 
+        p_mode = ADF4113_PRESCALE64;
+    }
+    P = 32;
+    B = N_val / P;
+    A = N_val -(B * P);
+#if 1 // PYJ.2019.08.10_BEGIN -- 
+    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
+    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
+#endif // PYJ.2019.08.10_END -- 
+  return N_Counter_Latch_Create(A,B,0);
+}
+uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
+    uint32_t ret = 0;
+    uint32_t shift_bit = 0x01;
+    uint8_t control_bit = 1;
+    uint8_t i = 0;
+    uint8_t reserve = 0;
+#ifdef DEBUG_PRINT
+    printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
+
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 0; i < 2; i++){
+        if(control_bit & 0x01)
+            ret += shift_bit << i;
+        control_bit = control_bit >> 1;
+    }
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 2; i < 8; i++){
+        if(_ACOUNTER & 0x01)
+            ret += shift_bit << i;
+        _ACOUNTER = _ACOUNTER >> 1;
+    }  
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 8; i < 21; i++){
+        if(_BCOUNTER & 0x01)
+            ret += shift_bit << i;
+        _BCOUNTER = _BCOUNTER >> 1;
+    }      
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    if(_CPGAIN & 0x01)
+            ret += shift_bit << i++;
+    for(i = 22; i < 24; i++){
+        if(reserve & 0x01)
+            ret += shift_bit << i;
+        reserve = reserve >> 1;
+    }   
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    return ret;
+}
+void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
+    R2 = R2 & 0xFFFFFF;
+    R1 = R1 & 0xFFFFFF;
+    R0 = R0 & 0xFFFFFF;
+    
+    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+    /*   R2 Ctrl    */
+     for(int i =0; i < 24; i++){
+         if(R2 & 0x800000){
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+         }
+         else{
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");
+#endif // PYJ.2019.08.11_END -- 
+             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+         }
+          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+         Pol_Delay_us(10);
+          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+         R2 = ((R2 << 1) & 0xFFFFFF);
+     }
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+     printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+     Pol_Delay_us(10);
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+        /*   R0 Ctrl    */
+   
+    for(int i =0; i < 24; i++){
+        if(R0 & 0x800000){
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+        }
+        else{
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");
+#endif // PYJ.2019.08.11_END -- 
+        }
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+        Pol_Delay_us(10);
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+        R0 = ((R0 << 1) & 0xFFFFFF);
+    }  
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+        printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+     
+     Pol_Delay_us(10);
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);    
+     /*   R1 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R1 & 0x800000){
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+        }
+        else{
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");            
+#endif // PYJ.2019.08.11_END -- 
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+        }
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+        Pol_Delay_us(10);
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+        R1 = ((R1 << 1) & 0xFFFFFF);
+    }
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+        printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+    Pol_Delay_us(10);
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+
+}