PATH enable 3.5G DL UL ON OFF 시 VGS도 같이 동작하도록 수정

Debug/STM32F103_ATTEN_PLL_Zig.hex

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 :10AD3800022B00F3B980002D05DD39462A4620464E
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 :10AD780047FD07970746029BDDF8188003F001039B
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 :10B1E800D4C00008F4C00008B4C00008014900F049
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 :10C730000000000000000000000041534349490090
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 :00000001FF

Debug/STM32F103_ATTEN_PLL_Zig.map

@@ -1798,116 +1798,115 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x08008b54       0x38 Src\zig_operate.o
                 0x08008b54                RF_Status_Ack
  .text.RF_Operate
-                0x08008b8c      0xa38 Src\zig_operate.o
+                0x08008b8c      0xa3c Src\zig_operate.o
                 0x08008b8c                RF_Operate
  .text.RF_Ctrl_Main
-                0x080095c4       0x9c Src\zig_operate.o
-                0x080095c4                RF_Ctrl_Main
+                0x080095c8       0x9c Src\zig_operate.o
+                0x080095c8                RF_Ctrl_Main
  .text.Reset_Handler
-                0x08009660       0x48 startup\startup_stm32f103xe.o
-                0x08009660                Reset_Handler
+                0x08009664       0x48 startup\startup_stm32f103xe.o
+                0x08009664                Reset_Handler
  .text.Default_Handler
-                0x080096a8        0x2 startup\startup_stm32f103xe.o
-                0x080096a8                RTC_Alarm_IRQHandler
-                0x080096a8                EXTI2_IRQHandler
-                0x080096a8                TIM8_TRG_COM_IRQHandler
-                0x080096a8                TIM8_CC_IRQHandler
-                0x080096a8                TIM1_CC_IRQHandler
-                0x080096a8                PVD_IRQHandler
-                0x080096a8                SDIO_IRQHandler
-                0x080096a8                EXTI3_IRQHandler
-                0x080096a8                EXTI0_IRQHandler
-                0x080096a8                I2C2_EV_IRQHandler
-                0x080096a8                ADC1_2_IRQHandler
-                0x080096a8                SPI1_IRQHandler
-                0x080096a8                TAMPER_IRQHandler
-                0x080096a8                TIM8_UP_IRQHandler
-                0x080096a8                DMA2_Channel2_IRQHandler
-                0x080096a8                USART3_IRQHandler
-                0x080096a8                RTC_IRQHandler
-                0x080096a8                DMA1_Channel7_IRQHandler
-                0x080096a8                CAN1_RX1_IRQHandler
-                0x080096a8                UART5_IRQHandler
-                0x080096a8                ADC3_IRQHandler
-                0x080096a8                TIM4_IRQHandler
-                0x080096a8                DMA2_Channel1_IRQHandler
-                0x080096a8                I2C1_EV_IRQHandler
-                0x080096a8                DMA1_Channel6_IRQHandler
-                0x080096a8                UART4_IRQHandler
-                0x080096a8                TIM3_IRQHandler
-                0x080096a8                RCC_IRQHandler
-                0x080096a8                TIM1_TRG_COM_IRQHandler
-                0x080096a8                Default_Handler
-                0x080096a8                EXTI15_10_IRQHandler
-                0x080096a8                TIM7_IRQHandler
-                0x080096a8                TIM5_IRQHandler
-                0x080096a8                EXTI9_5_IRQHandler
-                0x080096a8                SPI2_IRQHandler
-                0x080096a8                EXTI4_IRQHandler
-                0x080096a8                USB_LP_CAN1_RX0_IRQHandler
-                0x080096a8                USB_HP_CAN1_TX_IRQHandler
-                0x080096a8                DMA1_Channel3_IRQHandler
-                0x080096a8                FSMC_IRQHandler
-                0x080096a8                TIM1_UP_IRQHandler
-                0x080096a8                WWDG_IRQHandler
-                0x080096a8                TIM2_IRQHandler
-                0x080096a8                TIM1_BRK_IRQHandler
-                0x080096a8                EXTI1_IRQHandler
-                0x080096a8                DMA2_Channel4_5_IRQHandler
-                0x080096a8                USART2_IRQHandler
-                0x080096a8                I2C2_ER_IRQHandler
-                0x080096a8                DMA1_Channel2_IRQHandler
-                0x080096a8                TIM8_BRK_IRQHandler
-                0x080096a8                CAN1_SCE_IRQHandler
-                0x080096a8                FLASH_IRQHandler
-                0x080096a8                SPI3_IRQHandler
-                0x080096a8                I2C1_ER_IRQHandler
-                0x080096a8                USBWakeUp_IRQHandler
-                0x080096a8                DMA2_Channel3_IRQHandler
- *fill*         0x080096aa        0x2 
- .text.__errno  0x080096ac        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-errno.o)
-                0x080096ac                __errno
+                0x080096ac        0x2 startup\startup_stm32f103xe.o
+                0x080096ac                RTC_Alarm_IRQHandler
+                0x080096ac                EXTI2_IRQHandler
+                0x080096ac                TIM8_TRG_COM_IRQHandler
+                0x080096ac                TIM8_CC_IRQHandler
+                0x080096ac                TIM1_CC_IRQHandler
+                0x080096ac                PVD_IRQHandler
+                0x080096ac                SDIO_IRQHandler
+                0x080096ac                EXTI3_IRQHandler
+                0x080096ac                EXTI0_IRQHandler
+                0x080096ac                I2C2_EV_IRQHandler
+                0x080096ac                ADC1_2_IRQHandler
+                0x080096ac                SPI1_IRQHandler
+                0x080096ac                TAMPER_IRQHandler
+                0x080096ac                TIM8_UP_IRQHandler
+                0x080096ac                DMA2_Channel2_IRQHandler
+                0x080096ac                USART3_IRQHandler
+                0x080096ac                RTC_IRQHandler
+                0x080096ac                DMA1_Channel7_IRQHandler
+                0x080096ac                CAN1_RX1_IRQHandler
+                0x080096ac                UART5_IRQHandler
+                0x080096ac                ADC3_IRQHandler
+                0x080096ac                TIM4_IRQHandler
+                0x080096ac                DMA2_Channel1_IRQHandler
+                0x080096ac                I2C1_EV_IRQHandler
+                0x080096ac                DMA1_Channel6_IRQHandler
+                0x080096ac                UART4_IRQHandler
+                0x080096ac                TIM3_IRQHandler
+                0x080096ac                RCC_IRQHandler
+                0x080096ac                TIM1_TRG_COM_IRQHandler
+                0x080096ac                Default_Handler
+                0x080096ac                EXTI15_10_IRQHandler
+                0x080096ac                TIM7_IRQHandler
+                0x080096ac                TIM5_IRQHandler
+                0x080096ac                EXTI9_5_IRQHandler
+                0x080096ac                SPI2_IRQHandler
+                0x080096ac                EXTI4_IRQHandler
+                0x080096ac                USB_LP_CAN1_RX0_IRQHandler
+                0x080096ac                USB_HP_CAN1_TX_IRQHandler
+                0x080096ac                DMA1_Channel3_IRQHandler
+                0x080096ac                FSMC_IRQHandler
+                0x080096ac                TIM1_UP_IRQHandler
+                0x080096ac                WWDG_IRQHandler
+                0x080096ac                TIM2_IRQHandler
+                0x080096ac                TIM1_BRK_IRQHandler
+                0x080096ac                EXTI1_IRQHandler
+                0x080096ac                DMA2_Channel4_5_IRQHandler
+                0x080096ac                USART2_IRQHandler
+                0x080096ac                I2C2_ER_IRQHandler
+                0x080096ac                DMA1_Channel2_IRQHandler
+                0x080096ac                TIM8_BRK_IRQHandler
+                0x080096ac                CAN1_SCE_IRQHandler
+                0x080096ac                FLASH_IRQHandler
+                0x080096ac                SPI3_IRQHandler
+                0x080096ac                I2C1_ER_IRQHandler
+                0x080096ac                USBWakeUp_IRQHandler
+                0x080096ac                DMA2_Channel3_IRQHandler
+ *fill*         0x080096ae        0x2 
+ .text.__errno  0x080096b0        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-errno.o)
+                0x080096b0                __errno
  .text.__libc_init_array
-                0x080096b8       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-init.o)
-                0x080096b8                __libc_init_array
- .text.memcpy   0x08009700       0x16 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memcpy-stub.o)
-                0x08009700                memcpy
- .text.memset   0x08009716       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memset.o)
-                0x08009716                memset
- .text.__cvt    0x08009726       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x08009726                __cvt
+                0x080096bc       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-init.o)
+                0x080096bc                __libc_init_array
+ .text.memcpy   0x08009704       0x16 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memcpy-stub.o)
+                0x08009704                memcpy
+ .text.memset   0x0800971a       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memset.o)
+                0x0800971a                memset
+ .text.__cvt    0x0800972a       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x0800972a                __cvt
  .text.__exponent
-                0x080097de       0x6a c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x080097de                __exponent
+                0x080097e2       0x6a c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x080097e2                __exponent
  .text._printf_float
-                0x08009848      0x470 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x08009848                _printf_float
+                0x0800984c      0x470 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x0800984c                _printf_float
  .text._printf_common
-                0x08009cb8       0xee c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x08009cb8                _printf_common
- *fill*         0x08009da6        0x2 
+                0x08009cbc       0xee c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x08009cbc                _printf_common
+ *fill*         0x08009daa        0x2 
  .text._printf_i
-                0x08009da8      0x240 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x08009da8                _printf_i
- .text.printf   0x08009fe8       0x30 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-printf.o)
-                0x08009fe8                iprintf
-                0x08009fe8                printf
- .text._puts_r  0x0800a018       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
-                0x0800a018                _puts_r
- .text.puts     0x0800a0d0       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
-                0x0800a0d0                puts
- .text.setbuf   0x0800a0e0       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setbuf.o)
-                0x0800a0e0                setbuf
- .text.setvbuf  0x0800a0f0      0x15c c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setvbuf.o)
-                0x0800a0f0                setvbuf
+                0x08009dac      0x240 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x08009dac                _printf_i
+ .text.printf   0x08009fec       0x30 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-printf.o)
+                0x08009fec                iprintf
+                0x08009fec                printf
+ .text._puts_r  0x0800a01c       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
+                0x0800a01c                _puts_r
+ .text.puts     0x0800a0d4       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
+                0x0800a0d4                puts
+ .text.setbuf   0x0800a0e4       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setbuf.o)
+                0x0800a0e4                setbuf
+ .text.setvbuf  0x0800a0f4      0x15c c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setvbuf.o)
+                0x0800a0f4                setvbuf
  .text.__swbuf_r
-                0x0800a24c       0xa4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wbuf.o)
-                0x0800a24c                __swbuf_r
+                0x0800a250       0xa4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wbuf.o)
+                0x0800a250                __swbuf_r
  .text.__swsetup_r
-                0x0800a2f0       0xdc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wsetup.o)
-                0x0800a2f0                __swsetup_r
- .text.quorem   0x0800a3cc      0x118 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
- *fill*         0x0800a4e4        0x4 
+                0x0800a2f4       0xdc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wsetup.o)
+                0x0800a2f4                __swsetup_r
+ .text.quorem   0x0800a3d0      0x118 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
  .text._dtoa_r  0x0800a4e8      0xba8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
                 0x0800a4e8                _dtoa_r
  .text.__sflush_r
@@ -2576,7 +2575,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_abbrev  0x00004cc1      0x357 Src\zig_operate.o
  .debug_abbrev  0x00005018       0x12 startup\startup_stm32f103xe.o
 
-.debug_loc      0x00000000     0x9d86
+.debug_loc      0x00000000     0x9d9c
  .debug_loc     0x00000000      0x11b Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_loc     0x0000011b      0x87e Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_loc     0x00000999      0x769 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2603,7 +2602,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_loc     0x0000938a      0x3ef Src\syscalls.o
  .debug_loc     0x00009779       0xcd Src\system_stm32f1xx.o
  .debug_loc     0x00009846      0x113 Src\uart.o
- .debug_loc     0x00009959      0x42d Src\zig_operate.o
+ .debug_loc     0x00009959      0x443 Src\zig_operate.o
 
 .debug_aranges  0x00000000      0xe38
  .debug_aranges
@@ -2696,7 +2695,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_ranges  0x000011b0       0x48 Src\zig_operate.o
  .debug_ranges  0x000011f8       0x20 startup\startup_stm32f103xe.o
 
-.debug_line     0x00000000     0x990f
+.debug_line     0x00000000     0x9911
  .debug_line    0x00000000      0x45f Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_line    0x0000045f      0x863 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_line    0x00000cc2      0x737 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2724,8 +2723,8 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_line    0x000088d0      0x3c0 Src\syscalls.o
  .debug_line    0x00008c90      0x2bf Src\system_stm32f1xx.o
  .debug_line    0x00008f4f      0x3c6 Src\uart.o
- .debug_line    0x00009315      0x57d Src\zig_operate.o
- .debug_line    0x00009892       0x7d startup\startup_stm32f103xe.o
+ .debug_line    0x00009315      0x57f Src\zig_operate.o
+ .debug_line    0x00009894       0x7d startup\startup_stm32f103xe.o
 
 .debug_str      0x00000000     0x589a
  .debug_str     0x00000000      0xc6c Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o

Debug/Src/zig_operate.su

@@ -1,5 +1,5 @@
 zig_operate.c:201:6:RF_Data_Check	8	static
 zig_operate.c:234:6:RF_Status_Get	8	static
 zig_operate.c:248:6:RF_Status_Ack	8	static
-zig_operate.c:262:6:RF_Operate	176	static
-zig_operate.c:702:6:RF_Ctrl_Main	16	static
+zig_operate.c:262:6:RF_Operate	184	static
+zig_operate.c:704:6:RF_Ctrl_Main	16	static

Src/zig_operate.c

@@ -546,17 +546,19 @@ void RF_Operate(uint8_t* data_buf){
     if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
         Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
         Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
+    
 
     }
     if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
         Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
         Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
+        ADC_Modify = 1;
 
     }
     if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
         Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
         Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
-
+        ADC_Modify = 1;
     }
     if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
         Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(5801).c

@@ -0,0 +1,752 @@
+/*
+ * zig_operate.c
+ *
+ *  Created on: 2019. 7. 26.
+ *      Author: parkyj
+ */
+#include "zig_operate.h"
+#include "main.h"
+#include "pll_4113.h"
+#include "ADF4153.h"
+#include "PE43711.h"
+#include "BDA4601.h"
+#include "uart.h"
+#include "CRC16.h"
+extern void AD5318_Ctrl(uint16_t ShiftTarget) ;
+extern etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum);
+extern void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
+extern bool Bluecell_Flash_Read(uint8_t* data);
+extern void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT);
+extern void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
+extern uint8_t Bluecell_Flash_Write(uint8_t* data);
+uint8_t Prev_data[INDEX_BLUE_EOF + 1];
+uint8_t Flash_Save_data[INDEX_BLUE_EOF + 1];
+
+
+/* * * * * * * #define Struct* * * * * * * */
+PLL_Setting_st Pll_1_8GHz_DL = {
+	PLL_CLK_GPIO_Port,
+	PLL_CLK_Pin,
+	PLL_DATA_GPIO_Port,
+	PLL_DATA_Pin,
+    PLL_EN_1_8G_DL_GPIO_Port,    
+    PLL_EN_1_8G_DL_Pin,
+};
+PLL_Setting_st Pll_1_8GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_UL_GPIO_Port,    
+    PLL_EN_1_8G_UL_Pin,
+};
+PLL_Setting_st Pll_2_1GHz_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st Pll_2_1GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+/* * * * * * * * NOT YET * * * * * * * */
+PLL_Setting_st Pll_3_5GHz_DL = {
+    ATT_CLK_3_5G_GPIO_Port,
+    ATT_EN_3_5G_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st Pll_3_5GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+/* * * * * * * * ATTEN * * * * * * * */    
+ATTEN_Setting_st Atten_1_8Ghz_DL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_DL1_GPIO_Port,    
+    ATT_EN_1_8G_DL1_Pin,
+    PATH_EN_1_8G_DL_GPIO_Port,
+    PATH_EN_1_8G_DL_Pin,
+};
+
+ATTEN_Setting_st Atten_1_8Ghz_DL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_DL2_GPIO_Port,    
+    ATT_EN_1_8G_DL2_Pin,
+    PATH_EN_1_8G_DL_GPIO_Port,
+    PATH_EN_1_8G_DL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL1_GPIO_Port,    
+    ATT_EN_1_8G_UL1_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,      
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL2_GPIO_Port,    
+    ATT_EN_1_8G_UL2_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL3 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL3_GPIO_Port,    
+    ATT_EN_1_8G_UL3_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL4 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL4_GPIO_Port,    
+    ATT_EN_1_8G_UL4_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_DL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_DL1_GPIO_Port,    
+    ATT_EN_2_1G_DL1_Pin,
+    PATH_EN_2_1G_DL_GPIO_Port,
+    PATH_EN_2_1G_DL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_DL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_DL2_GPIO_Port,    
+    ATT_EN_2_1G_DL2_Pin,
+    PATH_EN_2_1G_DL_GPIO_Port,
+    PATH_EN_2_1G_DL_Pin,    
+};
+
+ATTEN_Setting_st Atten_2_1Ghz_UL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL1_GPIO_Port,    
+    ATT_EN_2_1G_UL1_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL2_GPIO_Port,    
+    ATT_EN_2_1G_UL2_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL3 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL3_GPIO_Port,    
+    ATT_EN_2_1G_UL3_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL4_GPIO_Port,    
+    ATT_EN_2_1G_UL4_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+
+
+bool RF_Data_Check(uint8_t* data_buf){
+    bool ret = false;
+    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
+    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
+        ret= true;
+    }
+    if(crcret == true){/*CRC CHECK*/
+        ret = true;
+    }else{
+        ret = false;
+//        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
+    }
+//    printf("CRC Result : \"%d\"   \r\n",ret);
+    return ret;
+
+}
+
+PLL_Setting_st Pll_3_5_H = {
+     PLL_CLK_3_5G_GPIO_Port,
+     PLL_CLK_3_5G_Pin,
+     PLL_DATA_3_5G_GPIO_Port,
+     PLL_DATA_3_5G_Pin,
+   PLL_EN_3_5G_H_GPIO_Port,    
+   PLL_EN_3_5G_H_Pin,
+ };
+ PLL_Setting_st Pll_3_5_L = {
+     PLL_CLK_3_5G_GPIO_Port,
+     PLL_CLK_3_5G_Pin,
+     PLL_DATA_3_5G_GPIO_Port,
+     PLL_DATA_3_5G_Pin,
+       PLL_EN_3_5G_L_GPIO_Port,    
+       PLL_EN_3_5G_L_Pin,
+ };
+void RF_Status_Get(void){
+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
+    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
+    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
+    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
+    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
+    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
+    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
+//    printf("\r\nYJ : %x",ADCvalue[0]);
+//    printf("\r\n");
+
+}
+static uint8_t Ack_Buf[6];
+void RF_Status_Ack(void){
+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
+    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
+    Ack_Buf[INDEX_BLUE_LENGTH]       = 3;
+    Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1;
+    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
+    Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER;
+    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
+//    printf("\r\nYJ : %x",ADCvalue[0]);
+//    printf("\r\n");
+
+}
+
+void RF_Operate(uint8_t* data_buf){
+    uint32_t temp_val = 0;
+    uint8_t  ADC_Modify = 0;
+    ADF4153_R_N_Reg_st temp_reg;
+//    printf("Prev_data[INDEX_ATT_1_8G_DL1]  : %x  data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]);
+    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
+        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
+        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
+        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
+        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
+        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
+        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
+    }
+    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
+        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
+        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
+        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
+        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
+        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
+        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
+    }
+    if(   (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1])
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1])
+        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
+        ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2])
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2])
+        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
+    ){
+        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1]  = data_buf[INDEX_ATT_3_5G_LOW1];
+        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
+        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
+        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
+        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
+        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
+        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+    }
+    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
+        || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
+    ){
+        Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H];
+        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
+//        printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]);
+//        printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]);
+        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
+        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+        HAL_Delay(1);
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
+    }
+    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
+        || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
+        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
+//        printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]);
+//        printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]);
+        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
+        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
+//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+        HAL_Delay(1);
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
+    }
+    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
+        || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
+        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
+//        printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]);
+//        printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]);
+        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
+        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
+//         ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+        ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+      HAL_Delay(1);
+      BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
+      BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
+    }
+    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
+        || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
+        Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H];
+        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];    
+//        printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]);
+//        printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]);
+        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
+//        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+      HAL_Delay(1);
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));      
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));      
+
+
+    }
+    if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H])
+        ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M])
+        || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){
+        Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H];
+        Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M];        
+        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
+        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
+                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
+                   (data_buf[INDEX_PLL_3_5G_LOW_L]);
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+#endif // PYJ.2019.08.12_END -- 
+        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+    }
+    if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H])
+        || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M])
+        || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){
+        Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H];
+        Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M];
+        Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L];
+        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
+                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
+                   (data_buf[INDEX_PLL_3_5G_HIGH_L]);
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+#endif // PYJ.2019.08.12_END -- 
+        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+
+    }
+    if(Prev_data[INDEX_PLL_LD_6_BIT] != data_buf[INDEX_PLL_LD_6_BIT]){
+
+    }
+#if 0 // PYJ.2019.07.28_BEGIN -- 
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_H] != data_buf[INDEX_DET_1_8G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_L] != data_buf[INDEX_DET_1_8G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_H] != data_buf[INDEX_DET_1_8G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_L] != data_buf[INDEX_DET_1_8G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_H] != data_buf[INDEX_DET_1_8G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_L] != data_buf[INDEX_DET_1_8G_UL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_H] != data_buf[INDEX_DET_1_8G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_L] != data_buf[INDEX_DET_1_8G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_H] != data_buf[INDEX_DET_2_1G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_L] != data_buf[INDEX_DET_2_1G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_H] != data_buf[INDEX_DET_2_1G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_L] != data_buf[INDEX_DET_2_1G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_H] != data_buf[INDEX_DET_2_1G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_L] != data_buf[INDEX_DET_2_1G_UL_IN_L]){
+
+    }
+
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_H] != data_buf[INDEX_DET_2_1G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_L] != data_buf[INDEX_DET_2_1G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_H] != data_buf[INDEX_DET_3_5G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_L] != data_buf[INDEX_DET_3_5G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_L] != data_buf[INDEX_DET_3_5G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_H] != data_buf[INDEX_DET_3_5G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_H] != data_buf[INDEX_DET_3_5G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_L] != data_buf[INDEX_DET_3_5G_UL_IN_L]){
+
+    }
+
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_H] != data_buf[INDEX_DET_3_5G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_L] != data_buf[INDEX_DET_3_5G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_RFU_TEMP_H] != data_buf[INDEX_RFU_TEMP_H]){
+
+    }
+    if(Prev_data[INDEX_RFU_TEMP_L] != data_buf[INDEX_RFU_TEMP_L]){
+
+    }
+    if(Prev_data[INDEX__28V_DET_H] != data_buf[INDEX__28V_DET_H]){
+
+    }
+    if(Prev_data[INDEX__28V_DET_L] != data_buf[INDEX__28V_DET_L]){
+
+    }
+#endif // PYJ.2019.07.28_END -- 
+    if(Prev_data[INDEX_ALARM_AC] != data_buf[INDEX_ALARM_AC]){
+
+    }
+    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){
+
+    }
+    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
+        Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL];
+    }
+    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]);
+        Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL];
+
+    }
+
+    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
+        Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
+    }
+    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
+        Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]);
+        Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
+        Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
+        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
+        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
+
+    }
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
+        HAL_Delay(1);
+//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
+//            printf("PLL CTRL START !! \r\n");
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+//            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
+//                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
+//                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
+            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
+                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
+                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
+
+
+            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+            temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+#endif // PYJ.2019.08.12_END -- 
+            ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+        }
+    }
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]);
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
+        HAL_Delay(1);
+//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
+//            printf("PLL CTRL START !! \r\n");
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+//            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
+//                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
+//                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
+            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
+                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
+                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
+            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+          temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);            
+#endif // PYJ.2019.08.12_END -- 
+            ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+        }
+    }
+
+    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
+        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]);
+    }
+    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
+        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]);
+    }
+    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
+        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]);
+    }
+    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
+        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
+    }
+
+
+    if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H];
+        Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L];
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){
+        ADC_Modify = 1;
+        
+        Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H];
+        Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L];        
+    }    
+    if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
+        ADC_Modify = 1;
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);
+
+        Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
+        Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H];
+        Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L];
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){
+        ADC_Modify = 1;
+
+        Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H];
+        Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H];
+        Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H];
+        Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L];        
+    }    
+    if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H];
+        Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L];        
+    }
+    if(ADC_Modify){
+//        AD5318_Ctrl(0xF000);
+//        HAL_Delay(1);
+//        AD5318_Ctrl(0x800C);
+//        AD5318_Ctrl(0x2FFF );
+//        AD5318_Ctrl(0xA000);
+//        printf("DAC CTRL START \r\n");
+//        AD5318_Ctrl(0x800C);
+//        AD5318_Ctrl(0xA000);
+//        printf("DAC Change\r\n");
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]));    
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L]));    
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L]));    
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
+    }
+    
+}
+
+uint8_t temp_crc = 0;
+bool RF_Ctrl_Main(uint8_t* data_buf){
+    bool ret = false;
+    Bluecell_Prot_t type = data_buf[Type];
+    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
+    if(ret == false){
+        HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); 
+        return ret;
+    }
+    
+    switch(type){
+    case TYPE_BLUECELL_RESET:
+        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
+            printf("%02x ",data_buf[i]);
+        printf("Reset Start \r\n");
+        NVIC_SystemReset();
+        break;
+    case TYPE_BLUECELL_SET:
+#if 0 // PYJ.2019.07.31_BEGIN -- 
+    printf("TYPE_BLUECELL_SET : ");
+    for(uint8_t i =0 ; i < INDEX_BLUE_EOF + 1; i++)
+        printf("%02x ",data_buf[i]);
+#endif // PYJ.2019.07.31_END -- 
+        RF_Operate(&data_buf[Header]);
+        RF_Status_Ack();
+
+//        ADF4153_Freq_Calc(3465500000,40000000,2,5000);
+//        ADF4153_Freq_Calc(3993450000,40000000,2,5000);
+//        halSynSetFreq(1995000000);
+//        halSynSetFreq(1600000000);
+//        halSynSetFreq(1455000000);        
+        break;
+    case TYPE_BLUECELL_GET:
+#if 0 // PYJ.2019.08.01_BEGIN -- 
+        printf("\r\nTYPE_BLUECELL_GET : \r\n");
+#endif // PYJ.2019.08.01_END -- 
+        RF_Status_Get();
+        break;
+    case TYPE_BLUECELL_SAVE:
+//        printf("\r\nFLASH Write\r\n");
+        Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]);
+        RF_Status_Ack();
+
+        break;
+        default:
+#ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN --         
+            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
+#endif
+            break;
+    }
+    return ret;
+}