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Flash Write 파일 추가 Ram에서 Flash 로 변경 Data Write 할때마다 Flash 저장하도록 수정중

YJ 6 年 前
コミット
5bb519273b
共有26 個のファイルを変更した17408 個の追加15371 個の削除を含む
  1. 1 0
      .settings/org.eclipse.core.resources.prefs
  2. BIN
      Debug/STM32F103_ATTEN_PLL_Zig.elf
  3. 2288 2230
      Debug/STM32F103_ATTEN_PLL_Zig.hex
  4. 12808 12114
      Debug/STM32F103_ATTEN_PLL_Zig.list
  5. 1078 1009
      Debug/STM32F103_ATTEN_PLL_Zig.map
  6. 27 0
      Inc/flash.h
  7. 1 1
      Src/CRC16.c
  8. 114 0
      Src/flash.c
  9. 17 17
      Src/zig_operate.c
  10. 121 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/CRC16(7282).c
  11. 105 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/flash(4965).c
  12. 25 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/flash(7875).h
  13. 144 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/flash(8108).c
  14. 679 0
      insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(1501).c
  15. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_sym
  16. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xc
  17. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xf
  18. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xm
  19. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xr
  20. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.siproj
  21. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_flash.h.sisc
  22. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_AD5318.c.sisc
  23. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_CRC16.c.sisc
  24. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_PE43711.c.sisc
  25. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_flash.c.sisc
  26. BIN
      insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_zig_operate.c.sisc

+ 1 - 0
.settings/org.eclipse.core.resources.prefs

@@ -1,2 +1,3 @@
1 1
 eclipse.preferences.version=1
2 2
 encoding//Src/adf4153.c=UTF-8
3
+encoding//Src/flash.c=UTF-8

BIN
Debug/STM32F103_ATTEN_PLL_Zig.elf


File diff suppressed because it is too large
+ 2288 - 2230
Debug/STM32F103_ATTEN_PLL_Zig.hex


File diff suppressed because it is too large
+ 12808 - 12114
Debug/STM32F103_ATTEN_PLL_Zig.list


File diff suppressed because it is too large
+ 1078 - 1009
Debug/STM32F103_ATTEN_PLL_Zig.map


+ 27 - 0
Inc/flash.h

@@ -0,0 +1,27 @@
1
+/*
2
+ * flash.h
3
+ *
4
+ *  Created on: 2019. 7. 4.
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef FLASH_H_
9
+#define FLASH_H_
10
+
11
+#include "main.h"
12
+#include "CRC16.h"
13
+
14
+#define FLASH_USER_START_ADDR ((uint32_t)0x08007C00)
15
+#define FLASH_USER_END_ADDR     FLASH_USER_START_ADDR + ((uint32_t)0x0080000)   /* End @ of user Flash area */
16
+#define APPLICATION_ADDRESS     (uint32_t)0x08004000      /* Start user code address: ADDR_FLASH_PAGE_8 */
17
+
18
+
19
+#define FirmwareUpdataAck  0x11
20
+#define FirmwareUpdataNak  0x22
21
+
22
+#define FirmwareUpdateDelay 10
23
+uint8_t Flash_Byte_Write(uint8_t* data);
24
+
25
+
26
+
27
+#endif /* FLASH_H_ */

+ 1 - 1
Src/CRC16.c

@@ -9,7 +9,7 @@
9 9
 /*									CRC16	TABLE						    			 */
10 10
 /*---------------------------------------------------------------------------------------*/
11 11
 #include "CRC16.h"
12
-unsigned short Table_CRC16[]  = {
12
+const unsigned short Table_CRC16[]  = {
13 13
 	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
14 14
 	0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
15 15
 	0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,

+ 114 - 0
Src/flash.c

@@ -0,0 +1,114 @@
1
+/*
2
+ * flash.c
3
+ *
4
+ *  Created on: 2019. 7. 15.
5
+ *      Author: parkyj
6
+ */
7
+#include "flash.h"
8
+uint8_t flashinit = 0;
9
+uint32_t Address = FLASH_USER_START_ADDR;
10
+
11
+typedef void (*fptr)(void);
12
+fptr jump_to_app;
13
+uint32_t jump_addr;
14
+void Jump_App(void){
15
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
16
+    printf("boot loader start\n");               //硫붿꽭占�? 異쒕젰
17
+    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
18
+    jump_to_app = (fptr) jump_addr;
19
+    
20
+    /* init user app's sp */
21
+    printf("jump!\n");
22
+    __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
23
+    jump_to_app();
24
+}
25
+
26
+
27
+void FLASH_If_Init(void)
28
+{
29
+  /* Unlock the Program memory */
30
+  HAL_FLASH_Unlock();
31
+
32
+  /* Clear all FLASH flags */
33
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
34
+  /* Unlock the Program memory */
35
+  HAL_FLASH_Lock();
36
+}
37
+
38
+void Flash_InitRead(void) // ?占쏙옙湲고븿?占쏙옙
39
+{
40
+    uint32_t  Address = 0;
41
+    Address = FLASH_USER_START_ADDR;
42
+    for(uint32_t i = 0; i < INDEX_BLUE_EOF + 1; i++ ){
43
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
44
+        Address++;
45
+    }
46
+#if 0 // PYJ.2019.03.27_BEGIN -- 
47
+    for(uint32_t i = 0; i < 13848; i++ ){
48
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
49
+        Address++;
50
+    }
51
+    Address = StartAddr;
52
+    for(uint32_t i = 0; i < 13848; i++ ){
53
+        printf("%02X ",*(uint8_t*)Address);
54
+        Address++;
55
+    }
56
+#endif // PYJ.2019.03.27_END -- 
57
+
58
+}
59
+#define INDEX_LENGTH 2
60
+uint8_t Flash_RGB_Data_Write(uint8_t* data){
61
+    uint16_t Firmdata = 0;
62
+    uint8_t ret = 0;
63
+    for(uint8_t i = 0; i < data[INDEX_LENGTH] - 2; i+=2){
64
+        Firmdata  = ((data[(INDEX_LENGTH + 1) + i]) & 0x00FF);
65
+        Firmdata  += ((data[(INDEX_LENGTH + 1) + (i + 1)] << 8) & 0xFF00);
66
+        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
67
+            printf("HAL NOT OK \n");
68
+            ret = 1;
69
+        }
70
+        Address += 2;
71
+        if(!(i%FirmwareUpdateDelay))
72
+            HAL_Delay(1);
73
+    }
74
+    return ret;
75
+}
76
+#define INDEX_HEADER 0
77
+uint8_t Flash_write(uint8_t* data) // ?占쏙옙湲고븿?占쏙옙
78
+{
79
+
80
+    /*Variable used for Erase procedure*/
81
+    static FLASH_EraseInitTypeDef EraseInitStruct;
82
+    static uint32_t PAGEError = 0;
83
+    uint8_t ret = 0;
84
+    /* Fill EraseInit structure*/
85
+    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
86
+    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
87
+    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
88
+
89
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
90
+    HAL_FLASH_Unlock(); // lock ??占�?
91
+    if(flashinit == 0){
92
+        flashinit= 1;
93
+        //FLASH_PageErase(StartAddr);
94
+        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
95
+            printf("Erase Failed \r\n");
96
+        }
97
+    }
98
+//    FLASH_If_Erase();
99
+    ret = Flash_RGB_Data_Write(&data[INDEX_HEADER]);
100
+    HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린
101
+    __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙
102
+
103
+    return ret;
104
+
105
+}
106
+uint8_t Flash_Byte_Write(uint8_t* data){
107
+
108
+  /*Variable used for Erase procedure*/
109
+  FLASH_If_Init();
110
+
111
+  Flash_write(&data);
112
+  printf("update COmplete\r\n");
113
+  Flash_InitRead();
114
+}

+ 17 - 17
Src/zig_operate.c

@@ -225,8 +225,9 @@ void RF_Status_Get(void){
225 225
     uint8_t data[10];
226 226
     Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
227 227
     Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
228
-    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 3;
228
+    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
229 229
     Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
230
+    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
230 231
     Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
231 232
     HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
232 233
 //    printf("\r\nYJ : %x",ADCvalue[0]);
@@ -331,55 +332,51 @@ void RF_Operate(uint8_t* data_buf){
331 332
         ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1];
332 333
         ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2];
333 334
         ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3];
334
-        printf("YJ : data0  : %x \r\n",ALL_ATT_3_5G.data0);
335
-        printf("YJ : data1  : %x \r\n",ALL_ATT_3_5G.data1);
336
-        printf("YJ : data2  : %x \r\n",ALL_ATT_3_5G.data2);
337
-        printf("YJ : data3  : %x \r\n",ALL_ATT_3_5G.data3);
338
-        printf("YJ : data4  : %x \r\n",ALL_ATT_3_5G.data4);
339 335
         PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
340 336
     }
341 337
 
342 338
     if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
343 339
         && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
344 340
     ){
341
+        Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H];
342
+        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
345 343
         temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
346
-//        printf("INDEX_PLL_1_8G_DL_H : %x \r\n",temp_val);
347 344
         ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
348 345
     }
349 346
     if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
350 347
         && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
351 348
         temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
349
+        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
350
+        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
352 351
         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
353 352
     }
354 353
     if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
355 354
         && (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
356 355
         temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
357
-#ifdef DEBUG_PRINT
358
-        printf("data_buf[INDEX_PLL_2_1G_DL_H]  %x \r\ndata_buf[INDEX_PLL_2_1G_DL_L]  temp_val : %x\r\n ",data_buf[INDEX_PLL_2_1G_DL_H],data_buf[INDEX_PLL_2_1G_DL_L],temp_val);
359
-#endif /* DEBUG_PRINT */
356
+        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
357
+        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
360 358
         ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
361 359
     }
362 360
     if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
363 361
         && (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
362
+        Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H];
363
+        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];          
364 364
         temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
365 365
         ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
366 366
 
367 367
     }
368 368
     if((Prev_data[INDEX_PLL_3_5G_DL_H] != data_buf[INDEX_PLL_3_5G_DL_H])
369 369
         && (Prev_data[INDEX_PLL_3_5G_DL_L] != data_buf[INDEX_PLL_3_5G_DL_L])){
370
-
371
-        (Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]);
372
-        (Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L]);
370
+        Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H];
371
+        Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L];
373 372
         temp_val = (data_buf[INDEX_PLL_3_5G_DL_H] << 8) | (data_buf[INDEX_PLL_3_5G_DL_L]);
374
-        printf("PLL CTRL \r\n");
375 373
         temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
376 374
         ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
377 375
     }
378 376
     if((Prev_data[INDEX_PLL_3_5G_UL_H] != data_buf[INDEX_PLL_3_5G_UL_H])
379 377
         && (Prev_data[INDEX_PLL_3_5G_UL_L] != data_buf[INDEX_PLL_3_5G_UL_L])){
380
-        printf("PLL CTRL \r\n");
381
-        (Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H]);
382
-        (Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L]);
378
+        Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H];
379
+        Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L];
383 380
         temp_val = (data_buf[INDEX_PLL_3_5G_UL_H] << 8) | (data_buf[INDEX_PLL_3_5G_UL_L]);
384 381
         temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
385 382
         ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
@@ -631,6 +628,9 @@ void RF_Operate(uint8_t* data_buf){
631 628
         SubmitDAC((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
632 629
         SubmitDAC((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
633 630
     }
631
+    printf("Write Start \r\n");
632
+    HAL_Delay(5000);
633
+    Flash_Byte_Write(&Prev_data[INDEX_BLUE_HEADER]);
634 634
 }
635 635
 
636 636
 

+ 121 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/CRC16(7282).c

@@ -0,0 +1,121 @@
1
+/*
2
+ * CRC16.c
3
+ *
4
+ *  Created on: 2019. 7. 3.
5
+ *      Author: parkyj
6
+ */
7
+
8
+/*---------------------------------------------------------------------------------------*/
9
+/*									CRC16	TABLE						    			 */
10
+/*---------------------------------------------------------------------------------------*/
11
+#include "CRC16.h"
12
+unsigned short Table_CRC16[]  = {
13
+	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
14
+	0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
15
+	0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
16
+	0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
17
+	0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
18
+	0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
19
+	0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
20
+	0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
21
+	0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
22
+	0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
23
+	0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
24
+	0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
25
+	0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
26
+	0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
27
+	0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
28
+	0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
29
+	0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
30
+	0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
31
+	0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
32
+	0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
33
+	0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
34
+	0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
35
+	0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
36
+	0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
37
+	0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
38
+	0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
39
+	0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
40
+	0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
41
+	0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
42
+	0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
43
+	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
44
+	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
45
+};
46
+
47
+//-----------------------------------------------
48
+//UART CRC üũ ÇÔ¼ö
49
+//-----------------------------------------------
50
+unsigned short genCRC16(char *buf_ptr, int len)
51
+{
52
+	unsigned char dt = 0U;
53
+	unsigned short crc16 = 0U;
54
+
55
+	len *= 8;
56
+	for(crc16 = (unsigned short)0x0000; len >= 8; len -= 8, buf_ptr++)
57
+	{
58
+		crc16 = (unsigned short)(Table_CRC16[(crc16>>8) ^ (unsigned short)(*buf_ptr)] ^ (crc16<<8));
59
+	}
60
+
61
+	if(len != 0)
62
+	{
63
+		dt = (unsigned char)(*buf_ptr << 8);
64
+
65
+		while(len != 0)
66
+		{
67
+			len--;
68
+
69
+			if(((crc16^dt) & ((unsigned short)1 << 15)) != 0)
70
+			{
71
+				crc16 =  (unsigned short)(crc16 << 1);
72
+				crc16 = (unsigned short)(crc16 ^ 0x1021);
73
+			}
74
+			else
75
+			{
76
+				crc16 =  (unsigned short)(crc16 << 1);
77
+			}
78
+			dt = (unsigned char)(dt << 1);
79
+		}
80
+	}
81
+	return(crc16);
82
+}
83
+
84
+uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
85
+{
86
+  uint8_t bit;        // bit mask
87
+  uint8_t crc = 0xFF; // calculated checksum
88
+  uint8_t byteCtr;    // byte counter
89
+
90
+  // calculates 8-Bit checksum with given polynomial
91
+  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
92
+  {
93
+    crc ^= (data[byteCtr]);
94
+    for(bit = 8; bit > 0; --bit)
95
+    {
96
+      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
97
+      else           crc = (crc << 1);
98
+    }
99
+  }
100
+  return crc;
101
+}
102
+etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
103
+{
104
+  uint8_t bit;        // bit mask
105
+  uint8_t crc = 0xFF; // calculated checksum
106
+  uint8_t byteCtr;    // byte counter
107
+
108
+  // calculates 8-Bit checksum with given polynomial
109
+  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
110
+  {
111
+    crc ^= (data[byteCtr]);
112
+    for(bit = 8; bit > 0; --bit)
113
+    {
114
+      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
115
+      else           crc = (crc << 1);
116
+    }
117
+  }
118
+  if(crc != checksum) return CHECKSUM_ERROR;
119
+  else                return NO_ERROR;
120
+}
121
+

+ 105 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/flash(4965).c

@@ -0,0 +1,105 @@
1
+/*
2
+ * flash.c
3
+ *
4
+ *  Created on: 2019. 7. 15.
5
+ *      Author: parkyj
6
+ */
7
+#include "flash.h"
8
+uint8_t flashinit = 0;
9
+uint32_t Address = FLASH_USER_START_ADDR;
10
+
11
+typedef void (*fptr)(void);
12
+fptr jump_to_app;
13
+uint32_t jump_addr;
14
+void Jump_App(void){
15
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
16
+    printf("boot loader start\n");               //硫붿꽭占�? 異쒕젰
17
+    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
18
+    jump_to_app = (fptr) jump_addr;
19
+    
20
+    /* init user app's sp */
21
+    printf("jump!\n");
22
+    __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
23
+    jump_to_app();
24
+}
25
+
26
+
27
+void FLASH_If_Init(void)
28
+{
29
+  /* Unlock the Program memory */
30
+  HAL_FLASH_Unlock();
31
+
32
+  /* Clear all FLASH flags */
33
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
34
+  /* Unlock the Program memory */
35
+  HAL_FLASH_Lock();
36
+}
37
+
38
+void Flash_InitRead(void) // ?占쏙옙湲고븿?占쏙옙
39
+{
40
+    uint32_t  Address = 0;
41
+    Address = FLASH_USER_START_ADDR;
42
+    for(uint32_t i = 0; i < 16; i++ ){
43
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
44
+        Address++;
45
+    }
46
+#if 0 // PYJ.2019.03.27_BEGIN -- 
47
+    for(uint32_t i = 0; i < 13848; i++ ){
48
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
49
+        Address++;
50
+    }
51
+    Address = StartAddr;
52
+    for(uint32_t i = 0; i < 13848; i++ ){
53
+        printf("%02X ",*(uint8_t*)Address);
54
+        Address++;
55
+    }
56
+#endif // PYJ.2019.03.27_END -- 
57
+
58
+}
59
+#define INDEX_LENGTH 2
60
+uint8_t Flash_RGB_Data_Write(uint8_t* data){
61
+    uint16_t Firmdata = 0;
62
+    uint8_t ret = 0;
63
+    for(uint8_t i = 0; i < data[INDEX_LENGTH] - 2; i+=2){
64
+        Firmdata  = ((data[(INDEX_LENGTH + 1) + i]) & 0x00FF);
65
+        Firmdata  += ((data[(INDEX_LENGTH + 1) + (i + 1)] << 8) & 0xFF00);
66
+        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
67
+            printf("HAL NOT OK \n");
68
+            ret = 1;
69
+        }
70
+        Address += 2;
71
+        if(!(i%FirmwareUpdateDelay))
72
+        HAL_Delay(1);
73
+    }
74
+    return ret;
75
+}
76
+#define INDEX_HEADER 0
77
+uint8_t Flash_write(uint8_t* data) // ?占쏙옙湲고븿?占쏙옙
78
+{
79
+
80
+    /*Variable used for Erase procedure*/
81
+    static FLASH_EraseInitTypeDef EraseInitStruct;
82
+    static uint32_t PAGEError = 0;
83
+    uint8_t ret = 0;
84
+    /* Fill EraseInit structure*/
85
+    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
86
+    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
87
+    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
88
+
89
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
90
+    HAL_FLASH_Unlock(); // lock ??占�?
91
+    if(flashinit == 0){
92
+        flashinit= 1;
93
+        //FLASH_PageErase(StartAddr);
94
+        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
95
+            printf("Erase Failed \r\n");
96
+        }
97
+    }
98
+//    FLASH_If_Erase();
99
+    ret = Flash_RGB_Data_Write(&data[INDEX_HEADER]);
100
+    HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린
101
+    __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙
102
+
103
+    return ret;
104
+
105
+}

+ 25 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/flash(7875).h

@@ -0,0 +1,25 @@
1
+/*
2
+ * flash.h
3
+ *
4
+ *  Created on: 2019. 7. 4.
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef FLASH_H_
9
+#define FLASH_H_
10
+
11
+#include "main.h"
12
+#include "CRC16.h"
13
+
14
+#define FLASH_USER_START_ADDR ((uint32_t)0x08004000)
15
+#define FLASH_USER_END_ADDR     FLASH_USER_START_ADDR + ((uint32_t)0x000FFFF)   /* End @ of user Flash area */
16
+#define APPLICATION_ADDRESS     (uint32_t)0x08004000      /* Start user code address: ADDR_FLASH_PAGE_8 */
17
+
18
+
19
+#define FirmwareUpdataAck  0x11
20
+#define FirmwareUpdataNak  0x22
21
+
22
+#define FirmwareUpdateDelay 50
23
+
24
+
25
+#endif /* FLASH_H_ */

+ 144 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/flash(8108).c

@@ -0,0 +1,144 @@
1
+/*
2
+ * flash.c
3
+ *
4
+ *  Created on: 2019. 7. 15.
5
+ *      Author: parkyj
6
+ */
7
+#include "flash.h"
8
+uint8_t flashinit = 0;
9
+uint32_t Address = FLASH_USER_START_ADDR;
10
+
11
+typedef void (*fptr)(void);
12
+fptr jump_to_app;
13
+uint32_t jump_addr;
14
+void Jump_App(void){
15
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
16
+    printf("boot loader start\n");               //硫붿꽭占�? 異쒕젰
17
+    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
18
+    jump_to_app = (fptr) jump_addr;
19
+    
20
+    /* init user app's sp */
21
+    printf("jump!\n");
22
+    __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
23
+    jump_to_app();
24
+}
25
+
26
+
27
+void FLASH_If_Init(void)
28
+{
29
+  /* Unlock the Program memory */
30
+  HAL_FLASH_Unlock();
31
+
32
+  /* Clear all FLASH flags */
33
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
34
+  /* Unlock the Program memory */
35
+  HAL_FLASH_Lock();
36
+}
37
+
38
+void Flash_InitRead(void) // ?占쏙옙湲고븿?占쏙옙
39
+{
40
+    uint32_t  Address = 0;
41
+    Address = FLASH_USER_START_ADDR;
42
+    for(uint32_t i = 0; i < 16; i++ ){
43
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
44
+        Address++;
45
+    }
46
+#if 0 // PYJ.2019.03.27_BEGIN -- 
47
+    for(uint32_t i = 0; i < 13848; i++ ){
48
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
49
+        Address++;
50
+    }
51
+    Address = StartAddr;
52
+    for(uint32_t i = 0; i < 13848; i++ ){
53
+        printf("%02X ",*(uint8_t*)Address);
54
+        Address++;
55
+    }
56
+#endif // PYJ.2019.03.27_END -- 
57
+
58
+}
59
+#define INDEX_LENGTH 2
60
+uint8_t Flash_RGB_Data_Write(uint8_t* data){
61
+    uint16_t Firmdata = 0;
62
+    uint8_t ret = 0;
63
+    for(uint8_t i = 0; i < data[INDEX_LENGTH] - 2; i+=2){
64
+        Firmdata  = ((data[(INDEX_LENGTH + 1) + i]) & 0x00FF);
65
+        Firmdata  += ((data[(INDEX_LENGTH + 1) + (i + 1)] << 8) & 0xFF00);
66
+        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
67
+            printf("HAL NOT OK \n");
68
+            ret = 1;
69
+        }
70
+        Address += 2;
71
+        if(!(i%FirmwareUpdateDelay))
72
+            HAL_Delay(1);
73
+    }
74
+    return ret;
75
+}
76
+#define INDEX_HEADER 0
77
+uint8_t Flash_write(uint8_t* data) // ?占쏙옙湲고븿?占쏙옙
78
+{
79
+
80
+    /*Variable used for Erase procedure*/
81
+    static FLASH_EraseInitTypeDef EraseInitStruct;
82
+    static uint32_t PAGEError = 0;
83
+    uint8_t ret = 0;
84
+    /* Fill EraseInit structure*/
85
+    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
86
+    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
87
+    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
88
+
89
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
90
+    HAL_FLASH_Unlock(); // lock ??占�?
91
+    if(flashinit == 0){
92
+        flashinit= 1;
93
+        //FLASH_PageErase(StartAddr);
94
+        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
95
+            printf("Erase Failed \r\n");
96
+        }
97
+    }
98
+//    FLASH_If_Erase();
99
+    ret = Flash_RGB_Data_Write(&data[INDEX_HEADER]);
100
+    HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린
101
+    __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙
102
+
103
+    return ret;
104
+
105
+}
106
+uint8_t Flash_Byte_Write(uint8_t* data){
107
+
108
+  /*Variable used for Erase procedure*/
109
+  static FLASH_EraseInitTypeDef EraseInitStruct;
110
+  static uint32_t PAGEError = 0;
111
+  uint8_t ret = 0;
112
+  uint16_t Writedata = 0;
113
+  /* Fill EraseInit structure*/
114
+  EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
115
+  EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
116
+  EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
117
+  
118
+  __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
119
+  HAL_FLASH_Unlock();
120
+
121
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
122
+
123
+    if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
124
+        printf("Erase Failed \r\n");
125
+    }
126
+
127
+  for(int i = 0; i<INDEX_BLUE_EOF + 1;i++ ){
128
+      Writedata  = ((data[(INDEX_LENGTH + 1) + i]) & 0x00FF);
129
+      Writedata  += ((data[(INDEX_LENGTH + 1) + (i + 1)] << 8) & 0xFF00);
130
+	  if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, data[i])!= HAL_OK){
131
+            printf("HAL NOT OK \n");
132
+      }
133
+      Address += 2;
134
+    if(!(i%FirmwareUpdateDelay))
135
+        HAL_Delay(1);
136
+  }
137
+  Address = FLASH_USER_START_ADDR;
138
+
139
+  HAL_FLASH_Lock();
140
+  __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙
141
+     for(int i = 0; i<INDEX_BLUE_EOF + 1;i++ ){
142
+       uint32_t viewer = *(uint32_t*)(Address + i);
143
+     }
144
+}

+ 679 - 0
insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(1501).c

@@ -0,0 +1,679 @@
1
+/*
2
+ * zig_operate.c
3
+ *
4
+ *  Created on: 2019. 7. 26.
5
+ *      Author: parkyj
6
+ */
7
+#include "zig_operate.h"
8
+uint8_t Prev_data[INDEX_BLUE_EOF + 1];
9
+
10
+/* * * * * * * #define Struct* * * * * * * */
11
+PLL_Setting_st Pll_1_8GHz_DL = {
12
+	PLL_CLK_GPIO_Port,
13
+	PLL_CLK_Pin,
14
+	PLL_DATA_GPIO_Port,
15
+	PLL_DATA_Pin,
16
+    PLL_EN_1_8G_DL_GPIO_Port,    
17
+    PLL_EN_1_8G_DL_Pin,
18
+};
19
+PLL_Setting_st Pll_1_8GHz_UL = {
20
+    PLL_CLK_GPIO_Port,
21
+    PLL_CLK_Pin,
22
+    PLL_DATA_GPIO_Port,
23
+    PLL_DATA_Pin,
24
+    PLL_EN_1_8G_UL_GPIO_Port,    
25
+    PLL_EN_1_8G_UL_Pin,
26
+};
27
+PLL_Setting_st Pll_2_1GHz_DL = {
28
+    PLL_CLK_GPIO_Port,
29
+    PLL_CLK_Pin,
30
+    PLL_DATA_GPIO_Port,
31
+    PLL_DATA_Pin,
32
+    PLL_EN_2_1G_DL_GPIO_Port,    
33
+    PLL_EN_2_1G_DL_Pin,
34
+};
35
+PLL_Setting_st Pll_2_1GHz_UL = {
36
+    PLL_CLK_GPIO_Port,
37
+    PLL_CLK_Pin,
38
+    PLL_DATA_GPIO_Port,
39
+    PLL_DATA_Pin,
40
+    PLL_EN_2_1G_UL_GPIO_Port,    
41
+    PLL_EN_2_1G_UL_Pin,
42
+};
43
+/* * * * * * * * NOT YET * * * * * * * */
44
+PLL_Setting_st Pll_3_5GHz_DL = {
45
+    ATT_CLK_3_5G_GPIO_Port,
46
+    ATT_EN_3_5G_Pin,
47
+    PLL_DATA_GPIO_Port,
48
+    PLL_DATA_Pin,
49
+    PLL_EN_2_1G_DL_GPIO_Port,    
50
+    PLL_EN_2_1G_DL_Pin,
51
+};
52
+PLL_Setting_st Pll_3_5GHz_UL = {
53
+    PLL_CLK_GPIO_Port,
54
+    PLL_CLK_Pin,
55
+    PLL_DATA_GPIO_Port,
56
+    PLL_DATA_Pin,
57
+    PLL_EN_2_1G_UL_GPIO_Port,    
58
+    PLL_EN_2_1G_UL_Pin,
59
+};
60
+/* * * * * * * * ATTEN * * * * * * * */    
61
+ATTEN_Setting_st Atten_1_8Ghz_DL1 ={
62
+    ATT_CLK_GPIO_Port,
63
+    ATT_CLK_Pin,
64
+    ATT_DATA_GPIO_Port,
65
+    ATT_DATA_Pin,
66
+    ATT_EN_1_8G_DL1_GPIO_Port,    
67
+    ATT_EN_1_8G_DL1_Pin,
68
+    PATH_EN_1_8G_DL_GPIO_Port,
69
+    PATH_EN_1_8G_DL_Pin,
70
+};
71
+
72
+ATTEN_Setting_st Atten_1_8Ghz_DL2 ={
73
+    ATT_CLK_GPIO_Port,
74
+    ATT_CLK_Pin,
75
+    ATT_DATA_GPIO_Port,
76
+    ATT_DATA_Pin,
77
+    ATT_EN_1_8G_DL2_GPIO_Port,    
78
+    ATT_EN_1_8G_DL2_Pin,
79
+    PATH_EN_1_8G_DL_GPIO_Port,
80
+    PATH_EN_1_8G_DL_Pin,    
81
+};
82
+ATTEN_Setting_st Atten_1_8Ghz_UL1 ={
83
+    ATT_CLK_GPIO_Port,
84
+    ATT_CLK_Pin,
85
+    ATT_DATA_GPIO_Port,
86
+    ATT_DATA_Pin,
87
+    ATT_EN_1_8G_UL1_GPIO_Port,    
88
+    ATT_EN_1_8G_UL1_Pin,
89
+    PATH_EN_1_8G_UL_GPIO_Port,
90
+    PATH_EN_1_8G_UL_Pin,      
91
+};
92
+ATTEN_Setting_st Atten_1_8Ghz_UL2 ={
93
+    ATT_CLK_GPIO_Port,
94
+    ATT_CLK_Pin,
95
+    ATT_DATA_GPIO_Port,
96
+    ATT_DATA_Pin,
97
+    ATT_EN_1_8G_UL2_GPIO_Port,    
98
+    ATT_EN_1_8G_UL2_Pin,
99
+    PATH_EN_1_8G_UL_GPIO_Port,
100
+    PATH_EN_1_8G_UL_Pin,    
101
+};
102
+ATTEN_Setting_st Atten_1_8Ghz_UL3 ={
103
+    ATT_CLK_GPIO_Port,
104
+    ATT_CLK_Pin,
105
+    ATT_DATA_GPIO_Port,
106
+    ATT_DATA_Pin,
107
+    ATT_EN_1_8G_UL3_GPIO_Port,    
108
+    ATT_EN_1_8G_UL3_Pin,
109
+    PATH_EN_1_8G_UL_GPIO_Port,
110
+    PATH_EN_1_8G_UL_Pin,    
111
+};
112
+ATTEN_Setting_st Atten_1_8Ghz_UL4 ={
113
+    ATT_CLK_GPIO_Port,
114
+    ATT_CLK_Pin,
115
+    ATT_DATA_GPIO_Port,
116
+    ATT_DATA_Pin,
117
+    ATT_EN_1_8G_UL4_GPIO_Port,    
118
+    ATT_EN_1_8G_UL4_Pin,
119
+    PATH_EN_1_8G_UL_GPIO_Port,
120
+    PATH_EN_1_8G_UL_Pin,    
121
+};
122
+ATTEN_Setting_st Atten_2_1Ghz_DL1 ={
123
+    ATT_CLK_GPIO_Port,
124
+    ATT_CLK_Pin,
125
+    ATT_DATA_GPIO_Port,
126
+    ATT_DATA_Pin,
127
+    ATT_EN_2_1G_DL1_GPIO_Port,    
128
+    ATT_EN_2_1G_DL1_Pin,
129
+    PATH_EN_2_1G_DL_GPIO_Port,
130
+    PATH_EN_2_1G_DL_Pin,    
131
+};
132
+ATTEN_Setting_st Atten_2_1Ghz_DL2 ={
133
+    ATT_CLK_GPIO_Port,
134
+    ATT_CLK_Pin,
135
+    ATT_DATA_GPIO_Port,
136
+    ATT_DATA_Pin,
137
+    ATT_EN_2_1G_DL2_GPIO_Port,    
138
+    ATT_EN_2_1G_DL2_Pin,
139
+    PATH_EN_2_1G_DL_GPIO_Port,
140
+    PATH_EN_2_1G_DL_Pin,    
141
+};
142
+
143
+ATTEN_Setting_st Atten_2_1Ghz_UL1 ={
144
+    ATT_CLK_GPIO_Port,
145
+    ATT_CLK_Pin,
146
+    ATT_DATA_GPIO_Port,
147
+    ATT_DATA_Pin,
148
+    ATT_EN_2_1G_UL1_GPIO_Port,    
149
+    ATT_EN_2_1G_UL1_Pin,
150
+    PATH_EN_2_1G_UL_GPIO_Port,
151
+    PATH_EN_2_1G_UL_Pin,    
152
+};
153
+ATTEN_Setting_st Atten_2_1Ghz_UL2 ={
154
+    ATT_CLK_GPIO_Port,
155
+    ATT_CLK_Pin,
156
+    ATT_DATA_GPIO_Port,
157
+    ATT_DATA_Pin,
158
+    ATT_EN_2_1G_UL2_GPIO_Port,    
159
+    ATT_EN_2_1G_UL2_Pin,
160
+    PATH_EN_2_1G_UL_GPIO_Port,
161
+    PATH_EN_2_1G_UL_Pin,    
162
+};
163
+ATTEN_Setting_st Atten_2_1Ghz_UL3 ={
164
+    ATT_CLK_GPIO_Port,
165
+    ATT_CLK_Pin,
166
+    ATT_DATA_GPIO_Port,
167
+    ATT_DATA_Pin,
168
+    ATT_EN_2_1G_UL3_GPIO_Port,    
169
+    ATT_EN_2_1G_UL3_Pin,
170
+    PATH_EN_2_1G_UL_GPIO_Port,
171
+    PATH_EN_2_1G_UL_Pin,    
172
+};
173
+ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
174
+    ATT_CLK_GPIO_Port,
175
+    ATT_CLK_Pin,
176
+    ATT_DATA_GPIO_Port,
177
+    ATT_DATA_Pin,
178
+    ATT_EN_2_1G_UL4_GPIO_Port,    
179
+    ATT_EN_2_1G_UL4_Pin,
180
+    PATH_EN_2_1G_UL_GPIO_Port,
181
+    PATH_EN_2_1G_UL_Pin,    
182
+};
183
+
184
+
185
+bool RF_Data_Check(uint8_t* data_buf){
186
+    bool ret = false;
187
+    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
188
+    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
189
+        ret= true;
190
+    }
191
+    if(crcret == true){/*CRC CHECK*/
192
+        ret = true;
193
+    }else{
194
+        ret = false;
195
+#ifdef DEBUG_PRINT
196
+        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
197
+#endif /* DEBUG_PRINT */
198
+    }
199
+#ifdef DEBUG_PRINT
200
+    printf("CRC Result : \"%d\"   \r\n",ret);
201
+#endif /* DEBUG_PRINT */
202
+
203
+    return ret;
204
+
205
+}
206
+
207
+PLL_Setting_st Pll_3_5_H = {
208
+     PLL_CLK_3_5G_GPIO_Port,
209
+     PLL_CLK_3_5G_Pin,
210
+     PLL_DATA_3_5G_GPIO_Port,
211
+     PLL_DATA_3_5G_Pin,
212
+   PLL_EN_3_5G_H_GPIO_Port,    
213
+   PLL_EN_3_5G_H_Pin,
214
+ };
215
+ PLL_Setting_st Pll_3_5_L = {
216
+     PLL_CLK_3_5G_GPIO_Port,
217
+     PLL_CLK_3_5G_Pin,
218
+     PLL_DATA_3_5G_GPIO_Port,
219
+     PLL_DATA_3_5G_Pin,
220
+       PLL_EN_3_5G_L_GPIO_Port,    
221
+       PLL_EN_3_5G_L_Pin,
222
+ };
223
+void RF_Status_Get(void){
224
+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
225
+    uint8_t data[10];
226
+    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
227
+    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
228
+    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 3;
229
+    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
230
+    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
231
+    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
232
+//    printf("\r\nYJ : %x",ADCvalue[0]);
233
+//    printf("\r\n");
234
+
235
+}
236
+
237
+void RF_Operate(uint8_t* data_buf){
238
+    uint16_t temp_val = 0;
239
+    uint8_t  ADC_Modify = 0;
240
+    ADF4153_R_N_Reg_st temp_reg;
241
+
242
+    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
243
+        
244
+#ifdef DEBUG_PRINT
245
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
246
+#endif /* DEBUG_PRINT */
247
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
248
+        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
249
+    }
250
+    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
251
+#ifdef DEBUG_PRINT
252
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
253
+#endif /* DEBUG_PRINT */
254
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
255
+        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
256
+    }
257
+    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
258
+#ifdef DEBUG_PRINT
259
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
260
+#endif /* DEBUG_PRINT */
261
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
262
+        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
263
+    }
264
+    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
265
+#ifdef DEBUG_PRINT
266
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
267
+#endif /* DEBUG_PRINT */
268
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
269
+        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
270
+
271
+    }
272
+    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
273
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
274
+        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
275
+
276
+    }
277
+    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
278
+#ifdef DEBUG_PRINT
279
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
280
+#endif /* DEBUG_PRINT */
281
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
282
+        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
283
+
284
+    }
285
+    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
286
+#ifdef DEBUG_PRINT
287
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
288
+#endif /* DEBUG_PRINT */
289
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
290
+        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
291
+
292
+    }
293
+    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
294
+#ifdef DEBUG_PRINT
295
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
296
+#endif /* DEBUG_PRINT */
297
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
298
+        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
299
+
300
+    }
301
+    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
302
+#ifdef DEBUG_PRINT
303
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
304
+#endif /* DEBUG_PRINT */
305
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
306
+        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
307
+
308
+    }
309
+    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
310
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
311
+        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
312
+
313
+    }
314
+    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
315
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
316
+        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
317
+
318
+    }
319
+    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
320
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
321
+        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
322
+    }
323
+    if(   (Prev_data[INDEX_ATT_3_5G_DL] != data_buf[INDEX_ATT_3_5G_DL])
324
+        ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL])
325
+        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
326
+        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
327
+        ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3])
328
+    ){
329
+        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_DL]   = data_buf[INDEX_ATT_3_5G_DL];
330
+        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL]   = data_buf[INDEX_ATT_3_5G_UL];
331
+        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1];
332
+        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2];
333
+        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3];
334
+        printf("YJ : data0  : %x \r\n",ALL_ATT_3_5G.data0);
335
+        printf("YJ : data1  : %x \r\n",ALL_ATT_3_5G.data1);
336
+        printf("YJ : data2  : %x \r\n",ALL_ATT_3_5G.data2);
337
+        printf("YJ : data3  : %x \r\n",ALL_ATT_3_5G.data3);
338
+        printf("YJ : data4  : %x \r\n",ALL_ATT_3_5G.data4);
339
+        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
340
+    }
341
+
342
+    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
343
+        && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
344
+    ){
345
+        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
346
+//        printf("INDEX_PLL_1_8G_DL_H : %x \r\n",temp_val);
347
+        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
348
+    }
349
+    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
350
+        && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
351
+        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
352
+        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
353
+    }
354
+    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
355
+        && (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
356
+        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
357
+#ifdef DEBUG_PRINT
358
+        printf("data_buf[INDEX_PLL_2_1G_DL_H]  %x \r\ndata_buf[INDEX_PLL_2_1G_DL_L]  temp_val : %x\r\n ",data_buf[INDEX_PLL_2_1G_DL_H],data_buf[INDEX_PLL_2_1G_DL_L],temp_val);
359
+#endif /* DEBUG_PRINT */
360
+        ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
361
+    }
362
+    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
363
+        && (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
364
+        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
365
+        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
366
+
367
+    }
368
+    if((Prev_data[INDEX_PLL_3_5G_DL_H] != data_buf[INDEX_PLL_3_5G_DL_H])
369
+        && (Prev_data[INDEX_PLL_3_5G_DL_L] != data_buf[INDEX_PLL_3_5G_DL_L])){
370
+
371
+        (Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H]);
372
+        (Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L]);
373
+        temp_val = (data_buf[INDEX_PLL_3_5G_DL_H] << 8) | (data_buf[INDEX_PLL_3_5G_DL_L]);
374
+        printf("PLL CTRL \r\n");
375
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
376
+        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
377
+    }
378
+    if((Prev_data[INDEX_PLL_3_5G_UL_H] != data_buf[INDEX_PLL_3_5G_UL_H])
379
+        && (Prev_data[INDEX_PLL_3_5G_UL_L] != data_buf[INDEX_PLL_3_5G_UL_L])){
380
+        printf("PLL CTRL \r\n");
381
+        (Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H]);
382
+        (Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L]);
383
+        temp_val = (data_buf[INDEX_PLL_3_5G_UL_H] << 8) | (data_buf[INDEX_PLL_3_5G_UL_L]);
384
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
385
+        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
386
+
387
+    }
388
+    if(Prev_data[INDEX_PLL_LD_6_BIT] != data_buf[INDEX_PLL_LD_6_BIT]){
389
+
390
+    }
391
+#if 0 // PYJ.2019.07.28_BEGIN -- 
392
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_H] != data_buf[INDEX_DET_1_8G_DL_IN_H]){
393
+
394
+    }
395
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_L] != data_buf[INDEX_DET_1_8G_DL_IN_L]){
396
+
397
+    }
398
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_H] != data_buf[INDEX_DET_1_8G_DL_OUT_H]){
399
+
400
+    }
401
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_L] != data_buf[INDEX_DET_1_8G_DL_OUT_L]){
402
+
403
+    }
404
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_H] != data_buf[INDEX_DET_1_8G_UL_IN_H]){
405
+
406
+    }
407
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_L] != data_buf[INDEX_DET_1_8G_UL_IN_L]){
408
+
409
+    }
410
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_H] != data_buf[INDEX_DET_1_8G_UL_OUT_H]){
411
+
412
+    }
413
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_L] != data_buf[INDEX_DET_1_8G_UL_OUT_L]){
414
+
415
+    }
416
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_H] != data_buf[INDEX_DET_2_1G_DL_IN_H]){
417
+
418
+    }
419
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_L] != data_buf[INDEX_DET_2_1G_DL_IN_L]){
420
+
421
+    }
422
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_H] != data_buf[INDEX_DET_2_1G_DL_OUT_H]){
423
+
424
+    }
425
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_L] != data_buf[INDEX_DET_2_1G_DL_OUT_L]){
426
+
427
+    }
428
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_H] != data_buf[INDEX_DET_2_1G_UL_IN_H]){
429
+
430
+    }
431
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_L] != data_buf[INDEX_DET_2_1G_UL_IN_L]){
432
+
433
+    }
434
+
435
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_H] != data_buf[INDEX_DET_2_1G_UL_OUT_H]){
436
+
437
+    }
438
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_L] != data_buf[INDEX_DET_2_1G_UL_OUT_L]){
439
+
440
+    }
441
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_H] != data_buf[INDEX_DET_3_5G_DL_IN_H]){
442
+
443
+    }
444
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_L] != data_buf[INDEX_DET_3_5G_DL_IN_L]){
445
+
446
+    }
447
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_L] != data_buf[INDEX_DET_3_5G_DL_OUT_L]){
448
+
449
+    }
450
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_H] != data_buf[INDEX_DET_3_5G_DL_OUT_H]){
451
+
452
+    }
453
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_H] != data_buf[INDEX_DET_3_5G_UL_IN_H]){
454
+
455
+    }
456
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_L] != data_buf[INDEX_DET_3_5G_UL_IN_L]){
457
+
458
+    }
459
+
460
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_H] != data_buf[INDEX_DET_3_5G_UL_OUT_H]){
461
+
462
+    }
463
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_L] != data_buf[INDEX_DET_3_5G_UL_OUT_L]){
464
+
465
+    }
466
+    if(Prev_data[INDEX_RFU_TEMP_H] != data_buf[INDEX_RFU_TEMP_H]){
467
+
468
+    }
469
+    if(Prev_data[INDEX_RFU_TEMP_L] != data_buf[INDEX_RFU_TEMP_L]){
470
+
471
+    }
472
+    if(Prev_data[INDEX__28V_DET_H] != data_buf[INDEX__28V_DET_H]){
473
+
474
+    }
475
+    if(Prev_data[INDEX__28V_DET_L] != data_buf[INDEX__28V_DET_L]){
476
+
477
+    }
478
+#endif // PYJ.2019.07.28_END -- 
479
+    if(Prev_data[INDEX_ALARM_AC] != data_buf[INDEX_ALARM_AC]){
480
+
481
+    }
482
+    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){
483
+
484
+    }
485
+    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
486
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
487
+        Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL];
488
+    }
489
+    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
490
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]);
491
+        Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL];
492
+
493
+    }
494
+
495
+    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
496
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
497
+        Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
498
+
499
+    }
500
+    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
501
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
502
+        Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL];
503
+
504
+    }
505
+    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
506
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]);
507
+        Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L];
508
+
509
+    }
510
+    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
511
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
512
+        Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
513
+
514
+    }
515
+    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
516
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
517
+        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
518
+
519
+    }
520
+    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
521
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
522
+        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
523
+
524
+    }
525
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
526
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);
527
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
528
+        HAL_Delay(10);
529
+        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
530
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
531
+            printf("PLL CTRL START !! \r\n");
532
+//            ADF4153_Init();
533
+            temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
534
+            ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
535
+        }
536
+    }
537
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
538
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]);
539
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
540
+        HAL_Delay(10);
541
+        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
542
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
543
+            printf("PLL CTRL START !! \r\n");
544
+            temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);            
545
+            ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
546
+        }
547
+    }
548
+
549
+    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
550
+        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
551
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]);
552
+    }
553
+    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
554
+        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
555
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]);
556
+    }
557
+    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
558
+        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
559
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]);
560
+    }
561
+    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
562
+        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
563
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
564
+    }
565
+
566
+
567
+    if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H])
568
+        ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){
569
+        ADC_Modify = 1;
570
+
571
+        Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H];
572
+        Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L];
573
+    }
574
+    if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H])
575
+        ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){
576
+        ADC_Modify = 1;
577
+        
578
+        Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H];
579
+        Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L];        
580
+    }    
581
+    if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
582
+        ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
583
+        ADC_Modify = 1;
584
+
585
+        Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
586
+        Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
587
+    }
588
+    if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H])
589
+        ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){
590
+        ADC_Modify = 1;
591
+        Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H];
592
+        Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L];
593
+    }
594
+    if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H])
595
+        ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){
596
+        ADC_Modify = 1;
597
+
598
+        Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H];
599
+        Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L];        
600
+    }
601
+    if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H])
602
+        ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){
603
+        ADC_Modify = 1;
604
+        Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H];
605
+        Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L];        
606
+    }
607
+    if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H])
608
+        ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){
609
+        ADC_Modify = 1;
610
+        Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H];
611
+        Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L];        
612
+    }    
613
+    if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H])
614
+        ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){
615
+        ADC_Modify = 1;
616
+        Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H];
617
+        Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L];        
618
+    }
619
+    if(ADC_Modify){
620
+//        SubmitDAC(0xF000);
621
+//        HAL_Delay(1);
622
+//        SubmitDAC(0x800C);
623
+//        SubmitDAC(0xA000);
624
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]) );    
625
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L]));    
626
+//        SubmitDAC(0x2FFF );
627
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L]));
628
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L]));
629
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L]));    
630
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L]));
631
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
632
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
633
+    }
634
+}
635
+
636
+
637
+bool RF_Ctrl_Main(uint8_t* data_buf){
638
+    bool ret = false;
639
+    Bluecell_Prot_t type = data_buf[Type];
640
+    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
641
+    if(ret == false)
642
+    return ret;
643
+
644
+    
645
+    switch(type){
646
+    case TYPE_BLUECELL_RESET:
647
+#ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN -- 
648
+        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
649
+            printf("%02x ",data_buf[i]);
650
+        printf("Reset Start \r\n");
651
+#endif // PYJ.2019.07.27_END -- 
652
+        NVIC_SystemReset();
653
+        break;
654
+    case TYPE_BLUECELL_SET:
655
+    printf("TYPE_BLUECELL_SET : ");
656
+    for(uint8_t i =0 ; i < data_buf[Length] - 1; i++)
657
+        printf("%02x ",data_buf[4 + i]);
658
+        RF_Operate(&data_buf[Header]);
659
+        
660
+
661
+//        ADF4153_Freq_Calc(3465500000,40000000,2,5000);
662
+//        ADF4153_Freq_Calc(3993450000,40000000,2,5000);
663
+//        halSynSetFreq(1995000000);
664
+//        halSynSetFreq(1600000000);
665
+//        halSynSetFreq(1455000000);        
666
+        break;
667
+    case TYPE_BLUECELL_GET:
668
+        printf("\r\nTYPE_BLUECELL_GET : \r\n");
669
+        RF_Status_Get();
670
+        break;
671
+ 
672
+        default:
673
+#ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN --         
674
+            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
675
+#endif
676
+            break;
677
+    }
678
+    return ret;
679
+}

BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_sym


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xf


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xm


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.sip_xr


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.siproj


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Inc_flash.h.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_AD5318.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_CRC16.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_PE43711.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_flash.c.sisc


BIN
insight/STM32F103_ATTEN_PLL_Zig.si4project/cache/parse/.._.._Src_zig_operate.c.sisc