LTE 값 가변 가능하도록 수정

Debug/STM32F103_ATTEN_PLL_Zig.map

@@ -1303,7 +1303,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x08004000                g_pfnVectors
                 0x080041e4                . = ALIGN (0x4)
 
-.text           0x080041e8     0x7d4c
+.text           0x080041e8     0x7d6c
                 0x080041e8                . = ALIGN (0x4)
  *(.text)
  .text          0x080041e8       0x40 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
@@ -1798,361 +1798,361 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x08008af0       0x38 Src\zig_operate.o
                 0x08008af0                RF_Status_Ack
  .text.RF_Operate
-                0x08008b28      0x9d4 Src\zig_operate.o
+                0x08008b28      0x9f4 Src\zig_operate.o
                 0x08008b28                RF_Operate
  .text.RF_Ctrl_Main
-                0x080094fc       0x9c Src\zig_operate.o
-                0x080094fc                RF_Ctrl_Main
+                0x0800951c       0x9c Src\zig_operate.o
+                0x0800951c                RF_Ctrl_Main
  .text.Reset_Handler
-                0x08009598       0x48 startup\startup_stm32f103xe.o
-                0x08009598                Reset_Handler
+                0x080095b8       0x48 startup\startup_stm32f103xe.o
+                0x080095b8                Reset_Handler
  .text.Default_Handler
-                0x080095e0        0x2 startup\startup_stm32f103xe.o
-                0x080095e0                RTC_Alarm_IRQHandler
-                0x080095e0                EXTI2_IRQHandler
-                0x080095e0                TIM8_TRG_COM_IRQHandler
-                0x080095e0                TIM8_CC_IRQHandler
-                0x080095e0                TIM1_CC_IRQHandler
-                0x080095e0                PVD_IRQHandler
-                0x080095e0                SDIO_IRQHandler
-                0x080095e0                EXTI3_IRQHandler
-                0x080095e0                EXTI0_IRQHandler
-                0x080095e0                I2C2_EV_IRQHandler
-                0x080095e0                ADC1_2_IRQHandler
-                0x080095e0                SPI1_IRQHandler
-                0x080095e0                TAMPER_IRQHandler
-                0x080095e0                TIM8_UP_IRQHandler
-                0x080095e0                DMA2_Channel2_IRQHandler
-                0x080095e0                USART3_IRQHandler
-                0x080095e0                RTC_IRQHandler
-                0x080095e0                DMA1_Channel7_IRQHandler
-                0x080095e0                CAN1_RX1_IRQHandler
-                0x080095e0                UART5_IRQHandler
-                0x080095e0                ADC3_IRQHandler
-                0x080095e0                TIM4_IRQHandler
-                0x080095e0                DMA2_Channel1_IRQHandler
-                0x080095e0                I2C1_EV_IRQHandler
-                0x080095e0                DMA1_Channel6_IRQHandler
-                0x080095e0                UART4_IRQHandler
-                0x080095e0                TIM3_IRQHandler
-                0x080095e0                RCC_IRQHandler
-                0x080095e0                TIM1_TRG_COM_IRQHandler
-                0x080095e0                Default_Handler
-                0x080095e0                EXTI15_10_IRQHandler
-                0x080095e0                TIM7_IRQHandler
-                0x080095e0                TIM5_IRQHandler
-                0x080095e0                EXTI9_5_IRQHandler
-                0x080095e0                SPI2_IRQHandler
-                0x080095e0                EXTI4_IRQHandler
-                0x080095e0                USB_LP_CAN1_RX0_IRQHandler
-                0x080095e0                USB_HP_CAN1_TX_IRQHandler
-                0x080095e0                DMA1_Channel3_IRQHandler
-                0x080095e0                FSMC_IRQHandler
-                0x080095e0                TIM1_UP_IRQHandler
-                0x080095e0                WWDG_IRQHandler
-                0x080095e0                TIM2_IRQHandler
-                0x080095e0                TIM1_BRK_IRQHandler
-                0x080095e0                EXTI1_IRQHandler
-                0x080095e0                DMA2_Channel4_5_IRQHandler
-                0x080095e0                USART2_IRQHandler
-                0x080095e0                I2C2_ER_IRQHandler
-                0x080095e0                DMA1_Channel2_IRQHandler
-                0x080095e0                TIM8_BRK_IRQHandler
-                0x080095e0                CAN1_SCE_IRQHandler
-                0x080095e0                FLASH_IRQHandler
-                0x080095e0                SPI3_IRQHandler
-                0x080095e0                I2C1_ER_IRQHandler
-                0x080095e0                USBWakeUp_IRQHandler
-                0x080095e0                DMA2_Channel3_IRQHandler
- *fill*         0x080095e2        0x2 
- .text.__errno  0x080095e4        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-errno.o)
-                0x080095e4                __errno
+                0x08009600        0x2 startup\startup_stm32f103xe.o
+                0x08009600                RTC_Alarm_IRQHandler
+                0x08009600                EXTI2_IRQHandler
+                0x08009600                TIM8_TRG_COM_IRQHandler
+                0x08009600                TIM8_CC_IRQHandler
+                0x08009600                TIM1_CC_IRQHandler
+                0x08009600                PVD_IRQHandler
+                0x08009600                SDIO_IRQHandler
+                0x08009600                EXTI3_IRQHandler
+                0x08009600                EXTI0_IRQHandler
+                0x08009600                I2C2_EV_IRQHandler
+                0x08009600                ADC1_2_IRQHandler
+                0x08009600                SPI1_IRQHandler
+                0x08009600                TAMPER_IRQHandler
+                0x08009600                TIM8_UP_IRQHandler
+                0x08009600                DMA2_Channel2_IRQHandler
+                0x08009600                USART3_IRQHandler
+                0x08009600                RTC_IRQHandler
+                0x08009600                DMA1_Channel7_IRQHandler
+                0x08009600                CAN1_RX1_IRQHandler
+                0x08009600                UART5_IRQHandler
+                0x08009600                ADC3_IRQHandler
+                0x08009600                TIM4_IRQHandler
+                0x08009600                DMA2_Channel1_IRQHandler
+                0x08009600                I2C1_EV_IRQHandler
+                0x08009600                DMA1_Channel6_IRQHandler
+                0x08009600                UART4_IRQHandler
+                0x08009600                TIM3_IRQHandler
+                0x08009600                RCC_IRQHandler
+                0x08009600                TIM1_TRG_COM_IRQHandler
+                0x08009600                Default_Handler
+                0x08009600                EXTI15_10_IRQHandler
+                0x08009600                TIM7_IRQHandler
+                0x08009600                TIM5_IRQHandler
+                0x08009600                EXTI9_5_IRQHandler
+                0x08009600                SPI2_IRQHandler
+                0x08009600                EXTI4_IRQHandler
+                0x08009600                USB_LP_CAN1_RX0_IRQHandler
+                0x08009600                USB_HP_CAN1_TX_IRQHandler
+                0x08009600                DMA1_Channel3_IRQHandler
+                0x08009600                FSMC_IRQHandler
+                0x08009600                TIM1_UP_IRQHandler
+                0x08009600                WWDG_IRQHandler
+                0x08009600                TIM2_IRQHandler
+                0x08009600                TIM1_BRK_IRQHandler
+                0x08009600                EXTI1_IRQHandler
+                0x08009600                DMA2_Channel4_5_IRQHandler
+                0x08009600                USART2_IRQHandler
+                0x08009600                I2C2_ER_IRQHandler
+                0x08009600                DMA1_Channel2_IRQHandler
+                0x08009600                TIM8_BRK_IRQHandler
+                0x08009600                CAN1_SCE_IRQHandler
+                0x08009600                FLASH_IRQHandler
+                0x08009600                SPI3_IRQHandler
+                0x08009600                I2C1_ER_IRQHandler
+                0x08009600                USBWakeUp_IRQHandler
+                0x08009600                DMA2_Channel3_IRQHandler
+ *fill*         0x08009602        0x2 
+ .text.__errno  0x08009604        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-errno.o)
+                0x08009604                __errno
  .text.__libc_init_array
-                0x080095f0       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-init.o)
-                0x080095f0                __libc_init_array
- .text.memcpy   0x08009638       0x16 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memcpy-stub.o)
-                0x08009638                memcpy
- .text.memset   0x0800964e       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memset.o)
-                0x0800964e                memset
- .text.__cvt    0x0800965e       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x0800965e                __cvt
+                0x08009610       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-init.o)
+                0x08009610                __libc_init_array
+ .text.memcpy   0x08009658       0x16 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memcpy-stub.o)
+                0x08009658                memcpy
+ .text.memset   0x0800966e       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memset.o)
+                0x0800966e                memset
+ .text.__cvt    0x0800967e       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x0800967e                __cvt
  .text.__exponent
-                0x08009716       0x6a c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x08009716                __exponent
+                0x08009736       0x6a c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x08009736                __exponent
  .text._printf_float
-                0x08009780      0x470 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x08009780                _printf_float
+                0x080097a0      0x470 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x080097a0                _printf_float
  .text._printf_common
-                0x08009bf0       0xee c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x08009bf0                _printf_common
- *fill*         0x08009cde        0x2 
+                0x08009c10       0xee c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x08009c10                _printf_common
+ *fill*         0x08009cfe        0x2 
  .text._printf_i
-                0x08009ce0      0x240 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x08009ce0                _printf_i
- .text.printf   0x08009f20       0x30 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-printf.o)
-                0x08009f20                iprintf
-                0x08009f20                printf
- .text._puts_r  0x08009f50       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
-                0x08009f50                _puts_r
- .text.puts     0x0800a008       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
-                0x0800a008                puts
- .text.setbuf   0x0800a018       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setbuf.o)
-                0x0800a018                setbuf
- .text.setvbuf  0x0800a028      0x15c c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setvbuf.o)
-                0x0800a028                setvbuf
+                0x08009d00      0x240 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x08009d00                _printf_i
+ .text.printf   0x08009f40       0x30 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-printf.o)
+                0x08009f40                iprintf
+                0x08009f40                printf
+ .text._puts_r  0x08009f70       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
+                0x08009f70                _puts_r
+ .text.puts     0x0800a028       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
+                0x0800a028                puts
+ .text.setbuf   0x0800a038       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setbuf.o)
+                0x0800a038                setbuf
+ .text.setvbuf  0x0800a048      0x15c c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setvbuf.o)
+                0x0800a048                setvbuf
  .text.__swbuf_r
-                0x0800a184       0xa4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wbuf.o)
-                0x0800a184                __swbuf_r
+                0x0800a1a4       0xa4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wbuf.o)
+                0x0800a1a4                __swbuf_r
  .text.__swsetup_r
-                0x0800a228       0xdc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wsetup.o)
-                0x0800a228                __swsetup_r
- .text.quorem   0x0800a304      0x118 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
- *fill*         0x0800a41c        0x4 
- .text._dtoa_r  0x0800a420      0xba8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
-                0x0800a420                _dtoa_r
+                0x0800a248       0xdc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wsetup.o)
+                0x0800a248                __swsetup_r
+ .text.quorem   0x0800a324      0x118 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
+ *fill*         0x0800a43c        0x4 
+ .text._dtoa_r  0x0800a440      0xba8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
+                0x0800a440                _dtoa_r
  .text.__sflush_r
-                0x0800afc8      0x110 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
-                0x0800afc8                __sflush_r
+                0x0800afe8      0x110 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
+                0x0800afe8                __sflush_r
  .text._fflush_r
-                0x0800b0d8       0x54 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
-                0x0800b0d8                _fflush_r
+                0x0800b0f8       0x54 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
+                0x0800b0f8                _fflush_r
  .text._cleanup_r
-                0x0800b12c        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-findfp.o)
-                0x0800b12c                _cleanup_r
+                0x0800b14c        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-findfp.o)
+                0x0800b14c                _cleanup_r
  .text.std.isra.0
-                0x0800b138       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-findfp.o)
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+                0x0800c290                __exidx_end = .
 
-.rel.dyn        0x0800c270        0x0
- .rel.iplt      0x0800c270        0x0 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
+.rel.dyn        0x0800c290        0x0
+ .rel.iplt      0x0800c290        0x0 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
 
-.preinit_array  0x0800c270        0x0
-                0x0800c270                PROVIDE (__preinit_array_start, .)
+.preinit_array  0x0800c290        0x0
+                0x0800c290                PROVIDE (__preinit_array_start, .)
  *(.preinit_array*)
-                0x0800c270                PROVIDE (__preinit_array_end, .)
+                0x0800c290                PROVIDE (__preinit_array_end, .)
 
-.init_array     0x0800c270        0x4
-                0x0800c270                PROVIDE (__init_array_start, .)
+.init_array     0x0800c290        0x4
+                0x0800c290                PROVIDE (__init_array_start, .)
  *(SORT(.init_array.*))
  *(.init_array*)
- .init_array    0x0800c270        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
-                0x0800c274                PROVIDE (__init_array_end, .)
+ .init_array    0x0800c290        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
+                0x0800c294                PROVIDE (__init_array_end, .)
 
-.fini_array     0x0800c274        0x4
+.fini_array     0x0800c294        0x4
                 [!provide]                PROVIDE (__fini_array_start, .)
  *(SORT(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x0800c274        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
+ .fini_array    0x0800c294        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
                 [!provide]                PROVIDE (__fini_array_end, .)
-                0x0800c278                _sidata = LOADADDR (.data)
+                0x0800c298                _sidata = LOADADDR (.data)
 
-.data           0x20000000      0x41c load address 0x0800c278
+.data           0x20000000      0x41c load address 0x0800c298
                 0x20000000                . = ALIGN (0x4)
                 0x20000000                _sdata = .
  *(.data)
@@ -2250,11 +2250,11 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x2000041c                . = ALIGN (0x4)
                 0x2000041c                _edata = .
 
-.igot.plt       0x2000041c        0x0 load address 0x0800c694
+.igot.plt       0x2000041c        0x0 load address 0x0800c6b4
  .igot.plt      0x2000041c        0x0 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
                 0x2000041c                . = ALIGN (0x4)
 
-.bss            0x20000420     0x13c4 load address 0x0800c694
+.bss            0x20000420     0x13c4 load address 0x0800c6b4
                 0x20000420                _sbss = .
                 0x20000420                __bss_start__ = _sbss
  *(.bss)
@@ -2320,7 +2320,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x200017e4                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x200017e4      0x600 load address 0x0800c694
+                0x200017e4      0x600 load address 0x0800c6b4
                 0x200017e4                . = ALIGN (0x4)
                 0x200017e4                PROVIDE (end, .)
                 [!provide]                PROVIDE (_end, .)
@@ -2514,7 +2514,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x00000ec4       0x1d c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtn.o
 OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
 
-.debug_info     0x00000000    0x25572
+.debug_info     0x00000000    0x25539
  .debug_info    0x00000000     0x102e Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_info    0x0000102e     0x16a1 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_info    0x000026cf     0x138b Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2542,8 +2542,8 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_info    0x00020409      0xfe1 Src\syscalls.o
  .debug_info    0x000213ea      0xc4d Src\system_stm32f1xx.o
  .debug_info    0x00022037     0x141e Src\uart.o
- .debug_info    0x00023455     0x20ac Src\zig_operate.o
- .debug_info    0x00025501       0x71 startup\startup_stm32f103xe.o
+ .debug_info    0x00023455     0x2073 Src\zig_operate.o
+ .debug_info    0x000254c8       0x71 startup\startup_stm32f103xe.o
 
 .debug_abbrev   0x00000000     0x5055
  .debug_abbrev  0x00000000      0x315 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
@@ -2576,7 +2576,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_abbrev  0x00004cdd      0x366 Src\zig_operate.o
  .debug_abbrev  0x00005043       0x12 startup\startup_stm32f103xe.o
 
-.debug_loc      0x00000000     0x9c9c
+.debug_loc      0x00000000     0x9d1a
  .debug_loc     0x00000000      0x11b Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_loc     0x0000011b      0x87e Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_loc     0x00000999      0x769 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2603,7 +2603,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_loc     0x00009358      0x3ef Src\syscalls.o
  .debug_loc     0x00009747       0xcd Src\system_stm32f1xx.o
  .debug_loc     0x00009814      0x113 Src\uart.o
- .debug_loc     0x00009927      0x375 Src\zig_operate.o
+ .debug_loc     0x00009927      0x3f3 Src\zig_operate.o
 
 .debug_aranges  0x00000000      0xe38
  .debug_aranges
@@ -2696,7 +2696,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_ranges  0x000011b0       0x48 Src\zig_operate.o
  .debug_ranges  0x000011f8       0x20 startup\startup_stm32f103xe.o
 
-.debug_line     0x00000000     0x990e
+.debug_line     0x00000000     0x990a
  .debug_line    0x00000000      0x45f Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_line    0x0000045f      0x863 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_line    0x00000cc2      0x737 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2724,8 +2724,8 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_line    0x000088c7      0x3c0 Src\syscalls.o
  .debug_line    0x00008c87      0x2bf Src\system_stm32f1xx.o
  .debug_line    0x00008f46      0x3c6 Src\uart.o
- .debug_line    0x0000930c      0x585 Src\zig_operate.o
- .debug_line    0x00009891       0x7d startup\startup_stm32f103xe.o
+ .debug_line    0x0000930c      0x581 Src\zig_operate.o
+ .debug_line    0x0000988d       0x7d startup\startup_stm32f103xe.o
 
 .debug_str      0x00000000     0x58a5
  .debug_str     0x00000000      0xc6c Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o

Src/zig_operate.c

@@ -339,8 +339,8 @@ void RF_Operate(uint8_t* data_buf){
 //        printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]);
 //        printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]);
         temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
-//        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
-        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092);
+        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+//        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092);
         HAL_Delay(1);
         BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
         BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
@@ -353,8 +353,8 @@ void RF_Operate(uint8_t* data_buf){
         Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
         Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
 //         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
-//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
-        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092);
+         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+//        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092);
 
         HAL_Delay(1);
         BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
@@ -370,8 +370,8 @@ void RF_Operate(uint8_t* data_buf){
         Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
         Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
 //         ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
-//        ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
-      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092);
+      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092);
 
       HAL_Delay(1);
       BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
@@ -385,8 +385,8 @@ void RF_Operate(uint8_t* data_buf){
 //        printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]);
         temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
 //        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
-//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
-      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092);
+      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092);
       HAL_Delay(1);
       BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
       BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(2878).c

@@ -0,0 +1,766 @@
+/*
+ * zig_operate.c
+ *
+ *  Created on: 2019. 7. 26.
+ *      Author: parkyj
+ */
+#include "zig_operate.h"
+#include "main.h"
+#include "pll_4113.h"
+#include "ADF4153.h"
+#include "PE43711.h"
+#include "BDA4601.h"
+#include "uart.h"
+#include "CRC16.h"
+extern void AD5318_Ctrl(uint16_t ShiftTarget) ;
+extern etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum);
+extern void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
+extern bool Bluecell_Flash_Read(uint8_t* data);
+extern void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT);
+extern void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
+extern uint8_t Bluecell_Flash_Write(uint8_t* data);
+uint8_t Prev_data[INDEX_BLUE_EOF + 1];
+uint8_t Flash_Save_data[INDEX_BLUE_EOF + 1];
+
+
+/* * * * * * * #define Struct* * * * * * * */
+PLL_Setting_st Pll_1_8GHz_DL = {
+  PLL_CLK_GPIO_Port,
+  PLL_CLK_Pin,
+  PLL_DATA_GPIO_Port,
+  PLL_DATA_Pin,
+  PLL_EN_1_8G_DL_GPIO_Port,    
+  PLL_EN_1_8G_DL_Pin,
+};
+PLL_Setting_st Pll_1_8GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_UL_GPIO_Port,    
+    PLL_EN_1_8G_UL_Pin,
+};
+PLL_Setting_st Pll_2_1GHz_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st Pll_2_1GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+/* * * * * * * * NOT YET * * * * * * * */
+PLL_Setting_st Pll_3_5GHz_DL = {
+    ATT_CLK_3_5G_GPIO_Port,
+    ATT_EN_3_5G_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st Pll_3_5GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+/* * * * * * * * ATTEN * * * * * * * */    
+ATTEN_Setting_st Atten_1_8Ghz_DL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_DL1_GPIO_Port,    
+    ATT_EN_1_8G_DL1_Pin,
+    PATH_EN_1_8G_DL_GPIO_Port,
+    PATH_EN_1_8G_DL_Pin,
+};
+
+ATTEN_Setting_st Atten_1_8Ghz_DL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_DL2_GPIO_Port,    
+    ATT_EN_1_8G_DL2_Pin,
+    PATH_EN_1_8G_DL_GPIO_Port,
+    PATH_EN_1_8G_DL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL1_GPIO_Port,    
+    ATT_EN_1_8G_UL1_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,      
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL2_GPIO_Port,    
+    ATT_EN_1_8G_UL2_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL3 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL3_GPIO_Port,    
+    ATT_EN_1_8G_UL3_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL4 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL4_GPIO_Port,    
+    ATT_EN_1_8G_UL4_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_DL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_DL1_GPIO_Port,    
+    ATT_EN_2_1G_DL1_Pin,
+    PATH_EN_2_1G_DL_GPIO_Port,
+    PATH_EN_2_1G_DL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_DL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_DL2_GPIO_Port,    
+    ATT_EN_2_1G_DL2_Pin,
+    PATH_EN_2_1G_DL_GPIO_Port,
+    PATH_EN_2_1G_DL_Pin,    
+};
+
+ATTEN_Setting_st Atten_2_1Ghz_UL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL1_GPIO_Port,    
+    ATT_EN_2_1G_UL1_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL2_GPIO_Port,    
+    ATT_EN_2_1G_UL2_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL3 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL3_GPIO_Port,    
+    ATT_EN_2_1G_UL3_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL4_GPIO_Port,    
+    ATT_EN_2_1G_UL4_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+
+
+bool RF_Data_Check(uint8_t* data_buf){
+    bool ret = false;
+    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
+    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
+        ret= true;
+    }
+    if(crcret == true){/*CRC CHECK*/
+        ret = true;
+    }else{
+        ret = false;
+//        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
+    }
+//    printf("CRC Result : \"%d\"   \r\n",ret);
+    return ret;
+
+}
+
+PLL_Setting_st Pll_3_5_H = {
+     PLL_CLK_3_5G_GPIO_Port,
+     PLL_CLK_3_5G_Pin,
+     PLL_DATA_3_5G_GPIO_Port,
+     PLL_DATA_3_5G_Pin,
+   PLL_EN_3_5G_H_GPIO_Port,    
+   PLL_EN_3_5G_H_Pin,
+ };
+ PLL_Setting_st Pll_3_5_L = {
+     PLL_CLK_3_5G_GPIO_Port,
+     PLL_CLK_3_5G_Pin,
+     PLL_DATA_3_5G_GPIO_Port,
+     PLL_DATA_3_5G_Pin,
+       PLL_EN_3_5G_L_GPIO_Port,    
+       PLL_EN_3_5G_L_Pin,
+ };
+void RF_Status_Get(void){
+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
+    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
+    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
+    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
+    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
+    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
+    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
+//    printf("\r\nYJ : %x",ADCvalue[0]);
+//    printf("\r\n");
+
+}
+static uint8_t Ack_Buf[6];
+void RF_Status_Ack(void){
+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+    Ack_Buf[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
+    Ack_Buf[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ACK;
+    Ack_Buf[INDEX_BLUE_LENGTH]       = 3;
+    Ack_Buf[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 1;
+    Ack_Buf[INDEX_BLUE_CRCINDEX + 1] = STH30_CreateCrc(&Ack_Buf[Type], Ack_Buf[Length]);
+    Ack_Buf[INDEX_BLUE_CRCINDEX + 2] = BLUECELL_TAILER;
+    HAL_UART_Transmit_DMA(&huart1,&Ack_Buf[INDEX_BLUE_HEADER],Ack_Buf[INDEX_BLUE_LENGTH]  + 3); 
+//    printf("\r\nYJ : %x",ADCvalue[0]);
+//    printf("\r\n");
+
+}
+
+void RF_Operate(uint8_t* data_buf){
+    uint32_t temp_val = 0;
+    uint8_t  ADC_Modify = 0;
+    ADF4153_R_N_Reg_st temp_reg;
+//    printf("Prev_data[INDEX_ATT_1_8G_DL1]  : %x  data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]);
+    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
+        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
+        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
+        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
+        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
+        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
+        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
+    }
+    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
+        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
+        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
+        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
+        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
+        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
+        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
+    }
+    if(   (Prev_data[INDEX_ATT_3_5G_LOW1] != data_buf[INDEX_ATT_3_5G_LOW1])
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH1] != data_buf[INDEX_ATT_3_5G_HIGH1])
+        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
+        ||(Prev_data[INDEX_ATT_3_5G_LOW2] != data_buf[INDEX_ATT_3_5G_LOW2])
+        ||(Prev_data[INDEX_ATT_3_5G_HIGH2] != data_buf[INDEX_ATT_3_5G_HIGH2])
+        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
+    ){
+        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_LOW1]  = data_buf[INDEX_ATT_3_5G_LOW1];
+        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_HIGH1] = data_buf[INDEX_ATT_3_5G_HIGH1];
+        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1]  = data_buf[INDEX_ATT_3_5G_COM1];
+        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_LOW2]  = data_buf[INDEX_ATT_3_5G_LOW2];
+        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_HIGH2] = data_buf[INDEX_ATT_3_5G_HIGH2];
+        ALL_ATT_3_5G.data5 = Prev_data[INDEX_ATT_3_5G_COM2]  = data_buf[INDEX_ATT_3_5G_COM2];
+        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+    }
+    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
+        || (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
+    ){
+        Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H];
+        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
+//        printf("data_buf[INDEX_PLL_1_8G_DL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_DL_H]);
+//        printf("data_buf[INDEX_PLL_1_8G_DL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_DL_L]);
+        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
+//        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq(16050 * 100000),0x9F8092);
+        HAL_Delay(1);
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
+    }
+    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
+        || (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
+        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
+//        printf("data_buf[INDEX_PLL_1_8G_UL_H] : %x \r\n",data_buf[INDEX_PLL_1_8G_UL_H]);
+//        printf("data_buf[INDEX_PLL_1_8G_UL_L] : %x\r\n",data_buf[INDEX_PLL_1_8G_UL_L]);
+        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
+        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
+//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+//         ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq(14485 * 100000),0x9F8092);
+
+        HAL_Delay(1);
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
+    }
+    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
+        || (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
+        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
+//        printf("data_buf[INDEX_PLL_2_1G_DL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_DL_H]);
+//        printf("data_buf[INDEX_PLL_2_1G_DL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_DL_L]);
+        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
+        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
+//         ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+//        ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq(19864 * 100000),0x9F8092);
+
+      HAL_Delay(1);
+      BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
+      BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
+    }
+    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
+        || (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
+        Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H];
+        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];    
+//        printf("data_buf[INDEX_PLL_2_1G_UL_H] : %x \r\n",data_buf[INDEX_PLL_2_1G_UL_H]);
+//        printf("data_buf[INDEX_PLL_2_1G_UL_L] : %x\r\n",data_buf[INDEX_PLL_2_1G_UL_L]);
+        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
+//        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(temp_val * 100000),0x9F8092);
+      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq(22879 * 100000),0x9F8092);
+      HAL_Delay(1);
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));      
+      BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));      
+
+
+    }
+    if((Prev_data[INDEX_PLL_3_5G_LOW_H] != data_buf[INDEX_PLL_3_5G_LOW_H])
+        ||(Prev_data[INDEX_PLL_3_5G_LOW_M] != data_buf[INDEX_PLL_3_5G_LOW_M])
+        || (Prev_data[INDEX_PLL_3_5G_LOW_L] != data_buf[INDEX_PLL_3_5G_LOW_L])){
+        Prev_data[INDEX_PLL_3_5G_LOW_H] = data_buf[INDEX_PLL_3_5G_LOW_H];
+        Prev_data[INDEX_PLL_3_5G_LOW_M] = data_buf[INDEX_PLL_3_5G_LOW_M];        
+        Prev_data[INDEX_PLL_3_5G_LOW_L] = data_buf[INDEX_PLL_3_5G_LOW_L];
+        temp_val = (data_buf[INDEX_PLL_3_5G_LOW_H] << 16) | 
+                   (data_buf[INDEX_PLL_3_5G_LOW_M] << 8)  | 
+                   (data_buf[INDEX_PLL_3_5G_LOW_L]);
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+#endif // PYJ.2019.08.12_END -- 
+//        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+      ADF4153_Module_Ctrl(Pll_3_5_L,0x385E48,0x163001,0x1442,3);
+
+    }
+    if((Prev_data[INDEX_PLL_3_5G_HIGH_H] != data_buf[INDEX_PLL_3_5G_HIGH_H])
+        || (Prev_data[INDEX_PLL_3_5G_HIGH_M] != data_buf[INDEX_PLL_3_5G_HIGH_M])
+        || (Prev_data[INDEX_PLL_3_5G_HIGH_L] != data_buf[INDEX_PLL_3_5G_HIGH_L])){
+        Prev_data[INDEX_PLL_3_5G_HIGH_H] = data_buf[INDEX_PLL_3_5G_HIGH_H];
+        Prev_data[INDEX_PLL_3_5G_HIGH_M] = data_buf[INDEX_PLL_3_5G_HIGH_M];
+        Prev_data[INDEX_PLL_3_5G_HIGH_L] = data_buf[INDEX_PLL_3_5G_HIGH_L];
+        temp_val = (data_buf[INDEX_PLL_3_5G_HIGH_H] << 16) |
+                   (data_buf[INDEX_PLL_3_5G_HIGH_M] << 8)  |
+                   (data_buf[INDEX_PLL_3_5G_HIGH_L]);
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+        temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+#endif // PYJ.2019.08.12_END -- 
+//        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+        ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3);
+    }
+    if(Prev_data[INDEX_PLL_LD_6_BIT] != data_buf[INDEX_PLL_LD_6_BIT]){
+
+    }
+#if 0 // PYJ.2019.07.28_BEGIN -- 
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_H] != data_buf[INDEX_DET_1_8G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_L] != data_buf[INDEX_DET_1_8G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_H] != data_buf[INDEX_DET_1_8G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_L] != data_buf[INDEX_DET_1_8G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_H] != data_buf[INDEX_DET_1_8G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_L] != data_buf[INDEX_DET_1_8G_UL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_H] != data_buf[INDEX_DET_1_8G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_L] != data_buf[INDEX_DET_1_8G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_H] != data_buf[INDEX_DET_2_1G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_L] != data_buf[INDEX_DET_2_1G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_H] != data_buf[INDEX_DET_2_1G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_L] != data_buf[INDEX_DET_2_1G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_H] != data_buf[INDEX_DET_2_1G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_L] != data_buf[INDEX_DET_2_1G_UL_IN_L]){
+
+    }
+
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_H] != data_buf[INDEX_DET_2_1G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_L] != data_buf[INDEX_DET_2_1G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_H] != data_buf[INDEX_DET_3_5G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_L] != data_buf[INDEX_DET_3_5G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_L] != data_buf[INDEX_DET_3_5G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_H] != data_buf[INDEX_DET_3_5G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_H] != data_buf[INDEX_DET_3_5G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_L] != data_buf[INDEX_DET_3_5G_UL_IN_L]){
+
+    }
+
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_H] != data_buf[INDEX_DET_3_5G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_L] != data_buf[INDEX_DET_3_5G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_RFU_TEMP_H] != data_buf[INDEX_RFU_TEMP_H]){
+
+    }
+    if(Prev_data[INDEX_RFU_TEMP_L] != data_buf[INDEX_RFU_TEMP_L]){
+
+    }
+    if(Prev_data[INDEX__28V_DET_H] != data_buf[INDEX__28V_DET_H]){
+
+    }
+    if(Prev_data[INDEX__28V_DET_L] != data_buf[INDEX__28V_DET_L]){
+
+    }
+#endif // PYJ.2019.07.28_END -- 
+    if(Prev_data[INDEX_ALARM_AC] != data_buf[INDEX_ALARM_AC]){
+
+    }
+    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){
+
+    }
+    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
+        Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL];
+    }
+    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]);
+        Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL];
+
+    }
+
+    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
+        Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
+    }
+    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
+        Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]);
+        Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
+        Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
+    
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
+        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
+        ADC_Modify = 1;
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
+        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
+        ADC_Modify = 1;
+    }
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
+        HAL_Delay(1);
+//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
+//            printf("PLL CTRL START !! \r\n");
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+//            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
+//                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
+//                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
+            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
+                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
+                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
+
+
+//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+            temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+#endif // PYJ.2019.08.12_END -- 
+//            ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+//            ADF4153_Module_Ctrl(Pll_3_5_H,0x4006C0,0x163001,0x14C2,3);
+
+            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+        }
+    }
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]);
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
+        HAL_Delay(1);
+//        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
+//            printf("PLL CTRL START !! \r\n");
+#if 1 // PYJ.2019.08.12_BEGIN -- 
+//            temp_val = (Prev_data[INDEX_PLL_3_5G_HIGH_H] << 16) | 
+//                       (Prev_data[INDEX_PLL_3_5G_HIGH_M] << 8)  | 
+//                       (Prev_data[INDEX_PLL_3_5G_HIGH_L]);
+            temp_val = (Prev_data[INDEX_PLL_3_5G_LOW_H] << 16) |
+                       (Prev_data[INDEX_PLL_3_5G_LOW_M] << 8) | 
+                       (Prev_data[INDEX_PLL_3_5G_LOW_L]);
+            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+//            temp_reg = ADF4153_Freq_Calc(temp_val  * 10000,ADF4153_122_88MHzREFIN,ADF4153_8RCOUNTER,ADF4153_CHANNEL_SPACING);
+#else
+          temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);            
+#endif // PYJ.2019.08.12_END -- 
+//            ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+            PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+        }
+    }
+
+    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
+        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]);
+    }
+    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
+        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]);
+    }
+    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
+        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]);
+    }
+    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
+        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
+    }
+
+
+    if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H];
+        Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L];
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){
+        ADC_Modify = 1;
+        
+        Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H];
+        Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L];        
+    }    
+    if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
+        ADC_Modify = 1;
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);
+
+        Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
+        Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H];
+        Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L];
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){
+        ADC_Modify = 1;
+
+        Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H];
+        Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H];
+        Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H];
+        Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L];        
+    }    
+    if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H];
+        Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L];        
+    }
+    if(ADC_Modify){
+//        AD5318_Ctrl(0xF000);
+//        HAL_Delay(1);
+//        AD5318_Ctrl(0x800C);
+//        AD5318_Ctrl(0x2FFF );
+//        AD5318_Ctrl(0xA000);
+//        printf("DAC CTRL START \r\n");
+//        AD5318_Ctrl(0x800C);
+//        AD5318_Ctrl(0xA000);
+//        printf("DAC Change\r\n");
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]));    
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L]));    
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L]));    
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
+        AD5318_Ctrl((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
+    }
+    
+}
+
+uint8_t temp_crc = 0;
+bool RF_Ctrl_Main(uint8_t* data_buf){
+    bool ret = false;
+    Bluecell_Prot_t type = data_buf[Type];
+    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
+    if(ret == false){
+        HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); 
+        return ret;
+    }
+    
+    switch(type){
+    case TYPE_BLUECELL_RESET:
+        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
+            printf("%02x ",data_buf[i]);
+        printf("Reset Start \r\n");
+        NVIC_SystemReset();
+        break;
+    case TYPE_BLUECELL_SET:
+#if 0 // PYJ.2019.07.31_BEGIN -- 
+    printf("TYPE_BLUECELL_SET : ");
+    for(uint8_t i =0 ; i < INDEX_BLUE_EOF + 1; i++)
+        printf("%02x ",data_buf[i]);
+#endif // PYJ.2019.07.31_END -- 
+        RF_Operate(&data_buf[Header]);
+        RF_Status_Ack();
+
+//        ADF4153_Freq_Calc(3465500000,40000000,2,5000);
+//        ADF4153_Freq_Calc(3993450000,40000000,2,5000);
+//        halSynSetFreq(1995000000);
+//        halSynSetFreq(1600000000);
+//        halSynSetFreq(1455000000);        
+        break;
+    case TYPE_BLUECELL_GET:
+#if 0 // PYJ.2019.08.01_BEGIN -- 
+        printf("\r\nTYPE_BLUECELL_GET : \r\n");
+#endif // PYJ.2019.08.01_END -- 
+        RF_Status_Get();
+        break;
+    case TYPE_BLUECELL_SAVE:
+//        printf("\r\nFLASH Write\r\n");
+        Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]);
+        RF_Status_Ack();
+
+        break;
+        default:
+#ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN --         
+            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
+#endif
+            break;
+    }
+    return ret;
+}

insight/STM32F103_ATTEN_PLL_Zig.si4project/STM32F103_ATTEN_PLL_Zig.SearchResults

@@ -1,5 +1,4 @@
----- 3934500000 Matches (4 in 2 files) ----
-ADF4153_Initialize in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
-ADF4153_Check in adf4153.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
-RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :         temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
-RF_Operate in zig_operate.c (D:\workspace\STM32F103_ATTEN_PLL_Zig\Src) :             temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_40MHzREFIN,ADF4153_2RCOUNTER,ADF4153_CHANNEL_SPACING);
+---- 220 Matches (3 in 3 files) ----
+SCB_GetFPUType in core_cm7.h (D:\workspace\STM32F103_ATTEN_PLL_Zig\Drivers\CMSIS\Include) :   if        ((mvfr0 & 0x00000FF0UL) == 0x220UL)
+stm32f103xe.h (D:\workspace\STM32F103_ATTEN_PLL_Zig\Drivers\CMSIS\Device\ST\STM32F1xx\Include) line 748 : #define SRAM_BB_BASE          0x22000000U /*!< SRAM base address in the bit-band region */
+stm32f1xx_hal_gpio.h (D:\workspace\STM32F103_ATTEN_PLL_Zig\Drivers\STM32F1xx_HAL_Driver\Inc) line 146 : #define  GPIO_MODE_EVT_FALLING                  0x10220000U   /*!< External Event Mode with Falling edge trigger detection              */