Warning Code 전부 제거 모든 Function 최적화

Debug/Src/AD5318.su

@@ -1,2 +1,2 @@
-AD5318.c:23:6:AD5318_Ctrl	16	static
-AD5318.c:8:7:AD5318_Initialize	8	static
+AD5318.c:25:6:AD5318_Ctrl	16	static
+AD5318.c:10:7:AD5318_Initialize	8	static

Debug/Src/PE43711.su

@@ -1,4 +1,4 @@
-PE43711.c:79:6:Bit_Compare	0	static
-PE43711.c:87:6:PE43711_ALL_atten_ctrl	56	static
-PE43711.c:63:6:PE43711_PinInit	176	static
-PE43711.c:108:6:PE43711_atten_ctrl	40	static
+PE43711.c:81:6:Bit_Compare	0	static
+PE43711.c:89:6:PE43711_ALL_atten_ctrl	56	static
+PE43711.c:65:6:PE43711_PinInit	176	static
+PE43711.c:110:6:PE43711_atten_ctrl	40	static

Debug/Src/adf4153.su

@@ -1,9 +1,9 @@
-adf4153.c:56:10:pow2	0	static
-adf4153.c:64:8:round_up	16	static
-adf4153.c:75:8:N_Reg_Value_Calc	8	static
-adf4153.c:78:10:N_Divider_Reg_Create	16	static
-adf4153.c:118:10:R_Divider_Reg_Create	20	static
-adf4153.c:163:20:ADF4153_Freq_Calc	48	static
-adf4153.c:238:6:ADF4153_Initialize	0	static
-adf4153.c:308:6:ADF4153_Module_Ctrl	56	static
-adf4153.c:290:6:ADF4153_Check	40	static
+adf4153.c:61:10:pow2	0	static
+adf4153.c:69:8:round_up	16	static
+adf4153.c:80:8:N_Reg_Value_Calc	8	static
+adf4153.c:83:10:N_Divider_Reg_Create	16	static
+adf4153.c:123:10:R_Divider_Reg_Create	20	static
+adf4153.c:168:20:ADF4153_Freq_Calc	48	static
+adf4153.c:243:6:ADF4153_Initialize	0	static
+adf4153.c:313:6:ADF4153_Module_Ctrl	56	static
+adf4153.c:295:6:ADF4153_Check	40	static

Debug/Src/flash.su

@@ -1,8 +1,8 @@
-flash.c:14:6:Jump_App	16	static
-flash.c:27:6:FLASH_If_Init	8	static
-flash.c:38:6:Flash_InitRead	16	static
-flash.c:60:9:Flash_RGB_Data_Write	24	static
-flash.c:75:9:Flash_write	16	static
-flash.c:124:6:FLASH_Byte_Write	16	static
-flash.c:184:9:Bluecell_Flash_Write	8	static
-flash.c:191:6:Bluecell_Flash_Read	0	static
+flash.c:15:6:Jump_App	16	static
+flash.c:28:6:FLASH_If_Init	8	static
+flash.c:39:6:Flash_InitRead	0	static
+flash.c:61:9:Flash_RGB_Data_Write	24	static
+flash.c:76:9:Flash_write	16	static
+flash.c:125:6:FLASH_Byte_Write	16	static
+flash.c:185:9:Bluecell_Flash_Write	8	static
+flash.c:192:6:Bluecell_Flash_Read	0	static

Debug/Src/includes.su

@@ -1,9 +1,9 @@
-includes.c:99:6:Path_Init	16	static
-includes.c:111:6:Power_ON_OFF_Ctrl	8	static
-includes.c:231:6:ATTEN_PLL_PATH_Initialize	8	static
-includes.c:241:6:Power_ON_OFF_Initialize	16	static
-includes.c:262:6:Error_Message_Occur	8	static
-includes.c:288:6:Pol_Delay_us	8	static
-includes.c:296:6:Boot_LED_Toggle	8	static
-includes.c:299:6:ADC_Check	20	static
-includes.c:312:6:Uart_Check	16	static
+includes.c:103:6:Path_Init	16	static
+includes.c:115:6:Power_ON_OFF_Ctrl	8	static
+includes.c:235:6:ATTEN_PLL_PATH_Initialize	8	static
+includes.c:245:6:Power_ON_OFF_Initialize	16	static
+includes.c:266:6:Error_Message_Occur	8	static
+includes.c:292:6:Pol_Delay_us	8	static
+includes.c:300:6:Boot_LED_Toggle	8	static
+includes.c:303:6:ADC_Check	20	static
+includes.c:316:6:Uart_Check	16	static

Debug/Src/main.su

@@ -1,5 +1,5 @@
-main.c:83:6:HAL_TIM_PeriodElapsedCallback	0	static
-main.c:92:5:_write	8	static
-main.c:175:6:SystemClock_Config	96	static
-main.c:104:5:main	56	static
-main.c:617:6:Error_Handler	0	static
+main.c:96:6:HAL_TIM_PeriodElapsedCallback	0	static
+main.c:105:5:_write	8	static
+main.c:188:6:SystemClock_Config	96	static
+main.c:117:5:main	56	static
+main.c:630:6:Error_Handler	0	static

Debug/Src/pll_4113.su

@@ -1,5 +1,5 @@
-pll_4113.c:75:6:ADF4113_Initialize	0	static
-pll_4113.c:194:10:N_Counter_Latch_Create	16	static
-pll_4113.c:164:10:halSynSetFreq	0	static
-pll_4113.c:238:6:ADF4113_Module_Ctrl	48	static
-pll_4113.c:102:6:ADF4113_Check	40	static
+pll_4113.c:79:6:ADF4113_Initialize	0	static
+pll_4113.c:198:10:N_Counter_Latch_Create	16	static
+pll_4113.c:168:10:halSynSetFreq	0	static
+pll_4113.c:242:6:ADF4113_Module_Ctrl	48	static
+pll_4113.c:106:6:ADF4113_Check	40	static

Debug/Src/uart.su

@@ -1,5 +1,5 @@
-uart.c:14:6:InitUartQueue	8	static
-uart.c:56:6:GetDataFromUartQueue	16	static
-uart.c:27:6:HAL_UART_RxCpltCallback	8	static
-uart.c:44:6:PutDataToUartQueue	16	static
-uart.c:97:6:Uart1_Data_Send	0	static
+uart.c:16:6:InitUartQueue	8	static
+uart.c:58:6:GetDataFromUartQueue	16	static
+uart.c:29:6:HAL_UART_RxCpltCallback	8	static
+uart.c:46:6:PutDataToUartQueue	16	static
+uart.c:99:6:Uart1_Data_Send	0	static

Debug/Src/zig_operate.su

@@ -1,5 +1,5 @@
-zig_operate.c:187:6:RF_Data_Check	8	static
-zig_operate.c:220:6:RF_Status_Get	8	static
-zig_operate.c:234:6:RF_Status_Ack	8	static
-zig_operate.c:248:6:RF_Operate	176	static
-zig_operate.c:680:6:RF_Ctrl_Main	16	static
+zig_operate.c:201:6:RF_Data_Check	8	static
+zig_operate.c:234:6:RF_Status_Get	8	static
+zig_operate.c:248:6:RF_Status_Ack	8	static
+zig_operate.c:262:6:RF_Operate	176	static
+zig_operate.c:694:6:RF_Ctrl_Main	16	static

Inc/adf4153.h

@@ -42,10 +42,10 @@
 #ifndef __ADF4153_H__
 #define __ADF4153_H__
 
-#include "main.h"
-
-
+//#include "main.h"
 
+#include "main.h"
+#include "pll_4113.h"
 
 #define ADF4153_REFIN 40000000
 #define ADF4153_RCOUNTER 2
@@ -61,7 +61,7 @@ typedef struct {
 
 
 //void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
-//void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
+void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
 ADF4153_R_N_Reg_st ADF4153_Freq_Calc(unsigned long long Freq,unsigned long long REFin,uint8_t R_Counter,uint32_t chspacing);
 void ADF4153_Initialize(void);
 void ADF4153_Check(void);

Inc/includes.h

@@ -7,6 +7,7 @@
 
 #ifndef INCLUDES_H_
 #define INCLUDES_H_
+//#include "main.h"
 #include "main.h"
 #if 0 // PYJ.2019.07.28_BEGIN -- 
 typedef enum{
@@ -29,11 +30,11 @@ typedef enum{
   UL_2_1,
 }PLL_Error;
 
+extern char *Bluecell_Prot_IndexStr[];
 void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
 void Path_Init(void);
 void ATTEN_PLL_PATH_Initialize(void);
-char *Bluecell_Prot_IndexStr[];
-
+void Pol_Delay_us(volatile uint32_t microseconds);
 void Error_Message_Occur(PLL_Error mode);
 void Pol_Delay_us(volatile uint32_t microseconds);
 void Boot_LED_Toggle(void);

Inc/main.h

@@ -34,15 +34,15 @@ extern "C" {
 /* USER CODE BEGIN Includes */
 #include <stdio.h>
 #include <stdbool.h>
-#include "PE43711.h"
-#include "BDA4601.h"
-#include "zig_operate.h"
-#include "pll_4113.h"
-#include "adf4153.h"
-#include "uart.h"
-#include "includes.h"
-#include "ad5318.h"
-#include "flash.h"
+//#include "PE43711.h"
+//#include "BDA4601.h"
+//#include "zig_operate.h"
+//#include "pll_4113.h"
+//#include "adf4153.h"
+//#include "uart.h"
+//#include "includes.h"
+//#include "ad5318.h"
+//#include "flash.h"
 /* USER CODE END Includes */
 
 /* Exported types ------------------------------------------------------------*/
@@ -80,7 +80,7 @@ volatile uint32_t LedTimerCnt;
 void Error_Handler(void);
 
 /* USER CODE BEGIN EFP */
-extern void Pol_Delay_us(volatile uint32_t microseconds);
+//extern void Pol_Delay_us(volatile uint32_t microseconds);
 extern void ATTEN_PLL_PATH_Initialize(void);
 
 /* USER CODE END EFP */

Inc/pll_4113.h

@@ -6,8 +6,8 @@
 **************************************************************************************************/
 #ifndef HAL_ADF4113_H
 #define HAL_ADF4113_H
+//#include "main.h"
 #include "main.h"
-
 typedef struct _PLL_Setting_st{
     GPIO_TypeDef * PLL_CLK_PORT;
     uint16_t       PLL_CLK_PIN;
@@ -22,11 +22,12 @@ PLL_Setting_st ADF4113_1_8G_DL;
 PLL_Setting_st ADF4113_1_8G_UL;
 PLL_Setting_st ADF4113_2_1G_DL;
 PLL_Setting_st ADF4113_2_1G_UL;
-uint8_t PLL_1_8_DL_Error_Cnt;
-uint8_t PLL_1_8_UL_Error_Cnt;
-uint8_t PLL_2_1_DL_Error_Cnt;
-uint8_t PLL_2_1_UL_Error_Cnt;
-
+/*
+extern uint8_t PLL_1_8_DL_Error_Cnt;
+extern uint8_t PLL_1_8_UL_Error_Cnt;
+extern uint8_t PLL_2_1_DL_Error_Cnt;
+extern uint8_t PLL_2_1_UL_Error_Cnt;
+*/
 uint32_t halSynSetFreq(uint32_t rf_Freq);
 void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2);
 void ADF4113_Initialize(void);

Inc/zig_operate.h

@@ -7,6 +7,7 @@
 
 #ifndef ZIG_OPERATE_H_
 #define ZIG_OPERATE_H_
+#include <stdbool.h>
 #include "main.h"
 bool RF_Ctrl_Main(uint8_t* data_buf);
 
void RF_Status_Get(void);

Src/AD5318.c

@@ -5,6 +5,8 @@
  *      Author: parkyj
  */
  #include "ad5318.h"
+
+extern void Pol_Delay_us(volatile uint32_t microseconds);
  void AD5318_Initialize(void){
    /* * * *DAC Setting* * * * */
     AD5318_Ctrl(0x800C);

Src/BDA4601.c

@@ -126,7 +126,7 @@ void BDA4601_Initialize(void){
 
 void BDA4601_atten_ctrl(BDA4601_st BDA ,uint8_t data){
     uint8_t i = 0;
-    uint8_t temp = 0;
+//    uint8_t temp = 0;
 //    printf("BDA4601_atten_ctrl : %x \r\n",data);
 //    temp = 4|data;
     HAL_GPIO_WritePin(BDA.LE_PORT,BDA.LE_PIN,GPIO_PIN_RESET);

Src/PE43711.c

@@ -7,9 +7,11 @@
  #include "PE43711.h"
 #if 1 // PYJ.2019.07.26_BEGIN -- 
 #define ATTEN_3_5G_Initial_Val 0
+extern void Pol_Delay_us(volatile uint32_t microseconds);
 void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT);
 
 void PE43711_atten_ctrl(PE43711_st ATT ,uint8_t data);
+
 ALL_PE43711_st ALL_ATT_3_5G;
 
 PE43711_st ATT_3_5G_LOW1 ={

Src/adf4153.c

@@ -43,6 +43,11 @@
 /****************************** Include Files ********************************/
 /*****************************************************************************/
 #include "adf4153.h"
+#include "zig_operate.h"
+#include "main.h"
+#include "pll_4113.h"
+
+extern void Pol_Delay_us(volatile uint32_t microseconds);
 typedef struct _adf4153_st{
     unsigned long long PFD_Value;
     uint16_t MOD_Value;

Src/flash.c

@@ -5,6 +5,7 @@
  *      Author: parkyj
  */
 #include "flash.h"
+#include "zig_operate.h"
 uint8_t flashinit = 0;
 uint32_t Address = FLASH_USER_START_ADDR;
 
@@ -40,7 +41,7 @@ void Flash_InitRead(void) // ?占쏙옙湲고븿?占쏙옙
     uint32_t  Address = 0;
     Address = FLASH_USER_START_ADDR;
     for(uint32_t i = 0; i < INDEX_BLUE_EOF + 1; i++ ){
-        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
+      //  printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
         Address++;
     }
 #if 0 // PYJ.2019.03.27_BEGIN -- 
@@ -186,7 +187,7 @@ uint8_t Bluecell_Flash_Write(uint8_t* data){
   /*Variable used for Erase procedure*/
 //  flashtest();
   FLASH_Byte_Write(&data[INDEX_BLUE_HEADER]);
-
+  return true;
 }
 bool Bluecell_Flash_Read(uint8_t* data){
     for(int i = 0; i < INDEX_BLUE_EOF + 1; i += 2){
@@ -199,4 +200,5 @@ bool Bluecell_Flash_Read(uint8_t* data){
         printf("Data = %x\r\n",  data[i]);
     }
 #endif // PYJ.2019.07.31_END -- 
+    return true;
 }

Src/includes.c

@@ -5,8 +5,12 @@
  *      Author: parkyj
  */
 #include "includes.h"
-
+#include "zig_operate.h"
+#include "main.h"
+#include "uart.h"
+#include "CRC16.h"
 #define MACROSTR(k) #k
+
 uint32_t ADCvalue[ADC_EA];
 
 
@@ -90,12 +94,12 @@ char *Bluecell_Prot_IndexStr[] = {
     MACROSTR(INDEX__T_SYNC_UL       ),   
 };
 
+#ifdef DEBUG_PRINT
 static void kConstPrinter(Bluecell_Prot_Index k)
 {
-#ifdef DEBUG_PRINT
     printf("%s", Bluecell_Prot_IndexStr[k]);
-#endif /* DEBUG_PRINT */
 }
+#endif /* DEBUG_PRINT */
 void Path_Init(void){
     Prev_data[INDEX_PATH_EN_1_8G_DL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin);
     Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);

Src/main.c

@@ -23,7 +23,9 @@
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
-
+#include "zig_operate.h"
+#include "uart.h"
+#include "pll_4113.h"
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -73,7 +75,18 @@ static void MX_USART1_UART_Init(void);
 static void MX_TIM6_Init(void);
 static void MX_NVIC_Init(void);
 /* USER CODE BEGIN PFP */
-void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
+extern void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
+extern void ADF4153_Initialize(void);
+extern void Path_Init(void);
+extern void PE43711_PinInit(void);
+extern void BDA4601_Initialize(void);
+extern void Uart_Check(void);
+extern void Power_ON_OFF_Initialize(void);
+extern void Boot_LED_Toggle(void);
+extern uint8_t Bluecell_Flash_Write(uint8_t* data);
+extern void ADC_Check(void);
+extern void AD5318_Initialize(void);
+extern void Bluecell_Flash_Read(uint8_t* data);
 /* USER CODE END PFP */
 
 /* Private user code ---------------------------------------------------------*/

Src/pll_4113.c

@@ -5,7 +5,11 @@
   Description:   This file contains the interface to the ADF4113 frequency synthesizer.
 **************************************************************************************************/
 #include "pll_4113.h"
+#include "includes.h"
+#include "zig_operate.h"
+#include "main.h"
 void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2);
+uint32_t halSynSetFreq(uint32_t rf_Freq);
 
 uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN);
 
@@ -163,26 +167,26 @@ void ADF4113_Check(void){
 
 uint32_t halSynSetFreq(uint32_t rf_Freq)
 {
-    uint32_t  R, B;
-    uint32_t  A, P, p_mode;
+
+    uint32_t  B,A, P;
     uint32_t  N_val = 0;
     N_val = (rf_Freq / ADF4113_CH_STEP);
     if( N_val < ADF4113_PRE8_MIN_N) { 
         return HAL_SYN_INVALID_PRESCALE; 
     } else if(( N_val> ADF4113_PRE8_MIN_N) && (N_val < ADF4113_PRE16_MIN_N)) { 
         P = 8;  
-        p_mode = ADF4113_PRESCALE8;
+        //p_mode = ADF4113_PRESCALE8;
     } else if(( N_val > ADF4113_PRE16_MIN_N) && (N_val < ADF4113_PRE32_MIN_N)) { 
         P = 16;
-        p_mode = ADF4113_PRESCALE16;
+//        p_mode = ADF4113_PRESCALE16;
         
     } else if((N_val > ADF4113_PRE32_MIN_N) && ( N_val < ADF4113_PRE64_MIN_N)) { 
         P = 32;
-        p_mode = ADF4113_PRESCALE32;
+//        p_mode = ADF4113_PRESCALE32;
         
     } else if( N_val > ADF4113_PRE64_MIN_N) { 
         P = 64; 
-        p_mode = ADF4113_PRESCALE64;
+//        p_mode = ADF4113_PRESCALE64;
     }
     P = 32;
     B = N_val / P;

Src/uart.c

@@ -6,6 +6,8 @@
  */
 
 #include "uart.h"
+#include "zig_operate.h"
+#include "string.h"
 
 UARTQUEUE TerminalQueue;
 UARTQUEUE WifiQueue;
@@ -59,7 +61,7 @@ void GetDataFromUartQueue(UART_HandleTypeDef *huart)
 
     
 //    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
-    UART_HandleTypeDef *dst = &hTerminal;
+//    UART_HandleTypeDef *dst = &hTerminal;
     pUARTQUEUE pQueue = &TerminalQueue;
 //    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
 //    {

Src/zig_operate.c

@@ -5,6 +5,20 @@
  *      Author: parkyj
  */
 #include "zig_operate.h"
+#include "main.h"
+#include "pll_4113.h"
+#include "ADF4153.h"
+#include "PE43711.h"
+#include "BDA4601.h"
+#include "uart.h"
+#include "CRC16.h"
+extern void AD5318_Ctrl(uint16_t ShiftTarget) ;
+extern etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum);
+extern void ADF4153_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2,uint32_t R3);
+extern bool Bluecell_Flash_Read(uint8_t* data);
+extern void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT);
+extern void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
+extern uint8_t Bluecell_Flash_Write(uint8_t* data);
 uint8_t Prev_data[INDEX_BLUE_EOF + 1];
 uint8_t Flash_Save_data[INDEX_BLUE_EOF + 1];
 

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/includes(7006).c

@@ -0,0 +1,319 @@
+/*
+ * includes.c
+ *
+ *  Created on: 2019. 7. 28.
+ *      Author: parkyj
+ */
+#include "includes.h"
+#include "zig_operate.h"
+#include "main.h"
+#include "uart.h"
+#define MACROSTR(k) #k
+
+void Pol_Delay_us(volatile uint32_t microseconds);
+uint32_t ADCvalue[ADC_EA];
+
+
+char *Bluecell_Prot_IndexStr[] = {
+    MACROSTR(INDEX_ATT_1_8G_DL1     ),
+    MACROSTR(INDEX_ATT_1_8G_DL2     ),
+    MACROSTR(INDEX_ATT_1_8G_UL1     ),
+    MACROSTR(INDEX_ATT_1_8G_UL2     ),
+    MACROSTR(INDEX_ATT_1_8G_UL3     ),
+    MACROSTR(INDEX_ATT_1_8G_UL4     ),
+    MACROSTR(INDEX_ATT_2_1G_DL1     ),
+    MACROSTR(INDEX_ATT_2_1G_DL2     ),
+    MACROSTR(INDEX_ATT_2_1G_UL1     ),
+    MACROSTR(INDEX_ATT_2_1G_UL2     ),
+    MACROSTR(INDEX_ATT_2_1G_UL3     ),
+    MACROSTR(INDEX_ATT_2_1G_UL4     ),
+    MACROSTR(INDEX_ATT_3_5G_LOW1      ),
+    MACROSTR(INDEX_ATT_3_5G_HIGH1      ),
+    MACROSTR(INDEX_ATT_3_5G_COM1    ),
+    MACROSTR(INDEX_ATT_3_5G_LOW2     ),
+    MACROSTR(INDEX_ATT_3_5G_HIGH2      ),
+    MACROSTR(INDEX_ATT_3_5G_COM2    ),
+    MACROSTR(INDEX_PLL_1_8G_DL_H    ),
+    MACROSTR(INDEX_PLL_1_8G_DL_L    ),
+    MACROSTR(INDEX_PLL_1_8G_UL_H    ),
+    MACROSTR(INDEX_PLL_1_8G_UL_L    ),
+    MACROSTR(INDEX_PLL_2_1G_DL_H    ),
+    MACROSTR(INDEX_PLL_2_1G_DL_L    ),
+    MACROSTR(INDEX_PLL_2_1G_UL_H    ),
+    MACROSTR(INDEX_PLL_2_1G_UL_L    ),
+    MACROSTR(INDEX_PLL_3_5G_LOW_H    ),
+    MACROSTR(INDEX_PLL_3_5G_LOW_M    ),    
+    MACROSTR(INDEX_PLL_3_5G_LOW_L    ),
+    MACROSTR(INDEX_PLL_3_5G_HIGH_H    ),
+    MACROSTR(INDEX_PLL_3_5G_HIGH_M    ),    
+    MACROSTR(INDEX_PLL_3_5G_HIGH_L    ),
+    MACROSTR(INDEX_PLL_LD_6_BIT     ),
+    MACROSTR(INDEX_DET_1_8G_DL_IN_H ),
+    MACROSTR(INDEX_DET_1_8G_DL_IN_L ),
+    MACROSTR(INDEX_DET_1_8G_DL_OUT_H),
+    MACROSTR(INDEX_DET_1_8G_DL_OUT_L),
+    MACROSTR(INDEX_DET_1_8G_UL_IN_H ),
+    MACROSTR(INDEX_DET_1_8G_UL_IN_L ),
+    MACROSTR(INDEX_DET_1_8G_UL_OUT_H),
+    MACROSTR(INDEX_DET_1_8G_UL_OUT_L),
+    MACROSTR(INDEX_DET_2_1G_DL_IN_H ),
+    MACROSTR(INDEX_DET_2_1G_DL_IN_L ),
+    MACROSTR(INDEX_DET_2_1G_DL_OUT_H),
+    MACROSTR(INDEX_DET_2_1G_DL_OUT_L),
+    MACROSTR(INDEX_DET_2_1G_UL_IN_H ),
+    MACROSTR(INDEX_DET_2_1G_UL_IN_L ),
+    MACROSTR(INDEX_DET_2_1G_UL_OUT_H),
+    MACROSTR(INDEX_DET_2_1G_UL_OUT_L),
+    MACROSTR(INDEX_DET_3_5G_DL_IN_H ),
+    MACROSTR(INDEX_DET_3_5G_DL_IN_L ),
+    MACROSTR(INDEX_DET_3_5G_DL_OUT_L),
+    MACROSTR(INDEX_DET_3_5G_DL_OUT_H),
+    MACROSTR(INDEX_DET_3_5G_UL_IN_H ),
+    MACROSTR(INDEX_DET_3_5G_UL_IN_L ),
+    MACROSTR(INDEX_DET_3_5G_UL_OUT_H),
+    MACROSTR(INDEX_DET_3_5G_UL_OUT_L),
+    MACROSTR(INDEX_RFU_TEMP_H       ),
+    MACROSTR(INDEX_RFU_TEMP_L       ),
+    MACROSTR(INDEX__28V_DET_H       ),
+    MACROSTR(INDEX__28V_DET_L       ),
+    MACROSTR(INDEX_ALARM_AC         ),
+    MACROSTR(INDEX_ALARM_DC         ),
+    MACROSTR(INDEX_PATH_EN_1_8G_DL  ),
+    MACROSTR(INDEX_PATH_EN_1_8G_UL  ),
+    MACROSTR(INDEX_PATH_EN_2_1G_DL  ),
+    MACROSTR(INDEX_PATH_EN_2_1G_UL  ),
+    MACROSTR(INDEX_PATH_EN_3_5G_L   ),
+    MACROSTR(INDEX_PATH_EN_3_5G_H   ),
+    MACROSTR(INDEX_PATH_EN_3_5G_DL  ),
+    MACROSTR(INDEX_PATH_EN_3_5G_UL  ),
+    MACROSTR(INDEX_PLL_ON_OFF_3_5G_H),
+    MACROSTR(INDEX_PLL_ON_OFF_3_5G_L),
+    MACROSTR(INDEX_T_SYNC_DL        ),
+    MACROSTR(INDEX__T_SYNC_DL       ),
+    MACROSTR(INDEX_T_SYNC_UL        ),
+    MACROSTR(INDEX__T_SYNC_UL       ),   
+};
+
+static void kConstPrinter(Bluecell_Prot_Index k)
+{
+#ifdef DEBUG_PRINT
+    printf("%s", Bluecell_Prot_IndexStr[k]);
+#endif /* DEBUG_PRINT */
+}
+void Path_Init(void){
+    Prev_data[INDEX_PATH_EN_1_8G_DL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin);
+    Prev_data[INDEX_PATH_EN_1_8G_UL]   = HAL_GPIO_ReadPin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin);
+    Prev_data[INDEX_PATH_EN_2_1G_DL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin);
+    Prev_data[INDEX_PATH_EN_2_1G_UL]   = HAL_GPIO_ReadPin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin);
+    Prev_data[INDEX_PATH_EN_3_5G_L]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin);
+    Prev_data[INDEX_PATH_EN_3_5G_H]    = HAL_GPIO_ReadPin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin);
+    Prev_data[INDEX_PATH_EN_3_5G_DL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin);
+    Prev_data[INDEX_PATH_EN_3_5G_UL]   = HAL_GPIO_ReadPin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin);
+    Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin);
+    Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin);
+}
+void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd){
+//    printf("\r\ntype : %s cmd : %d\r\n",Bluecell_Prot_IndexStr[type - 4],cmd);
+    switch(type){
+        case INDEX_PATH_EN_1_8G_DL  : 
+#if 0 // PYJ.2019.07.29_BEGIN -- 
+            printf("\r\n LINE %d\r\n",__LINE__);
+#endif // PYJ.2019.07.29_END -- 
+            if(cmd)
+                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET);
+            else
+                HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
+            break; 
+        case INDEX_PATH_EN_1_8G_UL  : 
+#if 0 // PYJ.2019.07.29_BEGIN -- 
+            printf("\r\n LINE %d\r\n",__LINE__);
+#endif // PYJ.2019.07.29_END -- 
+            if(cmd)
+                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET);
+            else
+                HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
+                
+            break;
+        case INDEX_PATH_EN_2_1G_DL  : 
+#ifdef DEBUG_PRINT
+            printf("\r\n LINE %d\r\n",__LINE__);
+#endif /* DEBUG_PRINT */
+            if(cmd)
+                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET);
+            else
+                HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);                
+            break;
+        case INDEX_PATH_EN_2_1G_UL  : 
+#ifdef DEBUG_PRINT
+            printf("\r\n LINE %d\r\n",__LINE__);
+#endif /* DEBUG_PRINT */
+            if(cmd)
+                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET);
+            else
+                HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);                
+            break;
+        case INDEX_PATH_EN_3_5G_L   : 
+            if(cmd){
+                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);
+//                printf("\r\n LINE %d\r\n",__LINE__);
+            }
+            else{
+                HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
+//                printf("\r\n LINE %d\r\n",__LINE__);
+            }
+            break;
+        case INDEX_PATH_EN_3_5G_H   : 
+            if(cmd){
+                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET);
+//                            printf("\r\n LINE %d\r\n",__LINE__);
+            }
+            else{
+                HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
+//                            printf("\r\n LINE %d\r\n",__LINE__);
+            }
+            break;
+        case INDEX_PATH_EN_3_5G_DL  : 
+#ifdef DEBUG_PRINT
+            printf("\r\n LINE %d\r\n",__LINE__);
+#endif /* DEBUG_PRINT */
+            if(cmd)
+                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET);
+            else
+                HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
+            break;
+        case INDEX_PATH_EN_3_5G_UL  : 
+#ifdef DEBUG_PRINT
+            printf("\r\n LINE %d\r\n",__LINE__);
+#endif /* DEBUG_PRINT */
+            if(cmd)
+                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
+            else
+                HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
+            break;
+        case INDEX_PLL_ON_OFF_3_5G_H: 
+//            printf("\r\n LINE %d\r\n",__LINE__);
+            if(cmd)
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
+            else
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
+            break;
+        case INDEX_PLL_ON_OFF_3_5G_L: 
+//            printf("\r\n LINE %d\r\n",__LINE__);
+            if(cmd)
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
+            else
+                HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);
+            break;
+        case INDEX_T_SYNC_DL:
+        case INDEX__T_SYNC_UL:
+        case INDEX_T_SYNC_UL:
+        case INDEX__T_SYNC_DL:
+            if(cmd){
+                HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
+                HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
+                HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
+                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);                
+            }
+            else{
+                HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_SET);
+                HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_SET);
+                HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_RESET);
+                HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_RESET);                
+            }
+#ifdef DEBUG_PRINT
+            printf("TDD SYNC OPERATE ; %d\r\n",cmd);
+#endif /* DEBUG_PRINT */
+            break;
+        default :
+#ifdef DEBUG_PRINT
+        printf("Function : %s LINE : %d   ERROR \r\n",__func__,__LINE__);
+#endif /* DEBUG_PRINT */
+    break;
+
+    }
+}
+void ATTEN_PLL_PATH_Initialize(void){
+#if 0 // PYJ.2019.07.31_BEGIN -- 
+        for(int i = 0; i < INDEX_BLUE_EOF + 1; i++){
+            printf("Data = %x\r\n",  Flash_Save_data[i]);
+        }
+#endif // PYJ.2019.07.31_END -- 
+    Flash_Save_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Flash_Save_data[Type], Flash_Save_data[Length]);
+    RF_Ctrl_Main(&Flash_Save_data[INDEX_BLUE_HEADER]);
+    RF_Status_Get();
+}
+void Power_ON_OFF_Initialize(void){
+  /* * * PATH PLL ON OFF SECTION* * */
+  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port   ,PATH_EN_3_5G_H_Pin   , GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port  ,PATH_EN_3_5G_DL_Pin  , GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port  ,PATH_EN_3_5G_UL_Pin  , GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port   ,PATH_EN_3_5G_L_Pin   , GPIO_PIN_RESET);  
+  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);  
+  HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port  ,PATH_EN_2_1G_DL_Pin  , GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port  ,PATH_EN_2_1G_UL_Pin  , GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port  ,PATH_EN_1_8G_DL_Pin  , GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port  ,PATH_EN_1_8G_UL_Pin  , GPIO_PIN_RESET);
+  /* * * TDD SECTION* * */
+  HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
+  HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);   
+  HAL_Delay(1);
+}
+
+void Error_Message_Occur(PLL_Error mode){
+  static uint8_t temp_data[7]; 
+  temp_data[INDEX_BLUE_HEADER]       = BLUECELL_HEADER;
+  temp_data[INDEX_BLUE_TYPE]         = TYPE_BLUECELL_ERROR;
+  temp_data[INDEX_BLUE_LENGTH]       = 4;
+  temp_data[INDEX_BLUE_CRCINDEX + 0] = INDEX_BLUE_CRCINDEX + 2;
+ 
+ 
+  switch(mode){
+    case DL_1_8:
+      temp_data[INDEX_BLUE_CRCINDEX + 1] = DL_1_8;
+      break;
+    case UL_1_8:
+      temp_data[INDEX_BLUE_CRCINDEX + 1] = UL_1_8;
+      break;
+    case DL_2_1:
+      temp_data[INDEX_BLUE_CRCINDEX + 1] = DL_2_1;
+      break;
+    case UL_2_1:
+      temp_data[INDEX_BLUE_CRCINDEX + 1] = UL_2_1;
+      break;
+  }
+  temp_data[INDEX_BLUE_CRCINDEX + 2] = STH30_CreateCrc(&temp_data[Type], temp_data[Length]);
+  temp_data[INDEX_BLUE_CRCINDEX + 3] = BLUECELL_TAILER;
+  HAL_UART_Transmit_DMA(&huart1,&temp_data[INDEX_BLUE_HEADER],temp_data[INDEX_BLUE_LENGTH]  + 3); 
+}
+void Pol_Delay_us(volatile uint32_t microseconds)
+{
+  /* Go to number of cycles for system */
+  microseconds *= (SystemCoreClock / 1000000);
+ 
+  /* Delay till end */
+  while (microseconds--);
+}
+void Boot_LED_Toggle(void){
+  if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
+}
+void ADC_Check(void){
+      if(AdcTimerCnt > 2500){
+          for(uint8_t i = 0; i< ADC_EA; i++ ){
+          Prev_data[INDEX_DET_1_8G_DL_IN_H + i*2]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
+          Prev_data[INDEX_DET_1_8G_DL_IN_L + i*2]     = (uint16_t)(ADCvalue[i] & 0x00FF);
+          AdcTimerCnt = 0;
+#if 0 // PYJ.2019.08.09_BEGIN -- 
+          printf("Prev_data[%d] : %x",i,Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
+          printf("%x\r\n",i,Prev_data[INDEX_DET_1_8G_DL_IN_L + i]);            
+#endif // PYJ.2019.08.09_END -- 
+         }
+      }
+}
+void Uart_Check(void){
+  while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
+}
+

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/includes(8164).h

@@ -0,0 +1,44 @@
+/*
+ * includes.h
+ *
+ *  Created on: 2019. 7. 28.
+ *      Author: parkyj
+ */
+
+#ifndef INCLUDES_H_
+#define INCLUDES_H_
+//#include "main.h"
+#if 0 // PYJ.2019.07.28_BEGIN -- 
+typedef enum{
+    TYPE_PATH_EN_1_8G_DL  = 0 , 
+    TYPE_PATH_EN_1_8G_UL  ,
+    TYPE_PATH_EN_2_1G_DL  ,
+    TYPE_PATH_EN_2_1G_UL  ,
+    TYPE_PATH_EN_3_5G_L   ,
+    TYPE_PATH_EN_3_5G_H   ,
+    TYPE_PATH_EN_3_5G_DL  ,
+    TYPE_PATH_EN_3_5G_UL  ,
+    TYPE_PLL_ON_OFF_3_5G_L,
+    TYPE_PLL_ON_OFF_3_5G_H,
+}Bluecell_Power_Index;
+#endif // PYJ.2019.07.28_END -- 
+typedef enum{
+  DL_1_8 = 0,
+  UL_1_8,
+  DL_2_1,
+  UL_2_1,
+}PLL_Error;
+
+void Power_ON_OFF_Ctrl(uint8_t type,uint8_t cmd);
+void Path_Init(void);
+void ATTEN_PLL_PATH_Initialize(void);
+char *Bluecell_Prot_IndexStr[];
+
+void Error_Message_Occur(PLL_Error mode);
+void Pol_Delay_us(volatile uint32_t microseconds);
+void Boot_LED_Toggle(void);
+void ADC_Check(void);
+void Uart_Check(void);
+
+
+#endif /* INCLUDES_H_ */

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/pll_4113(8086).c

@@ -0,0 +1,327 @@
+/**************************************************************************************************
+  Filename:       hal_adf4113.c
+  Revised:        $Date: 2013-11-17 $
+  Revision:       $Revision:  $
+  Description:   This file contains the interface to the ADF4113 frequency synthesizer.
+**************************************************************************************************/
+#include "pll_4113.h"
+#include "includes.h"
+#include "zig_operate.h"
+#include "main.h"
+void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2);
+
+uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN);
+
+#define ADF4113_PRESCALE8         0
+#define ADF4113_PRESCALE16        1
+#define ADF4113_PRESCALE32        2
+#define ADF4113_PRESCALE64        3
+// ADF4113 Prescale value for minimum required division ratio
+#define ADF4113_PRE8_MIN_N        56
+#define ADF4113_PRE16_MIN_N       240
+#define ADF4113_PRE32_MIN_N       992
+#define ADF4113_PRE64_MIN_N       4032
+// Frequency Settings
+// Initally, the synthesizer will operate at 2450 MHz
+#define ADF4113_CH_STEP          50000
+#define HAL_SYN_INVALID_PRESCALE  0x04
+#define ADF4113_REF_FREQ_MHZ    13000000
+
+uint8_t PLL_1_8_DL_Error_Cnt = 0;
+uint8_t PLL_1_8_UL_Error_Cnt = 0;
+uint8_t PLL_2_1_DL_Error_Cnt = 0;
+uint8_t PLL_2_1_UL_Error_Cnt = 0;
+
+
+PLL_Setting_st ADF4113_1_8G_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_DL_GPIO_Port,    
+    PLL_EN_1_8G_DL_Pin,
+};
+PLL_Setting_st ADF4113_1_8G_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_UL_GPIO_Port,    
+    PLL_EN_1_8G_UL_Pin,
+};
+PLL_Setting_st ADF4113_2_1G_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st ADF4113_2_1G_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+
+
+
+// Error Code
+typedef struct{
+    uint16_t B;
+    uint16_t P;
+    uint16_t A;   
+    uint16_t N;       
+}Adf4113_st;
+void ADF4113_Initialize(void){
+  if(Flash_Save_data[INDEX_PLL_1_8G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_DL_L] == 0){
+    Flash_Save_data[INDEX_PLL_1_8G_DL_H] = ((16000 & 0xFF00) >> 8);//0x47;
+    Flash_Save_data[INDEX_PLL_1_8G_DL_L] = (16000& 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_1_8G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_1_8G_UL_L] == 0){
+    Flash_Save_data[INDEX_PLL_1_8G_UL_H] = ((14550 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_1_8G_UL_L] = (14550 & 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_2_1G_DL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_DL_L] == 0){
+    Flash_Save_data[INDEX_PLL_2_1G_DL_H] = ((19950 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_DL_L] = (19950 & 0x00FF);
+  }
+  if(Flash_Save_data[INDEX_PLL_2_1G_UL_H] == 0 && Flash_Save_data[INDEX_PLL_2_1G_UL_L] == 0){
+    Flash_Save_data[INDEX_PLL_2_1G_UL_H] = ((22950 & 0xFF00) >> 8);
+    Flash_Save_data[INDEX_PLL_2_1G_UL_L] = (22950 & 0x00FF);    
+  }
+//    ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+//    HAL_Delay(1);
+//    ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+}
+
+
+void ADF4113_Check(void){
+  uint16_t temp_val = 0;
+    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_DL_GPIO_Port, PLL_LD_1_8G_DL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_1_8G_DL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_DL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+            ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x000410,0x03E801,0x9F8092);
+      if(PLL_1_8_DL_Error_Cnt == 3){
+        Error_Message_Occur(DL_1_8);
+      }
+      if(PLL_1_8_DL_Error_Cnt < 4)
+        PLL_1_8_DL_Error_Cnt++;    
+      HAL_Delay(1);
+    }else{
+      PLL_1_8_DL_Error_Cnt = 0;
+    }
+
+    
+    if(HAL_GPIO_ReadPin(PLL_LD_1_8G_UL_GPIO_Port, PLL_LD_1_8G_UL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_1_8G_UL_H] << 8) | (Prev_data[INDEX_PLL_1_8G_UL_L]);
+      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+    //      ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x000410,0x038D31,0x9f8092);
+      if(PLL_1_8_UL_Error_Cnt == 3){
+        Error_Message_Occur(UL_1_8);
+      }
+      if(PLL_1_8_UL_Error_Cnt < 4)
+        PLL_1_8_UL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_1_8_UL_Error_Cnt = 0;
+    }
+    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_DL_GPIO_Port, PLL_LD_2_1G_DL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_2_1G_DL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_DL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+          ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,0x4DE71,0x9F8092);
+      if(PLL_2_1_DL_Error_Cnt == 3){
+        Error_Message_Occur(DL_2_1);
+      }
+      
+      if(PLL_2_1_DL_Error_Cnt < 4)
+        PLL_2_1_DL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_2_1_DL_Error_Cnt = 0;
+    }
+
+    
+    if(HAL_GPIO_ReadPin(PLL_LD_2_1G_UL_GPIO_Port, PLL_LD_2_1G_UL_Pin) == GPIO_PIN_RESET){
+      temp_val = (Prev_data[INDEX_PLL_2_1G_UL_H] << 8) | (Prev_data[INDEX_PLL_2_1G_UL_L]);
+//      ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+          ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x000410,0x59A31,0x9f8092);
+      if(PLL_2_1_UL_Error_Cnt == 3){
+        Error_Message_Occur(UL_2_1);
+      }
+      if(PLL_2_1_UL_Error_Cnt < 4)
+        PLL_2_1_UL_Error_Cnt++;
+      HAL_Delay(1);
+    }else{
+      PLL_2_1_UL_Error_Cnt = 0;
+    }
+}
+
+
+uint32_t halSynSetFreq(uint32_t rf_Freq)
+{
+    uint32_t  R, B;
+    uint32_t  A, P, p_mode;
+    uint32_t  N_val = 0;
+    N_val = (rf_Freq / ADF4113_CH_STEP);
+    if( N_val < ADF4113_PRE8_MIN_N) { 
+        return HAL_SYN_INVALID_PRESCALE; 
+    } else if(( N_val> ADF4113_PRE8_MIN_N) && (N_val < ADF4113_PRE16_MIN_N)) { 
+        P = 8;  
+        p_mode = ADF4113_PRESCALE8;
+    } else if(( N_val > ADF4113_PRE16_MIN_N) && (N_val < ADF4113_PRE32_MIN_N)) { 
+        P = 16;
+        p_mode = ADF4113_PRESCALE16;
+        
+    } else if((N_val > ADF4113_PRE32_MIN_N) && ( N_val < ADF4113_PRE64_MIN_N)) { 
+        P = 32;
+        p_mode = ADF4113_PRESCALE32;
+        
+    } else if( N_val > ADF4113_PRE64_MIN_N) { 
+        P = 64; 
+        p_mode = ADF4113_PRESCALE64;
+    }
+    P = 32;
+    B = N_val / P;
+    A = N_val -(B * P);
+//    printf("FREQ:%f Mhz  B : %d , A  : %d    N_VAL  : %d \r\n",(float)(rf_Freq/1000000),B,A,N_val);
+//    printf("YJ 4113 : %x \r\n",N_Counter_Latch_Create(A,B,0));
+  return N_Counter_Latch_Create(A,B,0);
+}
+uint32_t N_Counter_Latch_Create(uint16_t _ACOUNTER,uint16_t _BCOUNTER,uint8_t _CPGAIN){
+    uint32_t ret = 0;
+    uint32_t shift_bit = 0x01;
+    uint8_t control_bit = 1;
+    uint8_t i = 0;
+    uint8_t reserve = 0;
+//    printf("_ACOUNTER : %d _BCOUNTER : %d \r\n",_ACOUNTER,_BCOUNTER);
+//    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+    for(i = 0; i < 2; i++){
+        if(control_bit & 0x01)
+            ret += shift_bit << i;
+        control_bit = control_bit >> 1;
+    }
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 2; i < 8; i++){
+        if(_ACOUNTER & 0x01)
+            ret += shift_bit << i;
+        _ACOUNTER = _ACOUNTER >> 1;
+    }  
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    for(i = 8; i < 21; i++){
+        if(_BCOUNTER & 0x01)
+            ret += shift_bit << i;
+        _BCOUNTER = _BCOUNTER >> 1;
+    }      
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    if(_CPGAIN & 0x01)
+            ret += shift_bit << i++;
+    for(i = 22; i < 24; i++){
+        if(reserve & 0x01)
+            ret += shift_bit << i;
+        reserve = reserve >> 1;
+    }   
+#ifdef DEBUG_PRINT
+    printf("\r\nLINE : %d  ret : %x\r\n",__LINE__,ret);
+#endif /* DEBUG_PRINT */
+    return ret;
+}
+void ADF4113_Module_Ctrl(PLL_Setting_st pll,uint32_t R0,uint32_t R1,uint32_t R2){
+    R2 = R2 & 0xFFFFFF;
+    R1 = R1 & 0xFFFFFF;
+    R0 = R0 & 0xFFFFFF;
+    
+    HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+    /*   R2 Ctrl    */
+     for(int i =0; i < 24; i++){
+         if(R2 & 0x800000){
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+         }
+         else{
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");
+#endif // PYJ.2019.08.11_END -- 
+             HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+         }
+          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+         Pol_Delay_us(10);
+          HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+         R2 = ((R2 << 1) & 0xFFFFFF);
+     }
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+     printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+     Pol_Delay_us(10);
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+        /*   R0 Ctrl    */
+   
+    for(int i =0; i < 24; i++){
+        if(R0 & 0x800000){
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+        }
+        else{
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");
+#endif // PYJ.2019.08.11_END -- 
+        }
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+        Pol_Delay_us(10);
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+        R0 = ((R0 << 1) & 0xFFFFFF);
+    }  
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+        printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+     
+     Pol_Delay_us(10);
+     HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);    
+     /*   R1 Ctrl    */
+    for(int i =0; i < 24; i++){
+        if(R1 & 0x800000){
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("1");
+#endif // PYJ.2019.08.11_END -- 
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_SET);
+        }
+        else{
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+            printf("0");            
+#endif // PYJ.2019.08.11_END -- 
+            HAL_GPIO_WritePin(pll.PLL_DATA_PORT, pll.PLL_DATA_PIN, GPIO_PIN_RESET);
+        }
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_SET);
+        Pol_Delay_us(10);
+         HAL_GPIO_WritePin(pll.PLL_CLK_PORT, pll.PLL_CLK_PIN, GPIO_PIN_RESET);
+        R1 = ((R1 << 1) & 0xFFFFFF);
+    }
+#if 0 // PYJ.2019.08.11_BEGIN -- 
+        printf("\r\n");
+#endif // PYJ.2019.08.11_END -- 
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_SET);
+    Pol_Delay_us(10);
+    HAL_GPIO_WritePin(pll.PLL_ENABLE_PORT, pll.PLL_ENABLE_PIN, GPIO_PIN_RESET);
+
+}