주석 수정

Debug/STM32F103_ATTEN_PLL_Zig.map

@@ -1262,7 +1262,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x08004000                g_pfnVectors
                 0x080041e4                . = ALIGN (0x4)
 
-.text           0x080041e8     0x7c2c
+.text           0x080041e8     0x7c04
                 0x080041e8                . = ALIGN (0x4)
  *(.text)
  .text          0x080041e8       0x40 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
@@ -1724,372 +1724,371 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x08008b30                RF_Status_Get
  *fill*         0x08008b6c        0x4 
  .text.RF_Operate
-                0x08008b70      0x85c Src\zig_operate.o
+                0x08008b70      0x838 Src\zig_operate.o
                 0x08008b70                RF_Operate
  .text.RF_Ctrl_Main
-                0x080093cc       0xac Src\zig_operate.o
-                0x080093cc                RF_Ctrl_Main
+                0x080093a8       0xac Src\zig_operate.o
+                0x080093a8                RF_Ctrl_Main
  .text.Reset_Handler
-                0x08009478       0x48 startup\startup_stm32f103xe.o
-                0x08009478                Reset_Handler
+                0x08009454       0x48 startup\startup_stm32f103xe.o
+                0x08009454                Reset_Handler
  .text.Default_Handler
-                0x080094c0        0x2 startup\startup_stm32f103xe.o
-                0x080094c0                RTC_Alarm_IRQHandler
-                0x080094c0                EXTI2_IRQHandler
-                0x080094c0                TIM8_TRG_COM_IRQHandler
-                0x080094c0                TIM8_CC_IRQHandler
-                0x080094c0                TIM1_CC_IRQHandler
-                0x080094c0                PVD_IRQHandler
-                0x080094c0                SDIO_IRQHandler
-                0x080094c0                EXTI3_IRQHandler
-                0x080094c0                EXTI0_IRQHandler
-                0x080094c0                I2C2_EV_IRQHandler
-                0x080094c0                ADC1_2_IRQHandler
-                0x080094c0                SPI1_IRQHandler
-                0x080094c0                TAMPER_IRQHandler
-                0x080094c0                TIM8_UP_IRQHandler
-                0x080094c0                DMA2_Channel2_IRQHandler
-                0x080094c0                USART3_IRQHandler
-                0x080094c0                RTC_IRQHandler
-                0x080094c0                DMA1_Channel7_IRQHandler
-                0x080094c0                CAN1_RX1_IRQHandler
-                0x080094c0                UART5_IRQHandler
-                0x080094c0                ADC3_IRQHandler
-                0x080094c0                TIM4_IRQHandler
-                0x080094c0                DMA2_Channel1_IRQHandler
-                0x080094c0                I2C1_EV_IRQHandler
-                0x080094c0                DMA1_Channel6_IRQHandler
-                0x080094c0                UART4_IRQHandler
-                0x080094c0                TIM3_IRQHandler
-                0x080094c0                RCC_IRQHandler
-                0x080094c0                TIM1_TRG_COM_IRQHandler
-                0x080094c0                Default_Handler
-                0x080094c0                EXTI15_10_IRQHandler
-                0x080094c0                TIM7_IRQHandler
-                0x080094c0                TIM5_IRQHandler
-                0x080094c0                EXTI9_5_IRQHandler
-                0x080094c0                SPI2_IRQHandler
-                0x080094c0                EXTI4_IRQHandler
-                0x080094c0                USB_LP_CAN1_RX0_IRQHandler
-                0x080094c0                USB_HP_CAN1_TX_IRQHandler
-                0x080094c0                DMA1_Channel3_IRQHandler
-                0x080094c0                FSMC_IRQHandler
-                0x080094c0                TIM1_UP_IRQHandler
-                0x080094c0                WWDG_IRQHandler
-                0x080094c0                TIM2_IRQHandler
-                0x080094c0                TIM1_BRK_IRQHandler
-                0x080094c0                EXTI1_IRQHandler
-                0x080094c0                DMA2_Channel4_5_IRQHandler
-                0x080094c0                USART2_IRQHandler
-                0x080094c0                I2C2_ER_IRQHandler
-                0x080094c0                DMA1_Channel2_IRQHandler
-                0x080094c0                TIM8_BRK_IRQHandler
-                0x080094c0                CAN1_SCE_IRQHandler
-                0x080094c0                FLASH_IRQHandler
-                0x080094c0                SPI3_IRQHandler
-                0x080094c0                I2C1_ER_IRQHandler
-                0x080094c0                USBWakeUp_IRQHandler
-                0x080094c0                DMA2_Channel3_IRQHandler
- *fill*         0x080094c2        0x2 
- .text.__errno  0x080094c4        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-errno.o)
-                0x080094c4                __errno
+                0x0800949c        0x2 startup\startup_stm32f103xe.o
+                0x0800949c                RTC_Alarm_IRQHandler
+                0x0800949c                EXTI2_IRQHandler
+                0x0800949c                TIM8_TRG_COM_IRQHandler
+                0x0800949c                TIM8_CC_IRQHandler
+                0x0800949c                TIM1_CC_IRQHandler
+                0x0800949c                PVD_IRQHandler
+                0x0800949c                SDIO_IRQHandler
+                0x0800949c                EXTI3_IRQHandler
+                0x0800949c                EXTI0_IRQHandler
+                0x0800949c                I2C2_EV_IRQHandler
+                0x0800949c                ADC1_2_IRQHandler
+                0x0800949c                SPI1_IRQHandler
+                0x0800949c                TAMPER_IRQHandler
+                0x0800949c                TIM8_UP_IRQHandler
+                0x0800949c                DMA2_Channel2_IRQHandler
+                0x0800949c                USART3_IRQHandler
+                0x0800949c                RTC_IRQHandler
+                0x0800949c                DMA1_Channel7_IRQHandler
+                0x0800949c                CAN1_RX1_IRQHandler
+                0x0800949c                UART5_IRQHandler
+                0x0800949c                ADC3_IRQHandler
+                0x0800949c                TIM4_IRQHandler
+                0x0800949c                DMA2_Channel1_IRQHandler
+                0x0800949c                I2C1_EV_IRQHandler
+                0x0800949c                DMA1_Channel6_IRQHandler
+                0x0800949c                UART4_IRQHandler
+                0x0800949c                TIM3_IRQHandler
+                0x0800949c                RCC_IRQHandler
+                0x0800949c                TIM1_TRG_COM_IRQHandler
+                0x0800949c                Default_Handler
+                0x0800949c                EXTI15_10_IRQHandler
+                0x0800949c                TIM7_IRQHandler
+                0x0800949c                TIM5_IRQHandler
+                0x0800949c                EXTI9_5_IRQHandler
+                0x0800949c                SPI2_IRQHandler
+                0x0800949c                EXTI4_IRQHandler
+                0x0800949c                USB_LP_CAN1_RX0_IRQHandler
+                0x0800949c                USB_HP_CAN1_TX_IRQHandler
+                0x0800949c                DMA1_Channel3_IRQHandler
+                0x0800949c                FSMC_IRQHandler
+                0x0800949c                TIM1_UP_IRQHandler
+                0x0800949c                WWDG_IRQHandler
+                0x0800949c                TIM2_IRQHandler
+                0x0800949c                TIM1_BRK_IRQHandler
+                0x0800949c                EXTI1_IRQHandler
+                0x0800949c                DMA2_Channel4_5_IRQHandler
+                0x0800949c                USART2_IRQHandler
+                0x0800949c                I2C2_ER_IRQHandler
+                0x0800949c                DMA1_Channel2_IRQHandler
+                0x0800949c                TIM8_BRK_IRQHandler
+                0x0800949c                CAN1_SCE_IRQHandler
+                0x0800949c                FLASH_IRQHandler
+                0x0800949c                SPI3_IRQHandler
+                0x0800949c                I2C1_ER_IRQHandler
+                0x0800949c                USBWakeUp_IRQHandler
+                0x0800949c                DMA2_Channel3_IRQHandler
+ *fill*         0x0800949e        0x2 
+ .text.__errno  0x080094a0        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-errno.o)
+                0x080094a0                __errno
  .text.__libc_init_array
-                0x080094d0       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-init.o)
-                0x080094d0                __libc_init_array
- .text.memcpy   0x08009518       0x16 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memcpy-stub.o)
-                0x08009518                memcpy
- .text.memset   0x0800952e       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memset.o)
-                0x0800952e                memset
- .text.__cvt    0x0800953e       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x0800953e                __cvt
+                0x080094ac       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-init.o)
+                0x080094ac                __libc_init_array
+ .text.memcpy   0x080094f4       0x16 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memcpy-stub.o)
+                0x080094f4                memcpy
+ .text.memset   0x0800950a       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-memset.o)
+                0x0800950a                memset
+ .text.__cvt    0x0800951a       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x0800951a                __cvt
  .text.__exponent
-                0x080095f6       0x6a c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x080095f6                __exponent
+                0x080095d2       0x6a c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x080095d2                __exponent
  .text._printf_float
-                0x08009660      0x470 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
-                0x08009660                _printf_float
+                0x0800963c      0x470 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_float.o)
+                0x0800963c                _printf_float
  .text._printf_common
-                0x08009ad0       0xee c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x08009ad0                _printf_common
- *fill*         0x08009bbe        0x2 
+                0x08009aac       0xee c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x08009aac                _printf_common
+ *fill*         0x08009b9a        0x2 
  .text._printf_i
-                0x08009bc0      0x240 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
-                0x08009bc0                _printf_i
- .text.printf   0x08009e00       0x30 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-printf.o)
-                0x08009e00                iprintf
-                0x08009e00                printf
- .text._puts_r  0x08009e30       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
-                0x08009e30                _puts_r
- .text.puts     0x08009ee8       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
-                0x08009ee8                puts
- .text.setbuf   0x08009ef8       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setbuf.o)
-                0x08009ef8                setbuf
- .text.setvbuf  0x08009f08      0x15c c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setvbuf.o)
-                0x08009f08                setvbuf
+                0x08009b9c      0x240 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
+                0x08009b9c                _printf_i
+ .text.printf   0x08009ddc       0x30 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-printf.o)
+                0x08009ddc                iprintf
+                0x08009ddc                printf
+ .text._puts_r  0x08009e0c       0xb8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
+                0x08009e0c                _puts_r
+ .text.puts     0x08009ec4       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-puts.o)
+                0x08009ec4                puts
+ .text.setbuf   0x08009ed4       0x10 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setbuf.o)
+                0x08009ed4                setbuf
+ .text.setvbuf  0x08009ee4      0x15c c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-setvbuf.o)
+                0x08009ee4                setvbuf
  .text.__swbuf_r
-                0x0800a064       0xa4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wbuf.o)
-                0x0800a064                __swbuf_r
+                0x0800a040       0xa4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wbuf.o)
+                0x0800a040                __swbuf_r
  .text.__swsetup_r
-                0x0800a108       0xdc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wsetup.o)
-                0x0800a108                __swsetup_r
- .text.quorem   0x0800a1e4      0x118 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
- *fill*         0x0800a2fc        0x4 
- .text._dtoa_r  0x0800a300      0xba8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
-                0x0800a300                _dtoa_r
+                0x0800a0e4       0xdc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-wsetup.o)
+                0x0800a0e4                __swsetup_r
+ .text.quorem   0x0800a1c0      0x118 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
+ .text._dtoa_r  0x0800a2d8      0xba8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-dtoa.o)
+                0x0800a2d8                _dtoa_r
  .text.__sflush_r
-                0x0800aea8      0x110 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
-                0x0800aea8                __sflush_r
+                0x0800ae80      0x110 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
+                0x0800ae80                __sflush_r
  .text._fflush_r
-                0x0800afb8       0x54 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
-                0x0800afb8                _fflush_r
+                0x0800af90       0x54 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-fflush.o)
+                0x0800af90                _fflush_r
  .text._cleanup_r
-                0x0800b00c        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-findfp.o)
-                0x0800b00c                _cleanup_r
+                0x0800afe4        0xc c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-findfp.o)
+                0x0800afe4                _cleanup_r
  .text.std.isra.0
-                0x0800b018       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-findfp.o)
+                0x0800aff0       0x48 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-findfp.o)
  .text.__sfmoreglue
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-                0x0800c87d      0x101 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-ctype_.o)
-                0x0800c87d                _ctype_
-                0x0800c980                . = ALIGN (0x4)
- *fill*         0x0800c97e        0x2 
+                0x0800c7f5      0x101 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/../../../../arm-atollic-eabi/lib/armv7-m\libc_nano.a(lib_a-ctype_.o)
+                0x0800c7f5                _ctype_
+                0x0800c8f8                . = ALIGN (0x4)
+ *fill*         0x0800c8f6        0x2 
 
 .ARM.extab
  *(.ARM.extab* .gnu.linkonce.armextab.*)
 
-.ARM            0x0800c980        0x8
-                0x0800c980                __exidx_start = .
+.ARM            0x0800c8f8        0x8
+                0x0800c8f8                __exidx_start = .
  *(.ARM.exidx*)
- .ARM.exidx     0x0800c980        0x8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m\libgcc.a(_udivmoddi4.o)
-                0x0800c988                __exidx_end = .
+ .ARM.exidx     0x0800c8f8        0x8 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m\libgcc.a(_udivmoddi4.o)
+                0x0800c900                __exidx_end = .
 
-.rel.dyn        0x0800c988        0x0
- .rel.iplt      0x0800c988        0x0 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
+.rel.dyn        0x0800c900        0x0
+ .rel.iplt      0x0800c900        0x0 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
 
-.preinit_array  0x0800c988        0x0
-                0x0800c988                PROVIDE (__preinit_array_start, .)
+.preinit_array  0x0800c900        0x0
+                0x0800c900                PROVIDE (__preinit_array_start, .)
  *(.preinit_array*)
-                0x0800c988                PROVIDE (__preinit_array_end, .)
+                0x0800c900                PROVIDE (__preinit_array_end, .)
 
-.init_array     0x0800c988        0x4
-                0x0800c988                PROVIDE (__init_array_start, .)
+.init_array     0x0800c900        0x4
+                0x0800c900                PROVIDE (__init_array_start, .)
  *(SORT(.init_array.*))
  *(.init_array*)
- .init_array    0x0800c988        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
-                0x0800c98c                PROVIDE (__init_array_end, .)
+ .init_array    0x0800c900        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
+                0x0800c904                PROVIDE (__init_array_end, .)
 
-.fini_array     0x0800c98c        0x4
+.fini_array     0x0800c904        0x4
                 [!provide]                PROVIDE (__fini_array_start, .)
  *(SORT(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x0800c98c        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
+ .fini_array    0x0800c904        0x4 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
                 [!provide]                PROVIDE (__fini_array_end, .)
-                0x0800c990                _sidata = LOADADDR (.data)
+                0x0800c908                _sidata = LOADADDR (.data)
 
-.data           0x20000000      0x404 load address 0x0800c990
+.data           0x20000000      0x404 load address 0x0800c908
                 0x20000000                . = ALIGN (0x4)
                 0x20000000                _sdata = .
  *(.data)
@@ -2184,11 +2183,11 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x20000404                . = ALIGN (0x4)
                 0x20000404                _edata = .
 
-.igot.plt       0x20000404        0x0 load address 0x0800cd94
+.igot.plt       0x20000404        0x0 load address 0x0800cd0c
  .igot.plt      0x20000404        0x0 c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtbegin.o
                 0x20000404                . = ALIGN (0x4)
 
-.bss            0x20000408     0x1390 load address 0x0800cd94
+.bss            0x20000408     0x1390 load address 0x0800cd0c
                 0x20000408                _sbss = .
                 0x20000408                __bss_start__ = _sbss
  *(.bss)
@@ -2245,7 +2244,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x20001798                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x20001798      0x600 load address 0x0800cd94
+                0x20001798      0x600 load address 0x0800cd0c
                 0x20001798                . = ALIGN (0x4)
                 0x20001798                PROVIDE (end, .)
                 [!provide]                PROVIDE (_end, .)
@@ -2439,7 +2438,7 @@ LOAD c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../l
                 0x00000ec4       0x1d c:/program files (x86)/atollic/truestudio for stm32 9.3.0/armtools/bin/../lib/gcc/arm-atollic-eabi/6.3.1/armv7-m/crtn.o
 OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
 
-.debug_info     0x00000000    0x2a316
+.debug_info     0x00000000    0x2a2d1
  .debug_info    0x00000000     0x102e Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_info    0x0000102e     0x16a1 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_info    0x000026cf     0x138b Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2467,8 +2466,8 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_info    0x00024e5c      0xfe1 Src\syscalls.o
  .debug_info    0x00025e3d      0xc4d Src\system_stm32f1xx.o
  .debug_info    0x00026a8a     0x1731 Src\uart.o
- .debug_info    0x000281bb     0x20ea Src\zig_operate.o
- .debug_info    0x0002a2a5       0x71 startup\startup_stm32f103xe.o
+ .debug_info    0x000281bb     0x20a5 Src\zig_operate.o
+ .debug_info    0x0002a260       0x71 startup\startup_stm32f103xe.o
 
 .debug_abbrev   0x00000000     0x50e0
  .debug_abbrev  0x00000000      0x315 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
@@ -2501,7 +2500,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_abbrev  0x00004d6e      0x360 Src\zig_operate.o
  .debug_abbrev  0x000050ce       0x12 startup\startup_stm32f103xe.o
 
-.debug_loc      0x00000000     0x9c49
+.debug_loc      0x00000000     0x9c3b
  .debug_loc     0x00000000      0x11b Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_loc     0x0000011b      0x87e Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_loc     0x00000999      0x769 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2528,7 +2527,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_loc     0x000092ce      0x3ef Src\syscalls.o
  .debug_loc     0x000096bd       0xcd Src\system_stm32f1xx.o
  .debug_loc     0x0000978a      0x108 Src\uart.o
- .debug_loc     0x00009892      0x3b7 Src\zig_operate.o
+ .debug_loc     0x00009892      0x3a9 Src\zig_operate.o
 
 .debug_aranges  0x00000000      0xdf8
  .debug_aranges
@@ -2621,7 +2620,7 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_ranges  0x000011d0       0x40 Src\zig_operate.o
  .debug_ranges  0x00001210       0x20 startup\startup_stm32f103xe.o
 
-.debug_line     0x00000000     0x9cbf
+.debug_line     0x00000000     0x9cbe
  .debug_line    0x00000000      0x45f Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o
  .debug_line    0x0000045f      0x863 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.o
  .debug_line    0x00000cc2      0x737 Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.o
@@ -2649,8 +2648,8 @@ OUTPUT(STM32F103_ATTEN_PLL_Zig.elf elf32-littlearm)
  .debug_line    0x00008d0e      0x3c0 Src\syscalls.o
  .debug_line    0x000090ce      0x2bf Src\system_stm32f1xx.o
  .debug_line    0x0000938d      0x38d Src\uart.o
- .debug_line    0x0000971a      0x528 Src\zig_operate.o
- .debug_line    0x00009c42       0x7d startup\startup_stm32f103xe.o
+ .debug_line    0x0000971a      0x527 Src\zig_operate.o
+ .debug_line    0x00009c41       0x7d startup\startup_stm32f103xe.o
 
 .debug_str      0x00000000     0x5715
  .debug_str     0x00000000      0xc6c Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.o

Src/main.c

@@ -194,7 +194,7 @@ int main(void)
 // PYJ.2019.07.30_BEGIN -- 
     SubmitDAC(0x0FFF);
     SubmitDAC(0x13FF);
-    SubmitDAC(0x2FFF);
+    SubmitDAC(0x24FF);
     SubmitDAC(0x35FF);
     SubmitDAC(0x46FF);
     SubmitDAC(0x57FF);

Src/zig_operate.c

@@ -493,7 +493,6 @@ void RF_Operate(uint8_t* data_buf){
     if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
         Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
         Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
-
     }
     if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
         Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
@@ -527,7 +526,6 @@ void RF_Operate(uint8_t* data_buf){
         printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
         if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
             printf("PLL CTRL START !! \r\n");
-//            ADF4153_Init();
             temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
             ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
         }
@@ -578,8 +576,8 @@ void RF_Operate(uint8_t* data_buf){
     if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
         ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
         ADC_Modify = 1;
-        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
-        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
+//        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);
 
         Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
         Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
@@ -621,7 +619,7 @@ void RF_Operate(uint8_t* data_buf){
 //        SubmitDAC(0x800C);
 //        SubmitDAC(0x2FFF );
 //        SubmitDAC(0xA000);
-        printf("DAC CTRL START \r\n");
+//        printf("DAC CTRL START \r\n");
 //        SubmitDAC(0x800C);
 //        SubmitDAC(0xA000);
 

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/AD5318(6805).c

@@ -0,0 +1,31 @@
+/*
+ * AD5318.c
+ *
+ *  Created on: 2019. 7. 30.
+ *      Author: parkyj
+ */
+ #include "ad5318.h"
+void SubmitDAC(uint16_t ShiftTarget) {
+    char i; /* serial counter */
+    printf("ShiftTarget : %x \r\n",ShiftTarget);
+    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
+    for (i=0;i < 16;i++) { /* loop through all 16 data bits */
+        HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_SET); /* rise clk line again */
+        if (ShiftTarget & 0x8000) HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_SET);
+        else HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET); /* set data bit */
+        HAL_GPIO_WritePin(DA_SCLK_GPIO_Port, DA_SCLK_Pin, GPIO_PIN_RESET); /* lower clock line */
+        ShiftTarget <<= 1;
+    }
+    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET);        
+    Pol_Delay_us(10);
+    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);    
+    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_SET);    
+    HAL_GPIO_WritePin(DA_DIN_GPIO_Port, DA_DIN_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_SET);            
+    /* rise DAC SYNC line again */
+    HAL_GPIO_WritePin(DA_SYNC_GPIO_Port, DA_SYNC_Pin, GPIO_PIN_RESET);    
+    HAL_GPIO_WritePin(DA_LDAC_GPIO_Port, DA_LDAC_Pin, GPIO_PIN_RESET);            
+    
+}
+
+

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(167).c

@@ -0,0 +1,779 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim6;
+
+UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_usart1_rx;
+DMA_HandleTypeDef hdma_usart1_tx;
+
+/* USER CODE BEGIN PV */
+volatile uint32_t AdcTimerCnt = 0;
+volatile uint32_t LedTimerCnt = 0;
+volatile uint32_t UartRxTimerCnt = 0;
+//volatile uint32_t UartTxTimerCnt = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_TIM6_Init(void);
+static void MX_NVIC_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#define ADC_EA     14
+uint32_t ADCvalue[ADC_EA];
+
+#if 1 // PYJ.2019.07.26_BEGIN --
+
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+    if(htim->Instance == TIM6){
+        UartRxTimerCnt++;
+        LedTimerCnt++;
+        AdcTimerCnt++;
+    }
+} 
+#endif // PYJ.2019.07.26_END -- 
+int _write (int file, uint8_t *ptr, uint16_t len)
+{
+    HAL_UART_Transmit(&huart1, ptr, len,10);
+//    HAL_UART_Transmit_IT(&huart1, ptr, len);
+    return len;
+}
+void Pol_Delay_us(volatile uint32_t microseconds)
+{
+  /* Go to number of cycles for system */
+  microseconds *= (SystemCoreClock / 1000000);
+ 
+  /* Delay till end */
+  while (microseconds--);
+}
+/* define address bits for addressing dac outputs. */
+#define SPI_DAC_ADDR0  (1 << 12)
+#define SPI_DAC_ADDR1  (1 << 13)
+#define SPI_DAC_ADDR2  (1 << 14)
+
+/* define addresses for each dac output. */
+#define SPI_DAC_OUTPUT_A   0x00
+#define SPI_DAC_OUTPUT_B   SPI_DAC_ADDR0
+#define SPI_DAC_OUTPUT_C   SPI_DAC_ADDR1
+#define SPI_DAC_OUTPUT_D  (SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
+#define SPI_DAC_OUTPUT_E   SPI_DAC_ADDR2
+#define SPI_DAC_OUTPUT_F  (SPI_DAC_ADDR2 | SPI_DAC_ADDR0)
+#define SPI_DAC_OUTPUT_G  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1)
+#define SPI_DAC_OUTPUT_H  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
+
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+  
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_ADC1_Init();
+  MX_USART1_UART_Init();
+  MX_TIM6_Init();
+
+  /* Initialize interrupts */
+  MX_NVIC_Init();
+  /* USER CODE BEGIN 2 */
+  setbuf(stdout, NULL);
+#ifdef DEBUG_PRINT
+  printf("UART Start \r\n");
+#endif /* DEBUG_PRINT */
+  HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1);
+  PE43711_PinInit();
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_SET);  
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_SET);  
+    HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_SET);
+
+
+    HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);                
+    HAL_Delay(1);
+    Path_Init();
+    ADF4153_Init();
+//    ad53_write(0xf000);
+//    ad53_write(0xC000);
+//    ad53_write(0x8000);
+//    ad53_write(0xA000); 
+    SubmitDAC(0x800C);
+    SubmitDAC(0xA000);
+
+#if 1 // PYJ.2019.07.30_BEGIN -- 
+    
+    SubmitDAC(0x0FFF);
+    SubmitDAC(0x13FF);
+    SubmitDAC(0x23FF);
+    SubmitDAC(0x35FF);
+    SubmitDAC(0x46FF);
+    SubmitDAC(0x57FF);
+    SubmitDAC(0x68FF);
+    SubmitDAC(0x79FF);
+#endif // PYJ.2019.07.30_END -- 
+        
+//    ad53_write(0x2BFF);
+
+#ifdef DEBUG_PRINT
+  printf("\r\nPLL_EN_3_5G_L_GPIO_Port\r\n");
+#endif /* DEBUG_PRINT */
+  
+#ifdef DEBUG_PRINT
+  printf("\r\nPLL_EN_2_1G_UL_GPIO_Port\r\n");
+#endif /* DEBUG_PRINT */
+
+  PLL_Setting_st Pll_test3 = {
+      PLL_CLK_GPIO_Port,
+      PLL_CLK_Pin,
+      PLL_DATA_GPIO_Port,
+      PLL_DATA_Pin,
+      PLL_EN_2_1G_UL_GPIO_Port,    
+      PLL_EN_2_1G_UL_Pin,
+  };
+  ADF4113_Module_Ctrl(Pll_test3,0x000410,0x59A31,0x9f8092);
+  HAL_Delay(1);
+#ifdef DEBUG_PRINT
+  printf("\r\nPLL_EN_2_1G_DL_GPIO_Port\r\n");
+#endif /* DEBUG_PRINT */
+    
+  PLL_Setting_st Pll_test4 = {
+      PLL_CLK_GPIO_Port,
+      PLL_CLK_Pin,
+      PLL_DATA_GPIO_Port,
+      PLL_DATA_Pin,
+      PLL_EN_2_1G_DL_GPIO_Port,    
+      PLL_EN_2_1G_DL_Pin,
+  };
+  ADF4113_Module_Ctrl(Pll_test4,0x410,0x4DE71,0x9F8092);
+
+    HAL_Delay(1);
+#ifdef DEBUG_PRINT
+    printf("\r\nPLL_EN_1_8G_UL_GPIO_Port\r\n");
+#endif /* DEBUG_PRINT */
+    PLL_Setting_st Pll_test5 = {
+        PLL_CLK_GPIO_Port,
+        PLL_CLK_Pin,
+        PLL_DATA_GPIO_Port,
+        PLL_DATA_Pin,
+        PLL_EN_1_8G_UL_GPIO_Port,    
+        PLL_EN_1_8G_UL_Pin,
+  };
+  ADF4113_Module_Ctrl(Pll_test5,0x000410,0x038D31,0x9f8092);
+    HAL_Delay(1);
+#ifdef DEBUG_PRINT
+    printf("\r\nPLL_EN_1_8G_DL_GPIO_Port\r\n");
+#endif /* DEBUG_PRINT */
+    PLL_Setting_st Pll_test6 = {
+        PLL_CLK_GPIO_Port,
+        PLL_CLK_Pin,
+        PLL_DATA_GPIO_Port,
+        PLL_DATA_Pin,
+        PLL_EN_1_8G_DL_GPIO_Port,    
+        PLL_EN_1_8G_DL_Pin,
+  };
+  ADF4113_Module_Ctrl(Pll_test6,0x000410,0x03E801,0x9F8092);
+  BDA4601_Test();
+  HAL_ADCEx_Calibration_Start(&hadc1);
+
+
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
+  while (1)
+  {
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
+    while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
+    if(AdcTimerCnt > 3000){
+        HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);  
+        for(uint8_t i = 0; i< ADC_EA; i++){
+            Prev_data[INDEX_DET_1_8G_DL_IN_H + i]     = ((ADCvalue[i] & 0x0F00) >> 8);
+            Prev_data[INDEX_DET_1_8G_DL_IN_L + i] = (ADCvalue[i] & 0x00FF);
+//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_H + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
+//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_L + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L + i]);            
+        }
+#if 1 // PYJ.2019.07.29_BEGIN -- 
+//        printf("====================================\r\n");
+//            for(uint8_t i = 0; i< ADC_EA; i++){
+//                printf("%x ",ADCvalue[i]);
+//                printf("%d",ADCvalue[i]);
+//                printf("\r\n");
+//            }
+//                printf("\r\nADC[%d] : %d\r\n ",i,ADCvalue[i]);
+//        printf("====================================\r\n");
+#endif // PYJ.2019.07.29_END -- 
+        AdcTimerCnt = 0;
+
+    }
+
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief NVIC Configuration.
+  * @retval None
+  */
+static void MX_NVIC_Init(void)
+{
+  /* USART1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* TIM6_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+  /* DMA1_Channel4_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
+  /* DMA1_Channel5_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+  /** Common config 
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+  hadc1.Init.ContinuousConvMode = ENABLE;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.NbrOfConversion = 14;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_0;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_1;
+  sConfig.Rank = ADC_REGULAR_RANK_2;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_2;
+  sConfig.Rank = ADC_REGULAR_RANK_3;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_3;
+  sConfig.Rank = ADC_REGULAR_RANK_4;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_4;
+  sConfig.Rank = ADC_REGULAR_RANK_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_5;
+  sConfig.Rank = ADC_REGULAR_RANK_6;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+  sConfig.Rank = ADC_REGULAR_RANK_7;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_7;
+  sConfig.Rank = ADC_REGULAR_RANK_8;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_8;
+  sConfig.Rank = ADC_REGULAR_RANK_9;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_9;
+  sConfig.Rank = ADC_REGULAR_RANK_10;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_10;
+  sConfig.Rank = ADC_REGULAR_RANK_11;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_11;
+  sConfig.Rank = ADC_REGULAR_RANK_12;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_12;
+  sConfig.Rank = ADC_REGULAR_RANK_13;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_13;
+  sConfig.Rank = ADC_REGULAR_RANK_14;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM6 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM6_Init(void)
+{
+
+  /* USER CODE BEGIN TIM6_Init 0 */
+
+  /* USER CODE END TIM6_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM6_Init 1 */
+
+  /* USER CODE END TIM6_Init 1 */
+  htim6.Instance = TIM6;
+  htim6.Init.Prescaler = 6000-1;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim6.Init.Period = 10;
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM6_Init 2 */
+
+  /* USER CODE END TIM6_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/** 
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void) 
+{
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
+                          |BOOT_LED_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
+                           PLL_EN_3_5G_H_Pin PLL_ON_OFF_3_5G_L_Pin PLL_DATA_3_5G_Pin PLL_ON_OFF_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
+                           PATH_EN_3_5G_L_Pin */
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |PATH_EN_3_5G_L_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
+                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin 
+                           BOOT_LED_Pin */
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
+                          |BOOT_LED_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
+  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{ 
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/main(2638).c

@@ -0,0 +1,752 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+DMA_HandleTypeDef hdma_adc1;
+
+TIM_HandleTypeDef htim6;
+
+UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_usart1_rx;
+DMA_HandleTypeDef hdma_usart1_tx;
+
+/* USER CODE BEGIN PV */
+volatile uint32_t AdcTimerCnt = 0;
+volatile uint32_t LedTimerCnt = 0;
+volatile uint32_t UartRxTimerCnt = 0;
+extern PLL_Setting_st Pll_3_5_H;
+extern PLL_Setting_st Pll_3_5_L;
+
+//volatile uint32_t UartTxTimerCnt = 0;
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_TIM6_Init(void);
+static void MX_NVIC_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+uint32_t ADCvalue[ADC_EA];
+
+#if 1 // PYJ.2019.07.26_BEGIN --
+
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+    if(htim->Instance == TIM6){
+        UartRxTimerCnt++;
+        LedTimerCnt++;
+        AdcTimerCnt++;
+    }
+} 
+#endif // PYJ.2019.07.26_END -- 
+int _write (int file, uint8_t *ptr, uint16_t len)
+{
+    HAL_UART_Transmit(&huart1, ptr, len,10);
+//    HAL_UART_Transmit_IT(&huart1, ptr, len);
+    return len;
+}
+void Pol_Delay_us(volatile uint32_t microseconds)
+{
+  /* Go to number of cycles for system */
+  microseconds *= (SystemCoreClock / 1000000);
+ 
+  /* Delay till end */
+  while (microseconds--);
+}
+/* define address bits for addressing dac outputs. */
+#define SPI_DAC_ADDR0  (1 << 12)
+#define SPI_DAC_ADDR1  (1 << 13)
+#define SPI_DAC_ADDR2  (1 << 14)
+
+/* define addresses for each dac output. */
+#define SPI_DAC_OUTPUT_A   0x00
+#define SPI_DAC_OUTPUT_B   SPI_DAC_ADDR0
+#define SPI_DAC_OUTPUT_C   SPI_DAC_ADDR1
+#define SPI_DAC_OUTPUT_D  (SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
+#define SPI_DAC_OUTPUT_E   SPI_DAC_ADDR2
+#define SPI_DAC_OUTPUT_F  (SPI_DAC_ADDR2 | SPI_DAC_ADDR0)
+#define SPI_DAC_OUTPUT_G  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1)
+#define SPI_DAC_OUTPUT_H  (SPI_DAC_ADDR2 | SPI_DAC_ADDR1 | SPI_DAC_ADDR0)
+
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+  
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_DMA_Init();
+  MX_ADC1_Init();
+  MX_USART1_UART_Init();
+  MX_TIM6_Init();
+
+  /* Initialize interrupts */
+  MX_NVIC_Init();
+  /* USER CODE BEGIN 2 */
+  setbuf(stdout, NULL);
+#ifdef DEBUG_PRINT
+  printf("UART Start \r\n");
+#endif /* DEBUG_PRINT */
+    HAL_UART_Receive_DMA(&huart1, TerminalQueue.Buffer, 1);
+    PE43711_PinInit();
+    
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_H_GPIO_Port,PATH_EN_3_5G_H_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_DL_GPIO_Port,PATH_EN_3_5G_DL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_UL_GPIO_Port,PATH_EN_3_5G_UL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PATH_EN_3_5G_L_GPIO_Port,PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);  
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_H_GPIO_Port,PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PLL_ON_OFF_3_5G_L_GPIO_Port,PLL_ON_OFF_3_5G_L_Pin, GPIO_PIN_RESET);  
+    HAL_GPIO_WritePin(PATH_EN_2_1G_DL_GPIO_Port,PATH_EN_2_1G_DL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PATH_EN_2_1G_UL_GPIO_Port,PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PATH_EN_1_8G_DL_GPIO_Port,PATH_EN_1_8G_DL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(PATH_EN_1_8G_UL_GPIO_Port,PATH_EN_1_8G_UL_Pin, GPIO_PIN_RESET);
+
+    
+    HAL_GPIO_WritePin(_T_SYNC_UL_GPIO_Port,_T_SYNC_UL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(T_SYNC_UL_GPIO_Port,T_SYNC_UL_Pin, GPIO_PIN_RESET);
+    HAL_GPIO_WritePin(_T_SYNC_DL_GPIO_Port,_T_SYNC_DL_Pin, GPIO_PIN_SET);
+    HAL_GPIO_WritePin(T_SYNC_DL_GPIO_Port,T_SYNC_DL_Pin, GPIO_PIN_SET);     
+    
+    HAL_Delay(1);
+    Path_Init();
+    ADF4153_Init();
+    SubmitDAC(0x800C);
+    SubmitDAC(0xA000);
+    HAL_Delay(1);
+#if 1
+// PYJ.2019.07.30_BEGIN -- 
+    SubmitDAC(0x0FFF);
+    SubmitDAC(0x13FF);
+    SubmitDAC(0x2FFF);
+    SubmitDAC(0x35FF);
+    SubmitDAC(0x46FF);
+    SubmitDAC(0x57FF);
+    SubmitDAC(0x68FF);
+    SubmitDAC(0x79FF);
+#endif // PYJ.2019.07.30_END -- 
+        
+//    ad53_write(0x2BFF);
+
+#ifdef DEBUG_PRINT
+  printf("\r\nPLL_EN_3_5G_L_GPIO_Port\r\n");
+#endif /* DEBUG_PRINT */
+  
+#ifdef DEBUG_PRINT
+  printf("\r\nPLL_EN_2_1G_UL_GPIO_Port\r\n");
+#endif /* DEBUG_PRINT */
+  HAL_Delay(1);
+  ADF4113_Initialize();
+//  BDA4601_Test();
+    HAL_ADCEx_Calibration_Start(&hadc1);
+    ADF4153_R_N_Reg_st temp_reg;
+#if 0 // PYJ.2019.08.01_BEGIN -- 
+    Bluecell_Flash_Read(&Flash_Save_data[INDEX_BLUE_HEADER]);
+    ATTEN_PLL_PATH_Initialize();
+#endif // PYJ.2019.08.01_END -- 
+
+//  ADF_Module_Ctrl(Pll_test,0x324000,0x144051,0x0017c2,0x0003c7);
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+//  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
+//   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
+  while (1)
+  {
+    if(HAL_GPIO_ReadPin(PLL_LD_3_5G_H_GPIO_Port, PLL_LD_3_5G_H_Pin) == GPIO_PIN_RESET 
+        && HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_H_GPIO_Port, PLL_ON_OFF_3_5G_H_Pin) == GPIO_PIN_SET){
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+        HAL_Delay(1);
+    }
+    if(HAL_GPIO_ReadPin(PLL_LD_3_5G_L_GPIO_Port, PLL_LD_3_5G_L_Pin) == GPIO_PIN_RESET
+        || HAL_GPIO_ReadPin(PLL_ON_OFF_3_5G_L_GPIO_Port, PLL_ON_OFF_3_5G_L_Pin) == GPIO_PIN_SET){
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+        HAL_Delay(1);
+    }
+    if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,GPIO_PIN_14);LedTimerCnt = 0;}
+    while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
+    if(AdcTimerCnt > 5000){
+        HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, 14);  
+        for(uint8_t i = 0; i< ADC_EA; i += 2 ){
+            Prev_data[INDEX_DET_1_8G_DL_IN_H + i]     = (uint16_t)((ADCvalue[i] & 0xFF00) >> 8);
+            Prev_data[INDEX_DET_1_8G_DL_IN_L + i]     = (uint16_t)(ADCvalue[i] & 0x00FF);
+//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_H + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_H + i]);
+//            printf("Prev_data[INDEX_DET_1_8G_DL_IN_L + i] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+        }
+//        for(int i = 0; i < 14; i++)
+//            printf("\r\nYJ[%d] : %x \r\n",i,ADCvalue[i]);
+//        HAL_Delay(3000);
+        RF_Status_Get();
+#if 1 // PYJ.2019.07.29_BEGIN -- 
+//        printf("====================================\r\n");
+//            for(uint8_t i = 0; i< ADC_EA; i++){
+//                printf("%x",ADCvalue[0]);
+//                printf("\r\n");
+//                printf("%d",ADCvalue[i]);
+//                printf("\r\n");
+//            }
+//                printf("\r\nADC[%d] : %d\r\n ",i,ADCvalue[i]);
+//        printf("====================================\r\n");
+#endif // PYJ.2019.07.29_END -- 
+        AdcTimerCnt = 0;
+
+    }
+
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief NVIC Configuration.
+  * @retval None
+  */
+static void MX_NVIC_Init(void)
+{
+  /* USART1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(USART1_IRQn);
+  /* TIM6_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(TIM6_IRQn);
+  /* DMA1_Channel1_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
+  /* DMA1_Channel4_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
+  /* DMA1_Channel5_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+  /** Common config 
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+  hadc1.Init.ContinuousConvMode = ENABLE;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.NbrOfConversion = 14;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_0;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_1;
+  sConfig.Rank = ADC_REGULAR_RANK_2;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_2;
+  sConfig.Rank = ADC_REGULAR_RANK_3;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_3;
+  sConfig.Rank = ADC_REGULAR_RANK_4;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_4;
+  sConfig.Rank = ADC_REGULAR_RANK_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_5;
+  sConfig.Rank = ADC_REGULAR_RANK_6;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_6;
+  sConfig.Rank = ADC_REGULAR_RANK_7;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_7;
+  sConfig.Rank = ADC_REGULAR_RANK_8;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_8;
+  sConfig.Rank = ADC_REGULAR_RANK_9;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_9;
+  sConfig.Rank = ADC_REGULAR_RANK_10;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_10;
+  sConfig.Rank = ADC_REGULAR_RANK_11;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_11;
+  sConfig.Rank = ADC_REGULAR_RANK_12;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_12;
+  sConfig.Rank = ADC_REGULAR_RANK_13;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_13;
+  sConfig.Rank = ADC_REGULAR_RANK_14;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief TIM6 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM6_Init(void)
+{
+
+  /* USER CODE BEGIN TIM6_Init 0 */
+
+  /* USER CODE END TIM6_Init 0 */
+
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM6_Init 1 */
+
+  /* USER CODE END TIM6_Init 1 */
+  htim6.Instance = TIM6;
+  htim6.Init.Prescaler = 6000-1;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim6.Init.Period = 10;
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM6_Init 2 */
+
+  /* USER CODE END TIM6_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/** 
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void) 
+{
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
+                          |BOOT_LED_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(PLL_CLK_3_5G_GPIO_Port, PLL_CLK_3_5G_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
+                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
+                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
+                           PLL_EN_3_5G_H_Pin PLL_ON_OFF_3_5G_L_Pin PLL_DATA_3_5G_Pin PLL_ON_OFF_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
+                          |PLL_EN_3_5G_H_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_DATA_3_5G_Pin|PLL_ON_OFF_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
+                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
+                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
+                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
+                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
+                           PATH_EN_3_5G_L_Pin */
+  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
+                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
+                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
+                          |PATH_EN_3_5G_L_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
+  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
+                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_H_Pin 
+                           PATH_EN_3_5G_DL_Pin PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_LG12_Pin PLL_ON_OFF_3_5G_HG13_Pin 
+                           BOOT_LED_Pin */
+  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
+                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_H_Pin 
+                          |PATH_EN_3_5G_DL_Pin|PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_LG12_Pin|PLL_ON_OFF_3_5G_HG13_Pin 
+                          |BOOT_LED_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : PLL_CLK_3_5G_Pin */
+  GPIO_InitStruct.Pin = PLL_CLK_3_5G_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(PLL_CLK_3_5G_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
+  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+
+  /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{ 
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

insight/STM32F103_ATTEN_PLL_Zig.si4project/Backup/zig_operate(7558).c

@@ -0,0 +1,685 @@
+/*
+ * zig_operate.c
+ *
+ *  Created on: 2019. 7. 26.
+ *      Author: parkyj
+ */
+#include "zig_operate.h"
+uint8_t Prev_data[INDEX_BLUE_EOF + 1];
+uint8_t Flash_Save_data[INDEX_BLUE_EOF + 1];
+
+
+/* * * * * * * #define Struct* * * * * * * */
+PLL_Setting_st Pll_1_8GHz_DL = {
+	PLL_CLK_GPIO_Port,
+	PLL_CLK_Pin,
+	PLL_DATA_GPIO_Port,
+	PLL_DATA_Pin,
+    PLL_EN_1_8G_DL_GPIO_Port,    
+    PLL_EN_1_8G_DL_Pin,
+};
+PLL_Setting_st Pll_1_8GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_1_8G_UL_GPIO_Port,    
+    PLL_EN_1_8G_UL_Pin,
+};
+PLL_Setting_st Pll_2_1GHz_DL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st Pll_2_1GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+/* * * * * * * * NOT YET * * * * * * * */
+PLL_Setting_st Pll_3_5GHz_DL = {
+    ATT_CLK_3_5G_GPIO_Port,
+    ATT_EN_3_5G_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_DL_GPIO_Port,    
+    PLL_EN_2_1G_DL_Pin,
+};
+PLL_Setting_st Pll_3_5GHz_UL = {
+    PLL_CLK_GPIO_Port,
+    PLL_CLK_Pin,
+    PLL_DATA_GPIO_Port,
+    PLL_DATA_Pin,
+    PLL_EN_2_1G_UL_GPIO_Port,    
+    PLL_EN_2_1G_UL_Pin,
+};
+/* * * * * * * * ATTEN * * * * * * * */    
+ATTEN_Setting_st Atten_1_8Ghz_DL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_DL1_GPIO_Port,    
+    ATT_EN_1_8G_DL1_Pin,
+    PATH_EN_1_8G_DL_GPIO_Port,
+    PATH_EN_1_8G_DL_Pin,
+};
+
+ATTEN_Setting_st Atten_1_8Ghz_DL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_DL2_GPIO_Port,    
+    ATT_EN_1_8G_DL2_Pin,
+    PATH_EN_1_8G_DL_GPIO_Port,
+    PATH_EN_1_8G_DL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL1_GPIO_Port,    
+    ATT_EN_1_8G_UL1_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,      
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL2_GPIO_Port,    
+    ATT_EN_1_8G_UL2_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL3 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL3_GPIO_Port,    
+    ATT_EN_1_8G_UL3_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_1_8Ghz_UL4 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_1_8G_UL4_GPIO_Port,    
+    ATT_EN_1_8G_UL4_Pin,
+    PATH_EN_1_8G_UL_GPIO_Port,
+    PATH_EN_1_8G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_DL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_DL1_GPIO_Port,    
+    ATT_EN_2_1G_DL1_Pin,
+    PATH_EN_2_1G_DL_GPIO_Port,
+    PATH_EN_2_1G_DL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_DL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_DL2_GPIO_Port,    
+    ATT_EN_2_1G_DL2_Pin,
+    PATH_EN_2_1G_DL_GPIO_Port,
+    PATH_EN_2_1G_DL_Pin,    
+};
+
+ATTEN_Setting_st Atten_2_1Ghz_UL1 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL1_GPIO_Port,    
+    ATT_EN_2_1G_UL1_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL2 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL2_GPIO_Port,    
+    ATT_EN_2_1G_UL2_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL3 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL3_GPIO_Port,    
+    ATT_EN_2_1G_UL3_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+ATTEN_Setting_st Atten_2_1Ghz_UL4 ={
+    ATT_CLK_GPIO_Port,
+    ATT_CLK_Pin,
+    ATT_DATA_GPIO_Port,
+    ATT_DATA_Pin,
+    ATT_EN_2_1G_UL4_GPIO_Port,    
+    ATT_EN_2_1G_UL4_Pin,
+    PATH_EN_2_1G_UL_GPIO_Port,
+    PATH_EN_2_1G_UL_Pin,    
+};
+
+
+bool RF_Data_Check(uint8_t* data_buf){
+    bool ret = false;
+    bool crcret = STH30_CheckCrc(&data_buf[Type], data_buf[Length], data_buf[data_buf[Crcindex]]);
+    if(data_buf[Header] == BLUECELL_HEADER){ /*HEADER CHECK*/
+        ret= true;
+    }
+    if(crcret == true){/*CRC CHECK*/
+        ret = true;
+    }else{
+        ret = false;
+#ifdef DEBUG_PRINT
+        printf("Recv CRC Value : \"%d\"\r\n Create CRC Value : \"%d\"   \r\n",data_buf[data_buf[Crcindex]],STH30_CreateCrc(&data_buf[Type], data_buf[Length]));
+#endif /* DEBUG_PRINT */
+    }
+#ifdef DEBUG_PRINT
+    printf("CRC Result : \"%d\"   \r\n",ret);
+#endif /* DEBUG_PRINT */
+
+    return ret;
+
+}
+
+PLL_Setting_st Pll_3_5_H = {
+     PLL_CLK_3_5G_GPIO_Port,
+     PLL_CLK_3_5G_Pin,
+     PLL_DATA_3_5G_GPIO_Port,
+     PLL_DATA_3_5G_Pin,
+   PLL_EN_3_5G_H_GPIO_Port,    
+   PLL_EN_3_5G_H_Pin,
+ };
+ PLL_Setting_st Pll_3_5_L = {
+     PLL_CLK_3_5G_GPIO_Port,
+     PLL_CLK_3_5G_Pin,
+     PLL_DATA_3_5G_GPIO_Port,
+     PLL_DATA_3_5G_Pin,
+       PLL_EN_3_5G_L_GPIO_Port,    
+       PLL_EN_3_5G_L_Pin,
+ };
+void RF_Status_Get(void){
+//    printf("\r\nYJ2 : Prev_data[INDEX_DET_1_8G_DL_IN_L ] : %x\r\n",Prev_data[INDEX_DET_1_8G_DL_IN_L]);            
+    uint8_t data[10];
+    Prev_data[INDEX_BLUE_HEADER]   = BLUECELL_HEADER;
+    Prev_data[INDEX_BLUE_TYPE]     = TYPE_BLUECELL_GET;
+    Prev_data[INDEX_BLUE_LENGTH]   = INDEX_BLUE_EOF - 2;
+    Prev_data[INDEX_BLUE_CRCINDEX] = INDEX_BLUE_CRC;
+    Prev_data[INDEX_BLUE_CRC]      = STH30_CreateCrc(&Prev_data[Type], Prev_data[Length]);
+    Prev_data[INDEX_BLUE_EOF] = BLUECELL_TAILER;    
+    HAL_UART_Transmit_DMA(&huart1,&Prev_data[INDEX_BLUE_HEADER],INDEX_BLUE_EOF + 1); 
+//    printf("\r\nYJ : %x",ADCvalue[0]);
+//    printf("\r\n");
+
+}
+
+void RF_Operate(uint8_t* data_buf){
+    uint16_t temp_val = 0;
+    uint8_t  ADC_Modify = 0;
+    ADF4153_R_N_Reg_st temp_reg;
+//    printf("Prev_data[INDEX_ATT_1_8G_DL1]  : %x  data_buf[INDEX_ATT_1_8G_DL1] : %x\r\n",Prev_data[INDEX_ATT_1_8G_DL1],data_buf[INDEX_ATT_1_8G_DL1]);
+    if(Prev_data[INDEX_ATT_1_8G_DL1] != data_buf[INDEX_ATT_1_8G_DL1]){
+        
+#if 0 // PYJ.2019.07.31_BEGIN -- 
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif // PYJ.2019.07.31_END -- 
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL1,(data_buf[INDEX_ATT_1_8G_DL1]));
+        Prev_data[INDEX_ATT_1_8G_DL1] = data_buf[INDEX_ATT_1_8G_DL1];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_DL2] != data_buf[INDEX_ATT_1_8G_DL2]){
+#ifdef DEBUG_PRINT
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif /* DEBUG_PRINT */
+        BDA4601_atten_ctrl(BDA4601_1_8G_DL2,(data_buf[INDEX_ATT_1_8G_DL2]));
+        Prev_data[INDEX_ATT_1_8G_DL2] = data_buf[INDEX_ATT_1_8G_DL2];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL1] != data_buf[INDEX_ATT_1_8G_UL1]){
+#ifdef DEBUG_PRINT
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif /* DEBUG_PRINT */
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL1,(data_buf[INDEX_ATT_1_8G_UL1]));
+        Prev_data[INDEX_ATT_1_8G_UL1] = data_buf[INDEX_ATT_1_8G_UL1];
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL2] != data_buf[INDEX_ATT_1_8G_UL2]){
+#ifdef DEBUG_PRINT
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif /* DEBUG_PRINT */
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL2,(data_buf[INDEX_ATT_1_8G_UL2]));
+        Prev_data[INDEX_ATT_1_8G_UL2] = data_buf[INDEX_ATT_1_8G_UL2];
+
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL3] != data_buf[INDEX_ATT_1_8G_UL3]){
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL3,(data_buf[INDEX_ATT_1_8G_UL3]));
+        Prev_data[INDEX_ATT_1_8G_UL3] = data_buf[INDEX_ATT_1_8G_UL3];
+
+    }
+    if(Prev_data[INDEX_ATT_1_8G_UL4] != data_buf[INDEX_ATT_1_8G_UL4]){
+#ifdef DEBUG_PRINT
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif /* DEBUG_PRINT */
+        BDA4601_atten_ctrl(BDA4601_1_8G_UL4,(data_buf[INDEX_ATT_1_8G_UL4]));
+        Prev_data[INDEX_ATT_1_8G_UL4] = data_buf[INDEX_ATT_1_8G_UL4];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_DL1] != data_buf[INDEX_ATT_2_1G_DL1]){
+#ifdef DEBUG_PRINT
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif /* DEBUG_PRINT */
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL1,(data_buf[INDEX_ATT_2_1G_DL1]));
+        Prev_data[INDEX_ATT_2_1G_DL1] = data_buf[INDEX_ATT_2_1G_DL1];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_DL2] != data_buf[INDEX_ATT_2_1G_DL2]){
+#ifdef DEBUG_PRINT
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif /* DEBUG_PRINT */
+        BDA4601_atten_ctrl(BDA4601_2_1G_DL2,(data_buf[INDEX_ATT_2_1G_DL2]));
+        Prev_data[INDEX_ATT_2_1G_DL2] = data_buf[INDEX_ATT_2_1G_DL2];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL1] != data_buf[INDEX_ATT_2_1G_UL1]){
+#ifdef DEBUG_PRINT
+        printf("\r\nLINE : %d  \r\n",__LINE__);    
+#endif /* DEBUG_PRINT */
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL1,(data_buf[INDEX_ATT_2_1G_UL1]));
+        Prev_data[INDEX_ATT_2_1G_UL1] = data_buf[INDEX_ATT_2_1G_UL1];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL2] != data_buf[INDEX_ATT_2_1G_UL2]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL2,(data_buf[INDEX_ATT_2_1G_UL2]));
+        Prev_data[INDEX_ATT_2_1G_UL2] = data_buf[INDEX_ATT_2_1G_UL2];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL3] != data_buf[INDEX_ATT_2_1G_UL3]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL3,(data_buf[INDEX_ATT_2_1G_UL3]));
+        Prev_data[INDEX_ATT_2_1G_UL3] = data_buf[INDEX_ATT_2_1G_UL3];
+
+    }
+    if(Prev_data[INDEX_ATT_2_1G_UL4] != data_buf[INDEX_ATT_2_1G_UL4]){
+        BDA4601_atten_ctrl(BDA4601_2_1G_UL4,(data_buf[INDEX_ATT_2_1G_UL4]));
+        Prev_data[INDEX_ATT_2_1G_UL4] = data_buf[INDEX_ATT_2_1G_UL4];
+    }
+    if(   (Prev_data[INDEX_ATT_3_5G_DL] != data_buf[INDEX_ATT_3_5G_DL])
+        ||(Prev_data[INDEX_ATT_3_5G_UL] != data_buf[INDEX_ATT_3_5G_UL])
+        ||(Prev_data[INDEX_ATT_3_5G_COM1] != data_buf[INDEX_ATT_3_5G_COM1])
+        ||(Prev_data[INDEX_ATT_3_5G_COM2] != data_buf[INDEX_ATT_3_5G_COM2])
+        ||(Prev_data[INDEX_ATT_3_5G_COM3] != data_buf[INDEX_ATT_3_5G_COM3])
+    ){
+        ALL_ATT_3_5G.data0 = Prev_data[INDEX_ATT_3_5G_DL]   = data_buf[INDEX_ATT_3_5G_DL];
+        ALL_ATT_3_5G.data1 = Prev_data[INDEX_ATT_3_5G_UL]   = data_buf[INDEX_ATT_3_5G_UL];
+        ALL_ATT_3_5G.data2 = Prev_data[INDEX_ATT_3_5G_COM1] = data_buf[INDEX_ATT_3_5G_COM1];
+        ALL_ATT_3_5G.data3 = Prev_data[INDEX_ATT_3_5G_COM2] = data_buf[INDEX_ATT_3_5G_COM2];
+        ALL_ATT_3_5G.data4 = Prev_data[INDEX_ATT_3_5G_COM3] = data_buf[INDEX_ATT_3_5G_COM3];
+        PE43711_ALL_atten_ctrl(ALL_ATT_3_5G);
+    }
+    if((Prev_data[INDEX_PLL_1_8G_DL_H] != data_buf[INDEX_PLL_1_8G_DL_H])
+        && (Prev_data[INDEX_PLL_1_8G_DL_L] != data_buf[INDEX_PLL_1_8G_DL_L])
+    ){
+        Prev_data[INDEX_PLL_1_8G_DL_H] = data_buf[INDEX_PLL_1_8G_DL_H];
+        Prev_data[INDEX_PLL_1_8G_DL_L] = data_buf[INDEX_PLL_1_8G_DL_L];
+        temp_val = (data_buf[INDEX_PLL_1_8G_DL_H] << 8) | (data_buf[INDEX_PLL_1_8G_DL_L]);
+        ADF4113_Module_Ctrl(ADF4113_1_8G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10 ),0x9F8092);
+    }
+    if((Prev_data[INDEX_PLL_1_8G_UL_H] != data_buf[INDEX_PLL_1_8G_UL_H])
+        && (Prev_data[INDEX_PLL_1_8G_UL_L] != data_buf[INDEX_PLL_1_8G_UL_L])){
+        temp_val = (data_buf[INDEX_PLL_1_8G_UL_H] << 8) | (data_buf[INDEX_PLL_1_8G_UL_L]);
+        Prev_data[INDEX_PLL_1_8G_UL_H] = data_buf[INDEX_PLL_1_8G_UL_H];
+        Prev_data[INDEX_PLL_1_8G_UL_L] = data_buf[INDEX_PLL_1_8G_UL_L];
+        ADF4113_Module_Ctrl(ADF4113_1_8G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
+    }
+    if((Prev_data[INDEX_PLL_2_1G_DL_H] != data_buf[INDEX_PLL_2_1G_DL_H])
+        && (Prev_data[INDEX_PLL_2_1G_DL_L] != data_buf[INDEX_PLL_2_1G_DL_L])){
+        temp_val = ((data_buf[INDEX_PLL_2_1G_DL_H] << 8) | (data_buf[INDEX_PLL_2_1G_DL_L]));
+        Prev_data[INDEX_PLL_2_1G_DL_H] = data_buf[INDEX_PLL_2_1G_DL_H];
+        Prev_data[INDEX_PLL_2_1G_DL_L] = data_buf[INDEX_PLL_2_1G_DL_L];        
+        ADF4113_Module_Ctrl(ADF4113_2_1G_DL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
+    }
+    if((Prev_data[INDEX_PLL_2_1G_UL_H] != data_buf[INDEX_PLL_2_1G_UL_H])
+        && (Prev_data[INDEX_PLL_2_1G_UL_L] != data_buf[INDEX_PLL_2_1G_UL_L])){
+        Prev_data[INDEX_PLL_2_1G_UL_H] = data_buf[INDEX_PLL_2_1G_UL_H];
+        Prev_data[INDEX_PLL_2_1G_UL_L] = data_buf[INDEX_PLL_2_1G_UL_L];          
+        temp_val = (data_buf[INDEX_PLL_2_1G_UL_H] << 8) | (data_buf[INDEX_PLL_2_1G_UL_L]);
+        ADF4113_Module_Ctrl(ADF4113_2_1G_UL,0x410,halSynSetFreq((temp_val * 1000000) / 10),0x9F8092);
+
+    }
+    if((Prev_data[INDEX_PLL_3_5G_DL_H] != data_buf[INDEX_PLL_3_5G_DL_H])
+        && (Prev_data[INDEX_PLL_3_5G_DL_L] != data_buf[INDEX_PLL_3_5G_DL_L])){
+        Prev_data[INDEX_PLL_3_5G_DL_H] = data_buf[INDEX_PLL_3_5G_DL_H];
+        Prev_data[INDEX_PLL_3_5G_DL_L] = data_buf[INDEX_PLL_3_5G_DL_L];
+        temp_val = (data_buf[INDEX_PLL_3_5G_DL_H] << 8) | (data_buf[INDEX_PLL_3_5G_DL_L]);
+        temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+        ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+    }
+    if((Prev_data[INDEX_PLL_3_5G_UL_H] != data_buf[INDEX_PLL_3_5G_UL_H])
+        && (Prev_data[INDEX_PLL_3_5G_UL_L] != data_buf[INDEX_PLL_3_5G_UL_L])){
+        Prev_data[INDEX_PLL_3_5G_UL_H] = data_buf[INDEX_PLL_3_5G_UL_H];
+        Prev_data[INDEX_PLL_3_5G_UL_L] = data_buf[INDEX_PLL_3_5G_UL_L];
+        temp_val = (data_buf[INDEX_PLL_3_5G_UL_H] << 8) | (data_buf[INDEX_PLL_3_5G_UL_L]);
+        temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+        ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+
+    }
+    if(Prev_data[INDEX_PLL_LD_6_BIT] != data_buf[INDEX_PLL_LD_6_BIT]){
+
+    }
+#if 0 // PYJ.2019.07.28_BEGIN -- 
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_H] != data_buf[INDEX_DET_1_8G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_IN_L] != data_buf[INDEX_DET_1_8G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_H] != data_buf[INDEX_DET_1_8G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_DL_OUT_L] != data_buf[INDEX_DET_1_8G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_H] != data_buf[INDEX_DET_1_8G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_IN_L] != data_buf[INDEX_DET_1_8G_UL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_H] != data_buf[INDEX_DET_1_8G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_1_8G_UL_OUT_L] != data_buf[INDEX_DET_1_8G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_H] != data_buf[INDEX_DET_2_1G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_IN_L] != data_buf[INDEX_DET_2_1G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_H] != data_buf[INDEX_DET_2_1G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_DL_OUT_L] != data_buf[INDEX_DET_2_1G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_H] != data_buf[INDEX_DET_2_1G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_IN_L] != data_buf[INDEX_DET_2_1G_UL_IN_L]){
+
+    }
+
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_H] != data_buf[INDEX_DET_2_1G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_2_1G_UL_OUT_L] != data_buf[INDEX_DET_2_1G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_H] != data_buf[INDEX_DET_3_5G_DL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_IN_L] != data_buf[INDEX_DET_3_5G_DL_IN_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_L] != data_buf[INDEX_DET_3_5G_DL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_DL_OUT_H] != data_buf[INDEX_DET_3_5G_DL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_H] != data_buf[INDEX_DET_3_5G_UL_IN_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_IN_L] != data_buf[INDEX_DET_3_5G_UL_IN_L]){
+
+    }
+
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_H] != data_buf[INDEX_DET_3_5G_UL_OUT_H]){
+
+    }
+    if(Prev_data[INDEX_DET_3_5G_UL_OUT_L] != data_buf[INDEX_DET_3_5G_UL_OUT_L]){
+
+    }
+    if(Prev_data[INDEX_RFU_TEMP_H] != data_buf[INDEX_RFU_TEMP_H]){
+
+    }
+    if(Prev_data[INDEX_RFU_TEMP_L] != data_buf[INDEX_RFU_TEMP_L]){
+
+    }
+    if(Prev_data[INDEX__28V_DET_H] != data_buf[INDEX__28V_DET_H]){
+
+    }
+    if(Prev_data[INDEX__28V_DET_L] != data_buf[INDEX__28V_DET_L]){
+
+    }
+#endif // PYJ.2019.07.28_END -- 
+    if(Prev_data[INDEX_ALARM_AC] != data_buf[INDEX_ALARM_AC]){
+
+    }
+    if(Prev_data[INDEX_ALARM_DC] != data_buf[INDEX_ALARM_DC]){
+
+    }
+    if(Prev_data[INDEX_PATH_EN_1_8G_DL] != data_buf[INDEX_PATH_EN_1_8G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_DL,data_buf[INDEX_PATH_EN_1_8G_DL]);
+        Prev_data[INDEX_PATH_EN_1_8G_DL] = data_buf[INDEX_PATH_EN_1_8G_DL];
+    }
+    if(Prev_data[INDEX_PATH_EN_1_8G_UL] != data_buf[INDEX_PATH_EN_1_8G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_1_8G_UL,data_buf[INDEX_PATH_EN_1_8G_UL]);
+        Prev_data[INDEX_PATH_EN_1_8G_UL] = data_buf[INDEX_PATH_EN_1_8G_UL];
+
+    }
+
+    if(Prev_data[INDEX_PATH_EN_2_1G_DL] != data_buf[INDEX_PATH_EN_2_1G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_DL,data_buf[INDEX_PATH_EN_2_1G_DL]);
+        Prev_data[INDEX_PATH_EN_2_1G_DL] = data_buf[INDEX_PATH_EN_2_1G_DL];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_2_1G_UL] != data_buf[INDEX_PATH_EN_2_1G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_2_1G_UL,data_buf[INDEX_PATH_EN_2_1G_UL]);
+        Prev_data[INDEX_PATH_EN_2_1G_UL] = data_buf[INDEX_PATH_EN_2_1G_UL];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_L] != data_buf[INDEX_PATH_EN_3_5G_L]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_L,data_buf[INDEX_PATH_EN_3_5G_L]);
+        Prev_data[INDEX_PATH_EN_3_5G_L] = data_buf[INDEX_PATH_EN_3_5G_L];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_H] != data_buf[INDEX_PATH_EN_3_5G_H]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_H,data_buf[INDEX_PATH_EN_3_5G_H]);
+        Prev_data[INDEX_PATH_EN_3_5G_H] = data_buf[INDEX_PATH_EN_3_5G_H];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_DL] != data_buf[INDEX_PATH_EN_3_5G_DL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_DL,data_buf[INDEX_PATH_EN_3_5G_DL]);
+        Prev_data[INDEX_PATH_EN_3_5G_DL] = data_buf[INDEX_PATH_EN_3_5G_DL];
+
+    }
+    if(Prev_data[INDEX_PATH_EN_3_5G_UL] != data_buf[INDEX_PATH_EN_3_5G_UL]){
+        Power_ON_OFF_Ctrl(INDEX_PATH_EN_3_5G_UL,data_buf[INDEX_PATH_EN_3_5G_UL]);
+        Prev_data[INDEX_PATH_EN_3_5G_UL] = data_buf[INDEX_PATH_EN_3_5G_UL];
+
+    }
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_H] != data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_H,data_buf[INDEX_PLL_ON_OFF_3_5G_H]);
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_H] = data_buf[INDEX_PLL_ON_OFF_3_5G_H];
+        HAL_Delay(10);
+        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_H]);
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_H]){
+            printf("PLL CTRL START !! \r\n");
+//            ADF4153_Init();
+            temp_reg = ADF4153_Freq_Calc(3934500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);
+            ADF4153_Module_Ctrl(Pll_3_5_H,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+        }
+    }
+    if(Prev_data[INDEX_PLL_ON_OFF_3_5G_L] != data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
+        Power_ON_OFF_Ctrl(INDEX_PLL_ON_OFF_3_5G_L,data_buf[INDEX_PLL_ON_OFF_3_5G_L]);
+        Prev_data[INDEX_PLL_ON_OFF_3_5G_L] = data_buf[INDEX_PLL_ON_OFF_3_5G_L];
+        HAL_Delay(10);
+        printf("POWER : %d \r\n",Prev_data[INDEX_PLL_ON_OFF_3_5G_L]);        
+        if(data_buf[INDEX_PLL_ON_OFF_3_5G_L]){
+            printf("PLL CTRL START !! \r\n");
+            temp_reg = ADF4153_Freq_Calc(3465500000,ADF4153_REFIN,ADF4153_RCOUNTER,ADF4153_CHANNEL_SPACING);            
+            ADF4153_Module_Ctrl(Pll_3_5_L,temp_reg.N_reg,temp_reg.R_reg,0x13c2,0x3);
+        }
+    }
+
+    if(Prev_data[INDEX_T_SYNC_DL] != data_buf[INDEX_T_SYNC_DL]){
+        Prev_data[INDEX_T_SYNC_DL] = data_buf[INDEX_T_SYNC_DL];
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_DL,data_buf[INDEX_T_SYNC_DL]);
+    }
+    if(Prev_data[INDEX__T_SYNC_DL] != data_buf[INDEX__T_SYNC_DL]){
+        Prev_data[INDEX__T_SYNC_DL] = data_buf[INDEX__T_SYNC_DL];
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_DL,data_buf[INDEX__T_SYNC_DL]);
+    }
+    if(Prev_data[INDEX_T_SYNC_UL] != data_buf[INDEX_T_SYNC_UL]){
+        Prev_data[INDEX_T_SYNC_UL] = data_buf[INDEX_T_SYNC_UL];
+        Power_ON_OFF_Ctrl(INDEX_T_SYNC_UL,data_buf[INDEX_T_SYNC_UL]);
+    }
+    if(Prev_data[INDEX__T_SYNC_UL] != data_buf[INDEX__T_SYNC_UL]){
+        Prev_data[INDEX__T_SYNC_UL] = data_buf[INDEX__T_SYNC_UL];
+        Power_ON_OFF_Ctrl(INDEX__T_SYNC_UL,data_buf[INDEX__T_SYNC_UL]);
+    }
+
+
+    if((Prev_data[INDEX_DAC_VCtrl_A_H] != data_buf[INDEX_DAC_VCtrl_A_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_A_L] != data_buf[INDEX_DAC_VCtrl_A_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_A_H] = data_buf[INDEX_DAC_VCtrl_A_H];
+        Prev_data[INDEX_DAC_VCtrl_A_L] = data_buf[INDEX_DAC_VCtrl_A_L];
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_B_H] != data_buf[INDEX_DAC_VCtrl_B_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_B_L] != data_buf[INDEX_DAC_VCtrl_B_L])){
+        ADC_Modify = 1;
+        
+        Prev_data[INDEX_DAC_VCtrl_B_H] = data_buf[INDEX_DAC_VCtrl_B_H];
+        Prev_data[INDEX_DAC_VCtrl_B_L] = data_buf[INDEX_DAC_VCtrl_B_L];        
+    }    
+    if((Prev_data[INDEX_DAC_VCtrl_C_H] != data_buf[INDEX_DAC_VCtrl_C_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_C_L] != data_buf[INDEX_DAC_VCtrl_C_L])){
+        ADC_Modify = 1;
+        printf("Prev_data[INDEX_DAC_VCtrl_C_H] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_H]);
+        printf("Prev_data[INDEX_DAC_VCtrl_C_L] : %x \r\n",Prev_data[INDEX_DAC_VCtrl_C_L]);
+
+        Prev_data[INDEX_DAC_VCtrl_C_H] = data_buf[INDEX_DAC_VCtrl_C_H];
+        Prev_data[INDEX_DAC_VCtrl_C_L] = data_buf[INDEX_DAC_VCtrl_C_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_D_H] != data_buf[INDEX_DAC_VCtrl_D_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_D_L] != data_buf[INDEX_DAC_VCtrl_D_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_D_H] = data_buf[INDEX_DAC_VCtrl_D_H];
+        Prev_data[INDEX_DAC_VCtrl_D_L] = data_buf[INDEX_DAC_VCtrl_D_L];
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_E_H] != data_buf[INDEX_DAC_VCtrl_E_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_E_L] != data_buf[INDEX_DAC_VCtrl_E_L])){
+        ADC_Modify = 1;
+
+        Prev_data[INDEX_DAC_VCtrl_E_H] = data_buf[INDEX_DAC_VCtrl_E_H];
+        Prev_data[INDEX_DAC_VCtrl_E_L] = data_buf[INDEX_DAC_VCtrl_E_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_F_H] != data_buf[INDEX_DAC_VCtrl_F_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_F_L] != data_buf[INDEX_DAC_VCtrl_F_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_F_H] = data_buf[INDEX_DAC_VCtrl_F_H];
+        Prev_data[INDEX_DAC_VCtrl_F_L] = data_buf[INDEX_DAC_VCtrl_F_L];        
+    }
+    if((Prev_data[INDEX_DAC_VCtrl_G_H] != data_buf[INDEX_DAC_VCtrl_G_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_G_L] != data_buf[INDEX_DAC_VCtrl_G_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_G_H] = data_buf[INDEX_DAC_VCtrl_G_H];
+        Prev_data[INDEX_DAC_VCtrl_G_L] = data_buf[INDEX_DAC_VCtrl_G_L];        
+    }    
+    if((Prev_data[INDEX_DAC_VCtrl_H_H] != data_buf[INDEX_DAC_VCtrl_H_H])
+        ||(Prev_data[INDEX_DAC_VCtrl_H_L] != data_buf[INDEX_DAC_VCtrl_H_L])){
+        ADC_Modify = 1;
+        Prev_data[INDEX_DAC_VCtrl_H_H] = data_buf[INDEX_DAC_VCtrl_H_H];
+        Prev_data[INDEX_DAC_VCtrl_H_L] = data_buf[INDEX_DAC_VCtrl_H_L];        
+    }
+    if(ADC_Modify){
+//        SubmitDAC(0xF000);
+//        HAL_Delay(1);
+//        SubmitDAC(0x800C);
+//        SubmitDAC(0x2FFF );
+//        SubmitDAC(0xA000);
+        printf("DAC CTRL START \r\n");
+//        SubmitDAC(0x800C);
+//        SubmitDAC(0xA000);
+
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_A_H] << 8 | Prev_data[INDEX_DAC_VCtrl_A_L]));    
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_B_H] << 8 | Prev_data[INDEX_DAC_VCtrl_B_L]));    
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_C_H] << 8 | Prev_data[INDEX_DAC_VCtrl_C_L]));
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_D_H] << 8 | Prev_data[INDEX_DAC_VCtrl_D_L]));
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_E_H] << 8 | Prev_data[INDEX_DAC_VCtrl_E_L]));    
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_F_H] << 8 | Prev_data[INDEX_DAC_VCtrl_F_L]));
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_G_H] << 8 | Prev_data[INDEX_DAC_VCtrl_G_L]));
+        SubmitDAC((Prev_data[INDEX_DAC_VCtrl_H_H] << 8 | Prev_data[INDEX_DAC_VCtrl_H_L]));
+    }
+    
+}
+
+
+bool RF_Ctrl_Main(uint8_t* data_buf){
+    bool ret = false;
+    Bluecell_Prot_t type = data_buf[Type];
+    ret = RF_Data_Check(&data_buf[Header]); /* ERROR CHECK */
+    if(ret == false){
+        HAL_UART_Transmit(&huart1,&data_buf[INDEX_BLUE_HEADER],data_buf[INDEX_BLUE_LENGTH] + 2 + 1,3000); 
+        return ret;
+    }
+    
+    switch(type){
+    case TYPE_BLUECELL_RESET:
+        for(uint8_t i =0 ; i < data_buf[Length] + 6; i++)
+            printf("%02x ",data_buf[i]);
+        printf("Reset Start \r\n");
+        NVIC_SystemReset();
+        break;
+    case TYPE_BLUECELL_SET:
+#if 0 // PYJ.2019.07.31_BEGIN -- 
+    printf("TYPE_BLUECELL_SET : ");
+    for(uint8_t i =0 ; i < INDEX_BLUE_EOF + 1; i++)
+        printf("%02x ",data_buf[i]);
+#endif // PYJ.2019.07.31_END -- 
+        RF_Operate(&data_buf[Header]);
+//        ADF4153_Freq_Calc(3465500000,40000000,2,5000);
+//        ADF4153_Freq_Calc(3993450000,40000000,2,5000);
+//        halSynSetFreq(1995000000);
+//        halSynSetFreq(1600000000);
+//        halSynSetFreq(1455000000);        
+        break;
+    case TYPE_BLUECELL_GET:
+        printf("\r\nTYPE_BLUECELL_GET : \r\n");
+        RF_Status_Get();
+        break;
+    case TYPE_BLUECELL_SAVE:
+        printf("\r\nFLASH Write\r\n");
+        Bluecell_Flash_Write(&Prev_data[INDEX_BLUE_HEADER]);
+        break;
+        default:
+#ifdef DEBUG_PRINT // PYJ.2019.07.27_BEGIN --         
+            printf("Function : %s   LINE : %d    type : %d \r\n",__func__,__LINE__,type);
+#endif
+            break;
+    }
+    return ret;
+}