STM32F103ZET_JDASMBIC/Debug/STM32F103_ATTEN_PLL_Zig.list

STM32F103_ATTEN_PLL_Zig.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001e4  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         0000184c  080001e4  080001e4  000101e4  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00000028  08001a30  08001a30  00011a30  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  08001a58  08001a58  00011a58  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  08001a5c  08001a5c  00011a5c  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         0000000c  20000000  08001a60  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          000000d4  2000000c  08001a6c  0002000c  2**2
                  ALLOC
  7 ._user_heap_stack 00000600  200000e0  08001a6c  000200e0  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  0002000c  2**0
                  CONTENTS, READONLY
  9 .debug_info   0000e4d4  00000000  00000000  00020035  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 00002166  00000000  00000000  0002e509  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    000033b4  00000000  00000000  0003066f  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 00000630  00000000  00000000  00033a28  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00000860  00000000  00000000  00034058  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   0000424e  00000000  00000000  000348b8  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    000026e8  00000000  00000000  00038b06  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  0003b1ee  2**0
                  CONTENTS, READONLY
 17 .debug_frame  00001030  00000000  00000000  0003b26c  2**2
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080001e4 <__do_global_dtors_aux>:
 80001e4:	b510      	push	{r4, lr}
 80001e6:	4c05      	ldr	r4, [pc, #20]	; (80001fc <__do_global_dtors_aux+0x18>)
 80001e8:	7823      	ldrb	r3, [r4, #0]
 80001ea:	b933      	cbnz	r3, 80001fa <__do_global_dtors_aux+0x16>
 80001ec:	4b04      	ldr	r3, [pc, #16]	; (8000200 <__do_global_dtors_aux+0x1c>)
 80001ee:	b113      	cbz	r3, 80001f6 <__do_global_dtors_aux+0x12>
 80001f0:	4804      	ldr	r0, [pc, #16]	; (8000204 <__do_global_dtors_aux+0x20>)
 80001f2:	f3af 8000 	nop.w
 80001f6:	2301      	movs	r3, #1
 80001f8:	7023      	strb	r3, [r4, #0]
 80001fa:	bd10      	pop	{r4, pc}
 80001fc:	2000000c 	.word	0x2000000c
 8000200:	00000000 	.word	0x00000000
 8000204:	08001a18 	.word	0x08001a18

08000208 <frame_dummy>:
 8000208:	b508      	push	{r3, lr}
 800020a:	4b03      	ldr	r3, [pc, #12]	; (8000218 <frame_dummy+0x10>)
 800020c:	b11b      	cbz	r3, 8000216 <frame_dummy+0xe>
 800020e:	4903      	ldr	r1, [pc, #12]	; (800021c <frame_dummy+0x14>)
 8000210:	4803      	ldr	r0, [pc, #12]	; (8000220 <frame_dummy+0x18>)
 8000212:	f3af 8000 	nop.w
 8000216:	bd08      	pop	{r3, pc}
 8000218:	00000000 	.word	0x00000000
 800021c:	20000010 	.word	0x20000010
 8000220:	08001a18 	.word	0x08001a18

08000224 <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8000224:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8000226:	4b0e      	ldr	r3, [pc, #56]	; (8000260 <HAL_InitTick+0x3c>)
{
 8000228:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800022a:	7818      	ldrb	r0, [r3, #0]
 800022c:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8000230:	fbb3 f3f0 	udiv	r3, r3, r0
 8000234:	4a0b      	ldr	r2, [pc, #44]	; (8000264 <HAL_InitTick+0x40>)
 8000236:	6810      	ldr	r0, [r2, #0]
 8000238:	fbb0 f0f3 	udiv	r0, r0, r3
 800023c:	f000 f9bc 	bl	80005b8 <HAL_SYSTICK_Config>
 8000240:	4604      	mov	r4, r0
 8000242:	b958      	cbnz	r0, 800025c <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8000244:	2d0f      	cmp	r5, #15
 8000246:	d809      	bhi.n	800025c <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8000248:	4602      	mov	r2, r0
 800024a:	4629      	mov	r1, r5
 800024c:	f04f 30ff 	mov.w	r0, #4294967295
 8000250:	f000 f972 	bl	8000538 <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 8000254:	4b04      	ldr	r3, [pc, #16]	; (8000268 <HAL_InitTick+0x44>)
 8000256:	4620      	mov	r0, r4
 8000258:	601d      	str	r5, [r3, #0]
 800025a:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 800025c:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 800025e:	bd38      	pop	{r3, r4, r5, pc}
 8000260:	20000000 	.word	0x20000000
 8000264:	20000008 	.word	0x20000008
 8000268:	20000004 	.word	0x20000004

0800026c <HAL_Init>:
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 800026c:	4a07      	ldr	r2, [pc, #28]	; (800028c <HAL_Init+0x20>)
{
 800026e:	b508      	push	{r3, lr}
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000270:	6813      	ldr	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8000272:	2003      	movs	r0, #3
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8000274:	f043 0310 	orr.w	r3, r3, #16
 8000278:	6013      	str	r3, [r2, #0]
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800027a:	f000 f94b 	bl	8000514 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 800027e:	2000      	movs	r0, #0
 8000280:	f7ff ffd0 	bl	8000224 <HAL_InitTick>
  HAL_MspInit();
 8000284:	f001 fa6c 	bl	8001760 <HAL_MspInit>
}
 8000288:	2000      	movs	r0, #0
 800028a:	bd08      	pop	{r3, pc}
 800028c:	40022000 	.word	0x40022000

08000290 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 8000290:	4a03      	ldr	r2, [pc, #12]	; (80002a0 <HAL_IncTick+0x10>)
 8000292:	4b04      	ldr	r3, [pc, #16]	; (80002a4 <HAL_IncTick+0x14>)
 8000294:	6811      	ldr	r1, [r2, #0]
 8000296:	781b      	ldrb	r3, [r3, #0]
 8000298:	440b      	add	r3, r1
 800029a:	6013      	str	r3, [r2, #0]
 800029c:	4770      	bx	lr
 800029e:	bf00      	nop
 80002a0:	20000028 	.word	0x20000028
 80002a4:	20000000 	.word	0x20000000

080002a8 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80002a8:	4b01      	ldr	r3, [pc, #4]	; (80002b0 <HAL_GetTick+0x8>)
 80002aa:	6818      	ldr	r0, [r3, #0]
}
 80002ac:	4770      	bx	lr
 80002ae:	bf00      	nop
 80002b0:	20000028 	.word	0x20000028

080002b4 <HAL_ADC_ConfigChannel>:
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{ 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  __IO uint32_t wait_loop_index = 0U;
 80002b4:	2300      	movs	r3, #0
{ 
 80002b6:	b573      	push	{r0, r1, r4, r5, r6, lr}
  __IO uint32_t wait_loop_index = 0U;
 80002b8:	9301      	str	r3, [sp, #4]
  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
  
  /* Process locked */
  __HAL_LOCK(hadc);
 80002ba:	f890 3024 	ldrb.w	r3, [r0, #36]	; 0x24
 80002be:	2b01      	cmp	r3, #1
 80002c0:	d074      	beq.n	80003ac <HAL_ADC_ConfigChannel+0xf8>
 80002c2:	2301      	movs	r3, #1
  
  
  /* Regular sequence configuration */
  /* For Rank 1 to 6 */
  if (sConfig->Rank < 7U)
 80002c4:	684d      	ldr	r5, [r1, #4]
  __HAL_LOCK(hadc);
 80002c6:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
  if (sConfig->Rank < 7U)
 80002ca:	2d06      	cmp	r5, #6
 80002cc:	6802      	ldr	r2, [r0, #0]
 80002ce:	ea4f 0385 	mov.w	r3, r5, lsl #2
 80002d2:	680c      	ldr	r4, [r1, #0]
 80002d4:	d825      	bhi.n	8000322 <HAL_ADC_ConfigChannel+0x6e>
  {
    MODIFY_REG(hadc->Instance->SQR3                        ,
 80002d6:	442b      	add	r3, r5
 80002d8:	251f      	movs	r5, #31
 80002da:	6b56      	ldr	r6, [r2, #52]	; 0x34
 80002dc:	3b05      	subs	r3, #5
 80002de:	409d      	lsls	r5, r3
 80002e0:	ea26 0505 	bic.w	r5, r6, r5
 80002e4:	fa04 f303 	lsl.w	r3, r4, r3
 80002e8:	432b      	orrs	r3, r5
 80002ea:	6353      	str	r3, [r2, #52]	; 0x34
  }
  
  
  /* Channel sampling time configuration */
  /* For channels 10 to 17 */
  if (sConfig->Channel >= ADC_CHANNEL_10)
 80002ec:	2c09      	cmp	r4, #9
 80002ee:	ea4f 0344 	mov.w	r3, r4, lsl #1
 80002f2:	688d      	ldr	r5, [r1, #8]
 80002f4:	d92f      	bls.n	8000356 <HAL_ADC_ConfigChannel+0xa2>
  {
    MODIFY_REG(hadc->Instance->SMPR1                             ,
 80002f6:	2607      	movs	r6, #7
 80002f8:	4423      	add	r3, r4
 80002fa:	68d1      	ldr	r1, [r2, #12]
 80002fc:	3b1e      	subs	r3, #30
 80002fe:	409e      	lsls	r6, r3
 8000300:	ea21 0106 	bic.w	r1, r1, r6
 8000304:	fa05 f303 	lsl.w	r3, r5, r3
 8000308:	430b      	orrs	r3, r1
 800030a:	60d3      	str	r3, [r2, #12]
               ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
  }
  
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
  /* and VREFINT measurement path.                                            */
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
 800030c:	f1a4 0310 	sub.w	r3, r4, #16
 8000310:	2b01      	cmp	r3, #1
 8000312:	d92b      	bls.n	800036c <HAL_ADC_ConfigChannel+0xb8>
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 8000314:	2300      	movs	r3, #0
      tmp_hal_status = HAL_ERROR;
    }
  }
  
  /* Process unlocked */
  __HAL_UNLOCK(hadc);
 8000316:	2200      	movs	r2, #0
 8000318:	f880 2024 	strb.w	r2, [r0, #36]	; 0x24
  
  /* Return function status */
  return tmp_hal_status;
}
 800031c:	4618      	mov	r0, r3
 800031e:	b002      	add	sp, #8
 8000320:	bd70      	pop	{r4, r5, r6, pc}
  else if (sConfig->Rank < 13U)
 8000322:	2d0c      	cmp	r5, #12
 8000324:	d80b      	bhi.n	800033e <HAL_ADC_ConfigChannel+0x8a>
    MODIFY_REG(hadc->Instance->SQR2                        ,
 8000326:	442b      	add	r3, r5
 8000328:	251f      	movs	r5, #31
 800032a:	6b16      	ldr	r6, [r2, #48]	; 0x30
 800032c:	3b23      	subs	r3, #35	; 0x23
 800032e:	409d      	lsls	r5, r3
 8000330:	ea26 0505 	bic.w	r5, r6, r5
 8000334:	fa04 f303 	lsl.w	r3, r4, r3
 8000338:	432b      	orrs	r3, r5
 800033a:	6313      	str	r3, [r2, #48]	; 0x30
 800033c:	e7d6      	b.n	80002ec <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SQR1                        ,
 800033e:	442b      	add	r3, r5
 8000340:	251f      	movs	r5, #31
 8000342:	6ad6      	ldr	r6, [r2, #44]	; 0x2c
 8000344:	3b41      	subs	r3, #65	; 0x41
 8000346:	409d      	lsls	r5, r3
 8000348:	ea26 0505 	bic.w	r5, r6, r5
 800034c:	fa04 f303 	lsl.w	r3, r4, r3
 8000350:	432b      	orrs	r3, r5
 8000352:	62d3      	str	r3, [r2, #44]	; 0x2c
 8000354:	e7ca      	b.n	80002ec <HAL_ADC_ConfigChannel+0x38>
    MODIFY_REG(hadc->Instance->SMPR2                             ,
 8000356:	2607      	movs	r6, #7
 8000358:	6911      	ldr	r1, [r2, #16]
 800035a:	4423      	add	r3, r4
 800035c:	409e      	lsls	r6, r3
 800035e:	ea21 0106 	bic.w	r1, r1, r6
 8000362:	fa05 f303 	lsl.w	r3, r5, r3
 8000366:	430b      	orrs	r3, r1
 8000368:	6113      	str	r3, [r2, #16]
 800036a:	e7cf      	b.n	800030c <HAL_ADC_ConfigChannel+0x58>
    if (hadc->Instance == ADC1)
 800036c:	4b10      	ldr	r3, [pc, #64]	; (80003b0 <HAL_ADC_ConfigChannel+0xfc>)
 800036e:	429a      	cmp	r2, r3
 8000370:	d116      	bne.n	80003a0 <HAL_ADC_ConfigChannel+0xec>
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
 8000372:	6893      	ldr	r3, [r2, #8]
 8000374:	021b      	lsls	r3, r3, #8
 8000376:	d4cd      	bmi.n	8000314 <HAL_ADC_ConfigChannel+0x60>
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 8000378:	6893      	ldr	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 800037a:	2c10      	cmp	r4, #16
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 800037c:	f443 0300 	orr.w	r3, r3, #8388608	; 0x800000
 8000380:	6093      	str	r3, [r2, #8]
        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 8000382:	d1c7      	bne.n	8000314 <HAL_ADC_ConfigChannel+0x60>
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
 8000384:	4b0b      	ldr	r3, [pc, #44]	; (80003b4 <HAL_ADC_ConfigChannel+0x100>)
 8000386:	4a0c      	ldr	r2, [pc, #48]	; (80003b8 <HAL_ADC_ConfigChannel+0x104>)
 8000388:	681b      	ldr	r3, [r3, #0]
 800038a:	fbb3 f2f2 	udiv	r2, r3, r2
 800038e:	230a      	movs	r3, #10
 8000390:	4353      	muls	r3, r2
            wait_loop_index--;
 8000392:	9301      	str	r3, [sp, #4]
          while(wait_loop_index != 0U)
 8000394:	9b01      	ldr	r3, [sp, #4]
 8000396:	2b00      	cmp	r3, #0
 8000398:	d0bc      	beq.n	8000314 <HAL_ADC_ConfigChannel+0x60>
            wait_loop_index--;
 800039a:	9b01      	ldr	r3, [sp, #4]
 800039c:	3b01      	subs	r3, #1
 800039e:	e7f8      	b.n	8000392 <HAL_ADC_ConfigChannel+0xde>
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 80003a0:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80003a2:	f043 0320 	orr.w	r3, r3, #32
 80003a6:	6283      	str	r3, [r0, #40]	; 0x28
      tmp_hal_status = HAL_ERROR;
 80003a8:	2301      	movs	r3, #1
 80003aa:	e7b4      	b.n	8000316 <HAL_ADC_ConfigChannel+0x62>
  __HAL_LOCK(hadc);
 80003ac:	2302      	movs	r3, #2
 80003ae:	e7b5      	b.n	800031c <HAL_ADC_ConfigChannel+0x68>
 80003b0:	40012400 	.word	0x40012400
 80003b4:	20000008 	.word	0x20000008
 80003b8:	000f4240 	.word	0x000f4240

080003bc <ADC_ConversionStop_Disable>:
  *         stopped to disable the ADC.
  * @param  hadc: ADC handle
  * @retval HAL status.
  */
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
 80003bc:	b538      	push	{r3, r4, r5, lr}
  uint32_t tickstart = 0U;
  
  /* Verification if ADC is not already disabled */
  if (ADC_IS_ENABLE(hadc) != RESET)
 80003be:	6803      	ldr	r3, [r0, #0]
{
 80003c0:	4604      	mov	r4, r0
  if (ADC_IS_ENABLE(hadc) != RESET)
 80003c2:	689a      	ldr	r2, [r3, #8]
 80003c4:	07d2      	lsls	r2, r2, #31
 80003c6:	d401      	bmi.n	80003cc <ADC_ConversionStop_Disable+0x10>
      }
    }
  }
  
  /* Return HAL status */
  return HAL_OK;
 80003c8:	2000      	movs	r0, #0
 80003ca:	bd38      	pop	{r3, r4, r5, pc}
    __HAL_ADC_DISABLE(hadc);
 80003cc:	689a      	ldr	r2, [r3, #8]
 80003ce:	f022 0201 	bic.w	r2, r2, #1
 80003d2:	609a      	str	r2, [r3, #8]
    tickstart = HAL_GetTick();
 80003d4:	f7ff ff68 	bl	80002a8 <HAL_GetTick>
 80003d8:	4605      	mov	r5, r0
    while(ADC_IS_ENABLE(hadc) != RESET)
 80003da:	6823      	ldr	r3, [r4, #0]
 80003dc:	689b      	ldr	r3, [r3, #8]
 80003de:	07db      	lsls	r3, r3, #31
 80003e0:	d5f2      	bpl.n	80003c8 <ADC_ConversionStop_Disable+0xc>
      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
 80003e2:	f7ff ff61 	bl	80002a8 <HAL_GetTick>
 80003e6:	1b40      	subs	r0, r0, r5
 80003e8:	2802      	cmp	r0, #2
 80003ea:	d9f6      	bls.n	80003da <ADC_ConversionStop_Disable+0x1e>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 80003ec:	6aa3      	ldr	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80003ee:	2001      	movs	r0, #1
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 80003f0:	f043 0310 	orr.w	r3, r3, #16
 80003f4:	62a3      	str	r3, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80003f6:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 80003f8:	f043 0301 	orr.w	r3, r3, #1
 80003fc:	62e3      	str	r3, [r4, #44]	; 0x2c
 80003fe:	bd38      	pop	{r3, r4, r5, pc}

08000400 <HAL_ADC_Init>:
{
 8000400:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  if(hadc == NULL)
 8000402:	4604      	mov	r4, r0
 8000404:	2800      	cmp	r0, #0
 8000406:	d077      	beq.n	80004f8 <HAL_ADC_Init+0xf8>
  if (hadc->State == HAL_ADC_STATE_RESET)
 8000408:	6a83      	ldr	r3, [r0, #40]	; 0x28
 800040a:	b923      	cbnz	r3, 8000416 <HAL_ADC_Init+0x16>
    ADC_CLEAR_ERRORCODE(hadc);
 800040c:	62c3      	str	r3, [r0, #44]	; 0x2c
    hadc->Lock = HAL_UNLOCKED;
 800040e:	f880 3024 	strb.w	r3, [r0, #36]	; 0x24
    HAL_ADC_MspInit(hadc);
 8000412:	f001 f9c7 	bl	80017a4 <HAL_ADC_MspInit>
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 8000416:	4620      	mov	r0, r4
 8000418:	f7ff ffd0 	bl	80003bc <ADC_ConversionStop_Disable>
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
 800041c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 800041e:	f013 0310 	ands.w	r3, r3, #16
 8000422:	d16b      	bne.n	80004fc <HAL_ADC_Init+0xfc>
 8000424:	2800      	cmp	r0, #0
 8000426:	d169      	bne.n	80004fc <HAL_ADC_Init+0xfc>
    ADC_STATE_CLR_SET(hadc->State,
 8000428:	6aa2      	ldr	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800042a:	4937      	ldr	r1, [pc, #220]	; (8000508 <HAL_ADC_Init+0x108>)
    ADC_STATE_CLR_SET(hadc->State,
 800042c:	f422 5288 	bic.w	r2, r2, #4352	; 0x1100
 8000430:	f022 0202 	bic.w	r2, r2, #2
 8000434:	f042 0202 	orr.w	r2, r2, #2
 8000438:	62a2      	str	r2, [r4, #40]	; 0x28
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 800043a:	e894 0024 	ldmia.w	r4, {r2, r5}
 800043e:	428a      	cmp	r2, r1
 8000440:	69e1      	ldr	r1, [r4, #28]
 8000442:	d104      	bne.n	800044e <HAL_ADC_Init+0x4e>
 8000444:	f5b1 2f40 	cmp.w	r1, #786432	; 0xc0000
 8000448:	bf08      	it	eq
 800044a:	f44f 2100 	moveq.w	r1, #524288	; 0x80000
                ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode)   );
 800044e:	68e6      	ldr	r6, [r4, #12]
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
 8000450:	ea45 0546 	orr.w	r5, r5, r6, lsl #1
 8000454:	4329      	orrs	r1, r5
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 8000456:	68a5      	ldr	r5, [r4, #8]
 8000458:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
 800045c:	d035      	beq.n	80004ca <HAL_ADC_Init+0xca>
 800045e:	2d01      	cmp	r5, #1
 8000460:	bf08      	it	eq
 8000462:	f44f 7380 	moveq.w	r3, #256	; 0x100
    if (hadc->Init.DiscontinuousConvMode == ENABLE)
 8000466:	6967      	ldr	r7, [r4, #20]
 8000468:	2f01      	cmp	r7, #1
 800046a:	d106      	bne.n	800047a <HAL_ADC_Init+0x7a>
      if (hadc->Init.ContinuousConvMode == DISABLE)
 800046c:	bb7e      	cbnz	r6, 80004ce <HAL_ADC_Init+0xce>
        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
 800046e:	69a6      	ldr	r6, [r4, #24]
 8000470:	3e01      	subs	r6, #1
 8000472:	ea43 3346 	orr.w	r3, r3, r6, lsl #13
 8000476:	f443 6300 	orr.w	r3, r3, #2048	; 0x800
      MODIFY_REG(hadc->Instance->CR1,
 800047a:	6856      	ldr	r6, [r2, #4]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 800047c:	f5b5 7f80 	cmp.w	r5, #256	; 0x100
      MODIFY_REG(hadc->Instance->CR1,
 8000480:	f426 4669 	bic.w	r6, r6, #59648	; 0xe900
 8000484:	ea43 0306 	orr.w	r3, r3, r6
 8000488:	6053      	str	r3, [r2, #4]
      MODIFY_REG(hadc->Instance->CR2,
 800048a:	6896      	ldr	r6, [r2, #8]
 800048c:	4b1f      	ldr	r3, [pc, #124]	; (800050c <HAL_ADC_Init+0x10c>)
 800048e:	ea03 0306 	and.w	r3, r3, r6
 8000492:	ea43 0301 	orr.w	r3, r3, r1
 8000496:	6093      	str	r3, [r2, #8]
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
 8000498:	d001      	beq.n	800049e <HAL_ADC_Init+0x9e>
 800049a:	2d01      	cmp	r5, #1
 800049c:	d120      	bne.n	80004e0 <HAL_ADC_Init+0xe0>
      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
 800049e:	6923      	ldr	r3, [r4, #16]
 80004a0:	3b01      	subs	r3, #1
 80004a2:	051b      	lsls	r3, r3, #20
    MODIFY_REG(hadc->Instance->SQR1,
 80004a4:	6ad5      	ldr	r5, [r2, #44]	; 0x2c
 80004a6:	f425 0570 	bic.w	r5, r5, #15728640	; 0xf00000
 80004aa:	432b      	orrs	r3, r5
 80004ac:	62d3      	str	r3, [r2, #44]	; 0x2c
    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
 80004ae:	6892      	ldr	r2, [r2, #8]
 80004b0:	4b17      	ldr	r3, [pc, #92]	; (8000510 <HAL_ADC_Init+0x110>)
 80004b2:	4013      	ands	r3, r2
 80004b4:	4299      	cmp	r1, r3
 80004b6:	d115      	bne.n	80004e4 <HAL_ADC_Init+0xe4>
      ADC_CLEAR_ERRORCODE(hadc);
 80004b8:	2300      	movs	r3, #0
 80004ba:	62e3      	str	r3, [r4, #44]	; 0x2c
      ADC_STATE_CLR_SET(hadc->State,
 80004bc:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 80004be:	f023 0303 	bic.w	r3, r3, #3
 80004c2:	f043 0301 	orr.w	r3, r3, #1
 80004c6:	62a3      	str	r3, [r4, #40]	; 0x28
 80004c8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
 80004ca:	462b      	mov	r3, r5
 80004cc:	e7cb      	b.n	8000466 <HAL_ADC_Init+0x66>
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 80004ce:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 80004d0:	f046 0620 	orr.w	r6, r6, #32
 80004d4:	62a6      	str	r6, [r4, #40]	; 0x28
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80004d6:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 80004d8:	f046 0601 	orr.w	r6, r6, #1
 80004dc:	62e6      	str	r6, [r4, #44]	; 0x2c
 80004de:	e7cc      	b.n	800047a <HAL_ADC_Init+0x7a>
  uint32_t tmp_sqr1 = 0U;
 80004e0:	2300      	movs	r3, #0
 80004e2:	e7df      	b.n	80004a4 <HAL_ADC_Init+0xa4>
      ADC_STATE_CLR_SET(hadc->State,
 80004e4:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 80004e6:	f023 0312 	bic.w	r3, r3, #18
 80004ea:	f043 0310 	orr.w	r3, r3, #16
 80004ee:	62a3      	str	r3, [r4, #40]	; 0x28
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 80004f0:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
 80004f2:	f043 0301 	orr.w	r3, r3, #1
 80004f6:	62e3      	str	r3, [r4, #44]	; 0x2c
    return HAL_ERROR;
 80004f8:	2001      	movs	r0, #1
}
 80004fa:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 80004fc:	6aa3      	ldr	r3, [r4, #40]	; 0x28
 80004fe:	f043 0310 	orr.w	r3, r3, #16
 8000502:	62a3      	str	r3, [r4, #40]	; 0x28
 8000504:	e7f8      	b.n	80004f8 <HAL_ADC_Init+0xf8>
 8000506:	bf00      	nop
 8000508:	40013c00 	.word	0x40013c00
 800050c:	ffe1f7fd 	.word	0xffe1f7fd
 8000510:	ff1f0efe 	.word	0xff1f0efe

08000514 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8000514:	4a07      	ldr	r2, [pc, #28]	; (8000534 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 8000516:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8000518:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 800051a:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 800051e:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8000522:	041b      	lsls	r3, r3, #16
 8000524:	0c1b      	lsrs	r3, r3, #16
 8000526:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 800052a:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 800052e:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 8000530:	60d3      	str	r3, [r2, #12]
 8000532:	4770      	bx	lr
 8000534:	e000ed00 	.word	0xe000ed00

08000538 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8000538:	4b17      	ldr	r3, [pc, #92]	; (8000598 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 800053a:	b530      	push	{r4, r5, lr}
 800053c:	68dc      	ldr	r4, [r3, #12]
 800053e:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8000542:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000546:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8000548:	2b04      	cmp	r3, #4
 800054a:	bf28      	it	cs
 800054c:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800054e:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000550:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000554:	bf98      	it	ls
 8000556:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000558:	fa05 f303 	lsl.w	r3, r5, r3
 800055c:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000560:	bf88      	it	hi
 8000562:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000564:	4019      	ands	r1, r3
 8000566:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8000568:	fa05 f404 	lsl.w	r4, r5, r4
 800056c:	3c01      	subs	r4, #1
 800056e:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 8000570:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000572:	ea42 0201 	orr.w	r2, r2, r1
 8000576:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800057a:	bfaf      	iteee	ge
 800057c:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000580:	4b06      	ldrlt	r3, [pc, #24]	; (800059c <HAL_NVIC_SetPriority+0x64>)
 8000582:	f000 000f 	andlt.w	r0, r0, #15
 8000586:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000588:	bfa5      	ittet	ge
 800058a:	b2d2      	uxtbge	r2, r2
 800058c:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000590:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000592:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 8000596:	bd30      	pop	{r4, r5, pc}
 8000598:	e000ed00 	.word	0xe000ed00
 800059c:	e000ed14 	.word	0xe000ed14

080005a0 <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 80005a0:	2301      	movs	r3, #1
 80005a2:	0942      	lsrs	r2, r0, #5
 80005a4:	f000 001f 	and.w	r0, r0, #31
 80005a8:	fa03 f000 	lsl.w	r0, r3, r0
 80005ac:	4b01      	ldr	r3, [pc, #4]	; (80005b4 <HAL_NVIC_EnableIRQ+0x14>)
 80005ae:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 80005b2:	4770      	bx	lr
 80005b4:	e000e100 	.word	0xe000e100

080005b8 <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 80005b8:	3801      	subs	r0, #1
 80005ba:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 80005be:	d20a      	bcs.n	80005d6 <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005c0:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 80005c2:	4b06      	ldr	r3, [pc, #24]	; (80005dc <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005c4:	4a06      	ldr	r2, [pc, #24]	; (80005e0 <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 80005c6:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80005c8:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80005cc:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80005ce:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 80005d0:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 80005d2:	601a      	str	r2, [r3, #0]
 80005d4:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 80005d6:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 80005d8:	4770      	bx	lr
 80005da:	bf00      	nop
 80005dc:	e000e010 	.word	0xe000e010
 80005e0:	e000ed00 	.word	0xe000ed00

080005e4 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Channel.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 80005e4:	b510      	push	{r4, lr}
  uint32_t tmp = 0U;

  /* Check the DMA handle allocation */
  if(hdma == NULL)
 80005e6:	2800      	cmp	r0, #0
 80005e8:	d032      	beq.n	8000650 <HAL_DMA_Init+0x6c>
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

#if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC)
  /* calculation of the channel index */
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
 80005ea:	6801      	ldr	r1, [r0, #0]
 80005ec:	4b19      	ldr	r3, [pc, #100]	; (8000654 <HAL_DMA_Init+0x70>)
 80005ee:	2414      	movs	r4, #20
 80005f0:	4299      	cmp	r1, r3
 80005f2:	d825      	bhi.n	8000640 <HAL_DMA_Init+0x5c>
  {
    /* DMA1 */
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 80005f4:	4a18      	ldr	r2, [pc, #96]	; (8000658 <HAL_DMA_Init+0x74>)
    hdma->DmaBaseAddress = DMA1;
 80005f6:	f2a3 4307 	subw	r3, r3, #1031	; 0x407
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
 80005fa:	440a      	add	r2, r1
 80005fc:	fbb2 f2f4 	udiv	r2, r2, r4
 8000600:	0092      	lsls	r2, r2, #2
 8000602:	6402      	str	r2, [r0, #64]	; 0x40
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
                      DMA_CCR_DIR));

  /* Prepare the DMA Channel configuration */
  tmp |=  hdma->Init.Direction        |
 8000604:	6884      	ldr	r4, [r0, #8]
    hdma->DmaBaseAddress = DMA2;
 8000606:	63c3      	str	r3, [r0, #60]	; 0x3c
  tmp |=  hdma->Init.Direction        |
 8000608:	6843      	ldr	r3, [r0, #4]
  tmp = hdma->Instance->CCR;
 800060a:	680a      	ldr	r2, [r1, #0]
  tmp |=  hdma->Init.Direction        |
 800060c:	4323      	orrs	r3, r4
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800060e:	68c4      	ldr	r4, [r0, #12]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8000610:	f422 527f 	bic.w	r2, r2, #16320	; 0x3fc0
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8000614:	4323      	orrs	r3, r4
 8000616:	6904      	ldr	r4, [r0, #16]
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
 8000618:	f022 0230 	bic.w	r2, r2, #48	; 0x30
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800061c:	4323      	orrs	r3, r4
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 800061e:	6944      	ldr	r4, [r0, #20]
 8000620:	4323      	orrs	r3, r4
 8000622:	6984      	ldr	r4, [r0, #24]
 8000624:	4323      	orrs	r3, r4
          hdma->Init.Mode                | hdma->Init.Priority;
 8000626:	69c4      	ldr	r4, [r0, #28]
 8000628:	4323      	orrs	r3, r4
  tmp |=  hdma->Init.Direction        |
 800062a:	4313      	orrs	r3, r2

  /* Write to DMA Channel CR register */
  hdma->Instance->CCR = tmp;
 800062c:	600b      	str	r3, [r1, #0]

  /* Initialise the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;

  /* Initialize the DMA state*/
  hdma->State = HAL_DMA_STATE_READY;
 800062e:	2201      	movs	r2, #1
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8000630:	2300      	movs	r3, #0
  hdma->State = HAL_DMA_STATE_READY;
 8000632:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 8000636:	6383      	str	r3, [r0, #56]	; 0x38
  /* Allocate lock resource and initialize it */
  hdma->Lock = HAL_UNLOCKED;
 8000638:	f880 3020 	strb.w	r3, [r0, #32]

  return HAL_OK;
 800063c:	4618      	mov	r0, r3
 800063e:	bd10      	pop	{r4, pc}
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
 8000640:	4b06      	ldr	r3, [pc, #24]	; (800065c <HAL_DMA_Init+0x78>)
 8000642:	440b      	add	r3, r1
 8000644:	fbb3 f3f4 	udiv	r3, r3, r4
 8000648:	009b      	lsls	r3, r3, #2
 800064a:	6403      	str	r3, [r0, #64]	; 0x40
    hdma->DmaBaseAddress = DMA2;
 800064c:	4b04      	ldr	r3, [pc, #16]	; (8000660 <HAL_DMA_Init+0x7c>)
 800064e:	e7d9      	b.n	8000604 <HAL_DMA_Init+0x20>
    return HAL_ERROR;
 8000650:	2001      	movs	r0, #1
}
 8000652:	bd10      	pop	{r4, pc}
 8000654:	40020407 	.word	0x40020407
 8000658:	bffdfff8 	.word	0xbffdfff8
 800065c:	bffdfbf8 	.word	0xbffdfbf8
 8000660:	40020400 	.word	0x40020400

08000664 <HAL_DMA_Abort_IT>:
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{  
  HAL_StatusTypeDef status = HAL_OK;
  
  if(HAL_DMA_STATE_BUSY != hdma->State)
 8000664:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 8000668:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 800066a:	2b02      	cmp	r3, #2
 800066c:	d003      	beq.n	8000676 <HAL_DMA_Abort_IT+0x12>
  {
    /* no transfer ongoing */
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 800066e:	2304      	movs	r3, #4
 8000670:	6383      	str	r3, [r0, #56]	; 0x38
        
    status = HAL_ERROR;
 8000672:	2001      	movs	r0, #1
 8000674:	bd10      	pop	{r4, pc}
  }
  else
  { 
    /* Disable DMA IT */
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8000676:	6803      	ldr	r3, [r0, #0]
 8000678:	681a      	ldr	r2, [r3, #0]
 800067a:	f022 020e 	bic.w	r2, r2, #14
 800067e:	601a      	str	r2, [r3, #0]

    /* Disable the channel */
    __HAL_DMA_DISABLE(hdma);
 8000680:	681a      	ldr	r2, [r3, #0]
 8000682:	f022 0201 	bic.w	r2, r2, #1
 8000686:	601a      	str	r2, [r3, #0]

    /* Clear all flags */
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 8000688:	4a29      	ldr	r2, [pc, #164]	; (8000730 <HAL_DMA_Abort_IT+0xcc>)
 800068a:	4293      	cmp	r3, r2
 800068c:	d924      	bls.n	80006d8 <HAL_DMA_Abort_IT+0x74>
 800068e:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8000692:	4293      	cmp	r3, r2
 8000694:	d019      	beq.n	80006ca <HAL_DMA_Abort_IT+0x66>
 8000696:	3214      	adds	r2, #20
 8000698:	4293      	cmp	r3, r2
 800069a:	d018      	beq.n	80006ce <HAL_DMA_Abort_IT+0x6a>
 800069c:	3214      	adds	r2, #20
 800069e:	4293      	cmp	r3, r2
 80006a0:	d017      	beq.n	80006d2 <HAL_DMA_Abort_IT+0x6e>
 80006a2:	3214      	adds	r2, #20
 80006a4:	4293      	cmp	r3, r2
 80006a6:	bf0c      	ite	eq
 80006a8:	f44f 5380 	moveq.w	r3, #4096	; 0x1000
 80006ac:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 80006b0:	4a20      	ldr	r2, [pc, #128]	; (8000734 <HAL_DMA_Abort_IT+0xd0>)
 80006b2:	6053      	str	r3, [r2, #4]

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 80006b4:	2301      	movs	r3, #1

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 80006b6:	2400      	movs	r4, #0
    hdma->State = HAL_DMA_STATE_READY;
 80006b8:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21

    /* Call User Abort callback */
    if(hdma->XferAbortCallback != NULL)
 80006bc:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 80006be:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 80006c2:	b39b      	cbz	r3, 800072c <HAL_DMA_Abort_IT+0xc8>
    {
      hdma->XferAbortCallback(hdma);
 80006c4:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 80006c6:	4620      	mov	r0, r4
 80006c8:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 80006ca:	2301      	movs	r3, #1
 80006cc:	e7f0      	b.n	80006b0 <HAL_DMA_Abort_IT+0x4c>
 80006ce:	2310      	movs	r3, #16
 80006d0:	e7ee      	b.n	80006b0 <HAL_DMA_Abort_IT+0x4c>
 80006d2:	f44f 7380 	mov.w	r3, #256	; 0x100
 80006d6:	e7eb      	b.n	80006b0 <HAL_DMA_Abort_IT+0x4c>
 80006d8:	4917      	ldr	r1, [pc, #92]	; (8000738 <HAL_DMA_Abort_IT+0xd4>)
 80006da:	428b      	cmp	r3, r1
 80006dc:	d016      	beq.n	800070c <HAL_DMA_Abort_IT+0xa8>
 80006de:	3114      	adds	r1, #20
 80006e0:	428b      	cmp	r3, r1
 80006e2:	d015      	beq.n	8000710 <HAL_DMA_Abort_IT+0xac>
 80006e4:	3114      	adds	r1, #20
 80006e6:	428b      	cmp	r3, r1
 80006e8:	d014      	beq.n	8000714 <HAL_DMA_Abort_IT+0xb0>
 80006ea:	3114      	adds	r1, #20
 80006ec:	428b      	cmp	r3, r1
 80006ee:	d014      	beq.n	800071a <HAL_DMA_Abort_IT+0xb6>
 80006f0:	3114      	adds	r1, #20
 80006f2:	428b      	cmp	r3, r1
 80006f4:	d014      	beq.n	8000720 <HAL_DMA_Abort_IT+0xbc>
 80006f6:	3114      	adds	r1, #20
 80006f8:	428b      	cmp	r3, r1
 80006fa:	d014      	beq.n	8000726 <HAL_DMA_Abort_IT+0xc2>
 80006fc:	4293      	cmp	r3, r2
 80006fe:	bf14      	ite	ne
 8000700:	f44f 3380 	movne.w	r3, #65536	; 0x10000
 8000704:	f04f 7380 	moveq.w	r3, #16777216	; 0x1000000
 8000708:	4a0c      	ldr	r2, [pc, #48]	; (800073c <HAL_DMA_Abort_IT+0xd8>)
 800070a:	e7d2      	b.n	80006b2 <HAL_DMA_Abort_IT+0x4e>
 800070c:	2301      	movs	r3, #1
 800070e:	e7fb      	b.n	8000708 <HAL_DMA_Abort_IT+0xa4>
 8000710:	2310      	movs	r3, #16
 8000712:	e7f9      	b.n	8000708 <HAL_DMA_Abort_IT+0xa4>
 8000714:	f44f 7380 	mov.w	r3, #256	; 0x100
 8000718:	e7f6      	b.n	8000708 <HAL_DMA_Abort_IT+0xa4>
 800071a:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 800071e:	e7f3      	b.n	8000708 <HAL_DMA_Abort_IT+0xa4>
 8000720:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 8000724:	e7f0      	b.n	8000708 <HAL_DMA_Abort_IT+0xa4>
 8000726:	f44f 1380 	mov.w	r3, #1048576	; 0x100000
 800072a:	e7ed      	b.n	8000708 <HAL_DMA_Abort_IT+0xa4>
  HAL_StatusTypeDef status = HAL_OK;
 800072c:	4618      	mov	r0, r3
    } 
  }
  return status;
}
 800072e:	bd10      	pop	{r4, pc}
 8000730:	40020080 	.word	0x40020080
 8000734:	40020400 	.word	0x40020400
 8000738:	40020008 	.word	0x40020008
 800073c:	40020000 	.word	0x40020000

08000740 <HAL_DMA_IRQHandler>:
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Channel.  
  * @retval None
  */
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
 8000740:	b470      	push	{r4, r5, r6}
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
  uint32_t source_it = hdma->Instance->CCR;
  
  /* Half Transfer Complete Interrupt management ******************************/
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8000742:	2504      	movs	r5, #4
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8000744:	6bc6      	ldr	r6, [r0, #60]	; 0x3c
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8000746:	6c02      	ldr	r2, [r0, #64]	; 0x40
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
 8000748:	6834      	ldr	r4, [r6, #0]
  uint32_t source_it = hdma->Instance->CCR;
 800074a:	6803      	ldr	r3, [r0, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 800074c:	4095      	lsls	r5, r2
 800074e:	4225      	tst	r5, r4
  uint32_t source_it = hdma->Instance->CCR;
 8000750:	6819      	ldr	r1, [r3, #0]
  if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
 8000752:	d055      	beq.n	8000800 <HAL_DMA_IRQHandler+0xc0>
 8000754:	074d      	lsls	r5, r1, #29
 8000756:	d553      	bpl.n	8000800 <HAL_DMA_IRQHandler+0xc0>
  {
    /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 8000758:	681a      	ldr	r2, [r3, #0]
 800075a:	0696      	lsls	r6, r2, #26
    {
      /* Disable the half transfer interrupt */
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 800075c:	bf5e      	ittt	pl
 800075e:	681a      	ldrpl	r2, [r3, #0]
 8000760:	f022 0204 	bicpl.w	r2, r2, #4
 8000764:	601a      	strpl	r2, [r3, #0]
    }
    /* Clear the half transfer complete flag */
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 8000766:	4a60      	ldr	r2, [pc, #384]	; (80008e8 <HAL_DMA_IRQHandler+0x1a8>)
 8000768:	4293      	cmp	r3, r2
 800076a:	d91f      	bls.n	80007ac <HAL_DMA_IRQHandler+0x6c>
 800076c:	f502 7262 	add.w	r2, r2, #904	; 0x388
 8000770:	4293      	cmp	r3, r2
 8000772:	d014      	beq.n	800079e <HAL_DMA_IRQHandler+0x5e>
 8000774:	3214      	adds	r2, #20
 8000776:	4293      	cmp	r3, r2
 8000778:	d013      	beq.n	80007a2 <HAL_DMA_IRQHandler+0x62>
 800077a:	3214      	adds	r2, #20
 800077c:	4293      	cmp	r3, r2
 800077e:	d012      	beq.n	80007a6 <HAL_DMA_IRQHandler+0x66>
 8000780:	3214      	adds	r2, #20
 8000782:	4293      	cmp	r3, r2
 8000784:	bf0c      	ite	eq
 8000786:	f44f 4380 	moveq.w	r3, #16384	; 0x4000
 800078a:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 800078e:	4a57      	ldr	r2, [pc, #348]	; (80008ec <HAL_DMA_IRQHandler+0x1ac>)
 8000790:	6053      	str	r3, [r2, #4]

    /* DMA peripheral state is not updated in Half Transfer */
    /* but in Transfer Complete case */

    if(hdma->XferHalfCpltCallback != NULL)
 8000792:	6ac3      	ldr	r3, [r0, #44]	; 0x2c
    hdma->State = HAL_DMA_STATE_READY;

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);

    if (hdma->XferErrorCallback != NULL)
 8000794:	2b00      	cmp	r3, #0
 8000796:	f000 80a5 	beq.w	80008e4 <HAL_DMA_IRQHandler+0x1a4>
      /* Transfer error callback */
      hdma->XferErrorCallback(hdma);
    }
  }
  return;
}
 800079a:	bc70      	pop	{r4, r5, r6}
      hdma->XferErrorCallback(hdma);
 800079c:	4718      	bx	r3
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
 800079e:	2304      	movs	r3, #4
 80007a0:	e7f5      	b.n	800078e <HAL_DMA_IRQHandler+0x4e>
 80007a2:	2340      	movs	r3, #64	; 0x40
 80007a4:	e7f3      	b.n	800078e <HAL_DMA_IRQHandler+0x4e>
 80007a6:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80007aa:	e7f0      	b.n	800078e <HAL_DMA_IRQHandler+0x4e>
 80007ac:	4950      	ldr	r1, [pc, #320]	; (80008f0 <HAL_DMA_IRQHandler+0x1b0>)
 80007ae:	428b      	cmp	r3, r1
 80007b0:	d016      	beq.n	80007e0 <HAL_DMA_IRQHandler+0xa0>
 80007b2:	3114      	adds	r1, #20
 80007b4:	428b      	cmp	r3, r1
 80007b6:	d015      	beq.n	80007e4 <HAL_DMA_IRQHandler+0xa4>
 80007b8:	3114      	adds	r1, #20
 80007ba:	428b      	cmp	r3, r1
 80007bc:	d014      	beq.n	80007e8 <HAL_DMA_IRQHandler+0xa8>
 80007be:	3114      	adds	r1, #20
 80007c0:	428b      	cmp	r3, r1
 80007c2:	d014      	beq.n	80007ee <HAL_DMA_IRQHandler+0xae>
 80007c4:	3114      	adds	r1, #20
 80007c6:	428b      	cmp	r3, r1
 80007c8:	d014      	beq.n	80007f4 <HAL_DMA_IRQHandler+0xb4>
 80007ca:	3114      	adds	r1, #20
 80007cc:	428b      	cmp	r3, r1
 80007ce:	d014      	beq.n	80007fa <HAL_DMA_IRQHandler+0xba>
 80007d0:	4293      	cmp	r3, r2
 80007d2:	bf14      	ite	ne
 80007d4:	f44f 2380 	movne.w	r3, #262144	; 0x40000
 80007d8:	f04f 6380 	moveq.w	r3, #67108864	; 0x4000000
 80007dc:	4a45      	ldr	r2, [pc, #276]	; (80008f4 <HAL_DMA_IRQHandler+0x1b4>)
 80007de:	e7d7      	b.n	8000790 <HAL_DMA_IRQHandler+0x50>
 80007e0:	2304      	movs	r3, #4
 80007e2:	e7fb      	b.n	80007dc <HAL_DMA_IRQHandler+0x9c>
 80007e4:	2340      	movs	r3, #64	; 0x40
 80007e6:	e7f9      	b.n	80007dc <HAL_DMA_IRQHandler+0x9c>
 80007e8:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80007ec:	e7f6      	b.n	80007dc <HAL_DMA_IRQHandler+0x9c>
 80007ee:	f44f 4380 	mov.w	r3, #16384	; 0x4000
 80007f2:	e7f3      	b.n	80007dc <HAL_DMA_IRQHandler+0x9c>
 80007f4:	f44f 2380 	mov.w	r3, #262144	; 0x40000
 80007f8:	e7f0      	b.n	80007dc <HAL_DMA_IRQHandler+0x9c>
 80007fa:	f44f 0380 	mov.w	r3, #4194304	; 0x400000
 80007fe:	e7ed      	b.n	80007dc <HAL_DMA_IRQHandler+0x9c>
  else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
 8000800:	2502      	movs	r5, #2
 8000802:	4095      	lsls	r5, r2
 8000804:	4225      	tst	r5, r4
 8000806:	d057      	beq.n	80008b8 <HAL_DMA_IRQHandler+0x178>
 8000808:	078d      	lsls	r5, r1, #30
 800080a:	d555      	bpl.n	80008b8 <HAL_DMA_IRQHandler+0x178>
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
 800080c:	681a      	ldr	r2, [r3, #0]
 800080e:	0694      	lsls	r4, r2, #26
 8000810:	d406      	bmi.n	8000820 <HAL_DMA_IRQHandler+0xe0>
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  
 8000812:	681a      	ldr	r2, [r3, #0]
 8000814:	f022 020a 	bic.w	r2, r2, #10
 8000818:	601a      	str	r2, [r3, #0]
      hdma->State = HAL_DMA_STATE_READY;
 800081a:	2201      	movs	r2, #1
 800081c:	f880 2021 	strb.w	r2, [r0, #33]	; 0x21
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8000820:	4a31      	ldr	r2, [pc, #196]	; (80008e8 <HAL_DMA_IRQHandler+0x1a8>)
 8000822:	4293      	cmp	r3, r2
 8000824:	d91e      	bls.n	8000864 <HAL_DMA_IRQHandler+0x124>
 8000826:	f502 7262 	add.w	r2, r2, #904	; 0x388
 800082a:	4293      	cmp	r3, r2
 800082c:	d013      	beq.n	8000856 <HAL_DMA_IRQHandler+0x116>
 800082e:	3214      	adds	r2, #20
 8000830:	4293      	cmp	r3, r2
 8000832:	d012      	beq.n	800085a <HAL_DMA_IRQHandler+0x11a>
 8000834:	3214      	adds	r2, #20
 8000836:	4293      	cmp	r3, r2
 8000838:	d011      	beq.n	800085e <HAL_DMA_IRQHandler+0x11e>
 800083a:	3214      	adds	r2, #20
 800083c:	4293      	cmp	r3, r2
 800083e:	bf0c      	ite	eq
 8000840:	f44f 5300 	moveq.w	r3, #8192	; 0x2000
 8000844:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8000848:	4a28      	ldr	r2, [pc, #160]	; (80008ec <HAL_DMA_IRQHandler+0x1ac>)
 800084a:	6053      	str	r3, [r2, #4]
    __HAL_UNLOCK(hdma);
 800084c:	2300      	movs	r3, #0
 800084e:	f880 3020 	strb.w	r3, [r0, #32]
    if(hdma->XferCpltCallback != NULL)
 8000852:	6a83      	ldr	r3, [r0, #40]	; 0x28
 8000854:	e79e      	b.n	8000794 <HAL_DMA_IRQHandler+0x54>
      __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
 8000856:	2302      	movs	r3, #2
 8000858:	e7f6      	b.n	8000848 <HAL_DMA_IRQHandler+0x108>
 800085a:	2320      	movs	r3, #32
 800085c:	e7f4      	b.n	8000848 <HAL_DMA_IRQHandler+0x108>
 800085e:	f44f 7300 	mov.w	r3, #512	; 0x200
 8000862:	e7f1      	b.n	8000848 <HAL_DMA_IRQHandler+0x108>
 8000864:	4922      	ldr	r1, [pc, #136]	; (80008f0 <HAL_DMA_IRQHandler+0x1b0>)
 8000866:	428b      	cmp	r3, r1
 8000868:	d016      	beq.n	8000898 <HAL_DMA_IRQHandler+0x158>
 800086a:	3114      	adds	r1, #20
 800086c:	428b      	cmp	r3, r1
 800086e:	d015      	beq.n	800089c <HAL_DMA_IRQHandler+0x15c>
 8000870:	3114      	adds	r1, #20
 8000872:	428b      	cmp	r3, r1
 8000874:	d014      	beq.n	80008a0 <HAL_DMA_IRQHandler+0x160>
 8000876:	3114      	adds	r1, #20
 8000878:	428b      	cmp	r3, r1
 800087a:	d014      	beq.n	80008a6 <HAL_DMA_IRQHandler+0x166>
 800087c:	3114      	adds	r1, #20
 800087e:	428b      	cmp	r3, r1
 8000880:	d014      	beq.n	80008ac <HAL_DMA_IRQHandler+0x16c>
 8000882:	3114      	adds	r1, #20
 8000884:	428b      	cmp	r3, r1
 8000886:	d014      	beq.n	80008b2 <HAL_DMA_IRQHandler+0x172>
 8000888:	4293      	cmp	r3, r2
 800088a:	bf14      	ite	ne
 800088c:	f44f 3300 	movne.w	r3, #131072	; 0x20000
 8000890:	f04f 7300 	moveq.w	r3, #33554432	; 0x2000000
 8000894:	4a17      	ldr	r2, [pc, #92]	; (80008f4 <HAL_DMA_IRQHandler+0x1b4>)
 8000896:	e7d8      	b.n	800084a <HAL_DMA_IRQHandler+0x10a>
 8000898:	2302      	movs	r3, #2
 800089a:	e7fb      	b.n	8000894 <HAL_DMA_IRQHandler+0x154>
 800089c:	2320      	movs	r3, #32
 800089e:	e7f9      	b.n	8000894 <HAL_DMA_IRQHandler+0x154>
 80008a0:	f44f 7300 	mov.w	r3, #512	; 0x200
 80008a4:	e7f6      	b.n	8000894 <HAL_DMA_IRQHandler+0x154>
 80008a6:	f44f 5300 	mov.w	r3, #8192	; 0x2000
 80008aa:	e7f3      	b.n	8000894 <HAL_DMA_IRQHandler+0x154>
 80008ac:	f44f 3300 	mov.w	r3, #131072	; 0x20000
 80008b0:	e7f0      	b.n	8000894 <HAL_DMA_IRQHandler+0x154>
 80008b2:	f44f 1300 	mov.w	r3, #2097152	; 0x200000
 80008b6:	e7ed      	b.n	8000894 <HAL_DMA_IRQHandler+0x154>
  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
 80008b8:	2508      	movs	r5, #8
 80008ba:	4095      	lsls	r5, r2
 80008bc:	4225      	tst	r5, r4
 80008be:	d011      	beq.n	80008e4 <HAL_DMA_IRQHandler+0x1a4>
 80008c0:	0709      	lsls	r1, r1, #28
 80008c2:	d50f      	bpl.n	80008e4 <HAL_DMA_IRQHandler+0x1a4>
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80008c4:	6819      	ldr	r1, [r3, #0]
 80008c6:	f021 010e 	bic.w	r1, r1, #14
 80008ca:	6019      	str	r1, [r3, #0]
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
 80008cc:	2301      	movs	r3, #1
 80008ce:	fa03 f202 	lsl.w	r2, r3, r2
 80008d2:	6072      	str	r2, [r6, #4]
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
 80008d4:	6383      	str	r3, [r0, #56]	; 0x38
    hdma->State = HAL_DMA_STATE_READY;
 80008d6:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21
    __HAL_UNLOCK(hdma);
 80008da:	2300      	movs	r3, #0
 80008dc:	f880 3020 	strb.w	r3, [r0, #32]
    if (hdma->XferErrorCallback != NULL)
 80008e0:	6b03      	ldr	r3, [r0, #48]	; 0x30
 80008e2:	e757      	b.n	8000794 <HAL_DMA_IRQHandler+0x54>
}
 80008e4:	bc70      	pop	{r4, r5, r6}
 80008e6:	4770      	bx	lr
 80008e8:	40020080 	.word	0x40020080
 80008ec:	40020400 	.word	0x40020400
 80008f0:	40020008 	.word	0x40020008
 80008f4:	40020000 	.word	0x40020000

080008f8 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 80008f8:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 80008fc:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 80008fe:	4616      	mov	r6, r2
      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000900:	4f6c      	ldr	r7, [pc, #432]	; (8000ab4 <HAL_GPIO_Init+0x1bc>)
 8000902:	4b6d      	ldr	r3, [pc, #436]	; (8000ab8 <HAL_GPIO_Init+0x1c0>)
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000904:	f8df e1b8 	ldr.w	lr, [pc, #440]	; 8000ac0 <HAL_GPIO_Init+0x1c8>
      switch (GPIO_Init->Mode)
 8000908:	f8df c1b8 	ldr.w	ip, [pc, #440]	; 8000ac4 <HAL_GPIO_Init+0x1cc>
    ioposition = (0x01U << position);
 800090c:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000910:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 8000912:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000916:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 800091a:	45a0      	cmp	r8, r4
 800091c:	f040 8085 	bne.w	8000a2a <HAL_GPIO_Init+0x132>
      switch (GPIO_Init->Mode)
 8000920:	684d      	ldr	r5, [r1, #4]
 8000922:	2d12      	cmp	r5, #18
 8000924:	f000 80b7 	beq.w	8000a96 <HAL_GPIO_Init+0x19e>
 8000928:	f200 808d 	bhi.w	8000a46 <HAL_GPIO_Init+0x14e>
 800092c:	2d02      	cmp	r5, #2
 800092e:	f000 80af 	beq.w	8000a90 <HAL_GPIO_Init+0x198>
 8000932:	f200 8081 	bhi.w	8000a38 <HAL_GPIO_Init+0x140>
 8000936:	2d00      	cmp	r5, #0
 8000938:	f000 8091 	beq.w	8000a5e <HAL_GPIO_Init+0x166>
 800093c:	2d01      	cmp	r5, #1
 800093e:	f000 80a5 	beq.w	8000a8c <HAL_GPIO_Init+0x194>
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8000942:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 8000946:	2cff      	cmp	r4, #255	; 0xff
 8000948:	bf93      	iteet	ls
 800094a:	4682      	movls	sl, r0
 800094c:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 8000950:	3d08      	subhi	r5, #8
 8000952:	f8d0 b000 	ldrls.w	fp, [r0]
 8000956:	bf92      	itee	ls
 8000958:	00b5      	lslls	r5, r6, #2
 800095a:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 800095e:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8000960:	fa09 f805 	lsl.w	r8, r9, r5
 8000964:	ea2b 0808 	bic.w	r8, fp, r8
 8000968:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 800096c:	bf88      	it	hi
 800096e:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 8000972:	ea48 0505 	orr.w	r5, r8, r5
 8000976:	f8ca 5000 	str.w	r5, [sl]
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 800097a:	f8d1 a004 	ldr.w	sl, [r1, #4]
 800097e:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 8000982:	d052      	beq.n	8000a2a <HAL_GPIO_Init+0x132>
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000984:	69bd      	ldr	r5, [r7, #24]
 8000986:	f026 0803 	bic.w	r8, r6, #3
 800098a:	f045 0501 	orr.w	r5, r5, #1
 800098e:	61bd      	str	r5, [r7, #24]
 8000990:	69bd      	ldr	r5, [r7, #24]
 8000992:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 8000996:	f005 0501 	and.w	r5, r5, #1
 800099a:	9501      	str	r5, [sp, #4]
 800099c:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80009a0:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 80009a4:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80009a6:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 80009aa:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 80009ae:	fa09 f90b 	lsl.w	r9, r9, fp
 80009b2:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80009b6:	4d41      	ldr	r5, [pc, #260]	; (8000abc <HAL_GPIO_Init+0x1c4>)
 80009b8:	42a8      	cmp	r0, r5
 80009ba:	d071      	beq.n	8000aa0 <HAL_GPIO_Init+0x1a8>
 80009bc:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80009c0:	42a8      	cmp	r0, r5
 80009c2:	d06f      	beq.n	8000aa4 <HAL_GPIO_Init+0x1ac>
 80009c4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80009c8:	42a8      	cmp	r0, r5
 80009ca:	d06d      	beq.n	8000aa8 <HAL_GPIO_Init+0x1b0>
 80009cc:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80009d0:	42a8      	cmp	r0, r5
 80009d2:	d06b      	beq.n	8000aac <HAL_GPIO_Init+0x1b4>
 80009d4:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 80009d8:	42a8      	cmp	r0, r5
 80009da:	d069      	beq.n	8000ab0 <HAL_GPIO_Init+0x1b8>
 80009dc:	4570      	cmp	r0, lr
 80009de:	bf0c      	ite	eq
 80009e0:	2505      	moveq	r5, #5
 80009e2:	2506      	movne	r5, #6
 80009e4:	fa05 f50b 	lsl.w	r5, r5, fp
 80009e8:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 80009ec:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 80009f0:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 80009f2:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 80009f6:	bf14      	ite	ne
 80009f8:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 80009fa:	43a5      	biceq	r5, r4
 80009fc:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 80009fe:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 8000a00:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 8000a04:	bf14      	ite	ne
 8000a06:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 8000a08:	43a5      	biceq	r5, r4
 8000a0a:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 8000a0c:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 8000a0e:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 8000a12:	bf14      	ite	ne
 8000a14:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 8000a16:	43a5      	biceq	r5, r4
 8000a18:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 8000a1a:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 8000a1c:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 8000a20:	bf14      	ite	ne
 8000a22:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 8000a24:	ea25 0404 	biceq.w	r4, r5, r4
 8000a28:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 8000a2a:	3601      	adds	r6, #1
 8000a2c:	2e10      	cmp	r6, #16
 8000a2e:	f47f af6d 	bne.w	800090c <HAL_GPIO_Init+0x14>
        }
      }
    }
  }
}
 8000a32:	b003      	add	sp, #12
 8000a34:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 8000a38:	2d03      	cmp	r5, #3
 8000a3a:	d025      	beq.n	8000a88 <HAL_GPIO_Init+0x190>
 8000a3c:	2d11      	cmp	r5, #17
 8000a3e:	d180      	bne.n	8000942 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 8000a40:	68ca      	ldr	r2, [r1, #12]
 8000a42:	3204      	adds	r2, #4
          break;
 8000a44:	e77d      	b.n	8000942 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8000a46:	4565      	cmp	r5, ip
 8000a48:	d009      	beq.n	8000a5e <HAL_GPIO_Init+0x166>
 8000a4a:	d812      	bhi.n	8000a72 <HAL_GPIO_Init+0x17a>
 8000a4c:	f8df 9078 	ldr.w	r9, [pc, #120]	; 8000ac8 <HAL_GPIO_Init+0x1d0>
 8000a50:	454d      	cmp	r5, r9
 8000a52:	d004      	beq.n	8000a5e <HAL_GPIO_Init+0x166>
 8000a54:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8000a58:	454d      	cmp	r5, r9
 8000a5a:	f47f af72 	bne.w	8000942 <HAL_GPIO_Init+0x4a>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 8000a5e:	688a      	ldr	r2, [r1, #8]
 8000a60:	b1e2      	cbz	r2, 8000a9c <HAL_GPIO_Init+0x1a4>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 8000a62:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 8000a64:	bf0c      	ite	eq
 8000a66:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 8000a6a:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 8000a6e:	2208      	movs	r2, #8
 8000a70:	e767      	b.n	8000942 <HAL_GPIO_Init+0x4a>
      switch (GPIO_Init->Mode)
 8000a72:	f8df 9058 	ldr.w	r9, [pc, #88]	; 8000acc <HAL_GPIO_Init+0x1d4>
 8000a76:	454d      	cmp	r5, r9
 8000a78:	d0f1      	beq.n	8000a5e <HAL_GPIO_Init+0x166>
 8000a7a:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 8000a7e:	454d      	cmp	r5, r9
 8000a80:	d0ed      	beq.n	8000a5e <HAL_GPIO_Init+0x166>
 8000a82:	f5a9 1980 	sub.w	r9, r9, #1048576	; 0x100000
 8000a86:	e7e7      	b.n	8000a58 <HAL_GPIO_Init+0x160>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 8000a88:	2200      	movs	r2, #0
 8000a8a:	e75a      	b.n	8000942 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 8000a8c:	68ca      	ldr	r2, [r1, #12]
          break;
 8000a8e:	e758      	b.n	8000942 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 8000a90:	68ca      	ldr	r2, [r1, #12]
 8000a92:	3208      	adds	r2, #8
          break;
 8000a94:	e755      	b.n	8000942 <HAL_GPIO_Init+0x4a>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 8000a96:	68ca      	ldr	r2, [r1, #12]
 8000a98:	320c      	adds	r2, #12
          break;
 8000a9a:	e752      	b.n	8000942 <HAL_GPIO_Init+0x4a>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 8000a9c:	2204      	movs	r2, #4
 8000a9e:	e750      	b.n	8000942 <HAL_GPIO_Init+0x4a>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000aa0:	2500      	movs	r5, #0
 8000aa2:	e79f      	b.n	80009e4 <HAL_GPIO_Init+0xec>
 8000aa4:	2501      	movs	r5, #1
 8000aa6:	e79d      	b.n	80009e4 <HAL_GPIO_Init+0xec>
 8000aa8:	2502      	movs	r5, #2
 8000aaa:	e79b      	b.n	80009e4 <HAL_GPIO_Init+0xec>
 8000aac:	2503      	movs	r5, #3
 8000aae:	e799      	b.n	80009e4 <HAL_GPIO_Init+0xec>
 8000ab0:	2504      	movs	r5, #4
 8000ab2:	e797      	b.n	80009e4 <HAL_GPIO_Init+0xec>
 8000ab4:	40021000 	.word	0x40021000
 8000ab8:	40010400 	.word	0x40010400
 8000abc:	40010800 	.word	0x40010800
 8000ac0:	40011c00 	.word	0x40011c00
 8000ac4:	10210000 	.word	0x10210000
 8000ac8:	10110000 	.word	0x10110000
 8000acc:	10310000 	.word	0x10310000

08000ad0 <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 8000ad0:	b10a      	cbz	r2, 8000ad6 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 8000ad2:	6101      	str	r1, [r0, #16]
 8000ad4:	4770      	bx	lr
 8000ad6:	0409      	lsls	r1, r1, #16
 8000ad8:	e7fb      	b.n	8000ad2 <HAL_GPIO_WritePin+0x2>
	...

08000adc <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000adc:	6803      	ldr	r3, [r0, #0]
{
 8000ade:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000ae2:	07db      	lsls	r3, r3, #31
{
 8000ae4:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000ae6:	d410      	bmi.n	8000b0a <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 8000ae8:	682b      	ldr	r3, [r5, #0]
 8000aea:	079f      	lsls	r7, r3, #30
 8000aec:	d45e      	bmi.n	8000bac <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8000aee:	682b      	ldr	r3, [r5, #0]
 8000af0:	0719      	lsls	r1, r3, #28
 8000af2:	f100 8095 	bmi.w	8000c20 <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 8000af6:	682b      	ldr	r3, [r5, #0]
 8000af8:	075a      	lsls	r2, r3, #29
 8000afa:	f100 80bf 	bmi.w	8000c7c <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8000afe:	69ea      	ldr	r2, [r5, #28]
 8000b00:	2a00      	cmp	r2, #0
 8000b02:	f040 812d 	bne.w	8000d60 <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 8000b06:	2000      	movs	r0, #0
 8000b08:	e014      	b.n	8000b34 <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 8000b0a:	4c90      	ldr	r4, [pc, #576]	; (8000d4c <HAL_RCC_OscConfig+0x270>)
 8000b0c:	6863      	ldr	r3, [r4, #4]
 8000b0e:	f003 030c 	and.w	r3, r3, #12
 8000b12:	2b04      	cmp	r3, #4
 8000b14:	d007      	beq.n	8000b26 <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 8000b16:	6863      	ldr	r3, [r4, #4]
 8000b18:	f003 030c 	and.w	r3, r3, #12
 8000b1c:	2b08      	cmp	r3, #8
 8000b1e:	d10c      	bne.n	8000b3a <HAL_RCC_OscConfig+0x5e>
 8000b20:	6863      	ldr	r3, [r4, #4]
 8000b22:	03de      	lsls	r6, r3, #15
 8000b24:	d509      	bpl.n	8000b3a <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 8000b26:	6823      	ldr	r3, [r4, #0]
 8000b28:	039c      	lsls	r4, r3, #14
 8000b2a:	d5dd      	bpl.n	8000ae8 <HAL_RCC_OscConfig+0xc>
 8000b2c:	686b      	ldr	r3, [r5, #4]
 8000b2e:	2b00      	cmp	r3, #0
 8000b30:	d1da      	bne.n	8000ae8 <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 8000b32:	2001      	movs	r0, #1
}
 8000b34:	b002      	add	sp, #8
 8000b36:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000b3a:	686b      	ldr	r3, [r5, #4]
 8000b3c:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8000b40:	d110      	bne.n	8000b64 <HAL_RCC_OscConfig+0x88>
 8000b42:	6823      	ldr	r3, [r4, #0]
 8000b44:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 8000b48:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8000b4a:	f7ff fbad 	bl	80002a8 <HAL_GetTick>
 8000b4e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000b50:	6823      	ldr	r3, [r4, #0]
 8000b52:	0398      	lsls	r0, r3, #14
 8000b54:	d4c8      	bmi.n	8000ae8 <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8000b56:	f7ff fba7 	bl	80002a8 <HAL_GetTick>
 8000b5a:	1b80      	subs	r0, r0, r6
 8000b5c:	2864      	cmp	r0, #100	; 0x64
 8000b5e:	d9f7      	bls.n	8000b50 <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 8000b60:	2003      	movs	r0, #3
 8000b62:	e7e7      	b.n	8000b34 <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000b64:	b99b      	cbnz	r3, 8000b8e <HAL_RCC_OscConfig+0xb2>
 8000b66:	6823      	ldr	r3, [r4, #0]
 8000b68:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8000b6c:	6023      	str	r3, [r4, #0]
 8000b6e:	6823      	ldr	r3, [r4, #0]
 8000b70:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8000b74:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 8000b76:	f7ff fb97 	bl	80002a8 <HAL_GetTick>
 8000b7a:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 8000b7c:	6823      	ldr	r3, [r4, #0]
 8000b7e:	0399      	lsls	r1, r3, #14
 8000b80:	d5b2      	bpl.n	8000ae8 <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8000b82:	f7ff fb91 	bl	80002a8 <HAL_GetTick>
 8000b86:	1b80      	subs	r0, r0, r6
 8000b88:	2864      	cmp	r0, #100	; 0x64
 8000b8a:	d9f7      	bls.n	8000b7c <HAL_RCC_OscConfig+0xa0>
 8000b8c:	e7e8      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000b8e:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 8000b92:	6823      	ldr	r3, [r4, #0]
 8000b94:	d103      	bne.n	8000b9e <HAL_RCC_OscConfig+0xc2>
 8000b96:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 8000b9a:	6023      	str	r3, [r4, #0]
 8000b9c:	e7d1      	b.n	8000b42 <HAL_RCC_OscConfig+0x66>
 8000b9e:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8000ba2:	6023      	str	r3, [r4, #0]
 8000ba4:	6823      	ldr	r3, [r4, #0]
 8000ba6:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8000baa:	e7cd      	b.n	8000b48 <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 8000bac:	4c67      	ldr	r4, [pc, #412]	; (8000d4c <HAL_RCC_OscConfig+0x270>)
 8000bae:	6863      	ldr	r3, [r4, #4]
 8000bb0:	f013 0f0c 	tst.w	r3, #12
 8000bb4:	d007      	beq.n	8000bc6 <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 8000bb6:	6863      	ldr	r3, [r4, #4]
 8000bb8:	f003 030c 	and.w	r3, r3, #12
 8000bbc:	2b08      	cmp	r3, #8
 8000bbe:	d110      	bne.n	8000be2 <HAL_RCC_OscConfig+0x106>
 8000bc0:	6863      	ldr	r3, [r4, #4]
 8000bc2:	03da      	lsls	r2, r3, #15
 8000bc4:	d40d      	bmi.n	8000be2 <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 8000bc6:	6823      	ldr	r3, [r4, #0]
 8000bc8:	079b      	lsls	r3, r3, #30
 8000bca:	d502      	bpl.n	8000bd2 <HAL_RCC_OscConfig+0xf6>
 8000bcc:	692b      	ldr	r3, [r5, #16]
 8000bce:	2b01      	cmp	r3, #1
 8000bd0:	d1af      	bne.n	8000b32 <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8000bd2:	6823      	ldr	r3, [r4, #0]
 8000bd4:	696a      	ldr	r2, [r5, #20]
 8000bd6:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 8000bda:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000bde:	6023      	str	r3, [r4, #0]
 8000be0:	e785      	b.n	8000aee <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 8000be2:	692a      	ldr	r2, [r5, #16]
 8000be4:	4b5a      	ldr	r3, [pc, #360]	; (8000d50 <HAL_RCC_OscConfig+0x274>)
 8000be6:	b16a      	cbz	r2, 8000c04 <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 8000be8:	2201      	movs	r2, #1
 8000bea:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8000bec:	f7ff fb5c 	bl	80002a8 <HAL_GetTick>
 8000bf0:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000bf2:	6823      	ldr	r3, [r4, #0]
 8000bf4:	079f      	lsls	r7, r3, #30
 8000bf6:	d4ec      	bmi.n	8000bd2 <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8000bf8:	f7ff fb56 	bl	80002a8 <HAL_GetTick>
 8000bfc:	1b80      	subs	r0, r0, r6
 8000bfe:	2802      	cmp	r0, #2
 8000c00:	d9f7      	bls.n	8000bf2 <HAL_RCC_OscConfig+0x116>
 8000c02:	e7ad      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8000c04:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8000c06:	f7ff fb4f 	bl	80002a8 <HAL_GetTick>
 8000c0a:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8000c0c:	6823      	ldr	r3, [r4, #0]
 8000c0e:	0798      	lsls	r0, r3, #30
 8000c10:	f57f af6d 	bpl.w	8000aee <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8000c14:	f7ff fb48 	bl	80002a8 <HAL_GetTick>
 8000c18:	1b80      	subs	r0, r0, r6
 8000c1a:	2802      	cmp	r0, #2
 8000c1c:	d9f6      	bls.n	8000c0c <HAL_RCC_OscConfig+0x130>
 8000c1e:	e79f      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8000c20:	69aa      	ldr	r2, [r5, #24]
 8000c22:	4c4a      	ldr	r4, [pc, #296]	; (8000d4c <HAL_RCC_OscConfig+0x270>)
 8000c24:	4b4b      	ldr	r3, [pc, #300]	; (8000d54 <HAL_RCC_OscConfig+0x278>)
 8000c26:	b1da      	cbz	r2, 8000c60 <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 8000c28:	2201      	movs	r2, #1
 8000c2a:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8000c2c:	f7ff fb3c 	bl	80002a8 <HAL_GetTick>
 8000c30:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8000c32:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000c34:	079b      	lsls	r3, r3, #30
 8000c36:	d50d      	bpl.n	8000c54 <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 8000c38:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 8000c3c:	4b46      	ldr	r3, [pc, #280]	; (8000d58 <HAL_RCC_OscConfig+0x27c>)
 8000c3e:	681b      	ldr	r3, [r3, #0]
 8000c40:	fbb3 f3f2 	udiv	r3, r3, r2
 8000c44:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 8000c46:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 8000c48:	9b01      	ldr	r3, [sp, #4]
 8000c4a:	1e5a      	subs	r2, r3, #1
 8000c4c:	9201      	str	r2, [sp, #4]
 8000c4e:	2b00      	cmp	r3, #0
 8000c50:	d1f9      	bne.n	8000c46 <HAL_RCC_OscConfig+0x16a>
 8000c52:	e750      	b.n	8000af6 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000c54:	f7ff fb28 	bl	80002a8 <HAL_GetTick>
 8000c58:	1b80      	subs	r0, r0, r6
 8000c5a:	2802      	cmp	r0, #2
 8000c5c:	d9e9      	bls.n	8000c32 <HAL_RCC_OscConfig+0x156>
 8000c5e:	e77f      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 8000c60:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 8000c62:	f7ff fb21 	bl	80002a8 <HAL_GetTick>
 8000c66:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8000c68:	6a63      	ldr	r3, [r4, #36]	; 0x24
 8000c6a:	079f      	lsls	r7, r3, #30
 8000c6c:	f57f af43 	bpl.w	8000af6 <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8000c70:	f7ff fb1a 	bl	80002a8 <HAL_GetTick>
 8000c74:	1b80      	subs	r0, r0, r6
 8000c76:	2802      	cmp	r0, #2
 8000c78:	d9f6      	bls.n	8000c68 <HAL_RCC_OscConfig+0x18c>
 8000c7a:	e771      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 8000c7c:	4c33      	ldr	r4, [pc, #204]	; (8000d4c <HAL_RCC_OscConfig+0x270>)
 8000c7e:	69e3      	ldr	r3, [r4, #28]
 8000c80:	00d8      	lsls	r0, r3, #3
 8000c82:	d424      	bmi.n	8000cce <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 8000c84:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 8000c86:	69e3      	ldr	r3, [r4, #28]
 8000c88:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8000c8c:	61e3      	str	r3, [r4, #28]
 8000c8e:	69e3      	ldr	r3, [r4, #28]
 8000c90:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8000c94:	9300      	str	r3, [sp, #0]
 8000c96:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000c98:	4e30      	ldr	r6, [pc, #192]	; (8000d5c <HAL_RCC_OscConfig+0x280>)
 8000c9a:	6833      	ldr	r3, [r6, #0]
 8000c9c:	05d9      	lsls	r1, r3, #23
 8000c9e:	d518      	bpl.n	8000cd2 <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000ca0:	68eb      	ldr	r3, [r5, #12]
 8000ca2:	2b01      	cmp	r3, #1
 8000ca4:	d126      	bne.n	8000cf4 <HAL_RCC_OscConfig+0x218>
 8000ca6:	6a23      	ldr	r3, [r4, #32]
 8000ca8:	f043 0301 	orr.w	r3, r3, #1
 8000cac:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000cae:	f7ff fafb 	bl	80002a8 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000cb2:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 8000cb6:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 8000cb8:	6a23      	ldr	r3, [r4, #32]
 8000cba:	079b      	lsls	r3, r3, #30
 8000cbc:	d53f      	bpl.n	8000d3e <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 8000cbe:	2f00      	cmp	r7, #0
 8000cc0:	f43f af1d 	beq.w	8000afe <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 8000cc4:	69e3      	ldr	r3, [r4, #28]
 8000cc6:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8000cca:	61e3      	str	r3, [r4, #28]
 8000ccc:	e717      	b.n	8000afe <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 8000cce:	2700      	movs	r7, #0
 8000cd0:	e7e2      	b.n	8000c98 <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8000cd2:	6833      	ldr	r3, [r6, #0]
 8000cd4:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8000cd8:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 8000cda:	f7ff fae5 	bl	80002a8 <HAL_GetTick>
 8000cde:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000ce0:	6833      	ldr	r3, [r6, #0]
 8000ce2:	05da      	lsls	r2, r3, #23
 8000ce4:	d4dc      	bmi.n	8000ca0 <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8000ce6:	f7ff fadf 	bl	80002a8 <HAL_GetTick>
 8000cea:	eba0 0008 	sub.w	r0, r0, r8
 8000cee:	2864      	cmp	r0, #100	; 0x64
 8000cf0:	d9f6      	bls.n	8000ce0 <HAL_RCC_OscConfig+0x204>
 8000cf2:	e735      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000cf4:	b9ab      	cbnz	r3, 8000d22 <HAL_RCC_OscConfig+0x246>
 8000cf6:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000cf8:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000cfc:	f023 0301 	bic.w	r3, r3, #1
 8000d00:	6223      	str	r3, [r4, #32]
 8000d02:	6a23      	ldr	r3, [r4, #32]
 8000d04:	f023 0304 	bic.w	r3, r3, #4
 8000d08:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000d0a:	f7ff facd 	bl	80002a8 <HAL_GetTick>
 8000d0e:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 8000d10:	6a23      	ldr	r3, [r4, #32]
 8000d12:	0798      	lsls	r0, r3, #30
 8000d14:	d5d3      	bpl.n	8000cbe <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000d16:	f7ff fac7 	bl	80002a8 <HAL_GetTick>
 8000d1a:	1b80      	subs	r0, r0, r6
 8000d1c:	4540      	cmp	r0, r8
 8000d1e:	d9f7      	bls.n	8000d10 <HAL_RCC_OscConfig+0x234>
 8000d20:	e71e      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000d22:	2b05      	cmp	r3, #5
 8000d24:	6a23      	ldr	r3, [r4, #32]
 8000d26:	d103      	bne.n	8000d30 <HAL_RCC_OscConfig+0x254>
 8000d28:	f043 0304 	orr.w	r3, r3, #4
 8000d2c:	6223      	str	r3, [r4, #32]
 8000d2e:	e7ba      	b.n	8000ca6 <HAL_RCC_OscConfig+0x1ca>
 8000d30:	f023 0301 	bic.w	r3, r3, #1
 8000d34:	6223      	str	r3, [r4, #32]
 8000d36:	6a23      	ldr	r3, [r4, #32]
 8000d38:	f023 0304 	bic.w	r3, r3, #4
 8000d3c:	e7b6      	b.n	8000cac <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000d3e:	f7ff fab3 	bl	80002a8 <HAL_GetTick>
 8000d42:	eba0 0008 	sub.w	r0, r0, r8
 8000d46:	42b0      	cmp	r0, r6
 8000d48:	d9b6      	bls.n	8000cb8 <HAL_RCC_OscConfig+0x1dc>
 8000d4a:	e709      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
 8000d4c:	40021000 	.word	0x40021000
 8000d50:	42420000 	.word	0x42420000
 8000d54:	42420480 	.word	0x42420480
 8000d58:	20000008 	.word	0x20000008
 8000d5c:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000d60:	4c22      	ldr	r4, [pc, #136]	; (8000dec <HAL_RCC_OscConfig+0x310>)
 8000d62:	6863      	ldr	r3, [r4, #4]
 8000d64:	f003 030c 	and.w	r3, r3, #12
 8000d68:	2b08      	cmp	r3, #8
 8000d6a:	f43f aee2 	beq.w	8000b32 <HAL_RCC_OscConfig+0x56>
 8000d6e:	2300      	movs	r3, #0
 8000d70:	4e1f      	ldr	r6, [pc, #124]	; (8000df0 <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000d72:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8000d74:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000d76:	d12b      	bne.n	8000dd0 <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 8000d78:	f7ff fa96 	bl	80002a8 <HAL_GetTick>
 8000d7c:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000d7e:	6823      	ldr	r3, [r4, #0]
 8000d80:	0199      	lsls	r1, r3, #6
 8000d82:	d41f      	bmi.n	8000dc4 <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8000d84:	6a2b      	ldr	r3, [r5, #32]
 8000d86:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8000d8a:	d105      	bne.n	8000d98 <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8000d8c:	6862      	ldr	r2, [r4, #4]
 8000d8e:	68a9      	ldr	r1, [r5, #8]
 8000d90:	f422 3200 	bic.w	r2, r2, #131072	; 0x20000
 8000d94:	430a      	orrs	r2, r1
 8000d96:	6062      	str	r2, [r4, #4]
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8000d98:	6a69      	ldr	r1, [r5, #36]	; 0x24
 8000d9a:	6862      	ldr	r2, [r4, #4]
 8000d9c:	430b      	orrs	r3, r1
 8000d9e:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 8000da2:	4313      	orrs	r3, r2
 8000da4:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 8000da6:	2301      	movs	r3, #1
 8000da8:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 8000daa:	f7ff fa7d 	bl	80002a8 <HAL_GetTick>
 8000dae:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8000db0:	6823      	ldr	r3, [r4, #0]
 8000db2:	019a      	lsls	r2, r3, #6
 8000db4:	f53f aea7 	bmi.w	8000b06 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000db8:	f7ff fa76 	bl	80002a8 <HAL_GetTick>
 8000dbc:	1b40      	subs	r0, r0, r5
 8000dbe:	2802      	cmp	r0, #2
 8000dc0:	d9f6      	bls.n	8000db0 <HAL_RCC_OscConfig+0x2d4>
 8000dc2:	e6cd      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000dc4:	f7ff fa70 	bl	80002a8 <HAL_GetTick>
 8000dc8:	1bc0      	subs	r0, r0, r7
 8000dca:	2802      	cmp	r0, #2
 8000dcc:	d9d7      	bls.n	8000d7e <HAL_RCC_OscConfig+0x2a2>
 8000dce:	e6c7      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8000dd0:	f7ff fa6a 	bl	80002a8 <HAL_GetTick>
 8000dd4:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000dd6:	6823      	ldr	r3, [r4, #0]
 8000dd8:	019b      	lsls	r3, r3, #6
 8000dda:	f57f ae94 	bpl.w	8000b06 <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000dde:	f7ff fa63 	bl	80002a8 <HAL_GetTick>
 8000de2:	1b40      	subs	r0, r0, r5
 8000de4:	2802      	cmp	r0, #2
 8000de6:	d9f6      	bls.n	8000dd6 <HAL_RCC_OscConfig+0x2fa>
 8000de8:	e6ba      	b.n	8000b60 <HAL_RCC_OscConfig+0x84>
 8000dea:	bf00      	nop
 8000dec:	40021000 	.word	0x40021000
 8000df0:	42420060 	.word	0x42420060

08000df4 <HAL_RCC_GetSysClockFreq>:
{
 8000df4:	b530      	push	{r4, r5, lr}
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8000df6:	4b19      	ldr	r3, [pc, #100]	; (8000e5c <HAL_RCC_GetSysClockFreq+0x68>)
{
 8000df8:	b087      	sub	sp, #28
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8000dfa:	ac02      	add	r4, sp, #8
 8000dfc:	f103 0510 	add.w	r5, r3, #16
 8000e00:	4622      	mov	r2, r4
 8000e02:	6818      	ldr	r0, [r3, #0]
 8000e04:	6859      	ldr	r1, [r3, #4]
 8000e06:	3308      	adds	r3, #8
 8000e08:	c203      	stmia	r2!, {r0, r1}
 8000e0a:	42ab      	cmp	r3, r5
 8000e0c:	4614      	mov	r4, r2
 8000e0e:	d1f7      	bne.n	8000e00 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8000e10:	2301      	movs	r3, #1
 8000e12:	f88d 3004 	strb.w	r3, [sp, #4]
 8000e16:	2302      	movs	r3, #2
  tmpreg = RCC->CFGR;
 8000e18:	4911      	ldr	r1, [pc, #68]	; (8000e60 <HAL_RCC_GetSysClockFreq+0x6c>)
  const uint8_t aPredivFactorTable[2] = {1, 2};
 8000e1a:	f88d 3005 	strb.w	r3, [sp, #5]
  tmpreg = RCC->CFGR;
 8000e1e:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 8000e20:	f003 020c 	and.w	r2, r3, #12
 8000e24:	2a08      	cmp	r2, #8
 8000e26:	d117      	bne.n	8000e58 <HAL_RCC_GetSysClockFreq+0x64>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000e28:	f3c3 4283 	ubfx	r2, r3, #18, #4
 8000e2c:	a806      	add	r0, sp, #24
 8000e2e:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000e30:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000e32:	f812 2c10 	ldrb.w	r2, [r2, #-16]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000e36:	d50c      	bpl.n	8000e52 <HAL_RCC_GetSysClockFreq+0x5e>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000e38:	684b      	ldr	r3, [r1, #4]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000e3a:	480a      	ldr	r0, [pc, #40]	; (8000e64 <HAL_RCC_GetSysClockFreq+0x70>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000e3c:	f3c3 4340 	ubfx	r3, r3, #17, #1
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000e40:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
 8000e42:	aa06      	add	r2, sp, #24
 8000e44:	4413      	add	r3, r2
 8000e46:	f813 3c14 	ldrb.w	r3, [r3, #-20]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000e4a:	fbb0 f0f3 	udiv	r0, r0, r3
}
 8000e4e:	b007      	add	sp, #28
 8000e50:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 8000e52:	4805      	ldr	r0, [pc, #20]	; (8000e68 <HAL_RCC_GetSysClockFreq+0x74>)
 8000e54:	4350      	muls	r0, r2
 8000e56:	e7fa      	b.n	8000e4e <HAL_RCC_GetSysClockFreq+0x5a>
      sysclockfreq = HSE_VALUE;
 8000e58:	4802      	ldr	r0, [pc, #8]	; (8000e64 <HAL_RCC_GetSysClockFreq+0x70>)
  return sysclockfreq;
 8000e5a:	e7f8      	b.n	8000e4e <HAL_RCC_GetSysClockFreq+0x5a>
 8000e5c:	08001a30 	.word	0x08001a30
 8000e60:	40021000 	.word	0x40021000
 8000e64:	007a1200 	.word	0x007a1200
 8000e68:	003d0900 	.word	0x003d0900

08000e6c <HAL_RCC_ClockConfig>:
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000e6c:	4a54      	ldr	r2, [pc, #336]	; (8000fc0 <HAL_RCC_ClockConfig+0x154>)
{
 8000e6e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000e72:	6813      	ldr	r3, [r2, #0]
{
 8000e74:	4605      	mov	r5, r0
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000e76:	f003 0307 	and.w	r3, r3, #7
 8000e7a:	428b      	cmp	r3, r1
{
 8000e7c:	460e      	mov	r6, r1
  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
 8000e7e:	d32a      	bcc.n	8000ed6 <HAL_RCC_ClockConfig+0x6a>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8000e80:	6829      	ldr	r1, [r5, #0]
 8000e82:	078c      	lsls	r4, r1, #30
 8000e84:	d434      	bmi.n	8000ef0 <HAL_RCC_ClockConfig+0x84>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8000e86:	07ca      	lsls	r2, r1, #31
 8000e88:	d447      	bmi.n	8000f1a <HAL_RCC_ClockConfig+0xae>
  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
 8000e8a:	4a4d      	ldr	r2, [pc, #308]	; (8000fc0 <HAL_RCC_ClockConfig+0x154>)
 8000e8c:	6813      	ldr	r3, [r2, #0]
 8000e8e:	f003 0307 	and.w	r3, r3, #7
 8000e92:	429e      	cmp	r6, r3
 8000e94:	f0c0 8082 	bcc.w	8000f9c <HAL_RCC_ClockConfig+0x130>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000e98:	682a      	ldr	r2, [r5, #0]
 8000e9a:	4c4a      	ldr	r4, [pc, #296]	; (8000fc4 <HAL_RCC_ClockConfig+0x158>)
 8000e9c:	f012 0f04 	tst.w	r2, #4
 8000ea0:	f040 8087 	bne.w	8000fb2 <HAL_RCC_ClockConfig+0x146>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000ea4:	0713      	lsls	r3, r2, #28
 8000ea6:	d506      	bpl.n	8000eb6 <HAL_RCC_ClockConfig+0x4a>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 8000ea8:	6863      	ldr	r3, [r4, #4]
 8000eaa:	692a      	ldr	r2, [r5, #16]
 8000eac:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8000eb0:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000eb4:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 8000eb6:	f7ff ff9d 	bl	8000df4 <HAL_RCC_GetSysClockFreq>
 8000eba:	6863      	ldr	r3, [r4, #4]
 8000ebc:	4a42      	ldr	r2, [pc, #264]	; (8000fc8 <HAL_RCC_ClockConfig+0x15c>)
 8000ebe:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8000ec2:	5cd3      	ldrb	r3, [r2, r3]
 8000ec4:	40d8      	lsrs	r0, r3
 8000ec6:	4b41      	ldr	r3, [pc, #260]	; (8000fcc <HAL_RCC_ClockConfig+0x160>)
 8000ec8:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 8000eca:	2000      	movs	r0, #0
 8000ecc:	f7ff f9aa 	bl	8000224 <HAL_InitTick>
  return HAL_OK;
 8000ed0:	2000      	movs	r0, #0
}
 8000ed2:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000ed6:	6813      	ldr	r3, [r2, #0]
 8000ed8:	f023 0307 	bic.w	r3, r3, #7
 8000edc:	430b      	orrs	r3, r1
 8000ede:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000ee0:	6813      	ldr	r3, [r2, #0]
 8000ee2:	f003 0307 	and.w	r3, r3, #7
 8000ee6:	4299      	cmp	r1, r3
 8000ee8:	d0ca      	beq.n	8000e80 <HAL_RCC_ClockConfig+0x14>
      return HAL_ERROR;
 8000eea:	2001      	movs	r0, #1
 8000eec:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8000ef0:	4b34      	ldr	r3, [pc, #208]	; (8000fc4 <HAL_RCC_ClockConfig+0x158>)
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000ef2:	f011 0f04 	tst.w	r1, #4
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8000ef6:	bf1e      	ittt	ne
 8000ef8:	685a      	ldrne	r2, [r3, #4]
 8000efa:	f442 62e0 	orrne.w	r2, r2, #1792	; 0x700
 8000efe:	605a      	strne	r2, [r3, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000f00:	0708      	lsls	r0, r1, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8000f02:	bf42      	ittt	mi
 8000f04:	685a      	ldrmi	r2, [r3, #4]
 8000f06:	f442 5260 	orrmi.w	r2, r2, #14336	; 0x3800
 8000f0a:	605a      	strmi	r2, [r3, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8000f0c:	685a      	ldr	r2, [r3, #4]
 8000f0e:	68a8      	ldr	r0, [r5, #8]
 8000f10:	f022 02f0 	bic.w	r2, r2, #240	; 0xf0
 8000f14:	4302      	orrs	r2, r0
 8000f16:	605a      	str	r2, [r3, #4]
 8000f18:	e7b5      	b.n	8000e86 <HAL_RCC_ClockConfig+0x1a>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000f1a:	686a      	ldr	r2, [r5, #4]
 8000f1c:	4c29      	ldr	r4, [pc, #164]	; (8000fc4 <HAL_RCC_ClockConfig+0x158>)
 8000f1e:	2a01      	cmp	r2, #1
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000f20:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000f22:	d11c      	bne.n	8000f5e <HAL_RCC_ClockConfig+0xf2>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000f24:	f413 3f00 	tst.w	r3, #131072	; 0x20000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000f28:	d0df      	beq.n	8000eea <HAL_RCC_ClockConfig+0x7e>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000f2a:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000f2c:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000f30:	f023 0303 	bic.w	r3, r3, #3
 8000f34:	4313      	orrs	r3, r2
 8000f36:	6063      	str	r3, [r4, #4]
    tickstart = HAL_GetTick();
 8000f38:	f7ff f9b6 	bl	80002a8 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000f3c:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 8000f3e:	4607      	mov	r7, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000f40:	2b01      	cmp	r3, #1
 8000f42:	d114      	bne.n	8000f6e <HAL_RCC_ClockConfig+0x102>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8000f44:	6863      	ldr	r3, [r4, #4]
 8000f46:	f003 030c 	and.w	r3, r3, #12
 8000f4a:	2b04      	cmp	r3, #4
 8000f4c:	d09d      	beq.n	8000e8a <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000f4e:	f7ff f9ab 	bl	80002a8 <HAL_GetTick>
 8000f52:	1bc0      	subs	r0, r0, r7
 8000f54:	4540      	cmp	r0, r8
 8000f56:	d9f5      	bls.n	8000f44 <HAL_RCC_ClockConfig+0xd8>
          return HAL_TIMEOUT;
 8000f58:	2003      	movs	r0, #3
 8000f5a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000f5e:	2a02      	cmp	r2, #2
 8000f60:	d102      	bne.n	8000f68 <HAL_RCC_ClockConfig+0xfc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8000f62:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
 8000f66:	e7df      	b.n	8000f28 <HAL_RCC_ClockConfig+0xbc>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000f68:	f013 0f02 	tst.w	r3, #2
 8000f6c:	e7dc      	b.n	8000f28 <HAL_RCC_ClockConfig+0xbc>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000f6e:	2b02      	cmp	r3, #2
 8000f70:	d10f      	bne.n	8000f92 <HAL_RCC_ClockConfig+0x126>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000f72:	6863      	ldr	r3, [r4, #4]
 8000f74:	f003 030c 	and.w	r3, r3, #12
 8000f78:	2b08      	cmp	r3, #8
 8000f7a:	d086      	beq.n	8000e8a <HAL_RCC_ClockConfig+0x1e>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000f7c:	f7ff f994 	bl	80002a8 <HAL_GetTick>
 8000f80:	1bc0      	subs	r0, r0, r7
 8000f82:	4540      	cmp	r0, r8
 8000f84:	d9f5      	bls.n	8000f72 <HAL_RCC_ClockConfig+0x106>
 8000f86:	e7e7      	b.n	8000f58 <HAL_RCC_ClockConfig+0xec>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000f88:	f7ff f98e 	bl	80002a8 <HAL_GetTick>
 8000f8c:	1bc0      	subs	r0, r0, r7
 8000f8e:	4540      	cmp	r0, r8
 8000f90:	d8e2      	bhi.n	8000f58 <HAL_RCC_ClockConfig+0xec>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 8000f92:	6863      	ldr	r3, [r4, #4]
 8000f94:	f013 0f0c 	tst.w	r3, #12
 8000f98:	d1f6      	bne.n	8000f88 <HAL_RCC_ClockConfig+0x11c>
 8000f9a:	e776      	b.n	8000e8a <HAL_RCC_ClockConfig+0x1e>
    __HAL_FLASH_SET_LATENCY(FLatency);
 8000f9c:	6813      	ldr	r3, [r2, #0]
 8000f9e:	f023 0307 	bic.w	r3, r3, #7
 8000fa2:	4333      	orrs	r3, r6
 8000fa4:	6013      	str	r3, [r2, #0]
    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
 8000fa6:	6813      	ldr	r3, [r2, #0]
 8000fa8:	f003 0307 	and.w	r3, r3, #7
 8000fac:	429e      	cmp	r6, r3
 8000fae:	d19c      	bne.n	8000eea <HAL_RCC_ClockConfig+0x7e>
 8000fb0:	e772      	b.n	8000e98 <HAL_RCC_ClockConfig+0x2c>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8000fb2:	6863      	ldr	r3, [r4, #4]
 8000fb4:	68e9      	ldr	r1, [r5, #12]
 8000fb6:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8000fba:	430b      	orrs	r3, r1
 8000fbc:	6063      	str	r3, [r4, #4]
 8000fbe:	e771      	b.n	8000ea4 <HAL_RCC_ClockConfig+0x38>
 8000fc0:	40022000 	.word	0x40022000
 8000fc4:	40021000 	.word	0x40021000
 8000fc8:	08001a40 	.word	0x08001a40
 8000fcc:	20000008 	.word	0x20000008

08000fd0 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8000fd0:	4b04      	ldr	r3, [pc, #16]	; (8000fe4 <HAL_RCC_GetPCLK1Freq+0x14>)
 8000fd2:	4a05      	ldr	r2, [pc, #20]	; (8000fe8 <HAL_RCC_GetPCLK1Freq+0x18>)
 8000fd4:	685b      	ldr	r3, [r3, #4]
 8000fd6:	f3c3 2302 	ubfx	r3, r3, #8, #3
 8000fda:	5cd3      	ldrb	r3, [r2, r3]
 8000fdc:	4a03      	ldr	r2, [pc, #12]	; (8000fec <HAL_RCC_GetPCLK1Freq+0x1c>)
 8000fde:	6810      	ldr	r0, [r2, #0]
}    
 8000fe0:	40d8      	lsrs	r0, r3
 8000fe2:	4770      	bx	lr
 8000fe4:	40021000 	.word	0x40021000
 8000fe8:	08001a50 	.word	0x08001a50
 8000fec:	20000008 	.word	0x20000008

08000ff0 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 8000ff0:	4b04      	ldr	r3, [pc, #16]	; (8001004 <HAL_RCC_GetPCLK2Freq+0x14>)
 8000ff2:	4a05      	ldr	r2, [pc, #20]	; (8001008 <HAL_RCC_GetPCLK2Freq+0x18>)
 8000ff4:	685b      	ldr	r3, [r3, #4]
 8000ff6:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 8000ffa:	5cd3      	ldrb	r3, [r2, r3]
 8000ffc:	4a03      	ldr	r2, [pc, #12]	; (800100c <HAL_RCC_GetPCLK2Freq+0x1c>)
 8000ffe:	6810      	ldr	r0, [r2, #0]
} 
 8001000:	40d8      	lsrs	r0, r3
 8001002:	4770      	bx	lr
 8001004:	40021000 	.word	0x40021000
 8001008:	08001a50 	.word	0x08001a50
 800100c:	20000008 	.word	0x20000008

08001010 <HAL_RCCEx_PeriphCLKConfig>:

  /* Check the parameters */
  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
  
  /*------------------------------- RTC/LCD Configuration ------------------------*/ 
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8001010:	6803      	ldr	r3, [r0, #0]
{
 8001012:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 8001016:	07d9      	lsls	r1, r3, #31
{
 8001018:	4605      	mov	r5, r0
  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
 800101a:	d520      	bpl.n	800105e <HAL_RCCEx_PeriphCLKConfig+0x4e>
    FlagStatus       pwrclkchanged = RESET;

    /* As soon as function is called to change RTC clock source, activation of the 
       power domain is done. */
    /* Requires to enable write access to Backup Domain of necessary */
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 800101c:	4c35      	ldr	r4, [pc, #212]	; (80010f4 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 800101e:	69e3      	ldr	r3, [r4, #28]
 8001020:	00da      	lsls	r2, r3, #3
 8001022:	d432      	bmi.n	800108a <HAL_RCCEx_PeriphCLKConfig+0x7a>
    {
    __HAL_RCC_PWR_CLK_ENABLE();
      pwrclkchanged = SET;
 8001024:	2701      	movs	r7, #1
    __HAL_RCC_PWR_CLK_ENABLE();
 8001026:	69e3      	ldr	r3, [r4, #28]
 8001028:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 800102c:	61e3      	str	r3, [r4, #28]
 800102e:	69e3      	ldr	r3, [r4, #28]
 8001030:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001034:	9301      	str	r3, [sp, #4]
 8001036:	9b01      	ldr	r3, [sp, #4]
    }
    
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8001038:	4e2f      	ldr	r6, [pc, #188]	; (80010f8 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 800103a:	6833      	ldr	r3, [r6, #0]
 800103c:	05db      	lsls	r3, r3, #23
 800103e:	d526      	bpl.n	800108e <HAL_RCCEx_PeriphCLKConfig+0x7e>
        }
      }
    }
      
    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ 
    temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
 8001040:	6a23      	ldr	r3, [r4, #32]
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 8001042:	f413 7340 	ands.w	r3, r3, #768	; 0x300
 8001046:	d136      	bne.n	80010b6 <HAL_RCCEx_PeriphCLKConfig+0xa6>
            return HAL_TIMEOUT;
          }      
        }  
      }
    }
    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 
 8001048:	6a23      	ldr	r3, [r4, #32]
 800104a:	686a      	ldr	r2, [r5, #4]
 800104c:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8001050:	4313      	orrs	r3, r2
 8001052:	6223      	str	r3, [r4, #32]

    /* Require to disable power clock if necessary */
    if(pwrclkchanged == SET)
 8001054:	b11f      	cbz	r7, 800105e <HAL_RCCEx_PeriphCLKConfig+0x4e>
    {
      __HAL_RCC_PWR_CLK_DISABLE();
 8001056:	69e3      	ldr	r3, [r4, #28]
 8001058:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 800105c:	61e3      	str	r3, [r4, #28]
    }
  }

  /*------------------------------ ADC clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800105e:	6828      	ldr	r0, [r5, #0]
 8001060:	0783      	lsls	r3, r0, #30
 8001062:	d506      	bpl.n	8001072 <HAL_RCCEx_PeriphCLKConfig+0x62>
  {
    /* Check the parameters */
    assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
    
    /* Configure the ADC clock source */
    __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 8001064:	4a23      	ldr	r2, [pc, #140]	; (80010f4 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 8001066:	68a9      	ldr	r1, [r5, #8]
 8001068:	6853      	ldr	r3, [r2, #4]
 800106a:	f423 4340 	bic.w	r3, r3, #49152	; 0xc000
 800106e:	430b      	orrs	r3, r1
 8001070:	6053      	str	r3, [r2, #4]

#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
 || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
 || defined(STM32F105xC) || defined(STM32F107xC)
  /*------------------------------ USB clock Configuration ------------------*/ 
  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 8001072:	f010 0010 	ands.w	r0, r0, #16
 8001076:	d01b      	beq.n	80010b0 <HAL_RCCEx_PeriphCLKConfig+0xa0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
    
    /* Configure the USB clock source */
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8001078:	4a1e      	ldr	r2, [pc, #120]	; (80010f4 <HAL_RCCEx_PeriphCLKConfig+0xe4>)
 800107a:	6969      	ldr	r1, [r5, #20]
 800107c:	6853      	ldr	r3, [r2, #4]
  }
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */

  return HAL_OK;
 800107e:	2000      	movs	r0, #0
    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 8001080:	f423 0380 	bic.w	r3, r3, #4194304	; 0x400000
 8001084:	430b      	orrs	r3, r1
 8001086:	6053      	str	r3, [r2, #4]
 8001088:	e012      	b.n	80010b0 <HAL_RCCEx_PeriphCLKConfig+0xa0>
    FlagStatus       pwrclkchanged = RESET;
 800108a:	2700      	movs	r7, #0
 800108c:	e7d4      	b.n	8001038 <HAL_RCCEx_PeriphCLKConfig+0x28>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 800108e:	6833      	ldr	r3, [r6, #0]
 8001090:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8001094:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 8001096:	f7ff f907 	bl	80002a8 <HAL_GetTick>
 800109a:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 800109c:	6833      	ldr	r3, [r6, #0]
 800109e:	05d8      	lsls	r0, r3, #23
 80010a0:	d4ce      	bmi.n	8001040 <HAL_RCCEx_PeriphCLKConfig+0x30>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 80010a2:	f7ff f901 	bl	80002a8 <HAL_GetTick>
 80010a6:	eba0 0008 	sub.w	r0, r0, r8
 80010aa:	2864      	cmp	r0, #100	; 0x64
 80010ac:	d9f6      	bls.n	800109c <HAL_RCCEx_PeriphCLKConfig+0x8c>
          return HAL_TIMEOUT;
 80010ae:	2003      	movs	r0, #3
}
 80010b0:	b002      	add	sp, #8
 80010b2:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
 80010b6:	686a      	ldr	r2, [r5, #4]
 80010b8:	f402 7240 	and.w	r2, r2, #768	; 0x300
 80010bc:	4293      	cmp	r3, r2
 80010be:	d0c3      	beq.n	8001048 <HAL_RCCEx_PeriphCLKConfig+0x38>
      __HAL_RCC_BACKUPRESET_FORCE();
 80010c0:	2001      	movs	r0, #1
 80010c2:	4a0e      	ldr	r2, [pc, #56]	; (80010fc <HAL_RCCEx_PeriphCLKConfig+0xec>)
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 80010c4:	6a23      	ldr	r3, [r4, #32]
      __HAL_RCC_BACKUPRESET_FORCE();
 80010c6:	6010      	str	r0, [r2, #0]
      __HAL_RCC_BACKUPRESET_RELEASE();
 80010c8:	2000      	movs	r0, #0
      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 80010ca:	f423 7140 	bic.w	r1, r3, #768	; 0x300
      __HAL_RCC_BACKUPRESET_RELEASE();
 80010ce:	6010      	str	r0, [r2, #0]
      RCC->BDCR = temp_reg;
 80010d0:	6221      	str	r1, [r4, #32]
      if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
 80010d2:	07d9      	lsls	r1, r3, #31
 80010d4:	d5b8      	bpl.n	8001048 <HAL_RCCEx_PeriphCLKConfig+0x38>
        tickstart = HAL_GetTick();
 80010d6:	f7ff f8e7 	bl	80002a8 <HAL_GetTick>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80010da:	f241 3888 	movw	r8, #5000	; 0x1388
        tickstart = HAL_GetTick();
 80010de:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80010e0:	6a23      	ldr	r3, [r4, #32]
 80010e2:	079a      	lsls	r2, r3, #30
 80010e4:	d4b0      	bmi.n	8001048 <HAL_RCCEx_PeriphCLKConfig+0x38>
          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 80010e6:	f7ff f8df 	bl	80002a8 <HAL_GetTick>
 80010ea:	1b80      	subs	r0, r0, r6
 80010ec:	4540      	cmp	r0, r8
 80010ee:	d9f7      	bls.n	80010e0 <HAL_RCCEx_PeriphCLKConfig+0xd0>
 80010f0:	e7dd      	b.n	80010ae <HAL_RCCEx_PeriphCLKConfig+0x9e>
 80010f2:	bf00      	nop
 80010f4:	40021000 	.word	0x40021000
 80010f8:	40007000 	.word	0x40007000
 80010fc:	42420440 	.word	0x42420440

08001100 <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8001100:	6803      	ldr	r3, [r0, #0]
 8001102:	68da      	ldr	r2, [r3, #12]
 8001104:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8001108:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800110a:	695a      	ldr	r2, [r3, #20]
 800110c:	f022 0201 	bic.w	r2, r2, #1
 8001110:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8001112:	2320      	movs	r3, #32
 8001114:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8001118:	4770      	bx	lr
	...

0800111c <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 800111c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8001120:	6805      	ldr	r5, [r0, #0]
 8001122:	68c2      	ldr	r2, [r0, #12]
 8001124:	692b      	ldr	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  MODIFY_REG(huart->Instance->CR1, 
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 
             tmpreg);
#else
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8001126:	6901      	ldr	r1, [r0, #16]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8001128:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 800112c:	4313      	orrs	r3, r2
 800112e:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8001130:	6883      	ldr	r3, [r0, #8]
  MODIFY_REG(huart->Instance->CR1, 
 8001132:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8001134:	430b      	orrs	r3, r1
 8001136:	6941      	ldr	r1, [r0, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8001138:	f422 52b0 	bic.w	r2, r2, #5632	; 0x1600
 800113c:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
 8001140:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 8001142:	4313      	orrs	r3, r2
 8001144:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 8001146:	696b      	ldr	r3, [r5, #20]
 8001148:	6982      	ldr	r2, [r0, #24]
 800114a:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 800114e:	4313      	orrs	r3, r2
 8001150:	616b      	str	r3, [r5, #20]
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
    }
  }
#else
  /*-------------------------- USART BRR Configuration ---------------------*/
  if(huart->Instance == USART1)
 8001152:	4b40      	ldr	r3, [pc, #256]	; (8001254 <UART_SetConfig+0x138>)
{
 8001154:	4681      	mov	r9, r0
  if(huart->Instance == USART1)
 8001156:	429d      	cmp	r5, r3
 8001158:	f04f 0419 	mov.w	r4, #25
 800115c:	d146      	bne.n	80011ec <UART_SetConfig+0xd0>
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 800115e:	f7ff ff47 	bl	8000ff0 <HAL_RCC_GetPCLK2Freq>
 8001162:	fb04 f300 	mul.w	r3, r4, r0
 8001166:	f8d9 6004 	ldr.w	r6, [r9, #4]
 800116a:	f04f 0864 	mov.w	r8, #100	; 0x64
 800116e:	00b6      	lsls	r6, r6, #2
 8001170:	fbb3 f3f6 	udiv	r3, r3, r6
 8001174:	fbb3 f3f8 	udiv	r3, r3, r8
 8001178:	011e      	lsls	r6, r3, #4
 800117a:	f7ff ff39 	bl	8000ff0 <HAL_RCC_GetPCLK2Freq>
 800117e:	4360      	muls	r0, r4
 8001180:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001184:	009b      	lsls	r3, r3, #2
 8001186:	fbb0 f7f3 	udiv	r7, r0, r3
 800118a:	f7ff ff31 	bl	8000ff0 <HAL_RCC_GetPCLK2Freq>
 800118e:	4360      	muls	r0, r4
 8001190:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001194:	009b      	lsls	r3, r3, #2
 8001196:	fbb0 f3f3 	udiv	r3, r0, r3
 800119a:	fbb3 f3f8 	udiv	r3, r3, r8
 800119e:	fb08 7313 	mls	r3, r8, r3, r7
 80011a2:	011b      	lsls	r3, r3, #4
 80011a4:	3332      	adds	r3, #50	; 0x32
 80011a6:	fbb3 f3f8 	udiv	r3, r3, r8
 80011aa:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 80011ae:	f7ff ff1f 	bl	8000ff0 <HAL_RCC_GetPCLK2Freq>
 80011b2:	4360      	muls	r0, r4
 80011b4:	f8d9 2004 	ldr.w	r2, [r9, #4]
 80011b8:	0092      	lsls	r2, r2, #2
 80011ba:	fbb0 faf2 	udiv	sl, r0, r2
 80011be:	f7ff ff17 	bl	8000ff0 <HAL_RCC_GetPCLK2Freq>
  }
  else
  {
    huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 80011c2:	4360      	muls	r0, r4
 80011c4:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80011c8:	009b      	lsls	r3, r3, #2
 80011ca:	fbb0 f3f3 	udiv	r3, r0, r3
 80011ce:	fbb3 f3f8 	udiv	r3, r3, r8
 80011d2:	fb08 a313 	mls	r3, r8, r3, sl
 80011d6:	011b      	lsls	r3, r3, #4
 80011d8:	3332      	adds	r3, #50	; 0x32
 80011da:	fbb3 f3f8 	udiv	r3, r3, r8
 80011de:	f003 030f 	and.w	r3, r3, #15
 80011e2:	433b      	orrs	r3, r7
 80011e4:	4433      	add	r3, r6
 80011e6:	60ab      	str	r3, [r5, #8]
 80011e8:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80011ec:	f7ff fef0 	bl	8000fd0 <HAL_RCC_GetPCLK1Freq>
 80011f0:	fb04 f300 	mul.w	r3, r4, r0
 80011f4:	f8d9 6004 	ldr.w	r6, [r9, #4]
 80011f8:	f04f 0864 	mov.w	r8, #100	; 0x64
 80011fc:	00b6      	lsls	r6, r6, #2
 80011fe:	fbb3 f3f6 	udiv	r3, r3, r6
 8001202:	fbb3 f3f8 	udiv	r3, r3, r8
 8001206:	011e      	lsls	r6, r3, #4
 8001208:	f7ff fee2 	bl	8000fd0 <HAL_RCC_GetPCLK1Freq>
 800120c:	4360      	muls	r0, r4
 800120e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001212:	009b      	lsls	r3, r3, #2
 8001214:	fbb0 f7f3 	udiv	r7, r0, r3
 8001218:	f7ff feda 	bl	8000fd0 <HAL_RCC_GetPCLK1Freq>
 800121c:	4360      	muls	r0, r4
 800121e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001222:	009b      	lsls	r3, r3, #2
 8001224:	fbb0 f3f3 	udiv	r3, r0, r3
 8001228:	fbb3 f3f8 	udiv	r3, r3, r8
 800122c:	fb08 7313 	mls	r3, r8, r3, r7
 8001230:	011b      	lsls	r3, r3, #4
 8001232:	3332      	adds	r3, #50	; 0x32
 8001234:	fbb3 f3f8 	udiv	r3, r3, r8
 8001238:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 800123c:	f7ff fec8 	bl	8000fd0 <HAL_RCC_GetPCLK1Freq>
 8001240:	4360      	muls	r0, r4
 8001242:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8001246:	0092      	lsls	r2, r2, #2
 8001248:	fbb0 faf2 	udiv	sl, r0, r2
 800124c:	f7ff fec0 	bl	8000fd0 <HAL_RCC_GetPCLK1Freq>
 8001250:	e7b7      	b.n	80011c2 <UART_SetConfig+0xa6>
 8001252:	bf00      	nop
 8001254:	40013800 	.word	0x40013800

08001258 <HAL_UART_Init>:
{
 8001258:	b510      	push	{r4, lr}
  if(huart == NULL)
 800125a:	4604      	mov	r4, r0
 800125c:	b340      	cbz	r0, 80012b0 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 800125e:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8001262:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8001266:	b91b      	cbnz	r3, 8001270 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 8001268:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 800126c:	f000 fb0a 	bl	8001884 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8001270:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8001272:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8001274:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 8001278:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 800127a:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 800127c:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8001280:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8001282:	f7ff ff4b 	bl	800111c <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 8001286:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001288:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800128a:	691a      	ldr	r2, [r3, #16]
 800128c:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 8001290:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 8001292:	695a      	ldr	r2, [r3, #20]
 8001294:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 8001298:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 800129a:	68da      	ldr	r2, [r3, #12]
 800129c:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 80012a0:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 80012a2:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 80012a4:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 80012a6:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 80012aa:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 80012ae:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 80012b0:	2001      	movs	r0, #1
}
 80012b2:	bd10      	pop	{r4, pc}

080012b4 <HAL_UART_TxCpltCallback>:
 80012b4:	4770      	bx	lr

080012b6 <HAL_UART_RxCpltCallback>:
 80012b6:	4770      	bx	lr

080012b8 <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80012b8:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 80012bc:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80012be:	2b22      	cmp	r3, #34	; 0x22
 80012c0:	d136      	bne.n	8001330 <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80012c2:	6883      	ldr	r3, [r0, #8]
 80012c4:	6901      	ldr	r1, [r0, #16]
 80012c6:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 80012ca:	6802      	ldr	r2, [r0, #0]
 80012cc:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80012ce:	d123      	bne.n	8001318 <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80012d0:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 80012d2:	b9e9      	cbnz	r1, 8001310 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80012d4:	f3c2 0208 	ubfx	r2, r2, #0, #9
 80012d8:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 80012dc:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 80012de:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 80012e0:	3c01      	subs	r4, #1
 80012e2:	b2a4      	uxth	r4, r4
 80012e4:	85c4      	strh	r4, [r0, #46]	; 0x2e
 80012e6:	b98c      	cbnz	r4, 800130c <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 80012e8:	6803      	ldr	r3, [r0, #0]
 80012ea:	68da      	ldr	r2, [r3, #12]
 80012ec:	f022 0220 	bic.w	r2, r2, #32
 80012f0:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 80012f2:	68da      	ldr	r2, [r3, #12]
 80012f4:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 80012f8:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 80012fa:	695a      	ldr	r2, [r3, #20]
 80012fc:	f022 0201 	bic.w	r2, r2, #1
 8001300:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 8001302:	2320      	movs	r3, #32
 8001304:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 8001308:	f7ff ffd5 	bl	80012b6 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 800130c:	2000      	movs	r0, #0
}
 800130e:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8001310:	b2d2      	uxtb	r2, r2
 8001312:	f823 2b01 	strh.w	r2, [r3], #1
 8001316:	e7e1      	b.n	80012dc <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001318:	b921      	cbnz	r1, 8001324 <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 800131a:	1c59      	adds	r1, r3, #1
 800131c:	6852      	ldr	r2, [r2, #4]
 800131e:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8001320:	701a      	strb	r2, [r3, #0]
 8001322:	e7dc      	b.n	80012de <UART_Receive_IT+0x26>
 8001324:	6852      	ldr	r2, [r2, #4]
 8001326:	1c59      	adds	r1, r3, #1
 8001328:	6281      	str	r1, [r0, #40]	; 0x28
 800132a:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 800132e:	e7f7      	b.n	8001320 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8001330:	2002      	movs	r0, #2
 8001332:	bd10      	pop	{r4, pc}

08001334 <HAL_UART_ErrorCallback>:
 8001334:	4770      	bx	lr
	...

08001338 <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8001338:	6803      	ldr	r3, [r0, #0]
{
 800133a:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 800133c:	681a      	ldr	r2, [r3, #0]
{
 800133e:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8001340:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 8001342:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 8001344:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 8001346:	d107      	bne.n	8001358 <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001348:	0696      	lsls	r6, r2, #26
 800134a:	d55a      	bpl.n	8001402 <HAL_UART_IRQHandler+0xca>
 800134c:	068d      	lsls	r5, r1, #26
 800134e:	d558      	bpl.n	8001402 <HAL_UART_IRQHandler+0xca>
}
 8001350:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 8001354:	f7ff bfb0 	b.w	80012b8 <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 8001358:	f015 0501 	ands.w	r5, r5, #1
 800135c:	d102      	bne.n	8001364 <HAL_UART_IRQHandler+0x2c>
 800135e:	f411 7f90 	tst.w	r1, #288	; 0x120
 8001362:	d04e      	beq.n	8001402 <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 8001364:	07d3      	lsls	r3, r2, #31
 8001366:	d505      	bpl.n	8001374 <HAL_UART_IRQHandler+0x3c>
 8001368:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800136a:	bf42      	ittt	mi
 800136c:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 800136e:	f043 0301 	orrmi.w	r3, r3, #1
 8001372:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001374:	0750      	lsls	r0, r2, #29
 8001376:	d504      	bpl.n	8001382 <HAL_UART_IRQHandler+0x4a>
 8001378:	b11d      	cbz	r5, 8001382 <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800137a:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 800137c:	f043 0302 	orr.w	r3, r3, #2
 8001380:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001382:	0793      	lsls	r3, r2, #30
 8001384:	d504      	bpl.n	8001390 <HAL_UART_IRQHandler+0x58>
 8001386:	b11d      	cbz	r5, 8001390 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 8001388:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 800138a:	f043 0304 	orr.w	r3, r3, #4
 800138e:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 8001390:	0716      	lsls	r6, r2, #28
 8001392:	d504      	bpl.n	800139e <HAL_UART_IRQHandler+0x66>
 8001394:	b11d      	cbz	r5, 800139e <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 8001396:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001398:	f043 0308 	orr.w	r3, r3, #8
 800139c:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 800139e:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80013a0:	2b00      	cmp	r3, #0
 80013a2:	d066      	beq.n	8001472 <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 80013a4:	0695      	lsls	r5, r2, #26
 80013a6:	d504      	bpl.n	80013b2 <HAL_UART_IRQHandler+0x7a>
 80013a8:	0688      	lsls	r0, r1, #26
 80013aa:	d502      	bpl.n	80013b2 <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 80013ac:	4620      	mov	r0, r4
 80013ae:	f7ff ff83 	bl	80012b8 <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80013b2:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 80013b4:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80013b6:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 80013b8:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 80013ba:	0711      	lsls	r1, r2, #28
 80013bc:	d402      	bmi.n	80013c4 <HAL_UART_IRQHandler+0x8c>
 80013be:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 80013c2:	d01a      	beq.n	80013fa <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 80013c4:	f7ff fe9c 	bl	8001100 <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 80013c8:	6823      	ldr	r3, [r4, #0]
 80013ca:	695a      	ldr	r2, [r3, #20]
 80013cc:	0652      	lsls	r2, r2, #25
 80013ce:	d510      	bpl.n	80013f2 <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80013d0:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80013d2:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80013d4:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 80013d8:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80013da:	b150      	cbz	r0, 80013f2 <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 80013dc:	4b25      	ldr	r3, [pc, #148]	; (8001474 <HAL_UART_IRQHandler+0x13c>)
 80013de:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 80013e0:	f7ff f940 	bl	8000664 <HAL_DMA_Abort_IT>
 80013e4:	2800      	cmp	r0, #0
 80013e6:	d044      	beq.n	8001472 <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 80013e8:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 80013ea:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 80013ee:	6b43      	ldr	r3, [r0, #52]	; 0x34
 80013f0:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 80013f2:	4620      	mov	r0, r4
 80013f4:	f7ff ff9e 	bl	8001334 <HAL_UART_ErrorCallback>
 80013f8:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 80013fa:	f7ff ff9b 	bl	8001334 <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 80013fe:	63e5      	str	r5, [r4, #60]	; 0x3c
 8001400:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 8001402:	0616      	lsls	r6, r2, #24
 8001404:	d527      	bpl.n	8001456 <HAL_UART_IRQHandler+0x11e>
 8001406:	060d      	lsls	r5, r1, #24
 8001408:	d525      	bpl.n	8001456 <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 800140a:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 800140e:	2a21      	cmp	r2, #33	; 0x21
 8001410:	d12f      	bne.n	8001472 <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001412:	68a2      	ldr	r2, [r4, #8]
 8001414:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8001418:	6a22      	ldr	r2, [r4, #32]
 800141a:	d117      	bne.n	800144c <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 800141c:	8811      	ldrh	r1, [r2, #0]
 800141e:	f3c1 0108 	ubfx	r1, r1, #0, #9
 8001422:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001424:	6921      	ldr	r1, [r4, #16]
 8001426:	b979      	cbnz	r1, 8001448 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8001428:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 800142a:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 800142c:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 800142e:	3a01      	subs	r2, #1
 8001430:	b292      	uxth	r2, r2
 8001432:	84e2      	strh	r2, [r4, #38]	; 0x26
 8001434:	b9ea      	cbnz	r2, 8001472 <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 8001436:	68da      	ldr	r2, [r3, #12]
 8001438:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 800143c:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 800143e:	68da      	ldr	r2, [r3, #12]
 8001440:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8001444:	60da      	str	r2, [r3, #12]
 8001446:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 8001448:	3201      	adds	r2, #1
 800144a:	e7ee      	b.n	800142a <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 800144c:	1c51      	adds	r1, r2, #1
 800144e:	6221      	str	r1, [r4, #32]
 8001450:	7812      	ldrb	r2, [r2, #0]
 8001452:	605a      	str	r2, [r3, #4]
 8001454:	e7ea      	b.n	800142c <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 8001456:	0650      	lsls	r0, r2, #25
 8001458:	d50b      	bpl.n	8001472 <HAL_UART_IRQHandler+0x13a>
 800145a:	064a      	lsls	r2, r1, #25
 800145c:	d509      	bpl.n	8001472 <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 800145e:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8001460:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8001462:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8001466:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8001468:	2320      	movs	r3, #32
 800146a:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 800146e:	f7ff ff21 	bl	80012b4 <HAL_UART_TxCpltCallback>
 8001472:	bd70      	pop	{r4, r5, r6, pc}
 8001474:	08001479 	.word	0x08001479

08001478 <UART_DMAAbortOnError>:
{
 8001478:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 800147a:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 800147c:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 800147e:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 8001480:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 8001482:	f7ff ff57 	bl	8001334 <HAL_UART_ErrorCallback>
 8001486:	bd08      	pop	{r3, pc}

08001488 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001488:	b510      	push	{r4, lr}
 800148a:	b096      	sub	sp, #88	; 0x58
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 800148c:	2228      	movs	r2, #40	; 0x28
 800148e:	2100      	movs	r1, #0
 8001490:	a80c      	add	r0, sp, #48	; 0x30
 8001492:	f000 fab9 	bl	8001a08 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001496:	2214      	movs	r2, #20
 8001498:	2100      	movs	r1, #0
 800149a:	a801      	add	r0, sp, #4
 800149c:	f000 fab4 	bl	8001a08 <memset>
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 80014a0:	2218      	movs	r2, #24
 80014a2:	2100      	movs	r1, #0
 80014a4:	eb0d 0002 	add.w	r0, sp, r2
 80014a8:	f000 faae 	bl	8001a08 <memset>

  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 80014ac:	2301      	movs	r3, #1
 80014ae:	9310      	str	r3, [sp, #64]	; 0x40
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 80014b0:	2310      	movs	r3, #16
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 80014b2:	2402      	movs	r4, #2
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 80014b4:	9311      	str	r3, [sp, #68]	; 0x44
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
 80014b6:	f44f 1350 	mov.w	r3, #3407872	; 0x340000
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 80014ba:	a80c      	add	r0, sp, #48	; 0x30
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
 80014bc:	9315      	str	r3, [sp, #84]	; 0x54
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 80014be:	940c      	str	r4, [sp, #48]	; 0x30
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 80014c0:	9413      	str	r4, [sp, #76]	; 0x4c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 80014c2:	f7ff fb0b 	bl	8000adc <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /** Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 80014c6:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 80014c8:	f44f 6280 	mov.w	r2, #1024	; 0x400
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 80014cc:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 80014ce:	2300      	movs	r3, #0
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 80014d0:	4621      	mov	r1, r4
 80014d2:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 80014d4:	9303      	str	r3, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 80014d6:	9204      	str	r2, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 80014d8:	9305      	str	r3, [sp, #20]
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 80014da:	9402      	str	r4, [sp, #8]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 80014dc:	f7ff fcc6 	bl	8000e6c <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
 80014e0:	f44f 4300 	mov.w	r3, #32768	; 0x8000
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 80014e4:	a806      	add	r0, sp, #24
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
 80014e6:	9406      	str	r4, [sp, #24]
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
 80014e8:	9308      	str	r3, [sp, #32]
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 80014ea:	f7ff fd91 	bl	8001010 <HAL_RCCEx_PeriphCLKConfig>
  {
    Error_Handler();
  }
}
 80014ee:	b016      	add	sp, #88	; 0x58
 80014f0:	bd10      	pop	{r4, pc}
	...

080014f4 <main>:
{
 80014f4:	b580      	push	{r7, lr}
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 80014f6:	4d8e      	ldr	r5, [pc, #568]	; (8001730 <main+0x23c>)
{
 80014f8:	b08c      	sub	sp, #48	; 0x30
  HAL_Init();
 80014fa:	f7fe feb7 	bl	800026c <HAL_Init>
  SystemClock_Config();
 80014fe:	f7ff ffc3 	bl	8001488 <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001502:	2210      	movs	r2, #16
 8001504:	2100      	movs	r1, #0
 8001506:	a808      	add	r0, sp, #32
 8001508:	f000 fa7e 	bl	8001a08 <memset>
  __HAL_RCC_GPIOE_CLK_ENABLE();
 800150c:	69ab      	ldr	r3, [r5, #24]
  __HAL_RCC_GPIOB_CLK_ENABLE();
  __HAL_RCC_GPIOD_CLK_ENABLE();
  __HAL_RCC_GPIOG_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 800150e:	2200      	movs	r2, #0
  __HAL_RCC_GPIOE_CLK_ENABLE();
 8001510:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8001514:	61ab      	str	r3, [r5, #24]
 8001516:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8001518:	217f      	movs	r1, #127	; 0x7f
  __HAL_RCC_GPIOE_CLK_ENABLE();
 800151a:	f003 0340 	and.w	r3, r3, #64	; 0x40
 800151e:	9301      	str	r3, [sp, #4]
 8001520:	9b01      	ldr	r3, [sp, #4]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001522:	69ab      	ldr	r3, [r5, #24]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 8001524:	4883      	ldr	r0, [pc, #524]	; (8001734 <main+0x240>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001526:	f043 0310 	orr.w	r3, r3, #16
 800152a:	61ab      	str	r3, [r5, #24]
 800152c:	69ab      	ldr	r3, [r5, #24]
  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800152e:	2400      	movs	r4, #0
  __HAL_RCC_GPIOC_CLK_ENABLE();
 8001530:	f003 0310 	and.w	r3, r3, #16
 8001534:	9302      	str	r3, [sp, #8]
 8001536:	9b02      	ldr	r3, [sp, #8]
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8001538:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800153a:	2701      	movs	r7, #1
  __HAL_RCC_GPIOF_CLK_ENABLE();
 800153c:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8001540:	61ab      	str	r3, [r5, #24]
 8001542:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001544:	2602      	movs	r6, #2
  __HAL_RCC_GPIOF_CLK_ENABLE();
 8001546:	f003 0380 	and.w	r3, r3, #128	; 0x80
 800154a:	9303      	str	r3, [sp, #12]
 800154c:	9b03      	ldr	r3, [sp, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 800154e:	69ab      	ldr	r3, [r5, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);

  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 8001550:	f04f 080c 	mov.w	r8, #12
  __HAL_RCC_GPIOA_CLK_ENABLE();
 8001554:	f043 0304 	orr.w	r3, r3, #4
 8001558:	61ab      	str	r3, [r5, #24]
 800155a:	69ab      	ldr	r3, [r5, #24]
 800155c:	f003 0304 	and.w	r3, r3, #4
 8001560:	9304      	str	r3, [sp, #16]
 8001562:	9b04      	ldr	r3, [sp, #16]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 8001564:	69ab      	ldr	r3, [r5, #24]
 8001566:	f043 0308 	orr.w	r3, r3, #8
 800156a:	61ab      	str	r3, [r5, #24]
 800156c:	69ab      	ldr	r3, [r5, #24]
 800156e:	f003 0308 	and.w	r3, r3, #8
 8001572:	9305      	str	r3, [sp, #20]
 8001574:	9b05      	ldr	r3, [sp, #20]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 8001576:	69ab      	ldr	r3, [r5, #24]
 8001578:	f043 0320 	orr.w	r3, r3, #32
 800157c:	61ab      	str	r3, [r5, #24]
 800157e:	69ab      	ldr	r3, [r5, #24]
 8001580:	f003 0320 	and.w	r3, r3, #32
 8001584:	9306      	str	r3, [sp, #24]
 8001586:	9b06      	ldr	r3, [sp, #24]
  __HAL_RCC_GPIOG_CLK_ENABLE();
 8001588:	69ab      	ldr	r3, [r5, #24]
 800158a:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 800158e:	61ab      	str	r3, [r5, #24]
 8001590:	69ab      	ldr	r3, [r5, #24]
 8001592:	f403 7380 	and.w	r3, r3, #256	; 0x100
 8001596:	9307      	str	r3, [sp, #28]
 8001598:	9b07      	ldr	r3, [sp, #28]
  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 800159a:	f7ff fa99 	bl	8000ad0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 800159e:	2200      	movs	r2, #0
 80015a0:	f24e 01c0 	movw	r1, #57536	; 0xe0c0
 80015a4:	4864      	ldr	r0, [pc, #400]	; (8001738 <main+0x244>)
 80015a6:	f7ff fa93 	bl	8000ad0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 80015aa:	2200      	movs	r2, #0
 80015ac:	f240 31f3 	movw	r1, #1011	; 0x3f3
 80015b0:	4862      	ldr	r0, [pc, #392]	; (800173c <main+0x248>)
 80015b2:	f7ff fa8d 	bl	8000ad0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 80015b6:	2200      	movs	r2, #0
 80015b8:	f648 71ff 	movw	r1, #36863	; 0x8fff
 80015bc:	4860      	ldr	r0, [pc, #384]	; (8001740 <main+0x24c>)
 80015be:	f7ff fa87 	bl	8000ad0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 80015c2:	2200      	movs	r2, #0
 80015c4:	f643 51fc 	movw	r1, #15868	; 0x3dfc
 80015c8:	485e      	ldr	r0, [pc, #376]	; (8001744 <main+0x250>)
 80015ca:	f7ff fa81 	bl	8000ad0 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
 80015ce:	2200      	movs	r2, #0
 80015d0:	2118      	movs	r1, #24
 80015d2:	485d      	ldr	r0, [pc, #372]	; (8001748 <main+0x254>)
 80015d4:	f7ff fa7c 	bl	8000ad0 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 80015d8:	237f      	movs	r3, #127	; 0x7f
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80015da:	a908      	add	r1, sp, #32
 80015dc:	4855      	ldr	r0, [pc, #340]	; (8001734 <main+0x240>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
 80015de:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80015e0:	9709      	str	r7, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80015e2:	940a      	str	r4, [sp, #40]	; 0x28
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80015e4:	960b      	str	r6, [sp, #44]	; 0x2c
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 80015e6:	f7ff f987 	bl	80008f8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 80015ea:	f24e 03c0 	movw	r3, #57536	; 0xe0c0
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80015ee:	a908      	add	r1, sp, #32
 80015f0:	4851      	ldr	r0, [pc, #324]	; (8001738 <main+0x244>)
  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
 80015f2:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80015f4:	9709      	str	r7, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80015f6:	940a      	str	r4, [sp, #40]	; 0x28
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80015f8:	960b      	str	r6, [sp, #44]	; 0x2c
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80015fa:	f7ff f97d 	bl	80008f8 <HAL_GPIO_Init>
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 80015fe:	f240 33f3 	movw	r3, #1011	; 0x3f3
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8001602:	a908      	add	r1, sp, #32
 8001604:	484d      	ldr	r0, [pc, #308]	; (800173c <main+0x248>)
  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
 8001606:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001608:	9709      	str	r7, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800160a:	940a      	str	r4, [sp, #40]	; 0x28
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800160c:	960b      	str	r6, [sp, #44]	; 0x2c
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 800160e:	f7ff f973 	bl	80008f8 <HAL_GPIO_Init>
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 8001612:	a908      	add	r1, sp, #32
 8001614:	4849      	ldr	r0, [pc, #292]	; (800173c <main+0x248>)
  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
 8001616:	f8cd 8020 	str.w	r8, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 800161a:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800161c:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
 800161e:	f7ff f96b 	bl	80008f8 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
                           PATH_EN_3_5G_L_Pin */
  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 8001622:	f648 73ff 	movw	r3, #36863	; 0x8fff
                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
                          |PATH_EN_3_5G_L_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8001626:	a908      	add	r1, sp, #32
 8001628:	4845      	ldr	r0, [pc, #276]	; (8001740 <main+0x24c>)
  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
 800162a:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800162c:	9709      	str	r7, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800162e:	940a      	str	r4, [sp, #40]	; 0x28
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001630:	960b      	str	r6, [sp, #44]	; 0x2c
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8001632:	f7ff f961 	bl	80008f8 <HAL_GPIO_Init>

  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 8001636:	f44f 5340 	mov.w	r3, #12288	; 0x3000
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 800163a:	a908      	add	r1, sp, #32
 800163c:	4840      	ldr	r0, [pc, #256]	; (8001740 <main+0x24c>)
  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
 800163e:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001640:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001642:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8001644:	f7ff f958 	bl	80008f8 <HAL_GPIO_Init>

  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_DL_Pin 
                           PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_L_Pin PLL_ON_OFF_3_5G_H_Pin */
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 8001648:	f643 53fc 	movw	r3, #15868	; 0x3dfc
                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 800164c:	a908      	add	r1, sp, #32
 800164e:	483d      	ldr	r0, [pc, #244]	; (8001744 <main+0x250>)
  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
 8001650:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001652:	9709      	str	r7, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001654:	940a      	str	r4, [sp, #40]	; 0x28
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001656:	960b      	str	r6, [sp, #44]	; 0x2c
  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 8001658:	f7ff f94e 	bl	80008f8 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 800165c:	f44f 7340 	mov.w	r3, #768	; 0x300
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8001660:	a908      	add	r1, sp, #32
 8001662:	4835      	ldr	r0, [pc, #212]	; (8001738 <main+0x244>)
  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
 8001664:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001666:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001668:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 800166a:	f7ff f945 	bl	80008f8 <HAL_GPIO_Init>

  /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */
  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
 800166e:	f44f 7300 	mov.w	r3, #512	; 0x200
 8001672:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8001674:	2303      	movs	r3, #3
  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
 8001676:	a908      	add	r1, sp, #32
 8001678:	4832      	ldr	r0, [pc, #200]	; (8001744 <main+0x250>)
  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 800167a:	9309      	str	r3, [sp, #36]	; 0x24
  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
 800167c:	f7ff f93c 	bl	80008f8 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 8001680:	2318      	movs	r3, #24
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001682:	a908      	add	r1, sp, #32
 8001684:	4830      	ldr	r0, [pc, #192]	; (8001748 <main+0x254>)
  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
 8001686:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001688:	9709      	str	r7, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800168a:	940a      	str	r4, [sp, #40]	; 0x28
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 800168c:	960b      	str	r6, [sp, #44]	; 0x2c
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800168e:	f7ff f933 	bl	80008f8 <HAL_GPIO_Init>

  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 8001692:	2360      	movs	r3, #96	; 0x60
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001694:	a908      	add	r1, sp, #32
 8001696:	482c      	ldr	r0, [pc, #176]	; (8001748 <main+0x254>)
  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
 8001698:	9308      	str	r3, [sp, #32]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 800169a:	9409      	str	r4, [sp, #36]	; 0x24
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800169c:	940a      	str	r4, [sp, #40]	; 0x28
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800169e:	f7ff f92b 	bl	80008f8 <HAL_GPIO_Init>
  __HAL_RCC_DMA1_CLK_ENABLE();
 80016a2:	696b      	ldr	r3, [r5, #20]
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 80016a4:	4622      	mov	r2, r4
  __HAL_RCC_DMA1_CLK_ENABLE();
 80016a6:	433b      	orrs	r3, r7
 80016a8:	616b      	str	r3, [r5, #20]
 80016aa:	696b      	ldr	r3, [r5, #20]
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 80016ac:	4621      	mov	r1, r4
  __HAL_RCC_DMA1_CLK_ENABLE();
 80016ae:	403b      	ands	r3, r7
 80016b0:	9300      	str	r3, [sp, #0]
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 80016b2:	200b      	movs	r0, #11
  __HAL_RCC_DMA1_CLK_ENABLE();
 80016b4:	9b00      	ldr	r3, [sp, #0]
  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
 80016b6:	f7fe ff3f 	bl	8000538 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
 80016ba:	200b      	movs	r0, #11
 80016bc:	f7fe ff70 	bl	80005a0 <HAL_NVIC_EnableIRQ>
  hadc1.Instance = ADC1;
 80016c0:	4d22      	ldr	r5, [pc, #136]	; (800174c <main+0x258>)
 80016c2:	4b23      	ldr	r3, [pc, #140]	; (8001750 <main+0x25c>)
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 80016c4:	4628      	mov	r0, r5
  hadc1.Instance = ADC1;
 80016c6:	602b      	str	r3, [r5, #0]
  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
 80016c8:	f44f 7380 	mov.w	r3, #256	; 0x100
 80016cc:	60ab      	str	r3, [r5, #8]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 80016ce:	f44f 2360 	mov.w	r3, #917504	; 0xe0000
  ADC_ChannelConfTypeDef sConfig = {0};
 80016d2:	9408      	str	r4, [sp, #32]
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 80016d4:	61eb      	str	r3, [r5, #28]
  ADC_ChannelConfTypeDef sConfig = {0};
 80016d6:	9409      	str	r4, [sp, #36]	; 0x24
 80016d8:	940a      	str	r4, [sp, #40]	; 0x28
  hadc1.Init.ContinuousConvMode = DISABLE;
 80016da:	60ec      	str	r4, [r5, #12]
  hadc1.Init.DiscontinuousConvMode = DISABLE;
 80016dc:	616c      	str	r4, [r5, #20]
  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 80016de:	606c      	str	r4, [r5, #4]
  hadc1.Init.NbrOfConversion = 2;
 80016e0:	612e      	str	r6, [r5, #16]
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 80016e2:	f7fe fe8d 	bl	8000400 <HAL_ADC_Init>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80016e6:	a908      	add	r1, sp, #32
 80016e8:	4628      	mov	r0, r5
  sConfig.Channel = ADC_CHANNEL_0;
 80016ea:	9408      	str	r4, [sp, #32]
  sConfig.Rank = ADC_REGULAR_RANK_1;
 80016ec:	9709      	str	r7, [sp, #36]	; 0x24
  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
 80016ee:	940a      	str	r4, [sp, #40]	; 0x28
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80016f0:	f7fe fde0 	bl	80002b4 <HAL_ADC_ConfigChannel>
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80016f4:	a908      	add	r1, sp, #32
 80016f6:	4628      	mov	r0, r5
  sConfig.Rank = ADC_REGULAR_RANK_2;
 80016f8:	9609      	str	r6, [sp, #36]	; 0x24
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80016fa:	f7fe fddb 	bl	80002b4 <HAL_ADC_ConfigChannel>
  huart1.Init.BaudRate = 115200;
 80016fe:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
  huart1.Instance = USART1;
 8001702:	4814      	ldr	r0, [pc, #80]	; (8001754 <main+0x260>)
  huart1.Init.BaudRate = 115200;
 8001704:	4a14      	ldr	r2, [pc, #80]	; (8001758 <main+0x264>)
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8001706:	6084      	str	r4, [r0, #8]
  huart1.Init.BaudRate = 115200;
 8001708:	e880 000c 	stmia.w	r0, {r2, r3}
  huart1.Init.StopBits = UART_STOPBITS_1;
 800170c:	60c4      	str	r4, [r0, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 800170e:	6104      	str	r4, [r0, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8001710:	f8c0 8014 	str.w	r8, [r0, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8001714:	6184      	str	r4, [r0, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8001716:	61c4      	str	r4, [r0, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001718:	f7ff fd9e 	bl	8001258 <HAL_UART_Init>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 800171c:	2025      	movs	r0, #37	; 0x25
 800171e:	4622      	mov	r2, r4
 8001720:	4621      	mov	r1, r4
 8001722:	f7fe ff09 	bl	8000538 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 8001726:	2025      	movs	r0, #37	; 0x25
 8001728:	f7fe ff3a 	bl	80005a0 <HAL_NVIC_EnableIRQ>
 800172c:	e7fe      	b.n	800172c <main+0x238>
 800172e:	bf00      	nop
 8001730:	40021000 	.word	0x40021000
 8001734:	40011800 	.word	0x40011800
 8001738:	40011000 	.word	0x40011000
 800173c:	40011c00 	.word	0x40011c00
 8001740:	40011400 	.word	0x40011400
 8001744:	40012000 	.word	0x40012000
 8001748:	40010c00 	.word	0x40010c00
 800174c:	2000002c 	.word	0x2000002c
 8001750:	40012400 	.word	0x40012400
 8001754:	2000005c 	.word	0x2000005c
 8001758:	40013800 	.word	0x40013800

0800175c <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 800175c:	4770      	bx	lr
	...

08001760 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8001760:	4b0e      	ldr	r3, [pc, #56]	; (800179c <HAL_MspInit+0x3c>)
{
 8001762:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8001764:	699a      	ldr	r2, [r3, #24]
 8001766:	f042 0201 	orr.w	r2, r2, #1
 800176a:	619a      	str	r2, [r3, #24]
 800176c:	699a      	ldr	r2, [r3, #24]
 800176e:	f002 0201 	and.w	r2, r2, #1
 8001772:	9200      	str	r2, [sp, #0]
 8001774:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8001776:	69da      	ldr	r2, [r3, #28]
 8001778:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 800177c:	61da      	str	r2, [r3, #28]
 800177e:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /** DISABLE: JTAG-DP Disabled and SW-DP Disabled 
  */
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8001780:	4a07      	ldr	r2, [pc, #28]	; (80017a0 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 8001782:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001786:	9301      	str	r3, [sp, #4]
 8001788:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 800178a:	6853      	ldr	r3, [r2, #4]
 800178c:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8001790:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
 8001794:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8001796:	b002      	add	sp, #8
 8001798:	4770      	bx	lr
 800179a:	bf00      	nop
 800179c:	40021000 	.word	0x40021000
 80017a0:	40010000 	.word	0x40010000

080017a4 <HAL_ADC_MspInit>:
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80017a4:	2210      	movs	r2, #16
{
 80017a6:	b530      	push	{r4, r5, lr}
 80017a8:	4605      	mov	r5, r0
 80017aa:	b089      	sub	sp, #36	; 0x24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80017ac:	eb0d 0002 	add.w	r0, sp, r2
 80017b0:	2100      	movs	r1, #0
 80017b2:	f000 f929 	bl	8001a08 <memset>
  if(hadc->Instance==ADC1)
 80017b6:	682a      	ldr	r2, [r5, #0]
 80017b8:	4b2c      	ldr	r3, [pc, #176]	; (800186c <HAL_ADC_MspInit+0xc8>)
 80017ba:	429a      	cmp	r2, r3
 80017bc:	d153      	bne.n	8001866 <HAL_ADC_MspInit+0xc2>
  {
  /* USER CODE BEGIN ADC1_MspInit 0 */

  /* USER CODE END ADC1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_ADC1_CLK_ENABLE();
 80017be:	f503 436c 	add.w	r3, r3, #60416	; 0xec00
 80017c2:	699a      	ldr	r2, [r3, #24]
    PA7     ------> ADC1_IN7
    PB0     ------> ADC1_IN8
    PB1     ------> ADC1_IN9 
    */
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 80017c4:	2403      	movs	r4, #3
    __HAL_RCC_ADC1_CLK_ENABLE();
 80017c6:	f442 7200 	orr.w	r2, r2, #512	; 0x200
 80017ca:	619a      	str	r2, [r3, #24]
 80017cc:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80017ce:	a904      	add	r1, sp, #16
    __HAL_RCC_ADC1_CLK_ENABLE();
 80017d0:	f402 7200 	and.w	r2, r2, #512	; 0x200
 80017d4:	9200      	str	r2, [sp, #0]
 80017d6:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 80017d8:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 80017da:	4825      	ldr	r0, [pc, #148]	; (8001870 <HAL_ADC_MspInit+0xcc>)
    __HAL_RCC_GPIOC_CLK_ENABLE();
 80017dc:	f042 0210 	orr.w	r2, r2, #16
 80017e0:	619a      	str	r2, [r3, #24]
 80017e2:	699a      	ldr	r2, [r3, #24]
 80017e4:	f002 0210 	and.w	r2, r2, #16
 80017e8:	9201      	str	r2, [sp, #4]
 80017ea:	9a01      	ldr	r2, [sp, #4]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 80017ec:	699a      	ldr	r2, [r3, #24]
 80017ee:	f042 0204 	orr.w	r2, r2, #4
 80017f2:	619a      	str	r2, [r3, #24]
 80017f4:	699a      	ldr	r2, [r3, #24]
 80017f6:	f002 0204 	and.w	r2, r2, #4
 80017fa:	9202      	str	r2, [sp, #8]
 80017fc:	9a02      	ldr	r2, [sp, #8]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 80017fe:	699a      	ldr	r2, [r3, #24]
 8001800:	f042 0208 	orr.w	r2, r2, #8
 8001804:	619a      	str	r2, [r3, #24]
 8001806:	699b      	ldr	r3, [r3, #24]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8001808:	9405      	str	r4, [sp, #20]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 800180a:	f003 0308 	and.w	r3, r3, #8
 800180e:	9303      	str	r3, [sp, #12]
 8001810:	9b03      	ldr	r3, [sp, #12]
    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
 8001812:	230f      	movs	r3, #15
 8001814:	9304      	str	r3, [sp, #16]
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8001816:	f7ff f86f 	bl	80008f8 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 800181a:	23ff      	movs	r3, #255	; 0xff
                          |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800181c:	a904      	add	r1, sp, #16
 800181e:	4815      	ldr	r0, [pc, #84]	; (8001874 <HAL_ADC_MspInit+0xd0>)
    GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
 8001820:	9304      	str	r3, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 8001822:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001824:	f7ff f868 	bl	80008f8 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001828:	4813      	ldr	r0, [pc, #76]	; (8001878 <HAL_ADC_MspInit+0xd4>)
 800182a:	a904      	add	r1, sp, #16
    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
 800182c:	9404      	str	r4, [sp, #16]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 800182e:	9405      	str	r4, [sp, #20]
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8001830:	f7ff f862 	bl	80008f8 <HAL_GPIO_Init>
    /* ADC1 DMA Init */
    /* ADC1 Init */
    hdma_adc1.Instance = DMA1_Channel1;
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 8001834:	2280      	movs	r2, #128	; 0x80
    hdma_adc1.Instance = DMA1_Channel1;
 8001836:	4c11      	ldr	r4, [pc, #68]	; (800187c <HAL_ADC_MspInit+0xd8>)
 8001838:	4b11      	ldr	r3, [pc, #68]	; (8001880 <HAL_ADC_MspInit+0xdc>)
    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 800183a:	60e2      	str	r2, [r4, #12]
    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
 800183c:	f44f 7280 	mov.w	r2, #256	; 0x100
 8001840:	6122      	str	r2, [r4, #16]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
 8001842:	f44f 6280 	mov.w	r2, #1024	; 0x400
    hdma_adc1.Instance = DMA1_Channel1;
 8001846:	6023      	str	r3, [r4, #0]
    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
 8001848:	6162      	str	r2, [r4, #20]
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 800184a:	2300      	movs	r3, #0
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 800184c:	2220      	movs	r2, #32
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 800184e:	4620      	mov	r0, r4
    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8001850:	6063      	str	r3, [r4, #4]
    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
 8001852:	60a3      	str	r3, [r4, #8]
    hdma_adc1.Init.Mode = DMA_CIRCULAR;
 8001854:	61a2      	str	r2, [r4, #24]
    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 8001856:	61e3      	str	r3, [r4, #28]
    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 8001858:	f7fe fec4 	bl	80005e4 <HAL_DMA_Init>
 800185c:	b108      	cbz	r0, 8001862 <HAL_ADC_MspInit+0xbe>
    {
      Error_Handler();
 800185e:	f7ff ff7d 	bl	800175c <Error_Handler>
    }

    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
 8001862:	622c      	str	r4, [r5, #32]
 8001864:	6265      	str	r5, [r4, #36]	; 0x24
  /* USER CODE BEGIN ADC1_MspInit 1 */

  /* USER CODE END ADC1_MspInit 1 */
  }

}
 8001866:	b009      	add	sp, #36	; 0x24
 8001868:	bd30      	pop	{r4, r5, pc}
 800186a:	bf00      	nop
 800186c:	40012400 	.word	0x40012400
 8001870:	40011000 	.word	0x40011000
 8001874:	40010800 	.word	0x40010800
 8001878:	40010c00 	.word	0x40010c00
 800187c:	2000009c 	.word	0x2000009c
 8001880:	40020008 	.word	0x40020008

08001884 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8001884:	b510      	push	{r4, lr}
 8001886:	4604      	mov	r4, r0
 8001888:	b086      	sub	sp, #24
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800188a:	2210      	movs	r2, #16
 800188c:	2100      	movs	r1, #0
 800188e:	a802      	add	r0, sp, #8
 8001890:	f000 f8ba 	bl	8001a08 <memset>
  if(huart->Instance==USART1)
 8001894:	6822      	ldr	r2, [r4, #0]
 8001896:	4b17      	ldr	r3, [pc, #92]	; (80018f4 <HAL_UART_MspInit+0x70>)
 8001898:	429a      	cmp	r2, r3
 800189a:	d128      	bne.n	80018ee <HAL_UART_MspInit+0x6a>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 800189c:	f503 4358 	add.w	r3, r3, #55296	; 0xd800
 80018a0:	699a      	ldr	r2, [r3, #24]
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80018a2:	a902      	add	r1, sp, #8
    __HAL_RCC_USART1_CLK_ENABLE();
 80018a4:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 80018a8:	619a      	str	r2, [r3, #24]
 80018aa:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80018ac:	4812      	ldr	r0, [pc, #72]	; (80018f8 <HAL_UART_MspInit+0x74>)
    __HAL_RCC_USART1_CLK_ENABLE();
 80018ae:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 80018b2:	9200      	str	r2, [sp, #0]
 80018b4:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 80018b6:	699a      	ldr	r2, [r3, #24]
 80018b8:	f042 0204 	orr.w	r2, r2, #4
 80018bc:	619a      	str	r2, [r3, #24]
 80018be:	699b      	ldr	r3, [r3, #24]
 80018c0:	f003 0304 	and.w	r3, r3, #4
 80018c4:	9301      	str	r3, [sp, #4]
 80018c6:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 80018c8:	f44f 7300 	mov.w	r3, #512	; 0x200
 80018cc:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80018ce:	2302      	movs	r3, #2
 80018d0:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 80018d2:	2303      	movs	r3, #3
 80018d4:	9305      	str	r3, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80018d6:	f7ff f80f 	bl	80008f8 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 80018da:	f44f 6380 	mov.w	r3, #1024	; 0x400
 80018de:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80018e0:	2300      	movs	r3, #0
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80018e2:	a902      	add	r1, sp, #8
 80018e4:	4804      	ldr	r0, [pc, #16]	; (80018f8 <HAL_UART_MspInit+0x74>)
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 80018e6:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80018e8:	9304      	str	r3, [sp, #16]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80018ea:	f7ff f805 	bl	80008f8 <HAL_GPIO_Init>
  /* USER CODE BEGIN USART1_MspInit 1 */

  /* USER CODE END USART1_MspInit 1 */
  }

}
 80018ee:	b006      	add	sp, #24
 80018f0:	bd10      	pop	{r4, pc}
 80018f2:	bf00      	nop
 80018f4:	40013800 	.word	0x40013800
 80018f8:	40010800 	.word	0x40010800

080018fc <NMI_Handler>:
 80018fc:	4770      	bx	lr

080018fe <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 80018fe:	e7fe      	b.n	80018fe <HardFault_Handler>

08001900 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8001900:	e7fe      	b.n	8001900 <MemManage_Handler>

08001902 <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8001902:	e7fe      	b.n	8001902 <BusFault_Handler>

08001904 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8001904:	e7fe      	b.n	8001904 <UsageFault_Handler>

08001906 <SVC_Handler>:
 8001906:	4770      	bx	lr

08001908 <DebugMon_Handler>:
 8001908:	4770      	bx	lr

0800190a <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 800190a:	4770      	bx	lr

0800190c <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 800190c:	f7fe bcc0 	b.w	8000290 <HAL_IncTick>

08001910 <DMA1_Channel1_IRQHandler>:
void DMA1_Channel1_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */

  /* USER CODE END DMA1_Channel1_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_adc1);
 8001910:	4801      	ldr	r0, [pc, #4]	; (8001918 <DMA1_Channel1_IRQHandler+0x8>)
 8001912:	f7fe bf15 	b.w	8000740 <HAL_DMA_IRQHandler>
 8001916:	bf00      	nop
 8001918:	2000009c 	.word	0x2000009c

0800191c <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 800191c:	4801      	ldr	r0, [pc, #4]	; (8001924 <USART1_IRQHandler+0x8>)
 800191e:	f7ff bd0b 	b.w	8001338 <HAL_UART_IRQHandler>
 8001922:	bf00      	nop
 8001924:	2000005c 	.word	0x2000005c

08001928 <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 8001928:	4b0f      	ldr	r3, [pc, #60]	; (8001968 <SystemInit+0x40>)
 800192a:	681a      	ldr	r2, [r3, #0]
 800192c:	f042 0201 	orr.w	r2, r2, #1
 8001930:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8001932:	6859      	ldr	r1, [r3, #4]
 8001934:	4a0d      	ldr	r2, [pc, #52]	; (800196c <SystemInit+0x44>)
 8001936:	400a      	ands	r2, r1
 8001938:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 800193a:	681a      	ldr	r2, [r3, #0]
 800193c:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8001940:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8001944:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8001946:	681a      	ldr	r2, [r3, #0]
 8001948:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 800194c:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 800194e:	685a      	ldr	r2, [r3, #4]
 8001950:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8001954:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
#else
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 8001956:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 800195a:	609a      	str	r2, [r3, #8]
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 800195c:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
 8001960:	4b03      	ldr	r3, [pc, #12]	; (8001970 <SystemInit+0x48>)
 8001962:	609a      	str	r2, [r3, #8]
 8001964:	4770      	bx	lr
 8001966:	bf00      	nop
 8001968:	40021000 	.word	0x40021000
 800196c:	f8ff0000 	.word	0xf8ff0000
 8001970:	e000ed00 	.word	0xe000ed00

08001974 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8001974:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8001976:	e003      	b.n	8001980 <LoopCopyDataInit>

08001978 <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8001978:	4b0b      	ldr	r3, [pc, #44]	; (80019a8 <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 800197a:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 800197c:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 800197e:	3104      	adds	r1, #4

08001980 <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 8001980:	480a      	ldr	r0, [pc, #40]	; (80019ac <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 8001982:	4b0b      	ldr	r3, [pc, #44]	; (80019b0 <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8001984:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8001986:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8001988:	d3f6      	bcc.n	8001978 <CopyDataInit>
  ldr r2, =_sbss
 800198a:	4a0a      	ldr	r2, [pc, #40]	; (80019b4 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 800198c:	e002      	b.n	8001994 <LoopFillZerobss>

0800198e <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 800198e:	2300      	movs	r3, #0
  str r3, [r2], #4
 8001990:	f842 3b04 	str.w	r3, [r2], #4

08001994 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8001994:	4b08      	ldr	r3, [pc, #32]	; (80019b8 <LoopFillZerobss+0x24>)
  cmp r2, r3
 8001996:	429a      	cmp	r2, r3
  bcc FillZerobss
 8001998:	d3f9      	bcc.n	800198e <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 800199a:	f7ff ffc5 	bl	8001928 <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 800199e:	f000 f80f 	bl	80019c0 <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 80019a2:	f7ff fda7 	bl	80014f4 <main>
  bx lr
 80019a6:	4770      	bx	lr
  ldr r3, =_sidata
 80019a8:	08001a60 	.word	0x08001a60
  ldr r0, =_sdata
 80019ac:	20000000 	.word	0x20000000
  ldr r3, =_edata
 80019b0:	2000000c 	.word	0x2000000c
  ldr r2, =_sbss
 80019b4:	2000000c 	.word	0x2000000c
  ldr r3, = _ebss
 80019b8:	200000e0 	.word	0x200000e0

080019bc <ADC1_2_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 80019bc:	e7fe      	b.n	80019bc <ADC1_2_IRQHandler>
	...

080019c0 <__libc_init_array>:
 80019c0:	b570      	push	{r4, r5, r6, lr}
 80019c2:	2500      	movs	r5, #0
 80019c4:	4e0c      	ldr	r6, [pc, #48]	; (80019f8 <__libc_init_array+0x38>)
 80019c6:	4c0d      	ldr	r4, [pc, #52]	; (80019fc <__libc_init_array+0x3c>)
 80019c8:	1ba4      	subs	r4, r4, r6
 80019ca:	10a4      	asrs	r4, r4, #2
 80019cc:	42a5      	cmp	r5, r4
 80019ce:	d109      	bne.n	80019e4 <__libc_init_array+0x24>
 80019d0:	f000 f822 	bl	8001a18 <_init>
 80019d4:	2500      	movs	r5, #0
 80019d6:	4e0a      	ldr	r6, [pc, #40]	; (8001a00 <__libc_init_array+0x40>)
 80019d8:	4c0a      	ldr	r4, [pc, #40]	; (8001a04 <__libc_init_array+0x44>)
 80019da:	1ba4      	subs	r4, r4, r6
 80019dc:	10a4      	asrs	r4, r4, #2
 80019de:	42a5      	cmp	r5, r4
 80019e0:	d105      	bne.n	80019ee <__libc_init_array+0x2e>
 80019e2:	bd70      	pop	{r4, r5, r6, pc}
 80019e4:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 80019e8:	4798      	blx	r3
 80019ea:	3501      	adds	r5, #1
 80019ec:	e7ee      	b.n	80019cc <__libc_init_array+0xc>
 80019ee:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 80019f2:	4798      	blx	r3
 80019f4:	3501      	adds	r5, #1
 80019f6:	e7f2      	b.n	80019de <__libc_init_array+0x1e>
 80019f8:	08001a58 	.word	0x08001a58
 80019fc:	08001a58 	.word	0x08001a58
 8001a00:	08001a58 	.word	0x08001a58
 8001a04:	08001a5c 	.word	0x08001a5c

08001a08 <memset>:
 8001a08:	4603      	mov	r3, r0
 8001a0a:	4402      	add	r2, r0
 8001a0c:	4293      	cmp	r3, r2
 8001a0e:	d100      	bne.n	8001a12 <memset+0xa>
 8001a10:	4770      	bx	lr
 8001a12:	f803 1b01 	strb.w	r1, [r3], #1
 8001a16:	e7f9      	b.n	8001a0c <memset+0x4>

08001a18 <_init>:
 8001a18:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8001a1a:	bf00      	nop
 8001a1c:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8001a1e:	bc08      	pop	{r3}
 8001a20:	469e      	mov	lr, r3
 8001a22:	4770      	bx	lr

08001a24 <_fini>:
 8001a24:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8001a26:	bf00      	nop
 8001a28:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8001a2a:	bc08      	pop	{r3}
 8001a2c:	469e      	mov	lr, r3
 8001a2e:	4770      	bx	lr