Bluecell_operate.h 6.0 KB

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  1. /*
  2. * Bluecell_operate.h
  3. *
  4. * Created on: 2020. 4. 3.
  5. * Author: YJ
  6. */
  7. #ifndef BLUECELL_OPERATE_H_
  8. #define BLUECELL_OPERATE_H_
  9. #include <stdbool.h>
  10. #include "Bluecell_operate.h"
  11. /*
  12. SYN
  13. Sub-UID
  14. R-Code
  15. TR-ID
  16. Seq-Num
  17. TTL
  18. Time
  19. 오류 응답
  20. CMD
  21. Length
  22. Header Checksum
  23. SUB-DATA
  24. SUB-DATA-CRC
  25. ETX
  26. */
  27. /*
  28. *
  29. 0 80 전체 상태 조회 모든 AID 항목에 대한 상태 요청 및 응답 (요청 Frame의 SUB-DATA 는 길이는 0)
  30. 1 81 제어 요청 제어 요청의 REQ는 0x01 이고 응답은 전체 데이터 상태를 응답
  31. 10 90 Download Notification 다운로드 통지
  32. 11 91 Download Data 다운로드 data
  33. 12 92 Download Confirm 다운로드 확인
  34. 13 93 Download Complete Download Complete Command
  35. 14 94 System-Reboot System Rebooting Command
  36. 40 C0 테이블 조회 및 응답
  37. 41 C1 테이블 설정 및 응답
  38. *
  39. *
  40. */
  41. typedef enum{
  42. AllDataReq = 0, // -> Response 80
  43. DataCtrlReq, // -> Response 81
  44. DownNotification, // -> Response 90
  45. DownData, // -> Response 91
  46. DownConfirm , // -> Response 92
  47. DownComplete, // -> Response 93
  48. SystemReboot, // -> Response 94
  49. TableDataReq = 40,
  50. };
  51. typedef enum{
  52. MBIC_PREAMBLE_0 = 0,
  53. MBIC_PREAMBLE_1,
  54. MBIC_PREAMBLE_2,
  55. MBIC_PREAMBLE_3,
  56. MBIC_SUBUID_0,
  57. MBIC_SUBUID_1,
  58. MBIC_RCODE_0,
  59. MBIC_TRID_0,
  60. MBIC_TRID_1,
  61. MBIC_SEQSUM_0, // 10byte
  62. MBIC_TTL_0,
  63. MBIC_TIME_0,
  64. MBIC_TIME_1,
  65. MBIC_TIME_2,
  66. MBIC_TIME_3,
  67. MBIC_TIME_4,
  68. MBIC_TIME_5,
  69. MBIC_ERRRESPONSE_0,
  70. MBIC_CMD_0,
  71. MBIC_LENGTH_0, // 20byte
  72. MBIC_LENGTH_1,
  73. MBIC_HEADERCHECKSUM_0,
  74. MBIC_PAYLOADSTART,
  75. /*
  76. * PayLoadSTART
  77. */
  78. };
  79. typedef enum{
  80. Alarm_Bit_List = 0xE000,
  81. Alarm_Mask,
  82. Alarm_Test_Mode,
  83. Alarm_Test_Dummy,
  84. CPU_Version,
  85. ModuleINFORMATION_null1,
  86. CPU_Current_Bank,
  87. CPU_Bank_Select_Reboot_by,
  88. CPU_Bank1_Image_Version,
  89. CPU_Bank1_Image_BuildTime,
  90. CPU_Bank1_Image_Name,
  91. CPU_Bank2_Image_Version,
  92. CPU_Bank2_Image_BuildTime,
  93. CPU_Bank2_Image_Name,
  94. SW_Reset,
  95. Factory_Set_Initialization,
  96. }ModuleINFORMATION;
  97. typedef enum{
  98. Temperature = 0xE010,
  99. Temperature_Offset,
  100. Temp_High_Threshold,
  101. Temp_High_Threshold_Default,
  102. Temp_High_Alarm,
  103. LED_TEST,
  104. Node,
  105. Type,
  106. PCB_Version,
  107. Serial_Number,
  108. Manufacture,
  109. Manufacture_Date,
  110. ENVIRONMENT_INVENTORY_null1,
  111. Freq_ID,
  112. Carrier_ID,
  113. Carrier_ON_OFF,
  114. }ENVIRONMENT_INVENTORY;
  115. typedef enum{
  116. DLI_P1_Level= 0xE020,
  117. DLI_P2_Level,
  118. DLI_P3_Level,
  119. DLI_P4_Level,
  120. ULO_P1_Level,
  121. ULO_P2_Level,
  122. ULO_P3_Level,
  123. ULO_P4_Level,
  124. }Current_Volt;
  125. typedef enum{
  126. DLI_RF_Path1_ON_OFF= 0xE030,
  127. DLI_RF_Path2_ON_OFF,
  128. DLI_RF_Path3_ON_OFF,
  129. DLI_RF_Path4_ON_OFF,
  130. DLI_Gain_Atten1,
  131. DLI_Gain_Atten2,
  132. DLI_Gain_Atten3,
  133. DLI_Gain_Atten4,
  134. DLI_Gain_Atten_Offset1,
  135. DLI_Gain_Atten_Offset2,
  136. DLI_Gain_Atten_Offset3,
  137. DLI_Gain_Atten_Offset4,
  138. DLI_Level_High_Threshold,
  139. DLI_Level_Low_Threshold,
  140. DLI_Level_High_Low_Threshold_default,
  141. DLI_Level,
  142. }DL_Ctrl1;
  143. typedef enum{
  144. DLI_Level_High_Alarm1= 0xE040,
  145. DLI_Level_High_Alarm2,
  146. DLI_Level_High_Alarm3,
  147. DLI_Level_High_Alarm4,
  148. DLI_Level_Low_Alarm1,
  149. DLI_Level_Low_Alarm2,
  150. DLI_Level_Low_Alarm3,
  151. DLI_Level_Low_Alarm4,
  152. }DL_Ctrl2;
  153. typedef enum{
  154. DLI_AGC_ON_OFF= 0xE050,
  155. DLI_AGC_Threshold,
  156. DLI_AGC_Threshold_Default,
  157. DLI_Shutdown_ON_OFF,
  158. DLI_Shutdown_Threshold,
  159. DLI_Shutdown_Threshold_Default,
  160. DLI_Shutdown_Count,
  161. DLI_AGC_Alarm1,
  162. DLI_AGC_Alarm2,
  163. DLI_AGC_Alarm3,
  164. DLI_AGC_Alarm4,
  165. DLI_Shutdown_Alarm1,
  166. DLI_Shutdown_Alarm2,
  167. DLI_Shutdown_Alarm3,
  168. DLI_Shutdown_Alarm4,
  169. }DL_Ctrl3;
  170. typedef enum{
  171. ULO_RF_Path1_ON_OFF= 0xE060,
  172. ULO_RF_Path2_ON_OFF,
  173. ULO_RF_Path3_ON_OFF,
  174. ULO_RF_Path4_ON_OFF,
  175. ULO_Gain_Atten1,
  176. ULO_Gain_Atten2,
  177. ULO_Gain_Atten3,
  178. ULO_Gain_Atten4,
  179. ULO_Gain_Atten_Offset1,
  180. ULO_Gain_Atten_Offset2,
  181. ULO_Gain_Atten_Offset3,
  182. ULO_Gain_Atten_Offset4,
  183. ULO_Level_High_Threshold,
  184. UL_Ctrl1_null1,
  185. ULO_Level_High_Threshold_default,
  186. ULO_Level,
  187. }UL_Ctrl1;
  188. typedef enum{
  189. ULO_Level_High_Alarm1= 0xE070,
  190. ULO_Level_High_Alarm2,
  191. ULO_Level_High_Alarm3,
  192. ULO_Level_High_Alarm4,
  193. }UL_Ctrl2;
  194. typedef enum{
  195. ULO_ALC_ON_OFF= 0xE080,
  196. ULO_ALC_Threshold,
  197. ULO_ALC_Threshold_Default,
  198. ULO_Shutdown_ON_OFF,
  199. ULO_Shutdown_Threshold,
  200. ULO_Shutdown_Threshold_Default,
  201. ULO_Shutdown_Retry_Count,
  202. ULO_ALC_Alarm1,
  203. ULO_ALC_Alarm2,
  204. ULO_ALC_Alarm3,
  205. ULO_ALC_Alarm4,
  206. ULO_Shutdown_Alarm1,
  207. ULO_Shutdown_Alarm2,
  208. ULO_Shutdown_Alarm3,
  209. ULO_Shutdown_Alarm4,
  210. }UL_Ctrl3;
  211. #define MBIC_PREAMBLE0 0x16
  212. #define MBIC_PREAMBLE1 0x16
  213. #define MBIC_PREAMBLE2 0x16
  214. #define MBIC_PREAMBLE3 0x16
  215. #define MBIC_SUBUID0 0x00
  216. #define MBIC_SUBUID1 0xF1
  217. #define MBIC_RCODE
  218. #define MBIC_TRID
  219. #define MBIC_SEQNUM
  220. #define MBIC_TTL
  221. #define MBIC_TIME
  222. #define MBIC_ERRRESPONSE
  223. #define MBIC_CMD
  224. #define MBIC_LENGTH
  225. #define MBIC_CHECKSHUM
  226. #define MBIC_ETX 0x03
  227. /*
  228. *
  229. *
  230. * ALARM LIST
  231. *
  232. */
  233. struct Alarm_ENVIRONMENT {
  234. uint8_t ENVIRONMENT_Temp_High ;
  235. uint8_t ENVIRONMENT_Reserved0 ;
  236. uint8_t ENVIRONMENT_Reserved1 ;
  237. uint8_t ENVIRONMENT_Reserved2 ;
  238. uint8_t ENVIRONMENT_Reserved3 ;
  239. uint8_t ENVIRONMENT_Reserved4 ;
  240. uint8_t ENVIRONMENT_Reserved5 ;
  241. uint8_t ENVIRONMENT_Reserved6 ;
  242. };
  243. struct Alarm_DL {
  244. uint8_t DLI_P4_Level_Low ;
  245. uint8_t DLI_P3_Level_Low ;
  246. uint8_t DLI_P2_Level_Low ;
  247. uint8_t DLI_P1_Level_Low ;
  248. uint8_t ULO_P4_Level_High ;
  249. uint8_t ULO_P3_Level_High ;
  250. uint8_t ULO_P2_Level_High ;
  251. uint8_t ULO_P1_Level_High ;
  252. uint8_t DLI_P4_AGC_Alarm ;
  253. uint8_t DLI_P3_AGC_Alarm ;
  254. uint8_t DLI_P2_AGC_Alarm ;
  255. uint8_t DLI_P1_AGC_Alarm ;
  256. uint8_t DLI_P4_Shutdown_Alarm ;
  257. uint8_t DLI_P3_Shutdown_Alarm ;
  258. uint8_t DLI_P2_Shutdown_Alarm ;
  259. uint8_t DLI_P1_Shutdown_Alarm ;
  260. };
  261. struct Alarm_UL {
  262. uint8_t Reserved0 ;
  263. uint8_t Reserved1 ;
  264. uint8_t Reserved2 ;
  265. uint8_t Reserved3 ;
  266. uint8_t ULO_P4_Level_High ;
  267. uint8_t ULO_P3_Level_High ;
  268. uint8_t ULO_P2_Level_High ;
  269. uint8_t ULO_P1_Level_High ;
  270. uint8_t ULO_P4_ALC_Alarm ;
  271. uint8_t ULO_P3_ALC_Alarm ;
  272. uint8_t ULO_P2_ALC_Alarm ;
  273. uint8_t ULO_P1_ALC_Alarm ;
  274. uint8_t ULO_P4_Shutdown ;
  275. uint8_t ULO_P3_Shutdown ;
  276. uint8_t ULO_P2_Shutdown ;
  277. uint8_t ULO_P1_Shutdown ;
  278. };
  279. #define ALARM_ENVIRONMENT_FLAG 0x80
  280. #define ALARM_DL1_FLAG 0xFF
  281. #define ALARM_DL2_FLAG 0xFF
  282. #define ALARM_UL1_FLAG 0x0F
  283. #define ALARM_UL2_FLAG 0xFF
  284. typedef enum{
  285. ENVIRONMENT = 0,
  286. DL1,
  287. DL2,
  288. UL1,
  289. UL2,
  290. MAX_ALARM_Len,
  291. }AlarmList;
  292. #endif /* BLUECELL_OPERATE_H_ */