STM32F103_ATTEN_PLL_Zig.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 000043fc 080001e4 080001e4 000101e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000828 080045e0 080045e0 000145e0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08004e08 08004e08 00014e08 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08004e0c 08004e0c 00014e0c 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 0000027c 20000000 08004e10 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00001138 20000280 0800508c 00020280 2**3 ALLOC 7 ._user_heap_stack 00000600 200013b8 0800508c 000213b8 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 0002027c 2**0 CONTENTS, READONLY 9 .debug_info 0002193d 00000000 00000000 000202a5 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00004351 00000000 00000000 00041be2 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000b761 00000000 00000000 00045f33 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000d78 00000000 00000000 00051698 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 000015a8 00000000 00000000 00052410 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00009582 00000000 00000000 000539b8 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 0000662c 00000000 00000000 0005cf3a 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 00063566 2**0 CONTENTS, READONLY 17 .debug_frame 000030a4 00000000 00000000 000635e4 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001e4 <__do_global_dtors_aux>: 80001e4: b510 push {r4, lr} 80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>) 80001e8: 7823 ldrb r3, [r4, #0] 80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16> 80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>) 80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12> 80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>) 80001f2: f3af 8000 nop.w 80001f6: 2301 movs r3, #1 80001f8: 7023 strb r3, [r4, #0] 80001fa: bd10 pop {r4, pc} 80001fc: 20000280 .word 0x20000280 8000200: 00000000 .word 0x00000000 8000204: 080045c8 .word 0x080045c8 08000208 : 8000208: b508 push {r3, lr} 800020a: 4b03 ldr r3, [pc, #12] ; (8000218 ) 800020c: b11b cbz r3, 8000216 800020e: 4903 ldr r1, [pc, #12] ; (800021c ) 8000210: 4803 ldr r0, [pc, #12] ; (8000220 ) 8000212: f3af 8000 nop.w 8000216: bd08 pop {r3, pc} 8000218: 00000000 .word 0x00000000 800021c: 20000284 .word 0x20000284 8000220: 080045c8 .word 0x080045c8 08000224 <__aeabi_llsr>: 8000224: 40d0 lsrs r0, r2 8000226: 1c0b adds r3, r1, #0 8000228: 40d1 lsrs r1, r2 800022a: 469c mov ip, r3 800022c: 3a20 subs r2, #32 800022e: 40d3 lsrs r3, r2 8000230: 4318 orrs r0, r3 8000232: 4252 negs r2, r2 8000234: 4663 mov r3, ip 8000236: 4093 lsls r3, r2 8000238: 4318 orrs r0, r3 800023a: 4770 bx lr 0800023c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800023c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800023e: 4b0e ldr r3, [pc, #56] ; (8000278 ) { 8000240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000242: 7818 ldrb r0, [r3, #0] 8000244: f44f 737a mov.w r3, #1000 ; 0x3e8 8000248: fbb3 f3f0 udiv r3, r3, r0 800024c: 4a0b ldr r2, [pc, #44] ; (800027c ) 800024e: 6810 ldr r0, [r2, #0] 8000250: fbb0 f0f3 udiv r0, r0, r3 8000254: f000 f89e bl 8000394 8000258: 4604 mov r4, r0 800025a: b958 cbnz r0, 8000274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800025c: 2d0f cmp r5, #15 800025e: d809 bhi.n 8000274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000260: 4602 mov r2, r0 8000262: 4629 mov r1, r5 8000264: f04f 30ff mov.w r0, #4294967295 8000268: f000 f854 bl 8000314 uwTickPrio = TickPriority; 800026c: 4b04 ldr r3, [pc, #16] ; (8000280 ) 800026e: 4620 mov r0, r4 8000270: 601d str r5, [r3, #0] 8000272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000276: bd38 pop {r3, r4, r5, pc} 8000278: 20000000 .word 0x20000000 800027c: 20000214 .word 0x20000214 8000280: 20000004 .word 0x20000004 08000284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000284: 4a07 ldr r2, [pc, #28] ; (80002a4 ) { 8000286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800028a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800028c: f043 0310 orr.w r3, r3, #16 8000290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8000292: f000 f82d bl 80002f0 HAL_InitTick(TICK_INT_PRIORITY); 8000296: 2000 movs r0, #0 8000298: f7ff ffd0 bl 800023c HAL_MspInit(); 800029c: f002 fe80 bl 8002fa0 } 80002a0: 2000 movs r0, #0 80002a2: bd08 pop {r3, pc} 80002a4: 40022000 .word 0x40022000 080002a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80002a8: 4a03 ldr r2, [pc, #12] ; (80002b8 ) 80002aa: 4b04 ldr r3, [pc, #16] ; (80002bc ) 80002ac: 6811 ldr r1, [r2, #0] 80002ae: 781b ldrb r3, [r3, #0] 80002b0: 440b add r3, r1 80002b2: 6013 str r3, [r2, #0] 80002b4: 4770 bx lr 80002b6: bf00 nop 80002b8: 20000304 .word 0x20000304 80002bc: 20000000 .word 0x20000000 080002c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80002c0: 4b01 ldr r3, [pc, #4] ; (80002c8 ) 80002c2: 6818 ldr r0, [r3, #0] } 80002c4: 4770 bx lr 80002c6: bf00 nop 80002c8: 20000304 .word 0x20000304 080002cc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80002cc: b538 push {r3, r4, r5, lr} 80002ce: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80002d0: f7ff fff6 bl 80002c0 80002d4: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80002d6: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80002d8: bf1e ittt ne 80002da: 4b04 ldrne r3, [pc, #16] ; (80002ec ) 80002dc: 781b ldrbne r3, [r3, #0] 80002de: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80002e0: f7ff ffee bl 80002c0 80002e4: 1b40 subs r0, r0, r5 80002e6: 4284 cmp r4, r0 80002e8: d8fa bhi.n 80002e0 { } } 80002ea: bd38 pop {r3, r4, r5, pc} 80002ec: 20000000 .word 0x20000000 080002f0 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80002f0: 4a07 ldr r2, [pc, #28] ; (8000310 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002f2: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80002f4: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002f6: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80002fa: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80002fe: 041b lsls r3, r3, #16 8000300: 0c1b lsrs r3, r3, #16 8000302: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8000306: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800030a: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 800030c: 60d3 str r3, [r2, #12] 800030e: 4770 bx lr 8000310: e000ed00 .word 0xe000ed00 08000314 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8000314: 4b17 ldr r3, [pc, #92] ; (8000374 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8000316: b530 push {r4, r5, lr} 8000318: 68dc ldr r4, [r3, #12] 800031a: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800031e: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000322: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000324: 2b04 cmp r3, #4 8000326: bf28 it cs 8000328: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800032a: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800032c: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000330: bf98 it ls 8000332: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000334: fa05 f303 lsl.w r3, r5, r3 8000338: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800033c: bf88 it hi 800033e: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000340: 4019 ands r1, r3 8000342: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000344: fa05 f404 lsl.w r4, r5, r4 8000348: 3c01 subs r4, #1 800034a: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 800034c: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800034e: ea42 0201 orr.w r2, r2, r1 8000352: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000356: bfaf iteee ge 8000358: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800035c: 4b06 ldrlt r3, [pc, #24] ; (8000378 ) 800035e: f000 000f andlt.w r0, r0, #15 8000362: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000364: bfa5 ittet ge 8000366: b2d2 uxtbge r2, r2 8000368: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800036c: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800036e: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8000372: bd30 pop {r4, r5, pc} 8000374: e000ed00 .word 0xe000ed00 8000378: e000ed14 .word 0xe000ed14 0800037c : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 800037c: 2301 movs r3, #1 800037e: 0942 lsrs r2, r0, #5 8000380: f000 001f and.w r0, r0, #31 8000384: fa03 f000 lsl.w r0, r3, r0 8000388: 4b01 ldr r3, [pc, #4] ; (8000390 ) 800038a: f843 0022 str.w r0, [r3, r2, lsl #2] 800038e: 4770 bx lr 8000390: e000e100 .word 0xe000e100 08000394 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000394: 3801 subs r0, #1 8000396: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 800039a: d20a bcs.n 80003b2 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800039c: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800039e: 4b06 ldr r3, [pc, #24] ; (80003b8 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80003a0: 4a06 ldr r2, [pc, #24] ; (80003bc ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80003a2: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80003a4: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80003a8: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80003aa: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80003ac: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80003ae: 601a str r2, [r3, #0] 80003b0: 4770 bx lr return (1UL); /* Reload value impossible */ 80003b2: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80003b4: 4770 bx lr 80003b6: bf00 nop 80003b8: e000e010 .word 0xe000e010 80003bc: e000ed00 .word 0xe000ed00 080003c0 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 80003c0: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 80003c2: 2800 cmp r0, #0 80003c4: d032 beq.n 800042c assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80003c6: 6801 ldr r1, [r0, #0] 80003c8: 4b19 ldr r3, [pc, #100] ; (8000430 ) 80003ca: 2414 movs r4, #20 80003cc: 4299 cmp r1, r3 80003ce: d825 bhi.n 800041c { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003d0: 4a18 ldr r2, [pc, #96] ; (8000434 ) hdma->DmaBaseAddress = DMA1; 80003d2: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003d6: 440a add r2, r1 80003d8: fbb2 f2f4 udiv r2, r2, r4 80003dc: 0092 lsls r2, r2, #2 80003de: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80003e0: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80003e2: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80003e4: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80003e6: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80003e8: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003ea: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003ec: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003f0: 4323 orrs r3, r4 80003f2: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003f4: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003f8: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80003fa: 6944 ldr r4, [r0, #20] 80003fc: 4323 orrs r3, r4 80003fe: 6984 ldr r4, [r0, #24] 8000400: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 8000402: 69c4 ldr r4, [r0, #28] 8000404: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 8000406: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8000408: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 800040a: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 800040c: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 800040e: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000412: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8000414: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 8000418: 4618 mov r0, r3 800041a: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 800041c: 4b06 ldr r3, [pc, #24] ; (8000438 ) 800041e: 440b add r3, r1 8000420: fbb3 f3f4 udiv r3, r3, r4 8000424: 009b lsls r3, r3, #2 8000426: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8000428: 4b04 ldr r3, [pc, #16] ; (800043c ) 800042a: e7d9 b.n 80003e0 return HAL_ERROR; 800042c: 2001 movs r0, #1 } 800042e: bd10 pop {r4, pc} 8000430: 40020407 .word 0x40020407 8000434: bffdfff8 .word 0xbffdfff8 8000438: bffdfbf8 .word 0xbffdfbf8 800043c: 40020400 .word 0x40020400 08000440 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8000440: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8000442: f890 4020 ldrb.w r4, [r0, #32] 8000446: 2c01 cmp r4, #1 8000448: d035 beq.n 80004b6 800044a: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 800044c: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 8000450: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8000454: 42a5 cmp r5, r4 8000456: f04f 0600 mov.w r6, #0 800045a: f04f 0402 mov.w r4, #2 800045e: d128 bne.n 80004b2 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8000460: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8000464: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000466: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8000468: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800046a: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 800046c: f026 0601 bic.w r6, r6, #1 8000470: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000472: 6bc6 ldr r6, [r0, #60] ; 0x3c 8000474: 40bd lsls r5, r7 8000476: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8000478: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 800047a: 6843 ldr r3, [r0, #4] 800047c: 6805 ldr r5, [r0, #0] 800047e: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 8000480: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8000482: bf0b itete eq 8000484: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 8000486: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8000488: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 800048a: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 800048c: b14b cbz r3, 80004a2 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800048e: 6823 ldr r3, [r4, #0] 8000490: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000494: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 8000496: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8000498: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 800049a: f043 0301 orr.w r3, r3, #1 800049e: 602b str r3, [r5, #0] 80004a0: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 80004a2: 6823 ldr r3, [r4, #0] 80004a4: f023 0304 bic.w r3, r3, #4 80004a8: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 80004aa: 6823 ldr r3, [r4, #0] 80004ac: f043 030a orr.w r3, r3, #10 80004b0: e7f0 b.n 8000494 __HAL_UNLOCK(hdma); 80004b2: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 80004b6: 2002 movs r0, #2 } 80004b8: bdf0 pop {r4, r5, r6, r7, pc} ... 080004bc : if(HAL_DMA_STATE_BUSY != hdma->State) 80004bc: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80004c0: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80004c2: 2b02 cmp r3, #2 80004c4: d003 beq.n 80004ce hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80004c6: 2304 movs r3, #4 80004c8: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80004ca: 2001 movs r0, #1 80004cc: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80004ce: 6803 ldr r3, [r0, #0] 80004d0: 681a ldr r2, [r3, #0] 80004d2: f022 020e bic.w r2, r2, #14 80004d6: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80004d8: 681a ldr r2, [r3, #0] 80004da: f022 0201 bic.w r2, r2, #1 80004de: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004e0: 4a29 ldr r2, [pc, #164] ; (8000588 ) 80004e2: 4293 cmp r3, r2 80004e4: d924 bls.n 8000530 80004e6: f502 7262 add.w r2, r2, #904 ; 0x388 80004ea: 4293 cmp r3, r2 80004ec: d019 beq.n 8000522 80004ee: 3214 adds r2, #20 80004f0: 4293 cmp r3, r2 80004f2: d018 beq.n 8000526 80004f4: 3214 adds r2, #20 80004f6: 4293 cmp r3, r2 80004f8: d017 beq.n 800052a 80004fa: 3214 adds r2, #20 80004fc: 4293 cmp r3, r2 80004fe: bf0c ite eq 8000500: f44f 5380 moveq.w r3, #4096 ; 0x1000 8000504: f44f 3380 movne.w r3, #65536 ; 0x10000 8000508: 4a20 ldr r2, [pc, #128] ; (800058c ) 800050a: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 800050c: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 800050e: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8000510: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 8000514: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 8000516: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 800051a: b39b cbz r3, 8000584 hdma->XferAbortCallback(hdma); 800051c: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 800051e: 4620 mov r0, r4 8000520: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8000522: 2301 movs r3, #1 8000524: e7f0 b.n 8000508 8000526: 2310 movs r3, #16 8000528: e7ee b.n 8000508 800052a: f44f 7380 mov.w r3, #256 ; 0x100 800052e: e7eb b.n 8000508 8000530: 4917 ldr r1, [pc, #92] ; (8000590 ) 8000532: 428b cmp r3, r1 8000534: d016 beq.n 8000564 8000536: 3114 adds r1, #20 8000538: 428b cmp r3, r1 800053a: d015 beq.n 8000568 800053c: 3114 adds r1, #20 800053e: 428b cmp r3, r1 8000540: d014 beq.n 800056c 8000542: 3114 adds r1, #20 8000544: 428b cmp r3, r1 8000546: d014 beq.n 8000572 8000548: 3114 adds r1, #20 800054a: 428b cmp r3, r1 800054c: d014 beq.n 8000578 800054e: 3114 adds r1, #20 8000550: 428b cmp r3, r1 8000552: d014 beq.n 800057e 8000554: 4293 cmp r3, r2 8000556: bf14 ite ne 8000558: f44f 3380 movne.w r3, #65536 ; 0x10000 800055c: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8000560: 4a0c ldr r2, [pc, #48] ; (8000594 ) 8000562: e7d2 b.n 800050a 8000564: 2301 movs r3, #1 8000566: e7fb b.n 8000560 8000568: 2310 movs r3, #16 800056a: e7f9 b.n 8000560 800056c: f44f 7380 mov.w r3, #256 ; 0x100 8000570: e7f6 b.n 8000560 8000572: f44f 5380 mov.w r3, #4096 ; 0x1000 8000576: e7f3 b.n 8000560 8000578: f44f 3380 mov.w r3, #65536 ; 0x10000 800057c: e7f0 b.n 8000560 800057e: f44f 1380 mov.w r3, #1048576 ; 0x100000 8000582: e7ed b.n 8000560 HAL_StatusTypeDef status = HAL_OK; 8000584: 4618 mov r0, r3 } 8000586: bd10 pop {r4, pc} 8000588: 40020080 .word 0x40020080 800058c: 40020400 .word 0x40020400 8000590: 40020008 .word 0x40020008 8000594: 40020000 .word 0x40020000 08000598 : { 8000598: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800059a: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 800059c: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800059e: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 80005a0: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 80005a2: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80005a4: 4095 lsls r5, r2 80005a6: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 80005a8: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80005aa: d055 beq.n 8000658 80005ac: 074d lsls r5, r1, #29 80005ae: d553 bpl.n 8000658 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 80005b0: 681a ldr r2, [r3, #0] 80005b2: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 80005b4: bf5e ittt pl 80005b6: 681a ldrpl r2, [r3, #0] 80005b8: f022 0204 bicpl.w r2, r2, #4 80005bc: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005be: 4a60 ldr r2, [pc, #384] ; (8000740 ) 80005c0: 4293 cmp r3, r2 80005c2: d91f bls.n 8000604 80005c4: f502 7262 add.w r2, r2, #904 ; 0x388 80005c8: 4293 cmp r3, r2 80005ca: d014 beq.n 80005f6 80005cc: 3214 adds r2, #20 80005ce: 4293 cmp r3, r2 80005d0: d013 beq.n 80005fa 80005d2: 3214 adds r2, #20 80005d4: 4293 cmp r3, r2 80005d6: d012 beq.n 80005fe 80005d8: 3214 adds r2, #20 80005da: 4293 cmp r3, r2 80005dc: bf0c ite eq 80005de: f44f 4380 moveq.w r3, #16384 ; 0x4000 80005e2: f44f 2380 movne.w r3, #262144 ; 0x40000 80005e6: 4a57 ldr r2, [pc, #348] ; (8000744 ) 80005e8: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80005ea: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80005ec: 2b00 cmp r3, #0 80005ee: f000 80a5 beq.w 800073c } 80005f2: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80005f4: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005f6: 2304 movs r3, #4 80005f8: e7f5 b.n 80005e6 80005fa: 2340 movs r3, #64 ; 0x40 80005fc: e7f3 b.n 80005e6 80005fe: f44f 6380 mov.w r3, #1024 ; 0x400 8000602: e7f0 b.n 80005e6 8000604: 4950 ldr r1, [pc, #320] ; (8000748 ) 8000606: 428b cmp r3, r1 8000608: d016 beq.n 8000638 800060a: 3114 adds r1, #20 800060c: 428b cmp r3, r1 800060e: d015 beq.n 800063c 8000610: 3114 adds r1, #20 8000612: 428b cmp r3, r1 8000614: d014 beq.n 8000640 8000616: 3114 adds r1, #20 8000618: 428b cmp r3, r1 800061a: d014 beq.n 8000646 800061c: 3114 adds r1, #20 800061e: 428b cmp r3, r1 8000620: d014 beq.n 800064c 8000622: 3114 adds r1, #20 8000624: 428b cmp r3, r1 8000626: d014 beq.n 8000652 8000628: 4293 cmp r3, r2 800062a: bf14 ite ne 800062c: f44f 2380 movne.w r3, #262144 ; 0x40000 8000630: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8000634: 4a45 ldr r2, [pc, #276] ; (800074c ) 8000636: e7d7 b.n 80005e8 8000638: 2304 movs r3, #4 800063a: e7fb b.n 8000634 800063c: 2340 movs r3, #64 ; 0x40 800063e: e7f9 b.n 8000634 8000640: f44f 6380 mov.w r3, #1024 ; 0x400 8000644: e7f6 b.n 8000634 8000646: f44f 4380 mov.w r3, #16384 ; 0x4000 800064a: e7f3 b.n 8000634 800064c: f44f 2380 mov.w r3, #262144 ; 0x40000 8000650: e7f0 b.n 8000634 8000652: f44f 0380 mov.w r3, #4194304 ; 0x400000 8000656: e7ed b.n 8000634 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8000658: 2502 movs r5, #2 800065a: 4095 lsls r5, r2 800065c: 4225 tst r5, r4 800065e: d057 beq.n 8000710 8000660: 078d lsls r5, r1, #30 8000662: d555 bpl.n 8000710 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000664: 681a ldr r2, [r3, #0] 8000666: 0694 lsls r4, r2, #26 8000668: d406 bmi.n 8000678 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 800066a: 681a ldr r2, [r3, #0] 800066c: f022 020a bic.w r2, r2, #10 8000670: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 8000672: 2201 movs r2, #1 8000674: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8000678: 4a31 ldr r2, [pc, #196] ; (8000740 ) 800067a: 4293 cmp r3, r2 800067c: d91e bls.n 80006bc 800067e: f502 7262 add.w r2, r2, #904 ; 0x388 8000682: 4293 cmp r3, r2 8000684: d013 beq.n 80006ae 8000686: 3214 adds r2, #20 8000688: 4293 cmp r3, r2 800068a: d012 beq.n 80006b2 800068c: 3214 adds r2, #20 800068e: 4293 cmp r3, r2 8000690: d011 beq.n 80006b6 8000692: 3214 adds r2, #20 8000694: 4293 cmp r3, r2 8000696: bf0c ite eq 8000698: f44f 5300 moveq.w r3, #8192 ; 0x2000 800069c: f44f 3300 movne.w r3, #131072 ; 0x20000 80006a0: 4a28 ldr r2, [pc, #160] ; (8000744 ) 80006a2: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 80006a4: 2300 movs r3, #0 80006a6: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 80006aa: 6a83 ldr r3, [r0, #40] ; 0x28 80006ac: e79e b.n 80005ec __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 80006ae: 2302 movs r3, #2 80006b0: e7f6 b.n 80006a0 80006b2: 2320 movs r3, #32 80006b4: e7f4 b.n 80006a0 80006b6: f44f 7300 mov.w r3, #512 ; 0x200 80006ba: e7f1 b.n 80006a0 80006bc: 4922 ldr r1, [pc, #136] ; (8000748 ) 80006be: 428b cmp r3, r1 80006c0: d016 beq.n 80006f0 80006c2: 3114 adds r1, #20 80006c4: 428b cmp r3, r1 80006c6: d015 beq.n 80006f4 80006c8: 3114 adds r1, #20 80006ca: 428b cmp r3, r1 80006cc: d014 beq.n 80006f8 80006ce: 3114 adds r1, #20 80006d0: 428b cmp r3, r1 80006d2: d014 beq.n 80006fe 80006d4: 3114 adds r1, #20 80006d6: 428b cmp r3, r1 80006d8: d014 beq.n 8000704 80006da: 3114 adds r1, #20 80006dc: 428b cmp r3, r1 80006de: d014 beq.n 800070a 80006e0: 4293 cmp r3, r2 80006e2: bf14 ite ne 80006e4: f44f 3300 movne.w r3, #131072 ; 0x20000 80006e8: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80006ec: 4a17 ldr r2, [pc, #92] ; (800074c ) 80006ee: e7d8 b.n 80006a2 80006f0: 2302 movs r3, #2 80006f2: e7fb b.n 80006ec 80006f4: 2320 movs r3, #32 80006f6: e7f9 b.n 80006ec 80006f8: f44f 7300 mov.w r3, #512 ; 0x200 80006fc: e7f6 b.n 80006ec 80006fe: f44f 5300 mov.w r3, #8192 ; 0x2000 8000702: e7f3 b.n 80006ec 8000704: f44f 3300 mov.w r3, #131072 ; 0x20000 8000708: e7f0 b.n 80006ec 800070a: f44f 1300 mov.w r3, #2097152 ; 0x200000 800070e: e7ed b.n 80006ec else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8000710: 2508 movs r5, #8 8000712: 4095 lsls r5, r2 8000714: 4225 tst r5, r4 8000716: d011 beq.n 800073c 8000718: 0709 lsls r1, r1, #28 800071a: d50f bpl.n 800073c __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800071c: 6819 ldr r1, [r3, #0] 800071e: f021 010e bic.w r1, r1, #14 8000722: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000724: 2301 movs r3, #1 8000726: fa03 f202 lsl.w r2, r3, r2 800072a: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 800072c: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 800072e: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 8000732: 2300 movs r3, #0 8000734: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8000738: 6b03 ldr r3, [r0, #48] ; 0x30 800073a: e757 b.n 80005ec } 800073c: bc70 pop {r4, r5, r6} 800073e: 4770 bx lr 8000740: 40020080 .word 0x40020080 8000744: 40020400 .word 0x40020400 8000748: 40020008 .word 0x40020008 800074c: 40020000 .word 0x40020000 08000750 : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 8000750: 4a11 ldr r2, [pc, #68] ; (8000798 ) 8000752: 68d3 ldr r3, [r2, #12] 8000754: f013 0310 ands.w r3, r3, #16 8000758: d005 beq.n 8000766 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 800075a: 4910 ldr r1, [pc, #64] ; (800079c ) 800075c: 69cb ldr r3, [r1, #28] 800075e: f043 0302 orr.w r3, r3, #2 8000762: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8000764: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000766: 68d2 ldr r2, [r2, #12] 8000768: 0750 lsls r0, r2, #29 800076a: d506 bpl.n 800077a #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800076c: 490b ldr r1, [pc, #44] ; (800079c ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 800076e: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000772: 69ca ldr r2, [r1, #28] 8000774: f042 0201 orr.w r2, r2, #1 8000778: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 800077a: 4a07 ldr r2, [pc, #28] ; (8000798 ) 800077c: 69d1 ldr r1, [r2, #28] 800077e: 07c9 lsls r1, r1, #31 8000780: d508 bpl.n 8000794 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 8000782: 4806 ldr r0, [pc, #24] ; (800079c ) 8000784: 69c1 ldr r1, [r0, #28] 8000786: f041 0104 orr.w r1, r1, #4 800078a: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 800078c: 69d1 ldr r1, [r2, #28] 800078e: f021 0101 bic.w r1, r1, #1 8000792: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8000794: 60d3 str r3, [r2, #12] 8000796: 4770 bx lr 8000798: 40022000 .word 0x40022000 800079c: 20000308 .word 0x20000308 080007a0 : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80007a0: 4b06 ldr r3, [pc, #24] ; (80007bc ) 80007a2: 6918 ldr r0, [r3, #16] 80007a4: f010 0080 ands.w r0, r0, #128 ; 0x80 80007a8: d007 beq.n 80007ba WRITE_REG(FLASH->KEYR, FLASH_KEY1); 80007aa: 4a05 ldr r2, [pc, #20] ; (80007c0 ) 80007ac: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 80007ae: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 80007b2: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80007b4: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 80007b6: f3c0 10c0 ubfx r0, r0, #7, #1 } 80007ba: 4770 bx lr 80007bc: 40022000 .word 0x40022000 80007c0: 45670123 .word 0x45670123 080007c4 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007c4: 4a03 ldr r2, [pc, #12] ; (80007d4 ) } 80007c6: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007c8: 6913 ldr r3, [r2, #16] 80007ca: f043 0380 orr.w r3, r3, #128 ; 0x80 80007ce: 6113 str r3, [r2, #16] } 80007d0: 4770 bx lr 80007d2: bf00 nop 80007d4: 40022000 .word 0x40022000 080007d8 : { 80007d8: b5f8 push {r3, r4, r5, r6, r7, lr} 80007da: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 80007dc: f7ff fd70 bl 80002c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007e0: 4c11 ldr r4, [pc, #68] ; (8000828 ) uint32_t tickstart = HAL_GetTick(); 80007e2: 4607 mov r7, r0 80007e4: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007e6: 68e3 ldr r3, [r4, #12] 80007e8: 07d8 lsls r0, r3, #31 80007ea: d412 bmi.n 8000812 if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 80007ec: 68e3 ldr r3, [r4, #12] 80007ee: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 80007f0: bf44 itt mi 80007f2: 2320 movmi r3, #32 80007f4: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007f6: 68eb ldr r3, [r5, #12] 80007f8: 06da lsls r2, r3, #27 80007fa: d406 bmi.n 800080a __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007fc: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007fe: 07db lsls r3, r3, #31 8000800: d403 bmi.n 800080a __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000802: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8000804: f010 0004 ands.w r0, r0, #4 8000808: d002 beq.n 8000810 FLASH_SetErrorCode(); 800080a: f7ff ffa1 bl 8000750 return HAL_ERROR; 800080e: 2001 movs r0, #1 } 8000810: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 8000812: 1c73 adds r3, r6, #1 8000814: d0e7 beq.n 80007e6 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8000816: b90e cbnz r6, 800081c return HAL_TIMEOUT; 8000818: 2003 movs r0, #3 800081a: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 800081c: f7ff fd50 bl 80002c0 8000820: 1bc0 subs r0, r0, r7 8000822: 4286 cmp r6, r0 8000824: d2df bcs.n 80007e6 8000826: e7f7 b.n 8000818 8000828: 40022000 .word 0x40022000 0800082c : { 800082c: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 8000830: 4c1f ldr r4, [pc, #124] ; (80008b0 ) { 8000832: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8000834: 7e23 ldrb r3, [r4, #24] { 8000836: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8000838: 2b01 cmp r3, #1 { 800083a: 460f mov r7, r1 800083c: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800083e: d033 beq.n 80008a8 8000840: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000842: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8000846: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000848: f7ff ffc6 bl 80007d8 if(status == HAL_OK) 800084c: bb40 cbnz r0, 80008a0 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800084e: 2d01 cmp r5, #1 8000850: d003 beq.n 800085a nbiterations = 4U; 8000852: 2d02 cmp r5, #2 8000854: bf0c ite eq 8000856: 2502 moveq r5, #2 8000858: 2504 movne r5, #4 800085a: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 800085c: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 800085e: f8df b054 ldr.w fp, [pc, #84] ; 80008b4 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000862: 0132 lsls r2, r6, #4 8000864: 4640 mov r0, r8 8000866: 4649 mov r1, r9 8000868: f7ff fcdc bl 8000224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 800086c: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 8000870: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000874: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 8000876: f043 0301 orr.w r3, r3, #1 800087a: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 800087e: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000882: f24c 3050 movw r0, #50000 ; 0xc350 8000886: f7ff ffa7 bl 80007d8 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 800088a: f8db 3010 ldr.w r3, [fp, #16] 800088e: f023 0301 bic.w r3, r3, #1 8000892: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 8000896: b918 cbnz r0, 80008a0 8000898: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 800089a: b2f3 uxtb r3, r6 800089c: 429d cmp r5, r3 800089e: d8e0 bhi.n 8000862 __HAL_UNLOCK(&pFlash); 80008a0: 2300 movs r3, #0 80008a2: 7623 strb r3, [r4, #24] return status; 80008a4: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 80008a8: 2002 movs r0, #2 } 80008aa: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80008ae: bf00 nop 80008b0: 20000308 .word 0x20000308 80008b4: 40022000 .word 0x40022000 080008b8 : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008b8: 2200 movs r2, #0 80008ba: 4b06 ldr r3, [pc, #24] ; (80008d4 ) 80008bc: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 80008be: 4b06 ldr r3, [pc, #24] ; (80008d8 ) 80008c0: 691a ldr r2, [r3, #16] 80008c2: f042 0204 orr.w r2, r2, #4 80008c6: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008c8: 691a ldr r2, [r3, #16] 80008ca: f042 0240 orr.w r2, r2, #64 ; 0x40 80008ce: 611a str r2, [r3, #16] 80008d0: 4770 bx lr 80008d2: bf00 nop 80008d4: 20000308 .word 0x20000308 80008d8: 40022000 .word 0x40022000 080008dc : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008dc: 2200 movs r2, #0 80008de: 4b06 ldr r3, [pc, #24] ; (80008f8 ) 80008e0: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 80008e2: 4b06 ldr r3, [pc, #24] ; (80008fc ) 80008e4: 691a ldr r2, [r3, #16] 80008e6: f042 0202 orr.w r2, r2, #2 80008ea: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 80008ec: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008ee: 691a ldr r2, [r3, #16] 80008f0: f042 0240 orr.w r2, r2, #64 ; 0x40 80008f4: 611a str r2, [r3, #16] 80008f6: 4770 bx lr 80008f8: 20000308 .word 0x20000308 80008fc: 40022000 .word 0x40022000 08000900 : { 8000900: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 8000904: 4d23 ldr r5, [pc, #140] ; (8000994 ) { 8000906: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 8000908: 7e2b ldrb r3, [r5, #24] { 800090a: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 800090c: 2b01 cmp r3, #1 800090e: d03d beq.n 800098c 8000910: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000912: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 8000914: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000916: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000918: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 800091c: d113 bne.n 8000946 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800091e: f7ff ff5b bl 80007d8 8000922: b120 cbz r0, 800092e HAL_StatusTypeDef status = HAL_ERROR; 8000924: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8000926: 2300 movs r3, #0 8000928: 762b strb r3, [r5, #24] return status; 800092a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 800092e: f7ff ffc3 bl 80008b8 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8000932: f24c 3050 movw r0, #50000 ; 0xc350 8000936: f7ff ff4f bl 80007d8 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 800093a: 4a17 ldr r2, [pc, #92] ; (8000998 ) 800093c: 6913 ldr r3, [r2, #16] 800093e: f023 0304 bic.w r3, r3, #4 8000942: 6113 str r3, [r2, #16] 8000944: e7ef b.n 8000926 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000946: f7ff ff47 bl 80007d8 800094a: 2800 cmp r0, #0 800094c: d1ea bne.n 8000924 *PageError = 0xFFFFFFFFU; 800094e: f04f 33ff mov.w r3, #4294967295 8000952: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 8000956: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 8000958: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 800095a: 4c0f ldr r4, [pc, #60] ; (8000998 ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 800095c: 68fa ldr r2, [r7, #12] 800095e: 68bb ldr r3, [r7, #8] 8000960: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 8000964: 429e cmp r6, r3 8000966: d2de bcs.n 8000926 FLASH_PageErase(address); 8000968: 4630 mov r0, r6 800096a: f7ff ffb7 bl 80008dc status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800096e: f24c 3050 movw r0, #50000 ; 0xc350 8000972: f7ff ff31 bl 80007d8 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000976: 6923 ldr r3, [r4, #16] 8000978: f023 0302 bic.w r3, r3, #2 800097c: 6123 str r3, [r4, #16] if (status != HAL_OK) 800097e: b110 cbz r0, 8000986 *PageError = address; 8000980: f8c8 6000 str.w r6, [r8] break; 8000984: e7cf b.n 8000926 address += FLASH_PAGE_SIZE) 8000986: f506 6600 add.w r6, r6, #2048 ; 0x800 800098a: e7e7 b.n 800095c __HAL_LOCK(&pFlash); 800098c: 2002 movs r0, #2 } 800098e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8000992: bf00 nop 8000994: 20000308 .word 0x20000308 8000998: 40022000 .word 0x40022000 0800099c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 800099c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 80009a0: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 80009a2: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 80009a4: 4f6c ldr r7, [pc, #432] ; (8000b58 ) 80009a6: 4b6d ldr r3, [pc, #436] ; (8000b5c ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80009a8: f8df e1b8 ldr.w lr, [pc, #440] ; 8000b64 switch (GPIO_Init->Mode) 80009ac: f8df c1b8 ldr.w ip, [pc, #440] ; 8000b68 ioposition = (0x01U << position); 80009b0: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80009b4: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 80009b6: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80009ba: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 80009be: 45a0 cmp r8, r4 80009c0: f040 8085 bne.w 8000ace switch (GPIO_Init->Mode) 80009c4: 684d ldr r5, [r1, #4] 80009c6: 2d12 cmp r5, #18 80009c8: f000 80b7 beq.w 8000b3a 80009cc: f200 808d bhi.w 8000aea 80009d0: 2d02 cmp r5, #2 80009d2: f000 80af beq.w 8000b34 80009d6: f200 8081 bhi.w 8000adc 80009da: 2d00 cmp r5, #0 80009dc: f000 8091 beq.w 8000b02 80009e0: 2d01 cmp r5, #1 80009e2: f000 80a5 beq.w 8000b30 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009e6: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009ea: 2cff cmp r4, #255 ; 0xff 80009ec: bf93 iteet ls 80009ee: 4682 movls sl, r0 80009f0: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 80009f4: 3d08 subhi r5, #8 80009f6: f8d0 b000 ldrls.w fp, [r0] 80009fa: bf92 itee ls 80009fc: 00b5 lslls r5, r6, #2 80009fe: f8d0 b004 ldrhi.w fp, [r0, #4] 8000a02: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000a04: fa09 f805 lsl.w r8, r9, r5 8000a08: ea2b 0808 bic.w r8, fp, r8 8000a0c: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8000a10: bf88 it hi 8000a12: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000a16: ea48 0505 orr.w r5, r8, r5 8000a1a: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8000a1e: f8d1 a004 ldr.w sl, [r1, #4] 8000a22: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8000a26: d052 beq.n 8000ace __HAL_RCC_AFIO_CLK_ENABLE(); 8000a28: 69bd ldr r5, [r7, #24] 8000a2a: f026 0803 bic.w r8, r6, #3 8000a2e: f045 0501 orr.w r5, r5, #1 8000a32: 61bd str r5, [r7, #24] 8000a34: 69bd ldr r5, [r7, #24] 8000a36: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000a3a: f005 0501 and.w r5, r5, #1 8000a3e: 9501 str r5, [sp, #4] 8000a40: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a44: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a48: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a4a: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8000a4e: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a52: fa09 f90b lsl.w r9, r9, fp 8000a56: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000a5a: 4d41 ldr r5, [pc, #260] ; (8000b60 ) 8000a5c: 42a8 cmp r0, r5 8000a5e: d071 beq.n 8000b44 8000a60: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a64: 42a8 cmp r0, r5 8000a66: d06f beq.n 8000b48 8000a68: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a6c: 42a8 cmp r0, r5 8000a6e: d06d beq.n 8000b4c 8000a70: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a74: 42a8 cmp r0, r5 8000a76: d06b beq.n 8000b50 8000a78: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a7c: 42a8 cmp r0, r5 8000a7e: d069 beq.n 8000b54 8000a80: 4570 cmp r0, lr 8000a82: bf0c ite eq 8000a84: 2505 moveq r5, #5 8000a86: 2506 movne r5, #6 8000a88: fa05 f50b lsl.w r5, r5, fp 8000a8c: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 8000a90: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8000a94: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8000a96: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8000a9a: bf14 ite ne 8000a9c: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8000a9e: 43a5 biceq r5, r4 8000aa0: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 8000aa2: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8000aa4: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8000aa8: bf14 ite ne 8000aaa: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8000aac: 43a5 biceq r5, r4 8000aae: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8000ab0: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8000ab2: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000ab6: bf14 ite ne 8000ab8: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8000aba: 43a5 biceq r5, r4 8000abc: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8000abe: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8000ac0: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8000ac4: bf14 ite ne 8000ac6: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8000ac8: ea25 0404 biceq.w r4, r5, r4 8000acc: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8000ace: 3601 adds r6, #1 8000ad0: 2e10 cmp r6, #16 8000ad2: f47f af6d bne.w 80009b0 } } } } } 8000ad6: b003 add sp, #12 8000ad8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8000adc: 2d03 cmp r5, #3 8000ade: d025 beq.n 8000b2c 8000ae0: 2d11 cmp r5, #17 8000ae2: d180 bne.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8000ae4: 68ca ldr r2, [r1, #12] 8000ae6: 3204 adds r2, #4 break; 8000ae8: e77d b.n 80009e6 switch (GPIO_Init->Mode) 8000aea: 4565 cmp r5, ip 8000aec: d009 beq.n 8000b02 8000aee: d812 bhi.n 8000b16 8000af0: f8df 9078 ldr.w r9, [pc, #120] ; 8000b6c 8000af4: 454d cmp r5, r9 8000af6: d004 beq.n 8000b02 8000af8: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000afc: 454d cmp r5, r9 8000afe: f47f af72 bne.w 80009e6 if (GPIO_Init->Pull == GPIO_NOPULL) 8000b02: 688a ldr r2, [r1, #8] 8000b04: b1e2 cbz r2, 8000b40 else if (GPIO_Init->Pull == GPIO_PULLUP) 8000b06: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8000b08: bf0c ite eq 8000b0a: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8000b0e: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8000b12: 2208 movs r2, #8 8000b14: e767 b.n 80009e6 switch (GPIO_Init->Mode) 8000b16: f8df 9058 ldr.w r9, [pc, #88] ; 8000b70 8000b1a: 454d cmp r5, r9 8000b1c: d0f1 beq.n 8000b02 8000b1e: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000b22: 454d cmp r5, r9 8000b24: d0ed beq.n 8000b02 8000b26: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8000b2a: e7e7 b.n 8000afc config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8000b2c: 2200 movs r2, #0 8000b2e: e75a b.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8000b30: 68ca ldr r2, [r1, #12] break; 8000b32: e758 b.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8000b34: 68ca ldr r2, [r1, #12] 8000b36: 3208 adds r2, #8 break; 8000b38: e755 b.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8000b3a: 68ca ldr r2, [r1, #12] 8000b3c: 320c adds r2, #12 break; 8000b3e: e752 b.n 80009e6 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8000b40: 2204 movs r2, #4 8000b42: e750 b.n 80009e6 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000b44: 2500 movs r5, #0 8000b46: e79f b.n 8000a88 8000b48: 2501 movs r5, #1 8000b4a: e79d b.n 8000a88 8000b4c: 2502 movs r5, #2 8000b4e: e79b b.n 8000a88 8000b50: 2503 movs r5, #3 8000b52: e799 b.n 8000a88 8000b54: 2504 movs r5, #4 8000b56: e797 b.n 8000a88 8000b58: 40021000 .word 0x40021000 8000b5c: 40010400 .word 0x40010400 8000b60: 40010800 .word 0x40010800 8000b64: 40011c00 .word 0x40011c00 8000b68: 10210000 .word 0x10210000 8000b6c: 10110000 .word 0x10110000 8000b70: 10310000 .word 0x10310000 08000b74 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8000b74: b10a cbz r2, 8000b7a { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8000b76: 6101 str r1, [r0, #16] 8000b78: 4770 bx lr 8000b7a: 0409 lsls r1, r1, #16 8000b7c: e7fb b.n 8000b76 08000b7e : * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8000b7e: 6802 ldr r2, [r0, #0] 8000b80: 6953 ldr r3, [r2, #20] 8000b82: f413 6380 ands.w r3, r3, #1024 ; 0x400 8000b86: d00d beq.n 8000ba4 { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8000b88: f46f 6380 mvn.w r3, #1024 ; 0x400 8000b8c: 6153 str r3, [r2, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 8000b8e: 2304 movs r3, #4 hi2c->PreviousState = I2C_STATE_NONE; hi2c->State= HAL_I2C_STATE_READY; 8000b90: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_AF; 8000b92: 6403 str r3, [r0, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8000b94: 2300 movs r3, #0 8000b96: 6303 str r3, [r0, #48] ; 0x30 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8000b98: f880 303c strb.w r3, [r0, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000b9c: f880 203d strb.w r2, [r0, #61] ; 0x3d return HAL_ERROR; 8000ba0: 2001 movs r0, #1 8000ba2: 4770 bx lr } return HAL_OK; 8000ba4: 4618 mov r0, r3 } 8000ba6: 4770 bx lr 08000ba8 : { 8000ba8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8000bac: 4604 mov r4, r0 8000bae: 4617 mov r7, r2 8000bb0: 4699 mov r9, r3 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8000bb2: f3c1 4807 ubfx r8, r1, #16, #8 8000bb6: b28e uxth r6, r1 8000bb8: 6825 ldr r5, [r4, #0] 8000bba: f1b8 0f01 cmp.w r8, #1 8000bbe: bf0c ite eq 8000bc0: 696b ldreq r3, [r5, #20] 8000bc2: 69ab ldrne r3, [r5, #24] 8000bc4: ea36 0303 bics.w r3, r6, r3 8000bc8: bf14 ite ne 8000bca: 2001 movne r0, #1 8000bcc: 2000 moveq r0, #0 8000bce: b908 cbnz r0, 8000bd4 } 8000bd0: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8000bd4: 696b ldr r3, [r5, #20] 8000bd6: 055a lsls r2, r3, #21 8000bd8: d512 bpl.n 8000c00 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000bda: 682b ldr r3, [r5, #0] hi2c->State= HAL_I2C_STATE_READY; 8000bdc: 2220 movs r2, #32 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000bde: f443 7300 orr.w r3, r3, #512 ; 0x200 8000be2: 602b str r3, [r5, #0] __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8000be4: f46f 6380 mvn.w r3, #1024 ; 0x400 8000be8: 616b str r3, [r5, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 8000bea: 2304 movs r3, #4 8000bec: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8000bee: 2300 movs r3, #0 return HAL_ERROR; 8000bf0: 2001 movs r0, #1 hi2c->PreviousState = I2C_STATE_NONE; 8000bf2: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8000bf4: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000bf8: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 8000bfc: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 8000c00: 1c7b adds r3, r7, #1 8000c02: d0d9 beq.n 8000bb8 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8000c04: b94f cbnz r7, 8000c1a hi2c->PreviousState = I2C_STATE_NONE; 8000c06: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 8000c08: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 8000c0a: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8000c0c: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000c10: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_TIMEOUT; 8000c14: 2003 movs r0, #3 8000c16: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8000c1a: f7ff fb51 bl 80002c0 8000c1e: eba0 0009 sub.w r0, r0, r9 8000c22: 4287 cmp r7, r0 8000c24: d2c8 bcs.n 8000bb8 8000c26: e7ee b.n 8000c06 08000c28 : { 8000c28: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8000c2c: 4604 mov r4, r0 8000c2e: 4690 mov r8, r2 8000c30: 461f mov r7, r3 8000c32: 9e08 ldr r6, [sp, #32] while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) 8000c34: f3c1 4907 ubfx r9, r1, #16, #8 8000c38: b28d uxth r5, r1 8000c3a: 6823 ldr r3, [r4, #0] 8000c3c: f1b9 0f01 cmp.w r9, #1 8000c40: bf0c ite eq 8000c42: 695b ldreq r3, [r3, #20] 8000c44: 699b ldrne r3, [r3, #24] 8000c46: ea35 0303 bics.w r3, r5, r3 8000c4a: bf0c ite eq 8000c4c: 2301 moveq r3, #1 8000c4e: 2300 movne r3, #0 8000c50: 4543 cmp r3, r8 8000c52: d002 beq.n 8000c5a return HAL_OK; 8000c54: 2000 movs r0, #0 } 8000c56: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 8000c5a: 1c7b adds r3, r7, #1 8000c5c: d0ed beq.n 8000c3a if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8000c5e: b95f cbnz r7, 8000c78 hi2c->PreviousState = I2C_STATE_NONE; 8000c60: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 8000c62: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 8000c64: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8000c66: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000c6a: f884 203d strb.w r2, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8000c6e: 2003 movs r0, #3 hi2c->Mode = HAL_I2C_MODE_NONE; 8000c70: f884 303e strb.w r3, [r4, #62] ; 0x3e 8000c74: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8000c78: f7ff fb22 bl 80002c0 8000c7c: 1b80 subs r0, r0, r6 8000c7e: 4287 cmp r7, r0 8000c80: d2db bcs.n 8000c3a 8000c82: e7ed b.n 8000c60 08000c84 : { 8000c84: b570 push {r4, r5, r6, lr} 8000c86: 4604 mov r4, r0 8000c88: 460d mov r5, r1 8000c8a: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8000c8c: 6823 ldr r3, [r4, #0] 8000c8e: 695b ldr r3, [r3, #20] 8000c90: 061b lsls r3, r3, #24 8000c92: d501 bpl.n 8000c98 return HAL_OK; 8000c94: 2000 movs r0, #0 8000c96: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8000c98: 4620 mov r0, r4 8000c9a: f7ff ff70 bl 8000b7e 8000c9e: b9a8 cbnz r0, 8000ccc if(Timeout != HAL_MAX_DELAY) 8000ca0: 1c6a adds r2, r5, #1 8000ca2: d0f3 beq.n 8000c8c if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000ca4: b965 cbnz r5, 8000cc0 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000ca6: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8000ca8: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000caa: f043 0320 orr.w r3, r3, #32 8000cae: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8000cb0: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 8000cb2: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 8000cb4: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8000cb6: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000cba: f884 203d strb.w r2, [r4, #61] ; 0x3d 8000cbe: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000cc0: f7ff fafe bl 80002c0 8000cc4: 1b80 subs r0, r0, r6 8000cc6: 4285 cmp r5, r0 8000cc8: d2e0 bcs.n 8000c8c 8000cca: e7ec b.n 8000ca6 return HAL_ERROR; 8000ccc: 2001 movs r0, #1 } 8000cce: bd70 pop {r4, r5, r6, pc} 08000cd0 : { 8000cd0: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 8000cd4: 4615 mov r5, r2 hi2c->Instance->CR1 |= I2C_CR1_START; 8000cd6: 6802 ldr r2, [r0, #0] { 8000cd8: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_START; 8000cda: 6813 ldr r3, [r2, #0] { 8000cdc: 9e0b ldr r6, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_START; 8000cde: f443 7380 orr.w r3, r3, #256 ; 0x100 8000ce2: 6013 str r3, [r2, #0] { 8000ce4: 460f mov r7, r1 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000ce6: 9600 str r6, [sp, #0] 8000ce8: 9b0a ldr r3, [sp, #40] ; 0x28 8000cea: 2200 movs r2, #0 8000cec: f04f 1101 mov.w r1, #65537 ; 0x10001 { 8000cf0: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000cf2: f7ff ff99 bl 8000c28 8000cf6: b968 cbnz r0, 8000d14 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8000cf8: 6823 ldr r3, [r4, #0] 8000cfa: f007 07fe and.w r7, r7, #254 ; 0xfe 8000cfe: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8000d00: 9a0a ldr r2, [sp, #40] ; 0x28 8000d02: 4633 mov r3, r6 8000d04: 491a ldr r1, [pc, #104] ; (8000d70 ) 8000d06: 4620 mov r0, r4 8000d08: f7ff ff4e bl 8000ba8 8000d0c: b130 cbz r0, 8000d1c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000d0e: 6c23 ldr r3, [r4, #64] ; 0x40 8000d10: 2b04 cmp r3, #4 8000d12: d018 beq.n 8000d46 return HAL_TIMEOUT; 8000d14: 2003 movs r0, #3 } 8000d16: b004 add sp, #16 8000d18: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000d1c: 6823 ldr r3, [r4, #0] 8000d1e: 9003 str r0, [sp, #12] 8000d20: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000d22: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000d24: 9203 str r2, [sp, #12] 8000d26: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000d28: 4632 mov r2, r6 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000d2a: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000d2c: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000d2e: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000d30: f7ff ffa8 bl 8000c84 8000d34: b148 cbz r0, 8000d4a if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000d36: 6c23 ldr r3, [r4, #64] ; 0x40 8000d38: 2b04 cmp r3, #4 8000d3a: d1eb bne.n 8000d14 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000d3c: 6822 ldr r2, [r4, #0] 8000d3e: 6813 ldr r3, [r2, #0] 8000d40: f443 7300 orr.w r3, r3, #512 ; 0x200 8000d44: 6013 str r3, [r2, #0] return HAL_ERROR; 8000d46: 2001 movs r0, #1 8000d48: e7e5 b.n 8000d16 if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8000d4a: f1b8 0f01 cmp.w r8, #1 8000d4e: 6823 ldr r3, [r4, #0] 8000d50: d102 bne.n 8000d58 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000d52: b2ed uxtb r5, r5 8000d54: 611d str r5, [r3, #16] 8000d56: e7de b.n 8000d16 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8000d58: 0a2a lsrs r2, r5, #8 8000d5a: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000d5c: 990a ldr r1, [sp, #40] ; 0x28 8000d5e: 4632 mov r2, r6 8000d60: 4620 mov r0, r4 8000d62: f7ff ff8f bl 8000c84 8000d66: 2800 cmp r0, #0 8000d68: d1e5 bne.n 8000d36 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000d6a: 6823 ldr r3, [r4, #0] 8000d6c: e7f1 b.n 8000d52 8000d6e: bf00 nop 8000d70: 00010002 .word 0x00010002 08000d74 : { 8000d74: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 8000d78: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8000d7a: 6803 ldr r3, [r0, #0] { 8000d7c: 4616 mov r6, r2 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8000d7e: 681a ldr r2, [r3, #0] { 8000d80: 9d0b ldr r5, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_ACK; 8000d82: f442 6280 orr.w r2, r2, #1024 ; 0x400 8000d86: 601a str r2, [r3, #0] hi2c->Instance->CR1 |= I2C_CR1_START; 8000d88: 681a ldr r2, [r3, #0] { 8000d8a: 460f mov r7, r1 hi2c->Instance->CR1 |= I2C_CR1_START; 8000d8c: f442 7280 orr.w r2, r2, #256 ; 0x100 8000d90: 601a str r2, [r3, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000d92: f04f 1101 mov.w r1, #65537 ; 0x10001 8000d96: 9500 str r5, [sp, #0] 8000d98: 9b0a ldr r3, [sp, #40] ; 0x28 8000d9a: 2200 movs r2, #0 { 8000d9c: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000d9e: f7ff ff43 bl 8000c28 8000da2: b980 cbnz r0, 8000dc6 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8000da4: 6823 ldr r3, [r4, #0] 8000da6: b2ff uxtb r7, r7 8000da8: f007 02fe and.w r2, r7, #254 ; 0xfe 8000dac: 611a str r2, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8000dae: 492d ldr r1, [pc, #180] ; (8000e64 ) 8000db0: 462b mov r3, r5 8000db2: 9a0a ldr r2, [sp, #40] ; 0x28 8000db4: 4620 mov r0, r4 8000db6: f7ff fef7 bl 8000ba8 8000dba: b140 cbz r0, 8000dce if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000dbc: 6c23 ldr r3, [r4, #64] ; 0x40 8000dbe: 2b04 cmp r3, #4 8000dc0: d101 bne.n 8000dc6 return HAL_ERROR; 8000dc2: 2001 movs r0, #1 8000dc4: e000 b.n 8000dc8 return HAL_TIMEOUT; 8000dc6: 2003 movs r0, #3 } 8000dc8: b004 add sp, #16 8000dca: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000dce: 6823 ldr r3, [r4, #0] 8000dd0: 9003 str r0, [sp, #12] 8000dd2: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000dd4: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000dd6: 9203 str r2, [sp, #12] 8000dd8: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000dda: 462a mov r2, r5 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000ddc: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000dde: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000de0: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000de2: f7ff ff4f bl 8000c84 8000de6: b140 cbz r0, 8000dfa if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000de8: 6c23 ldr r3, [r4, #64] ; 0x40 8000dea: 2b04 cmp r3, #4 8000dec: d1eb bne.n 8000dc6 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000dee: 6822 ldr r2, [r4, #0] 8000df0: 6813 ldr r3, [r2, #0] 8000df2: f443 7300 orr.w r3, r3, #512 ; 0x200 8000df6: 6013 str r3, [r2, #0] 8000df8: e7e3 b.n 8000dc2 if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8000dfa: f1b8 0f01 cmp.w r8, #1 8000dfe: 6823 ldr r3, [r4, #0] 8000e00: d124 bne.n 8000e4c hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000e02: b2f6 uxtb r6, r6 8000e04: 611e str r6, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000e06: 462a mov r2, r5 8000e08: 990a ldr r1, [sp, #40] ; 0x28 8000e0a: 4620 mov r0, r4 8000e0c: f7ff ff3a bl 8000c84 8000e10: 4602 mov r2, r0 8000e12: 2800 cmp r0, #0 8000e14: d1e8 bne.n 8000de8 hi2c->Instance->CR1 |= I2C_CR1_START; 8000e16: 6821 ldr r1, [r4, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000e18: 4620 mov r0, r4 hi2c->Instance->CR1 |= I2C_CR1_START; 8000e1a: 680b ldr r3, [r1, #0] 8000e1c: f443 7380 orr.w r3, r3, #256 ; 0x100 8000e20: 600b str r3, [r1, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000e22: 9500 str r5, [sp, #0] 8000e24: 9b0a ldr r3, [sp, #40] ; 0x28 8000e26: f04f 1101 mov.w r1, #65537 ; 0x10001 8000e2a: f7ff fefd bl 8000c28 8000e2e: 2800 cmp r0, #0 8000e30: d1c9 bne.n 8000dc6 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 8000e32: 6823 ldr r3, [r4, #0] 8000e34: f047 0701 orr.w r7, r7, #1 8000e38: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8000e3a: 9a0a ldr r2, [sp, #40] ; 0x28 8000e3c: 462b mov r3, r5 8000e3e: 4909 ldr r1, [pc, #36] ; (8000e64 ) 8000e40: 4620 mov r0, r4 8000e42: f7ff feb1 bl 8000ba8 8000e46: 2800 cmp r0, #0 8000e48: d1b8 bne.n 8000dbc 8000e4a: e7bd b.n 8000dc8 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8000e4c: 0a32 lsrs r2, r6, #8 8000e4e: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000e50: 990a ldr r1, [sp, #40] ; 0x28 8000e52: 462a mov r2, r5 8000e54: 4620 mov r0, r4 8000e56: f7ff ff15 bl 8000c84 8000e5a: 2800 cmp r0, #0 8000e5c: d1c4 bne.n 8000de8 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000e5e: 6823 ldr r3, [r4, #0] 8000e60: e7cf b.n 8000e02 8000e62: bf00 nop 8000e64: 00010002 .word 0x00010002 08000e68 : { 8000e68: b570 push {r4, r5, r6, lr} 8000e6a: 4604 mov r4, r0 8000e6c: 460d mov r5, r1 8000e6e: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 8000e70: 6820 ldr r0, [r4, #0] 8000e72: 6943 ldr r3, [r0, #20] 8000e74: f013 0340 ands.w r3, r3, #64 ; 0x40 8000e78: d001 beq.n 8000e7e return HAL_OK; 8000e7a: 2000 movs r0, #0 } 8000e7c: bd70 pop {r4, r5, r6, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 8000e7e: 6942 ldr r2, [r0, #20] 8000e80: 06d2 lsls r2, r2, #27 8000e82: d50b bpl.n 8000e9c __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8000e84: f06f 0210 mvn.w r2, #16 8000e88: 6142 str r2, [r0, #20] hi2c->State= HAL_I2C_STATE_READY; 8000e8a: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000e8c: 6423 str r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8000e8e: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->PreviousState = I2C_STATE_NONE; 8000e92: 6323 str r3, [r4, #48] ; 0x30 return HAL_ERROR; 8000e94: 2001 movs r0, #1 hi2c->State= HAL_I2C_STATE_READY; 8000e96: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 8000e9a: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000e9c: b95d cbnz r5, 8000eb6 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000e9e: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8000ea0: 2003 movs r0, #3 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000ea2: f043 0320 orr.w r3, r3, #32 8000ea6: 6423 str r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8000ea8: 2320 movs r3, #32 8000eaa: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8000eae: 2300 movs r3, #0 8000eb0: f884 303c strb.w r3, [r4, #60] ; 0x3c 8000eb4: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000eb6: f7ff fa03 bl 80002c0 8000eba: 1b80 subs r0, r0, r6 8000ebc: 4285 cmp r5, r0 8000ebe: d2d7 bcs.n 8000e70 8000ec0: e7ed b.n 8000e9e 08000ec2 : { 8000ec2: b570 push {r4, r5, r6, lr} 8000ec4: 4604 mov r4, r0 8000ec6: 460d mov r5, r1 8000ec8: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8000eca: 6823 ldr r3, [r4, #0] 8000ecc: 695b ldr r3, [r3, #20] 8000ece: 075b lsls r3, r3, #29 8000ed0: d501 bpl.n 8000ed6 return HAL_OK; 8000ed2: 2000 movs r0, #0 8000ed4: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8000ed6: 4620 mov r0, r4 8000ed8: f7ff fe51 bl 8000b7e 8000edc: b9a8 cbnz r0, 8000f0a if(Timeout != HAL_MAX_DELAY) 8000ede: 1c6a adds r2, r5, #1 8000ee0: d0f3 beq.n 8000eca if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000ee2: b965 cbnz r5, 8000efe hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000ee4: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8000ee6: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000ee8: f043 0320 orr.w r3, r3, #32 8000eec: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8000eee: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 8000ef0: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 8000ef2: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8000ef4: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000ef8: f884 203d strb.w r2, [r4, #61] ; 0x3d 8000efc: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000efe: f7ff f9df bl 80002c0 8000f02: 1b80 subs r0, r0, r6 8000f04: 4285 cmp r5, r0 8000f06: d2e0 bcs.n 8000eca 8000f08: e7ec b.n 8000ee4 return HAL_ERROR; 8000f0a: 2001 movs r0, #1 } 8000f0c: bd70 pop {r4, r5, r6, pc} ... 08000f10 : { 8000f10: b538 push {r3, r4, r5, lr} if(hi2c == NULL) 8000f12: 4604 mov r4, r0 8000f14: b908 cbnz r0, 8000f1a return HAL_ERROR; 8000f16: 2001 movs r0, #1 8000f18: bd38 pop {r3, r4, r5, pc} if(hi2c->State == HAL_I2C_STATE_RESET) 8000f1a: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8000f1e: f003 02ff and.w r2, r3, #255 ; 0xff 8000f22: b91b cbnz r3, 8000f2c hi2c->Lock = HAL_UNLOCKED; 8000f24: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_I2C_MspInit(hi2c); 8000f28: f002 f85c bl 8002fe4 hi2c->State = HAL_I2C_STATE_BUSY; 8000f2c: 2324 movs r3, #36 ; 0x24 __HAL_I2C_DISABLE(hi2c); 8000f2e: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 8000f30: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8000f34: 6813 ldr r3, [r2, #0] 8000f36: f023 0301 bic.w r3, r3, #1 8000f3a: 6013 str r3, [r2, #0] pclk1 = HAL_RCC_GetPCLK1Freq(); 8000f3c: f000 fc98 bl 8001870 if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000f40: 6863 ldr r3, [r4, #4] 8000f42: 4a2f ldr r2, [pc, #188] ; (8001000 ) 8000f44: 4293 cmp r3, r2 8000f46: d830 bhi.n 8000faa 8000f48: 4a2e ldr r2, [pc, #184] ; (8001004 ) 8000f4a: 4290 cmp r0, r2 8000f4c: d9e3 bls.n 8000f16 freqrange = I2C_FREQRANGE(pclk1); 8000f4e: 4a2e ldr r2, [pc, #184] ; (8001008 ) hi2c->Instance->CR2 = freqrange; 8000f50: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 8000f52: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8000f56: 604a str r2, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000f58: 3201 adds r2, #1 8000f5a: 620a str r2, [r1, #32] hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000f5c: 4a28 ldr r2, [pc, #160] ; (8001000 ) 8000f5e: 3801 subs r0, #1 8000f60: 4293 cmp r3, r2 8000f62: d832 bhi.n 8000fca 8000f64: 005b lsls r3, r3, #1 8000f66: fbb0 f0f3 udiv r0, r0, r3 8000f6a: 1c43 adds r3, r0, #1 8000f6c: f3c3 030b ubfx r3, r3, #0, #12 8000f70: 2b04 cmp r3, #4 8000f72: bf38 it cc 8000f74: 2304 movcc r3, #4 8000f76: 61cb str r3, [r1, #28] hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000f78: 6a22 ldr r2, [r4, #32] 8000f7a: 69e3 ldr r3, [r4, #28] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000f7c: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000f7e: 4313 orrs r3, r2 8000f80: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 8000f82: 68e2 ldr r2, [r4, #12] 8000f84: 6923 ldr r3, [r4, #16] 8000f86: 4313 orrs r3, r2 8000f88: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8000f8a: 69a2 ldr r2, [r4, #24] 8000f8c: 6963 ldr r3, [r4, #20] 8000f8e: 4313 orrs r3, r2 8000f90: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 8000f92: 680b ldr r3, [r1, #0] 8000f94: f043 0301 orr.w r3, r3, #1 8000f98: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8000f9a: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000f9c: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 8000f9e: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8000fa2: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8000fa4: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8000fa8: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000faa: 4a18 ldr r2, [pc, #96] ; (800100c ) 8000fac: 4290 cmp r0, r2 8000fae: d9b2 bls.n 8000f16 freqrange = I2C_FREQRANGE(pclk1); 8000fb0: 4d15 ldr r5, [pc, #84] ; (8001008 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000fb2: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 8000fb6: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 8000fba: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000fbc: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 8000fbe: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000fc0: f44f 757a mov.w r5, #1000 ; 0x3e8 8000fc4: fbb2 f2f5 udiv r2, r2, r5 8000fc8: e7c6 b.n 8000f58 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000fca: 68a2 ldr r2, [r4, #8] 8000fcc: b952 cbnz r2, 8000fe4 8000fce: eb03 0343 add.w r3, r3, r3, lsl #1 8000fd2: fbb0 f0f3 udiv r0, r0, r3 8000fd6: 1c43 adds r3, r0, #1 8000fd8: f3c3 030b ubfx r3, r3, #0, #12 8000fdc: b16b cbz r3, 8000ffa 8000fde: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8000fe2: e7c8 b.n 8000f76 8000fe4: 2219 movs r2, #25 8000fe6: 4353 muls r3, r2 8000fe8: fbb0 f0f3 udiv r0, r0, r3 8000fec: 1c43 adds r3, r0, #1 8000fee: f3c3 030b ubfx r3, r3, #0, #12 8000ff2: b113 cbz r3, 8000ffa 8000ff4: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8000ff8: e7bd b.n 8000f76 8000ffa: 2301 movs r3, #1 8000ffc: e7bb b.n 8000f76 8000ffe: bf00 nop 8001000: 000186a0 .word 0x000186a0 8001004: 001e847f .word 0x001e847f 8001008: 000f4240 .word 0x000f4240 800100c: 003d08ff .word 0x003d08ff 08001010 : { 8001010: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr} 8001014: 4604 mov r4, r0 8001016: 469a mov sl, r3 8001018: 4688 mov r8, r1 800101a: 4691 mov r9, r2 800101c: 9e0c ldr r6, [sp, #48] ; 0x30 tickstart = HAL_GetTick(); 800101e: f7ff f94f bl 80002c0 if(hi2c->State == HAL_I2C_STATE_READY) 8001022: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8001026: 4605 mov r5, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8001028: 2b20 cmp r3, #32 800102a: d003 beq.n 8001034 return HAL_BUSY; 800102c: 2002 movs r0, #2 } 800102e: b002 add sp, #8 8001030: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8001034: 9000 str r0, [sp, #0] 8001036: 2319 movs r3, #25 8001038: 2201 movs r2, #1 800103a: 493e ldr r1, [pc, #248] ; (8001134 ) 800103c: 4620 mov r0, r4 800103e: f7ff fdf3 bl 8000c28 8001042: 2800 cmp r0, #0 8001044: d1f2 bne.n 800102c __HAL_LOCK(hi2c); 8001046: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 800104a: 2b01 cmp r3, #1 800104c: d0ee beq.n 800102c 800104e: 2301 movs r3, #1 8001050: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8001054: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8001056: 2700 movs r7, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8001058: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800105a: 4641 mov r1, r8 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 800105c: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 800105e: bf58 it pl 8001060: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8001062: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8001064: bf5c itt pl 8001066: f042 0201 orrpl.w r2, r2, #1 800106a: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 800106c: 681a ldr r2, [r3, #0] 800106e: f422 6200 bic.w r2, r2, #2048 ; 0x800 8001072: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 8001074: 2321 movs r3, #33 ; 0x21 8001076: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 800107a: 2340 movs r3, #64 ; 0x40 800107c: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 8001080: 9b0a ldr r3, [sp, #40] ; 0x28 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8001082: 6427 str r7, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 8001084: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 8001086: f8bd 302c ldrh.w r3, [sp, #44] ; 0x2c if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800108a: 9501 str r5, [sp, #4] hi2c->XferCount = Size; 800108c: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 800108e: 4b2a ldr r3, [pc, #168] ; (8001138 ) if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8001090: 9600 str r6, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8001092: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 8001094: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8001096: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 8001098: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800109a: 4653 mov r3, sl 800109c: f7ff fe18 bl 8000cd0 80010a0: 2800 cmp r0, #0 80010a2: d02a beq.n 80010fa if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80010a4: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 80010a6: f884 703c strb.w r7, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80010aa: 2b04 cmp r3, #4 80010ac: d107 bne.n 80010be return HAL_ERROR; 80010ae: 2001 movs r0, #1 80010b0: e7bd b.n 800102e if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80010b2: f7ff fde7 bl 8000c84 80010b6: b120 cbz r0, 80010c2 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80010b8: 6c23 ldr r3, [r4, #64] ; 0x40 80010ba: 2b04 cmp r3, #4 80010bc: d034 beq.n 8001128 return HAL_TIMEOUT; 80010be: 2003 movs r0, #3 80010c0: e7b5 b.n 800102e hi2c->Instance->DR = (*hi2c->pBuffPtr++); 80010c2: 6a61 ldr r1, [r4, #36] ; 0x24 80010c4: 6827 ldr r7, [r4, #0] 80010c6: 1c4b adds r3, r1, #1 80010c8: 6263 str r3, [r4, #36] ; 0x24 80010ca: 780b ldrb r3, [r1, #0] hi2c->XferSize--; 80010cc: 8d22 ldrh r2, [r4, #40] ; 0x28 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 80010ce: 613b str r3, [r7, #16] hi2c->XferCount--; 80010d0: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 80010d2: 1e50 subs r0, r2, #1 hi2c->XferCount--; 80010d4: 3b01 subs r3, #1 80010d6: b29b uxth r3, r3 80010d8: 8563 strh r3, [r4, #42] ; 0x2a if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 80010da: 697b ldr r3, [r7, #20] hi2c->XferSize--; 80010dc: b280 uxth r0, r0 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 80010de: 075b lsls r3, r3, #29 hi2c->XferSize--; 80010e0: 8520 strh r0, [r4, #40] ; 0x28 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 80010e2: d50a bpl.n 80010fa 80010e4: b148 cbz r0, 80010fa hi2c->Instance->DR = (*hi2c->pBuffPtr++); 80010e6: 1c8b adds r3, r1, #2 80010e8: 6263 str r3, [r4, #36] ; 0x24 80010ea: 784b ldrb r3, [r1, #1] hi2c->XferSize--; 80010ec: 3a02 subs r2, #2 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 80010ee: 613b str r3, [r7, #16] hi2c->XferCount--; 80010f0: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 80010f2: 8522 strh r2, [r4, #40] ; 0x28 hi2c->XferCount--; 80010f4: 3b01 subs r3, #1 80010f6: b29b uxth r3, r3 80010f8: 8563 strh r3, [r4, #42] ; 0x2a while(hi2c->XferSize > 0U) 80010fa: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80010fc: 462a mov r2, r5 80010fe: 4631 mov r1, r6 8001100: 4620 mov r0, r4 while(hi2c->XferSize > 0U) 8001102: 2b00 cmp r3, #0 8001104: d1d5 bne.n 80010b2 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8001106: f7ff fedc bl 8000ec2 800110a: 2800 cmp r0, #0 800110c: d1d4 bne.n 80010b8 hi2c->Instance->CR1 |= I2C_CR1_STOP; 800110e: 6822 ldr r2, [r4, #0] 8001110: 6813 ldr r3, [r2, #0] 8001112: f443 7300 orr.w r3, r3, #512 ; 0x200 8001116: 6013 str r3, [r2, #0] hi2c->State = HAL_I2C_STATE_READY; 8001118: 2320 movs r3, #32 __HAL_UNLOCK(hi2c); 800111a: f884 003c strb.w r0, [r4, #60] ; 0x3c hi2c->State = HAL_I2C_STATE_READY; 800111e: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8001122: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8001126: e782 b.n 800102e hi2c->Instance->CR1 |= I2C_CR1_STOP; 8001128: 6822 ldr r2, [r4, #0] 800112a: 6813 ldr r3, [r2, #0] 800112c: f443 7300 orr.w r3, r3, #512 ; 0x200 8001130: 6013 str r3, [r2, #0] 8001132: e7bc b.n 80010ae 8001134: 00100002 .word 0x00100002 8001138: ffff0000 .word 0xffff0000 0800113c : { 800113c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8001140: 4604 mov r4, r0 8001142: b086 sub sp, #24 8001144: 469a mov sl, r3 8001146: 460d mov r5, r1 8001148: 4691 mov r9, r2 800114a: 9f10 ldr r7, [sp, #64] ; 0x40 tickstart = HAL_GetTick(); 800114c: f7ff f8b8 bl 80002c0 if(hi2c->State == HAL_I2C_STATE_READY) 8001150: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8001154: 4606 mov r6, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8001156: 2b20 cmp r3, #32 8001158: d004 beq.n 8001164 return HAL_BUSY; 800115a: 2502 movs r5, #2 } 800115c: 4628 mov r0, r5 800115e: b006 add sp, #24 8001160: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8001164: 9000 str r0, [sp, #0] 8001166: 2319 movs r3, #25 8001168: 2201 movs r2, #1 800116a: 4981 ldr r1, [pc, #516] ; (8001370 ) 800116c: 4620 mov r0, r4 800116e: f7ff fd5b bl 8000c28 8001172: 2800 cmp r0, #0 8001174: d1f1 bne.n 800115a __HAL_LOCK(hi2c); 8001176: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 800117a: 2b01 cmp r3, #1 800117c: d0ed beq.n 800115a 800117e: 2301 movs r3, #1 8001180: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8001184: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8001186: f04f 0800 mov.w r8, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 800118a: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800118c: 4629 mov r1, r5 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 800118e: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 8001190: bf58 it pl 8001192: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8001194: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8001196: bf5c itt pl 8001198: f042 0201 orrpl.w r2, r2, #1 800119c: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 800119e: 681a ldr r2, [r3, #0] 80011a0: f422 6200 bic.w r2, r2, #2048 ; 0x800 80011a4: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 80011a6: 2322 movs r3, #34 ; 0x22 80011a8: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 80011ac: 2340 movs r3, #64 ; 0x40 80011ae: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 80011b2: 9b0e ldr r3, [sp, #56] ; 0x38 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80011b4: f8c4 8040 str.w r8, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 80011b8: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 80011ba: f8bd 303c ldrh.w r3, [sp, #60] ; 0x3c if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80011be: 9601 str r6, [sp, #4] hi2c->XferCount = Size; 80011c0: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80011c2: 4b6c ldr r3, [pc, #432] ; (8001374 ) if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80011c4: 9700 str r7, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80011c6: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 80011c8: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80011ca: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 80011cc: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80011ce: 4653 mov r3, sl 80011d0: f7ff fdd0 bl 8000d74 80011d4: 4605 mov r5, r0 80011d6: b130 cbz r0, 80011e6 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80011d8: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 80011da: f884 803c strb.w r8, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80011de: 2b04 cmp r3, #4 80011e0: d13d bne.n 800125e return HAL_ERROR; 80011e2: 2501 movs r5, #1 80011e4: e7ba b.n 800115c if(hi2c->XferSize == 0U) 80011e6: 8d22 ldrh r2, [r4, #40] ; 0x28 80011e8: 6823 ldr r3, [r4, #0] 80011ea: b992 cbnz r2, 8001212 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80011ec: 9002 str r0, [sp, #8] 80011ee: 695a ldr r2, [r3, #20] 80011f0: 9202 str r2, [sp, #8] 80011f2: 699a ldr r2, [r3, #24] 80011f4: 9202 str r2, [sp, #8] 80011f6: 9a02 ldr r2, [sp, #8] hi2c->Instance->CR1 |= I2C_CR1_STOP; 80011f8: 681a ldr r2, [r3, #0] 80011fa: f442 7200 orr.w r2, r2, #512 ; 0x200 80011fe: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8001200: 2320 movs r3, #32 8001202: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8001206: 2300 movs r3, #0 8001208: f884 303e strb.w r3, [r4, #62] ; 0x3e __HAL_UNLOCK(hi2c); 800120c: f884 303c strb.w r3, [r4, #60] ; 0x3c return HAL_OK; 8001210: e7a4 b.n 800115c else if(hi2c->XferSize == 1U) 8001212: 2a01 cmp r2, #1 8001214: d125 bne.n 8001262 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001216: 681a ldr r2, [r3, #0] 8001218: f422 6280 bic.w r2, r2, #1024 ; 0x400 800121c: 601a str r2, [r3, #0] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800121e: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001220: 6823 ldr r3, [r4, #0] 8001222: 9003 str r0, [sp, #12] 8001224: 695a ldr r2, [r3, #20] 8001226: 9203 str r2, [sp, #12] 8001228: 699a ldr r2, [r3, #24] 800122a: 9203 str r2, [sp, #12] 800122c: 9a03 ldr r2, [sp, #12] hi2c->Instance->CR1 |= I2C_CR1_STOP; 800122e: 681a ldr r2, [r3, #0] 8001230: f442 7200 orr.w r2, r2, #512 ; 0x200 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001234: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 8001236: b662 cpsie i if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8001238: f8df 813c ldr.w r8, [pc, #316] ; 8001378 while(hi2c->XferSize > 0U) 800123c: 8d23 ldrh r3, [r4, #40] ; 0x28 800123e: 2b00 cmp r3, #0 8001240: d0de beq.n 8001200 if(hi2c->XferSize <= 3U) 8001242: 2b03 cmp r3, #3 8001244: d877 bhi.n 8001336 if(hi2c->XferSize== 1U) 8001246: 2b01 cmp r3, #1 8001248: d127 bne.n 800129a if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 800124a: 4632 mov r2, r6 800124c: 4639 mov r1, r7 800124e: 4620 mov r0, r4 8001250: f7ff fe0a bl 8000e68 8001254: 2800 cmp r0, #0 8001256: d03f beq.n 80012d8 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 8001258: 6c23 ldr r3, [r4, #64] ; 0x40 800125a: 2b20 cmp r3, #32 800125c: d1c1 bne.n 80011e2 return HAL_TIMEOUT; 800125e: 2503 movs r5, #3 8001260: e77c b.n 800115c else if(hi2c->XferSize == 2U) 8001262: 2a02 cmp r2, #2 hi2c->Instance->CR1 |= I2C_CR1_POS; 8001264: 681a ldr r2, [r3, #0] else if(hi2c->XferSize == 2U) 8001266: d10e bne.n 8001286 hi2c->Instance->CR1 |= I2C_CR1_POS; 8001268: f442 6200 orr.w r2, r2, #2048 ; 0x800 800126c: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 800126e: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001270: 6823 ldr r3, [r4, #0] 8001272: 9004 str r0, [sp, #16] 8001274: 695a ldr r2, [r3, #20] 8001276: 9204 str r2, [sp, #16] 8001278: 699a ldr r2, [r3, #24] 800127a: 9204 str r2, [sp, #16] 800127c: 9a04 ldr r2, [sp, #16] hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 800127e: 681a ldr r2, [r3, #0] 8001280: f422 6280 bic.w r2, r2, #1024 ; 0x400 8001284: e7d6 b.n 8001234 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8001286: f442 6280 orr.w r2, r2, #1024 ; 0x400 800128a: 601a str r2, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 800128c: 9005 str r0, [sp, #20] 800128e: 695a ldr r2, [r3, #20] 8001290: 9205 str r2, [sp, #20] 8001292: 699b ldr r3, [r3, #24] 8001294: 9305 str r3, [sp, #20] 8001296: 9b05 ldr r3, [sp, #20] 8001298: e7ce b.n 8001238 else if(hi2c->XferSize == 2U) 800129a: 2b02 cmp r3, #2 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 800129c: 9600 str r6, [sp, #0] 800129e: 463b mov r3, r7 80012a0: f04f 0200 mov.w r2, #0 80012a4: 4641 mov r1, r8 80012a6: 4620 mov r0, r4 else if(hi2c->XferSize == 2U) 80012a8: d124 bne.n 80012f4 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80012aa: f7ff fcbd bl 8000c28 80012ae: 2800 cmp r0, #0 80012b0: d1d5 bne.n 800125e 80012b2: b672 cpsid i hi2c->Instance->CR1 |= I2C_CR1_STOP; 80012b4: 6823 ldr r3, [r4, #0] 80012b6: 681a ldr r2, [r3, #0] 80012b8: f442 7200 orr.w r2, r2, #512 ; 0x200 80012bc: 601a str r2, [r3, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80012be: 6a62 ldr r2, [r4, #36] ; 0x24 80012c0: 691b ldr r3, [r3, #16] 80012c2: 1c51 adds r1, r2, #1 80012c4: 6261 str r1, [r4, #36] ; 0x24 80012c6: 7013 strb r3, [r2, #0] hi2c->XferSize--; 80012c8: 8d23 ldrh r3, [r4, #40] ; 0x28 80012ca: 3b01 subs r3, #1 80012cc: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 80012ce: 8d63 ldrh r3, [r4, #42] ; 0x2a 80012d0: 3b01 subs r3, #1 80012d2: b29b uxth r3, r3 80012d4: 8563 strh r3, [r4, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 80012d6: b662 cpsie i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80012d8: 6a63 ldr r3, [r4, #36] ; 0x24 80012da: 1c5a adds r2, r3, #1 80012dc: 6262 str r2, [r4, #36] ; 0x24 80012de: 6822 ldr r2, [r4, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80012e0: 6912 ldr r2, [r2, #16] 80012e2: 701a strb r2, [r3, #0] hi2c->XferSize--; 80012e4: 8d23 ldrh r3, [r4, #40] ; 0x28 80012e6: 3b01 subs r3, #1 80012e8: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 80012ea: 8d63 ldrh r3, [r4, #42] ; 0x2a 80012ec: 3b01 subs r3, #1 80012ee: b29b uxth r3, r3 80012f0: 8563 strh r3, [r4, #42] ; 0x2a 80012f2: e7a3 b.n 800123c if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80012f4: f7ff fc98 bl 8000c28 80012f8: 4602 mov r2, r0 80012fa: 2800 cmp r0, #0 80012fc: d1af bne.n 800125e hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 80012fe: 6821 ldr r1, [r4, #0] 8001300: 680b ldr r3, [r1, #0] 8001302: f423 6380 bic.w r3, r3, #1024 ; 0x400 8001306: 600b str r3, [r1, #0] __ASM volatile ("cpsid i" : : : "memory"); 8001308: b672 cpsid i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 800130a: 6a63 ldr r3, [r4, #36] ; 0x24 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 800130c: 4620 mov r0, r4 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 800130e: 1c59 adds r1, r3, #1 8001310: 6261 str r1, [r4, #36] ; 0x24 8001312: 6821 ldr r1, [r4, #0] 8001314: 6909 ldr r1, [r1, #16] 8001316: 7019 strb r1, [r3, #0] hi2c->XferSize--; 8001318: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 800131a: 9600 str r6, [sp, #0] hi2c->XferSize--; 800131c: 3b01 subs r3, #1 800131e: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8001320: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8001322: 4641 mov r1, r8 hi2c->XferCount--; 8001324: 3b01 subs r3, #1 8001326: b29b uxth r3, r3 8001328: 8563 strh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 800132a: 463b mov r3, r7 800132c: f7ff fc7c bl 8000c28 8001330: 2800 cmp r0, #0 8001332: d0bf beq.n 80012b4 8001334: e793 b.n 800125e if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8001336: 4632 mov r2, r6 8001338: 4639 mov r1, r7 800133a: 4620 mov r0, r4 800133c: f7ff fd94 bl 8000e68 8001340: 2800 cmp r0, #0 8001342: d189 bne.n 8001258 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001344: 6a63 ldr r3, [r4, #36] ; 0x24 8001346: 1c5a adds r2, r3, #1 8001348: 6262 str r2, [r4, #36] ; 0x24 800134a: 6822 ldr r2, [r4, #0] 800134c: 6912 ldr r2, [r2, #16] 800134e: 701a strb r2, [r3, #0] hi2c->XferSize--; 8001350: 8d23 ldrh r3, [r4, #40] ; 0x28 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 8001352: 6822 ldr r2, [r4, #0] hi2c->XferSize--; 8001354: 3b01 subs r3, #1 8001356: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8001358: 8d63 ldrh r3, [r4, #42] ; 0x2a 800135a: 3b01 subs r3, #1 800135c: b29b uxth r3, r3 800135e: 8563 strh r3, [r4, #42] ; 0x2a if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 8001360: 6953 ldr r3, [r2, #20] 8001362: 075b lsls r3, r3, #29 8001364: f57f af6a bpl.w 800123c (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001368: 6a63 ldr r3, [r4, #36] ; 0x24 800136a: 1c59 adds r1, r3, #1 800136c: 6261 str r1, [r4, #36] ; 0x24 800136e: e7b7 b.n 80012e0 8001370: 00100002 .word 0x00100002 8001374: ffff0000 .word 0xffff0000 8001378: 00010004 .word 0x00010004 0800137c : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800137c: 6803 ldr r3, [r0, #0] { 800137e: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8001382: 07db lsls r3, r3, #31 { 8001384: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8001386: d410 bmi.n 80013aa } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8001388: 682b ldr r3, [r5, #0] 800138a: 079f lsls r7, r3, #30 800138c: d45e bmi.n 800144c } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800138e: 682b ldr r3, [r5, #0] 8001390: 0719 lsls r1, r3, #28 8001392: f100 8095 bmi.w 80014c0 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8001396: 682b ldr r3, [r5, #0] 8001398: 075a lsls r2, r3, #29 800139a: f100 80bf bmi.w 800151c #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 800139e: 69ea ldr r2, [r5, #28] 80013a0: 2a00 cmp r2, #0 80013a2: f040 812d bne.w 8001600 { return HAL_ERROR; } } return HAL_OK; 80013a6: 2000 movs r0, #0 80013a8: e014 b.n 80013d4 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 80013aa: 4c90 ldr r4, [pc, #576] ; (80015ec ) 80013ac: 6863 ldr r3, [r4, #4] 80013ae: f003 030c and.w r3, r3, #12 80013b2: 2b04 cmp r3, #4 80013b4: d007 beq.n 80013c6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 80013b6: 6863 ldr r3, [r4, #4] 80013b8: f003 030c and.w r3, r3, #12 80013bc: 2b08 cmp r3, #8 80013be: d10c bne.n 80013da 80013c0: 6863 ldr r3, [r4, #4] 80013c2: 03de lsls r6, r3, #15 80013c4: d509 bpl.n 80013da if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80013c6: 6823 ldr r3, [r4, #0] 80013c8: 039c lsls r4, r3, #14 80013ca: d5dd bpl.n 8001388 80013cc: 686b ldr r3, [r5, #4] 80013ce: 2b00 cmp r3, #0 80013d0: d1da bne.n 8001388 return HAL_ERROR; 80013d2: 2001 movs r0, #1 } 80013d4: b002 add sp, #8 80013d6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80013da: 686b ldr r3, [r5, #4] 80013dc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80013e0: d110 bne.n 8001404 80013e2: 6823 ldr r3, [r4, #0] 80013e4: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80013e8: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 80013ea: f7fe ff69 bl 80002c0 80013ee: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80013f0: 6823 ldr r3, [r4, #0] 80013f2: 0398 lsls r0, r3, #14 80013f4: d4c8 bmi.n 8001388 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80013f6: f7fe ff63 bl 80002c0 80013fa: 1b80 subs r0, r0, r6 80013fc: 2864 cmp r0, #100 ; 0x64 80013fe: d9f7 bls.n 80013f0 return HAL_TIMEOUT; 8001400: 2003 movs r0, #3 8001402: e7e7 b.n 80013d4 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8001404: b99b cbnz r3, 800142e 8001406: 6823 ldr r3, [r4, #0] 8001408: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800140c: 6023 str r3, [r4, #0] 800140e: 6823 ldr r3, [r4, #0] 8001410: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8001414: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8001416: f7fe ff53 bl 80002c0 800141a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800141c: 6823 ldr r3, [r4, #0] 800141e: 0399 lsls r1, r3, #14 8001420: d5b2 bpl.n 8001388 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8001422: f7fe ff4d bl 80002c0 8001426: 1b80 subs r0, r0, r6 8001428: 2864 cmp r0, #100 ; 0x64 800142a: d9f7 bls.n 800141c 800142c: e7e8 b.n 8001400 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800142e: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8001432: 6823 ldr r3, [r4, #0] 8001434: d103 bne.n 800143e 8001436: f443 2380 orr.w r3, r3, #262144 ; 0x40000 800143a: 6023 str r3, [r4, #0] 800143c: e7d1 b.n 80013e2 800143e: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8001442: 6023 str r3, [r4, #0] 8001444: 6823 ldr r3, [r4, #0] 8001446: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800144a: e7cd b.n 80013e8 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 800144c: 4c67 ldr r4, [pc, #412] ; (80015ec ) 800144e: 6863 ldr r3, [r4, #4] 8001450: f013 0f0c tst.w r3, #12 8001454: d007 beq.n 8001466 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8001456: 6863 ldr r3, [r4, #4] 8001458: f003 030c and.w r3, r3, #12 800145c: 2b08 cmp r3, #8 800145e: d110 bne.n 8001482 8001460: 6863 ldr r3, [r4, #4] 8001462: 03da lsls r2, r3, #15 8001464: d40d bmi.n 8001482 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8001466: 6823 ldr r3, [r4, #0] 8001468: 079b lsls r3, r3, #30 800146a: d502 bpl.n 8001472 800146c: 692b ldr r3, [r5, #16] 800146e: 2b01 cmp r3, #1 8001470: d1af bne.n 80013d2 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8001472: 6823 ldr r3, [r4, #0] 8001474: 696a ldr r2, [r5, #20] 8001476: f023 03f8 bic.w r3, r3, #248 ; 0xf8 800147a: ea43 03c2 orr.w r3, r3, r2, lsl #3 800147e: 6023 str r3, [r4, #0] 8001480: e785 b.n 800138e if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8001482: 692a ldr r2, [r5, #16] 8001484: 4b5a ldr r3, [pc, #360] ; (80015f0 ) 8001486: b16a cbz r2, 80014a4 __HAL_RCC_HSI_ENABLE(); 8001488: 2201 movs r2, #1 800148a: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 800148c: f7fe ff18 bl 80002c0 8001490: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8001492: 6823 ldr r3, [r4, #0] 8001494: 079f lsls r7, r3, #30 8001496: d4ec bmi.n 8001472 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8001498: f7fe ff12 bl 80002c0 800149c: 1b80 subs r0, r0, r6 800149e: 2802 cmp r0, #2 80014a0: d9f7 bls.n 8001492 80014a2: e7ad b.n 8001400 __HAL_RCC_HSI_DISABLE(); 80014a4: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80014a6: f7fe ff0b bl 80002c0 80014aa: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80014ac: 6823 ldr r3, [r4, #0] 80014ae: 0798 lsls r0, r3, #30 80014b0: f57f af6d bpl.w 800138e if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80014b4: f7fe ff04 bl 80002c0 80014b8: 1b80 subs r0, r0, r6 80014ba: 2802 cmp r0, #2 80014bc: d9f6 bls.n 80014ac 80014be: e79f b.n 8001400 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 80014c0: 69aa ldr r2, [r5, #24] 80014c2: 4c4a ldr r4, [pc, #296] ; (80015ec ) 80014c4: 4b4b ldr r3, [pc, #300] ; (80015f4 ) 80014c6: b1da cbz r2, 8001500 __HAL_RCC_LSI_ENABLE(); 80014c8: 2201 movs r2, #1 80014ca: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80014cc: f7fe fef8 bl 80002c0 80014d0: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80014d2: 6a63 ldr r3, [r4, #36] ; 0x24 80014d4: 079b lsls r3, r3, #30 80014d6: d50d bpl.n 80014f4 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80014d8: f44f 52fa mov.w r2, #8000 ; 0x1f40 80014dc: 4b46 ldr r3, [pc, #280] ; (80015f8 ) 80014de: 681b ldr r3, [r3, #0] 80014e0: fbb3 f3f2 udiv r3, r3, r2 80014e4: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 80014e6: bf00 nop do { __NOP(); } while (Delay --); 80014e8: 9b01 ldr r3, [sp, #4] 80014ea: 1e5a subs r2, r3, #1 80014ec: 9201 str r2, [sp, #4] 80014ee: 2b00 cmp r3, #0 80014f0: d1f9 bne.n 80014e6 80014f2: e750 b.n 8001396 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 80014f4: f7fe fee4 bl 80002c0 80014f8: 1b80 subs r0, r0, r6 80014fa: 2802 cmp r0, #2 80014fc: d9e9 bls.n 80014d2 80014fe: e77f b.n 8001400 __HAL_RCC_LSI_DISABLE(); 8001500: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8001502: f7fe fedd bl 80002c0 8001506: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8001508: 6a63 ldr r3, [r4, #36] ; 0x24 800150a: 079f lsls r7, r3, #30 800150c: f57f af43 bpl.w 8001396 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8001510: f7fe fed6 bl 80002c0 8001514: 1b80 subs r0, r0, r6 8001516: 2802 cmp r0, #2 8001518: d9f6 bls.n 8001508 800151a: e771 b.n 8001400 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 800151c: 4c33 ldr r4, [pc, #204] ; (80015ec ) 800151e: 69e3 ldr r3, [r4, #28] 8001520: 00d8 lsls r0, r3, #3 8001522: d424 bmi.n 800156e pwrclkchanged = SET; 8001524: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8001526: 69e3 ldr r3, [r4, #28] 8001528: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 800152c: 61e3 str r3, [r4, #28] 800152e: 69e3 ldr r3, [r4, #28] 8001530: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001534: 9300 str r3, [sp, #0] 8001536: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8001538: 4e30 ldr r6, [pc, #192] ; (80015fc ) 800153a: 6833 ldr r3, [r6, #0] 800153c: 05d9 lsls r1, r3, #23 800153e: d518 bpl.n 8001572 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001540: 68eb ldr r3, [r5, #12] 8001542: 2b01 cmp r3, #1 8001544: d126 bne.n 8001594 8001546: 6a23 ldr r3, [r4, #32] 8001548: f043 0301 orr.w r3, r3, #1 800154c: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 800154e: f7fe feb7 bl 80002c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001552: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8001556: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8001558: 6a23 ldr r3, [r4, #32] 800155a: 079b lsls r3, r3, #30 800155c: d53f bpl.n 80015de if(pwrclkchanged == SET) 800155e: 2f00 cmp r7, #0 8001560: f43f af1d beq.w 800139e __HAL_RCC_PWR_CLK_DISABLE(); 8001564: 69e3 ldr r3, [r4, #28] 8001566: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 800156a: 61e3 str r3, [r4, #28] 800156c: e717 b.n 800139e FlagStatus pwrclkchanged = RESET; 800156e: 2700 movs r7, #0 8001570: e7e2 b.n 8001538 SET_BIT(PWR->CR, PWR_CR_DBP); 8001572: 6833 ldr r3, [r6, #0] 8001574: f443 7380 orr.w r3, r3, #256 ; 0x100 8001578: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 800157a: f7fe fea1 bl 80002c0 800157e: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8001580: 6833 ldr r3, [r6, #0] 8001582: 05da lsls r2, r3, #23 8001584: d4dc bmi.n 8001540 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8001586: f7fe fe9b bl 80002c0 800158a: eba0 0008 sub.w r0, r0, r8 800158e: 2864 cmp r0, #100 ; 0x64 8001590: d9f6 bls.n 8001580 8001592: e735 b.n 8001400 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001594: b9ab cbnz r3, 80015c2 8001596: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001598: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 800159c: f023 0301 bic.w r3, r3, #1 80015a0: 6223 str r3, [r4, #32] 80015a2: 6a23 ldr r3, [r4, #32] 80015a4: f023 0304 bic.w r3, r3, #4 80015a8: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 80015aa: f7fe fe89 bl 80002c0 80015ae: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80015b0: 6a23 ldr r3, [r4, #32] 80015b2: 0798 lsls r0, r3, #30 80015b4: d5d3 bpl.n 800155e if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80015b6: f7fe fe83 bl 80002c0 80015ba: 1b80 subs r0, r0, r6 80015bc: 4540 cmp r0, r8 80015be: d9f7 bls.n 80015b0 80015c0: e71e b.n 8001400 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80015c2: 2b05 cmp r3, #5 80015c4: 6a23 ldr r3, [r4, #32] 80015c6: d103 bne.n 80015d0 80015c8: f043 0304 orr.w r3, r3, #4 80015cc: 6223 str r3, [r4, #32] 80015ce: e7ba b.n 8001546 80015d0: f023 0301 bic.w r3, r3, #1 80015d4: 6223 str r3, [r4, #32] 80015d6: 6a23 ldr r3, [r4, #32] 80015d8: f023 0304 bic.w r3, r3, #4 80015dc: e7b6 b.n 800154c if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80015de: f7fe fe6f bl 80002c0 80015e2: eba0 0008 sub.w r0, r0, r8 80015e6: 42b0 cmp r0, r6 80015e8: d9b6 bls.n 8001558 80015ea: e709 b.n 8001400 80015ec: 40021000 .word 0x40021000 80015f0: 42420000 .word 0x42420000 80015f4: 42420480 .word 0x42420480 80015f8: 20000214 .word 0x20000214 80015fc: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8001600: 4c22 ldr r4, [pc, #136] ; (800168c ) 8001602: 6863 ldr r3, [r4, #4] 8001604: f003 030c and.w r3, r3, #12 8001608: 2b08 cmp r3, #8 800160a: f43f aee2 beq.w 80013d2 800160e: 2300 movs r3, #0 8001610: 4e1f ldr r6, [pc, #124] ; (8001690 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8001612: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8001614: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8001616: d12b bne.n 8001670 tickstart = HAL_GetTick(); 8001618: f7fe fe52 bl 80002c0 800161c: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800161e: 6823 ldr r3, [r4, #0] 8001620: 0199 lsls r1, r3, #6 8001622: d41f bmi.n 8001664 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8001624: 6a2b ldr r3, [r5, #32] 8001626: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 800162a: d105 bne.n 8001638 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 800162c: 6862 ldr r2, [r4, #4] 800162e: 68a9 ldr r1, [r5, #8] 8001630: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8001634: 430a orrs r2, r1 8001636: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8001638: 6a69 ldr r1, [r5, #36] ; 0x24 800163a: 6862 ldr r2, [r4, #4] 800163c: 430b orrs r3, r1 800163e: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8001642: 4313 orrs r3, r2 8001644: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8001646: 2301 movs r3, #1 8001648: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 800164a: f7fe fe39 bl 80002c0 800164e: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001650: 6823 ldr r3, [r4, #0] 8001652: 019a lsls r2, r3, #6 8001654: f53f aea7 bmi.w 80013a6 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8001658: f7fe fe32 bl 80002c0 800165c: 1b40 subs r0, r0, r5 800165e: 2802 cmp r0, #2 8001660: d9f6 bls.n 8001650 8001662: e6cd b.n 8001400 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8001664: f7fe fe2c bl 80002c0 8001668: 1bc0 subs r0, r0, r7 800166a: 2802 cmp r0, #2 800166c: d9d7 bls.n 800161e 800166e: e6c7 b.n 8001400 tickstart = HAL_GetTick(); 8001670: f7fe fe26 bl 80002c0 8001674: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8001676: 6823 ldr r3, [r4, #0] 8001678: 019b lsls r3, r3, #6 800167a: f57f ae94 bpl.w 80013a6 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 800167e: f7fe fe1f bl 80002c0 8001682: 1b40 subs r0, r0, r5 8001684: 2802 cmp r0, #2 8001686: d9f6 bls.n 8001676 8001688: e6ba b.n 8001400 800168a: bf00 nop 800168c: 40021000 .word 0x40021000 8001690: 42420060 .word 0x42420060 08001694 : { 8001694: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8001696: 4b19 ldr r3, [pc, #100] ; (80016fc ) { 8001698: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 800169a: ac02 add r4, sp, #8 800169c: f103 0510 add.w r5, r3, #16 80016a0: 4622 mov r2, r4 80016a2: 6818 ldr r0, [r3, #0] 80016a4: 6859 ldr r1, [r3, #4] 80016a6: 3308 adds r3, #8 80016a8: c203 stmia r2!, {r0, r1} 80016aa: 42ab cmp r3, r5 80016ac: 4614 mov r4, r2 80016ae: d1f7 bne.n 80016a0 const uint8_t aPredivFactorTable[2] = {1, 2}; 80016b0: 2301 movs r3, #1 80016b2: f88d 3004 strb.w r3, [sp, #4] 80016b6: 2302 movs r3, #2 tmpreg = RCC->CFGR; 80016b8: 4911 ldr r1, [pc, #68] ; (8001700 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 80016ba: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 80016be: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 80016c0: f003 020c and.w r2, r3, #12 80016c4: 2a08 cmp r2, #8 80016c6: d117 bne.n 80016f8 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80016c8: f3c3 4283 ubfx r2, r3, #18, #4 80016cc: a806 add r0, sp, #24 80016ce: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80016d0: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80016d2: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80016d6: d50c bpl.n 80016f2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80016d8: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80016da: 480a ldr r0, [pc, #40] ; (8001704 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80016dc: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80016e0: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80016e2: aa06 add r2, sp, #24 80016e4: 4413 add r3, r2 80016e6: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80016ea: fbb0 f0f3 udiv r0, r0, r3 } 80016ee: b007 add sp, #28 80016f0: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 80016f2: 4805 ldr r0, [pc, #20] ; (8001708 ) 80016f4: 4350 muls r0, r2 80016f6: e7fa b.n 80016ee sysclockfreq = HSE_VALUE; 80016f8: 4802 ldr r0, [pc, #8] ; (8001704 ) return sysclockfreq; 80016fa: e7f8 b.n 80016ee 80016fc: 080045e0 .word 0x080045e0 8001700: 40021000 .word 0x40021000 8001704: 007a1200 .word 0x007a1200 8001708: 003d0900 .word 0x003d0900 0800170c : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800170c: 4a54 ldr r2, [pc, #336] ; (8001860 ) { 800170e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8001712: 6813 ldr r3, [r2, #0] { 8001714: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8001716: f003 0307 and.w r3, r3, #7 800171a: 428b cmp r3, r1 { 800171c: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 800171e: d32a bcc.n 8001776 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8001720: 6829 ldr r1, [r5, #0] 8001722: 078c lsls r4, r1, #30 8001724: d434 bmi.n 8001790 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8001726: 07ca lsls r2, r1, #31 8001728: d447 bmi.n 80017ba if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 800172a: 4a4d ldr r2, [pc, #308] ; (8001860 ) 800172c: 6813 ldr r3, [r2, #0] 800172e: f003 0307 and.w r3, r3, #7 8001732: 429e cmp r6, r3 8001734: f0c0 8082 bcc.w 800183c if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8001738: 682a ldr r2, [r5, #0] 800173a: 4c4a ldr r4, [pc, #296] ; (8001864 ) 800173c: f012 0f04 tst.w r2, #4 8001740: f040 8087 bne.w 8001852 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8001744: 0713 lsls r3, r2, #28 8001746: d506 bpl.n 8001756 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8001748: 6863 ldr r3, [r4, #4] 800174a: 692a ldr r2, [r5, #16] 800174c: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8001750: ea43 03c2 orr.w r3, r3, r2, lsl #3 8001754: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8001756: f7ff ff9d bl 8001694 800175a: 6863 ldr r3, [r4, #4] 800175c: 4a42 ldr r2, [pc, #264] ; (8001868 ) 800175e: f3c3 1303 ubfx r3, r3, #4, #4 8001762: 5cd3 ldrb r3, [r2, r3] 8001764: 40d8 lsrs r0, r3 8001766: 4b41 ldr r3, [pc, #260] ; (800186c ) 8001768: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 800176a: 2000 movs r0, #0 800176c: f7fe fd66 bl 800023c return HAL_OK; 8001770: 2000 movs r0, #0 } 8001772: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8001776: 6813 ldr r3, [r2, #0] 8001778: f023 0307 bic.w r3, r3, #7 800177c: 430b orrs r3, r1 800177e: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8001780: 6813 ldr r3, [r2, #0] 8001782: f003 0307 and.w r3, r3, #7 8001786: 4299 cmp r1, r3 8001788: d0ca beq.n 8001720 return HAL_ERROR; 800178a: 2001 movs r0, #1 800178c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8001790: 4b34 ldr r3, [pc, #208] ; (8001864 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8001792: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8001796: bf1e ittt ne 8001798: 685a ldrne r2, [r3, #4] 800179a: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 800179e: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80017a0: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80017a2: bf42 ittt mi 80017a4: 685a ldrmi r2, [r3, #4] 80017a6: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 80017aa: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80017ac: 685a ldr r2, [r3, #4] 80017ae: 68a8 ldr r0, [r5, #8] 80017b0: f022 02f0 bic.w r2, r2, #240 ; 0xf0 80017b4: 4302 orrs r2, r0 80017b6: 605a str r2, [r3, #4] 80017b8: e7b5 b.n 8001726 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80017ba: 686a ldr r2, [r5, #4] 80017bc: 4c29 ldr r4, [pc, #164] ; (8001864 ) 80017be: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80017c0: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80017c2: d11c bne.n 80017fe if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80017c4: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80017c8: d0df beq.n 800178a __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80017ca: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80017cc: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80017d0: f023 0303 bic.w r3, r3, #3 80017d4: 4313 orrs r3, r2 80017d6: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 80017d8: f7fe fd72 bl 80002c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80017dc: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 80017de: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80017e0: 2b01 cmp r3, #1 80017e2: d114 bne.n 800180e while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 80017e4: 6863 ldr r3, [r4, #4] 80017e6: f003 030c and.w r3, r3, #12 80017ea: 2b04 cmp r3, #4 80017ec: d09d beq.n 800172a if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80017ee: f7fe fd67 bl 80002c0 80017f2: 1bc0 subs r0, r0, r7 80017f4: 4540 cmp r0, r8 80017f6: d9f5 bls.n 80017e4 return HAL_TIMEOUT; 80017f8: 2003 movs r0, #3 80017fa: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80017fe: 2a02 cmp r2, #2 8001800: d102 bne.n 8001808 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001802: f013 7f00 tst.w r3, #33554432 ; 0x2000000 8001806: e7df b.n 80017c8 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8001808: f013 0f02 tst.w r3, #2 800180c: e7dc b.n 80017c8 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 800180e: 2b02 cmp r3, #2 8001810: d10f bne.n 8001832 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8001812: 6863 ldr r3, [r4, #4] 8001814: f003 030c and.w r3, r3, #12 8001818: 2b08 cmp r3, #8 800181a: d086 beq.n 800172a if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 800181c: f7fe fd50 bl 80002c0 8001820: 1bc0 subs r0, r0, r7 8001822: 4540 cmp r0, r8 8001824: d9f5 bls.n 8001812 8001826: e7e7 b.n 80017f8 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001828: f7fe fd4a bl 80002c0 800182c: 1bc0 subs r0, r0, r7 800182e: 4540 cmp r0, r8 8001830: d8e2 bhi.n 80017f8 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8001832: 6863 ldr r3, [r4, #4] 8001834: f013 0f0c tst.w r3, #12 8001838: d1f6 bne.n 8001828 800183a: e776 b.n 800172a __HAL_FLASH_SET_LATENCY(FLatency); 800183c: 6813 ldr r3, [r2, #0] 800183e: f023 0307 bic.w r3, r3, #7 8001842: 4333 orrs r3, r6 8001844: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8001846: 6813 ldr r3, [r2, #0] 8001848: f003 0307 and.w r3, r3, #7 800184c: 429e cmp r6, r3 800184e: d19c bne.n 800178a 8001850: e772 b.n 8001738 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8001852: 6863 ldr r3, [r4, #4] 8001854: 68e9 ldr r1, [r5, #12] 8001856: f423 63e0 bic.w r3, r3, #1792 ; 0x700 800185a: 430b orrs r3, r1 800185c: 6063 str r3, [r4, #4] 800185e: e771 b.n 8001744 8001860: 40022000 .word 0x40022000 8001864: 40021000 .word 0x40021000 8001868: 08004d35 .word 0x08004d35 800186c: 20000214 .word 0x20000214 08001870 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8001870: 4b04 ldr r3, [pc, #16] ; (8001884 ) 8001872: 4a05 ldr r2, [pc, #20] ; (8001888 ) 8001874: 685b ldr r3, [r3, #4] 8001876: f3c3 2302 ubfx r3, r3, #8, #3 800187a: 5cd3 ldrb r3, [r2, r3] 800187c: 4a03 ldr r2, [pc, #12] ; (800188c ) 800187e: 6810 ldr r0, [r2, #0] } 8001880: 40d8 lsrs r0, r3 8001882: 4770 bx lr 8001884: 40021000 .word 0x40021000 8001888: 08004d45 .word 0x08004d45 800188c: 20000214 .word 0x20000214 08001890 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8001890: 4b04 ldr r3, [pc, #16] ; (80018a4 ) 8001892: 4a05 ldr r2, [pc, #20] ; (80018a8 ) 8001894: 685b ldr r3, [r3, #4] 8001896: f3c3 23c2 ubfx r3, r3, #11, #3 800189a: 5cd3 ldrb r3, [r2, r3] 800189c: 4a03 ldr r2, [pc, #12] ; (80018ac ) 800189e: 6810 ldr r0, [r2, #0] } 80018a0: 40d8 lsrs r0, r3 80018a2: 4770 bx lr 80018a4: 40021000 .word 0x40021000 80018a8: 08004d45 .word 0x08004d45 80018ac: 20000214 .word 0x20000214 080018b0 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80018b0: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 80018b2: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80018b4: 68da ldr r2, [r3, #12] 80018b6: f042 0201 orr.w r2, r2, #1 80018ba: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 80018bc: 681a ldr r2, [r3, #0] 80018be: f042 0201 orr.w r2, r2, #1 80018c2: 601a str r2, [r3, #0] } 80018c4: 4770 bx lr 080018c6 : 80018c6: 4770 bx lr 080018c8 : 80018c8: 4770 bx lr 080018ca : 80018ca: 4770 bx lr 080018cc : 80018cc: 4770 bx lr 080018ce : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80018ce: 6803 ldr r3, [r0, #0] { 80018d0: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80018d2: 691a ldr r2, [r3, #16] { 80018d4: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80018d6: 0791 lsls r1, r2, #30 80018d8: d50e bpl.n 80018f8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 80018da: 68da ldr r2, [r3, #12] 80018dc: 0792 lsls r2, r2, #30 80018de: d50b bpl.n 80018f8 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80018e0: f06f 0202 mvn.w r2, #2 80018e4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80018e6: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80018e8: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80018ea: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80018ec: 079b lsls r3, r3, #30 80018ee: d077 beq.n 80019e0 { HAL_TIM_IC_CaptureCallback(htim); 80018f0: f7ff ffea bl 80018c8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80018f4: 2300 movs r3, #0 80018f6: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80018f8: 6823 ldr r3, [r4, #0] 80018fa: 691a ldr r2, [r3, #16] 80018fc: 0750 lsls r0, r2, #29 80018fe: d510 bpl.n 8001922 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8001900: 68da ldr r2, [r3, #12] 8001902: 0751 lsls r1, r2, #29 8001904: d50d bpl.n 8001922 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8001906: f06f 0204 mvn.w r2, #4 800190a: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 800190c: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 800190e: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001910: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001912: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8001916: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001918: d068 beq.n 80019ec HAL_TIM_IC_CaptureCallback(htim); 800191a: f7ff ffd5 bl 80018c8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800191e: 2300 movs r3, #0 8001920: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8001922: 6823 ldr r3, [r4, #0] 8001924: 691a ldr r2, [r3, #16] 8001926: 0712 lsls r2, r2, #28 8001928: d50f bpl.n 800194a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 800192a: 68da ldr r2, [r3, #12] 800192c: 0710 lsls r0, r2, #28 800192e: d50c bpl.n 800194a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8001930: f06f 0208 mvn.w r2, #8 8001934: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8001936: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001938: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800193a: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800193c: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 800193e: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001940: d05a beq.n 80019f8 HAL_TIM_IC_CaptureCallback(htim); 8001942: f7ff ffc1 bl 80018c8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001946: 2300 movs r3, #0 8001948: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 800194a: 6823 ldr r3, [r4, #0] 800194c: 691a ldr r2, [r3, #16] 800194e: 06d2 lsls r2, r2, #27 8001950: d510 bpl.n 8001974 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8001952: 68da ldr r2, [r3, #12] 8001954: 06d0 lsls r0, r2, #27 8001956: d50d bpl.n 8001974 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8001958: f06f 0210 mvn.w r2, #16 800195c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 800195e: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001960: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001962: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001964: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8001968: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800196a: d04b beq.n 8001a04 HAL_TIM_IC_CaptureCallback(htim); 800196c: f7ff ffac bl 80018c8 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001970: 2300 movs r3, #0 8001972: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8001974: 6823 ldr r3, [r4, #0] 8001976: 691a ldr r2, [r3, #16] 8001978: 07d1 lsls r1, r2, #31 800197a: d508 bpl.n 800198e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 800197c: 68da ldr r2, [r3, #12] 800197e: 07d2 lsls r2, r2, #31 8001980: d505 bpl.n 800198e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001982: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8001986: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001988: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 800198a: f001 f9c9 bl 8002d20 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 800198e: 6823 ldr r3, [r4, #0] 8001990: 691a ldr r2, [r3, #16] 8001992: 0610 lsls r0, r2, #24 8001994: d508 bpl.n 80019a8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 8001996: 68da ldr r2, [r3, #12] 8001998: 0611 lsls r1, r2, #24 800199a: d505 bpl.n 80019a8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 800199c: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 80019a0: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80019a2: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 80019a4: f000 f8bf bl 8001b26 } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 80019a8: 6823 ldr r3, [r4, #0] 80019aa: 691a ldr r2, [r3, #16] 80019ac: 0652 lsls r2, r2, #25 80019ae: d508 bpl.n 80019c2 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 80019b0: 68da ldr r2, [r3, #12] 80019b2: 0650 lsls r0, r2, #25 80019b4: d505 bpl.n 80019c2 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80019b6: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80019ba: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80019bc: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80019be: f7ff ff85 bl 80018cc } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80019c2: 6823 ldr r3, [r4, #0] 80019c4: 691a ldr r2, [r3, #16] 80019c6: 0691 lsls r1, r2, #26 80019c8: d522 bpl.n 8001a10 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 80019ca: 68da ldr r2, [r3, #12] 80019cc: 0692 lsls r2, r2, #26 80019ce: d51f bpl.n 8001a10 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80019d0: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 80019d4: 4620 mov r0, r4 } } } 80019d6: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80019da: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 80019dc: f000 b8a2 b.w 8001b24 HAL_TIM_OC_DelayElapsedCallback(htim); 80019e0: f7ff ff71 bl 80018c6 HAL_TIM_PWM_PulseFinishedCallback(htim); 80019e4: 4620 mov r0, r4 80019e6: f7ff ff70 bl 80018ca 80019ea: e783 b.n 80018f4 HAL_TIM_OC_DelayElapsedCallback(htim); 80019ec: f7ff ff6b bl 80018c6 HAL_TIM_PWM_PulseFinishedCallback(htim); 80019f0: 4620 mov r0, r4 80019f2: f7ff ff6a bl 80018ca 80019f6: e792 b.n 800191e HAL_TIM_OC_DelayElapsedCallback(htim); 80019f8: f7ff ff65 bl 80018c6 HAL_TIM_PWM_PulseFinishedCallback(htim); 80019fc: 4620 mov r0, r4 80019fe: f7ff ff64 bl 80018ca 8001a02: e7a0 b.n 8001946 HAL_TIM_OC_DelayElapsedCallback(htim); 8001a04: f7ff ff5f bl 80018c6 HAL_TIM_PWM_PulseFinishedCallback(htim); 8001a08: 4620 mov r0, r4 8001a0a: f7ff ff5e bl 80018ca 8001a0e: e7af b.n 8001970 8001a10: bd10 pop {r4, pc} ... 08001a14 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001a14: 4a24 ldr r2, [pc, #144] ; (8001aa8 ) tmpcr1 = TIMx->CR1; 8001a16: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001a18: 4290 cmp r0, r2 8001a1a: d012 beq.n 8001a42 8001a1c: f502 6200 add.w r2, r2, #2048 ; 0x800 8001a20: 4290 cmp r0, r2 8001a22: d00e beq.n 8001a42 8001a24: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001a28: d00b beq.n 8001a42 8001a2a: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001a2e: 4290 cmp r0, r2 8001a30: d007 beq.n 8001a42 8001a32: f502 6280 add.w r2, r2, #1024 ; 0x400 8001a36: 4290 cmp r0, r2 8001a38: d003 beq.n 8001a42 8001a3a: f502 6280 add.w r2, r2, #1024 ; 0x400 8001a3e: 4290 cmp r0, r2 8001a40: d11d bne.n 8001a7e { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8001a42: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8001a44: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8001a48: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8001a4a: 4a17 ldr r2, [pc, #92] ; (8001aa8 ) 8001a4c: 4290 cmp r0, r2 8001a4e: d012 beq.n 8001a76 8001a50: f502 6200 add.w r2, r2, #2048 ; 0x800 8001a54: 4290 cmp r0, r2 8001a56: d00e beq.n 8001a76 8001a58: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001a5c: d00b beq.n 8001a76 8001a5e: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001a62: 4290 cmp r0, r2 8001a64: d007 beq.n 8001a76 8001a66: f502 6280 add.w r2, r2, #1024 ; 0x400 8001a6a: 4290 cmp r0, r2 8001a6c: d003 beq.n 8001a76 8001a6e: f502 6280 add.w r2, r2, #1024 ; 0x400 8001a72: 4290 cmp r0, r2 8001a74: d103 bne.n 8001a7e { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 8001a76: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8001a78: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8001a7c: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001a7e: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8001a80: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001a84: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 8001a86: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8001a88: 688b ldr r3, [r1, #8] 8001a8a: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8001a8c: 680b ldr r3, [r1, #0] 8001a8e: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8001a90: 4b05 ldr r3, [pc, #20] ; (8001aa8 ) 8001a92: 4298 cmp r0, r3 8001a94: d003 beq.n 8001a9e 8001a96: f503 6300 add.w r3, r3, #2048 ; 0x800 8001a9a: 4298 cmp r0, r3 8001a9c: d101 bne.n 8001aa2 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8001a9e: 690b ldr r3, [r1, #16] 8001aa0: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 8001aa2: 2301 movs r3, #1 8001aa4: 6143 str r3, [r0, #20] 8001aa6: 4770 bx lr 8001aa8: 40012c00 .word 0x40012c00 08001aac : { 8001aac: b510 push {r4, lr} if(htim == NULL) 8001aae: 4604 mov r4, r0 8001ab0: b1a0 cbz r0, 8001adc if(htim->State == HAL_TIM_STATE_RESET) 8001ab2: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8001ab6: f003 02ff and.w r2, r3, #255 ; 0xff 8001aba: b91b cbnz r3, 8001ac4 htim->Lock = HAL_UNLOCKED; 8001abc: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 8001ac0: f001 fac2 bl 8003048 htim->State= HAL_TIM_STATE_BUSY; 8001ac4: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 8001ac6: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 8001ac8: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 8001acc: 1d21 adds r1, r4, #4 8001ace: f7ff ffa1 bl 8001a14 htim->State= HAL_TIM_STATE_READY; 8001ad2: 2301 movs r3, #1 return HAL_OK; 8001ad4: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 8001ad6: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 8001ada: bd10 pop {r4, pc} return HAL_ERROR; 8001adc: 2001 movs r0, #1 } 8001ade: bd10 pop {r4, pc} 08001ae0 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 8001ae0: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 8001ae4: b510 push {r4, lr} __HAL_LOCK(htim); 8001ae6: 2b01 cmp r3, #1 8001ae8: f04f 0302 mov.w r3, #2 8001aec: d018 beq.n 8001b20 htim->State = HAL_TIM_STATE_BUSY; 8001aee: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 8001af2: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8001af4: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 8001af6: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8001af8: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 8001afa: f022 0270 bic.w r2, r2, #112 ; 0x70 8001afe: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8001b00: 685a ldr r2, [r3, #4] 8001b02: 4322 orrs r2, r4 8001b04: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 8001b06: 689a ldr r2, [r3, #8] 8001b08: f022 0280 bic.w r2, r2, #128 ; 0x80 8001b0c: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8001b0e: 689a ldr r2, [r3, #8] 8001b10: 430a orrs r2, r1 8001b12: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 8001b14: 2301 movs r3, #1 8001b16: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 8001b1a: 2300 movs r3, #0 8001b1c: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8001b20: 4618 mov r0, r3 return HAL_OK; } 8001b22: bd10 pop {r4, pc} 08001b24 : 8001b24: 4770 bx lr 08001b26 : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8001b26: 4770 bx lr 08001b28 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8001b28: 6803 ldr r3, [r0, #0] 8001b2a: 68da ldr r2, [r3, #12] 8001b2c: f422 7290 bic.w r2, r2, #288 ; 0x120 8001b30: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001b32: 695a ldr r2, [r3, #20] 8001b34: f022 0201 bic.w r2, r2, #1 8001b38: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8001b3a: 2320 movs r3, #32 8001b3c: f880 303a strb.w r3, [r0, #58] ; 0x3a 8001b40: 4770 bx lr ... 08001b44 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8001b44: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001b48: 6805 ldr r5, [r0, #0] 8001b4a: 68c2 ldr r2, [r0, #12] 8001b4c: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001b4e: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001b50: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8001b54: 4313 orrs r3, r2 8001b56: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001b58: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 8001b5a: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001b5c: 430b orrs r3, r1 8001b5e: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8001b60: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 8001b64: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001b68: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 8001b6a: 4313 orrs r3, r2 8001b6c: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8001b6e: 696b ldr r3, [r5, #20] 8001b70: 6982 ldr r2, [r0, #24] 8001b72: f423 7340 bic.w r3, r3, #768 ; 0x300 8001b76: 4313 orrs r3, r2 8001b78: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 8001b7a: 4b40 ldr r3, [pc, #256] ; (8001c7c ) { 8001b7c: 4681 mov r9, r0 if(huart->Instance == USART1) 8001b7e: 429d cmp r5, r3 8001b80: f04f 0419 mov.w r4, #25 8001b84: d146 bne.n 8001c14 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8001b86: f7ff fe83 bl 8001890 8001b8a: fb04 f300 mul.w r3, r4, r0 8001b8e: f8d9 6004 ldr.w r6, [r9, #4] 8001b92: f04f 0864 mov.w r8, #100 ; 0x64 8001b96: 00b6 lsls r6, r6, #2 8001b98: fbb3 f3f6 udiv r3, r3, r6 8001b9c: fbb3 f3f8 udiv r3, r3, r8 8001ba0: 011e lsls r6, r3, #4 8001ba2: f7ff fe75 bl 8001890 8001ba6: 4360 muls r0, r4 8001ba8: f8d9 3004 ldr.w r3, [r9, #4] 8001bac: 009b lsls r3, r3, #2 8001bae: fbb0 f7f3 udiv r7, r0, r3 8001bb2: f7ff fe6d bl 8001890 8001bb6: 4360 muls r0, r4 8001bb8: f8d9 3004 ldr.w r3, [r9, #4] 8001bbc: 009b lsls r3, r3, #2 8001bbe: fbb0 f3f3 udiv r3, r0, r3 8001bc2: fbb3 f3f8 udiv r3, r3, r8 8001bc6: fb08 7313 mls r3, r8, r3, r7 8001bca: 011b lsls r3, r3, #4 8001bcc: 3332 adds r3, #50 ; 0x32 8001bce: fbb3 f3f8 udiv r3, r3, r8 8001bd2: f003 07f0 and.w r7, r3, #240 ; 0xf0 8001bd6: f7ff fe5b bl 8001890 8001bda: 4360 muls r0, r4 8001bdc: f8d9 2004 ldr.w r2, [r9, #4] 8001be0: 0092 lsls r2, r2, #2 8001be2: fbb0 faf2 udiv sl, r0, r2 8001be6: f7ff fe53 bl 8001890 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 8001bea: 4360 muls r0, r4 8001bec: f8d9 3004 ldr.w r3, [r9, #4] 8001bf0: 009b lsls r3, r3, #2 8001bf2: fbb0 f3f3 udiv r3, r0, r3 8001bf6: fbb3 f3f8 udiv r3, r3, r8 8001bfa: fb08 a313 mls r3, r8, r3, sl 8001bfe: 011b lsls r3, r3, #4 8001c00: 3332 adds r3, #50 ; 0x32 8001c02: fbb3 f3f8 udiv r3, r3, r8 8001c06: f003 030f and.w r3, r3, #15 8001c0a: 433b orrs r3, r7 8001c0c: 4433 add r3, r6 8001c0e: 60ab str r3, [r5, #8] 8001c10: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8001c14: f7ff fe2c bl 8001870 8001c18: fb04 f300 mul.w r3, r4, r0 8001c1c: f8d9 6004 ldr.w r6, [r9, #4] 8001c20: f04f 0864 mov.w r8, #100 ; 0x64 8001c24: 00b6 lsls r6, r6, #2 8001c26: fbb3 f3f6 udiv r3, r3, r6 8001c2a: fbb3 f3f8 udiv r3, r3, r8 8001c2e: 011e lsls r6, r3, #4 8001c30: f7ff fe1e bl 8001870 8001c34: 4360 muls r0, r4 8001c36: f8d9 3004 ldr.w r3, [r9, #4] 8001c3a: 009b lsls r3, r3, #2 8001c3c: fbb0 f7f3 udiv r7, r0, r3 8001c40: f7ff fe16 bl 8001870 8001c44: 4360 muls r0, r4 8001c46: f8d9 3004 ldr.w r3, [r9, #4] 8001c4a: 009b lsls r3, r3, #2 8001c4c: fbb0 f3f3 udiv r3, r0, r3 8001c50: fbb3 f3f8 udiv r3, r3, r8 8001c54: fb08 7313 mls r3, r8, r3, r7 8001c58: 011b lsls r3, r3, #4 8001c5a: 3332 adds r3, #50 ; 0x32 8001c5c: fbb3 f3f8 udiv r3, r3, r8 8001c60: f003 07f0 and.w r7, r3, #240 ; 0xf0 8001c64: f7ff fe04 bl 8001870 8001c68: 4360 muls r0, r4 8001c6a: f8d9 2004 ldr.w r2, [r9, #4] 8001c6e: 0092 lsls r2, r2, #2 8001c70: fbb0 faf2 udiv sl, r0, r2 8001c74: f7ff fdfc bl 8001870 8001c78: e7b7 b.n 8001bea 8001c7a: bf00 nop 8001c7c: 40013800 .word 0x40013800 08001c80 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8001c80: b5f8 push {r3, r4, r5, r6, r7, lr} 8001c82: 4604 mov r4, r0 8001c84: 460e mov r6, r1 8001c86: 4617 mov r7, r2 8001c88: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8001c8a: 6821 ldr r1, [r4, #0] 8001c8c: 680b ldr r3, [r1, #0] 8001c8e: ea36 0303 bics.w r3, r6, r3 8001c92: d101 bne.n 8001c98 return HAL_OK; 8001c94: 2000 movs r0, #0 } 8001c96: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8001c98: 1c6b adds r3, r5, #1 8001c9a: d0f7 beq.n 8001c8c if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8001c9c: b995 cbnz r5, 8001cc4 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8001c9e: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8001ca0: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8001ca2: 68da ldr r2, [r3, #12] 8001ca4: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8001ca8: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001caa: 695a ldr r2, [r3, #20] 8001cac: f022 0201 bic.w r2, r2, #1 8001cb0: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 8001cb2: 2320 movs r3, #32 8001cb4: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8001cb8: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 8001cbc: 2300 movs r3, #0 8001cbe: f884 3038 strb.w r3, [r4, #56] ; 0x38 8001cc2: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8001cc4: f7fe fafc bl 80002c0 8001cc8: 1bc0 subs r0, r0, r7 8001cca: 4285 cmp r5, r0 8001ccc: d2dd bcs.n 8001c8a 8001cce: e7e6 b.n 8001c9e 08001cd0 : { 8001cd0: b510 push {r4, lr} if(huart == NULL) 8001cd2: 4604 mov r4, r0 8001cd4: b340 cbz r0, 8001d28 if(huart->gState == HAL_UART_STATE_RESET) 8001cd6: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 8001cda: f003 02ff and.w r2, r3, #255 ; 0xff 8001cde: b91b cbnz r3, 8001ce8 huart->Lock = HAL_UNLOCKED; 8001ce0: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 8001ce4: f001 f9c4 bl 8003070 huart->gState = HAL_UART_STATE_BUSY; 8001ce8: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 8001cea: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 8001cec: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 8001cf0: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 8001cf2: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 8001cf4: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8001cf8: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 8001cfa: f7ff ff23 bl 8001b44 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8001cfe: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8001d00: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8001d02: 691a ldr r2, [r3, #16] 8001d04: f422 4290 bic.w r2, r2, #18432 ; 0x4800 8001d08: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8001d0a: 695a ldr r2, [r3, #20] 8001d0c: f022 022a bic.w r2, r2, #42 ; 0x2a 8001d10: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8001d12: 68da ldr r2, [r3, #12] 8001d14: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8001d18: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8001d1a: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001d1c: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8001d1e: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 8001d22: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 8001d26: bd10 pop {r4, pc} return HAL_ERROR; 8001d28: 2001 movs r0, #1 } 8001d2a: bd10 pop {r4, pc} 08001d2c : { 8001d2c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001d30: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 8001d32: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 8001d36: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8001d38: 2b20 cmp r3, #32 { 8001d3a: 460d mov r5, r1 8001d3c: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8001d3e: d14e bne.n 8001dde if((pData == NULL) || (Size == 0U)) 8001d40: 2900 cmp r1, #0 8001d42: d049 beq.n 8001dd8 8001d44: 2a00 cmp r2, #0 8001d46: d047 beq.n 8001dd8 __HAL_LOCK(huart); 8001d48: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8001d4c: 2b01 cmp r3, #1 8001d4e: d046 beq.n 8001dde 8001d50: 2301 movs r3, #1 8001d52: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001d56: 2300 movs r3, #0 8001d58: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8001d5a: 2321 movs r3, #33 ; 0x21 8001d5c: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8001d60: f7fe faae bl 80002c0 8001d64: 4606 mov r6, r0 huart->TxXferSize = Size; 8001d66: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8001d6a: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8001d6e: 8ce3 ldrh r3, [r4, #38] ; 0x26 8001d70: b29b uxth r3, r3 8001d72: b96b cbnz r3, 8001d90 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8001d74: 463b mov r3, r7 8001d76: 4632 mov r2, r6 8001d78: 2140 movs r1, #64 ; 0x40 8001d7a: 4620 mov r0, r4 8001d7c: f7ff ff80 bl 8001c80 8001d80: b9a8 cbnz r0, 8001dae huart->gState = HAL_UART_STATE_READY; 8001d82: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8001d84: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8001d88: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8001d8c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8001d90: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001d92: 4632 mov r2, r6 huart->TxXferCount--; 8001d94: 3b01 subs r3, #1 8001d96: b29b uxth r3, r3 8001d98: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001d9a: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001d9c: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001d9e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001da2: 4620 mov r0, r4 8001da4: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001da6: d10e bne.n 8001dc6 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001da8: f7ff ff6a bl 8001c80 8001dac: b110 cbz r0, 8001db4 return HAL_TIMEOUT; 8001dae: 2003 movs r0, #3 8001db0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 8001db4: 882b ldrh r3, [r5, #0] 8001db6: 6822 ldr r2, [r4, #0] 8001db8: f3c3 0308 ubfx r3, r3, #0, #9 8001dbc: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8001dbe: 6923 ldr r3, [r4, #16] 8001dc0: b943 cbnz r3, 8001dd4 pData +=2U; 8001dc2: 3502 adds r5, #2 8001dc4: e7d3 b.n 8001d6e if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001dc6: f7ff ff5b bl 8001c80 8001dca: 2800 cmp r0, #0 8001dcc: d1ef bne.n 8001dae huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 8001dce: 6823 ldr r3, [r4, #0] 8001dd0: 782a ldrb r2, [r5, #0] 8001dd2: 605a str r2, [r3, #4] 8001dd4: 3501 adds r5, #1 8001dd6: e7ca b.n 8001d6e return HAL_ERROR; 8001dd8: 2001 movs r0, #1 8001dda: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8001dde: 2002 movs r0, #2 } 8001de0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 08001de4 : { 8001de4: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 8001de6: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 8001dea: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 8001dec: 2a20 cmp r2, #32 { 8001dee: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 8001df0: d138 bne.n 8001e64 if((pData == NULL) || (Size == 0U)) 8001df2: 2900 cmp r1, #0 8001df4: d034 beq.n 8001e60 8001df6: 2b00 cmp r3, #0 8001df8: d032 beq.n 8001e60 __HAL_LOCK(huart); 8001dfa: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 8001dfe: 2a01 cmp r2, #1 8001e00: d030 beq.n 8001e64 8001e02: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001e04: 2400 movs r4, #0 __HAL_LOCK(huart); 8001e06: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 8001e0a: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8001e0c: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 8001e0e: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8001e10: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8001e12: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8001e16: 6b40 ldr r0, [r0, #52] ; 0x34 8001e18: 4a13 ldr r2, [pc, #76] ; (8001e68 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8001e1a: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8001e1c: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8001e1e: 4a13 ldr r2, [pc, #76] ; (8001e6c ) huart->hdmarx->XferAbortCallback = NULL; 8001e20: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8001e22: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8001e24: 4a12 ldr r2, [pc, #72] ; (8001e70 ) 8001e26: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8001e28: 460a mov r2, r1 8001e2a: 1d31 adds r1, r6, #4 8001e2c: f7fe fb08 bl 8000440 return HAL_OK; 8001e30: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 8001e32: 682b ldr r3, [r5, #0] 8001e34: 9401 str r4, [sp, #4] 8001e36: 681a ldr r2, [r3, #0] 8001e38: 9201 str r2, [sp, #4] 8001e3a: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8001e3c: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8001e40: 9201 str r2, [sp, #4] 8001e42: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8001e44: 68da ldr r2, [r3, #12] 8001e46: f442 7280 orr.w r2, r2, #256 ; 0x100 8001e4a: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001e4c: 695a ldr r2, [r3, #20] 8001e4e: f042 0201 orr.w r2, r2, #1 8001e52: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001e54: 695a ldr r2, [r3, #20] 8001e56: f042 0240 orr.w r2, r2, #64 ; 0x40 8001e5a: 615a str r2, [r3, #20] } 8001e5c: b002 add sp, #8 8001e5e: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8001e60: 2001 movs r0, #1 8001e62: e7fb b.n 8001e5c return HAL_BUSY; 8001e64: 2002 movs r0, #2 8001e66: e7f9 b.n 8001e5c 8001e68: 08001e77 .word 0x08001e77 8001e6c: 08001f2d .word 0x08001f2d 8001e70: 08001f39 .word 0x08001f39 08001e74 : 8001e74: 4770 bx lr 08001e76 : { 8001e76: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001e78: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8001e7a: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001e7c: 681b ldr r3, [r3, #0] 8001e7e: f013 0320 ands.w r3, r3, #32 8001e82: d110 bne.n 8001ea6 huart->RxXferCount = 0U; 8001e84: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8001e86: 6813 ldr r3, [r2, #0] 8001e88: 68d9 ldr r1, [r3, #12] 8001e8a: f421 7180 bic.w r1, r1, #256 ; 0x100 8001e8e: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001e90: 6959 ldr r1, [r3, #20] 8001e92: f021 0101 bic.w r1, r1, #1 8001e96: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001e98: 6959 ldr r1, [r3, #20] 8001e9a: f021 0140 bic.w r1, r1, #64 ; 0x40 8001e9e: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8001ea0: 2320 movs r3, #32 8001ea2: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8001ea6: 4610 mov r0, r2 8001ea8: f001 fa96 bl 80033d8 8001eac: bd08 pop {r3, pc} 08001eae : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8001eae: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 8001eb2: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8001eb4: 2b22 cmp r3, #34 ; 0x22 8001eb6: d136 bne.n 8001f26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001eb8: 6883 ldr r3, [r0, #8] 8001eba: 6901 ldr r1, [r0, #16] 8001ebc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8001ec0: 6802 ldr r2, [r0, #0] 8001ec2: 6a83 ldr r3, [r0, #40] ; 0x28 8001ec4: d123 bne.n 8001f0e *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8001ec6: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8001ec8: b9e9 cbnz r1, 8001f06 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8001eca: f3c2 0208 ubfx r2, r2, #0, #9 8001ece: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8001ed2: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8001ed4: 8dc4 ldrh r4, [r0, #46] ; 0x2e 8001ed6: 3c01 subs r4, #1 8001ed8: b2a4 uxth r4, r4 8001eda: 85c4 strh r4, [r0, #46] ; 0x2e 8001edc: b98c cbnz r4, 8001f02 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 8001ede: 6803 ldr r3, [r0, #0] 8001ee0: 68da ldr r2, [r3, #12] 8001ee2: f022 0220 bic.w r2, r2, #32 8001ee6: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8001ee8: 68da ldr r2, [r3, #12] 8001eea: f422 7280 bic.w r2, r2, #256 ; 0x100 8001eee: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 8001ef0: 695a ldr r2, [r3, #20] 8001ef2: f022 0201 bic.w r2, r2, #1 8001ef6: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8001ef8: 2320 movs r3, #32 8001efa: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8001efe: f001 fa6b bl 80033d8 if(--huart->RxXferCount == 0U) 8001f02: 2000 movs r0, #0 } 8001f04: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 8001f06: b2d2 uxtb r2, r2 8001f08: f823 2b01 strh.w r2, [r3], #1 8001f0c: e7e1 b.n 8001ed2 if(huart->Init.Parity == UART_PARITY_NONE) 8001f0e: b921 cbnz r1, 8001f1a *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8001f10: 1c59 adds r1, r3, #1 8001f12: 6852 ldr r2, [r2, #4] 8001f14: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8001f16: 701a strb r2, [r3, #0] 8001f18: e7dc b.n 8001ed4 8001f1a: 6852 ldr r2, [r2, #4] 8001f1c: 1c59 adds r1, r3, #1 8001f1e: 6281 str r1, [r0, #40] ; 0x28 8001f20: f002 027f and.w r2, r2, #127 ; 0x7f 8001f24: e7f7 b.n 8001f16 return HAL_BUSY; 8001f26: 2002 movs r0, #2 8001f28: bd10 pop {r4, pc} 08001f2a : 8001f2a: 4770 bx lr 08001f2c : { 8001f2c: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8001f2e: 6a40 ldr r0, [r0, #36] ; 0x24 8001f30: f7ff fffb bl 8001f2a 8001f34: bd08 pop {r3, pc} 08001f36 : 8001f36: 4770 bx lr 08001f38 : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8001f38: 6a41 ldr r1, [r0, #36] ; 0x24 { 8001f3a: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8001f3c: 680b ldr r3, [r1, #0] 8001f3e: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8001f40: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8001f44: 2821 cmp r0, #33 ; 0x21 8001f46: d10a bne.n 8001f5e 8001f48: 0612 lsls r2, r2, #24 8001f4a: d508 bpl.n 8001f5e huart->TxXferCount = 0U; 8001f4c: 2200 movs r2, #0 8001f4e: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8001f50: 68da ldr r2, [r3, #12] 8001f52: f022 02c0 bic.w r2, r2, #192 ; 0xc0 8001f56: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8001f58: 2220 movs r2, #32 8001f5a: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8001f5e: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8001f60: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8001f64: 2a22 cmp r2, #34 ; 0x22 8001f66: d106 bne.n 8001f76 8001f68: 065b lsls r3, r3, #25 8001f6a: d504 bpl.n 8001f76 huart->RxXferCount = 0U; 8001f6c: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8001f6e: 4608 mov r0, r1 huart->RxXferCount = 0U; 8001f70: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8001f72: f7ff fdd9 bl 8001b28 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8001f76: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001f78: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8001f7a: f043 0310 orr.w r3, r3, #16 8001f7e: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001f80: f7ff ffd9 bl 8001f36 8001f84: bd08 pop {r3, pc} ... 08001f88 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8001f88: 6803 ldr r3, [r0, #0] { 8001f8a: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8001f8c: 681a ldr r2, [r3, #0] { 8001f8e: 4604 mov r4, r0 if(errorflags == RESET) 8001f90: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8001f92: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8001f94: 695d ldr r5, [r3, #20] if(errorflags == RESET) 8001f96: d107 bne.n 8001fa8 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8001f98: 0696 lsls r6, r2, #26 8001f9a: d55a bpl.n 8002052 8001f9c: 068d lsls r5, r1, #26 8001f9e: d558 bpl.n 8002052 } 8001fa0: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8001fa4: f7ff bf83 b.w 8001eae if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8001fa8: f015 0501 ands.w r5, r5, #1 8001fac: d102 bne.n 8001fb4 8001fae: f411 7f90 tst.w r1, #288 ; 0x120 8001fb2: d04e beq.n 8002052 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8001fb4: 07d3 lsls r3, r2, #31 8001fb6: d505 bpl.n 8001fc4 8001fb8: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 8001fba: bf42 ittt mi 8001fbc: 6be3 ldrmi r3, [r4, #60] ; 0x3c 8001fbe: f043 0301 orrmi.w r3, r3, #1 8001fc2: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001fc4: 0750 lsls r0, r2, #29 8001fc6: d504 bpl.n 8001fd2 8001fc8: b11d cbz r5, 8001fd2 huart->ErrorCode |= HAL_UART_ERROR_NE; 8001fca: 6be3 ldr r3, [r4, #60] ; 0x3c 8001fcc: f043 0302 orr.w r3, r3, #2 8001fd0: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001fd2: 0793 lsls r3, r2, #30 8001fd4: d504 bpl.n 8001fe0 8001fd6: b11d cbz r5, 8001fe0 huart->ErrorCode |= HAL_UART_ERROR_FE; 8001fd8: 6be3 ldr r3, [r4, #60] ; 0x3c 8001fda: f043 0304 orr.w r3, r3, #4 8001fde: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8001fe0: 0716 lsls r6, r2, #28 8001fe2: d504 bpl.n 8001fee 8001fe4: b11d cbz r5, 8001fee huart->ErrorCode |= HAL_UART_ERROR_ORE; 8001fe6: 6be3 ldr r3, [r4, #60] ; 0x3c 8001fe8: f043 0308 orr.w r3, r3, #8 8001fec: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 8001fee: 6be3 ldr r3, [r4, #60] ; 0x3c 8001ff0: 2b00 cmp r3, #0 8001ff2: d066 beq.n 80020c2 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8001ff4: 0695 lsls r5, r2, #26 8001ff6: d504 bpl.n 8002002 8001ff8: 0688 lsls r0, r1, #26 8001ffa: d502 bpl.n 8002002 UART_Receive_IT(huart); 8001ffc: 4620 mov r0, r4 8001ffe: f7ff ff56 bl 8001eae dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8002002: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8002004: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8002006: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8002008: 6be2 ldr r2, [r4, #60] ; 0x3c 800200a: 0711 lsls r1, r2, #28 800200c: d402 bmi.n 8002014 800200e: f015 0540 ands.w r5, r5, #64 ; 0x40 8002012: d01a beq.n 800204a UART_EndRxTransfer(huart); 8002014: f7ff fd88 bl 8001b28 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8002018: 6823 ldr r3, [r4, #0] 800201a: 695a ldr r2, [r3, #20] 800201c: 0652 lsls r2, r2, #25 800201e: d510 bpl.n 8002042 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8002020: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8002022: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8002024: f022 0240 bic.w r2, r2, #64 ; 0x40 8002028: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 800202a: b150 cbz r0, 8002042 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 800202c: 4b25 ldr r3, [pc, #148] ; (80020c4 ) 800202e: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8002030: f7fe fa44 bl 80004bc 8002034: 2800 cmp r0, #0 8002036: d044 beq.n 80020c2 huart->hdmarx->XferAbortCallback(huart->hdmarx); 8002038: 6b60 ldr r0, [r4, #52] ; 0x34 } 800203a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 800203e: 6b43 ldr r3, [r0, #52] ; 0x34 8002040: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8002042: 4620 mov r0, r4 8002044: f7ff ff77 bl 8001f36 8002048: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 800204a: f7ff ff74 bl 8001f36 huart->ErrorCode = HAL_UART_ERROR_NONE; 800204e: 63e5 str r5, [r4, #60] ; 0x3c 8002050: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8002052: 0616 lsls r6, r2, #24 8002054: d527 bpl.n 80020a6 8002056: 060d lsls r5, r1, #24 8002058: d525 bpl.n 80020a6 if(huart->gState == HAL_UART_STATE_BUSY_TX) 800205a: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 800205e: 2a21 cmp r2, #33 ; 0x21 8002060: d12f bne.n 80020c2 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8002062: 68a2 ldr r2, [r4, #8] 8002064: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8002068: 6a22 ldr r2, [r4, #32] 800206a: d117 bne.n 800209c huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 800206c: 8811 ldrh r1, [r2, #0] 800206e: f3c1 0108 ubfx r1, r1, #0, #9 8002072: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8002074: 6921 ldr r1, [r4, #16] 8002076: b979 cbnz r1, 8002098 huart->pTxBuffPtr += 2U; 8002078: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800207a: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 800207c: 8ce2 ldrh r2, [r4, #38] ; 0x26 800207e: 3a01 subs r2, #1 8002080: b292 uxth r2, r2 8002082: 84e2 strh r2, [r4, #38] ; 0x26 8002084: b9ea cbnz r2, 80020c2 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8002086: 68da ldr r2, [r3, #12] 8002088: f022 0280 bic.w r2, r2, #128 ; 0x80 800208c: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 800208e: 68da ldr r2, [r3, #12] 8002090: f042 0240 orr.w r2, r2, #64 ; 0x40 8002094: 60da str r2, [r3, #12] 8002096: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8002098: 3201 adds r2, #1 800209a: e7ee b.n 800207a huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 800209c: 1c51 adds r1, r2, #1 800209e: 6221 str r1, [r4, #32] 80020a0: 7812 ldrb r2, [r2, #0] 80020a2: 605a str r2, [r3, #4] 80020a4: e7ea b.n 800207c if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 80020a6: 0650 lsls r0, r2, #25 80020a8: d50b bpl.n 80020c2 80020aa: 064a lsls r2, r1, #25 80020ac: d509 bpl.n 80020c2 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80020ae: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 80020b0: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80020b2: f022 0240 bic.w r2, r2, #64 ; 0x40 80020b6: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 80020b8: 2320 movs r3, #32 80020ba: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 80020be: f7ff fed9 bl 8001e74 80020c2: bd70 pop {r4, r5, r6, pc} 80020c4: 080020c9 .word 0x080020c9 080020c8 : { 80020c8: b508 push {r3, lr} huart->RxXferCount = 0x00U; 80020ca: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80020cc: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 80020ce: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 80020d0: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 80020d2: f7ff ff30 bl 8001f36 80020d6: bd08 pop {r3, pc} 080020d8 : BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); } uint8_t AckData_Buf[6] = {0xbe,FirmwareUpdataAck,0x03,5,0,0xbe}; void FirmwareUpdateStart(uint8_t* data){ 80020d8: b570 push {r4, r5, r6, lr} uint8_t ret = 0,crccheck = 0; crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80020da: 7881 ldrb r1, [r0, #2] void FirmwareUpdateStart(uint8_t* data){ 80020dc: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80020de: 1843 adds r3, r0, r1 80020e0: 785a ldrb r2, [r3, #1] 80020e2: 3001 adds r0, #1 80020e4: f000 f8c9 bl 800227a if(crccheck == NO_ERROR){ 80020e8: b2c0 uxtb r0, r0 80020ea: 2801 cmp r0, #1 80020ec: d00e beq.n 800210c 80020ee: 2300 movs r3, #0 ret = Flash_write(&data[0]); if(ret == 1) AckData_Buf[bluecell_type] = FirmwareUpdataNak; }else{ for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) printf("%02x ",data[i]); 80020f0: 4e1e ldr r6, [pc, #120] ; (800216c ) for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) 80020f2: 78a2 ldrb r2, [r4, #2] 80020f4: 1c5d adds r5, r3, #1 80020f6: 3202 adds r2, #2 80020f8: b2db uxtb r3, r3 80020fa: 429a cmp r2, r3 80020fc: da2e bge.n 800215c printf("Check Sum error \n"); 80020fe: 481c ldr r0, [pc, #112] ; (8002170 ) 8002100: f001 fa7a bl 80035f8 AckData_Buf[bluecell_type] = FirmwareUpdataNak; 8002104: 2222 movs r2, #34 ; 0x22 8002106: 4b1b ldr r3, [pc, #108] ; (8002174 ) 8002108: 705a strb r2, [r3, #1] 800210a: e00f b.n 800212c AckData_Buf[bluecell_type] = FirmwareUpdataAck; 800210c: 2211 movs r2, #17 800210e: 4d19 ldr r5, [pc, #100] ; (8002174 ) 8002110: 706a strb r2, [r5, #1] if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte 8002112: 7862 ldrb r2, [r4, #1] 8002114: 2add cmp r2, #221 ; 0xdd 8002116: d001 beq.n 800211c 8002118: 2aee cmp r2, #238 ; 0xee 800211a: d107 bne.n 800212c ret = Flash_write(&data[0]); 800211c: 4620 mov r0, r4 800211e: f000 fd03 bl 8002b28 if(ret == 1) 8002122: b2c0 uxtb r0, r0 8002124: 2801 cmp r0, #1 8002126: d101 bne.n 800212c AckData_Buf[bluecell_type] = FirmwareUpdataNak; 8002128: 2322 movs r3, #34 ; 0x22 800212a: 706b strb r3, [r5, #1] } AckData_Buf[bluecell_crc] = STH30_CreateCrc(&AckData_Buf[bluecell_type],AckData_Buf[bluecell_length]); 800212c: 4d11 ldr r5, [pc, #68] ; (8002174 ) 800212e: 78a9 ldrb r1, [r5, #2] 8002130: 1c68 adds r0, r5, #1 8002132: f000 f887 bl 8002244 8002136: 7128 strb r0, [r5, #4] if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){ 8002138: 7863 ldrb r3, [r4, #1] 800213a: 2bee cmp r3, #238 ; 0xee 800213c: d006 beq.n 800214c 800213e: 2b0a cmp r3, #10 8002140: d004 beq.n 800214c Uart1_Data_Send(&AckData_Buf[bluecell_stx],AckData_Buf[bluecell_length] + 3); 8002142: 78a9 ldrb r1, [r5, #2] 8002144: 4628 mov r0, r5 8002146: 3103 adds r1, #3 8002148: f001 f96c bl 8003424 } if(data[bluecell_type] == 0xEE) 800214c: 7863 ldrb r3, [r4, #1] 800214e: 2bee cmp r3, #238 ; 0xee 8002150: d10a bne.n 8002168 printf("update Complete \n"); } 8002152: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} printf("update Complete \n"); 8002156: 4808 ldr r0, [pc, #32] ; (8002178 ) 8002158: f001 ba4e b.w 80035f8 printf("%02x ",data[i]); 800215c: 5ce1 ldrb r1, [r4, r3] 800215e: 4630 mov r0, r6 8002160: f001 f9c2 bl 80034e8 8002164: 462b mov r3, r5 8002166: e7c4 b.n 80020f2 8002168: bd70 pop {r4, r5, r6, pc} 800216a: bf00 nop 800216c: 080045f0 .word 0x080045f0 8002170: 080045f6 .word 0x080045f6 8002174: 20000008 .word 0x20000008 8002178: 08004607 .word 0x08004607 0800217c : //----------------------------------------------- //UART CRC üũ �Լ� //----------------------------------------------- bool Chksum_Check(uint8_t *data, uint32_t leng,uint8_t chkdata) { uint8_t dataret = 0; 800217c: 2300 movs r3, #0 { 800217e: b510 push {r4, lr} 8002180: 1cc1 adds r1, r0, #3 8002182: 3014 adds r0, #20 bool ret = false; for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ dataret += data[i]; 8002184: f811 4f01 ldrb.w r4, [r1, #1]! 8002188: 4423 add r3, r4 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 800218a: 4281 cmp r1, r0 dataret += data[i]; 800218c: b2db uxtb r3, r3 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 800218e: d1f9 bne.n 8002184 if(dataret == chkdata){ ret = true; } // printf("dataret : %x chkdata : %x \r\n",dataret,chkdata); return ret; } 8002190: 1a9b subs r3, r3, r2 8002192: 4258 negs r0, r3 8002194: 4158 adcs r0, r3 8002196: bd10 pop {r4, pc} 08002198 : uint8_t Chksum_Create(uint8_t *data) { 8002198: 1cc2 adds r2, r0, #3 800219a: f100 0314 add.w r3, r0, #20 uint8_t dataret = 0; 800219e: 2000 movs r0, #0 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ dataret += data[i]; 80021a0: f812 1f01 ldrb.w r1, [r2, #1]! 80021a4: 4408 add r0, r1 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 80021a6: 429a cmp r2, r3 dataret += data[i]; 80021a8: b2c0 uxtb r0, r0 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 80021aa: d1f9 bne.n 80021a0 // printf("dataret : %x data[%d] : %x \r\n",dataret,i,data[i]); } // printf("dataret : %x \r\n",dataret); return dataret; } 80021ac: 4770 bx lr ... 080021b0 : { uint8_t dt = 0U; uint16_t crc16 = 0U; len *= 8; for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 80021b0: 2300 movs r3, #0 { 80021b2: b510 push {r4, lr} { crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 80021b4: 4c0f ldr r4, [pc, #60] ; (80021f4 ) len *= 8; 80021b6: 00c9 lsls r1, r1, #3 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 80021b8: 2907 cmp r1, #7 80021ba: dc0f bgt.n 80021dc } if(len != 0) 80021bc: b161 cbz r1, 80021d8 len--; if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) { crc16 = (uint16_t)(crc16 << 1); crc16 = (uint16_t)(crc16 ^ 0x1021); 80021be: f241 0221 movw r2, #4129 ; 0x1021 if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) 80021c2: f413 4f00 tst.w r3, #32768 ; 0x8000 80021c6: ea4f 0343 mov.w r3, r3, lsl #1 crc16 = (uint16_t)(crc16 << 1); 80021ca: b29b uxth r3, r3 len--; 80021cc: f101 31ff add.w r1, r1, #4294967295 crc16 = (uint16_t)(crc16 ^ 0x1021); 80021d0: bf18 it ne 80021d2: 4053 eorne r3, r2 while(len != 0) 80021d4: 2900 cmp r1, #0 80021d6: d1f4 bne.n 80021c2 } dt = (uint8_t)(dt << 1); } } return(crc16); } 80021d8: 4618 mov r0, r3 80021da: bd10 pop {r4, pc} crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 80021dc: f810 2b01 ldrb.w r2, [r0], #1 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 80021e0: 3908 subs r1, #8 crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 80021e2: ea82 2213 eor.w r2, r2, r3, lsr #8 80021e6: f834 2012 ldrh.w r2, [r4, r2, lsl #1] 80021ea: ea82 2303 eor.w r3, r2, r3, lsl #8 80021ee: b29b uxth r3, r3 80021f0: e7e2 b.n 80021b8 80021f2: bf00 nop 80021f4: 2000000e .word 0x2000000e 080021f8 : { uint8_t dt = 0U; uint16_t crc16 = 0U; len *= 8; for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 80021f8: 2300 movs r3, #0 { 80021fa: b530 push {r4, r5, lr} { crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 80021fc: 4d10 ldr r5, [pc, #64] ; (8002240 ) len *= 8; 80021fe: 00c9 lsls r1, r1, #3 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8002200: 2907 cmp r1, #7 8002202: dc11 bgt.n 8002228 } if(len != 0) 8002204: b161 cbz r1, 8002220 len--; if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) { crc16 = (uint16_t)(crc16 << 1); crc16 = (uint16_t)(crc16 ^ 0x1021); 8002206: f241 0021 movw r0, #4129 ; 0x1021 if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) 800220a: f413 4f00 tst.w r3, #32768 ; 0x8000 800220e: ea4f 0343 mov.w r3, r3, lsl #1 crc16 = (uint16_t)(crc16 << 1); 8002212: b29b uxth r3, r3 len--; 8002214: f101 31ff add.w r1, r1, #4294967295 crc16 = (uint16_t)(crc16 ^ 0x1021); 8002218: bf18 it ne 800221a: 4043 eorne r3, r0 while(len != 0) 800221c: 2900 cmp r1, #0 800221e: d1f4 bne.n 800220a } dt = (uint8_t)(dt << 1); } } return(crc16 == checksum ? CHECKSUM_ERROR : NO_ERROR ); } 8002220: 1a98 subs r0, r3, r2 8002222: bf18 it ne 8002224: 2001 movne r0, #1 8002226: bd30 pop {r4, r5, pc} crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8002228: f810 4b01 ldrb.w r4, [r0], #1 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 800222c: 3908 subs r1, #8 crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 800222e: ea84 2413 eor.w r4, r4, r3, lsr #8 8002232: f835 4014 ldrh.w r4, [r5, r4, lsl #1] 8002236: ea84 2303 eor.w r3, r4, r3, lsl #8 800223a: b29b uxth r3, r3 800223c: e7e0 b.n 8002200 800223e: bf00 nop 8002240: 2000000e .word 0x2000000e 08002244 : uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 8002244: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8002246: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8002248: 4604 mov r4, r0 800224a: 1a22 subs r2, r4, r0 800224c: b2d2 uxtb r2, r2 800224e: 4291 cmp r1, r2 8002250: d801 bhi.n 8002256 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 8002252: 4618 mov r0, r3 8002254: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 8002256: f814 2b01 ldrb.w r2, [r4], #1 800225a: 4053 eors r3, r2 800225c: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 800225e: f013 0f80 tst.w r3, #128 ; 0x80 8002262: f102 32ff add.w r2, r2, #4294967295 8002266: ea4f 0343 mov.w r3, r3, lsl #1 800226a: bf18 it ne 800226c: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8002270: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8002274: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8002276: d1f2 bne.n 800225e 8002278: e7e7 b.n 800224a 0800227a : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 800227a: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 800227c: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 800227e: 4605 mov r5, r0 8002280: 1a2c subs r4, r5, r0 8002282: b2e4 uxtb r4, r4 8002284: 42a1 cmp r1, r4 8002286: d803 bhi.n 8002290 else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8002288: 1a9b subs r3, r3, r2 800228a: 4258 negs r0, r3 800228c: 4158 adcs r0, r3 800228e: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8002290: f815 4b01 ldrb.w r4, [r5], #1 8002294: 4063 eors r3, r4 8002296: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8002298: f013 0f80 tst.w r3, #128 ; 0x80 800229c: f104 34ff add.w r4, r4, #4294967295 80022a0: ea4f 0343 mov.w r3, r3, lsl #1 80022a4: bf18 it ne 80022a6: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 80022aa: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 80022ae: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 80022b0: d1f2 bne.n 8002298 80022b2: e7e5 b.n 8002280 080022b4 : { const uint8_t *p; uint32_t crcret = 0; p = buf; crcret = crcret ^ ~0U; 80022b4: f04f 32ff mov.w r2, #4294967295 { 80022b8: b510 push {r4, lr} while (size--) { // printf("index : size : %d buf %x \r\n",size,*p); crcret = crc32_tab[(crcret ^ *p++) & 0xFF] ^ (crcret >> 8); 80022ba: 4c07 ldr r4, [pc, #28] ; (80022d8 ) 80022bc: 4401 add r1, r0 while (size--) { 80022be: 4288 cmp r0, r1 80022c0: d101 bne.n 80022c6 } return crcret ^ ~0U; } 80022c2: 43d0 mvns r0, r2 80022c4: bd10 pop {r4, pc} crcret = crc32_tab[(crcret ^ *p++) & 0xFF] ^ (crcret >> 8); 80022c6: f810 3b01 ldrb.w r3, [r0], #1 80022ca: 4053 eors r3, r2 80022cc: b2db uxtb r3, r3 80022ce: f854 3023 ldr.w r3, [r4, r3, lsl #2] 80022d2: ea83 2212 eor.w r2, r3, r2, lsr #8 80022d6: e7f2 b.n 80022be 80022d8: 08004618 .word 0x08004618 080022dc : Length : Response Data Length CRCINDEX : CRC INDEX Number */ uint8_t* MBIC_HeaderMergeFunction(uint8_t* data,uint16_t Length ) { 80022dc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 80022e0: f101 0320 add.w r3, r1, #32 80022e4: f023 0307 bic.w r3, r3, #7 { 80022e8: af00 add r7, sp, #0 uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 80022ea: ebad 0d03 sub.w sp, sp, r3 { 80022ee: 4604 mov r4, r0 80022f0: 460e mov r6, r1 uint16_t CRCData = CRC16_Generate(data,Length); 80022f2: f7ff ff5d bl 80021b0 /*CRC Create*/ ret[MBIC_PAYLOADSTART + Length + 0] = ((CRCData & 0xFF00) >> 8); 80022f6: eb0d 0306 add.w r3, sp, r6 80022fa: 0a02 lsrs r2, r0, #8 80022fc: 759a strb r2, [r3, #22] ret[MBIC_PAYLOADSTART + Length + 1] = ((CRCData & 0x00FF)); ret[MBIC_PAYLOADSTART + Length + 2] = 0x03; 80022fe: 2203 movs r2, #3 ret[MBIC_PAYLOADSTART + Length + 1] = ((CRCData & 0x00FF)); 8002300: 75d8 strb r0, [r3, #23] ret[MBIC_PAYLOADSTART + Length + 2] = 0x03; 8002302: 761a strb r2, [r3, #24] /*Data Mark Create*/ ret[MBIC_PREAMBLE_0] = MBIC_PREAMBLE0; 8002304: 2316 movs r3, #22 8002306: f88d 3000 strb.w r3, [sp] ret[MBIC_PREAMBLE_1] = MBIC_PREAMBLE1; 800230a: f88d 3001 strb.w r3, [sp, #1] ret[MBIC_PREAMBLE_2] = MBIC_PREAMBLE2; 800230e: f88d 3002 strb.w r3, [sp, #2] ret[MBIC_PREAMBLE_3] = MBIC_PREAMBLE3; 8002312: f88d 3003 strb.w r3, [sp, #3] /*Data Subid Create*/ ret[MBIC_SUBUID_0] = MBIC_SUBUID0; ret[MBIC_SUBUID_1] = MBIC_SUBUID1; 8002316: 23f1 movs r3, #241 ; 0xf1 ret[MBIC_SUBUID_0] = MBIC_SUBUID0; 8002318: 2500 movs r5, #0 ret[MBIC_SUBUID_1] = MBIC_SUBUID1; 800231a: f88d 3005 strb.w r3, [sp, #5] ret[MBIC_RCODE_0] = data[MBIC_RCODE_0]; 800231e: 79a3 ldrb r3, [r4, #6] ret[MBIC_LENGTH_0] = (Length & 0xFF00) << 8; ret[MBIC_LENGTH_1] = Length & 0x00FF; ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8002320: 4668 mov r0, sp ret[MBIC_RCODE_0] = data[MBIC_RCODE_0]; 8002322: f88d 3006 strb.w r3, [sp, #6] ret[MBIC_TRID_0] = data[MBIC_TRID_0]; 8002326: 79e3 ldrb r3, [r4, #7] ret[MBIC_SUBUID_0] = MBIC_SUBUID0; 8002328: f88d 5004 strb.w r5, [sp, #4] ret[MBIC_TRID_0] = data[MBIC_TRID_0]; 800232c: f88d 3007 strb.w r3, [sp, #7] ret[MBIC_TRID_1] = data[MBIC_TRID_1]; 8002330: 7a23 ldrb r3, [r4, #8] ret[MBIC_ERRRESPONSE_0] = MBIC_ERRRESPONSE; 8002332: f88d 5011 strb.w r5, [sp, #17] ret[MBIC_TRID_1] = data[MBIC_TRID_1]; 8002336: f88d 3008 strb.w r3, [sp, #8] ret[MBIC_SEQSUM_0] = data[MBIC_SEQSUM_0]; 800233a: 7a63 ldrb r3, [r4, #9] uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 800233c: 46e8 mov r8, sp ret[MBIC_SEQSUM_0] = data[MBIC_SEQSUM_0]; 800233e: f88d 3009 strb.w r3, [sp, #9] ret[MBIC_TTL_0] = data[MBIC_TTL_0]; 8002342: 7aa3 ldrb r3, [r4, #10] 8002344: f88d 300a strb.w r3, [sp, #10] ret[MBIC_TIME_0] = data[MBIC_TIME_0]; 8002348: 7ae3 ldrb r3, [r4, #11] 800234a: f88d 300b strb.w r3, [sp, #11] ret[MBIC_TIME_1] = data[MBIC_TIME_1]; 800234e: 7b23 ldrb r3, [r4, #12] 8002350: f88d 300c strb.w r3, [sp, #12] ret[MBIC_TIME_2] = data[MBIC_TIME_2]; 8002354: 7b63 ldrb r3, [r4, #13] 8002356: f88d 300d strb.w r3, [sp, #13] ret[MBIC_TIME_3] = data[MBIC_TIME_3]; 800235a: 7ba3 ldrb r3, [r4, #14] 800235c: f88d 300e strb.w r3, [sp, #14] ret[MBIC_TIME_4] = data[MBIC_TIME_4]; 8002360: 7be3 ldrb r3, [r4, #15] 8002362: f88d 300f strb.w r3, [sp, #15] ret[MBIC_TIME_5] = data[MBIC_TIME_5]; 8002366: 7c23 ldrb r3, [r4, #16] 8002368: f88d 3010 strb.w r3, [sp, #16] ret[MBIC_LENGTH_0] = (Length & 0xFF00) << 8; 800236c: f88d 5013 strb.w r5, [sp, #19] ret[MBIC_LENGTH_1] = Length & 0x00FF; 8002370: f88d 6014 strb.w r6, [sp, #20] ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8002374: f7ff ff10 bl 8002198 // data[MBIC_PAYLOADSTART + i] = data[i]; // } /* MBIC Header Data input */ for(int i = 0; i < MBIC_HEADER_SIZE; i++){ 8002378: 462b mov r3, r5 ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 800237a: f88d 0015 strb.w r0, [sp, #21] if(i == MBIC_CMD_0) /*cmd exception*/ 800237e: 2b12 cmp r3, #18 continue; data[i] = ret[i]; 8002380: bf1c itt ne 8002382: f818 2003 ldrbne.w r2, [r8, r3] 8002386: 54e2 strbne r2, [r4, r3] for(int i = 0; i < MBIC_HEADER_SIZE; i++){ 8002388: 3301 adds r3, #1 800238a: 2b16 cmp r3, #22 800238c: d1f7 bne.n 800237e 800238e: 2300 movs r3, #0 8002390: 3301 adds r3, #1 } /* MBIC Tail Data input */ for(int i = MBIC_HEADER_SIZE + Length; i < MBIC_HEADER_SIZE + MBIC_TAIL_SIZE + Length; i++){ 8002392: 2b04 cmp r3, #4 8002394: d103 bne.n 800239e // ret[MBIC_PAYLOADSTART + i] = data[i]; // for(int i = 0; i < Length; i++) // printf("MBIC : %x \r\n",data[i]); return data; } 8002396: 4620 mov r0, r4 8002398: 46bd mov sp, r7 800239a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} data[i] = ret[i]; 800239e: 199a adds r2, r3, r6 80023a0: 18a1 adds r1, r4, r2 80023a2: 4442 add r2, r8 80023a4: 7d52 ldrb r2, [r2, #21] 80023a6: 754a strb r2, [r1, #21] 80023a8: e7f2 b.n 8002390 ... 080023ac : } #endif // PYJ.2019.03.27_END -- } void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){ 80023ac: b510 push {r4, lr} // printf("RX"); // for(int i = 0; i < 128; i++) // printf("%c",*data++); switch(cmd){ 80023ae: 7c83 ldrb r3, [r0, #18] void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){ 80023b0: 4604 mov r4, r0 switch(cmd){ 80023b2: 2b11 cmp r3, #17 80023b4: d022 beq.n 80023fc 80023b6: d803 bhi.n 80023c0 80023b8: b143 cbz r3, 80023cc 80023ba: 2b10 cmp r3, #16 80023bc: d008 beq.n 80023d0 80023be: bd10 pop {r4, pc} 80023c0: 2b13 cmp r3, #19 80023c2: d040 beq.n 8002446 80023c4: d332 bcc.n 800242c 80023c6: 2b14 cmp r3, #20 80023c8: d04a beq.n 8002460 80023ca: bd10 pop {r4, pc} case 0: Jump_App(); 80023cc: f000 fac8 bl 8002960 data[MBIC_PAYLOADSTART + index++] = data[MBIC_PAYLOADSTART + 3]; /*DOWNLOAD OPTION*/ data[MBIC_PAYLOADSTART + index++] = data[MBIC_PAYLOADSTART + 4]; Download_Option = data[MBIC_PAYLOADSTART + 4]; /*DOWNLOAD DELAY REQUEST*/ data[MBIC_PAYLOADSTART + index++] = 3; 80023d0: 2303 movs r3, #3 80023d2: 76e3 strb r3, [r4, #27] /*DOWNLOAD Reserve*/ data[MBIC_PAYLOADSTART + index++] = 0; 80023d4: 2300 movs r3, #0 80023d6: 7723 strb r3, [r4, #28] data[MBIC_PAYLOADSTART + index++] = 0; 80023d8: 7763 strb r3, [r4, #29] data[MBIC_PAYLOADSTART + index++] = 0; 80023da: 77a3 strb r3, [r4, #30] data[MBIC_PAYLOADSTART + index++] = 0; 80023dc: 77e3 strb r3, [r4, #31] data[MBIC_PAYLOADSTART + index++] = 0; 80023de: f884 3020 strb.w r3, [r4, #32] data[MBIC_PAYLOADSTART + index++] = 0; 80023e2: f884 3021 strb.w r3, [r4, #33] ; 0x21 cmd = MBIC_Notice_RSP; 80023e6: 2390 movs r3, #144 ; 0x90 data[MBIC_PAYLOADSTART + index++] = 0; break; default: return; } data[MBIC_CMD_0] = cmd; 80023e8: 74a3 strb r3, [r4, #18] data = MBIC_HeaderMergeFunction(data,index); // reponse 80023ea: 210c movs r1, #12 80023ec: 4620 mov r0, r4 80023ee: f7ff ff75 bl 80022dc // HAL_UART_Transmit_DMA(&huart1, data,22 + 3 + index); Uart1_Data_Send(data ,22 + 3 + index); } 80023f2: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(data ,22 + 3 + index); 80023f6: 2125 movs r1, #37 ; 0x25 80023f8: f001 b814 b.w 8003424 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 80023fc: 7ec3 ldrb r3, [r0, #27] Curr_Download_DataIndex = data[MBIC_PAYLOADSTART + 4] << 24; 80023fe: 7e82 ldrb r2, [r0, #26] Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8002400: 041b lsls r3, r3, #16 8002402: eb03 6302 add.w r3, r3, r2, lsl #24 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8002406: 7f42 ldrb r2, [r0, #29] Bank_Flash_write(data,FLASH_USER_START_ADDR); 8002408: 491c ldr r1, [pc, #112] ; (800247c ) Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 800240a: 4413 add r3, r2 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 6] << 8; 800240c: 7f02 ldrb r2, [r0, #28] Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 800240e: eb03 2302 add.w r3, r3, r2, lsl #8 8002412: 4a1b ldr r2, [pc, #108] ; (8002480 ) 8002414: 6013 str r3, [r2, #0] data[MBIC_PAYLOADSTART + index++] = 0; 8002416: 2300 movs r3, #0 8002418: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 800241a: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 800241c: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8002420: f880 3021 strb.w r3, [r0, #33] ; 0x21 Bank_Flash_write(data,FLASH_USER_START_ADDR); 8002424: f000 fbac bl 8002b80 cmd = MBIC_Download_DATA_RSP; 8002428: 2391 movs r3, #145 ; 0x91 break; 800242a: e7dd b.n 80023e8 data[MBIC_PAYLOADSTART + index++] = 3; 800242c: 2303 movs r3, #3 800242e: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 8002430: 2300 movs r3, #0 8002432: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8002434: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8002436: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8002438: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 800243a: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 800243e: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Download_Confirm_RSP; 8002442: 2392 movs r3, #146 ; 0x92 break; 8002444: e7d0 b.n 80023e8 data[MBIC_PAYLOADSTART + index++] = 3; 8002446: 2303 movs r3, #3 8002448: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 800244a: 2300 movs r3, #0 800244c: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 800244e: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8002450: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8002452: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8002454: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8002458: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Complete_Notice_RSP; 800245c: 2393 movs r3, #147 ; 0x93 break; 800245e: e7c3 b.n 80023e8 data[MBIC_PAYLOADSTART + index++] = 3; 8002460: 2303 movs r3, #3 8002462: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 8002464: 2300 movs r3, #0 8002466: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8002468: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 800246a: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 800246c: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 800246e: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8002472: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Reboot_Notice_RSP; 8002476: 2394 movs r3, #148 ; 0x94 break; 8002478: e7b6 b.n 80023e8 800247a: bf00 nop 800247c: 08008000 .word 0x08008000 8002480: 2000029c .word 0x2000029c 08002484 : printf("EEPROM INIT COMPLETE\r\n"); } #define MAXEEPROM_LENG 32 HAL_StatusTypeDef EEPROM_M24C08_Read(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size){ 8002484: b51f push {r0, r1, r2, r3, r4, lr} // uint16_t sizecnt = 0, //uint16_t sizeremain = 0; // uint16_t addrees_inc = 0; // ret = HAL_I2C_Mem_Read(&hi2c2, devid | ((Address & 0x0300) >> 7),((Address )), I2C_MEMADD_SIZE_8BIT, &data[0], size, 1024); ret = HAL_I2C_Mem_Read(&hi2c2, devid ,((Address )), I2C_MEMADD_SIZE_16BIT, &data[0], size, 1024); 8002486: f44f 6480 mov.w r4, #1024 ; 0x400 800248a: e88d 001c stmia.w sp, {r2, r3, r4} 800248e: 460a mov r2, r1 8002490: 2310 movs r3, #16 8002492: 4601 mov r1, r0 8002494: 4807 ldr r0, [pc, #28] ; (80024b4 ) 8002496: f7fe fe51 bl 800113c // EEPROM24XX_Load( Address,data, size); if(ret == HAL_ERROR) 800249a: 2801 cmp r0, #1 ret = HAL_I2C_Mem_Read(&hi2c2, devid ,((Address )), I2C_MEMADD_SIZE_16BIT, &data[0], size, 1024); 800249c: 4604 mov r4, r0 if(ret == HAL_ERROR) 800249e: d105 bne.n 80024ac printf("Write ERR\r\n"); 80024a0: 4805 ldr r0, [pc, #20] ; (80024b8 ) 80024a2: f001 f8a9 bl 80035f8 else HAL_Delay(20); return ret; } 80024a6: 4620 mov r0, r4 80024a8: b004 add sp, #16 80024aa: bd10 pop {r4, pc} HAL_Delay(20); 80024ac: 2014 movs r0, #20 80024ae: f7fd ff0d bl 80002cc 80024b2: e7f8 b.n 80024a6 80024b4: 200004d8 .word 0x200004d8 80024b8: 08004bc9 .word 0x08004bc9 080024bc : HAL_StatusTypeDef EEPROM_M24C08_write(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size){ 80024bc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} HAL_StatusTypeDef ret = HAL_ERROR; uint8_t sizecnt = 0,sizeremain = 0; uint16_t addrees_inc = 0; sizecnt = size /MAXEEPROM_LENG; 80024c0: f3c3 1447 ubfx r4, r3, #5, #8 HAL_StatusTypeDef EEPROM_M24C08_write(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size){ 80024c4: b087 sub sp, #28 sizeremain = size % MAXEEPROM_LENG; 80024c6: f003 031f and.w r3, r3, #31 HAL_StatusTypeDef EEPROM_M24C08_write(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size){ 80024ca: 4680 mov r8, r0 80024cc: 460f mov r7, r1 80024ce: 4691 mov r9, r2 sizeremain = size % MAXEEPROM_LENG; 80024d0: 9305 str r3, [sp, #20] addrees_inc = 0; if(sizecnt > 0){ 80024d2: 2c00 cmp r4, #0 80024d4: d038 beq.n 8002548 80024d6: f04f 0a00 mov.w sl, #0 80024da: 2501 movs r5, #1 80024dc: 4656 mov r6, sl for(int i = 0 ; i < sizecnt; i++ ){ addrees_inc = i * MAXEEPROM_LENG; ret = HAL_I2C_Mem_Write(&hi2c2, devid ,((Address + addrees_inc) & 0xFFFF) , I2C_MEMADD_SIZE_16BIT, &data[addrees_inc], MAXEEPROM_LENG, 1024); 80024de: fa1f fb80 uxth.w fp, r0 for(int i = 0 ; i < sizecnt; i++ ){ 80024e2: 45a2 cmp sl, r4 80024e4: db11 blt.n 800250a if(ret == HAL_ERROR) printf("Write ERR\r\n"); else HAL_Delay(20); } addrees_inc += MAXEEPROM_LENG; 80024e6: f106 0420 add.w r4, r6, #32 80024ea: b2a4 uxth r4, r4 } // printf("Remain Data Index : %d \r\n",sizeremain); if(sizeremain > 0){ 80024ec: 9b05 ldr r3, [sp, #20] 80024ee: b143 cbz r3, 8002502 80024f0: 2600 movs r6, #0 // printf("Remain Data Write Start "); for(int i = 0; i < sizeremain; i++){ ret = HAL_I2C_Mem_Write(&hi2c2, devid ,((Address + addrees_inc + i)& 0xFFFF) , I2C_MEMADD_SIZE_16BIT, &data[addrees_inc + i], 1, 1024); 80024f2: f8df a090 ldr.w sl, [pc, #144] ; 8002584 // EEPROM24XX_Save( Address,data, size); if(ret == HAL_ERROR) printf("Write ERR\r\n"); 80024f6: f8df b090 ldr.w fp, [pc, #144] ; 8002588 ret = HAL_I2C_Mem_Write(&hi2c2, devid ,((Address + addrees_inc + i)& 0xFFFF) , I2C_MEMADD_SIZE_16BIT, &data[addrees_inc + i], 1, 1024); 80024fa: 4427 add r7, r4 for(int i = 0; i < sizeremain; i++){ 80024fc: 9b05 ldr r3, [sp, #20] 80024fe: 429e cmp r6, r3 8002500: db24 blt.n 800254c HAL_Delay(20); } } return ret; } 8002502: 4628 mov r0, r5 8002504: b007 add sp, #28 8002506: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} ret = HAL_I2C_Mem_Write(&hi2c2, devid ,((Address + addrees_inc) & 0xFFFF) , I2C_MEMADD_SIZE_16BIT, &data[addrees_inc], MAXEEPROM_LENG, 1024); 800250a: f44f 6380 mov.w r3, #1024 ; 0x400 800250e: 9302 str r3, [sp, #8] 8002510: 2320 movs r3, #32 8002512: ea4f 164a mov.w r6, sl, lsl #5 8002516: b2b6 uxth r6, r6 8002518: 9301 str r3, [sp, #4] 800251a: 19ba adds r2, r7, r6 800251c: eb09 0306 add.w r3, r9, r6 8002520: 9300 str r3, [sp, #0] 8002522: b292 uxth r2, r2 8002524: 2310 movs r3, #16 8002526: 4659 mov r1, fp 8002528: 4816 ldr r0, [pc, #88] ; (8002584 ) 800252a: f7fe fd71 bl 8001010 if(ret == HAL_ERROR) 800252e: 2801 cmp r0, #1 ret = HAL_I2C_Mem_Write(&hi2c2, devid ,((Address + addrees_inc) & 0xFFFF) , I2C_MEMADD_SIZE_16BIT, &data[addrees_inc], MAXEEPROM_LENG, 1024); 8002530: 4605 mov r5, r0 if(ret == HAL_ERROR) 8002532: d105 bne.n 8002540 printf("Write ERR\r\n"); 8002534: 4814 ldr r0, [pc, #80] ; (8002588 ) 8002536: f001 f85f bl 80035f8 for(int i = 0 ; i < sizecnt; i++ ){ 800253a: f10a 0a01 add.w sl, sl, #1 800253e: e7d0 b.n 80024e2 HAL_Delay(20); 8002540: 2014 movs r0, #20 8002542: f7fd fec3 bl 80002cc 8002546: e7f8 b.n 800253a HAL_StatusTypeDef ret = HAL_ERROR; 8002548: 2501 movs r5, #1 800254a: e7cf b.n 80024ec ret = HAL_I2C_Mem_Write(&hi2c2, devid ,((Address + addrees_inc + i)& 0xFFFF) , I2C_MEMADD_SIZE_16BIT, &data[addrees_inc + i], 1, 1024); 800254c: f44f 6380 mov.w r3, #1024 ; 0x400 8002550: 9302 str r3, [sp, #8] 8002552: 2301 movs r3, #1 8002554: 9301 str r3, [sp, #4] 8002556: 19a3 adds r3, r4, r6 8002558: 444b add r3, r9 800255a: 19ba adds r2, r7, r6 800255c: 9300 str r3, [sp, #0] 800255e: b292 uxth r2, r2 8002560: 2310 movs r3, #16 8002562: 4641 mov r1, r8 8002564: 4650 mov r0, sl 8002566: f7fe fd53 bl 8001010 if(ret == HAL_ERROR) 800256a: 2801 cmp r0, #1 ret = HAL_I2C_Mem_Write(&hi2c2, devid ,((Address + addrees_inc + i)& 0xFFFF) , I2C_MEMADD_SIZE_16BIT, &data[addrees_inc + i], 1, 1024); 800256c: 4605 mov r5, r0 if(ret == HAL_ERROR) 800256e: d104 bne.n 800257a printf("Write ERR\r\n"); 8002570: 4658 mov r0, fp 8002572: f001 f841 bl 80035f8 for(int i = 0; i < sizeremain; i++){ 8002576: 3601 adds r6, #1 8002578: e7c0 b.n 80024fc HAL_Delay(20); 800257a: 2014 movs r0, #20 800257c: f7fd fea6 bl 80002cc 8002580: e7f9 b.n 8002576 8002582: bf00 nop 8002584: 200004d8 .word 0x200004d8 8002588: 08004bc9 .word 0x08004bc9 0800258c : void EEPROM_M24C08_Init(void){ 800258c: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_WINDOW_STATUS_ADDRESDS,&bluecell_Currdatastatus.bluecell_header,sizeof(BLUESTATUS_st) ); 8002590: 4eb4 ldr r6, [pc, #720] ; (8002864 ) void EEPROM_M24C08_Init(void){ 8002592: b085 sub sp, #20 EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_WINDOW_STATUS_ADDRESDS,&bluecell_Currdatastatus.bluecell_header,sizeof(BLUESTATUS_st) ); 8002594: f44f 73b0 mov.w r3, #352 ; 0x160 8002598: 4632 mov r2, r6 800259a: f44f 612e mov.w r1, #2784 ; 0xae0 800259e: 20a0 movs r0, #160 ; 0xa0 80025a0: f7ff ff70 bl 8002484 printf("Flash Init \r\n"); 80025a4: 48b0 ldr r0, [pc, #704] ; (8002868 ) 80025a6: f001 f827 bl 80035f8 bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime1 = Bank1data[MBIC_BOOT_CREATION_TIME + 0]; 80025aa: 4bb0 ldr r3, [pc, #704] ; (800286c ) printf("BANK1 IMAGE NAME : "); 80025ac: 48b0 ldr r0, [pc, #704] ; (8002870 ) bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime1 = Bank1data[MBIC_BOOT_CREATION_TIME + 0]; 80025ae: f893 2037 ldrb.w r2, [r3, #55] ; 0x37 pdata[i] = Bank1data[MBIC_BOOT_FILENAME + i]; 80025b2: f8df 8360 ldr.w r8, [pc, #864] ; 8002914 bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime1 = Bank1data[MBIC_BOOT_CREATION_TIME + 0]; 80025b6: f886 2079 strb.w r2, [r6, #121] ; 0x79 bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime2 = Bank1data[MBIC_BOOT_CREATION_TIME + 1]; 80025ba: f893 2038 ldrb.w r2, [r3, #56] ; 0x38 for(int i = 0 ; i< 32; i++){ 80025be: 4dad ldr r5, [pc, #692] ; (8002874 ) bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime2 = Bank1data[MBIC_BOOT_CREATION_TIME + 1]; 80025c0: f886 207a strb.w r2, [r6, #122] ; 0x7a bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime3 = Bank1data[MBIC_BOOT_CREATION_TIME + 2]; 80025c4: f893 2039 ldrb.w r2, [r3, #57] ; 0x39 80025c8: f886 207b strb.w r2, [r6, #123] ; 0x7b bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime4 = Bank1data[MBIC_BOOT_CREATION_TIME + 3]; 80025cc: f893 203a ldrb.w r2, [r3, #58] ; 0x3a 80025d0: f886 207c strb.w r2, [r6, #124] ; 0x7c bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime5 = Bank1data[MBIC_BOOT_CREATION_TIME + 4]; 80025d4: f893 203b ldrb.w r2, [r3, #59] ; 0x3b 80025d8: f886 207d strb.w r2, [r6, #125] ; 0x7d bluecell_Currdatastatus.CPU_Bank1_Image_BuildTime6 = Bank1data[MBIC_BOOT_CREATION_TIME + 5]; 80025dc: f893 203c ldrb.w r2, [r3, #60] ; 0x3c 80025e0: f886 207e strb.w r2, [r6, #126] ; 0x7e bluecell_Currdatastatus.CPU_Bank1_Image_Version1 = Bank1data[MBIC_BOOT_VERSION + 0]; 80025e4: 7ada ldrb r2, [r3, #11] 80025e6: f886 2076 strb.w r2, [r6, #118] ; 0x76 bluecell_Currdatastatus.CPU_Bank1_Image_Version2 = Bank1data[MBIC_BOOT_VERSION + 1]; 80025ea: 7b1a ldrb r2, [r3, #12] 80025ec: f886 2077 strb.w r2, [r6, #119] ; 0x77 bluecell_Currdatastatus.CPU_Bank1_Image_Version3 = Bank1data[MBIC_BOOT_VERSION + 2]; 80025f0: 7b5b ldrb r3, [r3, #13] 80025f2: f886 3078 strb.w r3, [r6, #120] ; 0x78 printf("BANK1 IMAGE NAME : "); 80025f6: f000 ff77 bl 80034e8 80025fa: 4b9f ldr r3, [pc, #636] ; (8002878 ) 80025fc: 461c mov r4, r3 pdata[i] = Bank1data[MBIC_BOOT_FILENAME + i]; 80025fe: 7858 ldrb r0, [r3, #1] 8002600: 1c5f adds r7, r3, #1 8002602: 4443 add r3, r8 8002604: 54f0 strb r0, [r6, r3] printf("%c",pdata[i]); 8002606: f000 ff87 bl 8003518 for(int i = 0 ; i< 32; i++){ 800260a: 42af cmp r7, r5 800260c: 463b mov r3, r7 800260e: d1f6 bne.n 80025fe printf("\r\n"); 8002610: 489a ldr r0, [pc, #616] ; (800287c ) 8002612: f000 fff1 bl 80035f8 bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime1 = Bank2data[MBIC_BOOT_CREATION_TIME + 0]; 8002616: 4b9a ldr r3, [pc, #616] ; (8002880 ) printf("BANK2 IMAGE NAME : "); 8002618: 489a ldr r0, [pc, #616] ; (8002884 ) bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime1 = Bank2data[MBIC_BOOT_CREATION_TIME + 0]; 800261a: f893 2037 ldrb.w r2, [r3, #55] ; 0x37 pdata[i] = Bank2data[MBIC_BOOT_FILENAME + i]; 800261e: f8df 92f8 ldr.w r9, [pc, #760] ; 8002918 bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime1 = Bank2data[MBIC_BOOT_CREATION_TIME + 0]; 8002622: f886 20a2 strb.w r2, [r6, #162] ; 0xa2 bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime2 = Bank2data[MBIC_BOOT_CREATION_TIME + 1]; 8002626: f893 2038 ldrb.w r2, [r3, #56] ; 0x38 for(int i = 0 ; i< 32; i++){ 800262a: 4f97 ldr r7, [pc, #604] ; (8002888 ) bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime2 = Bank2data[MBIC_BOOT_CREATION_TIME + 1]; 800262c: f886 20a3 strb.w r2, [r6, #163] ; 0xa3 bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime3 = Bank2data[MBIC_BOOT_CREATION_TIME + 2]; 8002630: f893 2039 ldrb.w r2, [r3, #57] ; 0x39 8002634: f886 20a4 strb.w r2, [r6, #164] ; 0xa4 bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime4 = Bank2data[MBIC_BOOT_CREATION_TIME + 3]; 8002638: f893 203a ldrb.w r2, [r3, #58] ; 0x3a 800263c: f886 20a5 strb.w r2, [r6, #165] ; 0xa5 bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime5 = Bank2data[MBIC_BOOT_CREATION_TIME + 4]; 8002640: f893 203b ldrb.w r2, [r3, #59] ; 0x3b 8002644: f886 20a6 strb.w r2, [r6, #166] ; 0xa6 bluecell_Currdatastatus.CPU_Bank2_Image_BuildTime6 = Bank2data[MBIC_BOOT_CREATION_TIME + 5]; 8002648: f893 203c ldrb.w r2, [r3, #60] ; 0x3c 800264c: f886 20a7 strb.w r2, [r6, #167] ; 0xa7 bluecell_Currdatastatus.CPU_Bank2_Image_Version1 = Bank2data[MBIC_BOOT_VERSION + 0]; 8002650: 7ada ldrb r2, [r3, #11] 8002652: f886 209f strb.w r2, [r6, #159] ; 0x9f bluecell_Currdatastatus.CPU_Bank2_Image_Version2 = Bank2data[MBIC_BOOT_VERSION + 1]; 8002656: 7b1a ldrb r2, [r3, #12] 8002658: f886 20a0 strb.w r2, [r6, #160] ; 0xa0 bluecell_Currdatastatus.CPU_Bank2_Image_Version3 = Bank2data[MBIC_BOOT_VERSION + 2]; 800265c: 7b5b ldrb r3, [r3, #13] 800265e: f886 30a1 strb.w r3, [r6, #161] ; 0xa1 printf("BANK2 IMAGE NAME : "); 8002662: f000 ff41 bl 80034e8 8002666: 4b89 ldr r3, [pc, #548] ; (800288c ) 8002668: 461d mov r5, r3 pdata[i] = Bank2data[MBIC_BOOT_FILENAME + i]; 800266a: 7858 ldrb r0, [r3, #1] 800266c: f103 0801 add.w r8, r3, #1 8002670: 444b add r3, r9 8002672: 54f0 strb r0, [r6, r3] printf("%c",pdata[i]); 8002674: f000 ff50 bl 8003518 for(int i = 0 ; i< 32; i++){ 8002678: 45b8 cmp r8, r7 800267a: 4643 mov r3, r8 800267c: d1f5 bne.n 800266a printf("\r\n"); 800267e: 487f ldr r0, [pc, #508] ; (800287c ) 8002680: f000 ffba bl 80035f8 Currdata[MBIC_BOOT_CREATION_TIME + 5] 8002684: 4882 ldr r0, [pc, #520] ; (8002890 ) Currdata[MBIC_BOOT_CREATION_TIME + 2], 8002686: 4b83 ldr r3, [pc, #524] ; (8002894 ) printf("20%d Y / %d M / %d D / %d H / %d M / %d S \r\n", 8002688: 7800 ldrb r0, [r0, #0] Currdata[MBIC_BOOT_CREATION_TIME + 1], 800268a: 4a83 ldr r2, [pc, #524] ; (8002898 ) Currdata[MBIC_BOOT_CREATION_TIME + 0], 800268c: 4983 ldr r1, [pc, #524] ; (800289c ) printf("20%d Y / %d M / %d D / %d H / %d M / %d S \r\n", 800268e: 781b ldrb r3, [r3, #0] 8002690: 7812 ldrb r2, [r2, #0] 8002692: 7809 ldrb r1, [r1, #0] 8002694: 9002 str r0, [sp, #8] Currdata[MBIC_BOOT_CREATION_TIME + 4], 8002696: 4882 ldr r0, [pc, #520] ; (80028a0 ) printf("20%d Y / %d M / %d D / %d H / %d M / %d S \r\n", 8002698: 7800 ldrb r0, [r0, #0] 800269a: 9001 str r0, [sp, #4] Currdata[MBIC_BOOT_CREATION_TIME + 3], 800269c: 4881 ldr r0, [pc, #516] ; (80028a4 ) printf("20%d Y / %d M / %d D / %d H / %d M / %d S \r\n", 800269e: 7800 ldrb r0, [r0, #0] 80026a0: 9000 str r0, [sp, #0] 80026a2: 4881 ldr r0, [pc, #516] ; (80028a8 ) 80026a4: f000 ff20 bl 80034e8 if(Currdata[MBIC_BOOT_VERSION + 0] == Bank1data[MBIC_BOOT_VERSION + 0] 80026a8: 4b80 ldr r3, [pc, #512] ; (80028ac ) 80026aa: 4a81 ldr r2, [pc, #516] ; (80028b0 ) 80026ac: 781b ldrb r3, [r3, #0] 80026ae: 7812 ldrb r2, [r2, #0] 80026b0: 429a cmp r2, r3 80026b2: d10c bne.n 80026ce &&Currdata[MBIC_BOOT_VERSION + 1] == Bank1data[MBIC_BOOT_VERSION + 1] 80026b4: 4a7f ldr r2, [pc, #508] ; (80028b4 ) 80026b6: 7811 ldrb r1, [r2, #0] 80026b8: f502 3200 add.w r2, r2, #131072 ; 0x20000 80026bc: 3280 adds r2, #128 ; 0x80 80026be: 7812 ldrb r2, [r2, #0] 80026c0: 4291 cmp r1, r2 80026c2: d104 bne.n 80026ce &&Currdata[MBIC_BOOT_VERSION + 2] == Bank1data[MBIC_BOOT_VERSION + 2]){ 80026c4: 4a7c ldr r2, [pc, #496] ; (80028b8 ) 80026c6: 7811 ldrb r1, [r2, #0] 80026c8: 7822 ldrb r2, [r4, #0] 80026ca: 4291 cmp r1, r2 80026cc: d03a beq.n 8002744 Currdata[MBIC_BOOT_VERSION + 0] == Bank2data[MBIC_BOOT_VERSION + 0] 80026ce: 4a7b ldr r2, [pc, #492] ; (80028bc ) }else if( 80026d0: 7812 ldrb r2, [r2, #0] 80026d2: 429a cmp r2, r3 80026d4: d138 bne.n 8002748 &&Currdata[MBIC_BOOT_VERSION + 1] == Bank2data[MBIC_BOOT_VERSION + 1] 80026d6: 4b77 ldr r3, [pc, #476] ; (80028b4 ) 80026d8: 781a ldrb r2, [r3, #0] 80026da: f503 2380 add.w r3, r3, #262144 ; 0x40000 80026de: 3380 adds r3, #128 ; 0x80 80026e0: 781b ldrb r3, [r3, #0] 80026e2: 429a cmp r2, r3 80026e4: d130 bne.n 8002748 &&Currdata[MBIC_BOOT_VERSION + 2] == Bank2data[MBIC_BOOT_VERSION + 2]){ 80026e6: 4b74 ldr r3, [pc, #464] ; (80028b8 ) 80026e8: 7819 ldrb r1, [r3, #0] 80026ea: 782b ldrb r3, [r5, #0] ret = HFR_BANK2_SEL; 80026ec: 4299 cmp r1, r3 80026ee: bf0c ite eq 80026f0: 2102 moveq r1, #2 80026f2: 2100 movne r1, #0 printf("MBIC BANK %d Booting \r\n",bluecell_Currdatastatus.CPU_Current_Bank); 80026f4: 4872 ldr r0, [pc, #456] ; (80028c0 ) bluecell_Currdatastatus.CPU_Current_Bank = ret; 80026f6: f886 1074 strb.w r1, [r6, #116] ; 0x74 printf("MBIC BANK %d Booting \r\n",bluecell_Currdatastatus.CPU_Current_Bank); 80026fa: f000 fef5 bl 80034e8 printf("bluecell_Currdatastatus.CPU_Bank_Select : %d \r\n",bluecell_Currdatastatus.CPU_Bank_Select); 80026fe: f896 1075 ldrb.w r1, [r6, #117] ; 0x75 8002702: 4870 ldr r0, [pc, #448] ; (80028c4 ) 8002704: f000 fef0 bl 80034e8 if(bluecell_Currdatastatus.CPU_Bank_Select == HFR_BANK2_SEL) 8002708: f896 3075 ldrb.w r3, [r6, #117] ; 0x75 800270c: 2b02 cmp r3, #2 800270e: d11d bne.n 800274c | Bank2data[MBIC_BOOT_CRC + 1]<<16 8002710: 4a6d ldr r2, [pc, #436] ; (80028c8 ) ((Bank2data[MBIC_BOOT_CRC] << 24 ) 8002712: 4b6e ldr r3, [pc, #440] ; (80028cc ) | Bank2data[MBIC_BOOT_CRC + 1]<<16 8002714: 7815 ldrb r5, [r2, #0] ((Bank2data[MBIC_BOOT_CRC] << 24 ) 8002716: 781b ldrb r3, [r3, #0] | Bank2data[MBIC_BOOT_CRC + 1]<<16 8002718: 042d lsls r5, r5, #16 800271a: ea45 6503 orr.w r5, r5, r3, lsl #24 | Bank2data[MBIC_BOOT_CRC + 3]); 800271e: 4b6c ldr r3, [pc, #432] ; (80028d0 ) 8002720: 781b ldrb r3, [r3, #0] 8002722: 431d orrs r5, r3 | Bank2data[MBIC_BOOT_CRC + 2]<<8 8002724: 4b6b ldr r3, [pc, #428] ; (80028d4 ) 8002726: 781b ldrb r3, [r3, #0] | Bank2data[MBIC_BOOT_CRC + 3]); 8002728: ea45 2503 orr.w r5, r5, r3, lsl #8 ((Bank2data[MBIC_BOOT_LENGTH] << 24 ) 800272c: 4b6a ldr r3, [pc, #424] ; (80028d8 ) | Bank2data[MBIC_BOOT_LENGTH + 1]<<16 800272e: 785c ldrb r4, [r3, #1] ((Bank2data[MBIC_BOOT_LENGTH] << 24 ) 8002730: 781a ldrb r2, [r3, #0] | Bank2data[MBIC_BOOT_LENGTH + 1]<<16 8002732: 0424 lsls r4, r4, #16 8002734: ea44 6402 orr.w r4, r4, r2, lsl #24 | Bank2data[MBIC_BOOT_LENGTH + 3]); 8002738: 78da ldrb r2, [r3, #3] 800273a: 4314 orrs r4, r2 | Bank2data[MBIC_BOOT_LENGTH + 2]<<8 800273c: 789a ldrb r2, [r3, #2] | Bank2data[MBIC_BOOT_LENGTH + 3]); 800273e: ea44 2402 orr.w r4, r4, r2, lsl #8 8002742: e055 b.n 80027f0 ret = HFR_BANK1_SEL; 8002744: 2101 movs r1, #1 8002746: e7d5 b.n 80026f4 ret = 0; 8002748: 2100 movs r1, #0 800274a: e7d3 b.n 80026f4 else if(bluecell_Currdatastatus.CPU_Bank_Select == HFR_BANK1_SEL) 800274c: 2b01 cmp r3, #1 800274e: d12c bne.n 80027aa | Bank1data[MBIC_BOOT_CRC + 1]<<16 8002750: 4a62 ldr r2, [pc, #392] ; (80028dc ) ((Bank1data[MBIC_BOOT_CRC] << 24 ) 8002752: 4b63 ldr r3, [pc, #396] ; (80028e0 ) | Bank1data[MBIC_BOOT_CRC + 1]<<16 8002754: 7815 ldrb r5, [r2, #0] ((Bank1data[MBIC_BOOT_CRC] << 24 ) 8002756: 781b ldrb r3, [r3, #0] | Bank1data[MBIC_BOOT_CRC + 1]<<16 8002758: 042d lsls r5, r5, #16 800275a: ea45 6503 orr.w r5, r5, r3, lsl #24 | Bank1data[MBIC_BOOT_CRC + 3]); 800275e: 4b61 ldr r3, [pc, #388] ; (80028e4 ) crcret = crc32(&Bank1data[MBIC_BOOT_DATA], CrcLength); 8002760: 4861 ldr r0, [pc, #388] ; (80028e8 ) | Bank1data[MBIC_BOOT_CRC + 3]); 8002762: 781b ldrb r3, [r3, #0] 8002764: 431d orrs r5, r3 | Bank1data[MBIC_BOOT_CRC + 2]<<8 8002766: 4b61 ldr r3, [pc, #388] ; (80028ec ) 8002768: 781b ldrb r3, [r3, #0] | Bank1data[MBIC_BOOT_CRC + 3]); 800276a: ea45 2503 orr.w r5, r5, r3, lsl #8 ((Bank1data[MBIC_BOOT_LENGTH] << 24 ) 800276e: 4b60 ldr r3, [pc, #384] ; (80028f0 ) | Bank1data[MBIC_BOOT_LENGTH + 1]<<16 8002770: 785c ldrb r4, [r3, #1] ((Bank1data[MBIC_BOOT_LENGTH] << 24 ) 8002772: 781a ldrb r2, [r3, #0] | Bank1data[MBIC_BOOT_LENGTH + 1]<<16 8002774: 0424 lsls r4, r4, #16 8002776: ea44 6402 orr.w r4, r4, r2, lsl #24 | Bank1data[MBIC_BOOT_LENGTH + 3]); 800277a: 78da ldrb r2, [r3, #3] 800277c: 4314 orrs r4, r2 | Bank1data[MBIC_BOOT_LENGTH + 2]<<8 800277e: 789a ldrb r2, [r3, #2] | Bank1data[MBIC_BOOT_LENGTH + 3]); 8002780: ea44 2402 orr.w r4, r4, r2, lsl #8 crcret = crc32(&Bank1data[MBIC_BOOT_DATA], CrcLength); 8002784: 4621 mov r1, r4 crcret = crc32(&Bank2data[MBIC_BOOT_DATA], CrcLength); 8002786: f7ff fd95 bl 80022b4 800278a: 4607 mov r7, r0 printf("CRC LENGTH : %d,CRC LENGTH : %X \r\n",CrcLength,CrcLength); 800278c: 4622 mov r2, r4 800278e: 4621 mov r1, r4 8002790: 4858 ldr r0, [pc, #352] ; (80028f4 ) 8002792: f000 fea9 bl 80034e8 if(crcret != FileCrc){ 8002796: 42bd cmp r5, r7 printf("CRC ERROR : %x , File CRC : %x \r\n",crcret,FileCrc); 8002798: 462a mov r2, r5 if(crcret != FileCrc){ 800279a: d030 beq.n 80027fe printf("CRC ERROR : %x , File CRC : %x \r\n",crcret,FileCrc); 800279c: 4639 mov r1, r7 800279e: 4856 ldr r0, [pc, #344] ; (80028f8 ) } 80027a0: b005 add sp, #20 80027a2: e8bd 43f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} printf("CRC ERROR : %x , File CRC : %x \r\n",crcret,FileCrc); 80027a6: f000 be9f b.w 80034e8 else if(bluecell_Currdatastatus.CPU_Bank_Select == HFR_AUTO_SEL) 80027aa: 2b03 cmp r3, #3 80027ac: d123 bne.n 80027f6 if(bluecell_Currdatastatus.CPU_Current_Bank == HFR_BANK1_SEL) 80027ae: f896 3074 ldrb.w r3, [r6, #116] ; 0x74 80027b2: 2b01 cmp r3, #1 80027b4: d1ac bne.n 8002710 | Bank1data[MBIC_BOOT_CRC + 1]<<16 80027b6: 4a49 ldr r2, [pc, #292] ; (80028dc ) ((Bank1data[MBIC_BOOT_CRC] << 24 ) 80027b8: 4b49 ldr r3, [pc, #292] ; (80028e0 ) | Bank1data[MBIC_BOOT_CRC + 1]<<16 80027ba: 7815 ldrb r5, [r2, #0] ((Bank1data[MBIC_BOOT_CRC] << 24 ) 80027bc: 781b ldrb r3, [r3, #0] | Bank1data[MBIC_BOOT_CRC + 1]<<16 80027be: 042d lsls r5, r5, #16 80027c0: ea45 6503 orr.w r5, r5, r3, lsl #24 | Bank1data[MBIC_BOOT_CRC + 3]); 80027c4: 4b47 ldr r3, [pc, #284] ; (80028e4 ) crcret = crc32(&Bank1data[MBIC_BOOT_DATA], CrcLength); 80027c6: 4848 ldr r0, [pc, #288] ; (80028e8 ) | Bank1data[MBIC_BOOT_CRC + 3]); 80027c8: 781b ldrb r3, [r3, #0] 80027ca: 431d orrs r5, r3 | Bank1data[MBIC_BOOT_CRC + 2]<<8 80027cc: 4b47 ldr r3, [pc, #284] ; (80028ec ) 80027ce: 781b ldrb r3, [r3, #0] | Bank1data[MBIC_BOOT_CRC + 3]); 80027d0: ea45 2503 orr.w r5, r5, r3, lsl #8 ((Bank1data[MBIC_BOOT_LENGTH] << 24 ) 80027d4: 4b46 ldr r3, [pc, #280] ; (80028f0 ) | Bank1data[MBIC_BOOT_LENGTH + 1]<<16 80027d6: 785c ldrb r4, [r3, #1] ((Bank1data[MBIC_BOOT_LENGTH] << 24 ) 80027d8: 781a ldrb r2, [r3, #0] | Bank1data[MBIC_BOOT_LENGTH + 1]<<16 80027da: 0424 lsls r4, r4, #16 80027dc: ea44 6402 orr.w r4, r4, r2, lsl #24 | Bank1data[MBIC_BOOT_LENGTH + 3]); 80027e0: 78da ldrb r2, [r3, #3] 80027e2: 4314 orrs r4, r2 | Bank1data[MBIC_BOOT_LENGTH + 2]<<8 80027e4: 789a ldrb r2, [r3, #2] | Bank1data[MBIC_BOOT_LENGTH + 3]); 80027e6: ea44 2402 orr.w r4, r4, r2, lsl #8 crcret = crc32(&Bank1data[MBIC_BOOT_DATA], CrcLength); 80027ea: 4621 mov r1, r4 80027ec: f7ff fd62 bl 80022b4 crcret = crc32(&Bank2data[MBIC_BOOT_DATA], CrcLength); 80027f0: 4621 mov r1, r4 80027f2: 4842 ldr r0, [pc, #264] ; (80028fc ) 80027f4: e7c7 b.n 8002786 uint32_t crcret=0; 80027f6: 2700 movs r7, #0 uint32_t CrcLength = 0; 80027f8: 463c mov r4, r7 uint32_t FileCrc = 0; 80027fa: 463d mov r5, r7 80027fc: e7c6 b.n 800278c printf("CRC SUCCESS : %x , File CRC : %x \r\n",crcret,FileCrc); 80027fe: 4629 mov r1, r5 8002800: 483f ldr r0, [pc, #252] ; (8002900 ) 8002802: f000 fe71 bl 80034e8 if(bluecell_Currdatastatus.CPU_Bank_Select == HFR_BANK1_SEL && bluecell_Currdatastatus.CPU_Current_Bank != HFR_BANK1_SEL){ 8002806: f896 3075 ldrb.w r3, [r6, #117] ; 0x75 800280a: 2b01 cmp r3, #1 800280c: d11b bne.n 8002846 800280e: f896 3074 ldrb.w r3, [r6, #116] ; 0x74 8002812: 2b01 cmp r3, #1 8002814: d009 beq.n 800282a printf("Write Start BANK 1 Down Start\r\n"); 8002816: 483b ldr r0, [pc, #236] ; (8002904 ) 8002818: f000 feee bl 80035f8 MBIC_BankBooting_Flash_write((uint32_t*)FLASH_USER_BANK1_START_ADDR,FLASH_MBICUSER_START_ADDR); 800281c: 493a ldr r1, [pc, #232] ; (8002908 ) 800281e: 4813 ldr r0, [pc, #76] ; (800286c ) 8002820: f000 f9fe bl 8002c20 bluecell_Currdatastatus.CPU_Bank_Select = 5; 8002824: 2305 movs r3, #5 bluecell_Currdatastatus.CPU_Bank_Select = 3; 8002826: f886 3075 strb.w r3, [r6, #117] ; 0x75 EEPROM_M24C08_write(EEPROM_M24C08_ID ,(EEPROM_WINDOW_STATUS_ADDRESDS),&bluecell_Currdatastatus.bluecell_header,sizeof(BLUESTATUS_st)); 800282a: f44f 73b0 mov.w r3, #352 ; 0x160 800282e: 4a0d ldr r2, [pc, #52] ; (8002864 ) 8002830: f44f 612e mov.w r1, #2784 ; 0xae0 8002834: 20a0 movs r0, #160 ; 0xa0 8002836: f7ff fe41 bl 80024bc printf("EEPROM INIT COMPLETE\r\n"); 800283a: 4834 ldr r0, [pc, #208] ; (800290c ) } 800283c: b005 add sp, #20 800283e: e8bd 43f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, lr} printf("EEPROM INIT COMPLETE\r\n"); 8002842: f000 bed9 b.w 80035f8 }else if(bluecell_Currdatastatus.CPU_Bank_Select == HFR_BANK2_SEL && bluecell_Currdatastatus.CPU_Current_Bank != HFR_BANK2_SEL){ 8002846: 2b02 cmp r3, #2 8002848: d168 bne.n 800291c 800284a: f896 3074 ldrb.w r3, [r6, #116] ; 0x74 800284e: 2b02 cmp r3, #2 8002850: d0eb beq.n 800282a printf("Write Start BANK 2 Down Start\r\n"); 8002852: 482f ldr r0, [pc, #188] ; (8002910 ) 8002854: f000 fed0 bl 80035f8 MBIC_BankBooting_Flash_write((uint32_t*)FLASH_USER_BANK2_START_ADDR,FLASH_MBICUSER_START_ADDR); 8002858: 492b ldr r1, [pc, #172] ; (8002908 ) 800285a: 4809 ldr r0, [pc, #36] ; (8002880 ) 800285c: f000 f9e0 bl 8002c20 bluecell_Currdatastatus.CPU_Bank_Select = 6; 8002860: 2306 movs r3, #6 8002862: e7e0 b.n 8002826 8002864: 20000328 .word 0x20000328 8002868: 08004a18 .word 0x08004a18 800286c: 08028000 .word 0x08028000 8002870: 08004a25 .word 0x08004a25 8002874: 0802802d .word 0x0802802d 8002878: 0802800d .word 0x0802800d 800287c: 08004d07 .word 0x08004d07 8002880: 08048000 .word 0x08048000 8002884: 08004a39 .word 0x08004a39 8002888: 0804802d .word 0x0804802d 800288c: 0804800d .word 0x0804800d 8002890: 08007fbc .word 0x08007fbc 8002894: 08007fb9 .word 0x08007fb9 8002898: 08007fb8 .word 0x08007fb8 800289c: 08007fb7 .word 0x08007fb7 80028a0: 08007fbb .word 0x08007fbb 80028a4: 08007fba .word 0x08007fba 80028a8: 08004a4d .word 0x08004a4d 80028ac: 08007f8b .word 0x08007f8b 80028b0: 0802800b .word 0x0802800b 80028b4: 08007f8c .word 0x08007f8c 80028b8: 08007f8d .word 0x08007f8d 80028bc: 0804800b .word 0x0804800b 80028c0: 08004a7b .word 0x08004a7b 80028c4: 08004a93 .word 0x08004a93 80028c8: 08048042 .word 0x08048042 80028cc: 08048041 .word 0x08048041 80028d0: 08048044 .word 0x08048044 80028d4: 08048043 .word 0x08048043 80028d8: 0804803d .word 0x0804803d 80028dc: 08028042 .word 0x08028042 80028e0: 08028041 .word 0x08028041 80028e4: 08028044 .word 0x08028044 80028e8: 08028080 .word 0x08028080 80028ec: 08028043 .word 0x08028043 80028f0: 0802803d .word 0x0802803d 80028f4: 08004ac3 .word 0x08004ac3 80028f8: 08004ae6 .word 0x08004ae6 80028fc: 08048080 .word 0x08048080 8002900: 08004b08 .word 0x08004b08 8002904: 08004b2d .word 0x08004b2d 8002908: 08007f80 .word 0x08007f80 800290c: 08004bb3 .word 0x08004bb3 8002910: 08004b4c .word 0x08004b4c 8002914: f7fd8072 .word 0xf7fd8072 8002918: f7fb809b .word 0xf7fb809b else if (bluecell_Currdatastatus.CPU_Bank_Select == HFR_AUTO_SEL || bluecell_Currdatastatus.CPU_Bank_Select == 7){ 800291c: f003 03fb and.w r3, r3, #251 ; 0xfb 8002920: 2b03 cmp r3, #3 8002922: d182 bne.n 800282a if(bluecell_Currdatastatus.CPU_Current_Bank == HFR_BANK1_SEL){ 8002924: f896 3074 ldrb.w r3, [r6, #116] ; 0x74 8002928: 2b01 cmp r3, #1 800292a: d108 bne.n 800293e printf("Write Start BANK BANK 1 Down Start\r\n"); 800292c: 4807 ldr r0, [pc, #28] ; (800294c ) 800292e: f000 fe63 bl 80035f8 MBIC_BankBooting_Flash_write((uint32_t*)FLASH_USER_BANK2_START_ADDR,FLASH_MBICUSER_START_ADDR); 8002932: 4907 ldr r1, [pc, #28] ; (8002950 ) 8002934: 4807 ldr r0, [pc, #28] ; (8002954 ) MBIC_BankBooting_Flash_write((uint32_t*)FLASH_USER_BANK1_START_ADDR,FLASH_MBICUSER_START_ADDR); 8002936: f000 f973 bl 8002c20 bluecell_Currdatastatus.CPU_Bank_Select = 3; 800293a: 2303 movs r3, #3 800293c: e773 b.n 8002826 printf("Write Start BANK BANK 2 Down Start\r\n"); 800293e: 4806 ldr r0, [pc, #24] ; (8002958 ) 8002940: f000 fe5a bl 80035f8 MBIC_BankBooting_Flash_write((uint32_t*)FLASH_USER_BANK1_START_ADDR,FLASH_MBICUSER_START_ADDR); 8002944: 4902 ldr r1, [pc, #8] ; (8002950 ) 8002946: 4805 ldr r0, [pc, #20] ; (800295c ) 8002948: e7f5 b.n 8002936 800294a: bf00 nop 800294c: 08004b6b .word 0x08004b6b 8002950: 08007f80 .word 0x08007f80 8002954: 08048000 .word 0x08048000 8002958: 08004b8f .word 0x08004b8f 800295c: 08028000 .word 0x08028000 08002960 : typedef void (*fptr)(void); fptr jump_to_app; uint32_t jump_addr; void Jump_App(void){ 8002960: b5b0 push {r4, r5, r7, lr} __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8002962: 4a0d ldr r2, [pc, #52] ; (8002998 ) void Jump_App(void){ 8002964: af00 add r7, sp, #0 __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 8002966: 69d3 ldr r3, [r2, #28] printf("boot loader start\n"); //硫붿꽭占�? 異쒕젰 8002968: 480c ldr r0, [pc, #48] ; (800299c ) __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 800296a: f023 0310 bic.w r3, r3, #16 800296e: 61d3 str r3, [r2, #28] printf("boot loader start\n"); //硫붿꽭占�? 異쒕젰 8002970: f000 fe42 bl 80035f8 jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8002974: 4b0a ldr r3, [pc, #40] ; (80029a0 ) 8002976: 4a0b ldr r2, [pc, #44] ; (80029a4 ) 8002978: 681b ldr r3, [r3, #0] jump_to_app = (fptr) jump_addr; 800297a: 4c0b ldr r4, [pc, #44] ; (80029a8 ) /* init user app's sp */ printf("jump!\n"); 800297c: 480b ldr r0, [pc, #44] ; (80029ac ) jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 800297e: 6013 str r3, [r2, #0] jump_to_app = (fptr) jump_addr; 8002980: 6023 str r3, [r4, #0] printf("jump!\n"); 8002982: f000 fe39 bl 80035f8 __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); 8002986: 4b0a ldr r3, [pc, #40] ; (80029b0 ) 8002988: 681b ldr r3, [r3, #0] __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); 800298a: f383 8808 msr MSP, r3 jump_to_app(); 800298e: 6823 ldr r3, [r4, #0] } 8002990: 46bd mov sp, r7 8002992: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr} jump_to_app(); 8002996: 4718 bx r3 8002998: 40021000 .word 0x40021000 800299c: 08004bef .word 0x08004bef 80029a0: 08008004 .word 0x08008004 80029a4: 2000048c .word 0x2000048c 80029a8: 20000490 .word 0x20000490 80029ac: 08004c01 .word 0x08004c01 80029b0: 08008000 .word 0x08008000 080029b4 : #endif // PYJ.2019.03.27_END -- } #if 1 // PYJ.2020.05.20_BEGIN -- uint8_t Flash_RGB_Data_Write(uint8_t* data){ 80029b4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80029b8: 4605 mov r5, r0 uint16_t Firmdata = 0; uint8_t ret = 0; for(int i = 0; i < data[bluecell_length] - 2; i+=2){ 80029ba: 4604 mov r4, r0 uint8_t ret = 0; 80029bc: 2700 movs r7, #0 Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 80029be: 4e0f ldr r6, [pc, #60] ; (80029fc ) printf("HAL NOT OK \n"); 80029c0: f8df 803c ldr.w r8, [pc, #60] ; 8002a00 for(int i = 0; i < data[bluecell_length] - 2; i+=2){ 80029c4: 78ab ldrb r3, [r5, #2] 80029c6: 1b62 subs r2, r4, r5 80029c8: 3b02 subs r3, #2 80029ca: 4293 cmp r3, r2 80029cc: dc02 bgt.n 80029d4 Address += 2; //if(!(i%FirmwareUpdateDelay)) // HAL_Delay(1); } return ret; } 80029ce: 4638 mov r0, r7 80029d0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 80029d4: 7923 ldrb r3, [r4, #4] Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); 80029d6: 78e2 ldrb r2, [r4, #3] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 80029d8: 6831 ldr r1, [r6, #0] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 80029da: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 80029de: b292 uxth r2, r2 80029e0: 2300 movs r3, #0 80029e2: 2001 movs r0, #1 80029e4: f7fd ff22 bl 800082c 80029e8: b118 cbz r0, 80029f2 printf("HAL NOT OK \n"); 80029ea: 4640 mov r0, r8 80029ec: f000 fe04 bl 80035f8 ret = 1; 80029f0: 2701 movs r7, #1 Address += 2; 80029f2: 6833 ldr r3, [r6, #0] 80029f4: 3402 adds r4, #2 80029f6: 3302 adds r3, #2 80029f8: 6033 str r3, [r6, #0] 80029fa: e7e3 b.n 80029c4 80029fc: 20000210 .word 0x20000210 8002a00: 08004bd4 .word 0x08004bd4 08002a04 : uint8_t Flash_Data_Write(uint8_t* data){ 8002a04: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8002a08: 4604 mov r4, r0 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 6] << 8; Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; // data[MBIC_PAYLOADSTART + 12 +i]; for(i= 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i+=2){ 8002a0a: 4605 mov r5, r0 uint8_t ret = 0; 8002a0c: f04f 0800 mov.w r8, #0 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8002a10: 7ec3 ldrb r3, [r0, #27] Curr_Download_DataIndex = data[MBIC_PAYLOADSTART + 4] << 24; 8002a12: 7e82 ldrb r2, [r0, #26] Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8002a14: 041b lsls r3, r3, #16 8002a16: eb03 6302 add.w r3, r3, r2, lsl #24 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8002a1a: 7f42 ldrb r2, [r0, #29] 8002a1c: 4e19 ldr r6, [pc, #100] ; (8002a84 ) 8002a1e: 4413 add r3, r2 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 6] << 8; 8002a20: 7f02 ldrb r2, [r0, #28] for(i= 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i+=2){ 8002a22: f8df 9068 ldr.w r9, [pc, #104] ; 8002a8c Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8002a26: eb03 2302 add.w r3, r3, r2, lsl #8 Firmdata = ((data[MBIC_PAYLOADSTART + 12 +i]) & 0x00FF); Firmdata += ((data[MBIC_PAYLOADSTART + 12 +i + 1] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress , (uint16_t)Firmdata) != HAL_OK){ 8002a2a: 4f17 ldr r7, [pc, #92] ; (8002a88 ) printf("HAL NOT OK \n"); 8002a2c: f8df a060 ldr.w sl, [pc, #96] ; 8002a90 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8002a30: 6033 str r3, [r6, #0] for(i= 0; i <= Curr_Download_DataIndex - Prev_Download_DataIndex; i+=2){ 8002a32: 6833 ldr r3, [r6, #0] 8002a34: f8d9 2000 ldr.w r2, [r9] 8002a38: 1b29 subs r1, r5, r4 8002a3a: 1a9a subs r2, r3, r2 8002a3c: 4291 cmp r1, r2 8002a3e: d905 bls.n 8002a4c HAL_Delay(1000); }else{ UserAddress += 2; } } Prev_Download_DataIndex = Curr_Download_DataIndex + 1; 8002a40: 3301 adds r3, #1 8002a42: f8c9 3000 str.w r3, [r9] return ret; } 8002a46: 4640 mov r0, r8 8002a48: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} Firmdata += ((data[MBIC_PAYLOADSTART + 12 +i + 1] << 8) & 0xFF00); 8002a4c: f895 3023 ldrb.w r3, [r5, #35] ; 0x23 Firmdata = ((data[MBIC_PAYLOADSTART + 12 +i]) & 0x00FF); 8002a50: f895 2022 ldrb.w r2, [r5, #34] ; 0x22 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress , (uint16_t)Firmdata) != HAL_OK){ 8002a54: 6839 ldr r1, [r7, #0] Firmdata += ((data[MBIC_PAYLOADSTART + 12 +i + 1] << 8) & 0xFF00); 8002a56: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress , (uint16_t)Firmdata) != HAL_OK){ 8002a5a: b292 uxth r2, r2 8002a5c: 2300 movs r3, #0 8002a5e: 2001 movs r0, #1 8002a60: f7fd fee4 bl 800082c 8002a64: b150 cbz r0, 8002a7c printf("HAL NOT OK \n"); 8002a66: 4650 mov r0, sl 8002a68: f000 fdc6 bl 80035f8 HAL_Delay(1000); 8002a6c: f44f 707a mov.w r0, #1000 ; 0x3e8 8002a70: f7fd fc2c bl 80002cc ret = 1; 8002a74: f04f 0801 mov.w r8, #1 8002a78: 3502 adds r5, #2 8002a7a: e7da b.n 8002a32 UserAddress += 2; 8002a7c: 683b ldr r3, [r7, #0] 8002a7e: 3302 adds r3, #2 8002a80: 603b str r3, [r7, #0] 8002a82: e7f9 b.n 8002a78 8002a84: 200002a0 .word 0x200002a0 8002a88: 20000488 .word 0x20000488 8002a8c: 200002e0 .word 0x200002e0 8002a90: 08004bd4 .word 0x08004bd4 08002a94 : uint8_t MBIC_Flash_Data_Write(uint8_t* data){ 8002a94: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8002a98: 4605 mov r5, r0 } UserAddress += 2; HAL_Delay(1); } #else for(i= 0; i > 8); 8002aae: f8df 906c ldr.w r9, [pc, #108] ; 8002b1c uint32_t WriteDataLength = data[61] << 24 | data[62] << 16 | data[63] << 8 | data[64] << 0; 8002ab2: 431c orrs r4, r3 8002ab4: f890 303f ldrb.w r3, [r0, #63] ; 0x3f printf("%02X ",writedata & 0x00FF); // printf("%02X ",(*(uint8_t*)(data+((i )+ 1)))); // if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress , *(uint8_t*)(data+(i * 2)) | *(uint8_t*)data+((i * 2)+1) << 8) != HAL_OK){ if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress ,writedata /*(*(uint8_t*)(data+((i * 2)+ 0))) | (*(uint8_t*)(data+((i * 2)+ 1))) << 8*/) != HAL_OK){ 8002ab8: f8df 8064 ldr.w r8, [pc, #100] ; 8002b20 uint32_t WriteDataLength = data[61] << 24 | data[62] << 16 | data[63] << 8 | data[64] << 0; 8002abc: ea44 2403 orr.w r4, r4, r3, lsl #8 printf("HAL NOT OK \n"); 8002ac0: f8df a060 ldr.w sl, [pc, #96] ; 8002b24 cnt = (((WriteDataLength + 128)/1024)); 8002ac4: 3480 adds r4, #128 ; 0x80 for(i= 0; i #endif // PYJ.2020.06.24_END -- Prev_Download_DataIndex = Curr_Download_DataIndex + 1; #endif // PYJ.2020.06.24_END -- } 8002aca: 2000 movs r0, #0 8002acc: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} uint16_t writedata = (*(uint8_t*)(data+((i)+ 1))) << 8 | (*(uint8_t*)(data+((i)+ 0))); 8002ad0: 19ab adds r3, r5, r6 8002ad2: 785a ldrb r2, [r3, #1] 8002ad4: 5daf ldrb r7, [r5, r6] printf("%02X ",writedata & 0xFF00 >> 8); 8002ad6: 4648 mov r0, r9 uint16_t writedata = (*(uint8_t*)(data+((i)+ 1))) << 8 | (*(uint8_t*)(data+((i)+ 0))); 8002ad8: ea47 2702 orr.w r7, r7, r2, lsl #8 printf("%02X ",writedata & 0xFF00 >> 8); 8002adc: fa5f fb87 uxtb.w fp, r7 8002ae0: 4659 mov r1, fp 8002ae2: f000 fd01 bl 80034e8 printf("%02X ",writedata & 0x00FF); 8002ae6: 4659 mov r1, fp 8002ae8: 4648 mov r0, r9 8002aea: f000 fcfd bl 80034e8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,UserAddress ,writedata /*(*(uint8_t*)(data+((i * 2)+ 0))) | (*(uint8_t*)(data+((i * 2)+ 1))) << 8*/) != HAL_OK){ 8002aee: f8d8 1000 ldr.w r1, [r8] 8002af2: 463a mov r2, r7 8002af4: 2300 movs r3, #0 8002af6: 2001 movs r0, #1 8002af8: f7fd fe98 bl 800082c 8002afc: b140 cbz r0, 8002b10 printf("HAL NOT OK \n"); 8002afe: 4650 mov r0, sl 8002b00: f000 fd7a bl 80035f8 HAL_Delay(1000); 8002b04: f44f 707a mov.w r0, #1000 ; 0x3e8 8002b08: f7fd fbe0 bl 80002cc for(i= 0; i UserAddress += 2; 8002b10: f8d8 3000 ldr.w r3, [r8] 8002b14: 3302 adds r3, #2 8002b16: f8c8 3000 str.w r3, [r8] 8002b1a: e7f7 b.n 8002b0c 8002b1c: 08004d09 .word 0x08004d09 8002b20: 20000488 .word 0x20000488 8002b24: 08004bd4 .word 0x08004bd4 08002b28 : return ret; } uint8_t Flash_write(uint8_t* data) // ?占쏙옙湲고븿?占쏙옙 { 8002b28: b538 push {r3, r4, r5, lr} /*Variable used for Erase procedure*/ static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; /* Fill EraseInit structure*/ EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8002b2a: 2300 movs r3, #0 8002b2c: 4c0f ldr r4, [pc, #60] ; (8002b6c ) { 8002b2e: 4605 mov r5, r0 EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8002b30: 6023 str r3, [r4, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8002b32: 4b0f ldr r3, [pc, #60] ; (8002b70 ) 8002b34: 60a3 str r3, [r4, #8] EraseInitStruct.NbPages = (FLASH_USER_START_ADDR - ((uint32_t)0xFFFF)) / FLASH_PAGE_SIZE; 8002b36: f64f 73f0 movw r3, #65520 ; 0xfff0 8002b3a: 60e3 str r3, [r4, #12] // __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 HAL_FLASH_Unlock(); // lock ??占�? 8002b3c: f7fd fe30 bl 80007a0 if(flashinit == 0){ 8002b40: 4b0c ldr r3, [pc, #48] ; (8002b74 ) 8002b42: 781a ldrb r2, [r3, #0] 8002b44: b94a cbnz r2, 8002b5a flashinit= 1; 8002b46: 2201 movs r2, #1 //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8002b48: 490b ldr r1, [pc, #44] ; (8002b78 ) 8002b4a: 4620 mov r0, r4 flashinit= 1; 8002b4c: 701a strb r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8002b4e: f7fd fed7 bl 8000900 8002b52: b110 cbz r0, 8002b5a printf("Erase Failed \r\n"); 8002b54: 4809 ldr r0, [pc, #36] ; (8002b7c ) 8002b56: f000 fd4f bl 80035f8 } } // FLASH_If_Erase(); ret = Flash_RGB_Data_Write(&data[bluecell_stx]); 8002b5a: 4628 mov r0, r5 8002b5c: f7ff ff2a bl 80029b4 8002b60: 4604 mov r4, r0 // ret = Flash_DataTest_Write(&data[bluecell_stx]); HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린 8002b62: f7fd fe2f bl 80007c4 // __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙 return ret; } 8002b66: 4620 mov r0, r4 8002b68: bd38 pop {r3, r4, r5, pc} 8002b6a: bf00 nop 8002b6c: 200002a4 .word 0x200002a4 8002b70: 08008000 .word 0x08008000 8002b74: 200002e4 .word 0x200002e4 8002b78: 200002d4 .word 0x200002d4 8002b7c: 08004be0 .word 0x08004be0 08002b80 : uint8_t Bank_Flash_write(uint8_t* data,uint32_t StartBankAddress) // ?占쏙옙湲고븿?占쏙옙 { 8002b80: b538 push {r3, r4, r5, lr} 8002b82: 4605 mov r5, r0 8002b84: 460c mov r4, r1 static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; HAL_FLASH_Unlock(); // lock ??占�? 8002b86: f7fd fe0b bl 80007a0 if(flashinit == 0){ 8002b8a: 4b19 ldr r3, [pc, #100] ; (8002bf0 ) 8002b8c: 781a ldrb r2, [r3, #0] 8002b8e: b9e2 cbnz r2, 8002bca flashinit= 1; 8002b90: 2101 movs r1, #1 8002b92: 7019 strb r1, [r3, #0] /* Fill EraseInit structure*/ switch(StartBankAddress){ 8002b94: 4b17 ldr r3, [pc, #92] ; (8002bf4 ) 8002b96: 429c cmp r4, r3 8002b98: 4b17 ldr r3, [pc, #92] ; (8002bf8 ) 8002b9a: d01e beq.n 8002bda 8002b9c: 4917 ldr r1, [pc, #92] ; (8002bfc ) 8002b9e: 428c cmp r4, r1 8002ba0: d020 beq.n 8002be4 8002ba2: f5a1 2180 sub.w r1, r1, #262144 ; 0x40000 8002ba6: 428c cmp r4, r1 8002ba8: d104 bne.n 8002bb4 case FLASH_USER_START_ADDR: EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8002baa: 601a str r2, [r3, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR - 128; 8002bac: 4a14 ldr r2, [pc, #80] ; (8002c00 ) 8002bae: 609a str r2, [r3, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8002bb0: 223f movs r2, #63 ; 0x3f break; case FLASH_USER_BANK2_START_ADDR: EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; EraseInitStruct.PageAddress = FLASH_USER_BANK2_START_ADDR - 128; EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_BANK2_START_ADDR) / FLASH_PAGE_SIZE; 8002bb2: 60da str r2, [r3, #12] break; } UserAddress = EraseInitStruct.PageAddress; 8002bb4: 689a ldr r2, [r3, #8] 8002bb6: 4b13 ldr r3, [pc, #76] ; (8002c04 ) //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8002bb8: 4913 ldr r1, [pc, #76] ; (8002c08 ) 8002bba: 480f ldr r0, [pc, #60] ; (8002bf8 ) UserAddress = EraseInitStruct.PageAddress; 8002bbc: 601a str r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8002bbe: f7fd fe9f bl 8000900 8002bc2: b110 cbz r0, 8002bca printf("Erase Failed \r\n"); 8002bc4: 4811 ldr r0, [pc, #68] ; (8002c0c ) 8002bc6: f000 fd17 bl 80035f8 } } ret = Flash_Data_Write(&data[0]); 8002bca: 4628 mov r0, r5 8002bcc: f7ff ff1a bl 8002a04 8002bd0: 4604 mov r4, r0 HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린 8002bd2: f7fd fdf7 bl 80007c4 data++; } #endif // PYJ.2020.06.24_END -- } 8002bd6: 4620 mov r0, r4 8002bd8: bd38 pop {r3, r4, r5, pc} EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8002bda: 601a str r2, [r3, #0] EraseInitStruct.PageAddress = FLASH_USER_BANK1_START_ADDR - 128; 8002bdc: 4a0c ldr r2, [pc, #48] ; (8002c10 ) 8002bde: 609a str r2, [r3, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_BANK1_START_ADDR) / FLASH_PAGE_SIZE; 8002be0: 4a0c ldr r2, [pc, #48] ; (8002c14 ) 8002be2: e7e6 b.n 8002bb2 EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8002be4: 601a str r2, [r3, #0] EraseInitStruct.PageAddress = FLASH_USER_BANK2_START_ADDR - 128; 8002be6: 4a0c ldr r2, [pc, #48] ; (8002c18 ) 8002be8: 609a str r2, [r3, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_BANK2_START_ADDR) / FLASH_PAGE_SIZE; 8002bea: 4a0c ldr r2, [pc, #48] ; (8002c1c ) 8002bec: e7e1 b.n 8002bb2 8002bee: bf00 nop 8002bf0: 200002e4 .word 0x200002e4 8002bf4: 08028000 .word 0x08028000 8002bf8: 200002b4 .word 0x200002b4 8002bfc: 08048000 .word 0x08048000 8002c00: 08007f80 .word 0x08007f80 8002c04: 20000488 .word 0x20000488 8002c08: 200002d8 .word 0x200002d8 8002c0c: 08004be0 .word 0x08004be0 8002c10: 08027f80 .word 0x08027f80 8002c14: 001fffff .word 0x001fffff 8002c18: 08047f80 .word 0x08047f80 8002c1c: 001fffbf .word 0x001fffbf 08002c20 : } #endif // PYJ.2020.06.24_END -- uint8_t MBIC_BankBooting_Flash_write(uint8_t* data,uint32_t StartBankAddress) // ?占쏙옙湲고븿?占쏙옙 { 8002c20: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8002c24: 4607 mov r7, r0 static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; uint32_t tmpdata = 0; uint32_t i = 0; printf("=====================Data Recv================\r\n"); 8002c26: 482e ldr r0, [pc, #184] ; (8002ce0 ) { 8002c28: 460d mov r5, r1 printf("=====================Data Recv================\r\n"); 8002c2a: f000 fce5 bl 80035f8 uint8_t datacnt = 0; if(data[0]!= 0x4A){ 8002c2e: 783b ldrb r3, [r7, #0] 8002c30: 2b4a cmp r3, #74 ; 0x4a 8002c32: d005 beq.n 8002c40 printf("File ERRor\r\n"); 8002c34: 482b ldr r0, [pc, #172] ; (8002ce4 ) 8002c36: f000 fcdf bl 80035f8 data++; } #endif // PYJ.2020.06.24_END -- } 8002c3a: 4620 mov r0, r4 8002c3c: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(data[0]!= 0x4A){ 8002c40: 2400 movs r4, #0 8002c42: 46b8 mov r8, r7 8002c44: 4626 mov r6, r4 printf("%08x : %02X Index : %d \n",data ,*(uint8_t*)data,i); 8002c46: f8df 90d4 ldr.w r9, [pc, #212] ; 8002d1c 8002c4a: 4641 mov r1, r8 if(*(uint8_t*)data == 0xFF) 8002c4c: f818 2b01 ldrb.w r2, [r8], #1 printf("%08x : %02X Index : %d \n",data ,*(uint8_t*)data,i); 8002c50: 4633 mov r3, r6 if(*(uint8_t*)data == 0xFF) 8002c52: 2aff cmp r2, #255 ; 0xff datacnt++; 8002c54: bf08 it eq 8002c56: 3401 addeq r4, #1 printf("%08x : %02X Index : %d \n",data ,*(uint8_t*)data,i); 8002c58: 4648 mov r0, r9 for( i = 0; i < 128; i++ ){ 8002c5a: f106 0601 add.w r6, r6, #1 datacnt++; 8002c5e: bf08 it eq 8002c60: b2e4 uxtbeq r4, r4 printf("%08x : %02X Index : %d \n",data ,*(uint8_t*)data,i); 8002c62: f000 fc41 bl 80034e8 for( i = 0; i < 128; i++ ){ 8002c66: 2e80 cmp r6, #128 ; 0x80 8002c68: d1ef bne.n 8002c4a if(datacnt > 100) 8002c6a: 2c64 cmp r4, #100 ; 0x64 8002c6c: d8e5 bhi.n 8002c3a printf("=====================Data Recv================\r\n"); 8002c6e: 481c ldr r0, [pc, #112] ; (8002ce0 ) 8002c70: f000 fcc2 bl 80035f8 HAL_FLASH_Unlock(); // lock ??占�? 8002c74: f7fd fd94 bl 80007a0 if(flashinit == 0){ 8002c78: 4b1b ldr r3, [pc, #108] ; (8002ce8 ) 8002c7a: 781c ldrb r4, [r3, #0] 8002c7c: bb1c cbnz r4, 8002cc6 flashinit= 1; 8002c7e: 2201 movs r2, #1 printf("Download Erase Conifiguaration Start\r\n"); 8002c80: 481a ldr r0, [pc, #104] ; (8002cec ) flashinit= 1; 8002c82: 701a strb r2, [r3, #0] printf("Download Erase Conifiguaration Start\r\n"); 8002c84: f000 fcb8 bl 80035f8 switch(StartBankAddress){ 8002c88: 4b19 ldr r3, [pc, #100] ; (8002cf0 ) 8002c8a: 429d cmp r5, r3 8002c8c: d10a bne.n 8002ca4 printf("User API Erase %x\r\n",StartBankAddress); 8002c8e: 4629 mov r1, r5 8002c90: 4818 ldr r0, [pc, #96] ; (8002cf4 ) 8002c92: f000 fc29 bl 80034e8 EraseInitStruct.NbPages = ((FLASH_MBICUSER_END_ADDR - FLASH_MBICUSER_START_ADDR) / FLASH_PAGE_SIZE )+ 1; 8002c96: 2240 movs r2, #64 ; 0x40 EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8002c98: 4b17 ldr r3, [pc, #92] ; (8002cf8 ) 8002c9a: 601c str r4, [r3, #0] EraseInitStruct.PageAddress = FLASH_MBICUSER_START_ADDR; 8002c9c: 609d str r5, [r3, #8] EraseInitStruct.NbPages = ((FLASH_MBICUSER_END_ADDR - FLASH_MBICUSER_START_ADDR) / FLASH_PAGE_SIZE )+ 1; 8002c9e: 60da str r2, [r3, #12] UserAddress = FLASH_MBICUSER_START_ADDR; 8002ca0: 4b16 ldr r3, [pc, #88] ; (8002cfc ) 8002ca2: 601d str r5, [r3, #0] printf("Download Erase Conifiguaration END\r\n"); 8002ca4: 4816 ldr r0, [pc, #88] ; (8002d00 ) 8002ca6: f000 fca7 bl 80035f8 printf("Download Erase start\r\n"); 8002caa: 4816 ldr r0, [pc, #88] ; (8002d04 ) 8002cac: f000 fca4 bl 80035f8 if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8002cb0: 4915 ldr r1, [pc, #84] ; (8002d08 ) 8002cb2: 4811 ldr r0, [pc, #68] ; (8002cf8 ) 8002cb4: f7fd fe24 bl 8000900 8002cb8: b110 cbz r0, 8002cc0 printf("Erase Failed \r\n"); 8002cba: 4814 ldr r0, [pc, #80] ; (8002d0c ) 8002cbc: f000 fc9c bl 80035f8 printf("Download Erase END\r\n"); 8002cc0: 4813 ldr r0, [pc, #76] ; (8002d10 ) 8002cc2: f000 fc99 bl 80035f8 printf("Download Start \r\n"); 8002cc6: 4813 ldr r0, [pc, #76] ; (8002d14 ) 8002cc8: f000 fc96 bl 80035f8 ret = MBIC_Flash_Data_Write((uint32_t*)data); 8002ccc: 4638 mov r0, r7 8002cce: f7ff fee1 bl 8002a94 8002cd2: 4604 mov r4, r0 printf("Download END \r\n"); 8002cd4: 4810 ldr r0, [pc, #64] ; (8002d18 ) 8002cd6: f000 fc8f bl 80035f8 HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린 8002cda: f7fd fd73 bl 80007c4 return ret; 8002cde: e7ac b.n 8002c3a 8002ce0: 08004c07 .word 0x08004c07 8002ce4: 08004c37 .word 0x08004c37 8002ce8: 200002e4 .word 0x200002e4 8002cec: 08004c5d .word 0x08004c5d 8002cf0: 08007f80 .word 0x08007f80 8002cf4: 08004c83 .word 0x08004c83 8002cf8: 200002c4 .word 0x200002c4 8002cfc: 20000488 .word 0x20000488 8002d00: 08004c97 .word 0x08004c97 8002d04: 08004cbb .word 0x08004cbb 8002d08: 200002dc .word 0x200002dc 8002d0c: 08004be0 .word 0x08004be0 8002d10: 08004cd2 .word 0x08004cd2 8002d14: 08004ce7 .word 0x08004ce7 8002d18: 08004cf9 .word 0x08004cf9 8002d1c: 08004c43 .word 0x08004c43 08002d20 : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8002d20: 6802 ldr r2, [r0, #0] 8002d22: 4b08 ldr r3, [pc, #32] ; (8002d44 ) 8002d24: 429a cmp r2, r3 8002d26: d10b bne.n 8002d40 UartTimerCnt++; 8002d28: 4a07 ldr r2, [pc, #28] ; (8002d48 ) 8002d2a: 6813 ldr r3, [r2, #0] 8002d2c: 3301 adds r3, #1 8002d2e: 6013 str r3, [r2, #0] LedTimerCnt++; 8002d30: 4a06 ldr r2, [pc, #24] ; (8002d4c ) 8002d32: 6813 ldr r3, [r2, #0] 8002d34: 3301 adds r3, #1 8002d36: 6013 str r3, [r2, #0] FirmwareTimerCnt++; 8002d38: 4a05 ldr r2, [pc, #20] ; (8002d50 ) 8002d3a: 6813 ldr r3, [r2, #0] 8002d3c: 3301 adds r3, #1 8002d3e: 6013 str r3, [r2, #0] 8002d40: 4770 bx lr 8002d42: bf00 nop 8002d44: 40001000 .word 0x40001000 8002d48: 200002f0 .word 0x200002f0 8002d4c: 200002ec .word 0x200002ec 8002d50: 200002e8 .word 0x200002e8 08002d54 <_write>: } } int _write (int file, uint8_t *ptr, uint16_t len) { 8002d54: b510 push {r4, lr} 8002d56: 4614 mov r4, r2 HAL_UART_Transmit (&huart2, ptr, len, 10); 8002d58: 230a movs r3, #10 8002d5a: 4802 ldr r0, [pc, #8] ; (8002d64 <_write+0x10>) 8002d5c: f7fe ffe6 bl 8001d2c return len; } 8002d60: 4620 mov r0, r4 8002d62: bd10 pop {r4, pc} 8002d64: 20000678 .word 0x20000678 08002d68 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8002d68: b510 push {r4, lr} 8002d6a: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8002d6c: 2228 movs r2, #40 ; 0x28 8002d6e: 2100 movs r1, #0 8002d70: a806 add r0, sp, #24 8002d72: f000 fbb1 bl 80034d8 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002d76: 2214 movs r2, #20 8002d78: 2100 movs r1, #0 8002d7a: a801 add r0, sp, #4 8002d7c: f000 fbac bl 80034d8 /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8002d80: 2301 movs r3, #1 8002d82: 930a str r3, [sp, #40] ; 0x28 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8002d84: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8002d86: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8002d88: 930b str r3, [sp, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 8002d8a: f44f 1340 mov.w r3, #3145728 ; 0x300000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002d8e: a806 add r0, sp, #24 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 8002d90: 930f str r3, [sp, #60] ; 0x3c RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8002d92: 9406 str r4, [sp, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8002d94: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002d96: f7fe faf1 bl 800137c { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002d9a: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8002d9c: f44f 6280 mov.w r2, #1024 ; 0x400 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002da0: 9301 str r3, [sp, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002da2: 2300 movs r3, #0 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8002da4: 4621 mov r1, r4 8002da6: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8002da8: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002daa: 9303 str r3, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8002dac: 9204 str r2, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8002dae: 9305 str r3, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8002db0: f7fe fcac bl 800170c { Error_Handler(); } } 8002db4: b010 add sp, #64 ; 0x40 8002db6: bd10 pop {r4, pc} 08002db8
: { 8002db8: b580 push {r7, lr} 8002dba: b088 sub sp, #32 HAL_Init(); 8002dbc: f7fd fa62 bl 8000284 SystemClock_Config(); 8002dc0: f7ff ffd2 bl 8002d68 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002dc4: 2210 movs r2, #16 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8002dc6: 4d66 ldr r5, [pc, #408] ; (8002f60 ) GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002dc8: 2100 movs r1, #0 8002dca: eb0d 0002 add.w r0, sp, r2 8002dce: f000 fb83 bl 80034d8 __HAL_RCC_GPIOC_CLK_ENABLE(); 8002dd2: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8002dd4: 2200 movs r2, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8002dd6: f043 0310 orr.w r3, r3, #16 8002dda: 61ab str r3, [r5, #24] 8002ddc: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8002dde: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOC_CLK_ENABLE(); 8002de2: f003 0310 and.w r3, r3, #16 8002de6: 9301 str r3, [sp, #4] 8002de8: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8002dea: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8002dec: 485d ldr r0, [pc, #372] ; (8002f64 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8002dee: f043 0304 orr.w r3, r3, #4 8002df2: 61ab str r3, [r5, #24] 8002df4: 69ab ldr r3, [r5, #24] /*Configure GPIO pin : BOOT_LED_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8002df6: 2400 movs r4, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8002df8: f003 0304 and.w r3, r3, #4 8002dfc: 9302 str r3, [sp, #8] 8002dfe: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8002e00: 69ab ldr r3, [r5, #24] huart1.Init.BaudRate = 115200; 8002e02: f44f 37e1 mov.w r7, #115200 ; 0x1c200 __HAL_RCC_GPIOB_CLK_ENABLE(); 8002e06: f043 0308 orr.w r3, r3, #8 8002e0a: 61ab str r3, [r5, #24] 8002e0c: 69ab ldr r3, [r5, #24] huart1.Init.Mode = UART_MODE_TX_RX; 8002e0e: 260c movs r6, #12 __HAL_RCC_GPIOB_CLK_ENABLE(); 8002e10: f003 0308 and.w r3, r3, #8 8002e14: 9303 str r3, [sp, #12] 8002e16: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8002e18: f7fd feac bl 8000b74 GPIO_InitStruct.Pin = BOOT_LED_Pin; 8002e1c: f44f 4300 mov.w r3, #32768 ; 0x8000 8002e20: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8002e22: 2301 movs r3, #1 8002e24: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002e26: 2302 movs r3, #2 HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8002e28: a904 add r1, sp, #16 8002e2a: 484e ldr r0, [pc, #312] ; (8002f64 ) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002e2c: 9307 str r3, [sp, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002e2e: 9406 str r4, [sp, #24] HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8002e30: f7fd fdb4 bl 800099c __HAL_RCC_DMA1_CLK_ENABLE(); 8002e34: 696b ldr r3, [r5, #20] huart1.Instance = USART1; 8002e36: 484c ldr r0, [pc, #304] ; (8002f68 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8002e38: f043 0301 orr.w r3, r3, #1 8002e3c: 616b str r3, [r5, #20] 8002e3e: 696b ldr r3, [r5, #20] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8002e40: 6084 str r4, [r0, #8] __HAL_RCC_DMA1_CLK_ENABLE(); 8002e42: f003 0301 and.w r3, r3, #1 8002e46: 9300 str r3, [sp, #0] 8002e48: 9b00 ldr r3, [sp, #0] huart1.Init.BaudRate = 115200; 8002e4a: 4b48 ldr r3, [pc, #288] ; (8002f6c ) huart1.Init.StopBits = UART_STOPBITS_1; 8002e4c: 60c4 str r4, [r0, #12] huart1.Init.BaudRate = 115200; 8002e4e: e880 0088 stmia.w r0, {r3, r7} huart1.Init.Parity = UART_PARITY_NONE; 8002e52: 6104 str r4, [r0, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8002e54: 6146 str r6, [r0, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002e56: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8002e58: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8002e5a: f7fe ff39 bl 8001cd0 hi2c2.Instance = I2C2; 8002e5e: 4844 ldr r0, [pc, #272] ; (8002f70 ) hi2c2.Init.ClockSpeed = 400000; 8002e60: 4a44 ldr r2, [pc, #272] ; (8002f74 ) 8002e62: 4b45 ldr r3, [pc, #276] ; (8002f78 ) hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 8002e64: 6084 str r4, [r0, #8] hi2c2.Init.ClockSpeed = 400000; 8002e66: e880 000c stmia.w r0, {r2, r3} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8002e6a: f44f 4380 mov.w r3, #16384 ; 0x4000 hi2c2.Init.OwnAddress1 = 0; 8002e6e: 60c4 str r4, [r0, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8002e70: 6103 str r3, [r0, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8002e72: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 8002e74: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8002e76: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8002e78: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8002e7a: f7fe f849 bl 8000f10 htim6.Init.Prescaler = 5600 - 1; 8002e7e: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 8002e82: 4d3e ldr r5, [pc, #248] ; (8002f7c ) htim6.Init.Prescaler = 5600 - 1; 8002e84: 493e ldr r1, [pc, #248] ; (8002f80 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8002e86: 4628 mov r0, r5 htim6.Init.Prescaler = 5600 - 1; 8002e88: e885 000a stmia.w r5, {r1, r3} htim6.Init.Period = 10 - 1; 8002e8c: 2309 movs r3, #9 TIM_MasterConfigTypeDef sMasterConfig = {0}; 8002e8e: 9404 str r4, [sp, #16] htim6.Init.Period = 10 - 1; 8002e90: 60eb str r3, [r5, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8002e92: 9405 str r4, [sp, #20] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8002e94: 60ac str r4, [r5, #8] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8002e96: 61ac str r4, [r5, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8002e98: f7fe fe08 bl 8001aac if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8002e9c: a904 add r1, sp, #16 8002e9e: 4628 mov r0, r5 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8002ea0: 9404 str r4, [sp, #16] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8002ea2: 9405 str r4, [sp, #20] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8002ea4: f7fe fe1c bl 8001ae0 huart2.Instance = USART2; 8002ea8: 4b36 ldr r3, [pc, #216] ; (8002f84 ) 8002eaa: 4837 ldr r0, [pc, #220] ; (8002f88 ) huart2.Init.BaudRate = 115200; 8002eac: e880 0088 stmia.w r0, {r3, r7} huart2.Init.WordLength = UART_WORDLENGTH_8B; 8002eb0: 6084 str r4, [r0, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8002eb2: 60c4 str r4, [r0, #12] huart2.Init.Parity = UART_PARITY_NONE; 8002eb4: 6104 str r4, [r0, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8002eb6: 6146 str r6, [r0, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002eb8: 6184 str r4, [r0, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8002eba: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8002ebc: f7fe ff08 bl 8001cd0 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8002ec0: 4622 mov r2, r4 8002ec2: 4621 mov r1, r4 8002ec4: 200f movs r0, #15 8002ec6: f7fd fa25 bl 8000314 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 8002eca: 200f movs r0, #15 8002ecc: f7fd fa56 bl 800037c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8002ed0: 4622 mov r2, r4 8002ed2: 4621 mov r1, r4 8002ed4: 2025 movs r0, #37 ; 0x25 8002ed6: f7fd fa1d bl 8000314 HAL_NVIC_EnableIRQ(USART1_IRQn); 8002eda: 2025 movs r0, #37 ; 0x25 8002edc: f7fd fa4e bl 800037c HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8002ee0: 4622 mov r2, r4 8002ee2: 4621 mov r1, r4 8002ee4: 2036 movs r0, #54 ; 0x36 8002ee6: f7fd fa15 bl 8000314 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8002eea: 2036 movs r0, #54 ; 0x36 8002eec: f7fd fa46 bl 800037c HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 8002ef0: 4622 mov r2, r4 8002ef2: 4621 mov r1, r4 8002ef4: 200e movs r0, #14 8002ef6: f7fd fa0d bl 8000314 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 8002efa: 200e movs r0, #14 8002efc: f7fd fa3e bl 800037c HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 8002f00: 4622 mov r2, r4 8002f02: 4621 mov r1, r4 8002f04: 2026 movs r0, #38 ; 0x26 8002f06: f7fd fa05 bl 8000314 HAL_NVIC_EnableIRQ(USART2_IRQn); 8002f0a: 2026 movs r0, #38 ; 0x26 8002f0c: f7fd fa36 bl 800037c HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0); 8002f10: 4622 mov r2, r4 8002f12: 4621 mov r1, r4 8002f14: 2010 movs r0, #16 8002f16: f7fd f9fd bl 8000314 HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn); 8002f1a: 2010 movs r0, #16 8002f1c: f7fd fa2e bl 800037c HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0); 8002f20: 4622 mov r2, r4 8002f22: 4621 mov r1, r4 8002f24: 2011 movs r0, #17 8002f26: f7fd f9f5 bl 8000314 HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn); 8002f2a: 2011 movs r0, #17 8002f2c: f7fd fa26 bl 800037c HAL_TIM_Base_Start_IT(&htim6); 8002f30: 4628 mov r0, r5 8002f32: f7fe fcbd bl 80018b0 InitUartQueue(&TerminalQueue); 8002f36: 4815 ldr r0, [pc, #84] ; (8002f8c ) 8002f38: f000 f9de bl 80032f8 setbuf(stdout, NULL); 8002f3c: 4b14 ldr r3, [pc, #80] ; (8002f90 ) 8002f3e: 4621 mov r1, r4 8002f40: 681b ldr r3, [r3, #0] 8002f42: 6898 ldr r0, [r3, #8] 8002f44: f000 fb60 bl 8003608 printf("BootLoader Start ---\r\n"); 8002f48: 4812 ldr r0, [pc, #72] ; (8002f94 ) 8002f4a: f000 fb55 bl 80035f8 EEPROM_M24C08_Init(); 8002f4e: f7ff fb1d bl 800258c printf("BootLoader END\r\n"); 8002f52: 4811 ldr r0, [pc, #68] ; (8002f98 ) 8002f54: f000 fb50 bl 80035f8 Jump_App(); 8002f58: f7ff fd02 bl 8002960 8002f5c: e7fe b.n 8002f5c 8002f5e: bf00 nop 8002f60: 40021000 .word 0x40021000 8002f64: 40011000 .word 0x40011000 8002f68: 200005f8 .word 0x200005f8 8002f6c: 40013800 .word 0x40013800 8002f70: 200004d8 .word 0x200004d8 8002f74: 40005800 .word 0x40005800 8002f78: 00061a80 .word 0x00061a80 8002f7c: 20000638 .word 0x20000638 8002f80: 40001000 .word 0x40001000 8002f84: 40004400 .word 0x40004400 8002f88: 20000678 .word 0x20000678 8002f8c: 200006b8 .word 0x200006b8 8002f90: 20000218 .word 0x20000218 8002f94: 08004d0f .word 0x08004d0f 8002f98: 08004d25 .word 0x08004d25 08002f9c : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8002f9c: 4770 bx lr ... 08002fa0 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8002fa0: 4b0e ldr r3, [pc, #56] ; (8002fdc ) { 8002fa2: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8002fa4: 699a ldr r2, [r3, #24] 8002fa6: f042 0201 orr.w r2, r2, #1 8002faa: 619a str r2, [r3, #24] 8002fac: 699a ldr r2, [r3, #24] 8002fae: f002 0201 and.w r2, r2, #1 8002fb2: 9200 str r2, [sp, #0] 8002fb4: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8002fb6: 69da ldr r2, [r3, #28] 8002fb8: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8002fbc: 61da str r2, [r3, #28] 8002fbe: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8002fc0: 4a07 ldr r2, [pc, #28] ; (8002fe0 ) __HAL_RCC_PWR_CLK_ENABLE(); 8002fc2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8002fc6: 9301 str r3, [sp, #4] 8002fc8: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8002fca: 6853 ldr r3, [r2, #4] 8002fcc: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8002fd0: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 8002fd4: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8002fd6: b002 add sp, #8 8002fd8: 4770 bx lr 8002fda: bf00 nop 8002fdc: 40021000 .word 0x40021000 8002fe0: 40010000 .word 0x40010000 08002fe4 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8002fe4: b510 push {r4, lr} 8002fe6: 4604 mov r4, r0 8002fe8: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002fea: 2210 movs r2, #16 8002fec: 2100 movs r1, #0 8002fee: a802 add r0, sp, #8 8002ff0: f000 fa72 bl 80034d8 if(hi2c->Instance==I2C2) 8002ff4: 6822 ldr r2, [r4, #0] 8002ff6: 4b11 ldr r3, [pc, #68] ; (800303c ) 8002ff8: 429a cmp r2, r3 8002ffa: d11d bne.n 8003038 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8002ffc: 4c10 ldr r4, [pc, #64] ; (8003040 ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = EEPROM_SCL_Pin|EEPROM_SDA_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002ffe: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 8003000: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8003002: 4810 ldr r0, [pc, #64] ; (8003044 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 8003004: f043 0308 orr.w r3, r3, #8 8003008: 61a3 str r3, [r4, #24] 800300a: 69a3 ldr r3, [r4, #24] 800300c: f003 0308 and.w r3, r3, #8 8003010: 9300 str r3, [sp, #0] 8003012: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = EEPROM_SCL_Pin|EEPROM_SDA_Pin; 8003014: f44f 6340 mov.w r3, #3072 ; 0xc00 8003018: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800301a: 2312 movs r3, #18 800301c: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800301e: 2303 movs r3, #3 8003020: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8003022: f7fd fcbb bl 800099c /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 8003026: 69e3 ldr r3, [r4, #28] 8003028: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 800302c: 61e3 str r3, [r4, #28] 800302e: 69e3 ldr r3, [r4, #28] 8003030: f403 0380 and.w r3, r3, #4194304 ; 0x400000 8003034: 9301 str r3, [sp, #4] 8003036: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 8003038: b006 add sp, #24 800303a: bd10 pop {r4, pc} 800303c: 40005800 .word 0x40005800 8003040: 40021000 .word 0x40021000 8003044: 40010c00 .word 0x40010c00 08003048 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8003048: 6802 ldr r2, [r0, #0] 800304a: 4b08 ldr r3, [pc, #32] ; (800306c ) { 800304c: b082 sub sp, #8 if(htim_base->Instance==TIM6) 800304e: 429a cmp r2, r3 8003050: d10a bne.n 8003068 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8003052: f503 3300 add.w r3, r3, #131072 ; 0x20000 8003056: 69da ldr r2, [r3, #28] 8003058: f042 0210 orr.w r2, r2, #16 800305c: 61da str r2, [r3, #28] 800305e: 69db ldr r3, [r3, #28] 8003060: f003 0310 and.w r3, r3, #16 8003064: 9301 str r3, [sp, #4] 8003066: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8003068: b002 add sp, #8 800306a: 4770 bx lr 800306c: 40001000 .word 0x40001000 08003070 : * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003070: 2210 movs r2, #16 { 8003072: b570 push {r4, r5, r6, lr} 8003074: 4605 mov r5, r0 8003076: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003078: eb0d 0002 add.w r0, sp, r2 800307c: 2100 movs r1, #0 800307e: f000 fa2b bl 80034d8 if(huart->Instance==USART1) 8003082: 682b ldr r3, [r5, #0] 8003084: 4a49 ldr r2, [pc, #292] ; (80031ac ) 8003086: 4293 cmp r3, r2 8003088: d151 bne.n 800312e { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 800308a: 4b49 ldr r3, [pc, #292] ; (80031b0 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800308c: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 800308e: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003090: 4848 ldr r0, [pc, #288] ; (80031b4 ) __HAL_RCC_USART1_CLK_ENABLE(); 8003092: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8003096: 619a str r2, [r3, #24] 8003098: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800309a: 2600 movs r6, #0 __HAL_RCC_USART1_CLK_ENABLE(); 800309c: f402 4280 and.w r2, r2, #16384 ; 0x4000 80030a0: 9200 str r2, [sp, #0] 80030a2: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 80030a4: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 80030a6: 4c44 ldr r4, [pc, #272] ; (80031b8 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 80030a8: f042 0204 orr.w r2, r2, #4 80030ac: 619a str r2, [r3, #24] 80030ae: 699b ldr r3, [r3, #24] 80030b0: f003 0304 and.w r3, r3, #4 80030b4: 9301 str r3, [sp, #4] 80030b6: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 80030b8: f44f 7300 mov.w r3, #512 ; 0x200 80030bc: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80030be: 2302 movs r3, #2 80030c0: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80030c2: 2303 movs r3, #3 80030c4: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80030c6: f7fd fc69 bl 800099c GPIO_InitStruct.Pin = GPIO_PIN_10; 80030ca: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80030ce: 4839 ldr r0, [pc, #228] ; (80031b4 ) 80030d0: a904 add r1, sp, #16 GPIO_InitStruct.Pin = GPIO_PIN_10; 80030d2: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80030d4: 9605 str r6, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80030d6: 9606 str r6, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80030d8: f7fd fc60 bl 800099c hdma_usart1_rx.Instance = DMA1_Channel5; 80030dc: 4b37 ldr r3, [pc, #220] ; (80031bc ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80030de: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 80030e0: e884 0048 stmia.w r4, {r3, r6} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80030e4: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80030e6: 60a6 str r6, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80030e8: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80030ea: 6126 str r6, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80030ec: 6166 str r6, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 80030ee: 61a6 str r6, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 80030f0: 61e6 str r6, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80030f2: f7fd f965 bl 80003c0 80030f6: b108 cbz r0, 80030fc { Error_Handler(); 80030f8: f7ff ff50 bl 8002f9c } __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 80030fc: 636c str r4, [r5, #52] ; 0x34 80030fe: 6265 str r5, [r4, #36] ; 0x24 /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; 8003100: 4b2f ldr r3, [pc, #188] ; (80031c0 ) 8003102: 4c30 ldr r4, [pc, #192] ; (80031c4 ) } __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx); /* USART2_TX Init */ hdma_usart2_tx.Instance = DMA1_Channel7; 8003104: 6023 str r3, [r4, #0] hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 8003106: 2310 movs r3, #16 hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; 8003108: 2280 movs r2, #128 ; 0x80 hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 800310a: 6063 str r3, [r4, #4] hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; 800310c: 2300 movs r3, #0 hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; 800310e: 60e2 str r2, [r4, #12] hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; 8003110: 60a3 str r3, [r4, #8] hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8003112: 6123 str r3, [r4, #16] hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8003114: 6163 str r3, [r4, #20] hdma_usart2_tx.Init.Mode = DMA_NORMAL; 8003116: 61a3 str r3, [r4, #24] hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW; 8003118: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) 800311a: 4620 mov r0, r4 800311c: f7fd f950 bl 80003c0 8003120: b108 cbz r0, 8003126 { Error_Handler(); 8003122: f7ff ff3b bl 8002f9c } __HAL_LINKDMA(huart,hdmatx,hdma_usart2_tx); 8003126: 632c str r4, [r5, #48] ; 0x30 8003128: 6265 str r5, [r4, #36] ; 0x24 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 800312a: b008 add sp, #32 800312c: bd70 pop {r4, r5, r6, pc} else if(huart->Instance==USART2) 800312e: 4a26 ldr r2, [pc, #152] ; (80031c8 ) 8003130: 4293 cmp r3, r2 8003132: d1fa bne.n 800312a __HAL_RCC_USART2_CLK_ENABLE(); 8003134: 4b1e ldr r3, [pc, #120] ; (80031b0 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003136: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 8003138: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800313a: 481e ldr r0, [pc, #120] ; (80031b4 ) __HAL_RCC_USART2_CLK_ENABLE(); 800313c: f442 3200 orr.w r2, r2, #131072 ; 0x20000 8003140: 61da str r2, [r3, #28] 8003142: 69da ldr r2, [r3, #28] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003144: 2600 movs r6, #0 __HAL_RCC_USART2_CLK_ENABLE(); 8003146: f402 3200 and.w r2, r2, #131072 ; 0x20000 800314a: 9202 str r2, [sp, #8] 800314c: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 800314e: 699a ldr r2, [r3, #24] hdma_usart2_rx.Instance = DMA1_Channel6; 8003150: 4c1e ldr r4, [pc, #120] ; (80031cc ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8003152: f042 0204 orr.w r2, r2, #4 8003156: 619a str r2, [r3, #24] 8003158: 699b ldr r3, [r3, #24] 800315a: f003 0304 and.w r3, r3, #4 800315e: 9303 str r3, [sp, #12] 8003160: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 8003162: 2304 movs r3, #4 8003164: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003166: 2302 movs r3, #2 8003168: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800316a: 2303 movs r3, #3 800316c: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800316e: f7fd fc15 bl 800099c GPIO_InitStruct.Pin = GPIO_PIN_3; 8003172: 2308 movs r3, #8 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003174: 480f ldr r0, [pc, #60] ; (80031b4 ) 8003176: a904 add r1, sp, #16 GPIO_InitStruct.Pin = GPIO_PIN_3; 8003178: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800317a: 9605 str r6, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800317c: 9606 str r6, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800317e: f7fd fc0d bl 800099c hdma_usart2_rx.Instance = DMA1_Channel6; 8003182: 4b13 ldr r3, [pc, #76] ; (80031d0 ) if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) 8003184: 4620 mov r0, r4 hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8003186: e884 0048 stmia.w r4, {r3, r6} hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; 800318a: 2380 movs r3, #128 ; 0x80 hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; 800318c: 60a6 str r6, [r4, #8] hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; 800318e: 60e3 str r3, [r4, #12] hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8003190: 6126 str r6, [r4, #16] hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8003192: 6166 str r6, [r4, #20] hdma_usart2_rx.Init.Mode = DMA_NORMAL; 8003194: 61a6 str r6, [r4, #24] hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW; 8003196: 61e6 str r6, [r4, #28] if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) 8003198: f7fd f912 bl 80003c0 800319c: b108 cbz r0, 80031a2 Error_Handler(); 800319e: f7ff fefd bl 8002f9c __HAL_LINKDMA(huart,hdmarx,hdma_usart2_rx); 80031a2: 636c str r4, [r5, #52] ; 0x34 80031a4: 6265 str r5, [r4, #36] ; 0x24 hdma_usart2_tx.Instance = DMA1_Channel7; 80031a6: 4b0b ldr r3, [pc, #44] ; (80031d4 ) 80031a8: 4c0b ldr r4, [pc, #44] ; (80031d8 ) 80031aa: e7ab b.n 8003104 80031ac: 40013800 .word 0x40013800 80031b0: 40021000 .word 0x40021000 80031b4: 40010800 .word 0x40010800 80031b8: 20000570 .word 0x20000570 80031bc: 40020058 .word 0x40020058 80031c0: 40020044 .word 0x40020044 80031c4: 2000052c .word 0x2000052c 80031c8: 40004400 .word 0x40004400 80031cc: 20000494 .word 0x20000494 80031d0: 4002006c .word 0x4002006c 80031d4: 40020080 .word 0x40020080 80031d8: 200005b4 .word 0x200005b4 080031dc : 80031dc: 4770 bx lr 080031de : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80031de: e7fe b.n 80031de 080031e0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80031e0: e7fe b.n 80031e0 080031e2 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80031e2: e7fe b.n 80031e2 080031e4 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80031e4: e7fe b.n 80031e4 080031e6 : 80031e6: 4770 bx lr 080031e8 : 80031e8: 4770 bx lr 080031ea : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80031ea: 4770 bx lr 080031ec : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80031ec: f7fd b85c b.w 80002a8 080031f0 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 80031f0: 4801 ldr r0, [pc, #4] ; (80031f8 ) 80031f2: f7fd b9d1 b.w 8000598 80031f6: bf00 nop 80031f8: 2000052c .word 0x2000052c 080031fc : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 80031fc: 4801 ldr r0, [pc, #4] ; (8003204 ) 80031fe: f7fd b9cb b.w 8000598 8003202: bf00 nop 8003204: 20000570 .word 0x20000570 08003208 : void DMA1_Channel6_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel6_IRQn 0 */ /* USER CODE END DMA1_Channel6_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_rx); 8003208: 4801 ldr r0, [pc, #4] ; (8003210 ) 800320a: f7fd b9c5 b.w 8000598 800320e: bf00 nop 8003210: 20000494 .word 0x20000494 08003214 : void DMA1_Channel7_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel7_IRQn 0 */ /* USER CODE END DMA1_Channel7_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_tx); 8003214: 4801 ldr r0, [pc, #4] ; (800321c ) 8003216: f7fd b9bf b.w 8000598 800321a: bf00 nop 800321c: 200005b4 .word 0x200005b4 08003220 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8003220: 4801 ldr r0, [pc, #4] ; (8003228 ) 8003222: f7fe beb1 b.w 8001f88 8003226: bf00 nop 8003228: 200005f8 .word 0x200005f8 0800322c : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 800322c: 4801 ldr r0, [pc, #4] ; (8003234 ) 800322e: f7fe beab b.w 8001f88 8003232: bf00 nop 8003234: 20000678 .word 0x20000678 08003238 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8003238: 4801 ldr r0, [pc, #4] ; (8003240 ) 800323a: f7fe bb48 b.w 80018ce 800323e: bf00 nop 8003240: 20000638 .word 0x20000638 08003244 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8003244: b570 push {r4, r5, r6, lr} 8003246: 460e mov r6, r1 8003248: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800324a: 460c mov r4, r1 800324c: 1ba3 subs r3, r4, r6 800324e: 429d cmp r5, r3 8003250: dc01 bgt.n 8003256 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8003252: 4628 mov r0, r5 8003254: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 8003256: f3af 8000 nop.w 800325a: f804 0b01 strb.w r0, [r4], #1 800325e: e7f5 b.n 800324c <_read+0x8> 08003260 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8003260: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8003262: 4b0a ldr r3, [pc, #40] ; (800328c <_sbrk+0x2c>) { 8003264: 4602 mov r2, r0 if (heap_end == 0) 8003266: 6819 ldr r1, [r3, #0] 8003268: b909 cbnz r1, 800326e <_sbrk+0xe> heap_end = &end; 800326a: 4909 ldr r1, [pc, #36] ; (8003290 <_sbrk+0x30>) 800326c: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 800326e: 4669 mov r1, sp prev_heap_end = heap_end; 8003270: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8003272: 4402 add r2, r0 8003274: 428a cmp r2, r1 8003276: d906 bls.n 8003286 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8003278: f000 f904 bl 8003484 <__errno> 800327c: 230c movs r3, #12 800327e: 6003 str r3, [r0, #0] return (caddr_t) -1; 8003280: f04f 30ff mov.w r0, #4294967295 8003284: bd08 pop {r3, pc} } heap_end += incr; 8003286: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8003288: bd08 pop {r3, pc} 800328a: bf00 nop 800328c: 200002f4 .word 0x200002f4 8003290: 200013b8 .word 0x200013b8 08003294 <_close>: int _close(int file) { return -1; } 8003294: f04f 30ff mov.w r0, #4294967295 8003298: 4770 bx lr 0800329a <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 800329a: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 800329e: 2000 movs r0, #0 st->st_mode = S_IFCHR; 80032a0: 604b str r3, [r1, #4] } 80032a2: 4770 bx lr 080032a4 <_isatty>: int _isatty(int file) { return 1; } 80032a4: 2001 movs r0, #1 80032a6: 4770 bx lr 080032a8 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 80032a8: 2000 movs r0, #0 80032aa: 4770 bx lr 080032ac : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 80032ac: 4b0f ldr r3, [pc, #60] ; (80032ec ) 80032ae: 681a ldr r2, [r3, #0] 80032b0: f042 0201 orr.w r2, r2, #1 80032b4: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 80032b6: 6859 ldr r1, [r3, #4] 80032b8: 4a0d ldr r2, [pc, #52] ; (80032f0 ) 80032ba: 400a ands r2, r1 80032bc: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 80032be: 681a ldr r2, [r3, #0] 80032c0: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 80032c4: f422 3280 bic.w r2, r2, #65536 ; 0x10000 80032c8: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 80032ca: 681a ldr r2, [r3, #0] 80032cc: f422 2280 bic.w r2, r2, #262144 ; 0x40000 80032d0: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 80032d2: 685a ldr r2, [r3, #4] 80032d4: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80032d8: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80032da: f44f 021f mov.w r2, #10420224 ; 0x9f0000 80032de: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80032e0: f04f 6200 mov.w r2, #134217728 ; 0x8000000 80032e4: 4b03 ldr r3, [pc, #12] ; (80032f4 ) 80032e6: 609a str r2, [r3, #8] 80032e8: 4770 bx lr 80032ea: bf00 nop 80032ec: 40021000 .word 0x40021000 80032f0: f8ff0000 .word 0xf8ff0000 80032f4: e000ed00 .word 0xe000ed00 080032f8 : UARTQUEUE TerminalQueue; UARTQUEUE WifiQueue; void InitUartQueue(pUARTQUEUE pQueue) { pQueue->data = pQueue->head = pQueue->tail = 0; 80032f8: 2300 movs r3, #0 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 80032fa: 2201 movs r2, #1 pQueue->data = pQueue->head = pQueue->tail = 0; 80032fc: 6043 str r3, [r0, #4] 80032fe: 6003 str r3, [r0, #0] 8003300: 6083 str r3, [r0, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8003302: 4902 ldr r1, [pc, #8] ; (800330c ) 8003304: 4802 ldr r0, [pc, #8] ; (8003310 ) 8003306: f7fe bd6d b.w 8001de4 800330a: bf00 nop 800330c: 200006c4 .word 0x200006c4 8003310: 200005f8 .word 0x200005f8 08003314 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8003314: 4a29 ldr r2, [pc, #164] ; (80033bc ) { 8003316: b570 push {r4, r5, r6, lr} update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8003318: 6810 ldr r0, [r2, #0] 800331a: 4c29 ldr r4, [pc, #164] ; (80033c0 ) 800331c: 1c43 adds r3, r0, #1 800331e: 6013 str r3, [r2, #0] 8003320: 4b28 ldr r3, [pc, #160] ; (80033c4 ) 8003322: 6859 ldr r1, [r3, #4] 8003324: f103 050c add.w r5, r3, #12 8003328: 5d4d ldrb r5, [r1, r5] pQueue->tail++; 800332a: 3101 adds r1, #1 update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 800332c: 5425 strb r5, [r4, r0] if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 800332e: f240 404b movw r0, #1099 ; 0x44b 8003332: 4281 cmp r1, r0 8003334: bfc8 it gt 8003336: 2100 movgt r1, #0 pQueue->data--; 8003338: 689d ldr r5, [r3, #8] if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 800333a: 6059 str r1, [r3, #4] pQueue->data--; 800333c: 3d01 subs r5, #1 800333e: 609d str r5, [r3, #8] if(pQueue->data == 0){ 8003340: b97d cbnz r5, 8003362 for(int i = 0; i < 128; i++){ printf("%02x",update_data_buf[i]); } #endif // PYJ.2019.07.15_END -- cnt = 0; if(update_data_buf[0] == 0xbe){ 8003342: 7823 ldrb r3, [r4, #0] cnt = 0; 8003344: 6015 str r5, [r2, #0] if(update_data_buf[0] == 0xbe){ 8003346: 2bbe cmp r3, #190 ; 0xbe 8003348: d10c bne.n 8003364 FirmwareUpdateStart(&update_data_buf[0]); 800334a: 481d ldr r0, [pc, #116] ; (80033c0 ) 800334c: f7fe fec4 bl 80020d8 else{ printf("CHECK SUM ERR %x \r\n",update_data_buf[MBIC_CHECKSHUM_INDEX]); } } for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) update_data_buf[i] = 0; 8003350: 2300 movs r3, #0 for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) 8003352: f240 424c movw r2, #1100 ; 0x44c update_data_buf[i] = 0; 8003356: 5563 strb r3, [r4, r5] for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) 8003358: 3501 adds r5, #1 800335a: 4295 cmp r5, r2 800335c: d1fb bne.n 8003356 FirmwareTimerCnt = 0; 800335e: 4a1a ldr r2, [pc, #104] ; (80033c8 ) 8003360: 6013 str r3, [r2, #0] 8003362: bd70 pop {r4, r5, r6, pc} else if(update_data_buf[0] == MBIC_PREAMBLE0 8003364: 2b16 cmp r3, #22 8003366: d1f3 bne.n 8003350 &&update_data_buf[1] == MBIC_PREAMBLE1 8003368: 7863 ldrb r3, [r4, #1] 800336a: 2b16 cmp r3, #22 800336c: d1f0 bne.n 8003350 &&update_data_buf[2] == MBIC_PREAMBLE2 800336e: 78a3 ldrb r3, [r4, #2] 8003370: 2b16 cmp r3, #22 8003372: d1ed bne.n 8003350 &&update_data_buf[3] == MBIC_PREAMBLE3){ 8003374: 78e3 ldrb r3, [r4, #3] 8003376: 2b16 cmp r3, #22 8003378: d1ea bne.n 8003350 if(Chksum_Check(update_data_buf,MBIC_HEADER_SIZE - 4,update_data_buf[MBIC_CHECKSHUM_INDEX])){ 800337a: 7d62 ldrb r2, [r4, #21] 800337c: 2112 movs r1, #18 800337e: 4810 ldr r0, [pc, #64] ; (80033c0 ) 8003380: f7fe fefc bl 800217c 8003384: b1b0 cbz r0, 80033b4 Length = ((update_data_buf[MBIC_LENGTH_0] << 8) | update_data_buf[MBIC_LENGTH_1]); 8003386: 7ce3 ldrb r3, [r4, #19] 8003388: 7d21 ldrb r1, [r4, #20] if(CRC16_Check(&update_data_buf[MBIC_PAYLOADSTART], Length,CrcChk)){ 800338a: 4810 ldr r0, [pc, #64] ; (80033cc ) CrcChk = ((update_data_buf[MBIC_PAYLOADSTART + Length + 1] << 8) | (update_data_buf[MBIC_PAYLOADSTART + Length + 2])); 800338c: ea41 2103 orr.w r1, r1, r3, lsl #8 8003390: 1863 adds r3, r4, r1 8003392: 7dda ldrb r2, [r3, #23] 8003394: 7e1e ldrb r6, [r3, #24] 8003396: ea46 2602 orr.w r6, r6, r2, lsl #8 if(CRC16_Check(&update_data_buf[MBIC_PAYLOADSTART], Length,CrcChk)){ 800339a: 4632 mov r2, r6 800339c: f7fe ff2c bl 80021f8 80033a0: b118 cbz r0, 80033aa MBIC_Bootloader_FirmwareUpdate(&update_data_buf[0]); 80033a2: 4807 ldr r0, [pc, #28] ; (80033c0 ) 80033a4: f7ff f802 bl 80023ac 80033a8: e7d2 b.n 8003350 printf("CRC ERR %x \r\n",CrcChk); 80033aa: 4631 mov r1, r6 80033ac: 4808 ldr r0, [pc, #32] ; (80033d0 ) printf("CHECK SUM ERR %x \r\n",update_data_buf[MBIC_CHECKSHUM_INDEX]); 80033ae: f000 f89b bl 80034e8 80033b2: e7cd b.n 8003350 80033b4: 7d61 ldrb r1, [r4, #21] 80033b6: 4807 ldr r0, [pc, #28] ; (80033d4 ) 80033b8: e7f9 b.n 80033ae 80033ba: bf00 nop 80033bc: 200002f8 .word 0x200002f8 80033c0: 20000b10 .word 0x20000b10 80033c4: 200006b8 .word 0x200006b8 80033c8: 200002e8 .word 0x200002e8 80033cc: 20000b26 .word 0x20000b26 80033d0: 08004d4d .word 0x08004d4d 80033d4: 08004d5b .word 0x08004d5b 080033d8 : UartTimerCnt = 0; 80033d8: 2200 movs r2, #0 80033da: 4b0e ldr r3, [pc, #56] ; (8003414 ) { 80033dc: b510 push {r4, lr} UartTimerCnt = 0; 80033de: 601a str r2, [r3, #0] if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0; 80033e0: f240 424b movw r2, #1099 ; 0x44b pQueue->head++; 80033e4: 4c0c ldr r4, [pc, #48] ; (8003418 ) 80033e6: 6823 ldr r3, [r4, #0] 80033e8: 3301 adds r3, #1 80033ea: 4293 cmp r3, r2 80033ec: bfc8 it gt 80033ee: 2300 movgt r3, #0 80033f0: 6023 str r3, [r4, #0] pQueue->data++; 80033f2: 68a3 ldr r3, [r4, #8] 80033f4: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 80033f6: 4293 cmp r3, r2 pQueue->data++; 80033f8: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 80033fa: dd01 ble.n 8003400 GetDataFromUartQueue(huart); 80033fc: f7ff ff8a bl 8003314 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8003400: 6823 ldr r3, [r4, #0] 8003402: 4906 ldr r1, [pc, #24] ; (800341c ) 8003404: 2201 movs r2, #1 } 8003406: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800340a: 4419 add r1, r3 800340c: 4804 ldr r0, [pc, #16] ; (8003420 ) 800340e: f7fe bce9 b.w 8001de4 8003412: bf00 nop 8003414: 200002f0 .word 0x200002f0 8003418: 200006b8 .word 0x200006b8 800341c: 200006c4 .word 0x200006c4 8003420: 200005f8 .word 0x200005f8 08003424 : } void Uart1_Data_Send(uint8_t* data,uint16_t size){ // printf("size : %d \r\n",size); HAL_UART_Transmit(&huart1, data, size, 0xFFFF); 8003424: 460a mov r2, r1 8003426: f64f 73ff movw r3, #65535 ; 0xffff 800342a: 4601 mov r1, r0 800342c: 4801 ldr r0, [pc, #4] ; (8003434 ) 800342e: f7fe bc7d b.w 8001d2c 8003432: bf00 nop 8003434: 200005f8 .word 0x200005f8 08003438 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8003438: 2100 movs r1, #0 b LoopCopyDataInit 800343a: e003 b.n 8003444 0800343c : CopyDataInit: ldr r3, =_sidata 800343c: 4b0b ldr r3, [pc, #44] ; (800346c ) ldr r3, [r3, r1] 800343e: 585b ldr r3, [r3, r1] str r3, [r0, r1] 8003440: 5043 str r3, [r0, r1] adds r1, r1, #4 8003442: 3104 adds r1, #4 08003444 : LoopCopyDataInit: ldr r0, =_sdata 8003444: 480a ldr r0, [pc, #40] ; (8003470 ) ldr r3, =_edata 8003446: 4b0b ldr r3, [pc, #44] ; (8003474 ) adds r2, r0, r1 8003448: 1842 adds r2, r0, r1 cmp r2, r3 800344a: 429a cmp r2, r3 bcc CopyDataInit 800344c: d3f6 bcc.n 800343c ldr r2, =_sbss 800344e: 4a0a ldr r2, [pc, #40] ; (8003478 ) b LoopFillZerobss 8003450: e002 b.n 8003458 08003452 : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 8003452: 2300 movs r3, #0 str r3, [r2], #4 8003454: f842 3b04 str.w r3, [r2], #4 08003458 : LoopFillZerobss: ldr r3, = _ebss 8003458: 4b08 ldr r3, [pc, #32] ; (800347c ) cmp r2, r3 800345a: 429a cmp r2, r3 bcc FillZerobss 800345c: d3f9 bcc.n 8003452 /* Call the clock system intitialization function.*/ bl SystemInit 800345e: f7ff ff25 bl 80032ac /* Call static constructors */ bl __libc_init_array 8003462: f000 f815 bl 8003490 <__libc_init_array> /* Call the application's entry point.*/ bl main 8003466: f7ff fca7 bl 8002db8
bx lr 800346a: 4770 bx lr ldr r3, =_sidata 800346c: 08004e10 .word 0x08004e10 ldr r0, =_sdata 8003470: 20000000 .word 0x20000000 ldr r3, =_edata 8003474: 2000027c .word 0x2000027c ldr r2, =_sbss 8003478: 20000280 .word 0x20000280 ldr r3, = _ebss 800347c: 200013b8 .word 0x200013b8 08003480 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8003480: e7fe b.n 8003480 ... 08003484 <__errno>: 8003484: 4b01 ldr r3, [pc, #4] ; (800348c <__errno+0x8>) 8003486: 6818 ldr r0, [r3, #0] 8003488: 4770 bx lr 800348a: bf00 nop 800348c: 20000218 .word 0x20000218 08003490 <__libc_init_array>: 8003490: b570 push {r4, r5, r6, lr} 8003492: 2500 movs r5, #0 8003494: 4e0c ldr r6, [pc, #48] ; (80034c8 <__libc_init_array+0x38>) 8003496: 4c0d ldr r4, [pc, #52] ; (80034cc <__libc_init_array+0x3c>) 8003498: 1ba4 subs r4, r4, r6 800349a: 10a4 asrs r4, r4, #2 800349c: 42a5 cmp r5, r4 800349e: d109 bne.n 80034b4 <__libc_init_array+0x24> 80034a0: f001 f892 bl 80045c8 <_init> 80034a4: 2500 movs r5, #0 80034a6: 4e0a ldr r6, [pc, #40] ; (80034d0 <__libc_init_array+0x40>) 80034a8: 4c0a ldr r4, [pc, #40] ; (80034d4 <__libc_init_array+0x44>) 80034aa: 1ba4 subs r4, r4, r6 80034ac: 10a4 asrs r4, r4, #2 80034ae: 42a5 cmp r5, r4 80034b0: d105 bne.n 80034be <__libc_init_array+0x2e> 80034b2: bd70 pop {r4, r5, r6, pc} 80034b4: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80034b8: 4798 blx r3 80034ba: 3501 adds r5, #1 80034bc: e7ee b.n 800349c <__libc_init_array+0xc> 80034be: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80034c2: 4798 blx r3 80034c4: 3501 adds r5, #1 80034c6: e7f2 b.n 80034ae <__libc_init_array+0x1e> 80034c8: 08004e08 .word 0x08004e08 80034cc: 08004e08 .word 0x08004e08 80034d0: 08004e08 .word 0x08004e08 80034d4: 08004e0c .word 0x08004e0c 080034d8 : 80034d8: 4603 mov r3, r0 80034da: 4402 add r2, r0 80034dc: 4293 cmp r3, r2 80034de: d100 bne.n 80034e2 80034e0: 4770 bx lr 80034e2: f803 1b01 strb.w r1, [r3], #1 80034e6: e7f9 b.n 80034dc 080034e8 : 80034e8: b40f push {r0, r1, r2, r3} 80034ea: 4b0a ldr r3, [pc, #40] ; (8003514 ) 80034ec: b513 push {r0, r1, r4, lr} 80034ee: 681c ldr r4, [r3, #0] 80034f0: b124 cbz r4, 80034fc 80034f2: 69a3 ldr r3, [r4, #24] 80034f4: b913 cbnz r3, 80034fc 80034f6: 4620 mov r0, r4 80034f8: f000 faee bl 8003ad8 <__sinit> 80034fc: ab05 add r3, sp, #20 80034fe: 9a04 ldr r2, [sp, #16] 8003500: 68a1 ldr r1, [r4, #8] 8003502: 4620 mov r0, r4 8003504: 9301 str r3, [sp, #4] 8003506: f000 fcaf bl 8003e68 <_vfiprintf_r> 800350a: b002 add sp, #8 800350c: e8bd 4010 ldmia.w sp!, {r4, lr} 8003510: b004 add sp, #16 8003512: 4770 bx lr 8003514: 20000218 .word 0x20000218 08003518 : 8003518: b538 push {r3, r4, r5, lr} 800351a: 4b08 ldr r3, [pc, #32] ; (800353c ) 800351c: 4605 mov r5, r0 800351e: 681c ldr r4, [r3, #0] 8003520: b124 cbz r4, 800352c 8003522: 69a3 ldr r3, [r4, #24] 8003524: b913 cbnz r3, 800352c 8003526: 4620 mov r0, r4 8003528: f000 fad6 bl 8003ad8 <__sinit> 800352c: 68a2 ldr r2, [r4, #8] 800352e: 4629 mov r1, r5 8003530: 4620 mov r0, r4 8003532: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8003536: f000 bf45 b.w 80043c4 <_putc_r> 800353a: bf00 nop 800353c: 20000218 .word 0x20000218 08003540 <_puts_r>: 8003540: b570 push {r4, r5, r6, lr} 8003542: 460e mov r6, r1 8003544: 4605 mov r5, r0 8003546: b118 cbz r0, 8003550 <_puts_r+0x10> 8003548: 6983 ldr r3, [r0, #24] 800354a: b90b cbnz r3, 8003550 <_puts_r+0x10> 800354c: f000 fac4 bl 8003ad8 <__sinit> 8003550: 69ab ldr r3, [r5, #24] 8003552: 68ac ldr r4, [r5, #8] 8003554: b913 cbnz r3, 800355c <_puts_r+0x1c> 8003556: 4628 mov r0, r5 8003558: f000 fabe bl 8003ad8 <__sinit> 800355c: 4b23 ldr r3, [pc, #140] ; (80035ec <_puts_r+0xac>) 800355e: 429c cmp r4, r3 8003560: d117 bne.n 8003592 <_puts_r+0x52> 8003562: 686c ldr r4, [r5, #4] 8003564: 89a3 ldrh r3, [r4, #12] 8003566: 071b lsls r3, r3, #28 8003568: d51d bpl.n 80035a6 <_puts_r+0x66> 800356a: 6923 ldr r3, [r4, #16] 800356c: b1db cbz r3, 80035a6 <_puts_r+0x66> 800356e: 3e01 subs r6, #1 8003570: 68a3 ldr r3, [r4, #8] 8003572: f816 1f01 ldrb.w r1, [r6, #1]! 8003576: 3b01 subs r3, #1 8003578: 60a3 str r3, [r4, #8] 800357a: b9e9 cbnz r1, 80035b8 <_puts_r+0x78> 800357c: 2b00 cmp r3, #0 800357e: da2e bge.n 80035de <_puts_r+0x9e> 8003580: 4622 mov r2, r4 8003582: 210a movs r1, #10 8003584: 4628 mov r0, r5 8003586: f000 f8f5 bl 8003774 <__swbuf_r> 800358a: 3001 adds r0, #1 800358c: d011 beq.n 80035b2 <_puts_r+0x72> 800358e: 200a movs r0, #10 8003590: bd70 pop {r4, r5, r6, pc} 8003592: 4b17 ldr r3, [pc, #92] ; (80035f0 <_puts_r+0xb0>) 8003594: 429c cmp r4, r3 8003596: d101 bne.n 800359c <_puts_r+0x5c> 8003598: 68ac ldr r4, [r5, #8] 800359a: e7e3 b.n 8003564 <_puts_r+0x24> 800359c: 4b15 ldr r3, [pc, #84] ; (80035f4 <_puts_r+0xb4>) 800359e: 429c cmp r4, r3 80035a0: bf08 it eq 80035a2: 68ec ldreq r4, [r5, #12] 80035a4: e7de b.n 8003564 <_puts_r+0x24> 80035a6: 4621 mov r1, r4 80035a8: 4628 mov r0, r5 80035aa: f000 f935 bl 8003818 <__swsetup_r> 80035ae: 2800 cmp r0, #0 80035b0: d0dd beq.n 800356e <_puts_r+0x2e> 80035b2: f04f 30ff mov.w r0, #4294967295 80035b6: bd70 pop {r4, r5, r6, pc} 80035b8: 2b00 cmp r3, #0 80035ba: da04 bge.n 80035c6 <_puts_r+0x86> 80035bc: 69a2 ldr r2, [r4, #24] 80035be: 4293 cmp r3, r2 80035c0: db06 blt.n 80035d0 <_puts_r+0x90> 80035c2: 290a cmp r1, #10 80035c4: d004 beq.n 80035d0 <_puts_r+0x90> 80035c6: 6823 ldr r3, [r4, #0] 80035c8: 1c5a adds r2, r3, #1 80035ca: 6022 str r2, [r4, #0] 80035cc: 7019 strb r1, [r3, #0] 80035ce: e7cf b.n 8003570 <_puts_r+0x30> 80035d0: 4622 mov r2, r4 80035d2: 4628 mov r0, r5 80035d4: f000 f8ce bl 8003774 <__swbuf_r> 80035d8: 3001 adds r0, #1 80035da: d1c9 bne.n 8003570 <_puts_r+0x30> 80035dc: e7e9 b.n 80035b2 <_puts_r+0x72> 80035de: 200a movs r0, #10 80035e0: 6823 ldr r3, [r4, #0] 80035e2: 1c5a adds r2, r3, #1 80035e4: 6022 str r2, [r4, #0] 80035e6: 7018 strb r0, [r3, #0] 80035e8: bd70 pop {r4, r5, r6, pc} 80035ea: bf00 nop 80035ec: 08004d94 .word 0x08004d94 80035f0: 08004db4 .word 0x08004db4 80035f4: 08004d74 .word 0x08004d74 080035f8 : 80035f8: 4b02 ldr r3, [pc, #8] ; (8003604 ) 80035fa: 4601 mov r1, r0 80035fc: 6818 ldr r0, [r3, #0] 80035fe: f7ff bf9f b.w 8003540 <_puts_r> 8003602: bf00 nop 8003604: 20000218 .word 0x20000218 08003608 : 8003608: 2900 cmp r1, #0 800360a: f44f 6380 mov.w r3, #1024 ; 0x400 800360e: bf0c ite eq 8003610: 2202 moveq r2, #2 8003612: 2200 movne r2, #0 8003614: f000 b800 b.w 8003618 08003618 : 8003618: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 800361c: 461d mov r5, r3 800361e: 4b51 ldr r3, [pc, #324] ; (8003764 ) 8003620: 4604 mov r4, r0 8003622: 681e ldr r6, [r3, #0] 8003624: 460f mov r7, r1 8003626: 4690 mov r8, r2 8003628: b126 cbz r6, 8003634 800362a: 69b3 ldr r3, [r6, #24] 800362c: b913 cbnz r3, 8003634 800362e: 4630 mov r0, r6 8003630: f000 fa52 bl 8003ad8 <__sinit> 8003634: 4b4c ldr r3, [pc, #304] ; (8003768 ) 8003636: 429c cmp r4, r3 8003638: d152 bne.n 80036e0 800363a: 6874 ldr r4, [r6, #4] 800363c: f1b8 0f02 cmp.w r8, #2 8003640: d006 beq.n 8003650 8003642: f1b8 0f01 cmp.w r8, #1 8003646: f200 8089 bhi.w 800375c 800364a: 2d00 cmp r5, #0 800364c: f2c0 8086 blt.w 800375c 8003650: 4621 mov r1, r4 8003652: 4630 mov r0, r6 8003654: f000 f9d6 bl 8003a04 <_fflush_r> 8003658: 6b61 ldr r1, [r4, #52] ; 0x34 800365a: b141 cbz r1, 800366e 800365c: f104 0344 add.w r3, r4, #68 ; 0x44 8003660: 4299 cmp r1, r3 8003662: d002 beq.n 800366a 8003664: 4630 mov r0, r6 8003666: f000 fb2d bl 8003cc4 <_free_r> 800366a: 2300 movs r3, #0 800366c: 6363 str r3, [r4, #52] ; 0x34 800366e: 2300 movs r3, #0 8003670: 61a3 str r3, [r4, #24] 8003672: 6063 str r3, [r4, #4] 8003674: 89a3 ldrh r3, [r4, #12] 8003676: 061b lsls r3, r3, #24 8003678: d503 bpl.n 8003682 800367a: 6921 ldr r1, [r4, #16] 800367c: 4630 mov r0, r6 800367e: f000 fb21 bl 8003cc4 <_free_r> 8003682: 89a3 ldrh r3, [r4, #12] 8003684: f1b8 0f02 cmp.w r8, #2 8003688: f423 634a bic.w r3, r3, #3232 ; 0xca0 800368c: f023 0303 bic.w r3, r3, #3 8003690: 81a3 strh r3, [r4, #12] 8003692: d05d beq.n 8003750 8003694: ab01 add r3, sp, #4 8003696: 466a mov r2, sp 8003698: 4621 mov r1, r4 800369a: 4630 mov r0, r6 800369c: f000 faa6 bl 8003bec <__swhatbuf_r> 80036a0: 89a3 ldrh r3, [r4, #12] 80036a2: 4318 orrs r0, r3 80036a4: 81a0 strh r0, [r4, #12] 80036a6: bb2d cbnz r5, 80036f4 80036a8: 9d00 ldr r5, [sp, #0] 80036aa: 4628 mov r0, r5 80036ac: f000 fb02 bl 8003cb4 80036b0: 4607 mov r7, r0 80036b2: 2800 cmp r0, #0 80036b4: d14e bne.n 8003754 80036b6: f8dd 9000 ldr.w r9, [sp] 80036ba: 45a9 cmp r9, r5 80036bc: d13c bne.n 8003738 80036be: f04f 30ff mov.w r0, #4294967295 80036c2: 89a3 ldrh r3, [r4, #12] 80036c4: f043 0302 orr.w r3, r3, #2 80036c8: 81a3 strh r3, [r4, #12] 80036ca: 2300 movs r3, #0 80036cc: 60a3 str r3, [r4, #8] 80036ce: f104 0347 add.w r3, r4, #71 ; 0x47 80036d2: 6023 str r3, [r4, #0] 80036d4: 6123 str r3, [r4, #16] 80036d6: 2301 movs r3, #1 80036d8: 6163 str r3, [r4, #20] 80036da: b003 add sp, #12 80036dc: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80036e0: 4b22 ldr r3, [pc, #136] ; (800376c ) 80036e2: 429c cmp r4, r3 80036e4: d101 bne.n 80036ea 80036e6: 68b4 ldr r4, [r6, #8] 80036e8: e7a8 b.n 800363c 80036ea: 4b21 ldr r3, [pc, #132] ; (8003770 ) 80036ec: 429c cmp r4, r3 80036ee: bf08 it eq 80036f0: 68f4 ldreq r4, [r6, #12] 80036f2: e7a3 b.n 800363c 80036f4: 2f00 cmp r7, #0 80036f6: d0d8 beq.n 80036aa 80036f8: 69b3 ldr r3, [r6, #24] 80036fa: b913 cbnz r3, 8003702 80036fc: 4630 mov r0, r6 80036fe: f000 f9eb bl 8003ad8 <__sinit> 8003702: f1b8 0f01 cmp.w r8, #1 8003706: bf08 it eq 8003708: 89a3 ldrheq r3, [r4, #12] 800370a: 6027 str r7, [r4, #0] 800370c: bf04 itt eq 800370e: f043 0301 orreq.w r3, r3, #1 8003712: 81a3 strheq r3, [r4, #12] 8003714: 89a3 ldrh r3, [r4, #12] 8003716: 6127 str r7, [r4, #16] 8003718: f013 0008 ands.w r0, r3, #8 800371c: 6165 str r5, [r4, #20] 800371e: d01b beq.n 8003758 8003720: f013 0001 ands.w r0, r3, #1 8003724: f04f 0300 mov.w r3, #0 8003728: bf1f itttt ne 800372a: 426d negne r5, r5 800372c: 60a3 strne r3, [r4, #8] 800372e: 61a5 strne r5, [r4, #24] 8003730: 4618 movne r0, r3 8003732: bf08 it eq 8003734: 60a5 streq r5, [r4, #8] 8003736: e7d0 b.n 80036da 8003738: 4648 mov r0, r9 800373a: f000 fabb bl 8003cb4 800373e: 4607 mov r7, r0 8003740: 2800 cmp r0, #0 8003742: d0bc beq.n 80036be 8003744: 89a3 ldrh r3, [r4, #12] 8003746: 464d mov r5, r9 8003748: f043 0380 orr.w r3, r3, #128 ; 0x80 800374c: 81a3 strh r3, [r4, #12] 800374e: e7d3 b.n 80036f8 8003750: 2000 movs r0, #0 8003752: e7b6 b.n 80036c2 8003754: 46a9 mov r9, r5 8003756: e7f5 b.n 8003744 8003758: 60a0 str r0, [r4, #8] 800375a: e7be b.n 80036da 800375c: f04f 30ff mov.w r0, #4294967295 8003760: e7bb b.n 80036da 8003762: bf00 nop 8003764: 20000218 .word 0x20000218 8003768: 08004d94 .word 0x08004d94 800376c: 08004db4 .word 0x08004db4 8003770: 08004d74 .word 0x08004d74 08003774 <__swbuf_r>: 8003774: b5f8 push {r3, r4, r5, r6, r7, lr} 8003776: 460e mov r6, r1 8003778: 4614 mov r4, r2 800377a: 4605 mov r5, r0 800377c: b118 cbz r0, 8003786 <__swbuf_r+0x12> 800377e: 6983 ldr r3, [r0, #24] 8003780: b90b cbnz r3, 8003786 <__swbuf_r+0x12> 8003782: f000 f9a9 bl 8003ad8 <__sinit> 8003786: 4b21 ldr r3, [pc, #132] ; (800380c <__swbuf_r+0x98>) 8003788: 429c cmp r4, r3 800378a: d12a bne.n 80037e2 <__swbuf_r+0x6e> 800378c: 686c ldr r4, [r5, #4] 800378e: 69a3 ldr r3, [r4, #24] 8003790: 60a3 str r3, [r4, #8] 8003792: 89a3 ldrh r3, [r4, #12] 8003794: 071a lsls r2, r3, #28 8003796: d52e bpl.n 80037f6 <__swbuf_r+0x82> 8003798: 6923 ldr r3, [r4, #16] 800379a: b363 cbz r3, 80037f6 <__swbuf_r+0x82> 800379c: 6923 ldr r3, [r4, #16] 800379e: 6820 ldr r0, [r4, #0] 80037a0: b2f6 uxtb r6, r6 80037a2: 1ac0 subs r0, r0, r3 80037a4: 6963 ldr r3, [r4, #20] 80037a6: 4637 mov r7, r6 80037a8: 4298 cmp r0, r3 80037aa: db04 blt.n 80037b6 <__swbuf_r+0x42> 80037ac: 4621 mov r1, r4 80037ae: 4628 mov r0, r5 80037b0: f000 f928 bl 8003a04 <_fflush_r> 80037b4: bb28 cbnz r0, 8003802 <__swbuf_r+0x8e> 80037b6: 68a3 ldr r3, [r4, #8] 80037b8: 3001 adds r0, #1 80037ba: 3b01 subs r3, #1 80037bc: 60a3 str r3, [r4, #8] 80037be: 6823 ldr r3, [r4, #0] 80037c0: 1c5a adds r2, r3, #1 80037c2: 6022 str r2, [r4, #0] 80037c4: 701e strb r6, [r3, #0] 80037c6: 6963 ldr r3, [r4, #20] 80037c8: 4298 cmp r0, r3 80037ca: d004 beq.n 80037d6 <__swbuf_r+0x62> 80037cc: 89a3 ldrh r3, [r4, #12] 80037ce: 07db lsls r3, r3, #31 80037d0: d519 bpl.n 8003806 <__swbuf_r+0x92> 80037d2: 2e0a cmp r6, #10 80037d4: d117 bne.n 8003806 <__swbuf_r+0x92> 80037d6: 4621 mov r1, r4 80037d8: 4628 mov r0, r5 80037da: f000 f913 bl 8003a04 <_fflush_r> 80037de: b190 cbz r0, 8003806 <__swbuf_r+0x92> 80037e0: e00f b.n 8003802 <__swbuf_r+0x8e> 80037e2: 4b0b ldr r3, [pc, #44] ; (8003810 <__swbuf_r+0x9c>) 80037e4: 429c cmp r4, r3 80037e6: d101 bne.n 80037ec <__swbuf_r+0x78> 80037e8: 68ac ldr r4, [r5, #8] 80037ea: e7d0 b.n 800378e <__swbuf_r+0x1a> 80037ec: 4b09 ldr r3, [pc, #36] ; (8003814 <__swbuf_r+0xa0>) 80037ee: 429c cmp r4, r3 80037f0: bf08 it eq 80037f2: 68ec ldreq r4, [r5, #12] 80037f4: e7cb b.n 800378e <__swbuf_r+0x1a> 80037f6: 4621 mov r1, r4 80037f8: 4628 mov r0, r5 80037fa: f000 f80d bl 8003818 <__swsetup_r> 80037fe: 2800 cmp r0, #0 8003800: d0cc beq.n 800379c <__swbuf_r+0x28> 8003802: f04f 37ff mov.w r7, #4294967295 8003806: 4638 mov r0, r7 8003808: bdf8 pop {r3, r4, r5, r6, r7, pc} 800380a: bf00 nop 800380c: 08004d94 .word 0x08004d94 8003810: 08004db4 .word 0x08004db4 8003814: 08004d74 .word 0x08004d74 08003818 <__swsetup_r>: 8003818: 4b32 ldr r3, [pc, #200] ; (80038e4 <__swsetup_r+0xcc>) 800381a: b570 push {r4, r5, r6, lr} 800381c: 681d ldr r5, [r3, #0] 800381e: 4606 mov r6, r0 8003820: 460c mov r4, r1 8003822: b125 cbz r5, 800382e <__swsetup_r+0x16> 8003824: 69ab ldr r3, [r5, #24] 8003826: b913 cbnz r3, 800382e <__swsetup_r+0x16> 8003828: 4628 mov r0, r5 800382a: f000 f955 bl 8003ad8 <__sinit> 800382e: 4b2e ldr r3, [pc, #184] ; (80038e8 <__swsetup_r+0xd0>) 8003830: 429c cmp r4, r3 8003832: d10f bne.n 8003854 <__swsetup_r+0x3c> 8003834: 686c ldr r4, [r5, #4] 8003836: f9b4 300c ldrsh.w r3, [r4, #12] 800383a: b29a uxth r2, r3 800383c: 0715 lsls r5, r2, #28 800383e: d42c bmi.n 800389a <__swsetup_r+0x82> 8003840: 06d0 lsls r0, r2, #27 8003842: d411 bmi.n 8003868 <__swsetup_r+0x50> 8003844: 2209 movs r2, #9 8003846: 6032 str r2, [r6, #0] 8003848: f043 0340 orr.w r3, r3, #64 ; 0x40 800384c: 81a3 strh r3, [r4, #12] 800384e: f04f 30ff mov.w r0, #4294967295 8003852: bd70 pop {r4, r5, r6, pc} 8003854: 4b25 ldr r3, [pc, #148] ; (80038ec <__swsetup_r+0xd4>) 8003856: 429c cmp r4, r3 8003858: d101 bne.n 800385e <__swsetup_r+0x46> 800385a: 68ac ldr r4, [r5, #8] 800385c: e7eb b.n 8003836 <__swsetup_r+0x1e> 800385e: 4b24 ldr r3, [pc, #144] ; (80038f0 <__swsetup_r+0xd8>) 8003860: 429c cmp r4, r3 8003862: bf08 it eq 8003864: 68ec ldreq r4, [r5, #12] 8003866: e7e6 b.n 8003836 <__swsetup_r+0x1e> 8003868: 0751 lsls r1, r2, #29 800386a: d512 bpl.n 8003892 <__swsetup_r+0x7a> 800386c: 6b61 ldr r1, [r4, #52] ; 0x34 800386e: b141 cbz r1, 8003882 <__swsetup_r+0x6a> 8003870: f104 0344 add.w r3, r4, #68 ; 0x44 8003874: 4299 cmp r1, r3 8003876: d002 beq.n 800387e <__swsetup_r+0x66> 8003878: 4630 mov r0, r6 800387a: f000 fa23 bl 8003cc4 <_free_r> 800387e: 2300 movs r3, #0 8003880: 6363 str r3, [r4, #52] ; 0x34 8003882: 89a3 ldrh r3, [r4, #12] 8003884: f023 0324 bic.w r3, r3, #36 ; 0x24 8003888: 81a3 strh r3, [r4, #12] 800388a: 2300 movs r3, #0 800388c: 6063 str r3, [r4, #4] 800388e: 6923 ldr r3, [r4, #16] 8003890: 6023 str r3, [r4, #0] 8003892: 89a3 ldrh r3, [r4, #12] 8003894: f043 0308 orr.w r3, r3, #8 8003898: 81a3 strh r3, [r4, #12] 800389a: 6923 ldr r3, [r4, #16] 800389c: b94b cbnz r3, 80038b2 <__swsetup_r+0x9a> 800389e: 89a3 ldrh r3, [r4, #12] 80038a0: f403 7320 and.w r3, r3, #640 ; 0x280 80038a4: f5b3 7f00 cmp.w r3, #512 ; 0x200 80038a8: d003 beq.n 80038b2 <__swsetup_r+0x9a> 80038aa: 4621 mov r1, r4 80038ac: 4630 mov r0, r6 80038ae: f000 f9c1 bl 8003c34 <__smakebuf_r> 80038b2: 89a2 ldrh r2, [r4, #12] 80038b4: f012 0301 ands.w r3, r2, #1 80038b8: d00c beq.n 80038d4 <__swsetup_r+0xbc> 80038ba: 2300 movs r3, #0 80038bc: 60a3 str r3, [r4, #8] 80038be: 6963 ldr r3, [r4, #20] 80038c0: 425b negs r3, r3 80038c2: 61a3 str r3, [r4, #24] 80038c4: 6923 ldr r3, [r4, #16] 80038c6: b953 cbnz r3, 80038de <__swsetup_r+0xc6> 80038c8: f9b4 300c ldrsh.w r3, [r4, #12] 80038cc: f013 0080 ands.w r0, r3, #128 ; 0x80 80038d0: d1ba bne.n 8003848 <__swsetup_r+0x30> 80038d2: bd70 pop {r4, r5, r6, pc} 80038d4: 0792 lsls r2, r2, #30 80038d6: bf58 it pl 80038d8: 6963 ldrpl r3, [r4, #20] 80038da: 60a3 str r3, [r4, #8] 80038dc: e7f2 b.n 80038c4 <__swsetup_r+0xac> 80038de: 2000 movs r0, #0 80038e0: e7f7 b.n 80038d2 <__swsetup_r+0xba> 80038e2: bf00 nop 80038e4: 20000218 .word 0x20000218 80038e8: 08004d94 .word 0x08004d94 80038ec: 08004db4 .word 0x08004db4 80038f0: 08004d74 .word 0x08004d74 080038f4 <__sflush_r>: 80038f4: 898a ldrh r2, [r1, #12] 80038f6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80038fa: 4605 mov r5, r0 80038fc: 0710 lsls r0, r2, #28 80038fe: 460c mov r4, r1 8003900: d45a bmi.n 80039b8 <__sflush_r+0xc4> 8003902: 684b ldr r3, [r1, #4] 8003904: 2b00 cmp r3, #0 8003906: dc05 bgt.n 8003914 <__sflush_r+0x20> 8003908: 6c0b ldr r3, [r1, #64] ; 0x40 800390a: 2b00 cmp r3, #0 800390c: dc02 bgt.n 8003914 <__sflush_r+0x20> 800390e: 2000 movs r0, #0 8003910: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8003914: 6ae6 ldr r6, [r4, #44] ; 0x2c 8003916: 2e00 cmp r6, #0 8003918: d0f9 beq.n 800390e <__sflush_r+0x1a> 800391a: 2300 movs r3, #0 800391c: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8003920: 682f ldr r7, [r5, #0] 8003922: 602b str r3, [r5, #0] 8003924: d033 beq.n 800398e <__sflush_r+0x9a> 8003926: 6d60 ldr r0, [r4, #84] ; 0x54 8003928: 89a3 ldrh r3, [r4, #12] 800392a: 075a lsls r2, r3, #29 800392c: d505 bpl.n 800393a <__sflush_r+0x46> 800392e: 6863 ldr r3, [r4, #4] 8003930: 1ac0 subs r0, r0, r3 8003932: 6b63 ldr r3, [r4, #52] ; 0x34 8003934: b10b cbz r3, 800393a <__sflush_r+0x46> 8003936: 6c23 ldr r3, [r4, #64] ; 0x40 8003938: 1ac0 subs r0, r0, r3 800393a: 2300 movs r3, #0 800393c: 4602 mov r2, r0 800393e: 6ae6 ldr r6, [r4, #44] ; 0x2c 8003940: 6a21 ldr r1, [r4, #32] 8003942: 4628 mov r0, r5 8003944: 47b0 blx r6 8003946: 1c43 adds r3, r0, #1 8003948: 89a3 ldrh r3, [r4, #12] 800394a: d106 bne.n 800395a <__sflush_r+0x66> 800394c: 6829 ldr r1, [r5, #0] 800394e: 291d cmp r1, #29 8003950: d84b bhi.n 80039ea <__sflush_r+0xf6> 8003952: 4a2b ldr r2, [pc, #172] ; (8003a00 <__sflush_r+0x10c>) 8003954: 40ca lsrs r2, r1 8003956: 07d6 lsls r6, r2, #31 8003958: d547 bpl.n 80039ea <__sflush_r+0xf6> 800395a: 2200 movs r2, #0 800395c: 6062 str r2, [r4, #4] 800395e: 6922 ldr r2, [r4, #16] 8003960: 04d9 lsls r1, r3, #19 8003962: 6022 str r2, [r4, #0] 8003964: d504 bpl.n 8003970 <__sflush_r+0x7c> 8003966: 1c42 adds r2, r0, #1 8003968: d101 bne.n 800396e <__sflush_r+0x7a> 800396a: 682b ldr r3, [r5, #0] 800396c: b903 cbnz r3, 8003970 <__sflush_r+0x7c> 800396e: 6560 str r0, [r4, #84] ; 0x54 8003970: 6b61 ldr r1, [r4, #52] ; 0x34 8003972: 602f str r7, [r5, #0] 8003974: 2900 cmp r1, #0 8003976: d0ca beq.n 800390e <__sflush_r+0x1a> 8003978: f104 0344 add.w r3, r4, #68 ; 0x44 800397c: 4299 cmp r1, r3 800397e: d002 beq.n 8003986 <__sflush_r+0x92> 8003980: 4628 mov r0, r5 8003982: f000 f99f bl 8003cc4 <_free_r> 8003986: 2000 movs r0, #0 8003988: 6360 str r0, [r4, #52] ; 0x34 800398a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800398e: 6a21 ldr r1, [r4, #32] 8003990: 2301 movs r3, #1 8003992: 4628 mov r0, r5 8003994: 47b0 blx r6 8003996: 1c41 adds r1, r0, #1 8003998: d1c6 bne.n 8003928 <__sflush_r+0x34> 800399a: 682b ldr r3, [r5, #0] 800399c: 2b00 cmp r3, #0 800399e: d0c3 beq.n 8003928 <__sflush_r+0x34> 80039a0: 2b1d cmp r3, #29 80039a2: d001 beq.n 80039a8 <__sflush_r+0xb4> 80039a4: 2b16 cmp r3, #22 80039a6: d101 bne.n 80039ac <__sflush_r+0xb8> 80039a8: 602f str r7, [r5, #0] 80039aa: e7b0 b.n 800390e <__sflush_r+0x1a> 80039ac: 89a3 ldrh r3, [r4, #12] 80039ae: f043 0340 orr.w r3, r3, #64 ; 0x40 80039b2: 81a3 strh r3, [r4, #12] 80039b4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80039b8: 690f ldr r7, [r1, #16] 80039ba: 2f00 cmp r7, #0 80039bc: d0a7 beq.n 800390e <__sflush_r+0x1a> 80039be: 0793 lsls r3, r2, #30 80039c0: bf18 it ne 80039c2: 2300 movne r3, #0 80039c4: 680e ldr r6, [r1, #0] 80039c6: bf08 it eq 80039c8: 694b ldreq r3, [r1, #20] 80039ca: eba6 0807 sub.w r8, r6, r7 80039ce: 600f str r7, [r1, #0] 80039d0: 608b str r3, [r1, #8] 80039d2: f1b8 0f00 cmp.w r8, #0 80039d6: dd9a ble.n 800390e <__sflush_r+0x1a> 80039d8: 4643 mov r3, r8 80039da: 463a mov r2, r7 80039dc: 6a21 ldr r1, [r4, #32] 80039de: 4628 mov r0, r5 80039e0: 6aa6 ldr r6, [r4, #40] ; 0x28 80039e2: 47b0 blx r6 80039e4: 2800 cmp r0, #0 80039e6: dc07 bgt.n 80039f8 <__sflush_r+0x104> 80039e8: 89a3 ldrh r3, [r4, #12] 80039ea: f043 0340 orr.w r3, r3, #64 ; 0x40 80039ee: 81a3 strh r3, [r4, #12] 80039f0: f04f 30ff mov.w r0, #4294967295 80039f4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80039f8: 4407 add r7, r0 80039fa: eba8 0800 sub.w r8, r8, r0 80039fe: e7e8 b.n 80039d2 <__sflush_r+0xde> 8003a00: 20400001 .word 0x20400001 08003a04 <_fflush_r>: 8003a04: b538 push {r3, r4, r5, lr} 8003a06: 690b ldr r3, [r1, #16] 8003a08: 4605 mov r5, r0 8003a0a: 460c mov r4, r1 8003a0c: b1db cbz r3, 8003a46 <_fflush_r+0x42> 8003a0e: b118 cbz r0, 8003a18 <_fflush_r+0x14> 8003a10: 6983 ldr r3, [r0, #24] 8003a12: b90b cbnz r3, 8003a18 <_fflush_r+0x14> 8003a14: f000 f860 bl 8003ad8 <__sinit> 8003a18: 4b0c ldr r3, [pc, #48] ; (8003a4c <_fflush_r+0x48>) 8003a1a: 429c cmp r4, r3 8003a1c: d109 bne.n 8003a32 <_fflush_r+0x2e> 8003a1e: 686c ldr r4, [r5, #4] 8003a20: f9b4 300c ldrsh.w r3, [r4, #12] 8003a24: b17b cbz r3, 8003a46 <_fflush_r+0x42> 8003a26: 4621 mov r1, r4 8003a28: 4628 mov r0, r5 8003a2a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8003a2e: f7ff bf61 b.w 80038f4 <__sflush_r> 8003a32: 4b07 ldr r3, [pc, #28] ; (8003a50 <_fflush_r+0x4c>) 8003a34: 429c cmp r4, r3 8003a36: d101 bne.n 8003a3c <_fflush_r+0x38> 8003a38: 68ac ldr r4, [r5, #8] 8003a3a: e7f1 b.n 8003a20 <_fflush_r+0x1c> 8003a3c: 4b05 ldr r3, [pc, #20] ; (8003a54 <_fflush_r+0x50>) 8003a3e: 429c cmp r4, r3 8003a40: bf08 it eq 8003a42: 68ec ldreq r4, [r5, #12] 8003a44: e7ec b.n 8003a20 <_fflush_r+0x1c> 8003a46: 2000 movs r0, #0 8003a48: bd38 pop {r3, r4, r5, pc} 8003a4a: bf00 nop 8003a4c: 08004d94 .word 0x08004d94 8003a50: 08004db4 .word 0x08004db4 8003a54: 08004d74 .word 0x08004d74 08003a58 <_cleanup_r>: 8003a58: 4901 ldr r1, [pc, #4] ; (8003a60 <_cleanup_r+0x8>) 8003a5a: f000 b8a9 b.w 8003bb0 <_fwalk_reent> 8003a5e: bf00 nop 8003a60: 08003a05 .word 0x08003a05 08003a64 : 8003a64: 2300 movs r3, #0 8003a66: b510 push {r4, lr} 8003a68: 4604 mov r4, r0 8003a6a: 6003 str r3, [r0, #0] 8003a6c: 6043 str r3, [r0, #4] 8003a6e: 6083 str r3, [r0, #8] 8003a70: 8181 strh r1, [r0, #12] 8003a72: 6643 str r3, [r0, #100] ; 0x64 8003a74: 81c2 strh r2, [r0, #14] 8003a76: 6103 str r3, [r0, #16] 8003a78: 6143 str r3, [r0, #20] 8003a7a: 6183 str r3, [r0, #24] 8003a7c: 4619 mov r1, r3 8003a7e: 2208 movs r2, #8 8003a80: 305c adds r0, #92 ; 0x5c 8003a82: f7ff fd29 bl 80034d8 8003a86: 4b05 ldr r3, [pc, #20] ; (8003a9c ) 8003a88: 6224 str r4, [r4, #32] 8003a8a: 6263 str r3, [r4, #36] ; 0x24 8003a8c: 4b04 ldr r3, [pc, #16] ; (8003aa0 ) 8003a8e: 62a3 str r3, [r4, #40] ; 0x28 8003a90: 4b04 ldr r3, [pc, #16] ; (8003aa4 ) 8003a92: 62e3 str r3, [r4, #44] ; 0x2c 8003a94: 4b04 ldr r3, [pc, #16] ; (8003aa8 ) 8003a96: 6323 str r3, [r4, #48] ; 0x30 8003a98: bd10 pop {r4, pc} 8003a9a: bf00 nop 8003a9c: 08004451 .word 0x08004451 8003aa0: 08004473 .word 0x08004473 8003aa4: 080044ab .word 0x080044ab 8003aa8: 080044cf .word 0x080044cf 08003aac <__sfmoreglue>: 8003aac: b570 push {r4, r5, r6, lr} 8003aae: 2568 movs r5, #104 ; 0x68 8003ab0: 1e4a subs r2, r1, #1 8003ab2: 4355 muls r5, r2 8003ab4: 460e mov r6, r1 8003ab6: f105 0174 add.w r1, r5, #116 ; 0x74 8003aba: f000 f94f bl 8003d5c <_malloc_r> 8003abe: 4604 mov r4, r0 8003ac0: b140 cbz r0, 8003ad4 <__sfmoreglue+0x28> 8003ac2: 2100 movs r1, #0 8003ac4: e880 0042 stmia.w r0, {r1, r6} 8003ac8: 300c adds r0, #12 8003aca: 60a0 str r0, [r4, #8] 8003acc: f105 0268 add.w r2, r5, #104 ; 0x68 8003ad0: f7ff fd02 bl 80034d8 8003ad4: 4620 mov r0, r4 8003ad6: bd70 pop {r4, r5, r6, pc} 08003ad8 <__sinit>: 8003ad8: 6983 ldr r3, [r0, #24] 8003ada: b510 push {r4, lr} 8003adc: 4604 mov r4, r0 8003ade: bb33 cbnz r3, 8003b2e <__sinit+0x56> 8003ae0: 6483 str r3, [r0, #72] ; 0x48 8003ae2: 64c3 str r3, [r0, #76] ; 0x4c 8003ae4: 6503 str r3, [r0, #80] ; 0x50 8003ae6: 4b12 ldr r3, [pc, #72] ; (8003b30 <__sinit+0x58>) 8003ae8: 4a12 ldr r2, [pc, #72] ; (8003b34 <__sinit+0x5c>) 8003aea: 681b ldr r3, [r3, #0] 8003aec: 6282 str r2, [r0, #40] ; 0x28 8003aee: 4298 cmp r0, r3 8003af0: bf04 itt eq 8003af2: 2301 moveq r3, #1 8003af4: 6183 streq r3, [r0, #24] 8003af6: f000 f81f bl 8003b38 <__sfp> 8003afa: 6060 str r0, [r4, #4] 8003afc: 4620 mov r0, r4 8003afe: f000 f81b bl 8003b38 <__sfp> 8003b02: 60a0 str r0, [r4, #8] 8003b04: 4620 mov r0, r4 8003b06: f000 f817 bl 8003b38 <__sfp> 8003b0a: 2200 movs r2, #0 8003b0c: 60e0 str r0, [r4, #12] 8003b0e: 2104 movs r1, #4 8003b10: 6860 ldr r0, [r4, #4] 8003b12: f7ff ffa7 bl 8003a64 8003b16: 2201 movs r2, #1 8003b18: 2109 movs r1, #9 8003b1a: 68a0 ldr r0, [r4, #8] 8003b1c: f7ff ffa2 bl 8003a64 8003b20: 2202 movs r2, #2 8003b22: 2112 movs r1, #18 8003b24: 68e0 ldr r0, [r4, #12] 8003b26: f7ff ff9d bl 8003a64 8003b2a: 2301 movs r3, #1 8003b2c: 61a3 str r3, [r4, #24] 8003b2e: bd10 pop {r4, pc} 8003b30: 08004d70 .word 0x08004d70 8003b34: 08003a59 .word 0x08003a59 08003b38 <__sfp>: 8003b38: b5f8 push {r3, r4, r5, r6, r7, lr} 8003b3a: 4b1c ldr r3, [pc, #112] ; (8003bac <__sfp+0x74>) 8003b3c: 4607 mov r7, r0 8003b3e: 681e ldr r6, [r3, #0] 8003b40: 69b3 ldr r3, [r6, #24] 8003b42: b913 cbnz r3, 8003b4a <__sfp+0x12> 8003b44: 4630 mov r0, r6 8003b46: f7ff ffc7 bl 8003ad8 <__sinit> 8003b4a: 3648 adds r6, #72 ; 0x48 8003b4c: 68b4 ldr r4, [r6, #8] 8003b4e: 6873 ldr r3, [r6, #4] 8003b50: 3b01 subs r3, #1 8003b52: d503 bpl.n 8003b5c <__sfp+0x24> 8003b54: 6833 ldr r3, [r6, #0] 8003b56: b133 cbz r3, 8003b66 <__sfp+0x2e> 8003b58: 6836 ldr r6, [r6, #0] 8003b5a: e7f7 b.n 8003b4c <__sfp+0x14> 8003b5c: f9b4 500c ldrsh.w r5, [r4, #12] 8003b60: b16d cbz r5, 8003b7e <__sfp+0x46> 8003b62: 3468 adds r4, #104 ; 0x68 8003b64: e7f4 b.n 8003b50 <__sfp+0x18> 8003b66: 2104 movs r1, #4 8003b68: 4638 mov r0, r7 8003b6a: f7ff ff9f bl 8003aac <__sfmoreglue> 8003b6e: 6030 str r0, [r6, #0] 8003b70: 2800 cmp r0, #0 8003b72: d1f1 bne.n 8003b58 <__sfp+0x20> 8003b74: 230c movs r3, #12 8003b76: 4604 mov r4, r0 8003b78: 603b str r3, [r7, #0] 8003b7a: 4620 mov r0, r4 8003b7c: bdf8 pop {r3, r4, r5, r6, r7, pc} 8003b7e: f64f 73ff movw r3, #65535 ; 0xffff 8003b82: 81e3 strh r3, [r4, #14] 8003b84: 2301 movs r3, #1 8003b86: 6665 str r5, [r4, #100] ; 0x64 8003b88: 81a3 strh r3, [r4, #12] 8003b8a: 6025 str r5, [r4, #0] 8003b8c: 60a5 str r5, [r4, #8] 8003b8e: 6065 str r5, [r4, #4] 8003b90: 6125 str r5, [r4, #16] 8003b92: 6165 str r5, [r4, #20] 8003b94: 61a5 str r5, [r4, #24] 8003b96: 2208 movs r2, #8 8003b98: 4629 mov r1, r5 8003b9a: f104 005c add.w r0, r4, #92 ; 0x5c 8003b9e: f7ff fc9b bl 80034d8 8003ba2: 6365 str r5, [r4, #52] ; 0x34 8003ba4: 63a5 str r5, [r4, #56] ; 0x38 8003ba6: 64a5 str r5, [r4, #72] ; 0x48 8003ba8: 64e5 str r5, [r4, #76] ; 0x4c 8003baa: e7e6 b.n 8003b7a <__sfp+0x42> 8003bac: 08004d70 .word 0x08004d70 08003bb0 <_fwalk_reent>: 8003bb0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8003bb4: 4680 mov r8, r0 8003bb6: 4689 mov r9, r1 8003bb8: 2600 movs r6, #0 8003bba: f100 0448 add.w r4, r0, #72 ; 0x48 8003bbe: b914 cbnz r4, 8003bc6 <_fwalk_reent+0x16> 8003bc0: 4630 mov r0, r6 8003bc2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8003bc6: 68a5 ldr r5, [r4, #8] 8003bc8: 6867 ldr r7, [r4, #4] 8003bca: 3f01 subs r7, #1 8003bcc: d501 bpl.n 8003bd2 <_fwalk_reent+0x22> 8003bce: 6824 ldr r4, [r4, #0] 8003bd0: e7f5 b.n 8003bbe <_fwalk_reent+0xe> 8003bd2: 89ab ldrh r3, [r5, #12] 8003bd4: 2b01 cmp r3, #1 8003bd6: d907 bls.n 8003be8 <_fwalk_reent+0x38> 8003bd8: f9b5 300e ldrsh.w r3, [r5, #14] 8003bdc: 3301 adds r3, #1 8003bde: d003 beq.n 8003be8 <_fwalk_reent+0x38> 8003be0: 4629 mov r1, r5 8003be2: 4640 mov r0, r8 8003be4: 47c8 blx r9 8003be6: 4306 orrs r6, r0 8003be8: 3568 adds r5, #104 ; 0x68 8003bea: e7ee b.n 8003bca <_fwalk_reent+0x1a> 08003bec <__swhatbuf_r>: 8003bec: b570 push {r4, r5, r6, lr} 8003bee: 460e mov r6, r1 8003bf0: f9b1 100e ldrsh.w r1, [r1, #14] 8003bf4: b090 sub sp, #64 ; 0x40 8003bf6: 2900 cmp r1, #0 8003bf8: 4614 mov r4, r2 8003bfa: 461d mov r5, r3 8003bfc: da07 bge.n 8003c0e <__swhatbuf_r+0x22> 8003bfe: 2300 movs r3, #0 8003c00: 602b str r3, [r5, #0] 8003c02: 89b3 ldrh r3, [r6, #12] 8003c04: 061a lsls r2, r3, #24 8003c06: d410 bmi.n 8003c2a <__swhatbuf_r+0x3e> 8003c08: f44f 6380 mov.w r3, #1024 ; 0x400 8003c0c: e00e b.n 8003c2c <__swhatbuf_r+0x40> 8003c0e: aa01 add r2, sp, #4 8003c10: f000 fc84 bl 800451c <_fstat_r> 8003c14: 2800 cmp r0, #0 8003c16: dbf2 blt.n 8003bfe <__swhatbuf_r+0x12> 8003c18: 9a02 ldr r2, [sp, #8] 8003c1a: f402 4270 and.w r2, r2, #61440 ; 0xf000 8003c1e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8003c22: 425a negs r2, r3 8003c24: 415a adcs r2, r3 8003c26: 602a str r2, [r5, #0] 8003c28: e7ee b.n 8003c08 <__swhatbuf_r+0x1c> 8003c2a: 2340 movs r3, #64 ; 0x40 8003c2c: 2000 movs r0, #0 8003c2e: 6023 str r3, [r4, #0] 8003c30: b010 add sp, #64 ; 0x40 8003c32: bd70 pop {r4, r5, r6, pc} 08003c34 <__smakebuf_r>: 8003c34: 898b ldrh r3, [r1, #12] 8003c36: b573 push {r0, r1, r4, r5, r6, lr} 8003c38: 079d lsls r5, r3, #30 8003c3a: 4606 mov r6, r0 8003c3c: 460c mov r4, r1 8003c3e: d507 bpl.n 8003c50 <__smakebuf_r+0x1c> 8003c40: f104 0347 add.w r3, r4, #71 ; 0x47 8003c44: 6023 str r3, [r4, #0] 8003c46: 6123 str r3, [r4, #16] 8003c48: 2301 movs r3, #1 8003c4a: 6163 str r3, [r4, #20] 8003c4c: b002 add sp, #8 8003c4e: bd70 pop {r4, r5, r6, pc} 8003c50: ab01 add r3, sp, #4 8003c52: 466a mov r2, sp 8003c54: f7ff ffca bl 8003bec <__swhatbuf_r> 8003c58: 9900 ldr r1, [sp, #0] 8003c5a: 4605 mov r5, r0 8003c5c: 4630 mov r0, r6 8003c5e: f000 f87d bl 8003d5c <_malloc_r> 8003c62: b948 cbnz r0, 8003c78 <__smakebuf_r+0x44> 8003c64: f9b4 300c ldrsh.w r3, [r4, #12] 8003c68: 059a lsls r2, r3, #22 8003c6a: d4ef bmi.n 8003c4c <__smakebuf_r+0x18> 8003c6c: f023 0303 bic.w r3, r3, #3 8003c70: f043 0302 orr.w r3, r3, #2 8003c74: 81a3 strh r3, [r4, #12] 8003c76: e7e3 b.n 8003c40 <__smakebuf_r+0xc> 8003c78: 4b0d ldr r3, [pc, #52] ; (8003cb0 <__smakebuf_r+0x7c>) 8003c7a: 62b3 str r3, [r6, #40] ; 0x28 8003c7c: 89a3 ldrh r3, [r4, #12] 8003c7e: 6020 str r0, [r4, #0] 8003c80: f043 0380 orr.w r3, r3, #128 ; 0x80 8003c84: 81a3 strh r3, [r4, #12] 8003c86: 9b00 ldr r3, [sp, #0] 8003c88: 6120 str r0, [r4, #16] 8003c8a: 6163 str r3, [r4, #20] 8003c8c: 9b01 ldr r3, [sp, #4] 8003c8e: b15b cbz r3, 8003ca8 <__smakebuf_r+0x74> 8003c90: f9b4 100e ldrsh.w r1, [r4, #14] 8003c94: 4630 mov r0, r6 8003c96: f000 fc53 bl 8004540 <_isatty_r> 8003c9a: b128 cbz r0, 8003ca8 <__smakebuf_r+0x74> 8003c9c: 89a3 ldrh r3, [r4, #12] 8003c9e: f023 0303 bic.w r3, r3, #3 8003ca2: f043 0301 orr.w r3, r3, #1 8003ca6: 81a3 strh r3, [r4, #12] 8003ca8: 89a3 ldrh r3, [r4, #12] 8003caa: 431d orrs r5, r3 8003cac: 81a5 strh r5, [r4, #12] 8003cae: e7cd b.n 8003c4c <__smakebuf_r+0x18> 8003cb0: 08003a59 .word 0x08003a59 08003cb4 : 8003cb4: 4b02 ldr r3, [pc, #8] ; (8003cc0 ) 8003cb6: 4601 mov r1, r0 8003cb8: 6818 ldr r0, [r3, #0] 8003cba: f000 b84f b.w 8003d5c <_malloc_r> 8003cbe: bf00 nop 8003cc0: 20000218 .word 0x20000218 08003cc4 <_free_r>: 8003cc4: b538 push {r3, r4, r5, lr} 8003cc6: 4605 mov r5, r0 8003cc8: 2900 cmp r1, #0 8003cca: d043 beq.n 8003d54 <_free_r+0x90> 8003ccc: f851 3c04 ldr.w r3, [r1, #-4] 8003cd0: 1f0c subs r4, r1, #4 8003cd2: 2b00 cmp r3, #0 8003cd4: bfb8 it lt 8003cd6: 18e4 addlt r4, r4, r3 8003cd8: f000 fc62 bl 80045a0 <__malloc_lock> 8003cdc: 4a1e ldr r2, [pc, #120] ; (8003d58 <_free_r+0x94>) 8003cde: 6813 ldr r3, [r2, #0] 8003ce0: 4610 mov r0, r2 8003ce2: b933 cbnz r3, 8003cf2 <_free_r+0x2e> 8003ce4: 6063 str r3, [r4, #4] 8003ce6: 6014 str r4, [r2, #0] 8003ce8: 4628 mov r0, r5 8003cea: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8003cee: f000 bc58 b.w 80045a2 <__malloc_unlock> 8003cf2: 42a3 cmp r3, r4 8003cf4: d90b bls.n 8003d0e <_free_r+0x4a> 8003cf6: 6821 ldr r1, [r4, #0] 8003cf8: 1862 adds r2, r4, r1 8003cfa: 4293 cmp r3, r2 8003cfc: bf01 itttt eq 8003cfe: 681a ldreq r2, [r3, #0] 8003d00: 685b ldreq r3, [r3, #4] 8003d02: 1852 addeq r2, r2, r1 8003d04: 6022 streq r2, [r4, #0] 8003d06: 6063 str r3, [r4, #4] 8003d08: 6004 str r4, [r0, #0] 8003d0a: e7ed b.n 8003ce8 <_free_r+0x24> 8003d0c: 4613 mov r3, r2 8003d0e: 685a ldr r2, [r3, #4] 8003d10: b10a cbz r2, 8003d16 <_free_r+0x52> 8003d12: 42a2 cmp r2, r4 8003d14: d9fa bls.n 8003d0c <_free_r+0x48> 8003d16: 6819 ldr r1, [r3, #0] 8003d18: 1858 adds r0, r3, r1 8003d1a: 42a0 cmp r0, r4 8003d1c: d10b bne.n 8003d36 <_free_r+0x72> 8003d1e: 6820 ldr r0, [r4, #0] 8003d20: 4401 add r1, r0 8003d22: 1858 adds r0, r3, r1 8003d24: 4282 cmp r2, r0 8003d26: 6019 str r1, [r3, #0] 8003d28: d1de bne.n 8003ce8 <_free_r+0x24> 8003d2a: 6810 ldr r0, [r2, #0] 8003d2c: 6852 ldr r2, [r2, #4] 8003d2e: 4401 add r1, r0 8003d30: 6019 str r1, [r3, #0] 8003d32: 605a str r2, [r3, #4] 8003d34: e7d8 b.n 8003ce8 <_free_r+0x24> 8003d36: d902 bls.n 8003d3e <_free_r+0x7a> 8003d38: 230c movs r3, #12 8003d3a: 602b str r3, [r5, #0] 8003d3c: e7d4 b.n 8003ce8 <_free_r+0x24> 8003d3e: 6820 ldr r0, [r4, #0] 8003d40: 1821 adds r1, r4, r0 8003d42: 428a cmp r2, r1 8003d44: bf01 itttt eq 8003d46: 6811 ldreq r1, [r2, #0] 8003d48: 6852 ldreq r2, [r2, #4] 8003d4a: 1809 addeq r1, r1, r0 8003d4c: 6021 streq r1, [r4, #0] 8003d4e: 6062 str r2, [r4, #4] 8003d50: 605c str r4, [r3, #4] 8003d52: e7c9 b.n 8003ce8 <_free_r+0x24> 8003d54: bd38 pop {r3, r4, r5, pc} 8003d56: bf00 nop 8003d58: 200002fc .word 0x200002fc 08003d5c <_malloc_r>: 8003d5c: b570 push {r4, r5, r6, lr} 8003d5e: 1ccd adds r5, r1, #3 8003d60: f025 0503 bic.w r5, r5, #3 8003d64: 3508 adds r5, #8 8003d66: 2d0c cmp r5, #12 8003d68: bf38 it cc 8003d6a: 250c movcc r5, #12 8003d6c: 2d00 cmp r5, #0 8003d6e: 4606 mov r6, r0 8003d70: db01 blt.n 8003d76 <_malloc_r+0x1a> 8003d72: 42a9 cmp r1, r5 8003d74: d903 bls.n 8003d7e <_malloc_r+0x22> 8003d76: 230c movs r3, #12 8003d78: 6033 str r3, [r6, #0] 8003d7a: 2000 movs r0, #0 8003d7c: bd70 pop {r4, r5, r6, pc} 8003d7e: f000 fc0f bl 80045a0 <__malloc_lock> 8003d82: 4a23 ldr r2, [pc, #140] ; (8003e10 <_malloc_r+0xb4>) 8003d84: 6814 ldr r4, [r2, #0] 8003d86: 4621 mov r1, r4 8003d88: b991 cbnz r1, 8003db0 <_malloc_r+0x54> 8003d8a: 4c22 ldr r4, [pc, #136] ; (8003e14 <_malloc_r+0xb8>) 8003d8c: 6823 ldr r3, [r4, #0] 8003d8e: b91b cbnz r3, 8003d98 <_malloc_r+0x3c> 8003d90: 4630 mov r0, r6 8003d92: f000 fb4d bl 8004430 <_sbrk_r> 8003d96: 6020 str r0, [r4, #0] 8003d98: 4629 mov r1, r5 8003d9a: 4630 mov r0, r6 8003d9c: f000 fb48 bl 8004430 <_sbrk_r> 8003da0: 1c43 adds r3, r0, #1 8003da2: d126 bne.n 8003df2 <_malloc_r+0x96> 8003da4: 230c movs r3, #12 8003da6: 4630 mov r0, r6 8003da8: 6033 str r3, [r6, #0] 8003daa: f000 fbfa bl 80045a2 <__malloc_unlock> 8003dae: e7e4 b.n 8003d7a <_malloc_r+0x1e> 8003db0: 680b ldr r3, [r1, #0] 8003db2: 1b5b subs r3, r3, r5 8003db4: d41a bmi.n 8003dec <_malloc_r+0x90> 8003db6: 2b0b cmp r3, #11 8003db8: d90f bls.n 8003dda <_malloc_r+0x7e> 8003dba: 600b str r3, [r1, #0] 8003dbc: 18cc adds r4, r1, r3 8003dbe: 50cd str r5, [r1, r3] 8003dc0: 4630 mov r0, r6 8003dc2: f000 fbee bl 80045a2 <__malloc_unlock> 8003dc6: f104 000b add.w r0, r4, #11 8003dca: 1d23 adds r3, r4, #4 8003dcc: f020 0007 bic.w r0, r0, #7 8003dd0: 1ac3 subs r3, r0, r3 8003dd2: d01b beq.n 8003e0c <_malloc_r+0xb0> 8003dd4: 425a negs r2, r3 8003dd6: 50e2 str r2, [r4, r3] 8003dd8: bd70 pop {r4, r5, r6, pc} 8003dda: 428c cmp r4, r1 8003ddc: bf0b itete eq 8003dde: 6863 ldreq r3, [r4, #4] 8003de0: 684b ldrne r3, [r1, #4] 8003de2: 6013 streq r3, [r2, #0] 8003de4: 6063 strne r3, [r4, #4] 8003de6: bf18 it ne 8003de8: 460c movne r4, r1 8003dea: e7e9 b.n 8003dc0 <_malloc_r+0x64> 8003dec: 460c mov r4, r1 8003dee: 6849 ldr r1, [r1, #4] 8003df0: e7ca b.n 8003d88 <_malloc_r+0x2c> 8003df2: 1cc4 adds r4, r0, #3 8003df4: f024 0403 bic.w r4, r4, #3 8003df8: 42a0 cmp r0, r4 8003dfa: d005 beq.n 8003e08 <_malloc_r+0xac> 8003dfc: 1a21 subs r1, r4, r0 8003dfe: 4630 mov r0, r6 8003e00: f000 fb16 bl 8004430 <_sbrk_r> 8003e04: 3001 adds r0, #1 8003e06: d0cd beq.n 8003da4 <_malloc_r+0x48> 8003e08: 6025 str r5, [r4, #0] 8003e0a: e7d9 b.n 8003dc0 <_malloc_r+0x64> 8003e0c: bd70 pop {r4, r5, r6, pc} 8003e0e: bf00 nop 8003e10: 200002fc .word 0x200002fc 8003e14: 20000300 .word 0x20000300 08003e18 <__sfputc_r>: 8003e18: 6893 ldr r3, [r2, #8] 8003e1a: b410 push {r4} 8003e1c: 3b01 subs r3, #1 8003e1e: 2b00 cmp r3, #0 8003e20: 6093 str r3, [r2, #8] 8003e22: da08 bge.n 8003e36 <__sfputc_r+0x1e> 8003e24: 6994 ldr r4, [r2, #24] 8003e26: 42a3 cmp r3, r4 8003e28: db02 blt.n 8003e30 <__sfputc_r+0x18> 8003e2a: b2cb uxtb r3, r1 8003e2c: 2b0a cmp r3, #10 8003e2e: d102 bne.n 8003e36 <__sfputc_r+0x1e> 8003e30: bc10 pop {r4} 8003e32: f7ff bc9f b.w 8003774 <__swbuf_r> 8003e36: 6813 ldr r3, [r2, #0] 8003e38: 1c58 adds r0, r3, #1 8003e3a: 6010 str r0, [r2, #0] 8003e3c: 7019 strb r1, [r3, #0] 8003e3e: b2c8 uxtb r0, r1 8003e40: bc10 pop {r4} 8003e42: 4770 bx lr 08003e44 <__sfputs_r>: 8003e44: b5f8 push {r3, r4, r5, r6, r7, lr} 8003e46: 4606 mov r6, r0 8003e48: 460f mov r7, r1 8003e4a: 4614 mov r4, r2 8003e4c: 18d5 adds r5, r2, r3 8003e4e: 42ac cmp r4, r5 8003e50: d101 bne.n 8003e56 <__sfputs_r+0x12> 8003e52: 2000 movs r0, #0 8003e54: e007 b.n 8003e66 <__sfputs_r+0x22> 8003e56: 463a mov r2, r7 8003e58: f814 1b01 ldrb.w r1, [r4], #1 8003e5c: 4630 mov r0, r6 8003e5e: f7ff ffdb bl 8003e18 <__sfputc_r> 8003e62: 1c43 adds r3, r0, #1 8003e64: d1f3 bne.n 8003e4e <__sfputs_r+0xa> 8003e66: bdf8 pop {r3, r4, r5, r6, r7, pc} 08003e68 <_vfiprintf_r>: 8003e68: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8003e6c: b09d sub sp, #116 ; 0x74 8003e6e: 460c mov r4, r1 8003e70: 4617 mov r7, r2 8003e72: 9303 str r3, [sp, #12] 8003e74: 4606 mov r6, r0 8003e76: b118 cbz r0, 8003e80 <_vfiprintf_r+0x18> 8003e78: 6983 ldr r3, [r0, #24] 8003e7a: b90b cbnz r3, 8003e80 <_vfiprintf_r+0x18> 8003e7c: f7ff fe2c bl 8003ad8 <__sinit> 8003e80: 4b7c ldr r3, [pc, #496] ; (8004074 <_vfiprintf_r+0x20c>) 8003e82: 429c cmp r4, r3 8003e84: d157 bne.n 8003f36 <_vfiprintf_r+0xce> 8003e86: 6874 ldr r4, [r6, #4] 8003e88: 89a3 ldrh r3, [r4, #12] 8003e8a: 0718 lsls r0, r3, #28 8003e8c: d55d bpl.n 8003f4a <_vfiprintf_r+0xe2> 8003e8e: 6923 ldr r3, [r4, #16] 8003e90: 2b00 cmp r3, #0 8003e92: d05a beq.n 8003f4a <_vfiprintf_r+0xe2> 8003e94: 2300 movs r3, #0 8003e96: 9309 str r3, [sp, #36] ; 0x24 8003e98: 2320 movs r3, #32 8003e9a: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8003e9e: 2330 movs r3, #48 ; 0x30 8003ea0: f04f 0b01 mov.w fp, #1 8003ea4: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8003ea8: 46b8 mov r8, r7 8003eaa: 4645 mov r5, r8 8003eac: f815 3b01 ldrb.w r3, [r5], #1 8003eb0: 2b00 cmp r3, #0 8003eb2: d155 bne.n 8003f60 <_vfiprintf_r+0xf8> 8003eb4: ebb8 0a07 subs.w sl, r8, r7 8003eb8: d00b beq.n 8003ed2 <_vfiprintf_r+0x6a> 8003eba: 4653 mov r3, sl 8003ebc: 463a mov r2, r7 8003ebe: 4621 mov r1, r4 8003ec0: 4630 mov r0, r6 8003ec2: f7ff ffbf bl 8003e44 <__sfputs_r> 8003ec6: 3001 adds r0, #1 8003ec8: f000 80c4 beq.w 8004054 <_vfiprintf_r+0x1ec> 8003ecc: 9b09 ldr r3, [sp, #36] ; 0x24 8003ece: 4453 add r3, sl 8003ed0: 9309 str r3, [sp, #36] ; 0x24 8003ed2: f898 3000 ldrb.w r3, [r8] 8003ed6: 2b00 cmp r3, #0 8003ed8: f000 80bc beq.w 8004054 <_vfiprintf_r+0x1ec> 8003edc: 2300 movs r3, #0 8003ede: f04f 32ff mov.w r2, #4294967295 8003ee2: 9304 str r3, [sp, #16] 8003ee4: 9307 str r3, [sp, #28] 8003ee6: 9205 str r2, [sp, #20] 8003ee8: 9306 str r3, [sp, #24] 8003eea: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8003eee: 931a str r3, [sp, #104] ; 0x68 8003ef0: 2205 movs r2, #5 8003ef2: 7829 ldrb r1, [r5, #0] 8003ef4: 4860 ldr r0, [pc, #384] ; (8004078 <_vfiprintf_r+0x210>) 8003ef6: f000 fb45 bl 8004584 8003efa: f105 0801 add.w r8, r5, #1 8003efe: 9b04 ldr r3, [sp, #16] 8003f00: 2800 cmp r0, #0 8003f02: d131 bne.n 8003f68 <_vfiprintf_r+0x100> 8003f04: 06d9 lsls r1, r3, #27 8003f06: bf44 itt mi 8003f08: 2220 movmi r2, #32 8003f0a: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8003f0e: 071a lsls r2, r3, #28 8003f10: bf44 itt mi 8003f12: 222b movmi r2, #43 ; 0x2b 8003f14: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8003f18: 782a ldrb r2, [r5, #0] 8003f1a: 2a2a cmp r2, #42 ; 0x2a 8003f1c: d02c beq.n 8003f78 <_vfiprintf_r+0x110> 8003f1e: 2100 movs r1, #0 8003f20: 200a movs r0, #10 8003f22: 9a07 ldr r2, [sp, #28] 8003f24: 46a8 mov r8, r5 8003f26: f898 3000 ldrb.w r3, [r8] 8003f2a: 3501 adds r5, #1 8003f2c: 3b30 subs r3, #48 ; 0x30 8003f2e: 2b09 cmp r3, #9 8003f30: d96d bls.n 800400e <_vfiprintf_r+0x1a6> 8003f32: b371 cbz r1, 8003f92 <_vfiprintf_r+0x12a> 8003f34: e026 b.n 8003f84 <_vfiprintf_r+0x11c> 8003f36: 4b51 ldr r3, [pc, #324] ; (800407c <_vfiprintf_r+0x214>) 8003f38: 429c cmp r4, r3 8003f3a: d101 bne.n 8003f40 <_vfiprintf_r+0xd8> 8003f3c: 68b4 ldr r4, [r6, #8] 8003f3e: e7a3 b.n 8003e88 <_vfiprintf_r+0x20> 8003f40: 4b4f ldr r3, [pc, #316] ; (8004080 <_vfiprintf_r+0x218>) 8003f42: 429c cmp r4, r3 8003f44: bf08 it eq 8003f46: 68f4 ldreq r4, [r6, #12] 8003f48: e79e b.n 8003e88 <_vfiprintf_r+0x20> 8003f4a: 4621 mov r1, r4 8003f4c: 4630 mov r0, r6 8003f4e: f7ff fc63 bl 8003818 <__swsetup_r> 8003f52: 2800 cmp r0, #0 8003f54: d09e beq.n 8003e94 <_vfiprintf_r+0x2c> 8003f56: f04f 30ff mov.w r0, #4294967295 8003f5a: b01d add sp, #116 ; 0x74 8003f5c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8003f60: 2b25 cmp r3, #37 ; 0x25 8003f62: d0a7 beq.n 8003eb4 <_vfiprintf_r+0x4c> 8003f64: 46a8 mov r8, r5 8003f66: e7a0 b.n 8003eaa <_vfiprintf_r+0x42> 8003f68: 4a43 ldr r2, [pc, #268] ; (8004078 <_vfiprintf_r+0x210>) 8003f6a: 4645 mov r5, r8 8003f6c: 1a80 subs r0, r0, r2 8003f6e: fa0b f000 lsl.w r0, fp, r0 8003f72: 4318 orrs r0, r3 8003f74: 9004 str r0, [sp, #16] 8003f76: e7bb b.n 8003ef0 <_vfiprintf_r+0x88> 8003f78: 9a03 ldr r2, [sp, #12] 8003f7a: 1d11 adds r1, r2, #4 8003f7c: 6812 ldr r2, [r2, #0] 8003f7e: 9103 str r1, [sp, #12] 8003f80: 2a00 cmp r2, #0 8003f82: db01 blt.n 8003f88 <_vfiprintf_r+0x120> 8003f84: 9207 str r2, [sp, #28] 8003f86: e004 b.n 8003f92 <_vfiprintf_r+0x12a> 8003f88: 4252 negs r2, r2 8003f8a: f043 0302 orr.w r3, r3, #2 8003f8e: 9207 str r2, [sp, #28] 8003f90: 9304 str r3, [sp, #16] 8003f92: f898 3000 ldrb.w r3, [r8] 8003f96: 2b2e cmp r3, #46 ; 0x2e 8003f98: d110 bne.n 8003fbc <_vfiprintf_r+0x154> 8003f9a: f898 3001 ldrb.w r3, [r8, #1] 8003f9e: f108 0101 add.w r1, r8, #1 8003fa2: 2b2a cmp r3, #42 ; 0x2a 8003fa4: d137 bne.n 8004016 <_vfiprintf_r+0x1ae> 8003fa6: 9b03 ldr r3, [sp, #12] 8003fa8: f108 0802 add.w r8, r8, #2 8003fac: 1d1a adds r2, r3, #4 8003fae: 681b ldr r3, [r3, #0] 8003fb0: 9203 str r2, [sp, #12] 8003fb2: 2b00 cmp r3, #0 8003fb4: bfb8 it lt 8003fb6: f04f 33ff movlt.w r3, #4294967295 8003fba: 9305 str r3, [sp, #20] 8003fbc: 4d31 ldr r5, [pc, #196] ; (8004084 <_vfiprintf_r+0x21c>) 8003fbe: 2203 movs r2, #3 8003fc0: f898 1000 ldrb.w r1, [r8] 8003fc4: 4628 mov r0, r5 8003fc6: f000 fadd bl 8004584 8003fca: b140 cbz r0, 8003fde <_vfiprintf_r+0x176> 8003fcc: 2340 movs r3, #64 ; 0x40 8003fce: 1b40 subs r0, r0, r5 8003fd0: fa03 f000 lsl.w r0, r3, r0 8003fd4: 9b04 ldr r3, [sp, #16] 8003fd6: f108 0801 add.w r8, r8, #1 8003fda: 4303 orrs r3, r0 8003fdc: 9304 str r3, [sp, #16] 8003fde: f898 1000 ldrb.w r1, [r8] 8003fe2: 2206 movs r2, #6 8003fe4: 4828 ldr r0, [pc, #160] ; (8004088 <_vfiprintf_r+0x220>) 8003fe6: f108 0701 add.w r7, r8, #1 8003fea: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8003fee: f000 fac9 bl 8004584 8003ff2: 2800 cmp r0, #0 8003ff4: d034 beq.n 8004060 <_vfiprintf_r+0x1f8> 8003ff6: 4b25 ldr r3, [pc, #148] ; (800408c <_vfiprintf_r+0x224>) 8003ff8: bb03 cbnz r3, 800403c <_vfiprintf_r+0x1d4> 8003ffa: 9b03 ldr r3, [sp, #12] 8003ffc: 3307 adds r3, #7 8003ffe: f023 0307 bic.w r3, r3, #7 8004002: 3308 adds r3, #8 8004004: 9303 str r3, [sp, #12] 8004006: 9b09 ldr r3, [sp, #36] ; 0x24 8004008: 444b add r3, r9 800400a: 9309 str r3, [sp, #36] ; 0x24 800400c: e74c b.n 8003ea8 <_vfiprintf_r+0x40> 800400e: fb00 3202 mla r2, r0, r2, r3 8004012: 2101 movs r1, #1 8004014: e786 b.n 8003f24 <_vfiprintf_r+0xbc> 8004016: 2300 movs r3, #0 8004018: 250a movs r5, #10 800401a: 4618 mov r0, r3 800401c: 9305 str r3, [sp, #20] 800401e: 4688 mov r8, r1 8004020: f898 2000 ldrb.w r2, [r8] 8004024: 3101 adds r1, #1 8004026: 3a30 subs r2, #48 ; 0x30 8004028: 2a09 cmp r2, #9 800402a: d903 bls.n 8004034 <_vfiprintf_r+0x1cc> 800402c: 2b00 cmp r3, #0 800402e: d0c5 beq.n 8003fbc <_vfiprintf_r+0x154> 8004030: 9005 str r0, [sp, #20] 8004032: e7c3 b.n 8003fbc <_vfiprintf_r+0x154> 8004034: fb05 2000 mla r0, r5, r0, r2 8004038: 2301 movs r3, #1 800403a: e7f0 b.n 800401e <_vfiprintf_r+0x1b6> 800403c: ab03 add r3, sp, #12 800403e: 9300 str r3, [sp, #0] 8004040: 4622 mov r2, r4 8004042: 4b13 ldr r3, [pc, #76] ; (8004090 <_vfiprintf_r+0x228>) 8004044: a904 add r1, sp, #16 8004046: 4630 mov r0, r6 8004048: f3af 8000 nop.w 800404c: f1b0 3fff cmp.w r0, #4294967295 8004050: 4681 mov r9, r0 8004052: d1d8 bne.n 8004006 <_vfiprintf_r+0x19e> 8004054: 89a3 ldrh r3, [r4, #12] 8004056: 065b lsls r3, r3, #25 8004058: f53f af7d bmi.w 8003f56 <_vfiprintf_r+0xee> 800405c: 9809 ldr r0, [sp, #36] ; 0x24 800405e: e77c b.n 8003f5a <_vfiprintf_r+0xf2> 8004060: ab03 add r3, sp, #12 8004062: 9300 str r3, [sp, #0] 8004064: 4622 mov r2, r4 8004066: 4b0a ldr r3, [pc, #40] ; (8004090 <_vfiprintf_r+0x228>) 8004068: a904 add r1, sp, #16 800406a: 4630 mov r0, r6 800406c: f000 f88a bl 8004184 <_printf_i> 8004070: e7ec b.n 800404c <_vfiprintf_r+0x1e4> 8004072: bf00 nop 8004074: 08004d94 .word 0x08004d94 8004078: 08004dd4 .word 0x08004dd4 800407c: 08004db4 .word 0x08004db4 8004080: 08004d74 .word 0x08004d74 8004084: 08004dda .word 0x08004dda 8004088: 08004dde .word 0x08004dde 800408c: 00000000 .word 0x00000000 8004090: 08003e45 .word 0x08003e45 08004094 <_printf_common>: 8004094: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8004098: 4691 mov r9, r2 800409a: 461f mov r7, r3 800409c: 688a ldr r2, [r1, #8] 800409e: 690b ldr r3, [r1, #16] 80040a0: 4606 mov r6, r0 80040a2: 4293 cmp r3, r2 80040a4: bfb8 it lt 80040a6: 4613 movlt r3, r2 80040a8: f8c9 3000 str.w r3, [r9] 80040ac: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 80040b0: 460c mov r4, r1 80040b2: f8dd 8020 ldr.w r8, [sp, #32] 80040b6: b112 cbz r2, 80040be <_printf_common+0x2a> 80040b8: 3301 adds r3, #1 80040ba: f8c9 3000 str.w r3, [r9] 80040be: 6823 ldr r3, [r4, #0] 80040c0: 0699 lsls r1, r3, #26 80040c2: bf42 ittt mi 80040c4: f8d9 3000 ldrmi.w r3, [r9] 80040c8: 3302 addmi r3, #2 80040ca: f8c9 3000 strmi.w r3, [r9] 80040ce: 6825 ldr r5, [r4, #0] 80040d0: f015 0506 ands.w r5, r5, #6 80040d4: d107 bne.n 80040e6 <_printf_common+0x52> 80040d6: f104 0a19 add.w sl, r4, #25 80040da: 68e3 ldr r3, [r4, #12] 80040dc: f8d9 2000 ldr.w r2, [r9] 80040e0: 1a9b subs r3, r3, r2 80040e2: 429d cmp r5, r3 80040e4: db2a blt.n 800413c <_printf_common+0xa8> 80040e6: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 80040ea: 6822 ldr r2, [r4, #0] 80040ec: 3300 adds r3, #0 80040ee: bf18 it ne 80040f0: 2301 movne r3, #1 80040f2: 0692 lsls r2, r2, #26 80040f4: d42f bmi.n 8004156 <_printf_common+0xc2> 80040f6: f104 0243 add.w r2, r4, #67 ; 0x43 80040fa: 4639 mov r1, r7 80040fc: 4630 mov r0, r6 80040fe: 47c0 blx r8 8004100: 3001 adds r0, #1 8004102: d022 beq.n 800414a <_printf_common+0xb6> 8004104: 6823 ldr r3, [r4, #0] 8004106: 68e5 ldr r5, [r4, #12] 8004108: f003 0306 and.w r3, r3, #6 800410c: 2b04 cmp r3, #4 800410e: bf18 it ne 8004110: 2500 movne r5, #0 8004112: f8d9 2000 ldr.w r2, [r9] 8004116: f04f 0900 mov.w r9, #0 800411a: bf08 it eq 800411c: 1aad subeq r5, r5, r2 800411e: 68a3 ldr r3, [r4, #8] 8004120: 6922 ldr r2, [r4, #16] 8004122: bf08 it eq 8004124: ea25 75e5 biceq.w r5, r5, r5, asr #31 8004128: 4293 cmp r3, r2 800412a: bfc4 itt gt 800412c: 1a9b subgt r3, r3, r2 800412e: 18ed addgt r5, r5, r3 8004130: 341a adds r4, #26 8004132: 454d cmp r5, r9 8004134: d11b bne.n 800416e <_printf_common+0xda> 8004136: 2000 movs r0, #0 8004138: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800413c: 2301 movs r3, #1 800413e: 4652 mov r2, sl 8004140: 4639 mov r1, r7 8004142: 4630 mov r0, r6 8004144: 47c0 blx r8 8004146: 3001 adds r0, #1 8004148: d103 bne.n 8004152 <_printf_common+0xbe> 800414a: f04f 30ff mov.w r0, #4294967295 800414e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8004152: 3501 adds r5, #1 8004154: e7c1 b.n 80040da <_printf_common+0x46> 8004156: 2030 movs r0, #48 ; 0x30 8004158: 18e1 adds r1, r4, r3 800415a: f881 0043 strb.w r0, [r1, #67] ; 0x43 800415e: 1c5a adds r2, r3, #1 8004160: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8004164: 4422 add r2, r4 8004166: 3302 adds r3, #2 8004168: f882 1043 strb.w r1, [r2, #67] ; 0x43 800416c: e7c3 b.n 80040f6 <_printf_common+0x62> 800416e: 2301 movs r3, #1 8004170: 4622 mov r2, r4 8004172: 4639 mov r1, r7 8004174: 4630 mov r0, r6 8004176: 47c0 blx r8 8004178: 3001 adds r0, #1 800417a: d0e6 beq.n 800414a <_printf_common+0xb6> 800417c: f109 0901 add.w r9, r9, #1 8004180: e7d7 b.n 8004132 <_printf_common+0x9e> ... 08004184 <_printf_i>: 8004184: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8004188: 4617 mov r7, r2 800418a: 7e0a ldrb r2, [r1, #24] 800418c: b085 sub sp, #20 800418e: 2a6e cmp r2, #110 ; 0x6e 8004190: 4698 mov r8, r3 8004192: 4606 mov r6, r0 8004194: 460c mov r4, r1 8004196: 9b0c ldr r3, [sp, #48] ; 0x30 8004198: f101 0e43 add.w lr, r1, #67 ; 0x43 800419c: f000 80bc beq.w 8004318 <_printf_i+0x194> 80041a0: d81a bhi.n 80041d8 <_printf_i+0x54> 80041a2: 2a63 cmp r2, #99 ; 0x63 80041a4: d02e beq.n 8004204 <_printf_i+0x80> 80041a6: d80a bhi.n 80041be <_printf_i+0x3a> 80041a8: 2a00 cmp r2, #0 80041aa: f000 80c8 beq.w 800433e <_printf_i+0x1ba> 80041ae: 2a58 cmp r2, #88 ; 0x58 80041b0: f000 808a beq.w 80042c8 <_printf_i+0x144> 80041b4: f104 0542 add.w r5, r4, #66 ; 0x42 80041b8: f884 2042 strb.w r2, [r4, #66] ; 0x42 80041bc: e02a b.n 8004214 <_printf_i+0x90> 80041be: 2a64 cmp r2, #100 ; 0x64 80041c0: d001 beq.n 80041c6 <_printf_i+0x42> 80041c2: 2a69 cmp r2, #105 ; 0x69 80041c4: d1f6 bne.n 80041b4 <_printf_i+0x30> 80041c6: 6821 ldr r1, [r4, #0] 80041c8: 681a ldr r2, [r3, #0] 80041ca: f011 0f80 tst.w r1, #128 ; 0x80 80041ce: d023 beq.n 8004218 <_printf_i+0x94> 80041d0: 1d11 adds r1, r2, #4 80041d2: 6019 str r1, [r3, #0] 80041d4: 6813 ldr r3, [r2, #0] 80041d6: e027 b.n 8004228 <_printf_i+0xa4> 80041d8: 2a73 cmp r2, #115 ; 0x73 80041da: f000 80b4 beq.w 8004346 <_printf_i+0x1c2> 80041de: d808 bhi.n 80041f2 <_printf_i+0x6e> 80041e0: 2a6f cmp r2, #111 ; 0x6f 80041e2: d02a beq.n 800423a <_printf_i+0xb6> 80041e4: 2a70 cmp r2, #112 ; 0x70 80041e6: d1e5 bne.n 80041b4 <_printf_i+0x30> 80041e8: 680a ldr r2, [r1, #0] 80041ea: f042 0220 orr.w r2, r2, #32 80041ee: 600a str r2, [r1, #0] 80041f0: e003 b.n 80041fa <_printf_i+0x76> 80041f2: 2a75 cmp r2, #117 ; 0x75 80041f4: d021 beq.n 800423a <_printf_i+0xb6> 80041f6: 2a78 cmp r2, #120 ; 0x78 80041f8: d1dc bne.n 80041b4 <_printf_i+0x30> 80041fa: 2278 movs r2, #120 ; 0x78 80041fc: 496f ldr r1, [pc, #444] ; (80043bc <_printf_i+0x238>) 80041fe: f884 2045 strb.w r2, [r4, #69] ; 0x45 8004202: e064 b.n 80042ce <_printf_i+0x14a> 8004204: 681a ldr r2, [r3, #0] 8004206: f101 0542 add.w r5, r1, #66 ; 0x42 800420a: 1d11 adds r1, r2, #4 800420c: 6019 str r1, [r3, #0] 800420e: 6813 ldr r3, [r2, #0] 8004210: f884 3042 strb.w r3, [r4, #66] ; 0x42 8004214: 2301 movs r3, #1 8004216: e0a3 b.n 8004360 <_printf_i+0x1dc> 8004218: f011 0f40 tst.w r1, #64 ; 0x40 800421c: f102 0104 add.w r1, r2, #4 8004220: 6019 str r1, [r3, #0] 8004222: d0d7 beq.n 80041d4 <_printf_i+0x50> 8004224: f9b2 3000 ldrsh.w r3, [r2] 8004228: 2b00 cmp r3, #0 800422a: da03 bge.n 8004234 <_printf_i+0xb0> 800422c: 222d movs r2, #45 ; 0x2d 800422e: 425b negs r3, r3 8004230: f884 2043 strb.w r2, [r4, #67] ; 0x43 8004234: 4962 ldr r1, [pc, #392] ; (80043c0 <_printf_i+0x23c>) 8004236: 220a movs r2, #10 8004238: e017 b.n 800426a <_printf_i+0xe6> 800423a: 6820 ldr r0, [r4, #0] 800423c: 6819 ldr r1, [r3, #0] 800423e: f010 0f80 tst.w r0, #128 ; 0x80 8004242: d003 beq.n 800424c <_printf_i+0xc8> 8004244: 1d08 adds r0, r1, #4 8004246: 6018 str r0, [r3, #0] 8004248: 680b ldr r3, [r1, #0] 800424a: e006 b.n 800425a <_printf_i+0xd6> 800424c: f010 0f40 tst.w r0, #64 ; 0x40 8004250: f101 0004 add.w r0, r1, #4 8004254: 6018 str r0, [r3, #0] 8004256: d0f7 beq.n 8004248 <_printf_i+0xc4> 8004258: 880b ldrh r3, [r1, #0] 800425a: 2a6f cmp r2, #111 ; 0x6f 800425c: bf14 ite ne 800425e: 220a movne r2, #10 8004260: 2208 moveq r2, #8 8004262: 4957 ldr r1, [pc, #348] ; (80043c0 <_printf_i+0x23c>) 8004264: 2000 movs r0, #0 8004266: f884 0043 strb.w r0, [r4, #67] ; 0x43 800426a: 6865 ldr r5, [r4, #4] 800426c: 2d00 cmp r5, #0 800426e: 60a5 str r5, [r4, #8] 8004270: f2c0 809c blt.w 80043ac <_printf_i+0x228> 8004274: 6820 ldr r0, [r4, #0] 8004276: f020 0004 bic.w r0, r0, #4 800427a: 6020 str r0, [r4, #0] 800427c: 2b00 cmp r3, #0 800427e: d13f bne.n 8004300 <_printf_i+0x17c> 8004280: 2d00 cmp r5, #0 8004282: f040 8095 bne.w 80043b0 <_printf_i+0x22c> 8004286: 4675 mov r5, lr 8004288: 2a08 cmp r2, #8 800428a: d10b bne.n 80042a4 <_printf_i+0x120> 800428c: 6823 ldr r3, [r4, #0] 800428e: 07da lsls r2, r3, #31 8004290: d508 bpl.n 80042a4 <_printf_i+0x120> 8004292: 6923 ldr r3, [r4, #16] 8004294: 6862 ldr r2, [r4, #4] 8004296: 429a cmp r2, r3 8004298: bfde ittt le 800429a: 2330 movle r3, #48 ; 0x30 800429c: f805 3c01 strble.w r3, [r5, #-1] 80042a0: f105 35ff addle.w r5, r5, #4294967295 80042a4: ebae 0305 sub.w r3, lr, r5 80042a8: 6123 str r3, [r4, #16] 80042aa: f8cd 8000 str.w r8, [sp] 80042ae: 463b mov r3, r7 80042b0: aa03 add r2, sp, #12 80042b2: 4621 mov r1, r4 80042b4: 4630 mov r0, r6 80042b6: f7ff feed bl 8004094 <_printf_common> 80042ba: 3001 adds r0, #1 80042bc: d155 bne.n 800436a <_printf_i+0x1e6> 80042be: f04f 30ff mov.w r0, #4294967295 80042c2: b005 add sp, #20 80042c4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80042c8: f881 2045 strb.w r2, [r1, #69] ; 0x45 80042cc: 493c ldr r1, [pc, #240] ; (80043c0 <_printf_i+0x23c>) 80042ce: 6822 ldr r2, [r4, #0] 80042d0: 6818 ldr r0, [r3, #0] 80042d2: f012 0f80 tst.w r2, #128 ; 0x80 80042d6: f100 0504 add.w r5, r0, #4 80042da: 601d str r5, [r3, #0] 80042dc: d001 beq.n 80042e2 <_printf_i+0x15e> 80042de: 6803 ldr r3, [r0, #0] 80042e0: e002 b.n 80042e8 <_printf_i+0x164> 80042e2: 0655 lsls r5, r2, #25 80042e4: d5fb bpl.n 80042de <_printf_i+0x15a> 80042e6: 8803 ldrh r3, [r0, #0] 80042e8: 07d0 lsls r0, r2, #31 80042ea: bf44 itt mi 80042ec: f042 0220 orrmi.w r2, r2, #32 80042f0: 6022 strmi r2, [r4, #0] 80042f2: b91b cbnz r3, 80042fc <_printf_i+0x178> 80042f4: 6822 ldr r2, [r4, #0] 80042f6: f022 0220 bic.w r2, r2, #32 80042fa: 6022 str r2, [r4, #0] 80042fc: 2210 movs r2, #16 80042fe: e7b1 b.n 8004264 <_printf_i+0xe0> 8004300: 4675 mov r5, lr 8004302: fbb3 f0f2 udiv r0, r3, r2 8004306: fb02 3310 mls r3, r2, r0, r3 800430a: 5ccb ldrb r3, [r1, r3] 800430c: f805 3d01 strb.w r3, [r5, #-1]! 8004310: 4603 mov r3, r0 8004312: 2800 cmp r0, #0 8004314: d1f5 bne.n 8004302 <_printf_i+0x17e> 8004316: e7b7 b.n 8004288 <_printf_i+0x104> 8004318: 6808 ldr r0, [r1, #0] 800431a: 681a ldr r2, [r3, #0] 800431c: f010 0f80 tst.w r0, #128 ; 0x80 8004320: 6949 ldr r1, [r1, #20] 8004322: d004 beq.n 800432e <_printf_i+0x1aa> 8004324: 1d10 adds r0, r2, #4 8004326: 6018 str r0, [r3, #0] 8004328: 6813 ldr r3, [r2, #0] 800432a: 6019 str r1, [r3, #0] 800432c: e007 b.n 800433e <_printf_i+0x1ba> 800432e: f010 0f40 tst.w r0, #64 ; 0x40 8004332: f102 0004 add.w r0, r2, #4 8004336: 6018 str r0, [r3, #0] 8004338: 6813 ldr r3, [r2, #0] 800433a: d0f6 beq.n 800432a <_printf_i+0x1a6> 800433c: 8019 strh r1, [r3, #0] 800433e: 2300 movs r3, #0 8004340: 4675 mov r5, lr 8004342: 6123 str r3, [r4, #16] 8004344: e7b1 b.n 80042aa <_printf_i+0x126> 8004346: 681a ldr r2, [r3, #0] 8004348: 1d11 adds r1, r2, #4 800434a: 6019 str r1, [r3, #0] 800434c: 6815 ldr r5, [r2, #0] 800434e: 2100 movs r1, #0 8004350: 6862 ldr r2, [r4, #4] 8004352: 4628 mov r0, r5 8004354: f000 f916 bl 8004584 8004358: b108 cbz r0, 800435e <_printf_i+0x1da> 800435a: 1b40 subs r0, r0, r5 800435c: 6060 str r0, [r4, #4] 800435e: 6863 ldr r3, [r4, #4] 8004360: 6123 str r3, [r4, #16] 8004362: 2300 movs r3, #0 8004364: f884 3043 strb.w r3, [r4, #67] ; 0x43 8004368: e79f b.n 80042aa <_printf_i+0x126> 800436a: 6923 ldr r3, [r4, #16] 800436c: 462a mov r2, r5 800436e: 4639 mov r1, r7 8004370: 4630 mov r0, r6 8004372: 47c0 blx r8 8004374: 3001 adds r0, #1 8004376: d0a2 beq.n 80042be <_printf_i+0x13a> 8004378: 6823 ldr r3, [r4, #0] 800437a: 079b lsls r3, r3, #30 800437c: d507 bpl.n 800438e <_printf_i+0x20a> 800437e: 2500 movs r5, #0 8004380: f104 0919 add.w r9, r4, #25 8004384: 68e3 ldr r3, [r4, #12] 8004386: 9a03 ldr r2, [sp, #12] 8004388: 1a9b subs r3, r3, r2 800438a: 429d cmp r5, r3 800438c: db05 blt.n 800439a <_printf_i+0x216> 800438e: 68e0 ldr r0, [r4, #12] 8004390: 9b03 ldr r3, [sp, #12] 8004392: 4298 cmp r0, r3 8004394: bfb8 it lt 8004396: 4618 movlt r0, r3 8004398: e793 b.n 80042c2 <_printf_i+0x13e> 800439a: 2301 movs r3, #1 800439c: 464a mov r2, r9 800439e: 4639 mov r1, r7 80043a0: 4630 mov r0, r6 80043a2: 47c0 blx r8 80043a4: 3001 adds r0, #1 80043a6: d08a beq.n 80042be <_printf_i+0x13a> 80043a8: 3501 adds r5, #1 80043aa: e7eb b.n 8004384 <_printf_i+0x200> 80043ac: 2b00 cmp r3, #0 80043ae: d1a7 bne.n 8004300 <_printf_i+0x17c> 80043b0: 780b ldrb r3, [r1, #0] 80043b2: f104 0542 add.w r5, r4, #66 ; 0x42 80043b6: f884 3042 strb.w r3, [r4, #66] ; 0x42 80043ba: e765 b.n 8004288 <_printf_i+0x104> 80043bc: 08004df6 .word 0x08004df6 80043c0: 08004de5 .word 0x08004de5 080043c4 <_putc_r>: 80043c4: b570 push {r4, r5, r6, lr} 80043c6: 460d mov r5, r1 80043c8: 4614 mov r4, r2 80043ca: 4606 mov r6, r0 80043cc: b118 cbz r0, 80043d6 <_putc_r+0x12> 80043ce: 6983 ldr r3, [r0, #24] 80043d0: b90b cbnz r3, 80043d6 <_putc_r+0x12> 80043d2: f7ff fb81 bl 8003ad8 <__sinit> 80043d6: 4b13 ldr r3, [pc, #76] ; (8004424 <_putc_r+0x60>) 80043d8: 429c cmp r4, r3 80043da: d112 bne.n 8004402 <_putc_r+0x3e> 80043dc: 6874 ldr r4, [r6, #4] 80043de: 68a3 ldr r3, [r4, #8] 80043e0: 3b01 subs r3, #1 80043e2: 2b00 cmp r3, #0 80043e4: 60a3 str r3, [r4, #8] 80043e6: da16 bge.n 8004416 <_putc_r+0x52> 80043e8: 69a2 ldr r2, [r4, #24] 80043ea: 4293 cmp r3, r2 80043ec: db02 blt.n 80043f4 <_putc_r+0x30> 80043ee: b2eb uxtb r3, r5 80043f0: 2b0a cmp r3, #10 80043f2: d110 bne.n 8004416 <_putc_r+0x52> 80043f4: 4622 mov r2, r4 80043f6: 4629 mov r1, r5 80043f8: 4630 mov r0, r6 80043fa: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} 80043fe: f7ff b9b9 b.w 8003774 <__swbuf_r> 8004402: 4b09 ldr r3, [pc, #36] ; (8004428 <_putc_r+0x64>) 8004404: 429c cmp r4, r3 8004406: d101 bne.n 800440c <_putc_r+0x48> 8004408: 68b4 ldr r4, [r6, #8] 800440a: e7e8 b.n 80043de <_putc_r+0x1a> 800440c: 4b07 ldr r3, [pc, #28] ; (800442c <_putc_r+0x68>) 800440e: 429c cmp r4, r3 8004410: bf08 it eq 8004412: 68f4 ldreq r4, [r6, #12] 8004414: e7e3 b.n 80043de <_putc_r+0x1a> 8004416: 6823 ldr r3, [r4, #0] 8004418: b2e8 uxtb r0, r5 800441a: 1c5a adds r2, r3, #1 800441c: 6022 str r2, [r4, #0] 800441e: 701d strb r5, [r3, #0] 8004420: bd70 pop {r4, r5, r6, pc} 8004422: bf00 nop 8004424: 08004d94 .word 0x08004d94 8004428: 08004db4 .word 0x08004db4 800442c: 08004d74 .word 0x08004d74 08004430 <_sbrk_r>: 8004430: b538 push {r3, r4, r5, lr} 8004432: 2300 movs r3, #0 8004434: 4c05 ldr r4, [pc, #20] ; (800444c <_sbrk_r+0x1c>) 8004436: 4605 mov r5, r0 8004438: 4608 mov r0, r1 800443a: 6023 str r3, [r4, #0] 800443c: f7fe ff10 bl 8003260 <_sbrk> 8004440: 1c43 adds r3, r0, #1 8004442: d102 bne.n 800444a <_sbrk_r+0x1a> 8004444: 6823 ldr r3, [r4, #0] 8004446: b103 cbz r3, 800444a <_sbrk_r+0x1a> 8004448: 602b str r3, [r5, #0] 800444a: bd38 pop {r3, r4, r5, pc} 800444c: 200013b4 .word 0x200013b4 08004450 <__sread>: 8004450: b510 push {r4, lr} 8004452: 460c mov r4, r1 8004454: f9b1 100e ldrsh.w r1, [r1, #14] 8004458: f000 f8a4 bl 80045a4 <_read_r> 800445c: 2800 cmp r0, #0 800445e: bfab itete ge 8004460: 6d63 ldrge r3, [r4, #84] ; 0x54 8004462: 89a3 ldrhlt r3, [r4, #12] 8004464: 181b addge r3, r3, r0 8004466: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 800446a: bfac ite ge 800446c: 6563 strge r3, [r4, #84] ; 0x54 800446e: 81a3 strhlt r3, [r4, #12] 8004470: bd10 pop {r4, pc} 08004472 <__swrite>: 8004472: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8004476: 461f mov r7, r3 8004478: 898b ldrh r3, [r1, #12] 800447a: 4605 mov r5, r0 800447c: 05db lsls r3, r3, #23 800447e: 460c mov r4, r1 8004480: 4616 mov r6, r2 8004482: d505 bpl.n 8004490 <__swrite+0x1e> 8004484: 2302 movs r3, #2 8004486: 2200 movs r2, #0 8004488: f9b1 100e ldrsh.w r1, [r1, #14] 800448c: f000 f868 bl 8004560 <_lseek_r> 8004490: 89a3 ldrh r3, [r4, #12] 8004492: 4632 mov r2, r6 8004494: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8004498: 81a3 strh r3, [r4, #12] 800449a: f9b4 100e ldrsh.w r1, [r4, #14] 800449e: 463b mov r3, r7 80044a0: 4628 mov r0, r5 80044a2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 80044a6: f000 b817 b.w 80044d8 <_write_r> 080044aa <__sseek>: 80044aa: b510 push {r4, lr} 80044ac: 460c mov r4, r1 80044ae: f9b1 100e ldrsh.w r1, [r1, #14] 80044b2: f000 f855 bl 8004560 <_lseek_r> 80044b6: 1c43 adds r3, r0, #1 80044b8: 89a3 ldrh r3, [r4, #12] 80044ba: bf15 itete ne 80044bc: 6560 strne r0, [r4, #84] ; 0x54 80044be: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 80044c2: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 80044c6: 81a3 strheq r3, [r4, #12] 80044c8: bf18 it ne 80044ca: 81a3 strhne r3, [r4, #12] 80044cc: bd10 pop {r4, pc} 080044ce <__sclose>: 80044ce: f9b1 100e ldrsh.w r1, [r1, #14] 80044d2: f000 b813 b.w 80044fc <_close_r> ... 080044d8 <_write_r>: 80044d8: b538 push {r3, r4, r5, lr} 80044da: 4605 mov r5, r0 80044dc: 4608 mov r0, r1 80044de: 4611 mov r1, r2 80044e0: 2200 movs r2, #0 80044e2: 4c05 ldr r4, [pc, #20] ; (80044f8 <_write_r+0x20>) 80044e4: 6022 str r2, [r4, #0] 80044e6: 461a mov r2, r3 80044e8: f7fe fc34 bl 8002d54 <_write> 80044ec: 1c43 adds r3, r0, #1 80044ee: d102 bne.n 80044f6 <_write_r+0x1e> 80044f0: 6823 ldr r3, [r4, #0] 80044f2: b103 cbz r3, 80044f6 <_write_r+0x1e> 80044f4: 602b str r3, [r5, #0] 80044f6: bd38 pop {r3, r4, r5, pc} 80044f8: 200013b4 .word 0x200013b4 080044fc <_close_r>: 80044fc: b538 push {r3, r4, r5, lr} 80044fe: 2300 movs r3, #0 8004500: 4c05 ldr r4, [pc, #20] ; (8004518 <_close_r+0x1c>) 8004502: 4605 mov r5, r0 8004504: 4608 mov r0, r1 8004506: 6023 str r3, [r4, #0] 8004508: f7fe fec4 bl 8003294 <_close> 800450c: 1c43 adds r3, r0, #1 800450e: d102 bne.n 8004516 <_close_r+0x1a> 8004510: 6823 ldr r3, [r4, #0] 8004512: b103 cbz r3, 8004516 <_close_r+0x1a> 8004514: 602b str r3, [r5, #0] 8004516: bd38 pop {r3, r4, r5, pc} 8004518: 200013b4 .word 0x200013b4 0800451c <_fstat_r>: 800451c: b538 push {r3, r4, r5, lr} 800451e: 2300 movs r3, #0 8004520: 4c06 ldr r4, [pc, #24] ; (800453c <_fstat_r+0x20>) 8004522: 4605 mov r5, r0 8004524: 4608 mov r0, r1 8004526: 4611 mov r1, r2 8004528: 6023 str r3, [r4, #0] 800452a: f7fe feb6 bl 800329a <_fstat> 800452e: 1c43 adds r3, r0, #1 8004530: d102 bne.n 8004538 <_fstat_r+0x1c> 8004532: 6823 ldr r3, [r4, #0] 8004534: b103 cbz r3, 8004538 <_fstat_r+0x1c> 8004536: 602b str r3, [r5, #0] 8004538: bd38 pop {r3, r4, r5, pc} 800453a: bf00 nop 800453c: 200013b4 .word 0x200013b4 08004540 <_isatty_r>: 8004540: b538 push {r3, r4, r5, lr} 8004542: 2300 movs r3, #0 8004544: 4c05 ldr r4, [pc, #20] ; (800455c <_isatty_r+0x1c>) 8004546: 4605 mov r5, r0 8004548: 4608 mov r0, r1 800454a: 6023 str r3, [r4, #0] 800454c: f7fe feaa bl 80032a4 <_isatty> 8004550: 1c43 adds r3, r0, #1 8004552: d102 bne.n 800455a <_isatty_r+0x1a> 8004554: 6823 ldr r3, [r4, #0] 8004556: b103 cbz r3, 800455a <_isatty_r+0x1a> 8004558: 602b str r3, [r5, #0] 800455a: bd38 pop {r3, r4, r5, pc} 800455c: 200013b4 .word 0x200013b4 08004560 <_lseek_r>: 8004560: b538 push {r3, r4, r5, lr} 8004562: 4605 mov r5, r0 8004564: 4608 mov r0, r1 8004566: 4611 mov r1, r2 8004568: 2200 movs r2, #0 800456a: 4c05 ldr r4, [pc, #20] ; (8004580 <_lseek_r+0x20>) 800456c: 6022 str r2, [r4, #0] 800456e: 461a mov r2, r3 8004570: f7fe fe9a bl 80032a8 <_lseek> 8004574: 1c43 adds r3, r0, #1 8004576: d102 bne.n 800457e <_lseek_r+0x1e> 8004578: 6823 ldr r3, [r4, #0] 800457a: b103 cbz r3, 800457e <_lseek_r+0x1e> 800457c: 602b str r3, [r5, #0] 800457e: bd38 pop {r3, r4, r5, pc} 8004580: 200013b4 .word 0x200013b4 08004584 : 8004584: b510 push {r4, lr} 8004586: b2c9 uxtb r1, r1 8004588: 4402 add r2, r0 800458a: 4290 cmp r0, r2 800458c: 4603 mov r3, r0 800458e: d101 bne.n 8004594 8004590: 2000 movs r0, #0 8004592: bd10 pop {r4, pc} 8004594: 781c ldrb r4, [r3, #0] 8004596: 3001 adds r0, #1 8004598: 428c cmp r4, r1 800459a: d1f6 bne.n 800458a 800459c: 4618 mov r0, r3 800459e: bd10 pop {r4, pc} 080045a0 <__malloc_lock>: 80045a0: 4770 bx lr 080045a2 <__malloc_unlock>: 80045a2: 4770 bx lr 080045a4 <_read_r>: 80045a4: b538 push {r3, r4, r5, lr} 80045a6: 4605 mov r5, r0 80045a8: 4608 mov r0, r1 80045aa: 4611 mov r1, r2 80045ac: 2200 movs r2, #0 80045ae: 4c05 ldr r4, [pc, #20] ; (80045c4 <_read_r+0x20>) 80045b0: 6022 str r2, [r4, #0] 80045b2: 461a mov r2, r3 80045b4: f7fe fe46 bl 8003244 <_read> 80045b8: 1c43 adds r3, r0, #1 80045ba: d102 bne.n 80045c2 <_read_r+0x1e> 80045bc: 6823 ldr r3, [r4, #0] 80045be: b103 cbz r3, 80045c2 <_read_r+0x1e> 80045c0: 602b str r3, [r5, #0] 80045c2: bd38 pop {r3, r4, r5, pc} 80045c4: 200013b4 .word 0x200013b4 080045c8 <_init>: 80045c8: b5f8 push {r3, r4, r5, r6, r7, lr} 80045ca: bf00 nop 80045cc: bcf8 pop {r3, r4, r5, r6, r7} 80045ce: bc08 pop {r3} 80045d0: 469e mov lr, r3 80045d2: 4770 bx lr 080045d4 <_fini>: 80045d4: b5f8 push {r3, r4, r5, r6, r7, lr} 80045d6: bf00 nop 80045d8: bcf8 pop {r3, r4, r5, r6, r7} 80045da: bc08 pop {r3} 80045dc: 469e mov lr, r3 80045de: 4770 bx lr