/* * Bluecell_operate.h * * Created on: 2020. 4. 3. * Author: YJ */ #ifndef BLUECELL_OPERATE_H_ #define BLUECELL_OPERATE_H_ #include #include "Bluecell_operate.h" /* SYN Sub-UID R-Code TR-ID Seq-Num TTL Time ���� ���� CMD Length Header Checksum SUB-DATA SUB-DATA-CRC ETX */ /* * 0 80 ��ü ���� ��ȸ ��� AID �׸� ���� ���� ��û �� ���� (��û Frame�� SUB-DATA �� ���̴� 0) 1 81 ���� ��û ���� ��û�� REQ�� 0x01 �̰� ������ ��ü ������ ���¸� ���� 10 90 Download Notification �ٿ�ε� ���� 11 91 Download Data �ٿ�ε� data 12 92 Download Confirm �ٿ�ε� Ȯ�� 13 93 Download Complete Download Complete Command 14 94 System-Reboot System Rebooting Command 40 C0 ���̺� ��ȸ �� ���� 41 C1 ���̺� ���� �� ���� * * */ typedef enum{ AllDataReq = 0, // -> Response 80 DataCtrlReq, // -> Response 81 DownNotification, // -> Response 90 DownData, // -> Response 91 DownConfirm , // -> Response 92 DownComplete, // -> Response 93 SystemReboot, // -> Response 94 TableDataReq = 40, }MBICBootProt_st; typedef enum{ MBIC_GET = 0, MBIC_SET, MBIC_Table_Get = 0x40, MBIC_Table_Set = 0x41, }BMBM_CMD; typedef struct{ uint8_t High_bit; uint8_t Low_bit; }OneByteToTwoByte; typedef enum{ MBIC_PREAMBLE_0 = 0, MBIC_PREAMBLE_1, MBIC_PREAMBLE_2, MBIC_PREAMBLE_3, MBIC_SUBUID_0, MBIC_SUBUID_1, MBIC_RCODE_0, MBIC_TRID_0, MBIC_TRID_1, MBIC_SEQSUM_0, // 9Index MBIC_TTL_0, //10 INDEX MBIC_TIME_0, MBIC_TIME_1, MBIC_TIME_2, MBIC_TIME_3, MBIC_TIME_4, MBIC_TIME_5, MBIC_ERRRESPONSE_0, MBIC_CMD_0, MBIC_LENGTH_0, // 19INDEX MBIC_LENGTH_1, // 20 MBIC_HEADERCHECKSUM_0, MBIC_PAYLOADSTART, /* * PayLoadSTART */ }MBICProt_st; typedef enum{ AGC_Alarm_DL1_Index = 0, AGC_Alarm_DL2_Index, AGC_Alarm_DL3_Index, AGC_Alarm_DL4_Index, AGC_Alarm_DL_Index_MAX, }; typedef enum{ Alarm_Bit_List = 0xE000, Alarm_Mask, Alarm_Test_Mode, Alarm_Test_Dummy, CPU_Version, ModuleINFORMATION_null1, CPU_Current_Bank, CPU_Bank_Select_Reboot_by, CPU_Bank1_Image_Version, CPU_Bank1_Image_BuildTime, CPU_Bank1_Image_Name, CPU_Bank2_Image_Version, CPU_Bank2_Image_BuildTime, CPU_Bank2_Image_Name, SW_Reset, Factory_Set_Initialization, }SERIAL_ModuleINFORMATION; typedef enum{ Temperature = 0xE010, Temperature_Offset, Temp_High_Threshold, Temp_High_Threshold_Default, Temp_High_Alarm, LED_TEST, Node, Type, PCB_Version, Serial_Number, Manufacture, Manufacture_Date, ENVIRONMENT_INVENTORY_NULL0, Freq_ID, Carrier_ID, Carrier_ON_OFF, }SERIAL_ENVIRONMENT_INVENTORY_t; typedef enum{ DLI_P1_Level = 0xE020, DLI_P2_Level, DLI_P3_Level, DLI_P4_Level, ULO_P1_Level, ULO_P2_Level, ULO_P3_Level, ULO_P4_Level, }SERIAL_Current_Volt_t; typedef struct{ bool AGC1_En; bool AGC2_En; bool AGC3_En; bool AGC4_En; bool ALC1_En; bool ALC2_En; bool ALC3_En; bool ALC4_En; }AutoCtrl_st; typedef enum{ BLUECELL_HEADER, BLUECELL_TYPE, BLUECELL_LENGTH, BLUECELL_CRCINDEX, BLUECELL_DATA, }BLUECELLProt_st; typedef enum{ Bluecell_Table_ATT_DL1 = 0, Bluecell_Table_ATT_UL1, Bluecell_Table_ATT_DL2, Bluecell_Table_ATT_UL2, Bluecell_Table_ATT_DL3, Bluecell_Table_ATT_UL3, Bluecell_Table_ATT_DL4, Bluecell_Table_ATT_UL4, Bluecell_Table_DET_DL1, Bluecell_Table_DET_UL1, Bluecell_Table_DET_DL2, Bluecell_Table_DET_UL2, Bluecell_Table_DET_DL3, Bluecell_Table_DET_UL3, Bluecell_Table_DET_DL4, Bluecell_Table_DET_UL4, Bluecell_Table_TEMP_DL1, Bluecell_Table_TEMP_UL1, Bluecell_Table_TEMP_DL2, Bluecell_Table_TEMP_UL2, Bluecell_Table_TEMP_DL3, Bluecell_Table_TEMP_UL3, Bluecell_Table_TEMP_DL4, Bluecell_Table_TEMP_UL4, }Bluecell_tableIndex; typedef enum{ MBIC_PROT_PREAMBLE0_INDEX, MBIC_PROT_PREAMBLE1_INDEX, MBIC_PROT_PREAMBLE2_INDEX, MBIC_PROT_PREAMBLE3_INDEX, MBIC_PROT_SUB_UID0_INDEX, MBIC_PROT_SUB_UID1_INDEX, MBIC_PROT_R_CODE_INDEX, MBIC_PROT_TR_ID0_INDEX, MBIC_PROT_TR_ID1_INDEX, MBIC_PROT_SEQ_NUM_INDEX, MBIC_PROT_TTL_INDEX, MBIC_PROT_TIME0_INDEX, MBIC_PROT_TIME1_INDEX, MBIC_PROT_TIME2_INDEX, MBIC_PROT_TIME3_INDEX, MBIC_PROT_TIME4_INDEX, MBIC_PROT_TIME5_INDEX, MBIC_PROT_ERR_RESP_INDEX, MBIC_PROT_CMD_INDEX, MBIC_PROT_LENGTH_INDEX, MBIC_PROT_HEADERCHECKSUM_INDEX, MBIC_PROT_SUB_DATA_INDEX, MBIC_PROT_INDEX_MAX, }; //5~ - 25 typedef struct{ int8_t DET_DL_0; int8_t DET_DL_1; int8_t DET_DL_2; int8_t DET_DL_3; int8_t DET_DL_4; int8_t DET_DL_5; int8_t DET_DL_6; int8_t DET_DL_7; int8_t DET_DL_8; int8_t DET_DL_9; int8_t DET_DL_10; int8_t DET_DL_11; int8_t DET_DL_12; int8_t DET_DL_13; int8_t DET_DL_14; int8_t DET_DL_15; int8_t DET_DL_16; int8_t DET_DL_17; int8_t DET_DL_18; int8_t DET_DL_19; int8_t DET_DL_20; int8_t DET_DL_21; int8_t DET_DL_22; int8_t DET_DL_23; int8_t DET_DL_24; int8_t DET_DL_25; int8_t DET_DL_26; int8_t DET_DL_27; int8_t DET_DL_28; int8_t DET_DL_29; int8_t DET_DL_30; }AGC_dBm_t; typedef struct{ int8_t DET_UL_0; int8_t DET_UL_1; int8_t DET_UL_2; int8_t DET_UL_3; int8_t DET_UL_4; int8_t DET_UL_5; int8_t DET_UL_6; int8_t DET_UL_7; int8_t DET_UL_8; int8_t DET_UL_9; int8_t DET_UL_10; int8_t DET_UL_11; int8_t DET_UL_12; int8_t DET_UL_13; int8_t DET_UL_14; int8_t DET_UL_15; int8_t DET_UL_16; int8_t DET_UL_17; int8_t DET_UL_18; int8_t DET_UL_19; int8_t DET_UL_20; int8_t DET_UL_21; int8_t DET_UL_22; int8_t DET_UL_23; int8_t DET_UL_24; int8_t DET_UL_25; int8_t DET_UL_26; int8_t DET_UL_27; int8_t DET_UL_28; int8_t DET_UL_29; int8_t DET_UL_30; int8_t DET_UL_31; int8_t DET_UL_32; int8_t DET_UL_33; int8_t DET_UL_34; int8_t DET_UL_35; int8_t DET_UL_36; int8_t DET_UL_37; int8_t DET_UL_38; int8_t DET_UL_39; int8_t DET_UL_40; int8_t DET_UL_41; int8_t DET_UL_42; int8_t DET_UL_43; int8_t DET_UL_44; int8_t DET_UL_45; }ALC_dBm_t; typedef enum{ DLI_RF_Path1_ON_OFF = 0xE030, DLI_RF_Path2_ON_OFF, DLI_RF_Path3_ON_OFF, DLI_RF_Path4_ON_OFF, DLI_Gain_Atten1, DLI_Gain_Atten2, DLI_Gain_Atten3, DLI_Gain_Atten4, DLI_Gain_Atten_Offset1, DLI_Gain_Atten_Offset2, DLI_Gain_Atten_Offset3, DLI_Gain_Atten_Offset4, DLI_Level_High_Threshold, DLI_Level_Low_Threshold, DLI_Level_High_Low_Threshold_default, DLI_Level, DLI_Level_High_Alarm1=0xE040, DLI_Level_High_Alarm2, DLI_Level_High_Alarm3, DLI_Level_High_Alarm4, DLI_Level_Low_Alarm1, DLI_Level_Low_Alarm2, DLI_Level_Low_Alarm3, DLI_Level_Low_Alarm4, SERIAL_DL_NULL0, DLI_FRBT_Atten, DLI_FRBT_D_Day, DLI_FRBT_Status, DLI_AGC_ON_OFF=0xE050, DLI_AGC_Threshold, DLI_AGC_Threshold_Default, DLI_Shutdown_ON_OFF, DLI_Shutdown_Threshold, DLI_Shutdown_Threshold_Default, DLI_Shutdown_Count, DLI_AGC_Alarm1, DLI_AGC_Alarm2, DLI_AGC_Alarm3, DLI_AGC_Alarm4, DLI_Shutdown_Alarm1, DLI_Shutdown_Alarm2, DLI_Shutdown_Alarm3, DLI_Shutdown_Alarm4, }SERIAL_DL_t; typedef enum{ ULO_RF_Path1_ON_OFF1 = 0xE060, ULO_RF_Path2_ON_OFF2, ULO_RF_Path3_ON_OFF3, ULO_RF_Path4_ON_OFF4, ULO_Gain_Atten1, ULO_Gain_Atten2, ULO_Gain_Atten3, ULO_Gain_Atten4, ULO_Gain_Atten_Offset1, ULO_Gain_Atten_Offset2, ULO_Gain_Atten_Offset3, ULO_Gain_Atten_Offset4, ULO_Level_High_Threshold, SERIAL_UL_NULL0, ULO_Level_High_Threshold_default, ULO_Level, ULO_Level_High_Alarm1=0xE070, ULO_Level_High_Alarm2, ULO_Level_High_Alarm3, ULO_Level_High_Alarm4, SERIAL_UL_NULL1, ULO_ALC_ON_OFF=0xE080, ULO_ALC_Threshold, ULO_ALC_Threshold_Default, ULO_Shutdown_ON_OFF, ULO_Shutdown_Threshold, ULO_Shutdown_Threshold_Default, ULO_Shutdown_Retry_Count, ULO_ALC_Alarm1, ULO_ALC_Alarm2, ULO_ALC_Alarm3, ULO_ALC_Alarm4, ULO_Shutdown_Alarm1, ULO_Shutdown_Alarm2, ULO_Shutdown_Alarm3, ULO_Shutdown_Alarm4, }SERIAL_UL_t; #define MBIC_HEADER_SIZE 18 #define MBIC_PREAMBLE0 0x16 #define MBIC_PREAMBLE1 0x16 #define MBIC_PREAMBLE2 0x16 #define MBIC_PREAMBLE3 0x16 #define MBIC_SUBUID0 0x00 #define MBIC_SUBUID1 0xF1 #define MBIC_RCODE #define MBIC_TRID #define MBIC_SEQNUM #define MBIC_TTL #define MBIC_TIME #define MBIC_ERRRESPONSE 0x00 #define MBIC_CMD #define MBIC_LENGTH #define MBIC_CHECKSHUM_INDEX MBIC_HEADER_SIZE - 2 //CheckSUM REMOVE INDEX #define MBIC_ETX 0x03 #define MBIC_NODE_MU 0x80 enum DATATYPE { BLUECELL_SOFTWARERESET = 0, ATT_DL1_PATH = 0x12, ATT_UL1_PATH = 0x16, ATT_SelfTest1 = 0x18, ATT_DL2_PATH = 0x22, ATT_UL2_PATH = 0x26, ATT_SelfTest2 = 0x28, ATT_DL3_PATH = 0x32, ATT_UL3_PATH = 0x36, ATT_SelfTest3 = 0x38, ATT_DL4_PATH = 0x42, ATT_UL4_PATH = 0x46, ATT_SelfTest4 = 0x48, Bluecell_ULO_ALC_ON_OFF = 0x51, Bluecell_DLI_AGC_ON_OFF = 0x61, ATT_TableSet = 0x70, ATT_TableGet = 0x71, Bluecell_StatusReq = 0x77, Bluecell_StatusSave = 0x78, Bluecell_DL1_USER = 0x80, Bluecell_DL2_USER = 0x81, Bluecell_DL3_USER = 0x82, Bluecell_DL4_USER = 0x83, Bluecell_UL1_USER = 0x84, Bluecell_UL2_USER = 0x85, Bluecell_UL3_USER = 0x86, Bluecell_UL4_USER = 0x87, Bluecell_TEMP_USER = 0x88, Bluecell_DLI_AGC_Threshold, Bluecell_DLI_AGC_Threshold_Default, Bluecell_DLI_Shutdown_ON_OFF, Bluecell_DLI_Shutdown_Threshold, Bluecell_DLI_Shutdown_Threshold_Default, Bluecell_DLI_Shutdown_Count, Bluecell_DLI_Level_High_Threshold , Bluecell_DLI_Level_Low_Threshold , Bluecell_DLI_Level_High_Low_Threshold_default , Bluecell_LED_TEST , Bluecell_Temperature_Offset , Bluecell_Temp_High_Threshold , Bluecell_Temp_High_Threshold_Default , Bluecell_ULO_Level_High_Threshold , Bluecell_ULO_Level_High_Threshold_default , Bluecell_ULO_ALC_Threshold , Bluecell_ULO_ALC_Threshold_Default , Bluecell_ULO_Shutdown_ON_OFF , Bluecell_ULO_Shutdown_Threshold , Bluecell_ULO_Shutdown_Threshold_Default , Bluecell_ULO_Shutdown_Retry_Count , Bluecell_Alarm_Mask, Bluecell_ATT_DL1, Bluecell_ATT_DL2, Bluecell_ATT_DL3, Bluecell_ATT_DL4, Bluecell_ATT_UL1, Bluecell_ATT_UL2, Bluecell_ATT_UL3, Bluecell_ATT_UL4, Bluecell_ATT_DL1_USER, Bluecell_ATT_DL2_USER, Bluecell_ATT_DL3_USER, Bluecell_ATT_DL4_USER, Bluecell_ATT_UL1_USER, Bluecell_ATT_UL2_USER, Bluecell_ATT_UL3_USER, Bluecell_ATT_UL4_USER, }; typedef enum{ DLI_P1_Level_Table_Number = 0x00, DLI_P2_Level_Table_Number = 0x01, DLI_P3_Level_Table_Number = 0x02, DLI_P4_Level_Table_Number = 0x03, ULO_P1_Level_Table_Number = 0x10, ULO_P2_Level_Table_Number = 0x11, ULO_P3_Level_Table_Number = 0x12, ULO_P4_Level_Table_Number = 0x13, DLI_P1_ATT_Temp_guarantee_Table_Number = 0x20, DLI_P2_ATT_Temp_guarantee_Table_Number = 0x21, DLI_P3_ATT_Temp_guarantee_Table_Number = 0x22, DLI_P4_ATT_Temp_guarantee_Table_Number = 0x23, ULO_P1_ATT_Temp_guarantee_Table_Number = 0x30, ULO_P2_ATT_Temp_guarantee_Table_Number = 0x31, ULO_P3_ATT_Temp_guarantee_Table_Number = 0x32, ULO_P4_ATT_Temp_guarantee_Table_Number = 0x33, DLI_P1_ATT_Accuracy_Table_Number = 0x40, DLI_P2_ATT_Accuracy_Table_Number = 0x41, DLI_P3_ATT_Accuracy_Table_Number = 0x42, DLI_P4_ATT_Accuracy_Table_Number = 0x43, ULO_P1_ATT_Accuracy_Table_Number = 0x50, ULO_P2_ATT_Accuracy_Table_Number = 0x51, ULO_P3_ATT_Accuracy_Table_Number = 0x52, ULO_P4_ATT_Accuracy_Table_Number = 0x53, }MBIC_Table_Number; #define UNIT_TYPE_MBIC 0x01 /*FLAG BIT START */ #define ENVIRONMENT_TEMPHIGH 0x80 #define ALARM_DLI_P4_LEVEL_LOW 0x80 #define ALARM_DLI_P3_LEVEL_LOW 0x40 #define ALARM_DLI_P2_LEVEL_LOW 0x20 #define ALARM_DLI_P1_LEVEL_LOW 0x10 #define ALARM_DLI_P4_LEVEL_HIGH 0x08 #define ALARM_DLI_P3_LEVEL_HIGH 0x04 #define ALARM_DLI_P2_LEVEL_HIGH 0x02 #define ALARM_DLI_P1_LEVEL_HIGH 0x01 #define ALARM_AGC_P4 0x80 #define ALARM_AGC_P3 0x40 #define ALARM_AGC_P2 0x20 #define ALARM_AGC_P1 0x10 #define ALARM_DLI_SHUTDOWN_P4 0x08 #define ALARM_DLI_SHUTDOWN_P3 0x04 #define ALARM_DLI_SHUTDOWN_P2 0x02 #define ALARM_DLI_SHUTDOWN_P1 0x01 #define ALARM_ULO_P4_LEVEL_HIGH 0x08 #define ALARM_ULO_P3_LEVEL_HIGH 0x04 #define ALARM_ULO_P2_LEVEL_HIGH 0x02 #define ALARM_ULO_P1_LEVEL_HIGH 0x01 #define ALARM_ALC_P4 0x80 #define ALARM_ALC_P3 0x40 #define ALARM_ALC_P2 0x20 #define ALARM_ALC_P1 0x10 #define ALARM_ULO_SHUTDOWN_P4 0x08 #define ALARM_ULO_SHUTDOWN_P3 0x04 #define ALARM_ULO_SHUTDOWN_P2 0x02 #define ALARM_ULO_SHUTDOWN_P1 0x01 /*FLAG BIT END*/ #define MBIC_DLI_AGC_Threshold_Default_H 0xFF #define MBIC_DLI_AGC_Threshold_Default_L 0xF6 #define MBIC_DLI_Shutdown_Threshold_Default_H 0xFF #define MBIC_DLI_Shutdown_Threshold_Default_L 0xFF #define MBIC_DLI_Level_High_Threshold_default_H 0x00 #define MBIC_DLI_Level_High_Threshold_default_L 0x07 #define MBIC_DLI_Level_Low_Threshold_default_H 0xFF #define MBIC_DLI_Level_Low_Threshold_default_L 0xD5 #define MBIC_ULO_Level_High_Threshold_Default_H 0xFF #define MBIC_ULO_Level_High_Threshold_Default_L 0xEE #define MBIC_Temp_High_Threshold_Default 0x50 #define MBIC_ULO_ALC_Threshold_Default_H 0xFF #define MBIC_ULO_ALC_Threshold_Default_L 0xD8 #define MBIC_ULO_Shutdown_Threshold_Default_H 0xFF #define MBIC_ULO_Shutdown_Threshold_Default_L 0xF0 #define HIDDENATTEN 5 * 10 typedef enum{ ENVIRONMENT = 0, DL1, DL2, UL1, UL2, MAX_ALARM_Len, }AlarmList; typedef struct{ uint8_t bluecell_User_DL1_H; uint8_t bluecell_User_DL1_L; uint8_t bluecell_User_DL2_H; uint8_t bluecell_User_DL2_L; uint8_t bluecell_User_DL3_H; uint8_t bluecell_User_DL3_L; uint8_t bluecell_User_DL4_H; uint8_t bluecell_User_DL4_L; uint8_t bluecell_User_UL1_H; uint8_t bluecell_User_UL1_L; uint8_t bluecell_User_UL2_H; uint8_t bluecell_User_UL2_L; uint8_t bluecell_User_UL3_H; uint8_t bluecell_User_UL3_L; uint8_t bluecell_User_UL4_H; uint8_t bluecell_User_UL4_L; }USER_ATTEN_st; typedef struct{ uint8_t bluecell_header; uint8_t bluecell_type; uint8_t bluecell_length; uint8_t bluecell_crcindex; uint8_t Selftest1; uint8_t Selftest2; uint8_t Selftest3; uint8_t Selftest4; uint8_t ATT_DL1_PATH; uint8_t ATT_DL2_PATH; uint8_t ATT_DL3_PATH; uint8_t ATT_DL4_PATH; uint8_t ATT_UL1_PATH; uint8_t ATT_UL2_PATH; uint8_t ATT_UL3_PATH; uint8_t ATT_UL4_PATH; uint8_t ATT_DL1_H; uint8_t ATT_DL1_L; uint8_t ATT_DL2_H; uint8_t ATT_DL2_L; uint8_t ATT_DL3_H; uint8_t ATT_DL3_L; uint8_t ATT_DL4_H; uint8_t ATT_DL4_L; uint8_t ATT_UL1_H; uint8_t ATT_UL1_L; uint8_t ATT_UL2_H; uint8_t ATT_UL2_L; uint8_t ATT_UL3_H; uint8_t ATT_UL3_L; uint8_t ATT_UL4_H; uint8_t ATT_UL4_L; uint8_t ULO_Level1_H; uint8_t ULO_Level1_L; uint8_t ULO_Level2_H; uint8_t ULO_Level2_L; uint8_t ULO_Level3_H; uint8_t ULO_Level3_L; uint8_t ULO_Level4_H; uint8_t ULO_Level4_L; uint8_t DLI_Level1_H; uint8_t DLI_Level1_L; uint8_t DLI_Level2_H; uint8_t DLI_Level2_L; uint8_t DLI_Level3_H; uint8_t DLI_Level3_L; uint8_t DLI_Level4_H; uint8_t DLI_Level4_L; uint8_t BLUECELL_RESERVE1; uint8_t DET_TEMP; uint8_t DLI_AGC_ON_OFF; uint8_t ULO_ALC_ON_OFF; uint8_t BLUECELL_RESERVE2; uint8_t BLUECELL_RESERVE3; uint8_t BLUECELL_RESERVE4; uint8_t BLUECELL_RESERVE5; uint8_t BLUECELL_RESERVE6; uint8_t BLUECELL_RESERVE7; uint8_t BLUECELL_RESERVE8; uint8_t BLUECELL_RESERVE9; uint8_t BLUECELL_RESERVE10; uint8_t BLUECELL_RESERVE11; uint8_t BLUECELL_RESERVE12; uint8_t BLUECELL_RESERVE13; uint8_t BLUECELL_RESERVE14; uint8_t BLUECELL_RESERVE15; uint8_t ULO_ALC_Threshold_H; uint8_t ULO_ALC_Threshold_L; uint8_t BLUECELL_RESERVE16; uint8_t BLUECELL_RESERVE17; uint8_t BLUECELL_RESERVE18; uint8_t BLUECELL_RESERVE19; uint8_t BLUECELL_RESERVE20; uint8_t BLUECELL_RESERVE21; uint8_t bluecell_User_DL1_H; uint8_t bluecell_User_DL1_L; uint8_t bluecell_User_DL2_H; uint8_t bluecell_User_DL2_L; uint8_t bluecell_User_DL3_H; uint8_t bluecell_User_DL3_L; uint8_t bluecell_User_DL4_H; uint8_t bluecell_User_DL4_L; uint8_t bluecell_User_UL1_H; uint8_t bluecell_User_UL1_L; uint8_t bluecell_User_UL2_H; uint8_t bluecell_User_UL2_L; uint8_t bluecell_User_UL3_H; uint8_t bluecell_User_UL3_L; uint8_t bluecell_User_UL4_H; uint8_t bluecell_User_UL4_L; uint8_t bluecell_User_TEMP_H; uint8_t bluecell_User_TEMP_L; int8_t bluecell_User_TEMP_OFFSET; int8_t Temp_High_Threshold; int8_t Temp_High_Threshold_Default; uint8_t DLI_Level_High_Threshold_H; uint8_t DLI_Level_High_Threshold_L; uint8_t DLI_Level_Low_Threshold_H; uint8_t DLI_Level_Low_Threshold_L; uint8_t DLI_Level_High_Low_Threshold_default; uint8_t ALARM_TEMP_HIGH; //bit uint8_t ALARM_DLI_Level; uint8_t ALARM_DLI_SHTUTDOWN; uint8_t ALARM_DLI_AGC_Alarm; uint8_t ALARM_ULO_ALC_Alarm; uint8_t ALARM_ULO_Level; uint8_t ALARM_ULO_SHTUTDOWN; uint8_t ALARM_MASK1; uint8_t ALARM_TESTMODE; uint8_t ALARM_Test_Dummy1; uint8_t ALARM_Test_Dummy2; uint8_t ALARM_Test_Dummy3; uint8_t CPUVERSION1; uint8_t CPUVERSION2; uint8_t CPUVERSION3; uint8_t CPU_Current_Bank; uint8_t CPU_Bank_Select;//Reboot_by; uint8_t CPU_Bank1_Image_Version1; uint8_t CPU_Bank1_Image_Version2; uint8_t CPU_Bank1_Image_Version3; uint8_t CPU_Bank1_Image_BuildTime1; uint8_t CPU_Bank1_Image_BuildTime2; uint8_t CPU_Bank1_Image_BuildTime3; uint8_t CPU_Bank1_Image_BuildTime4; uint8_t CPU_Bank1_Image_BuildTime5; uint8_t CPU_Bank1_Image_BuildTime6; uint8_t CPU_Bank1_Image_Name[32]; uint8_t CPU_Bank2_Image_Version1; uint8_t CPU_Bank2_Image_Version2; uint8_t CPU_Bank2_Image_Version3; uint8_t CPU_Bank2_Image_BuildTime1; uint8_t CPU_Bank2_Image_BuildTime2; uint8_t CPU_Bank2_Image_BuildTime3; uint8_t CPU_Bank2_Image_BuildTime4; uint8_t CPU_Bank2_Image_BuildTime5; uint8_t CPU_Bank2_Image_BuildTime6; uint8_t CPU_Bank2_Image_Name[32]; uint8_t S_W_Reset; uint8_t Factory_Set_Initialization; uint8_t Temp_High_Alarm; uint8_t LED_TEST; uint8_t NODE; uint8_t Type; uint8_t PCB_Version[2]; uint8_t Serial_Number[20]; // INDEX : 20 uint8_t Manufacture; uint8_t Manufacture_Date[3]; uint8_t Freq_ID; uint8_t Carrier_ID; uint8_t Carrier_ON_OFF; uint8_t DLI_Level_High_Alarm1; uint8_t DLI_Level_High_Alarm2; uint8_t DLI_Level_High_Alarm3; uint8_t DLI_Level_High_Alarm4; uint8_t DLI_Level_Low_Alarm1; uint8_t DLI_Level_Low_Alarm2; uint8_t DLI_Level_Low_Alarm3; uint8_t DLI_Level_Low_Alarm4; uint8_t DLI_FRBT_Atten1_H; uint8_t DLI_FRBT_Atten1_L; uint8_t DLI_FRBT_Atten2_H; uint8_t DLI_FRBT_Atten2_L; uint8_t DLI_FRBT_Atten3_H; uint8_t DLI_FRBT_Atten3_L; uint8_t DLI_FRBT_Atten4_H; uint8_t DLI_FRBT_Atten4_L; uint8_t DLI_FRBT_D_Day; uint8_t DLI_FRBT_Status; uint8_t DLI_AGC_Threshold_H; uint8_t DLI_AGC_Threshold_L; uint8_t DLI_AGC_Threshold_default; uint8_t DLI_Shutdown_ON_OFF; uint8_t DLI_Shutdown_Threshold_H; uint8_t DLI_Shutdown_Threshold_L; uint8_t DLI_Shutdown_Threshold_Default; uint8_t DLI_Shutdown_Retry_Count1; uint8_t DLI_Shutdown_Retry_Count2; uint8_t DLI_Shutdown_Retry_Count3; uint8_t DLI_Shutdown_Retry_Count4; uint8_t DLI_AGC_Alarm1; uint8_t DLI_AGC_Alarm2; uint8_t DLI_AGC_Alarm3; uint8_t DLI_AGC_Alarm4; uint8_t DLI_Shutdown_Alarm1; uint8_t DLI_Shutdown_Alarm2; uint8_t DLI_Shutdown_Alarm3; uint8_t DLI_Shutdown_Alarm4; uint8_t ULO_Level_High_Threshold_H; uint8_t ULO_Level_High_Threshold_L; uint8_t ULO_Level_High_Threshold_default; uint8_t BLUECELL_RESERVE22;//ADC3 5 uint8_t BLUECELL_RESERVE23;//ADC3 5 uint8_t BLUECELL_RESERVE24;//ADC3 6 uint8_t BLUECELL_RESERVE25;//ADC3 6 uint8_t BLUECELL_RESERVE26;//ADC3 7 uint8_t BLUECELL_RESERVE27;//ADC3 7 uint8_t BLUECELL_RESERVE28;//ADC3 8 uint8_t BLUECELL_RESERVE29;//ADC3 8 uint8_t BLUECELL_RESERVE30;//ADC1 4 uint8_t BLUECELL_RESERVE31;//ADC1 4 uint8_t BLUECELL_RESERVE32;//ADC1 5 uint8_t BLUECELL_RESERVE33;//ADC1 5 uint8_t BLUECELL_RESERVE34;//ADC1 6 uint8_t BLUECELL_RESERVE35;//ADC1 6 uint8_t BLUECELL_RESERVE36;//ADC3 4 uint8_t BLUECELL_RESERVE37;//ADC3 4 uint8_t ULO_Level_High_Alarm1; uint8_t ULO_Level_High_Alarm2; uint8_t ULO_Level_High_Alarm3; uint8_t ULO_Level_High_Alarm4; uint8_t ULO_ALC_Threshold_Default; uint8_t ULO_Shutdown_ON_OFF; uint8_t ULO_Shutdown_Threshold_H; uint8_t ULO_Shutdown_Threshold_L; uint8_t ULO_Shutdown_Threshold_Default; uint8_t ULO_Shutdown_Retry_Count1; uint8_t ULO_Shutdown_Retry_Count2; uint8_t ULO_Shutdown_Retry_Count3; uint8_t ULO_Shutdown_Retry_Count4; uint8_t ULO_ALC_Alarm1; uint8_t ULO_ALC_Alarm2; uint8_t ULO_ALC_Alarm3; uint8_t ULO_ALC_Alarm4; uint8_t ULO_Shutdown_Alarm1; uint8_t ULO_Shutdown_Alarm2; uint8_t ULO_Shutdown_Alarm3; uint8_t ULO_Shutdown_Alarm4; uint8_t Reserve0; uint8_t Reserve1; uint8_t Reserve2; uint8_t Reserve3; uint8_t Reserve4; uint8_t Reserve5; uint8_t bluecell_crc_H; uint8_t bluecell_crc_L; uint8_t bluecell_etx; }BLUESTATUS_st; typedef struct{ uint8_t Table_0_0_dBm; uint8_t Table_0_5_dBm; uint8_t Table_1_0_dBm; uint8_t Table_1_5_dBm; uint8_t Table_2_0_dBm; uint8_t Table_2_5_dBm; uint8_t Table_3_0_dBm; uint8_t Table_3_5_dBm; uint8_t Table_4_0_dBm; uint8_t Table_4_5_dBm; uint8_t Table_5_0_dBm; uint8_t Table_5_5_dBm; uint8_t Table_6_0_dBm; uint8_t Table_6_5_dBm; uint8_t Table_7_0_dBm; uint8_t Table_7_5_dBm; uint8_t Table_8_0_dBm; uint8_t Table_8_5_dBm; uint8_t Table_9_0_dBm; uint8_t Table_9_5_dBm; uint8_t Table_10_0_dBm; uint8_t Table_10_5_dBm; uint8_t Table_11_0_dBm; uint8_t Table_11_5_dBm; uint8_t Table_12_0_dBm; uint8_t Table_12_5_dBm; uint8_t Table_13_0_dBm; uint8_t Table_13_5_dBm; uint8_t Table_14_0_dBm; uint8_t Table_14_5_dBm; uint8_t Table_15_0_dBm; uint8_t Table_15_5_dBm; uint8_t Table_16_0_dBm; uint8_t Table_16_5_dBm; uint8_t Table_17_0_dBm; uint8_t Table_17_5_dBm; uint8_t Table_18_0_dBm; uint8_t Table_18_5_dBm; uint8_t Table_19_0_dBm; uint8_t Table_19_5_dBm; uint8_t Table_20_0_dBm; uint8_t Table_20_5_dBm; uint8_t Table_21_0_dBm; uint8_t Table_21_5_dBm; uint8_t Table_22_0_dBm; uint8_t Table_22_5_dBm; uint8_t Table_23_0_dBm; uint8_t Table_23_5_dBm; uint8_t Table_24_0_dBm; uint8_t Table_24_5_dBm; uint8_t Table_25_0_dBm; uint8_t Table_25_5_dBm; uint8_t Table_26_0_dBm; uint8_t Table_26_5_dBm; uint8_t Table_27_0_dBm; uint8_t Table_27_5_dBm; uint8_t Table_28_0_dBm; uint8_t Table_28_5_dBm; uint8_t Table_29_0_dBm; uint8_t Table_29_5_dBm; uint8_t Table_30_0_dBm; uint8_t Table_30_5_dBm; uint8_t Table_31_0_dBm; uint8_t Table_31_5_dBm; }ATT_TABLE_st; typedef struct{ uint8_t Table_Det5_dBm_H ; uint8_t Table_Det5_dBm_L ; uint8_t Table_Det4_dBm_H ; uint8_t Table_Det4_dBm_L ; uint8_t Table_Det3_dBm_H ; uint8_t Table_Det3_dBm_L ; uint8_t Table_Det2_dBm_H ; uint8_t Table_Det2_dBm_L ; uint8_t Table_Det1_dBm_H ; uint8_t Table_Det1_dBm_L ; uint8_t Table_Det0_dBm_H ; uint8_t Table_Det0_dBm_L ; uint8_t Table_Det_1_dBm_H ; uint8_t Table_Det_1_dBm_L ; uint8_t Table_Det_2_dBm_H ; uint8_t Table_Det_2_dBm_L ; uint8_t Table_Det_3_dBm_H ; uint8_t Table_Det_3_dBm_L ; uint8_t Table_Det_4_dBm_H ; uint8_t Table_Det_4_dBm_L ; uint8_t Table_Det_5_dBm_H ; uint8_t Table_Det_5_dBm_L ; uint8_t Table_Det_6_dBm_H ; uint8_t Table_Det_6_dBm_L ; uint8_t Table_Det_7_dBm_H ; uint8_t Table_Det_7_dBm_L ; uint8_t Table_Det_8_dBm_H ; uint8_t Table_Det_8_dBm_L ; uint8_t Table_Det_9_dBm_H ; uint8_t Table_Det_9_dBm_L ; uint8_t Table_Det_10_dBm_H ; uint8_t Table_Det_10_dBm_L ; uint8_t Table_Det_11_dBm_H ; uint8_t Table_Det_11_dBm_L ; uint8_t Table_Det_12_dBm_H ; uint8_t Table_Det_12_dBm_L ; uint8_t Table_Det_13_dBm_H ; uint8_t Table_Det_13_dBm_L ; uint8_t Table_Det_14_dBm_H ; uint8_t Table_Det_14_dBm_L ; uint8_t Table_Det_15_dBm_H ; uint8_t Table_Det_15_dBm_L ; uint8_t Table_Det_16_dBm_H ; uint8_t Table_Det_16_dBm_L ; uint8_t Table_Det_17_dBm_H ; uint8_t Table_Det_17_dBm_L ; uint8_t Table_Det_18_dBm_H ; uint8_t Table_Det_18_dBm_L ; uint8_t Table_Det_19_dBm_H ; uint8_t Table_Det_19_dBm_L ; uint8_t Table_Det_20_dBm_H ; uint8_t Table_Det_20_dBm_L ; uint8_t Table_Det_21_dBm_H ; uint8_t Table_Det_21_dBm_L ; uint8_t Table_Det_22_dBm_H ; uint8_t Table_Det_22_dBm_L ; uint8_t Table_Det_23_dBm_H ; uint8_t Table_Det_23_dBm_L ; uint8_t Table_Det_24_dBm_H ; uint8_t Table_Det_24_dBm_L ; uint8_t Table_Det_25_dBm_H ; uint8_t Table_Det_25_dBm_L ; }DET_TABLEDL_st; typedef struct{ uint8_t Table_Det_15_dBm_H ; uint8_t Table_Det_15_dBm_L ; uint8_t Table_Det_16_dBm_H ; uint8_t Table_Det_16_dBm_L ; uint8_t Table_Det_17_dBm_H ; uint8_t Table_Det_17_dBm_L ; uint8_t Table_Det_18_dBm_H ; uint8_t Table_Det_18_dBm_L ; uint8_t Table_Det_19_dBm_H ; uint8_t Table_Det_19_dBm_L ; uint8_t Table_Det_20_dBm_H ;//1.8 uint8_t Table_Det_20_dBm_L ;//1.6 uint8_t Table_Det_21_dBm_H ;//1.4 uint8_t Table_Det_21_dBm_L ; uint8_t Table_Det_22_dBm_H ; uint8_t Table_Det_22_dBm_L ; uint8_t Table_Det_23_dBm_H ; uint8_t Table_Det_23_dBm_L ; uint8_t Table_Det_24_dBm_H ; uint8_t Table_Det_24_dBm_L ; uint8_t Table_Det_25_dBm_H ; uint8_t Table_Det_25_dBm_L ; uint8_t Table_Det_26_dBm_H ; uint8_t Table_Det_26_dBm_L ; uint8_t Table_Det_27_dBm_H ; uint8_t Table_Det_27_dBm_L ; uint8_t Table_Det_28_dBm_H ; uint8_t Table_Det_28_dBm_L ; uint8_t Table_Det_29_dBm_H ; uint8_t Table_Det_29_dBm_L ; uint8_t Table_Det_30_dBm_H ; uint8_t Table_Det_30_dBm_L ; uint8_t Table_Det_31_dBm_H ; uint8_t Table_Det_31_dBm_L ; uint8_t Table_Det_32_dBm_H ; uint8_t Table_Det_32_dBm_L ; uint8_t Table_Det_33_dBm_H ; uint8_t Table_Det_33_dBm_L ; uint8_t Table_Det_34_dBm_H ; uint8_t Table_Det_34_dBm_L ; uint8_t Table_Det_35_dBm_H ; uint8_t Table_Det_35_dBm_L ; uint8_t Table_Det_36_dBm_H ; uint8_t Table_Det_36_dBm_L ; uint8_t Table_Det_37_dBm_H ; uint8_t Table_Det_37_dBm_L ; uint8_t Table_Det_38_dBm_H ; uint8_t Table_Det_38_dBm_L ; uint8_t Table_Det_39_dBm_H ; uint8_t Table_Det_39_dBm_L ; uint8_t Table_Det_40_dBm_H ; uint8_t Table_Det_40_dBm_L ; uint8_t Table_Det_41_dBm_H ; uint8_t Table_Det_41_dBm_L ; uint8_t Table_Det_42_dBm_H ; uint8_t Table_Det_42_dBm_L ; uint8_t Table_Det_43_dBm_H ; uint8_t Table_Det_43_dBm_L ; uint8_t Table_Det_44_dBm_H ; uint8_t Table_Det_44_dBm_L ; uint8_t Table_Det_45_dBm_H ; uint8_t Table_Det_45_dBm_L ; uint8_t Table_Det_46_dBm_H ; uint8_t Table_Det_46_dBm_L ; uint8_t Table_Det_47_dBm_H ; uint8_t Table_Det_47_dBm_L ; uint8_t Table_Det_48_dBm_H ; uint8_t Table_Det_48_dBm_L ; uint8_t Table_Det_49_dBm_H ; uint8_t Table_Det_49_dBm_L ; uint8_t Table_Det_50_dBm_H ; uint8_t Table_Det_50_dBm_L ; uint8_t Table_Det_51_dBm_H ; uint8_t Table_Det_51_dBm_L ; uint8_t Table_Det_52_dBm_H ; uint8_t Table_Det_52_dBm_L ; uint8_t Table_Det_53_dBm_H ; uint8_t Table_Det_53_dBm_L ; uint8_t Table_Det_54_dBm_H ; uint8_t Table_Det_54_dBm_L ; uint8_t Table_Det_55_dBm_H ; uint8_t Table_Det_55_dBm_L ; uint8_t Table_Det_56_dBm_H ; uint8_t Table_Det_56_dBm_L ; uint8_t Table_Det_57_dBm_H ; uint8_t Table_Det_57_dBm_L ; uint8_t Table_Det_58_dBm_H ; uint8_t Table_Det_58_dBm_L ; uint8_t Table_Det_59_dBm_H ; uint8_t Table_Det_59_dBm_L ; uint8_t Table_Det_60_dBm_H ; uint8_t Table_Det_60_dBm_L ; }DET_TABLEUL_st; typedef struct{ uint8_t Table_10_Temp_H; uint8_t Table_10_Temp_L; uint8_t Table_15_Temp_H; uint8_t Table_15_Temp_L; uint8_t Table_20_Temp_H; uint8_t Table_20_Temp_L; uint8_t Table_25_Temp_H; uint8_t Table_25_Temp_L; uint8_t Table_30_Temp_H; uint8_t Table_30_Temp_L; uint8_t Table_35_Temp_H; uint8_t Table_35_Temp_L; uint8_t Table_40_Temp_H; uint8_t Table_40_Temp_L; uint8_t Table_45_Temp_H; uint8_t Table_45_Temp_L; uint8_t Table_50_Temp_H; uint8_t Table_50_Temp_L; uint8_t Table_55_Temp_H; uint8_t Table_55_Temp_L; }TEMP_TABLE_st; typedef enum{ Bluecell_DET_UL1_ADC_INDEX_H = 0, Bluecell_DET_UL1_ADC_INDEX_L, Bluecell_DET_UL2_ADC_INDEX_H, Bluecell_DET_UL2_ADC_INDEX_L, Bluecell_DET_UL3_ADC_INDEX_H, Bluecell_DET_UL3_ADC_INDEX_L, Bluecell_RFU_TEMP_ADC_INDEX_H, Bluecell_RFU_TEMP_ADC_INDEX_L, Bluecell_ADC1_MaxLength, }Bluecell_ADC1_Index; typedef enum{ Bluecell_DET_UL4_ADC_INDEX_H = Bluecell_ADC1_MaxLength, Bluecell_DET_UL4_ADC_INDEX_L, Bluecell_DET_DL1_ADC_INDEX_H, Bluecell_DET_DL1_ADC_INDEX_L, Bluecell_DET_DL2_ADC_INDEX_H, Bluecell_DET_DL2_ADC_INDEX_L, Bluecell_DET_DL3_ADC_INDEX_H, Bluecell_DET_DL3_ADC_INDEX_L, Bluecell_DET_DL4_ADC_INDEX_H, Bluecell_DET_DL4_ADC_INDEX_L, Bluecell_ADC3_MaxLength, }Bluecell_ADC3_Index; typedef enum{ DET_Alarm_DL1_Index = 0, DET_Alarm_DL2_Index, DET_Alarm_DL3_Index, DET_Alarm_DL4_Index, DET_Alarm_DL_Index_MAX, }; typedef enum{ DET_Alarm_UL1_Index = 0, DET_Alarm_UL2_Index, DET_Alarm_UL3_Index, DET_Alarm_UL4_Index, DET_Alarm_UL_Index_MAX, }; typedef enum{ DET_Alarm_DL1_Shutdown_Index = 0, DET_Alarm_DL2_Shutdown_Index, DET_Alarm_DL3_Shutdown_Index, DET_Alarm_DL4_Shutdown_Index, DET_Alarm_DL_Shutdown_Index_MAX, }; typedef enum{ DET_Alarm_UL1_Shutdown_Index = 0, DET_Alarm_UL2_Shutdown_Index, DET_Alarm_UL3_Shutdown_Index, DET_Alarm_UL4_Shutdown_Index, DET_Alarm_UL_Shutdown_Index_MAX, }; #define ADC1_EA Bluecell_ADC1_MaxLength /2 #define ADC3_EA Bluecell_ADC3_MaxLength /2 extern ATT_TABLE_st Att_DL1; extern ATT_TABLE_st Att_DL2; extern ATT_TABLE_st Att_DL3; extern ATT_TABLE_st Att_DL4; extern ATT_TABLE_st Att_UL1; extern ATT_TABLE_st Att_UL2; extern ATT_TABLE_st Att_UL3; extern ATT_TABLE_st Att_UL4; extern DET_TABLEDL_st Det_DL1; extern DET_TABLEDL_st Det_DL2; extern DET_TABLEDL_st Det_DL3; extern DET_TABLEDL_st Det_DL4; extern DET_TABLEUL_st Det_UL1; extern DET_TABLEUL_st Det_UL2; extern DET_TABLEUL_st Det_UL3; extern DET_TABLEUL_st Det_UL4; extern TEMP_TABLE_st Temp_DL1; extern TEMP_TABLE_st Temp_DL2; extern TEMP_TABLE_st Temp_DL3; extern TEMP_TABLE_st Temp_DL4; extern TEMP_TABLE_st Temp_UL1; extern TEMP_TABLE_st Temp_UL2; extern TEMP_TABLE_st Temp_UL3; extern TEMP_TABLE_st Temp_UL4; extern BLUESTATUS_st bluecell_Currdatastatus; extern volatile uint32_t ALCTimerCnt; extern volatile uint32_t AGCTimerCnt; extern void Bluecell_DataInit(); extern void ALC_Function(); extern void AGC_Function(); #endif /* BLUECELL_OPERATE_H_ */