STM32F103_ATTEN_PLL_Zig.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00002f64 080001e4 080001e4 000101e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000128 08003148 08003148 00013148 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08003270 08003270 00013270 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 08003274 08003274 00013274 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000074 20000000 08003278 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00001560 20000078 080032ec 00020078 2**3 ALLOC 7 ._user_heap_stack 00000600 200015d8 080032ec 000215d8 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00020074 2**0 CONTENTS, READONLY 9 .debug_info 00019110 00000000 00000000 0002009d 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 000037b5 00000000 00000000 000391ad 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 000075a9 00000000 00000000 0003c962 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000af0 00000000 00000000 00043f10 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 00000e40 00000000 00000000 00044a00 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00006ccc 00000000 00000000 00045840 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004068 00000000 00000000 0004c50c 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 00050574 2**0 CONTENTS, READONLY 17 .debug_frame 00002634 00000000 00000000 000505f0 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001e4 <__do_global_dtors_aux>: 80001e4: b510 push {r4, lr} 80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>) 80001e8: 7823 ldrb r3, [r4, #0] 80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16> 80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>) 80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12> 80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>) 80001f2: f3af 8000 nop.w 80001f6: 2301 movs r3, #1 80001f8: 7023 strb r3, [r4, #0] 80001fa: bd10 pop {r4, pc} 80001fc: 20000078 .word 0x20000078 8000200: 00000000 .word 0x00000000 8000204: 08003130 .word 0x08003130 08000208 : 8000208: b508 push {r3, lr} 800020a: 4b03 ldr r3, [pc, #12] ; (8000218 ) 800020c: b11b cbz r3, 8000216 800020e: 4903 ldr r1, [pc, #12] ; (800021c ) 8000210: 4803 ldr r0, [pc, #12] ; (8000220 ) 8000212: f3af 8000 nop.w 8000216: bd08 pop {r3, pc} 8000218: 00000000 .word 0x00000000 800021c: 2000007c .word 0x2000007c 8000220: 08003130 .word 0x08003130 08000224 <__aeabi_llsr>: 8000224: 40d0 lsrs r0, r2 8000226: 1c0b adds r3, r1, #0 8000228: 40d1 lsrs r1, r2 800022a: 469c mov ip, r3 800022c: 3a20 subs r2, #32 800022e: 40d3 lsrs r3, r2 8000230: 4318 orrs r0, r3 8000232: 4252 negs r2, r2 8000234: 4663 mov r3, ip 8000236: 4093 lsls r3, r2 8000238: 4318 orrs r0, r3 800023a: 4770 bx lr 0800023c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800023c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800023e: 4b0e ldr r3, [pc, #56] ; (8000278 ) { 8000240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000242: 7818 ldrb r0, [r3, #0] 8000244: f44f 737a mov.w r3, #1000 ; 0x3e8 8000248: fbb3 f3f0 udiv r3, r3, r0 800024c: 4a0b ldr r2, [pc, #44] ; (800027c ) 800024e: 6810 ldr r0, [r2, #0] 8000250: fbb0 f0f3 udiv r0, r0, r3 8000254: f000 f89e bl 8000394 8000258: 4604 mov r4, r0 800025a: b958 cbnz r0, 8000274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800025c: 2d0f cmp r5, #15 800025e: d809 bhi.n 8000274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000260: 4602 mov r2, r0 8000262: 4629 mov r1, r5 8000264: f04f 30ff mov.w r0, #4294967295 8000268: f000 f854 bl 8000314 uwTickPrio = TickPriority; 800026c: 4b04 ldr r3, [pc, #16] ; (8000280 ) 800026e: 4620 mov r0, r4 8000270: 601d str r5, [r3, #0] 8000272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000276: bd38 pop {r3, r4, r5, pc} 8000278: 20000000 .word 0x20000000 800027c: 2000000c .word 0x2000000c 8000280: 20000004 .word 0x20000004 08000284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000284: 4a07 ldr r2, [pc, #28] ; (80002a4 ) { 8000286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800028a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800028c: f043 0310 orr.w r3, r3, #16 8000290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8000292: f000 f82d bl 80002f0 HAL_InitTick(TICK_INT_PRIORITY); 8000296: 2000 movs r0, #0 8000298: f7ff ffd0 bl 800023c HAL_MspInit(); 800029c: f001 fd56 bl 8001d4c } 80002a0: 2000 movs r0, #0 80002a2: bd08 pop {r3, pc} 80002a4: 40022000 .word 0x40022000 080002a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80002a8: 4a03 ldr r2, [pc, #12] ; (80002b8 ) 80002aa: 4b04 ldr r3, [pc, #16] ; (80002bc ) 80002ac: 6811 ldr r1, [r2, #0] 80002ae: 781b ldrb r3, [r3, #0] 80002b0: 440b add r3, r1 80002b2: 6013 str r3, [r2, #0] 80002b4: 4770 bx lr 80002b6: bf00 nop 80002b8: 200004c8 .word 0x200004c8 80002bc: 20000000 .word 0x20000000 080002c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80002c0: 4b01 ldr r3, [pc, #4] ; (80002c8 ) 80002c2: 6818 ldr r0, [r3, #0] } 80002c4: 4770 bx lr 80002c6: bf00 nop 80002c8: 200004c8 .word 0x200004c8 080002cc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80002cc: b538 push {r3, r4, r5, lr} 80002ce: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 80002d0: f7ff fff6 bl 80002c0 80002d4: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80002d6: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80002d8: bf1e ittt ne 80002da: 4b04 ldrne r3, [pc, #16] ; (80002ec ) 80002dc: 781b ldrbne r3, [r3, #0] 80002de: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80002e0: f7ff ffee bl 80002c0 80002e4: 1b40 subs r0, r0, r5 80002e6: 4284 cmp r4, r0 80002e8: d8fa bhi.n 80002e0 { } } 80002ea: bd38 pop {r3, r4, r5, pc} 80002ec: 20000000 .word 0x20000000 080002f0 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80002f0: 4a07 ldr r2, [pc, #28] ; (8000310 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002f2: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80002f4: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002f6: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80002fa: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80002fe: 041b lsls r3, r3, #16 8000300: 0c1b lsrs r3, r3, #16 8000302: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8000306: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800030a: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 800030c: 60d3 str r3, [r2, #12] 800030e: 4770 bx lr 8000310: e000ed00 .word 0xe000ed00 08000314 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8000314: 4b17 ldr r3, [pc, #92] ; (8000374 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8000316: b530 push {r4, r5, lr} 8000318: 68dc ldr r4, [r3, #12] 800031a: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 800031e: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000322: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000324: 2b04 cmp r3, #4 8000326: bf28 it cs 8000328: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800032a: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800032c: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000330: bf98 it ls 8000332: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000334: fa05 f303 lsl.w r3, r5, r3 8000338: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800033c: bf88 it hi 800033e: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000340: 4019 ands r1, r3 8000342: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000344: fa05 f404 lsl.w r4, r5, r4 8000348: 3c01 subs r4, #1 800034a: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 800034c: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800034e: ea42 0201 orr.w r2, r2, r1 8000352: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000356: bfaf iteee ge 8000358: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800035c: 4b06 ldrlt r3, [pc, #24] ; (8000378 ) 800035e: f000 000f andlt.w r0, r0, #15 8000362: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000364: bfa5 ittet ge 8000366: b2d2 uxtbge r2, r2 8000368: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800036c: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800036e: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8000372: bd30 pop {r4, r5, pc} 8000374: e000ed00 .word 0xe000ed00 8000378: e000ed14 .word 0xe000ed14 0800037c : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 800037c: 2301 movs r3, #1 800037e: 0942 lsrs r2, r0, #5 8000380: f000 001f and.w r0, r0, #31 8000384: fa03 f000 lsl.w r0, r3, r0 8000388: 4b01 ldr r3, [pc, #4] ; (8000390 ) 800038a: f843 0022 str.w r0, [r3, r2, lsl #2] 800038e: 4770 bx lr 8000390: e000e100 .word 0xe000e100 08000394 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000394: 3801 subs r0, #1 8000396: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 800039a: d20a bcs.n 80003b2 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800039c: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800039e: 4b06 ldr r3, [pc, #24] ; (80003b8 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80003a0: 4a06 ldr r2, [pc, #24] ; (80003bc ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80003a2: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80003a4: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80003a8: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80003aa: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80003ac: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80003ae: 601a str r2, [r3, #0] 80003b0: 4770 bx lr return (1UL); /* Reload value impossible */ 80003b2: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80003b4: 4770 bx lr 80003b6: bf00 nop 80003b8: e000e010 .word 0xe000e010 80003bc: e000ed00 .word 0xe000ed00 080003c0 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 80003c0: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 80003c2: 2800 cmp r0, #0 80003c4: d032 beq.n 800042c assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80003c6: 6801 ldr r1, [r0, #0] 80003c8: 4b19 ldr r3, [pc, #100] ; (8000430 ) 80003ca: 2414 movs r4, #20 80003cc: 4299 cmp r1, r3 80003ce: d825 bhi.n 800041c { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003d0: 4a18 ldr r2, [pc, #96] ; (8000434 ) hdma->DmaBaseAddress = DMA1; 80003d2: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003d6: 440a add r2, r1 80003d8: fbb2 f2f4 udiv r2, r2, r4 80003dc: 0092 lsls r2, r2, #2 80003de: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80003e0: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80003e2: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80003e4: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80003e6: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80003e8: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003ea: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003ec: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003f0: 4323 orrs r3, r4 80003f2: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003f4: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003f8: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80003fa: 6944 ldr r4, [r0, #20] 80003fc: 4323 orrs r3, r4 80003fe: 6984 ldr r4, [r0, #24] 8000400: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 8000402: 69c4 ldr r4, [r0, #28] 8000404: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 8000406: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8000408: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 800040a: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 800040c: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 800040e: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000412: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8000414: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 8000418: 4618 mov r0, r3 800041a: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 800041c: 4b06 ldr r3, [pc, #24] ; (8000438 ) 800041e: 440b add r3, r1 8000420: fbb3 f3f4 udiv r3, r3, r4 8000424: 009b lsls r3, r3, #2 8000426: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8000428: 4b04 ldr r3, [pc, #16] ; (800043c ) 800042a: e7d9 b.n 80003e0 return HAL_ERROR; 800042c: 2001 movs r0, #1 } 800042e: bd10 pop {r4, pc} 8000430: 40020407 .word 0x40020407 8000434: bffdfff8 .word 0xbffdfff8 8000438: bffdfbf8 .word 0xbffdfbf8 800043c: 40020400 .word 0x40020400 08000440 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8000440: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8000442: f890 4020 ldrb.w r4, [r0, #32] 8000446: 2c01 cmp r4, #1 8000448: d035 beq.n 80004b6 800044a: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 800044c: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 8000450: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8000454: 42a5 cmp r5, r4 8000456: f04f 0600 mov.w r6, #0 800045a: f04f 0402 mov.w r4, #2 800045e: d128 bne.n 80004b2 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8000460: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8000464: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000466: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8000468: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800046a: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 800046c: f026 0601 bic.w r6, r6, #1 8000470: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000472: 6bc6 ldr r6, [r0, #60] ; 0x3c 8000474: 40bd lsls r5, r7 8000476: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8000478: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 800047a: 6843 ldr r3, [r0, #4] 800047c: 6805 ldr r5, [r0, #0] 800047e: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 8000480: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8000482: bf0b itete eq 8000484: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 8000486: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8000488: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 800048a: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 800048c: b14b cbz r3, 80004a2 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800048e: 6823 ldr r3, [r4, #0] 8000490: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000494: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 8000496: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8000498: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 800049a: f043 0301 orr.w r3, r3, #1 800049e: 602b str r3, [r5, #0] 80004a0: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 80004a2: 6823 ldr r3, [r4, #0] 80004a4: f023 0304 bic.w r3, r3, #4 80004a8: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 80004aa: 6823 ldr r3, [r4, #0] 80004ac: f043 030a orr.w r3, r3, #10 80004b0: e7f0 b.n 8000494 __HAL_UNLOCK(hdma); 80004b2: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 80004b6: 2002 movs r0, #2 } 80004b8: bdf0 pop {r4, r5, r6, r7, pc} ... 080004bc : if(HAL_DMA_STATE_BUSY != hdma->State) 80004bc: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80004c0: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80004c2: 2b02 cmp r3, #2 80004c4: d003 beq.n 80004ce hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80004c6: 2304 movs r3, #4 80004c8: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80004ca: 2001 movs r0, #1 80004cc: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80004ce: 6803 ldr r3, [r0, #0] 80004d0: 681a ldr r2, [r3, #0] 80004d2: f022 020e bic.w r2, r2, #14 80004d6: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80004d8: 681a ldr r2, [r3, #0] 80004da: f022 0201 bic.w r2, r2, #1 80004de: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004e0: 4a29 ldr r2, [pc, #164] ; (8000588 ) 80004e2: 4293 cmp r3, r2 80004e4: d924 bls.n 8000530 80004e6: f502 7262 add.w r2, r2, #904 ; 0x388 80004ea: 4293 cmp r3, r2 80004ec: d019 beq.n 8000522 80004ee: 3214 adds r2, #20 80004f0: 4293 cmp r3, r2 80004f2: d018 beq.n 8000526 80004f4: 3214 adds r2, #20 80004f6: 4293 cmp r3, r2 80004f8: d017 beq.n 800052a 80004fa: 3214 adds r2, #20 80004fc: 4293 cmp r3, r2 80004fe: bf0c ite eq 8000500: f44f 5380 moveq.w r3, #4096 ; 0x1000 8000504: f44f 3380 movne.w r3, #65536 ; 0x10000 8000508: 4a20 ldr r2, [pc, #128] ; (800058c ) 800050a: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 800050c: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 800050e: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 8000510: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 8000514: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 8000516: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 800051a: b39b cbz r3, 8000584 hdma->XferAbortCallback(hdma); 800051c: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 800051e: 4620 mov r0, r4 8000520: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8000522: 2301 movs r3, #1 8000524: e7f0 b.n 8000508 8000526: 2310 movs r3, #16 8000528: e7ee b.n 8000508 800052a: f44f 7380 mov.w r3, #256 ; 0x100 800052e: e7eb b.n 8000508 8000530: 4917 ldr r1, [pc, #92] ; (8000590 ) 8000532: 428b cmp r3, r1 8000534: d016 beq.n 8000564 8000536: 3114 adds r1, #20 8000538: 428b cmp r3, r1 800053a: d015 beq.n 8000568 800053c: 3114 adds r1, #20 800053e: 428b cmp r3, r1 8000540: d014 beq.n 800056c 8000542: 3114 adds r1, #20 8000544: 428b cmp r3, r1 8000546: d014 beq.n 8000572 8000548: 3114 adds r1, #20 800054a: 428b cmp r3, r1 800054c: d014 beq.n 8000578 800054e: 3114 adds r1, #20 8000550: 428b cmp r3, r1 8000552: d014 beq.n 800057e 8000554: 4293 cmp r3, r2 8000556: bf14 ite ne 8000558: f44f 3380 movne.w r3, #65536 ; 0x10000 800055c: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 8000560: 4a0c ldr r2, [pc, #48] ; (8000594 ) 8000562: e7d2 b.n 800050a 8000564: 2301 movs r3, #1 8000566: e7fb b.n 8000560 8000568: 2310 movs r3, #16 800056a: e7f9 b.n 8000560 800056c: f44f 7380 mov.w r3, #256 ; 0x100 8000570: e7f6 b.n 8000560 8000572: f44f 5380 mov.w r3, #4096 ; 0x1000 8000576: e7f3 b.n 8000560 8000578: f44f 3380 mov.w r3, #65536 ; 0x10000 800057c: e7f0 b.n 8000560 800057e: f44f 1380 mov.w r3, #1048576 ; 0x100000 8000582: e7ed b.n 8000560 HAL_StatusTypeDef status = HAL_OK; 8000584: 4618 mov r0, r3 } 8000586: bd10 pop {r4, pc} 8000588: 40020080 .word 0x40020080 800058c: 40020400 .word 0x40020400 8000590: 40020008 .word 0x40020008 8000594: 40020000 .word 0x40020000 08000598 : { 8000598: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800059a: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 800059c: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800059e: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 80005a0: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 80005a2: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80005a4: 4095 lsls r5, r2 80005a6: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 80005a8: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 80005aa: d055 beq.n 8000658 80005ac: 074d lsls r5, r1, #29 80005ae: d553 bpl.n 8000658 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 80005b0: 681a ldr r2, [r3, #0] 80005b2: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 80005b4: bf5e ittt pl 80005b6: 681a ldrpl r2, [r3, #0] 80005b8: f022 0204 bicpl.w r2, r2, #4 80005bc: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005be: 4a60 ldr r2, [pc, #384] ; (8000740 ) 80005c0: 4293 cmp r3, r2 80005c2: d91f bls.n 8000604 80005c4: f502 7262 add.w r2, r2, #904 ; 0x388 80005c8: 4293 cmp r3, r2 80005ca: d014 beq.n 80005f6 80005cc: 3214 adds r2, #20 80005ce: 4293 cmp r3, r2 80005d0: d013 beq.n 80005fa 80005d2: 3214 adds r2, #20 80005d4: 4293 cmp r3, r2 80005d6: d012 beq.n 80005fe 80005d8: 3214 adds r2, #20 80005da: 4293 cmp r3, r2 80005dc: bf0c ite eq 80005de: f44f 4380 moveq.w r3, #16384 ; 0x4000 80005e2: f44f 2380 movne.w r3, #262144 ; 0x40000 80005e6: 4a57 ldr r2, [pc, #348] ; (8000744 ) 80005e8: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80005ea: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80005ec: 2b00 cmp r3, #0 80005ee: f000 80a5 beq.w 800073c } 80005f2: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80005f4: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005f6: 2304 movs r3, #4 80005f8: e7f5 b.n 80005e6 80005fa: 2340 movs r3, #64 ; 0x40 80005fc: e7f3 b.n 80005e6 80005fe: f44f 6380 mov.w r3, #1024 ; 0x400 8000602: e7f0 b.n 80005e6 8000604: 4950 ldr r1, [pc, #320] ; (8000748 ) 8000606: 428b cmp r3, r1 8000608: d016 beq.n 8000638 800060a: 3114 adds r1, #20 800060c: 428b cmp r3, r1 800060e: d015 beq.n 800063c 8000610: 3114 adds r1, #20 8000612: 428b cmp r3, r1 8000614: d014 beq.n 8000640 8000616: 3114 adds r1, #20 8000618: 428b cmp r3, r1 800061a: d014 beq.n 8000646 800061c: 3114 adds r1, #20 800061e: 428b cmp r3, r1 8000620: d014 beq.n 800064c 8000622: 3114 adds r1, #20 8000624: 428b cmp r3, r1 8000626: d014 beq.n 8000652 8000628: 4293 cmp r3, r2 800062a: bf14 ite ne 800062c: f44f 2380 movne.w r3, #262144 ; 0x40000 8000630: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8000634: 4a45 ldr r2, [pc, #276] ; (800074c ) 8000636: e7d7 b.n 80005e8 8000638: 2304 movs r3, #4 800063a: e7fb b.n 8000634 800063c: 2340 movs r3, #64 ; 0x40 800063e: e7f9 b.n 8000634 8000640: f44f 6380 mov.w r3, #1024 ; 0x400 8000644: e7f6 b.n 8000634 8000646: f44f 4380 mov.w r3, #16384 ; 0x4000 800064a: e7f3 b.n 8000634 800064c: f44f 2380 mov.w r3, #262144 ; 0x40000 8000650: e7f0 b.n 8000634 8000652: f44f 0380 mov.w r3, #4194304 ; 0x400000 8000656: e7ed b.n 8000634 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8000658: 2502 movs r5, #2 800065a: 4095 lsls r5, r2 800065c: 4225 tst r5, r4 800065e: d057 beq.n 8000710 8000660: 078d lsls r5, r1, #30 8000662: d555 bpl.n 8000710 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000664: 681a ldr r2, [r3, #0] 8000666: 0694 lsls r4, r2, #26 8000668: d406 bmi.n 8000678 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 800066a: 681a ldr r2, [r3, #0] 800066c: f022 020a bic.w r2, r2, #10 8000670: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 8000672: 2201 movs r2, #1 8000674: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8000678: 4a31 ldr r2, [pc, #196] ; (8000740 ) 800067a: 4293 cmp r3, r2 800067c: d91e bls.n 80006bc 800067e: f502 7262 add.w r2, r2, #904 ; 0x388 8000682: 4293 cmp r3, r2 8000684: d013 beq.n 80006ae 8000686: 3214 adds r2, #20 8000688: 4293 cmp r3, r2 800068a: d012 beq.n 80006b2 800068c: 3214 adds r2, #20 800068e: 4293 cmp r3, r2 8000690: d011 beq.n 80006b6 8000692: 3214 adds r2, #20 8000694: 4293 cmp r3, r2 8000696: bf0c ite eq 8000698: f44f 5300 moveq.w r3, #8192 ; 0x2000 800069c: f44f 3300 movne.w r3, #131072 ; 0x20000 80006a0: 4a28 ldr r2, [pc, #160] ; (8000744 ) 80006a2: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 80006a4: 2300 movs r3, #0 80006a6: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 80006aa: 6a83 ldr r3, [r0, #40] ; 0x28 80006ac: e79e b.n 80005ec __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 80006ae: 2302 movs r3, #2 80006b0: e7f6 b.n 80006a0 80006b2: 2320 movs r3, #32 80006b4: e7f4 b.n 80006a0 80006b6: f44f 7300 mov.w r3, #512 ; 0x200 80006ba: e7f1 b.n 80006a0 80006bc: 4922 ldr r1, [pc, #136] ; (8000748 ) 80006be: 428b cmp r3, r1 80006c0: d016 beq.n 80006f0 80006c2: 3114 adds r1, #20 80006c4: 428b cmp r3, r1 80006c6: d015 beq.n 80006f4 80006c8: 3114 adds r1, #20 80006ca: 428b cmp r3, r1 80006cc: d014 beq.n 80006f8 80006ce: 3114 adds r1, #20 80006d0: 428b cmp r3, r1 80006d2: d014 beq.n 80006fe 80006d4: 3114 adds r1, #20 80006d6: 428b cmp r3, r1 80006d8: d014 beq.n 8000704 80006da: 3114 adds r1, #20 80006dc: 428b cmp r3, r1 80006de: d014 beq.n 800070a 80006e0: 4293 cmp r3, r2 80006e2: bf14 ite ne 80006e4: f44f 3300 movne.w r3, #131072 ; 0x20000 80006e8: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80006ec: 4a17 ldr r2, [pc, #92] ; (800074c ) 80006ee: e7d8 b.n 80006a2 80006f0: 2302 movs r3, #2 80006f2: e7fb b.n 80006ec 80006f4: 2320 movs r3, #32 80006f6: e7f9 b.n 80006ec 80006f8: f44f 7300 mov.w r3, #512 ; 0x200 80006fc: e7f6 b.n 80006ec 80006fe: f44f 5300 mov.w r3, #8192 ; 0x2000 8000702: e7f3 b.n 80006ec 8000704: f44f 3300 mov.w r3, #131072 ; 0x20000 8000708: e7f0 b.n 80006ec 800070a: f44f 1300 mov.w r3, #2097152 ; 0x200000 800070e: e7ed b.n 80006ec else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8000710: 2508 movs r5, #8 8000712: 4095 lsls r5, r2 8000714: 4225 tst r5, r4 8000716: d011 beq.n 800073c 8000718: 0709 lsls r1, r1, #28 800071a: d50f bpl.n 800073c __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800071c: 6819 ldr r1, [r3, #0] 800071e: f021 010e bic.w r1, r1, #14 8000722: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000724: 2301 movs r3, #1 8000726: fa03 f202 lsl.w r2, r3, r2 800072a: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 800072c: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 800072e: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 8000732: 2300 movs r3, #0 8000734: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8000738: 6b03 ldr r3, [r0, #48] ; 0x30 800073a: e757 b.n 80005ec } 800073c: bc70 pop {r4, r5, r6} 800073e: 4770 bx lr 8000740: 40020080 .word 0x40020080 8000744: 40020400 .word 0x40020400 8000748: 40020008 .word 0x40020008 800074c: 40020000 .word 0x40020000 08000750 : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 8000750: 4a11 ldr r2, [pc, #68] ; (8000798 ) 8000752: 68d3 ldr r3, [r2, #12] 8000754: f013 0310 ands.w r3, r3, #16 8000758: d005 beq.n 8000766 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 800075a: 4910 ldr r1, [pc, #64] ; (800079c ) 800075c: 69cb ldr r3, [r1, #28] 800075e: f043 0302 orr.w r3, r3, #2 8000762: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8000764: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000766: 68d2 ldr r2, [r2, #12] 8000768: 0750 lsls r0, r2, #29 800076a: d506 bpl.n 800077a #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800076c: 490b ldr r1, [pc, #44] ; (800079c ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 800076e: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000772: 69ca ldr r2, [r1, #28] 8000774: f042 0201 orr.w r2, r2, #1 8000778: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 800077a: 4a07 ldr r2, [pc, #28] ; (8000798 ) 800077c: 69d1 ldr r1, [r2, #28] 800077e: 07c9 lsls r1, r1, #31 8000780: d508 bpl.n 8000794 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 8000782: 4806 ldr r0, [pc, #24] ; (800079c ) 8000784: 69c1 ldr r1, [r0, #28] 8000786: f041 0104 orr.w r1, r1, #4 800078a: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 800078c: 69d1 ldr r1, [r2, #28] 800078e: f021 0101 bic.w r1, r1, #1 8000792: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8000794: 60d3 str r3, [r2, #12] 8000796: 4770 bx lr 8000798: 40022000 .word 0x40022000 800079c: 200004d0 .word 0x200004d0 080007a0 : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80007a0: 4b06 ldr r3, [pc, #24] ; (80007bc ) 80007a2: 6918 ldr r0, [r3, #16] 80007a4: f010 0080 ands.w r0, r0, #128 ; 0x80 80007a8: d007 beq.n 80007ba WRITE_REG(FLASH->KEYR, FLASH_KEY1); 80007aa: 4a05 ldr r2, [pc, #20] ; (80007c0 ) 80007ac: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 80007ae: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 80007b2: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80007b4: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 80007b6: f3c0 10c0 ubfx r0, r0, #7, #1 } 80007ba: 4770 bx lr 80007bc: 40022000 .word 0x40022000 80007c0: 45670123 .word 0x45670123 080007c4 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007c4: 4a03 ldr r2, [pc, #12] ; (80007d4 ) } 80007c6: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007c8: 6913 ldr r3, [r2, #16] 80007ca: f043 0380 orr.w r3, r3, #128 ; 0x80 80007ce: 6113 str r3, [r2, #16] } 80007d0: 4770 bx lr 80007d2: bf00 nop 80007d4: 40022000 .word 0x40022000 080007d8 : { 80007d8: b5f8 push {r3, r4, r5, r6, r7, lr} 80007da: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 80007dc: f7ff fd70 bl 80002c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007e0: 4c11 ldr r4, [pc, #68] ; (8000828 ) uint32_t tickstart = HAL_GetTick(); 80007e2: 4607 mov r7, r0 80007e4: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007e6: 68e3 ldr r3, [r4, #12] 80007e8: 07d8 lsls r0, r3, #31 80007ea: d412 bmi.n 8000812 if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 80007ec: 68e3 ldr r3, [r4, #12] 80007ee: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 80007f0: bf44 itt mi 80007f2: 2320 movmi r3, #32 80007f4: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007f6: 68eb ldr r3, [r5, #12] 80007f8: 06da lsls r2, r3, #27 80007fa: d406 bmi.n 800080a __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007fc: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007fe: 07db lsls r3, r3, #31 8000800: d403 bmi.n 800080a __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000802: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8000804: f010 0004 ands.w r0, r0, #4 8000808: d002 beq.n 8000810 FLASH_SetErrorCode(); 800080a: f7ff ffa1 bl 8000750 return HAL_ERROR; 800080e: 2001 movs r0, #1 } 8000810: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 8000812: 1c73 adds r3, r6, #1 8000814: d0e7 beq.n 80007e6 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8000816: b90e cbnz r6, 800081c return HAL_TIMEOUT; 8000818: 2003 movs r0, #3 800081a: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 800081c: f7ff fd50 bl 80002c0 8000820: 1bc0 subs r0, r0, r7 8000822: 4286 cmp r6, r0 8000824: d2df bcs.n 80007e6 8000826: e7f7 b.n 8000818 8000828: 40022000 .word 0x40022000 0800082c : { 800082c: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 8000830: 4c1f ldr r4, [pc, #124] ; (80008b0 ) { 8000832: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8000834: 7e23 ldrb r3, [r4, #24] { 8000836: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8000838: 2b01 cmp r3, #1 { 800083a: 460f mov r7, r1 800083c: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800083e: d033 beq.n 80008a8 8000840: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000842: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8000846: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000848: f7ff ffc6 bl 80007d8 if(status == HAL_OK) 800084c: bb40 cbnz r0, 80008a0 if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800084e: 2d01 cmp r5, #1 8000850: d003 beq.n 800085a nbiterations = 4U; 8000852: 2d02 cmp r5, #2 8000854: bf0c ite eq 8000856: 2502 moveq r5, #2 8000858: 2504 movne r5, #4 800085a: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 800085c: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 800085e: f8df b054 ldr.w fp, [pc, #84] ; 80008b4 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000862: 0132 lsls r2, r6, #4 8000864: 4640 mov r0, r8 8000866: 4649 mov r1, r9 8000868: f7ff fcdc bl 8000224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 800086c: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 8000870: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000874: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 8000876: f043 0301 orr.w r3, r3, #1 800087a: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 800087e: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000882: f24c 3050 movw r0, #50000 ; 0xc350 8000886: f7ff ffa7 bl 80007d8 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 800088a: f8db 3010 ldr.w r3, [fp, #16] 800088e: f023 0301 bic.w r3, r3, #1 8000892: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 8000896: b918 cbnz r0, 80008a0 8000898: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 800089a: b2f3 uxtb r3, r6 800089c: 429d cmp r5, r3 800089e: d8e0 bhi.n 8000862 __HAL_UNLOCK(&pFlash); 80008a0: 2300 movs r3, #0 80008a2: 7623 strb r3, [r4, #24] return status; 80008a4: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 80008a8: 2002 movs r0, #2 } 80008aa: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80008ae: bf00 nop 80008b0: 200004d0 .word 0x200004d0 80008b4: 40022000 .word 0x40022000 080008b8 : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008b8: 2200 movs r2, #0 80008ba: 4b06 ldr r3, [pc, #24] ; (80008d4 ) 80008bc: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 80008be: 4b06 ldr r3, [pc, #24] ; (80008d8 ) 80008c0: 691a ldr r2, [r3, #16] 80008c2: f042 0204 orr.w r2, r2, #4 80008c6: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008c8: 691a ldr r2, [r3, #16] 80008ca: f042 0240 orr.w r2, r2, #64 ; 0x40 80008ce: 611a str r2, [r3, #16] 80008d0: 4770 bx lr 80008d2: bf00 nop 80008d4: 200004d0 .word 0x200004d0 80008d8: 40022000 .word 0x40022000 080008dc : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008dc: 2200 movs r2, #0 80008de: 4b06 ldr r3, [pc, #24] ; (80008f8 ) 80008e0: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 80008e2: 4b06 ldr r3, [pc, #24] ; (80008fc ) 80008e4: 691a ldr r2, [r3, #16] 80008e6: f042 0202 orr.w r2, r2, #2 80008ea: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 80008ec: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008ee: 691a ldr r2, [r3, #16] 80008f0: f042 0240 orr.w r2, r2, #64 ; 0x40 80008f4: 611a str r2, [r3, #16] 80008f6: 4770 bx lr 80008f8: 200004d0 .word 0x200004d0 80008fc: 40022000 .word 0x40022000 08000900 : { 8000900: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 8000904: 4d23 ldr r5, [pc, #140] ; (8000994 ) { 8000906: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 8000908: 7e2b ldrb r3, [r5, #24] { 800090a: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 800090c: 2b01 cmp r3, #1 800090e: d03d beq.n 800098c 8000910: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000912: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 8000914: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8000916: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000918: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 800091c: d113 bne.n 8000946 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800091e: f7ff ff5b bl 80007d8 8000922: b120 cbz r0, 800092e HAL_StatusTypeDef status = HAL_ERROR; 8000924: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8000926: 2300 movs r3, #0 8000928: 762b strb r3, [r5, #24] return status; 800092a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 800092e: f7ff ffc3 bl 80008b8 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8000932: f24c 3050 movw r0, #50000 ; 0xc350 8000936: f7ff ff4f bl 80007d8 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 800093a: 4a17 ldr r2, [pc, #92] ; (8000998 ) 800093c: 6913 ldr r3, [r2, #16] 800093e: f023 0304 bic.w r3, r3, #4 8000942: 6113 str r3, [r2, #16] 8000944: e7ef b.n 8000926 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000946: f7ff ff47 bl 80007d8 800094a: 2800 cmp r0, #0 800094c: d1ea bne.n 8000924 *PageError = 0xFFFFFFFFU; 800094e: f04f 33ff mov.w r3, #4294967295 8000952: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 8000956: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 8000958: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 800095a: 4c0f ldr r4, [pc, #60] ; (8000998 ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 800095c: 68fa ldr r2, [r7, #12] 800095e: 68bb ldr r3, [r7, #8] 8000960: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 8000964: 429e cmp r6, r3 8000966: d2de bcs.n 8000926 FLASH_PageErase(address); 8000968: 4630 mov r0, r6 800096a: f7ff ffb7 bl 80008dc status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800096e: f24c 3050 movw r0, #50000 ; 0xc350 8000972: f7ff ff31 bl 80007d8 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000976: 6923 ldr r3, [r4, #16] 8000978: f023 0302 bic.w r3, r3, #2 800097c: 6123 str r3, [r4, #16] if (status != HAL_OK) 800097e: b110 cbz r0, 8000986 *PageError = address; 8000980: f8c8 6000 str.w r6, [r8] break; 8000984: e7cf b.n 8000926 address += FLASH_PAGE_SIZE) 8000986: f506 6600 add.w r6, r6, #2048 ; 0x800 800098a: e7e7 b.n 800095c __HAL_LOCK(&pFlash); 800098c: 2002 movs r0, #2 } 800098e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8000992: bf00 nop 8000994: 200004d0 .word 0x200004d0 8000998: 40022000 .word 0x40022000 0800099c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 800099c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 80009a0: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 80009a2: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 80009a4: 4f6c ldr r7, [pc, #432] ; (8000b58 ) 80009a6: 4b6d ldr r3, [pc, #436] ; (8000b5c ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80009a8: f8df e1b8 ldr.w lr, [pc, #440] ; 8000b64 switch (GPIO_Init->Mode) 80009ac: f8df c1b8 ldr.w ip, [pc, #440] ; 8000b68 ioposition = (0x01U << position); 80009b0: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80009b4: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 80009b6: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80009ba: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 80009be: 45a0 cmp r8, r4 80009c0: f040 8085 bne.w 8000ace switch (GPIO_Init->Mode) 80009c4: 684d ldr r5, [r1, #4] 80009c6: 2d12 cmp r5, #18 80009c8: f000 80b7 beq.w 8000b3a 80009cc: f200 808d bhi.w 8000aea 80009d0: 2d02 cmp r5, #2 80009d2: f000 80af beq.w 8000b34 80009d6: f200 8081 bhi.w 8000adc 80009da: 2d00 cmp r5, #0 80009dc: f000 8091 beq.w 8000b02 80009e0: 2d01 cmp r5, #1 80009e2: f000 80a5 beq.w 8000b30 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009e6: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009ea: 2cff cmp r4, #255 ; 0xff 80009ec: bf93 iteet ls 80009ee: 4682 movls sl, r0 80009f0: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 80009f4: 3d08 subhi r5, #8 80009f6: f8d0 b000 ldrls.w fp, [r0] 80009fa: bf92 itee ls 80009fc: 00b5 lslls r5, r6, #2 80009fe: f8d0 b004 ldrhi.w fp, [r0, #4] 8000a02: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000a04: fa09 f805 lsl.w r8, r9, r5 8000a08: ea2b 0808 bic.w r8, fp, r8 8000a0c: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8000a10: bf88 it hi 8000a12: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8000a16: ea48 0505 orr.w r5, r8, r5 8000a1a: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8000a1e: f8d1 a004 ldr.w sl, [r1, #4] 8000a22: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8000a26: d052 beq.n 8000ace __HAL_RCC_AFIO_CLK_ENABLE(); 8000a28: 69bd ldr r5, [r7, #24] 8000a2a: f026 0803 bic.w r8, r6, #3 8000a2e: f045 0501 orr.w r5, r5, #1 8000a32: 61bd str r5, [r7, #24] 8000a34: 69bd ldr r5, [r7, #24] 8000a36: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000a3a: f005 0501 and.w r5, r5, #1 8000a3e: 9501 str r5, [sp, #4] 8000a40: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a44: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a48: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a4a: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8000a4e: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a52: fa09 f90b lsl.w r9, r9, fp 8000a56: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000a5a: 4d41 ldr r5, [pc, #260] ; (8000b60 ) 8000a5c: 42a8 cmp r0, r5 8000a5e: d071 beq.n 8000b44 8000a60: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a64: 42a8 cmp r0, r5 8000a66: d06f beq.n 8000b48 8000a68: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a6c: 42a8 cmp r0, r5 8000a6e: d06d beq.n 8000b4c 8000a70: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a74: 42a8 cmp r0, r5 8000a76: d06b beq.n 8000b50 8000a78: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a7c: 42a8 cmp r0, r5 8000a7e: d069 beq.n 8000b54 8000a80: 4570 cmp r0, lr 8000a82: bf0c ite eq 8000a84: 2505 moveq r5, #5 8000a86: 2506 movne r5, #6 8000a88: fa05 f50b lsl.w r5, r5, fp 8000a8c: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 8000a90: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8000a94: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8000a96: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8000a9a: bf14 ite ne 8000a9c: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8000a9e: 43a5 biceq r5, r4 8000aa0: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 8000aa2: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8000aa4: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8000aa8: bf14 ite ne 8000aaa: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8000aac: 43a5 biceq r5, r4 8000aae: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8000ab0: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8000ab2: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000ab6: bf14 ite ne 8000ab8: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8000aba: 43a5 biceq r5, r4 8000abc: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8000abe: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8000ac0: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8000ac4: bf14 ite ne 8000ac6: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8000ac8: ea25 0404 biceq.w r4, r5, r4 8000acc: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8000ace: 3601 adds r6, #1 8000ad0: 2e10 cmp r6, #16 8000ad2: f47f af6d bne.w 80009b0 } } } } } 8000ad6: b003 add sp, #12 8000ad8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8000adc: 2d03 cmp r5, #3 8000ade: d025 beq.n 8000b2c 8000ae0: 2d11 cmp r5, #17 8000ae2: d180 bne.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8000ae4: 68ca ldr r2, [r1, #12] 8000ae6: 3204 adds r2, #4 break; 8000ae8: e77d b.n 80009e6 switch (GPIO_Init->Mode) 8000aea: 4565 cmp r5, ip 8000aec: d009 beq.n 8000b02 8000aee: d812 bhi.n 8000b16 8000af0: f8df 9078 ldr.w r9, [pc, #120] ; 8000b6c 8000af4: 454d cmp r5, r9 8000af6: d004 beq.n 8000b02 8000af8: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000afc: 454d cmp r5, r9 8000afe: f47f af72 bne.w 80009e6 if (GPIO_Init->Pull == GPIO_NOPULL) 8000b02: 688a ldr r2, [r1, #8] 8000b04: b1e2 cbz r2, 8000b40 else if (GPIO_Init->Pull == GPIO_PULLUP) 8000b06: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8000b08: bf0c ite eq 8000b0a: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8000b0e: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8000b12: 2208 movs r2, #8 8000b14: e767 b.n 80009e6 switch (GPIO_Init->Mode) 8000b16: f8df 9058 ldr.w r9, [pc, #88] ; 8000b70 8000b1a: 454d cmp r5, r9 8000b1c: d0f1 beq.n 8000b02 8000b1e: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000b22: 454d cmp r5, r9 8000b24: d0ed beq.n 8000b02 8000b26: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8000b2a: e7e7 b.n 8000afc config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8000b2c: 2200 movs r2, #0 8000b2e: e75a b.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8000b30: 68ca ldr r2, [r1, #12] break; 8000b32: e758 b.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8000b34: 68ca ldr r2, [r1, #12] 8000b36: 3208 adds r2, #8 break; 8000b38: e755 b.n 80009e6 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8000b3a: 68ca ldr r2, [r1, #12] 8000b3c: 320c adds r2, #12 break; 8000b3e: e752 b.n 80009e6 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8000b40: 2204 movs r2, #4 8000b42: e750 b.n 80009e6 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000b44: 2500 movs r5, #0 8000b46: e79f b.n 8000a88 8000b48: 2501 movs r5, #1 8000b4a: e79d b.n 8000a88 8000b4c: 2502 movs r5, #2 8000b4e: e79b b.n 8000a88 8000b50: 2503 movs r5, #3 8000b52: e799 b.n 8000a88 8000b54: 2504 movs r5, #4 8000b56: e797 b.n 8000a88 8000b58: 40021000 .word 0x40021000 8000b5c: 40010400 .word 0x40010400 8000b60: 40010800 .word 0x40010800 8000b64: 40011c00 .word 0x40011c00 8000b68: 10210000 .word 0x10210000 8000b6c: 10110000 .word 0x10110000 8000b70: 10310000 .word 0x10310000 08000b74 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8000b74: b10a cbz r2, 8000b7a { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8000b76: 6101 str r1, [r0, #16] 8000b78: 4770 bx lr 8000b7a: 0409 lsls r1, r1, #16 8000b7c: e7fb b.n 8000b76 ... 08000b80 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000b80: 6803 ldr r3, [r0, #0] { 8000b82: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000b86: 07db lsls r3, r3, #31 { 8000b88: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000b8a: d410 bmi.n 8000bae } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8000b8c: 682b ldr r3, [r5, #0] 8000b8e: 079f lsls r7, r3, #30 8000b90: d45e bmi.n 8000c50 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8000b92: 682b ldr r3, [r5, #0] 8000b94: 0719 lsls r1, r3, #28 8000b96: f100 8095 bmi.w 8000cc4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8000b9a: 682b ldr r3, [r5, #0] 8000b9c: 075a lsls r2, r3, #29 8000b9e: f100 80bf bmi.w 8000d20 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8000ba2: 69ea ldr r2, [r5, #28] 8000ba4: 2a00 cmp r2, #0 8000ba6: f040 812d bne.w 8000e04 { return HAL_ERROR; } } return HAL_OK; 8000baa: 2000 movs r0, #0 8000bac: e014 b.n 8000bd8 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8000bae: 4c90 ldr r4, [pc, #576] ; (8000df0 ) 8000bb0: 6863 ldr r3, [r4, #4] 8000bb2: f003 030c and.w r3, r3, #12 8000bb6: 2b04 cmp r3, #4 8000bb8: d007 beq.n 8000bca || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8000bba: 6863 ldr r3, [r4, #4] 8000bbc: f003 030c and.w r3, r3, #12 8000bc0: 2b08 cmp r3, #8 8000bc2: d10c bne.n 8000bde 8000bc4: 6863 ldr r3, [r4, #4] 8000bc6: 03de lsls r6, r3, #15 8000bc8: d509 bpl.n 8000bde if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8000bca: 6823 ldr r3, [r4, #0] 8000bcc: 039c lsls r4, r3, #14 8000bce: d5dd bpl.n 8000b8c 8000bd0: 686b ldr r3, [r5, #4] 8000bd2: 2b00 cmp r3, #0 8000bd4: d1da bne.n 8000b8c return HAL_ERROR; 8000bd6: 2001 movs r0, #1 } 8000bd8: b002 add sp, #8 8000bda: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000bde: 686b ldr r3, [r5, #4] 8000be0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000be4: d110 bne.n 8000c08 8000be6: 6823 ldr r3, [r4, #0] 8000be8: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8000bec: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000bee: f7ff fb67 bl 80002c0 8000bf2: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000bf4: 6823 ldr r3, [r4, #0] 8000bf6: 0398 lsls r0, r3, #14 8000bf8: d4c8 bmi.n 8000b8c if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000bfa: f7ff fb61 bl 80002c0 8000bfe: 1b80 subs r0, r0, r6 8000c00: 2864 cmp r0, #100 ; 0x64 8000c02: d9f7 bls.n 8000bf4 return HAL_TIMEOUT; 8000c04: 2003 movs r0, #3 8000c06: e7e7 b.n 8000bd8 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000c08: b99b cbnz r3, 8000c32 8000c0a: 6823 ldr r3, [r4, #0] 8000c0c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000c10: 6023 str r3, [r4, #0] 8000c12: 6823 ldr r3, [r4, #0] 8000c14: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000c18: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000c1a: f7ff fb51 bl 80002c0 8000c1e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8000c20: 6823 ldr r3, [r4, #0] 8000c22: 0399 lsls r1, r3, #14 8000c24: d5b2 bpl.n 8000b8c if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000c26: f7ff fb4b bl 80002c0 8000c2a: 1b80 subs r0, r0, r6 8000c2c: 2864 cmp r0, #100 ; 0x64 8000c2e: d9f7 bls.n 8000c20 8000c30: e7e8 b.n 8000c04 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000c32: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8000c36: 6823 ldr r3, [r4, #0] 8000c38: d103 bne.n 8000c42 8000c3a: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8000c3e: 6023 str r3, [r4, #0] 8000c40: e7d1 b.n 8000be6 8000c42: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000c46: 6023 str r3, [r4, #0] 8000c48: 6823 ldr r3, [r4, #0] 8000c4a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000c4e: e7cd b.n 8000bec if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8000c50: 4c67 ldr r4, [pc, #412] ; (8000df0 ) 8000c52: 6863 ldr r3, [r4, #4] 8000c54: f013 0f0c tst.w r3, #12 8000c58: d007 beq.n 8000c6a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8000c5a: 6863 ldr r3, [r4, #4] 8000c5c: f003 030c and.w r3, r3, #12 8000c60: 2b08 cmp r3, #8 8000c62: d110 bne.n 8000c86 8000c64: 6863 ldr r3, [r4, #4] 8000c66: 03da lsls r2, r3, #15 8000c68: d40d bmi.n 8000c86 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8000c6a: 6823 ldr r3, [r4, #0] 8000c6c: 079b lsls r3, r3, #30 8000c6e: d502 bpl.n 8000c76 8000c70: 692b ldr r3, [r5, #16] 8000c72: 2b01 cmp r3, #1 8000c74: d1af bne.n 8000bd6 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8000c76: 6823 ldr r3, [r4, #0] 8000c78: 696a ldr r2, [r5, #20] 8000c7a: f023 03f8 bic.w r3, r3, #248 ; 0xf8 8000c7e: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000c82: 6023 str r3, [r4, #0] 8000c84: e785 b.n 8000b92 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8000c86: 692a ldr r2, [r5, #16] 8000c88: 4b5a ldr r3, [pc, #360] ; (8000df4 ) 8000c8a: b16a cbz r2, 8000ca8 __HAL_RCC_HSI_ENABLE(); 8000c8c: 2201 movs r2, #1 8000c8e: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000c90: f7ff fb16 bl 80002c0 8000c94: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000c96: 6823 ldr r3, [r4, #0] 8000c98: 079f lsls r7, r3, #30 8000c9a: d4ec bmi.n 8000c76 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000c9c: f7ff fb10 bl 80002c0 8000ca0: 1b80 subs r0, r0, r6 8000ca2: 2802 cmp r0, #2 8000ca4: d9f7 bls.n 8000c96 8000ca6: e7ad b.n 8000c04 __HAL_RCC_HSI_DISABLE(); 8000ca8: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000caa: f7ff fb09 bl 80002c0 8000cae: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8000cb0: 6823 ldr r3, [r4, #0] 8000cb2: 0798 lsls r0, r3, #30 8000cb4: f57f af6d bpl.w 8000b92 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000cb8: f7ff fb02 bl 80002c0 8000cbc: 1b80 subs r0, r0, r6 8000cbe: 2802 cmp r0, #2 8000cc0: d9f6 bls.n 8000cb0 8000cc2: e79f b.n 8000c04 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8000cc4: 69aa ldr r2, [r5, #24] 8000cc6: 4c4a ldr r4, [pc, #296] ; (8000df0 ) 8000cc8: 4b4b ldr r3, [pc, #300] ; (8000df8 ) 8000cca: b1da cbz r2, 8000d04 __HAL_RCC_LSI_ENABLE(); 8000ccc: 2201 movs r2, #1 8000cce: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000cd0: f7ff faf6 bl 80002c0 8000cd4: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8000cd6: 6a63 ldr r3, [r4, #36] ; 0x24 8000cd8: 079b lsls r3, r3, #30 8000cda: d50d bpl.n 8000cf8 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8000cdc: f44f 52fa mov.w r2, #8000 ; 0x1f40 8000ce0: 4b46 ldr r3, [pc, #280] ; (8000dfc ) 8000ce2: 681b ldr r3, [r3, #0] 8000ce4: fbb3 f3f2 udiv r3, r3, r2 8000ce8: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8000cea: bf00 nop do { __NOP(); } while (Delay --); 8000cec: 9b01 ldr r3, [sp, #4] 8000cee: 1e5a subs r2, r3, #1 8000cf0: 9201 str r2, [sp, #4] 8000cf2: 2b00 cmp r3, #0 8000cf4: d1f9 bne.n 8000cea 8000cf6: e750 b.n 8000b9a if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000cf8: f7ff fae2 bl 80002c0 8000cfc: 1b80 subs r0, r0, r6 8000cfe: 2802 cmp r0, #2 8000d00: d9e9 bls.n 8000cd6 8000d02: e77f b.n 8000c04 __HAL_RCC_LSI_DISABLE(); 8000d04: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000d06: f7ff fadb bl 80002c0 8000d0a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8000d0c: 6a63 ldr r3, [r4, #36] ; 0x24 8000d0e: 079f lsls r7, r3, #30 8000d10: f57f af43 bpl.w 8000b9a if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000d14: f7ff fad4 bl 80002c0 8000d18: 1b80 subs r0, r0, r6 8000d1a: 2802 cmp r0, #2 8000d1c: d9f6 bls.n 8000d0c 8000d1e: e771 b.n 8000c04 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8000d20: 4c33 ldr r4, [pc, #204] ; (8000df0 ) 8000d22: 69e3 ldr r3, [r4, #28] 8000d24: 00d8 lsls r0, r3, #3 8000d26: d424 bmi.n 8000d72 pwrclkchanged = SET; 8000d28: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8000d2a: 69e3 ldr r3, [r4, #28] 8000d2c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8000d30: 61e3 str r3, [r4, #28] 8000d32: 69e3 ldr r3, [r4, #28] 8000d34: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8000d38: 9300 str r3, [sp, #0] 8000d3a: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000d3c: 4e30 ldr r6, [pc, #192] ; (8000e00 ) 8000d3e: 6833 ldr r3, [r6, #0] 8000d40: 05d9 lsls r1, r3, #23 8000d42: d518 bpl.n 8000d76 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d44: 68eb ldr r3, [r5, #12] 8000d46: 2b01 cmp r3, #1 8000d48: d126 bne.n 8000d98 8000d4a: 6a23 ldr r3, [r4, #32] 8000d4c: f043 0301 orr.w r3, r3, #1 8000d50: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000d52: f7ff fab5 bl 80002c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000d56: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8000d5a: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8000d5c: 6a23 ldr r3, [r4, #32] 8000d5e: 079b lsls r3, r3, #30 8000d60: d53f bpl.n 8000de2 if(pwrclkchanged == SET) 8000d62: 2f00 cmp r7, #0 8000d64: f43f af1d beq.w 8000ba2 __HAL_RCC_PWR_CLK_DISABLE(); 8000d68: 69e3 ldr r3, [r4, #28] 8000d6a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8000d6e: 61e3 str r3, [r4, #28] 8000d70: e717 b.n 8000ba2 FlagStatus pwrclkchanged = RESET; 8000d72: 2700 movs r7, #0 8000d74: e7e2 b.n 8000d3c SET_BIT(PWR->CR, PWR_CR_DBP); 8000d76: 6833 ldr r3, [r6, #0] 8000d78: f443 7380 orr.w r3, r3, #256 ; 0x100 8000d7c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000d7e: f7ff fa9f bl 80002c0 8000d82: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000d84: 6833 ldr r3, [r6, #0] 8000d86: 05da lsls r2, r3, #23 8000d88: d4dc bmi.n 8000d44 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8000d8a: f7ff fa99 bl 80002c0 8000d8e: eba0 0008 sub.w r0, r0, r8 8000d92: 2864 cmp r0, #100 ; 0x64 8000d94: d9f6 bls.n 8000d84 8000d96: e735 b.n 8000c04 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000d98: b9ab cbnz r3, 8000dc6 8000d9a: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000d9c: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000da0: f023 0301 bic.w r3, r3, #1 8000da4: 6223 str r3, [r4, #32] 8000da6: 6a23 ldr r3, [r4, #32] 8000da8: f023 0304 bic.w r3, r3, #4 8000dac: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000dae: f7ff fa87 bl 80002c0 8000db2: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8000db4: 6a23 ldr r3, [r4, #32] 8000db6: 0798 lsls r0, r3, #30 8000db8: d5d3 bpl.n 8000d62 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000dba: f7ff fa81 bl 80002c0 8000dbe: 1b80 subs r0, r0, r6 8000dc0: 4540 cmp r0, r8 8000dc2: d9f7 bls.n 8000db4 8000dc4: e71e b.n 8000c04 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000dc6: 2b05 cmp r3, #5 8000dc8: 6a23 ldr r3, [r4, #32] 8000dca: d103 bne.n 8000dd4 8000dcc: f043 0304 orr.w r3, r3, #4 8000dd0: 6223 str r3, [r4, #32] 8000dd2: e7ba b.n 8000d4a 8000dd4: f023 0301 bic.w r3, r3, #1 8000dd8: 6223 str r3, [r4, #32] 8000dda: 6a23 ldr r3, [r4, #32] 8000ddc: f023 0304 bic.w r3, r3, #4 8000de0: e7b6 b.n 8000d50 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000de2: f7ff fa6d bl 80002c0 8000de6: eba0 0008 sub.w r0, r0, r8 8000dea: 42b0 cmp r0, r6 8000dec: d9b6 bls.n 8000d5c 8000dee: e709 b.n 8000c04 8000df0: 40021000 .word 0x40021000 8000df4: 42420000 .word 0x42420000 8000df8: 42420480 .word 0x42420480 8000dfc: 2000000c .word 0x2000000c 8000e00: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000e04: 4c22 ldr r4, [pc, #136] ; (8000e90 ) 8000e06: 6863 ldr r3, [r4, #4] 8000e08: f003 030c and.w r3, r3, #12 8000e0c: 2b08 cmp r3, #8 8000e0e: f43f aee2 beq.w 8000bd6 8000e12: 2300 movs r3, #0 8000e14: 4e1f ldr r6, [pc, #124] ; (8000e94 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000e16: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8000e18: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000e1a: d12b bne.n 8000e74 tickstart = HAL_GetTick(); 8000e1c: f7ff fa50 bl 80002c0 8000e20: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000e22: 6823 ldr r3, [r4, #0] 8000e24: 0199 lsls r1, r3, #6 8000e26: d41f bmi.n 8000e68 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8000e28: 6a2b ldr r3, [r5, #32] 8000e2a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000e2e: d105 bne.n 8000e3c __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8000e30: 6862 ldr r2, [r4, #4] 8000e32: 68a9 ldr r1, [r5, #8] 8000e34: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8000e38: 430a orrs r2, r1 8000e3a: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8000e3c: 6a69 ldr r1, [r5, #36] ; 0x24 8000e3e: 6862 ldr r2, [r4, #4] 8000e40: 430b orrs r3, r1 8000e42: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8000e46: 4313 orrs r3, r2 8000e48: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8000e4a: 2301 movs r3, #1 8000e4c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000e4e: f7ff fa37 bl 80002c0 8000e52: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000e54: 6823 ldr r3, [r4, #0] 8000e56: 019a lsls r2, r3, #6 8000e58: f53f aea7 bmi.w 8000baa if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000e5c: f7ff fa30 bl 80002c0 8000e60: 1b40 subs r0, r0, r5 8000e62: 2802 cmp r0, #2 8000e64: d9f6 bls.n 8000e54 8000e66: e6cd b.n 8000c04 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000e68: f7ff fa2a bl 80002c0 8000e6c: 1bc0 subs r0, r0, r7 8000e6e: 2802 cmp r0, #2 8000e70: d9d7 bls.n 8000e22 8000e72: e6c7 b.n 8000c04 tickstart = HAL_GetTick(); 8000e74: f7ff fa24 bl 80002c0 8000e78: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000e7a: 6823 ldr r3, [r4, #0] 8000e7c: 019b lsls r3, r3, #6 8000e7e: f57f ae94 bpl.w 8000baa if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000e82: f7ff fa1d bl 80002c0 8000e86: 1b40 subs r0, r0, r5 8000e88: 2802 cmp r0, #2 8000e8a: d9f6 bls.n 8000e7a 8000e8c: e6ba b.n 8000c04 8000e8e: bf00 nop 8000e90: 40021000 .word 0x40021000 8000e94: 42420060 .word 0x42420060 08000e98 : { 8000e98: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000e9a: 4b19 ldr r3, [pc, #100] ; (8000f00 ) { 8000e9c: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000e9e: ac02 add r4, sp, #8 8000ea0: f103 0510 add.w r5, r3, #16 8000ea4: 4622 mov r2, r4 8000ea6: 6818 ldr r0, [r3, #0] 8000ea8: 6859 ldr r1, [r3, #4] 8000eaa: 3308 adds r3, #8 8000eac: c203 stmia r2!, {r0, r1} 8000eae: 42ab cmp r3, r5 8000eb0: 4614 mov r4, r2 8000eb2: d1f7 bne.n 8000ea4 const uint8_t aPredivFactorTable[2] = {1, 2}; 8000eb4: 2301 movs r3, #1 8000eb6: f88d 3004 strb.w r3, [sp, #4] 8000eba: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8000ebc: 4911 ldr r1, [pc, #68] ; (8000f04 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8000ebe: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8000ec2: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8000ec4: f003 020c and.w r2, r3, #12 8000ec8: 2a08 cmp r2, #8 8000eca: d117 bne.n 8000efc pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000ecc: f3c3 4283 ubfx r2, r3, #18, #4 8000ed0: a806 add r0, sp, #24 8000ed2: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000ed4: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000ed6: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000eda: d50c bpl.n 8000ef6 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000edc: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000ede: 480a ldr r0, [pc, #40] ; (8000f08 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000ee0: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000ee4: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000ee6: aa06 add r2, sp, #24 8000ee8: 4413 add r3, r2 8000eea: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000eee: fbb0 f0f3 udiv r0, r0, r3 } 8000ef2: b007 add sp, #28 8000ef4: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8000ef6: 4805 ldr r0, [pc, #20] ; (8000f0c ) 8000ef8: 4350 muls r0, r2 8000efa: e7fa b.n 8000ef2 sysclockfreq = HSE_VALUE; 8000efc: 4802 ldr r0, [pc, #8] ; (8000f08 ) return sysclockfreq; 8000efe: e7f8 b.n 8000ef2 8000f00: 08003148 .word 0x08003148 8000f04: 40021000 .word 0x40021000 8000f08: 007a1200 .word 0x007a1200 8000f0c: 003d0900 .word 0x003d0900 08000f10 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000f10: 4a54 ldr r2, [pc, #336] ; (8001064 ) { 8000f12: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000f16: 6813 ldr r3, [r2, #0] { 8000f18: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000f1a: f003 0307 and.w r3, r3, #7 8000f1e: 428b cmp r3, r1 { 8000f20: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000f22: d32a bcc.n 8000f7a if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8000f24: 6829 ldr r1, [r5, #0] 8000f26: 078c lsls r4, r1, #30 8000f28: d434 bmi.n 8000f94 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8000f2a: 07ca lsls r2, r1, #31 8000f2c: d447 bmi.n 8000fbe if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8000f2e: 4a4d ldr r2, [pc, #308] ; (8001064 ) 8000f30: 6813 ldr r3, [r2, #0] 8000f32: f003 0307 and.w r3, r3, #7 8000f36: 429e cmp r6, r3 8000f38: f0c0 8082 bcc.w 8001040 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000f3c: 682a ldr r2, [r5, #0] 8000f3e: 4c4a ldr r4, [pc, #296] ; (8001068 ) 8000f40: f012 0f04 tst.w r2, #4 8000f44: f040 8087 bne.w 8001056 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000f48: 0713 lsls r3, r2, #28 8000f4a: d506 bpl.n 8000f5a MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8000f4c: 6863 ldr r3, [r4, #4] 8000f4e: 692a ldr r2, [r5, #16] 8000f50: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8000f54: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000f58: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8000f5a: f7ff ff9d bl 8000e98 8000f5e: 6863 ldr r3, [r4, #4] 8000f60: 4a42 ldr r2, [pc, #264] ; (800106c ) 8000f62: f3c3 1303 ubfx r3, r3, #4, #4 8000f66: 5cd3 ldrb r3, [r2, r3] 8000f68: 40d8 lsrs r0, r3 8000f6a: 4b41 ldr r3, [pc, #260] ; (8001070 ) 8000f6c: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8000f6e: 2000 movs r0, #0 8000f70: f7ff f964 bl 800023c return HAL_OK; 8000f74: 2000 movs r0, #0 } 8000f76: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 8000f7a: 6813 ldr r3, [r2, #0] 8000f7c: f023 0307 bic.w r3, r3, #7 8000f80: 430b orrs r3, r1 8000f82: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8000f84: 6813 ldr r3, [r2, #0] 8000f86: f003 0307 and.w r3, r3, #7 8000f8a: 4299 cmp r1, r3 8000f8c: d0ca beq.n 8000f24 return HAL_ERROR; 8000f8e: 2001 movs r0, #1 8000f90: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8000f94: 4b34 ldr r3, [pc, #208] ; (8001068 ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8000f96: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8000f9a: bf1e ittt ne 8000f9c: 685a ldrne r2, [r3, #4] 8000f9e: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8000fa2: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8000fa4: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8000fa6: bf42 ittt mi 8000fa8: 685a ldrmi r2, [r3, #4] 8000faa: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8000fae: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8000fb0: 685a ldr r2, [r3, #4] 8000fb2: 68a8 ldr r0, [r5, #8] 8000fb4: f022 02f0 bic.w r2, r2, #240 ; 0xf0 8000fb8: 4302 orrs r2, r0 8000fba: 605a str r2, [r3, #4] 8000fbc: e7b5 b.n 8000f2a if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fbe: 686a ldr r2, [r5, #4] 8000fc0: 4c29 ldr r4, [pc, #164] ; (8001068 ) 8000fc2: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000fc4: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fc6: d11c bne.n 8001002 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000fc8: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000fcc: d0df beq.n 8000f8e __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000fce: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000fd0: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8000fd4: f023 0303 bic.w r3, r3, #3 8000fd8: 4313 orrs r3, r2 8000fda: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 8000fdc: f7ff f970 bl 80002c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fe0: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 8000fe2: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8000fe4: 2b01 cmp r3, #1 8000fe6: d114 bne.n 8001012 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8000fe8: 6863 ldr r3, [r4, #4] 8000fea: f003 030c and.w r3, r3, #12 8000fee: 2b04 cmp r3, #4 8000ff0: d09d beq.n 8000f2e if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8000ff2: f7ff f965 bl 80002c0 8000ff6: 1bc0 subs r0, r0, r7 8000ff8: 4540 cmp r0, r8 8000ffa: d9f5 bls.n 8000fe8 return HAL_TIMEOUT; 8000ffc: 2003 movs r0, #3 8000ffe: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8001002: 2a02 cmp r2, #2 8001004: d102 bne.n 800100c if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001006: f013 7f00 tst.w r3, #33554432 ; 0x2000000 800100a: e7df b.n 8000fcc if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800100c: f013 0f02 tst.w r3, #2 8001010: e7dc b.n 8000fcc else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8001012: 2b02 cmp r3, #2 8001014: d10f bne.n 8001036 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8001016: 6863 ldr r3, [r4, #4] 8001018: f003 030c and.w r3, r3, #12 800101c: 2b08 cmp r3, #8 800101e: d086 beq.n 8000f2e if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001020: f7ff f94e bl 80002c0 8001024: 1bc0 subs r0, r0, r7 8001026: 4540 cmp r0, r8 8001028: d9f5 bls.n 8001016 800102a: e7e7 b.n 8000ffc if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 800102c: f7ff f948 bl 80002c0 8001030: 1bc0 subs r0, r0, r7 8001032: 4540 cmp r0, r8 8001034: d8e2 bhi.n 8000ffc while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8001036: 6863 ldr r3, [r4, #4] 8001038: f013 0f0c tst.w r3, #12 800103c: d1f6 bne.n 800102c 800103e: e776 b.n 8000f2e __HAL_FLASH_SET_LATENCY(FLatency); 8001040: 6813 ldr r3, [r2, #0] 8001042: f023 0307 bic.w r3, r3, #7 8001046: 4333 orrs r3, r6 8001048: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 800104a: 6813 ldr r3, [r2, #0] 800104c: f003 0307 and.w r3, r3, #7 8001050: 429e cmp r6, r3 8001052: d19c bne.n 8000f8e 8001054: e772 b.n 8000f3c MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8001056: 6863 ldr r3, [r4, #4] 8001058: 68e9 ldr r1, [r5, #12] 800105a: f423 63e0 bic.w r3, r3, #1792 ; 0x700 800105e: 430b orrs r3, r1 8001060: 6063 str r3, [r4, #4] 8001062: e771 b.n 8000f48 8001064: 40022000 .word 0x40022000 8001068: 40021000 .word 0x40021000 800106c: 080031bd .word 0x080031bd 8001070: 2000000c .word 0x2000000c 08001074 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8001074: 4b04 ldr r3, [pc, #16] ; (8001088 ) 8001076: 4a05 ldr r2, [pc, #20] ; (800108c ) 8001078: 685b ldr r3, [r3, #4] 800107a: f3c3 2302 ubfx r3, r3, #8, #3 800107e: 5cd3 ldrb r3, [r2, r3] 8001080: 4a03 ldr r2, [pc, #12] ; (8001090 ) 8001082: 6810 ldr r0, [r2, #0] } 8001084: 40d8 lsrs r0, r3 8001086: 4770 bx lr 8001088: 40021000 .word 0x40021000 800108c: 080031cd .word 0x080031cd 8001090: 2000000c .word 0x2000000c 08001094 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8001094: 4b04 ldr r3, [pc, #16] ; (80010a8 ) 8001096: 4a05 ldr r2, [pc, #20] ; (80010ac ) 8001098: 685b ldr r3, [r3, #4] 800109a: f3c3 23c2 ubfx r3, r3, #11, #3 800109e: 5cd3 ldrb r3, [r2, r3] 80010a0: 4a03 ldr r2, [pc, #12] ; (80010b0 ) 80010a2: 6810 ldr r0, [r2, #0] } 80010a4: 40d8 lsrs r0, r3 80010a6: 4770 bx lr 80010a8: 40021000 .word 0x40021000 80010ac: 080031cd .word 0x080031cd 80010b0: 2000000c .word 0x2000000c 080010b4 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80010b4: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 80010b6: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80010b8: 68da ldr r2, [r3, #12] 80010ba: f042 0201 orr.w r2, r2, #1 80010be: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 80010c0: 681a ldr r2, [r3, #0] 80010c2: f042 0201 orr.w r2, r2, #1 80010c6: 601a str r2, [r3, #0] } 80010c8: 4770 bx lr 080010ca : 80010ca: 4770 bx lr 080010cc : 80010cc: 4770 bx lr 080010ce : 80010ce: 4770 bx lr 080010d0 : 80010d0: 4770 bx lr 080010d2 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010d2: 6803 ldr r3, [r0, #0] { 80010d4: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010d6: 691a ldr r2, [r3, #16] { 80010d8: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80010da: 0791 lsls r1, r2, #30 80010dc: d50e bpl.n 80010fc { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 80010de: 68da ldr r2, [r3, #12] 80010e0: 0792 lsls r2, r2, #30 80010e2: d50b bpl.n 80010fc { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80010e4: f06f 0202 mvn.w r2, #2 80010e8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80010ea: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80010ec: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80010ee: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80010f0: 079b lsls r3, r3, #30 80010f2: d077 beq.n 80011e4 { HAL_TIM_IC_CaptureCallback(htim); 80010f4: f7ff ffea bl 80010cc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80010f8: 2300 movs r3, #0 80010fa: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80010fc: 6823 ldr r3, [r4, #0] 80010fe: 691a ldr r2, [r3, #16] 8001100: 0750 lsls r0, r2, #29 8001102: d510 bpl.n 8001126 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8001104: 68da ldr r2, [r3, #12] 8001106: 0751 lsls r1, r2, #29 8001108: d50d bpl.n 8001126 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 800110a: f06f 0204 mvn.w r2, #4 800110e: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001110: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001112: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001114: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001116: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 800111a: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 800111c: d068 beq.n 80011f0 HAL_TIM_IC_CaptureCallback(htim); 800111e: f7ff ffd5 bl 80010cc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001122: 2300 movs r3, #0 8001124: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8001126: 6823 ldr r3, [r4, #0] 8001128: 691a ldr r2, [r3, #16] 800112a: 0712 lsls r2, r2, #28 800112c: d50f bpl.n 800114e { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 800112e: 68da ldr r2, [r3, #12] 8001130: 0710 lsls r0, r2, #28 8001132: d50c bpl.n 800114e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8001134: f06f 0208 mvn.w r2, #8 8001138: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800113a: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800113c: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800113e: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001140: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8001142: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001144: d05a beq.n 80011fc HAL_TIM_IC_CaptureCallback(htim); 8001146: f7ff ffc1 bl 80010cc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800114a: 2300 movs r3, #0 800114c: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 800114e: 6823 ldr r3, [r4, #0] 8001150: 691a ldr r2, [r3, #16] 8001152: 06d2 lsls r2, r2, #27 8001154: d510 bpl.n 8001178 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8001156: 68da ldr r2, [r3, #12] 8001158: 06d0 lsls r0, r2, #27 800115a: d50d bpl.n 8001178 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 800115c: f06f 0210 mvn.w r2, #16 8001160: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001162: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001164: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001166: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001168: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 800116c: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800116e: d04b beq.n 8001208 HAL_TIM_IC_CaptureCallback(htim); 8001170: f7ff ffac bl 80010cc else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001174: 2300 movs r3, #0 8001176: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8001178: 6823 ldr r3, [r4, #0] 800117a: 691a ldr r2, [r3, #16] 800117c: 07d1 lsls r1, r2, #31 800117e: d508 bpl.n 8001192 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8001180: 68da ldr r2, [r3, #12] 8001182: 07d2 lsls r2, r2, #31 8001184: d505 bpl.n 8001192 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001186: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 800118a: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 800118c: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 800118e: f000 fce9 bl 8001b64 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8001192: 6823 ldr r3, [r4, #0] 8001194: 691a ldr r2, [r3, #16] 8001196: 0610 lsls r0, r2, #24 8001198: d508 bpl.n 80011ac { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 800119a: 68da ldr r2, [r3, #12] 800119c: 0611 lsls r1, r2, #24 800119e: d505 bpl.n 80011ac { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80011a0: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 80011a4: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80011a6: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 80011a8: f000 f8bf bl 800132a } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 80011ac: 6823 ldr r3, [r4, #0] 80011ae: 691a ldr r2, [r3, #16] 80011b0: 0652 lsls r2, r2, #25 80011b2: d508 bpl.n 80011c6 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 80011b4: 68da ldr r2, [r3, #12] 80011b6: 0650 lsls r0, r2, #25 80011b8: d505 bpl.n 80011c6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80011ba: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80011be: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80011c0: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80011c2: f7ff ff85 bl 80010d0 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80011c6: 6823 ldr r3, [r4, #0] 80011c8: 691a ldr r2, [r3, #16] 80011ca: 0691 lsls r1, r2, #26 80011cc: d522 bpl.n 8001214 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 80011ce: 68da ldr r2, [r3, #12] 80011d0: 0692 lsls r2, r2, #26 80011d2: d51f bpl.n 8001214 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80011d4: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 80011d8: 4620 mov r0, r4 } } } 80011da: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80011de: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 80011e0: f000 b8a2 b.w 8001328 HAL_TIM_OC_DelayElapsedCallback(htim); 80011e4: f7ff ff71 bl 80010ca HAL_TIM_PWM_PulseFinishedCallback(htim); 80011e8: 4620 mov r0, r4 80011ea: f7ff ff70 bl 80010ce 80011ee: e783 b.n 80010f8 HAL_TIM_OC_DelayElapsedCallback(htim); 80011f0: f7ff ff6b bl 80010ca HAL_TIM_PWM_PulseFinishedCallback(htim); 80011f4: 4620 mov r0, r4 80011f6: f7ff ff6a bl 80010ce 80011fa: e792 b.n 8001122 HAL_TIM_OC_DelayElapsedCallback(htim); 80011fc: f7ff ff65 bl 80010ca HAL_TIM_PWM_PulseFinishedCallback(htim); 8001200: 4620 mov r0, r4 8001202: f7ff ff64 bl 80010ce 8001206: e7a0 b.n 800114a HAL_TIM_OC_DelayElapsedCallback(htim); 8001208: f7ff ff5f bl 80010ca HAL_TIM_PWM_PulseFinishedCallback(htim); 800120c: 4620 mov r0, r4 800120e: f7ff ff5e bl 80010ce 8001212: e7af b.n 8001174 8001214: bd10 pop {r4, pc} ... 08001218 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001218: 4a24 ldr r2, [pc, #144] ; (80012ac ) tmpcr1 = TIMx->CR1; 800121a: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 800121c: 4290 cmp r0, r2 800121e: d012 beq.n 8001246 8001220: f502 6200 add.w r2, r2, #2048 ; 0x800 8001224: 4290 cmp r0, r2 8001226: d00e beq.n 8001246 8001228: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 800122c: d00b beq.n 8001246 800122e: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001232: 4290 cmp r0, r2 8001234: d007 beq.n 8001246 8001236: f502 6280 add.w r2, r2, #1024 ; 0x400 800123a: 4290 cmp r0, r2 800123c: d003 beq.n 8001246 800123e: f502 6280 add.w r2, r2, #1024 ; 0x400 8001242: 4290 cmp r0, r2 8001244: d11d bne.n 8001282 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8001246: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8001248: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 800124c: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800124e: 4a17 ldr r2, [pc, #92] ; (80012ac ) 8001250: 4290 cmp r0, r2 8001252: d012 beq.n 800127a 8001254: f502 6200 add.w r2, r2, #2048 ; 0x800 8001258: 4290 cmp r0, r2 800125a: d00e beq.n 800127a 800125c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001260: d00b beq.n 800127a 8001262: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001266: 4290 cmp r0, r2 8001268: d007 beq.n 800127a 800126a: f502 6280 add.w r2, r2, #1024 ; 0x400 800126e: 4290 cmp r0, r2 8001270: d003 beq.n 800127a 8001272: f502 6280 add.w r2, r2, #1024 ; 0x400 8001276: 4290 cmp r0, r2 8001278: d103 bne.n 8001282 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 800127a: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 800127c: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8001280: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001282: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8001284: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001288: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 800128a: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 800128c: 688b ldr r3, [r1, #8] 800128e: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8001290: 680b ldr r3, [r1, #0] 8001292: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8001294: 4b05 ldr r3, [pc, #20] ; (80012ac ) 8001296: 4298 cmp r0, r3 8001298: d003 beq.n 80012a2 800129a: f503 6300 add.w r3, r3, #2048 ; 0x800 800129e: 4298 cmp r0, r3 80012a0: d101 bne.n 80012a6 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 80012a2: 690b ldr r3, [r1, #16] 80012a4: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 80012a6: 2301 movs r3, #1 80012a8: 6143 str r3, [r0, #20] 80012aa: 4770 bx lr 80012ac: 40012c00 .word 0x40012c00 080012b0 : { 80012b0: b510 push {r4, lr} if(htim == NULL) 80012b2: 4604 mov r4, r0 80012b4: b1a0 cbz r0, 80012e0 if(htim->State == HAL_TIM_STATE_RESET) 80012b6: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 80012ba: f003 02ff and.w r2, r3, #255 ; 0xff 80012be: b91b cbnz r3, 80012c8 htim->Lock = HAL_UNLOCKED; 80012c0: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80012c4: f000 fd64 bl 8001d90 htim->State= HAL_TIM_STATE_BUSY; 80012c8: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80012ca: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 80012cc: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80012d0: 1d21 adds r1, r4, #4 80012d2: f7ff ffa1 bl 8001218 htim->State= HAL_TIM_STATE_READY; 80012d6: 2301 movs r3, #1 return HAL_OK; 80012d8: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 80012da: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80012de: bd10 pop {r4, pc} return HAL_ERROR; 80012e0: 2001 movs r0, #1 } 80012e2: bd10 pop {r4, pc} 080012e4 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 80012e4: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80012e8: b510 push {r4, lr} __HAL_LOCK(htim); 80012ea: 2b01 cmp r3, #1 80012ec: f04f 0302 mov.w r3, #2 80012f0: d018 beq.n 8001324 htim->State = HAL_TIM_STATE_BUSY; 80012f2: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80012f6: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80012f8: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80012fa: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80012fc: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80012fe: f022 0270 bic.w r2, r2, #112 ; 0x70 8001302: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 8001304: 685a ldr r2, [r3, #4] 8001306: 4322 orrs r2, r4 8001308: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 800130a: 689a ldr r2, [r3, #8] 800130c: f022 0280 bic.w r2, r2, #128 ; 0x80 8001310: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 8001312: 689a ldr r2, [r3, #8] 8001314: 430a orrs r2, r1 8001316: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 8001318: 2301 movs r3, #1 800131a: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 800131e: 2300 movs r3, #0 8001320: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8001324: 4618 mov r0, r3 return HAL_OK; } 8001326: bd10 pop {r4, pc} 08001328 : 8001328: 4770 bx lr 0800132a : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 800132a: 4770 bx lr 0800132c : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 800132c: 6803 ldr r3, [r0, #0] 800132e: 68da ldr r2, [r3, #12] 8001330: f422 7290 bic.w r2, r2, #288 ; 0x120 8001334: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001336: 695a ldr r2, [r3, #20] 8001338: f022 0201 bic.w r2, r2, #1 800133c: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 800133e: 2320 movs r3, #32 8001340: f880 303a strb.w r3, [r0, #58] ; 0x3a 8001344: 4770 bx lr ... 08001348 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8001348: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 800134c: 6805 ldr r5, [r0, #0] 800134e: 68c2 ldr r2, [r0, #12] 8001350: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001352: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001354: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8001358: 4313 orrs r3, r2 800135a: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800135c: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 800135e: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001360: 430b orrs r3, r1 8001362: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8001364: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 8001368: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800136c: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 800136e: 4313 orrs r3, r2 8001370: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8001372: 696b ldr r3, [r5, #20] 8001374: 6982 ldr r2, [r0, #24] 8001376: f423 7340 bic.w r3, r3, #768 ; 0x300 800137a: 4313 orrs r3, r2 800137c: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 800137e: 4b40 ldr r3, [pc, #256] ; (8001480 ) { 8001380: 4681 mov r9, r0 if(huart->Instance == USART1) 8001382: 429d cmp r5, r3 8001384: f04f 0419 mov.w r4, #25 8001388: d146 bne.n 8001418 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 800138a: f7ff fe83 bl 8001094 800138e: fb04 f300 mul.w r3, r4, r0 8001392: f8d9 6004 ldr.w r6, [r9, #4] 8001396: f04f 0864 mov.w r8, #100 ; 0x64 800139a: 00b6 lsls r6, r6, #2 800139c: fbb3 f3f6 udiv r3, r3, r6 80013a0: fbb3 f3f8 udiv r3, r3, r8 80013a4: 011e lsls r6, r3, #4 80013a6: f7ff fe75 bl 8001094 80013aa: 4360 muls r0, r4 80013ac: f8d9 3004 ldr.w r3, [r9, #4] 80013b0: 009b lsls r3, r3, #2 80013b2: fbb0 f7f3 udiv r7, r0, r3 80013b6: f7ff fe6d bl 8001094 80013ba: 4360 muls r0, r4 80013bc: f8d9 3004 ldr.w r3, [r9, #4] 80013c0: 009b lsls r3, r3, #2 80013c2: fbb0 f3f3 udiv r3, r0, r3 80013c6: fbb3 f3f8 udiv r3, r3, r8 80013ca: fb08 7313 mls r3, r8, r3, r7 80013ce: 011b lsls r3, r3, #4 80013d0: 3332 adds r3, #50 ; 0x32 80013d2: fbb3 f3f8 udiv r3, r3, r8 80013d6: f003 07f0 and.w r7, r3, #240 ; 0xf0 80013da: f7ff fe5b bl 8001094 80013de: 4360 muls r0, r4 80013e0: f8d9 2004 ldr.w r2, [r9, #4] 80013e4: 0092 lsls r2, r2, #2 80013e6: fbb0 faf2 udiv sl, r0, r2 80013ea: f7ff fe53 bl 8001094 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80013ee: 4360 muls r0, r4 80013f0: f8d9 3004 ldr.w r3, [r9, #4] 80013f4: 009b lsls r3, r3, #2 80013f6: fbb0 f3f3 udiv r3, r0, r3 80013fa: fbb3 f3f8 udiv r3, r3, r8 80013fe: fb08 a313 mls r3, r8, r3, sl 8001402: 011b lsls r3, r3, #4 8001404: 3332 adds r3, #50 ; 0x32 8001406: fbb3 f3f8 udiv r3, r3, r8 800140a: f003 030f and.w r3, r3, #15 800140e: 433b orrs r3, r7 8001410: 4433 add r3, r6 8001412: 60ab str r3, [r5, #8] 8001414: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8001418: f7ff fe2c bl 8001074 800141c: fb04 f300 mul.w r3, r4, r0 8001420: f8d9 6004 ldr.w r6, [r9, #4] 8001424: f04f 0864 mov.w r8, #100 ; 0x64 8001428: 00b6 lsls r6, r6, #2 800142a: fbb3 f3f6 udiv r3, r3, r6 800142e: fbb3 f3f8 udiv r3, r3, r8 8001432: 011e lsls r6, r3, #4 8001434: f7ff fe1e bl 8001074 8001438: 4360 muls r0, r4 800143a: f8d9 3004 ldr.w r3, [r9, #4] 800143e: 009b lsls r3, r3, #2 8001440: fbb0 f7f3 udiv r7, r0, r3 8001444: f7ff fe16 bl 8001074 8001448: 4360 muls r0, r4 800144a: f8d9 3004 ldr.w r3, [r9, #4] 800144e: 009b lsls r3, r3, #2 8001450: fbb0 f3f3 udiv r3, r0, r3 8001454: fbb3 f3f8 udiv r3, r3, r8 8001458: fb08 7313 mls r3, r8, r3, r7 800145c: 011b lsls r3, r3, #4 800145e: 3332 adds r3, #50 ; 0x32 8001460: fbb3 f3f8 udiv r3, r3, r8 8001464: f003 07f0 and.w r7, r3, #240 ; 0xf0 8001468: f7ff fe04 bl 8001074 800146c: 4360 muls r0, r4 800146e: f8d9 2004 ldr.w r2, [r9, #4] 8001472: 0092 lsls r2, r2, #2 8001474: fbb0 faf2 udiv sl, r0, r2 8001478: f7ff fdfc bl 8001074 800147c: e7b7 b.n 80013ee 800147e: bf00 nop 8001480: 40013800 .word 0x40013800 08001484 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8001484: b5f8 push {r3, r4, r5, r6, r7, lr} 8001486: 4604 mov r4, r0 8001488: 460e mov r6, r1 800148a: 4617 mov r7, r2 800148c: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800148e: 6821 ldr r1, [r4, #0] 8001490: 680b ldr r3, [r1, #0] 8001492: ea36 0303 bics.w r3, r6, r3 8001496: d101 bne.n 800149c return HAL_OK; 8001498: 2000 movs r0, #0 } 800149a: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 800149c: 1c6b adds r3, r5, #1 800149e: d0f7 beq.n 8001490 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80014a0: b995 cbnz r5, 80014c8 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 80014a2: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 80014a4: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 80014a6: 68da ldr r2, [r3, #12] 80014a8: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 80014ac: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80014ae: 695a ldr r2, [r3, #20] 80014b0: f022 0201 bic.w r2, r2, #1 80014b4: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 80014b6: 2320 movs r3, #32 80014b8: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 80014bc: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 80014c0: 2300 movs r3, #0 80014c2: f884 3038 strb.w r3, [r4, #56] ; 0x38 80014c6: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80014c8: f7fe fefa bl 80002c0 80014cc: 1bc0 subs r0, r0, r7 80014ce: 4285 cmp r5, r0 80014d0: d2dd bcs.n 800148e 80014d2: e7e6 b.n 80014a2 080014d4 : { 80014d4: b510 push {r4, lr} if(huart == NULL) 80014d6: 4604 mov r4, r0 80014d8: b340 cbz r0, 800152c if(huart->gState == HAL_UART_STATE_RESET) 80014da: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 80014de: f003 02ff and.w r2, r3, #255 ; 0xff 80014e2: b91b cbnz r3, 80014ec huart->Lock = HAL_UNLOCKED; 80014e4: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 80014e8: f000 fc66 bl 8001db8 huart->gState = HAL_UART_STATE_BUSY; 80014ec: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 80014ee: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 80014f0: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 80014f4: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 80014f6: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 80014f8: f423 5300 bic.w r3, r3, #8192 ; 0x2000 80014fc: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 80014fe: f7ff ff23 bl 8001348 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8001502: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 8001504: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8001506: 691a ldr r2, [r3, #16] 8001508: f422 4290 bic.w r2, r2, #18432 ; 0x4800 800150c: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 800150e: 695a ldr r2, [r3, #20] 8001510: f022 022a bic.w r2, r2, #42 ; 0x2a 8001514: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 8001516: 68da ldr r2, [r3, #12] 8001518: f442 5200 orr.w r2, r2, #8192 ; 0x2000 800151c: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 800151e: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001520: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8001522: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 8001526: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 800152a: bd10 pop {r4, pc} return HAL_ERROR; 800152c: 2001 movs r0, #1 } 800152e: bd10 pop {r4, pc} 08001530 : { 8001530: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001534: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 8001536: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 800153a: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 800153c: 2b20 cmp r3, #32 { 800153e: 460d mov r5, r1 8001540: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8001542: d14e bne.n 80015e2 if((pData == NULL) || (Size == 0U)) 8001544: 2900 cmp r1, #0 8001546: d049 beq.n 80015dc 8001548: 2a00 cmp r2, #0 800154a: d047 beq.n 80015dc __HAL_LOCK(huart); 800154c: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8001550: 2b01 cmp r3, #1 8001552: d046 beq.n 80015e2 8001554: 2301 movs r3, #1 8001556: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 800155a: 2300 movs r3, #0 800155c: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 800155e: 2321 movs r3, #33 ; 0x21 8001560: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8001564: f7fe feac bl 80002c0 8001568: 4606 mov r6, r0 huart->TxXferSize = Size; 800156a: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 800156e: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8001572: 8ce3 ldrh r3, [r4, #38] ; 0x26 8001574: b29b uxth r3, r3 8001576: b96b cbnz r3, 8001594 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8001578: 463b mov r3, r7 800157a: 4632 mov r2, r6 800157c: 2140 movs r1, #64 ; 0x40 800157e: 4620 mov r0, r4 8001580: f7ff ff80 bl 8001484 8001584: b9a8 cbnz r0, 80015b2 huart->gState = HAL_UART_STATE_READY; 8001586: 2320 movs r3, #32 __HAL_UNLOCK(huart); 8001588: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 800158c: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8001590: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8001594: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001596: 4632 mov r2, r6 huart->TxXferCount--; 8001598: 3b01 subs r3, #1 800159a: b29b uxth r3, r3 800159c: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800159e: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80015a0: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80015a2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80015a6: 4620 mov r0, r4 80015a8: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80015aa: d10e bne.n 80015ca if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80015ac: f7ff ff6a bl 8001484 80015b0: b110 cbz r0, 80015b8 return HAL_TIMEOUT; 80015b2: 2003 movs r0, #3 80015b4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 80015b8: 882b ldrh r3, [r5, #0] 80015ba: 6822 ldr r2, [r4, #0] 80015bc: f3c3 0308 ubfx r3, r3, #0, #9 80015c0: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80015c2: 6923 ldr r3, [r4, #16] 80015c4: b943 cbnz r3, 80015d8 pData +=2U; 80015c6: 3502 adds r5, #2 80015c8: e7d3 b.n 8001572 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80015ca: f7ff ff5b bl 8001484 80015ce: 2800 cmp r0, #0 80015d0: d1ef bne.n 80015b2 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 80015d2: 6823 ldr r3, [r4, #0] 80015d4: 782a ldrb r2, [r5, #0] 80015d6: 605a str r2, [r3, #4] 80015d8: 3501 adds r5, #1 80015da: e7ca b.n 8001572 return HAL_ERROR; 80015dc: 2001 movs r0, #1 80015de: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 80015e2: 2002 movs r0, #2 } 80015e4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 080015e8 : { 80015e8: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 80015ea: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 80015ee: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 80015f0: 2a20 cmp r2, #32 { 80015f2: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 80015f4: d138 bne.n 8001668 if((pData == NULL) || (Size == 0U)) 80015f6: 2900 cmp r1, #0 80015f8: d034 beq.n 8001664 80015fa: 2b00 cmp r3, #0 80015fc: d032 beq.n 8001664 __HAL_LOCK(huart); 80015fe: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 8001602: 2a01 cmp r2, #1 8001604: d030 beq.n 8001668 8001606: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001608: 2400 movs r4, #0 __HAL_LOCK(huart); 800160a: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 800160e: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 8001610: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 8001612: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 8001614: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 8001616: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 800161a: 6b40 ldr r0, [r0, #52] ; 0x34 800161c: 4a13 ldr r2, [pc, #76] ; (800166c ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 800161e: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8001620: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8001622: 4a13 ldr r2, [pc, #76] ; (8001670 ) huart->hdmarx->XferAbortCallback = NULL; 8001624: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8001626: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 8001628: 4a12 ldr r2, [pc, #72] ; (8001674 ) 800162a: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 800162c: 460a mov r2, r1 800162e: 1d31 adds r1, r6, #4 8001630: f7fe ff06 bl 8000440 return HAL_OK; 8001634: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 8001636: 682b ldr r3, [r5, #0] 8001638: 9401 str r4, [sp, #4] 800163a: 681a ldr r2, [r3, #0] 800163c: 9201 str r2, [sp, #4] 800163e: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8001640: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8001644: 9201 str r2, [sp, #4] 8001646: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 8001648: 68da ldr r2, [r3, #12] 800164a: f442 7280 orr.w r2, r2, #256 ; 0x100 800164e: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001650: 695a ldr r2, [r3, #20] 8001652: f042 0201 orr.w r2, r2, #1 8001656: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001658: 695a ldr r2, [r3, #20] 800165a: f042 0240 orr.w r2, r2, #64 ; 0x40 800165e: 615a str r2, [r3, #20] } 8001660: b002 add sp, #8 8001662: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8001664: 2001 movs r0, #1 8001666: e7fb b.n 8001660 return HAL_BUSY; 8001668: 2002 movs r0, #2 800166a: e7f9 b.n 8001660 800166c: 0800167b .word 0x0800167b 8001670: 08001731 .word 0x08001731 8001674: 0800173d .word 0x0800173d 08001678 : 8001678: 4770 bx lr 0800167a : { 800167a: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800167c: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800167e: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001680: 681b ldr r3, [r3, #0] 8001682: f013 0320 ands.w r3, r3, #32 8001686: d110 bne.n 80016aa huart->RxXferCount = 0U; 8001688: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 800168a: 6813 ldr r3, [r2, #0] 800168c: 68d9 ldr r1, [r3, #12] 800168e: f421 7180 bic.w r1, r1, #256 ; 0x100 8001692: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001694: 6959 ldr r1, [r3, #20] 8001696: f021 0101 bic.w r1, r1, #1 800169a: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 800169c: 6959 ldr r1, [r3, #20] 800169e: f021 0140 bic.w r1, r1, #64 ; 0x40 80016a2: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80016a4: 2320 movs r3, #32 80016a6: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 80016aa: 4610 mov r0, r2 80016ac: f000 fc94 bl 8001fd8 80016b0: bd08 pop {r3, pc} 080016b2 : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80016b2: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 80016b6: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80016b8: 2b22 cmp r3, #34 ; 0x22 80016ba: d136 bne.n 800172a if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80016bc: 6883 ldr r3, [r0, #8] 80016be: 6901 ldr r1, [r0, #16] 80016c0: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 80016c4: 6802 ldr r2, [r0, #0] 80016c6: 6a83 ldr r3, [r0, #40] ; 0x28 80016c8: d123 bne.n 8001712 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80016ca: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80016cc: b9e9 cbnz r1, 800170a *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80016ce: f3c2 0208 ubfx r2, r2, #0, #9 80016d2: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 80016d6: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 80016d8: 8dc4 ldrh r4, [r0, #46] ; 0x2e 80016da: 3c01 subs r4, #1 80016dc: b2a4 uxth r4, r4 80016de: 85c4 strh r4, [r0, #46] ; 0x2e 80016e0: b98c cbnz r4, 8001706 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80016e2: 6803 ldr r3, [r0, #0] 80016e4: 68da ldr r2, [r3, #12] 80016e6: f022 0220 bic.w r2, r2, #32 80016ea: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80016ec: 68da ldr r2, [r3, #12] 80016ee: f422 7280 bic.w r2, r2, #256 ; 0x100 80016f2: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80016f4: 695a ldr r2, [r3, #20] 80016f6: f022 0201 bic.w r2, r2, #1 80016fa: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80016fc: 2320 movs r3, #32 80016fe: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 8001702: f000 fc69 bl 8001fd8 if(--huart->RxXferCount == 0U) 8001706: 2000 movs r0, #0 } 8001708: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 800170a: b2d2 uxtb r2, r2 800170c: f823 2b01 strh.w r2, [r3], #1 8001710: e7e1 b.n 80016d6 if(huart->Init.Parity == UART_PARITY_NONE) 8001712: b921 cbnz r1, 800171e *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 8001714: 1c59 adds r1, r3, #1 8001716: 6852 ldr r2, [r2, #4] 8001718: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 800171a: 701a strb r2, [r3, #0] 800171c: e7dc b.n 80016d8 800171e: 6852 ldr r2, [r2, #4] 8001720: 1c59 adds r1, r3, #1 8001722: 6281 str r1, [r0, #40] ; 0x28 8001724: f002 027f and.w r2, r2, #127 ; 0x7f 8001728: e7f7 b.n 800171a return HAL_BUSY; 800172a: 2002 movs r0, #2 800172c: bd10 pop {r4, pc} 0800172e : 800172e: 4770 bx lr 08001730 : { 8001730: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8001732: 6a40 ldr r0, [r0, #36] ; 0x24 8001734: f7ff fffb bl 800172e 8001738: bd08 pop {r3, pc} 0800173a : 800173a: 4770 bx lr 0800173c : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800173c: 6a41 ldr r1, [r0, #36] ; 0x24 { 800173e: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8001740: 680b ldr r3, [r1, #0] 8001742: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8001744: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 8001748: 2821 cmp r0, #33 ; 0x21 800174a: d10a bne.n 8001762 800174c: 0612 lsls r2, r2, #24 800174e: d508 bpl.n 8001762 huart->TxXferCount = 0U; 8001750: 2200 movs r2, #0 8001752: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8001754: 68da ldr r2, [r3, #12] 8001756: f022 02c0 bic.w r2, r2, #192 ; 0xc0 800175a: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 800175c: 2220 movs r2, #32 800175e: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8001762: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8001764: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 8001768: 2a22 cmp r2, #34 ; 0x22 800176a: d106 bne.n 800177a 800176c: 065b lsls r3, r3, #25 800176e: d504 bpl.n 800177a huart->RxXferCount = 0U; 8001770: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8001772: 4608 mov r0, r1 huart->RxXferCount = 0U; 8001774: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 8001776: f7ff fdd9 bl 800132c huart->ErrorCode |= HAL_UART_ERROR_DMA; 800177a: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 800177c: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 800177e: f043 0310 orr.w r3, r3, #16 8001782: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001784: f7ff ffd9 bl 800173a 8001788: bd08 pop {r3, pc} ... 0800178c : uint32_t isrflags = READ_REG(huart->Instance->SR); 800178c: 6803 ldr r3, [r0, #0] { 800178e: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8001790: 681a ldr r2, [r3, #0] { 8001792: 4604 mov r4, r0 if(errorflags == RESET) 8001794: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8001796: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8001798: 695d ldr r5, [r3, #20] if(errorflags == RESET) 800179a: d107 bne.n 80017ac if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 800179c: 0696 lsls r6, r2, #26 800179e: d55a bpl.n 8001856 80017a0: 068d lsls r5, r1, #26 80017a2: d558 bpl.n 8001856 } 80017a4: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 80017a8: f7ff bf83 b.w 80016b2 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 80017ac: f015 0501 ands.w r5, r5, #1 80017b0: d102 bne.n 80017b8 80017b2: f411 7f90 tst.w r1, #288 ; 0x120 80017b6: d04e beq.n 8001856 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 80017b8: 07d3 lsls r3, r2, #31 80017ba: d505 bpl.n 80017c8 80017bc: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 80017be: bf42 ittt mi 80017c0: 6be3 ldrmi r3, [r4, #60] ; 0x3c 80017c2: f043 0301 orrmi.w r3, r3, #1 80017c6: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80017c8: 0750 lsls r0, r2, #29 80017ca: d504 bpl.n 80017d6 80017cc: b11d cbz r5, 80017d6 huart->ErrorCode |= HAL_UART_ERROR_NE; 80017ce: 6be3 ldr r3, [r4, #60] ; 0x3c 80017d0: f043 0302 orr.w r3, r3, #2 80017d4: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80017d6: 0793 lsls r3, r2, #30 80017d8: d504 bpl.n 80017e4 80017da: b11d cbz r5, 80017e4 huart->ErrorCode |= HAL_UART_ERROR_FE; 80017dc: 6be3 ldr r3, [r4, #60] ; 0x3c 80017de: f043 0304 orr.w r3, r3, #4 80017e2: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80017e4: 0716 lsls r6, r2, #28 80017e6: d504 bpl.n 80017f2 80017e8: b11d cbz r5, 80017f2 huart->ErrorCode |= HAL_UART_ERROR_ORE; 80017ea: 6be3 ldr r3, [r4, #60] ; 0x3c 80017ec: f043 0308 orr.w r3, r3, #8 80017f0: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 80017f2: 6be3 ldr r3, [r4, #60] ; 0x3c 80017f4: 2b00 cmp r3, #0 80017f6: d066 beq.n 80018c6 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80017f8: 0695 lsls r5, r2, #26 80017fa: d504 bpl.n 8001806 80017fc: 0688 lsls r0, r1, #26 80017fe: d502 bpl.n 8001806 UART_Receive_IT(huart); 8001800: 4620 mov r0, r4 8001802: f7ff ff56 bl 80016b2 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8001806: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 8001808: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 800180a: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 800180c: 6be2 ldr r2, [r4, #60] ; 0x3c 800180e: 0711 lsls r1, r2, #28 8001810: d402 bmi.n 8001818 8001812: f015 0540 ands.w r5, r5, #64 ; 0x40 8001816: d01a beq.n 800184e UART_EndRxTransfer(huart); 8001818: f7ff fd88 bl 800132c if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 800181c: 6823 ldr r3, [r4, #0] 800181e: 695a ldr r2, [r3, #20] 8001820: 0652 lsls r2, r2, #25 8001822: d510 bpl.n 8001846 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001824: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8001826: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001828: f022 0240 bic.w r2, r2, #64 ; 0x40 800182c: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 800182e: b150 cbz r0, 8001846 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8001830: 4b25 ldr r3, [pc, #148] ; (80018c8 ) 8001832: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8001834: f7fe fe42 bl 80004bc 8001838: 2800 cmp r0, #0 800183a: d044 beq.n 80018c6 huart->hdmarx->XferAbortCallback(huart->hdmarx); 800183c: 6b60 ldr r0, [r4, #52] ; 0x34 } 800183e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8001842: 6b43 ldr r3, [r0, #52] ; 0x34 8001844: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8001846: 4620 mov r0, r4 8001848: f7ff ff77 bl 800173a 800184c: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 800184e: f7ff ff74 bl 800173a huart->ErrorCode = HAL_UART_ERROR_NONE; 8001852: 63e5 str r5, [r4, #60] ; 0x3c 8001854: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8001856: 0616 lsls r6, r2, #24 8001858: d527 bpl.n 80018aa 800185a: 060d lsls r5, r1, #24 800185c: d525 bpl.n 80018aa if(huart->gState == HAL_UART_STATE_BUSY_TX) 800185e: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8001862: 2a21 cmp r2, #33 ; 0x21 8001864: d12f bne.n 80018c6 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001866: 68a2 ldr r2, [r4, #8] 8001868: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 800186c: 6a22 ldr r2, [r4, #32] 800186e: d117 bne.n 80018a0 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8001870: 8811 ldrh r1, [r2, #0] 8001872: f3c1 0108 ubfx r1, r1, #0, #9 8001876: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8001878: 6921 ldr r1, [r4, #16] 800187a: b979 cbnz r1, 800189c huart->pTxBuffPtr += 2U; 800187c: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800187e: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8001880: 8ce2 ldrh r2, [r4, #38] ; 0x26 8001882: 3a01 subs r2, #1 8001884: b292 uxth r2, r2 8001886: 84e2 strh r2, [r4, #38] ; 0x26 8001888: b9ea cbnz r2, 80018c6 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 800188a: 68da ldr r2, [r3, #12] 800188c: f022 0280 bic.w r2, r2, #128 ; 0x80 8001890: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8001892: 68da ldr r2, [r3, #12] 8001894: f042 0240 orr.w r2, r2, #64 ; 0x40 8001898: 60da str r2, [r3, #12] 800189a: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 800189c: 3201 adds r2, #1 800189e: e7ee b.n 800187e huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 80018a0: 1c51 adds r1, r2, #1 80018a2: 6221 str r1, [r4, #32] 80018a4: 7812 ldrb r2, [r2, #0] 80018a6: 605a str r2, [r3, #4] 80018a8: e7ea b.n 8001880 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 80018aa: 0650 lsls r0, r2, #25 80018ac: d50b bpl.n 80018c6 80018ae: 064a lsls r2, r1, #25 80018b0: d509 bpl.n 80018c6 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80018b2: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 80018b4: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 80018b6: f022 0240 bic.w r2, r2, #64 ; 0x40 80018ba: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 80018bc: 2320 movs r3, #32 80018be: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 80018c2: f7ff fed9 bl 8001678 80018c6: bd70 pop {r4, r5, r6, pc} 80018c8: 080018cd .word 0x080018cd 080018cc : { 80018cc: b508 push {r3, lr} huart->RxXferCount = 0x00U; 80018ce: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80018d0: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 80018d2: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 80018d4: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 80018d6: f7ff ff30 bl 800173a 80018da: bd08 pop {r3, pc} 080018dc : * Header Check Function * ***/ #define Bluecell_BootStart 0x0b void Firmware_BootStart_Signal(){ 80018dc: b507 push {r0, r1, r2, lr} uint8_t bootdata[5] = {0xbe,Bluecell_BootStart,0x02,0,0xeb}; 80018de: 4b0b ldr r3, [pc, #44] ; (800190c ) bootdata[bluecell_crc] = STH30_CreateCrc(&bootdata[bluecell_type],bootdata[bluecell_length]); 80018e0: 2102 movs r1, #2 uint8_t bootdata[5] = {0xbe,Bluecell_BootStart,0x02,0,0xeb}; 80018e2: 6818 ldr r0, [r3, #0] 80018e4: 791b ldrb r3, [r3, #4] 80018e6: 9000 str r0, [sp, #0] bootdata[bluecell_crc] = STH30_CreateCrc(&bootdata[bluecell_type],bootdata[bluecell_length]); 80018e8: f10d 0001 add.w r0, sp, #1 uint8_t bootdata[5] = {0xbe,Bluecell_BootStart,0x02,0,0xeb}; 80018ec: f88d 3004 strb.w r3, [sp, #4] bootdata[bluecell_crc] = STH30_CreateCrc(&bootdata[bluecell_type],bootdata[bluecell_length]); 80018f0: f000 f866 bl 80019c0 Uart1_Data_Send(&bootdata[bluecell_stx],bootdata[bluecell_length] + 3); 80018f4: f89d 1002 ldrb.w r1, [sp, #2] bootdata[bluecell_crc] = STH30_CreateCrc(&bootdata[bluecell_type],bootdata[bluecell_length]); 80018f8: f88d 0003 strb.w r0, [sp, #3] Uart1_Data_Send(&bootdata[bluecell_stx],bootdata[bluecell_length] + 3); 80018fc: 3103 adds r1, #3 80018fe: 4668 mov r0, sp 8001900: f000 fb90 bl 8002024 } 8001904: b003 add sp, #12 8001906: f85d fb04 ldr.w pc, [sp], #4 800190a: bf00 nop 800190c: 08003158 .word 0x08003158 08001910 : void FirmwareUpdateStart(uint8_t* data){ 8001910: b573 push {r0, r1, r4, r5, r6, lr} 8001912: 4604 mov r4, r0 uint8_t ret = 0,crccheck = 0; uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe}; 8001914: 4b26 ldr r3, [pc, #152] ; (80019b0 ) crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 8001916: 78a1 ldrb r1, [r4, #2] uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe}; 8001918: 6818 ldr r0, [r3, #0] 800191a: 791b ldrb r3, [r3, #4] 800191c: 9000 str r0, [sp, #0] 800191e: f88d 3004 strb.w r3, [sp, #4] crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 8001922: 1863 adds r3, r4, r1 8001924: 785a ldrb r2, [r3, #1] 8001926: 1c60 adds r0, r4, #1 8001928: f000 f865 bl 80019f6 if(crccheck == NO_ERROR){ 800192c: b2c0 uxtb r0, r0 800192e: 2801 cmp r0, #1 8001930: d00b beq.n 800194a 8001932: 2300 movs r3, #0 ret = Flash_write(&data[0]); if(ret == 1) tempdata[bluecell_type] = FirmwareUpdataNak; }else{ for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) printf("%02x ",data[i]); 8001934: 4e1f ldr r6, [pc, #124] ; (80019b4 ) for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) 8001936: 78a2 ldrb r2, [r4, #2] 8001938: 1c5d adds r5, r3, #1 800193a: 3202 adds r2, #2 800193c: b2db uxtb r3, r3 800193e: 429a cmp r2, r3 8001940: da2f bge.n 80019a2 printf("Check Sum error \n"); 8001942: 481d ldr r0, [pc, #116] ; (80019b8 ) 8001944: f000 fc42 bl 80021cc 8001948: e00d b.n 8001966 tempdata[bluecell_type] = FirmwareUpdataAck; 800194a: 2311 movs r3, #17 800194c: f88d 3001 strb.w r3, [sp, #1] if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte 8001950: 7863 ldrb r3, [r4, #1] 8001952: 2bdd cmp r3, #221 ; 0xdd 8001954: d001 beq.n 800195a 8001956: 2bee cmp r3, #238 ; 0xee 8001958: d108 bne.n 800196c ret = Flash_write(&data[0]); 800195a: 4620 mov r0, r4 800195c: f000 f8c6 bl 8001aec if(ret == 1) 8001960: b2c0 uxtb r0, r0 8001962: 2801 cmp r0, #1 8001964: d102 bne.n 800196c tempdata[bluecell_type] = FirmwareUpdataNak; 8001966: 2322 movs r3, #34 ; 0x22 8001968: f88d 3001 strb.w r3, [sp, #1] } tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]); 800196c: f89d 1002 ldrb.w r1, [sp, #2] 8001970: f10d 0001 add.w r0, sp, #1 8001974: f000 f824 bl 80019c0 if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){ 8001978: 7863 ldrb r3, [r4, #1] tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]); 800197a: f88d 0003 strb.w r0, [sp, #3] if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){ 800197e: 2bee cmp r3, #238 ; 0xee 8001980: d007 beq.n 8001992 8001982: 2b0a cmp r3, #10 8001984: d005 beq.n 8001992 Uart1_Data_Send(&tempdata[bluecell_stx],tempdata[bluecell_length] + 3); 8001986: f89d 1002 ldrb.w r1, [sp, #2] 800198a: 4668 mov r0, sp 800198c: 3103 adds r1, #3 800198e: f000 fb49 bl 8002024 } if(data[bluecell_type] == 0xEE) 8001992: 7863 ldrb r3, [r4, #1] 8001994: 2bee cmp r3, #238 ; 0xee 8001996: d102 bne.n 800199e printf("update Complete \n"); 8001998: 4808 ldr r0, [pc, #32] ; (80019bc ) 800199a: f000 fc17 bl 80021cc } 800199e: b002 add sp, #8 80019a0: bd70 pop {r4, r5, r6, pc} printf("%02x ",data[i]); 80019a2: 5ce1 ldrb r1, [r4, r3] 80019a4: 4630 mov r0, r6 80019a6: f000 fb9d bl 80020e4 80019aa: 462b mov r3, r5 80019ac: e7c3 b.n 8001936 80019ae: bf00 nop 80019b0: 0800315d .word 0x0800315d 80019b4: 08003162 .word 0x08003162 80019b8: 08003168 .word 0x08003168 80019bc: 08003179 .word 0x08003179 080019c0 : } return(crc16 == checksum ? CHECKSUM_ERROR : NO_ERROR ); } uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 80019c0: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80019c2: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80019c4: 4604 mov r4, r0 80019c6: 1a22 subs r2, r4, r0 80019c8: b2d2 uxtb r2, r2 80019ca: 4291 cmp r1, r2 80019cc: d801 bhi.n 80019d2 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 80019ce: 4618 mov r0, r3 80019d0: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 80019d2: f814 2b01 ldrb.w r2, [r4], #1 80019d6: 4053 eors r3, r2 80019d8: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 80019da: f013 0f80 tst.w r3, #128 ; 0x80 80019de: f102 32ff add.w r2, r2, #4294967295 80019e2: ea4f 0343 mov.w r3, r3, lsl #1 80019e6: bf18 it ne 80019e8: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 80019ec: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 80019f0: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 80019f2: d1f2 bne.n 80019da 80019f4: e7e7 b.n 80019c6 080019f6 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 80019f6: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 80019f8: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 80019fa: 4605 mov r5, r0 80019fc: 1a2c subs r4, r5, r0 80019fe: b2e4 uxtb r4, r4 8001a00: 42a1 cmp r1, r4 8001a02: d803 bhi.n 8001a0c else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8001a04: 1a9b subs r3, r3, r2 8001a06: 4258 negs r0, r3 8001a08: 4158 adcs r0, r3 8001a0a: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8001a0c: f815 4b01 ldrb.w r4, [r5], #1 8001a10: 4063 eors r3, r4 8001a12: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001a14: f013 0f80 tst.w r3, #128 ; 0x80 8001a18: f104 34ff add.w r4, r4, #4294967295 8001a1c: ea4f 0343 mov.w r3, r3, lsl #1 8001a20: bf18 it ne 8001a22: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001a26: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8001a2a: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001a2c: d1f2 bne.n 8001a14 8001a2e: e7e5 b.n 80019fc 08001a30 : uint32_t Address = FLASH_USER_START_ADDR; typedef void (*fptr)(void); fptr jump_to_app; uint32_t jump_addr; void Jump_App(void){ 8001a30: b5b0 push {r4, r5, r7, lr} __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 8001a32: 4a0d ldr r2, [pc, #52] ; (8001a68 ) void Jump_App(void){ 8001a34: af00 add r7, sp, #0 __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 8001a36: 69d3 ldr r3, [r2, #28] printf("boot loader start\n"); //메세�? 출력 8001a38: 480c ldr r0, [pc, #48] ; (8001a6c ) __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 8001a3a: f023 0310 bic.w r3, r3, #16 8001a3e: 61d3 str r3, [r2, #28] printf("boot loader start\n"); //메세�? 출력 8001a40: f000 fbc4 bl 80021cc jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8001a44: 4b0a ldr r3, [pc, #40] ; (8001a70 ) 8001a46: 4a0b ldr r2, [pc, #44] ; (8001a74 ) 8001a48: 681b ldr r3, [r3, #0] jump_to_app = (fptr) jump_addr; 8001a4a: 4c0b ldr r4, [pc, #44] ; (8001a78 ) /* init user app's sp */ printf("jump!\n"); 8001a4c: 480b ldr r0, [pc, #44] ; (8001a7c ) jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); 8001a4e: 6013 str r3, [r2, #0] jump_to_app = (fptr) jump_addr; 8001a50: 6023 str r3, [r4, #0] printf("jump!\n"); 8001a52: f000 fbbb bl 80021cc __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); 8001a56: 4b0a ldr r3, [pc, #40] ; (8001a80 ) 8001a58: 681b ldr r3, [r3, #0] __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); 8001a5a: f383 8808 msr MSP, r3 jump_to_app(); 8001a5e: 6823 ldr r3, [r4, #0] } 8001a60: 46bd mov sp, r7 8001a62: e8bd 40b0 ldmia.w sp!, {r4, r5, r7, lr} jump_to_app(); 8001a66: 4718 bx r3 8001a68: 40021000 .word 0x40021000 8001a6c: 080031a5 .word 0x080031a5 8001a70: 08008004 .word 0x08008004 8001a74: 200004f0 .word 0x200004f0 8001a78: 200004f4 .word 0x200004f4 8001a7c: 080031b7 .word 0x080031b7 8001a80: 08008000 .word 0x08008000 08001a84 : } #endif // PYJ.2019.03.27_END -- } uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001a84: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint16_t Firmdata = 0; uint8_t ret = 0; for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001a88: 2400 movs r4, #0 uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001a8a: 4607 mov r7, r0 uint8_t ret = 0; 8001a8c: 4626 mov r6, r4 Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001a8e: 4d15 ldr r5, [pc, #84] ; (8001ae4 ) printf("HAL NOT OK \n"); 8001a90: f8df 8054 ldr.w r8, [pc, #84] ; 8001ae8 for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001a94: 78bb ldrb r3, [r7, #2] 8001a96: 3b02 subs r3, #2 8001a98: 429c cmp r4, r3 8001a9a: db02 blt.n 8001aa2 Address += 2; if(!(i%FirmwareUpdateDelay)) HAL_Delay(1); } return ret; } 8001a9c: 4630 mov r0, r6 8001a9e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); 8001aa2: 193b adds r3, r7, r4 8001aa4: 78da ldrb r2, [r3, #3] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001aa6: 791b ldrb r3, [r3, #4] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001aa8: 6829 ldr r1, [r5, #0] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001aaa: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001aae: b292 uxth r2, r2 8001ab0: 2300 movs r3, #0 8001ab2: 2001 movs r0, #1 8001ab4: f7fe feba bl 800082c 8001ab8: b118 cbz r0, 8001ac2 printf("HAL NOT OK \n"); 8001aba: 4640 mov r0, r8 8001abc: f000 fb86 bl 80021cc ret = 1; 8001ac0: 2601 movs r6, #1 if(!(i%FirmwareUpdateDelay)) 8001ac2: 2232 movs r2, #50 ; 0x32 Address += 2; 8001ac4: 682b ldr r3, [r5, #0] 8001ac6: 3302 adds r3, #2 8001ac8: 602b str r3, [r5, #0] if(!(i%FirmwareUpdateDelay)) 8001aca: fbb4 f3f2 udiv r3, r4, r2 8001ace: fb02 4313 mls r3, r2, r3, r4 8001ad2: f013 0fff tst.w r3, #255 ; 0xff 8001ad6: d102 bne.n 8001ade HAL_Delay(1); 8001ad8: 2001 movs r0, #1 8001ada: f7fe fbf7 bl 80002cc for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){ 8001ade: 3402 adds r4, #2 8001ae0: b2e4 uxtb r4, r4 8001ae2: e7d7 b.n 8001a94 8001ae4: 20000008 .word 0x20000008 8001ae8: 0800318a .word 0x0800318a 08001aec : /*Variable used for Erase procedure*/ static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; /* Fill EraseInit structure*/ EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001aec: 2300 movs r3, #0 { 8001aee: b573 push {r0, r1, r4, r5, r6, lr} EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001af0: 4d16 ldr r5, [pc, #88] ; (8001b4c ) EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 8001af2: 4c17 ldr r4, [pc, #92] ; (8001b50 ) EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001af4: 602b str r3, [r5, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001af6: 4b17 ldr r3, [pc, #92] ; (8001b54 ) { 8001af8: 4606 mov r6, r0 EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001afa: 60ab str r3, [r5, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8001afc: 231f movs r3, #31 8001afe: 60eb str r3, [r5, #12] __HAL_RCC_TIM6_CLK_DISABLE(); // 매인???��머�?? ?���??��?��?�� 8001b00: 69e3 ldr r3, [r4, #28] 8001b02: f023 0310 bic.w r3, r3, #16 8001b06: 61e3 str r3, [r4, #28] HAL_FLASH_Unlock(); // lock ??�? 8001b08: f7fe fe4a bl 80007a0 if(flashinit == 0){ 8001b0c: 4b12 ldr r3, [pc, #72] ; (8001b58 ) 8001b0e: 781a ldrb r2, [r3, #0] 8001b10: b94a cbnz r2, 8001b26 flashinit= 1; 8001b12: 2201 movs r2, #1 //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001b14: 4911 ldr r1, [pc, #68] ; (8001b5c ) 8001b16: 4628 mov r0, r5 flashinit= 1; 8001b18: 701a strb r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001b1a: f7fe fef1 bl 8000900 8001b1e: b110 cbz r0, 8001b26 printf("Erase Failed \r\n"); 8001b20: 480f ldr r0, [pc, #60] ; (8001b60 ) 8001b22: f000 fb53 bl 80021cc } } // FLASH_If_Erase(); ret = Flash_RGB_Data_Write(&data[bluecell_stx]); 8001b26: 4630 mov r0, r6 8001b28: f7ff ffac bl 8001a84 8001b2c: 4605 mov r5, r0 HAL_FLASH_Lock(); // lock ?��그기 8001b2e: f7fe fe49 bl 80007c4 __HAL_RCC_TIM6_CLK_ENABLE(); // 매인???��머�?? ?��?��?��?��?��?�� return ret; } 8001b32: 4628 mov r0, r5 __HAL_RCC_TIM6_CLK_ENABLE(); // 매인???��머�?? ?��?��?��?��?��?�� 8001b34: 69e3 ldr r3, [r4, #28] 8001b36: f043 0310 orr.w r3, r3, #16 8001b3a: 61e3 str r3, [r4, #28] 8001b3c: 69e3 ldr r3, [r4, #28] 8001b3e: f003 0310 and.w r3, r3, #16 8001b42: 9301 str r3, [sp, #4] 8001b44: 9b01 ldr r3, [sp, #4] } 8001b46: b002 add sp, #8 8001b48: bd70 pop {r4, r5, r6, pc} 8001b4a: bf00 nop 8001b4c: 20000094 .word 0x20000094 8001b50: 40021000 .word 0x40021000 8001b54: 08008000 .word 0x08008000 8001b58: 200000a8 .word 0x200000a8 8001b5c: 200000a4 .word 0x200000a4 8001b60: 08003196 .word 0x08003196 08001b64 : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8001b64: 6802 ldr r2, [r0, #0] 8001b66: 4b08 ldr r3, [pc, #32] ; (8001b88 ) 8001b68: 429a cmp r2, r3 8001b6a: d10b bne.n 8001b84 UartTimerCnt++; 8001b6c: 4a07 ldr r2, [pc, #28] ; (8001b8c ) 8001b6e: 6813 ldr r3, [r2, #0] 8001b70: 3301 adds r3, #1 8001b72: 6013 str r3, [r2, #0] LedTimerCnt++; 8001b74: 4a06 ldr r2, [pc, #24] ; (8001b90 ) 8001b76: 6813 ldr r3, [r2, #0] 8001b78: 3301 adds r3, #1 8001b7a: 6013 str r3, [r2, #0] FirmwareTimerCnt++; 8001b7c: 4a05 ldr r2, [pc, #20] ; (8001b94 ) 8001b7e: 6813 ldr r3, [r2, #0] 8001b80: 3301 adds r3, #1 8001b82: 6013 str r3, [r2, #0] 8001b84: 4770 bx lr 8001b86: bf00 nop 8001b88: 40001000 .word 0x40001000 8001b8c: 200000b4 .word 0x200000b4 8001b90: 200000b0 .word 0x200000b0 8001b94: 200000ac .word 0x200000ac 08001b98 <_write>: } } int _write (int file, uint8_t *ptr, uint16_t len) { 8001b98: b510 push {r4, lr} 8001b9a: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8001b9c: 230a movs r3, #10 8001b9e: 4802 ldr r0, [pc, #8] ; (8001ba8 <_write+0x10>) 8001ba0: f7ff fcc6 bl 8001530 return len; } 8001ba4: 4620 mov r0, r4 8001ba6: bd10 pop {r4, pc} 8001ba8: 2000053c .word 0x2000053c 08001bac : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001bac: b510 push {r4, lr} 8001bae: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001bb0: 2228 movs r2, #40 ; 0x28 8001bb2: 2100 movs r1, #0 8001bb4: a806 add r0, sp, #24 8001bb6: f000 fa8d bl 80020d4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001bba: 2214 movs r2, #20 8001bbc: 2100 movs r1, #0 8001bbe: a801 add r0, sp, #4 8001bc0: f000 fa88 bl 80020d4 /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001bc4: 2301 movs r3, #1 8001bc6: 930a str r3, [sp, #40] ; 0x28 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001bc8: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001bca: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001bcc: 930b str r3, [sp, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15; 8001bce: f44f 1350 mov.w r3, #3407872 ; 0x340000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001bd2: a806 add r0, sp, #24 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15; 8001bd4: 930f str r3, [sp, #60] ; 0x3c RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001bd6: 9406 str r4, [sp, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001bd8: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001bda: f7fe ffd1 bl 8000b80 { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001bde: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001be0: f44f 6280 mov.w r2, #1024 ; 0x400 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001be4: 9301 str r3, [sp, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001be6: 2300 movs r3, #0 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001be8: 4621 mov r1, r4 8001bea: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001bec: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001bee: 9303 str r3, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001bf0: 9204 str r2, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001bf2: 9305 str r3, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001bf4: f7ff f98c bl 8000f10 { Error_Handler(); } } 8001bf8: b010 add sp, #64 ; 0x40 8001bfa: bd10 pop {r4, pc} 08001bfc
: { 8001bfc: b57f push {r0, r1, r2, r3, r4, r5, r6, lr} static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8001bfe: 4d47 ldr r5, [pc, #284] ; (8001d1c ) HAL_Init(); 8001c00: f7fe fb40 bl 8000284 SystemClock_Config(); 8001c04: f7ff ffd2 bl 8001bac GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001c08: 2210 movs r2, #16 8001c0a: 2100 movs r1, #0 8001c0c: a802 add r0, sp, #8 8001c0e: f000 fa61 bl 80020d4 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c12: 69ab ldr r3, [r5, #24] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001c14: 2200 movs r2, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c16: f043 0304 orr.w r3, r3, #4 8001c1a: 61ab str r3, [r5, #24] 8001c1c: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001c1e: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c22: f003 0304 and.w r3, r3, #4 8001c26: 9301 str r3, [sp, #4] HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001c28: 483d ldr r0, [pc, #244] ; (8001d20 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c2a: 9b01 ldr r3, [sp, #4] HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET); 8001c2c: f7fe ffa2 bl 8000b74 /*Configure GPIO pin : PA15 */ GPIO_InitStruct.Pin = GPIO_PIN_15; 8001c30: f44f 4300 mov.w r3, #32768 ; 0x8000 8001c34: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001c36: 2301 movs r3, #1 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001c38: 2400 movs r4, #0 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001c3a: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001c3c: 2302 movs r3, #2 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001c3e: a902 add r1, sp, #8 8001c40: 4837 ldr r0, [pc, #220] ; (8001d20 ) GPIO_InitStruct.Pull = GPIO_NOPULL; 8001c42: 9404 str r4, [sp, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001c44: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001c46: f7fe fea9 bl 800099c __HAL_RCC_DMA1_CLK_ENABLE(); 8001c4a: 696b ldr r3, [r5, #20] huart1.Instance = USART1; 8001c4c: 4835 ldr r0, [pc, #212] ; (8001d24 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001c4e: f043 0301 orr.w r3, r3, #1 8001c52: 616b str r3, [r5, #20] 8001c54: 696b ldr r3, [r5, #20] huart1.Init.BaudRate = 115200; 8001c56: 4a34 ldr r2, [pc, #208] ; (8001d28 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001c58: f003 0301 and.w r3, r3, #1 8001c5c: 9300 str r3, [sp, #0] 8001c5e: 9b00 ldr r3, [sp, #0] huart1.Init.BaudRate = 115200; 8001c60: f44f 33e1 mov.w r3, #115200 ; 0x1c200 8001c64: e880 000c stmia.w r0, {r2, r3} huart1.Init.Mode = UART_MODE_TX_RX; 8001c68: 230c movs r3, #12 huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001c6a: 6084 str r4, [r0, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8001c6c: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 8001c6e: 6104 str r4, [r0, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8001c70: 6143 str r3, [r0, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001c72: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001c74: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8001c76: f7ff fc2d bl 80014d4 htim6.Init.Prescaler = 6000 - 1; 8001c7a: f241 736f movw r3, #5999 ; 0x176f htim6.Instance = TIM6; 8001c7e: 4d2b ldr r5, [pc, #172] ; (8001d2c ) htim6.Init.Prescaler = 6000 - 1; 8001c80: 492b ldr r1, [pc, #172] ; (8001d30 ) if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001c82: 4628 mov r0, r5 htim6.Init.Prescaler = 6000 - 1; 8001c84: e885 000a stmia.w r5, {r1, r3} htim6.Init.Period = 10 - 1; 8001c88: 2309 movs r3, #9 htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8001c8a: 60ac str r4, [r5, #8] htim6.Init.Period = 10 - 1; 8001c8c: 60eb str r3, [r5, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001c8e: 61ac str r4, [r5, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8001c90: 9402 str r4, [sp, #8] 8001c92: 9403 str r4, [sp, #12] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001c94: f7ff fb0c bl 80012b0 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001c98: a902 add r1, sp, #8 8001c9a: 4628 mov r0, r5 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001c9c: 9402 str r4, [sp, #8] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001c9e: 9403 str r4, [sp, #12] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001ca0: f7ff fb20 bl 80012e4 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8001ca4: 4622 mov r2, r4 8001ca6: 4621 mov r1, r4 8001ca8: 200f movs r0, #15 8001caa: f7fe fb33 bl 8000314 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 8001cae: 200f movs r0, #15 8001cb0: f7fe fb64 bl 800037c HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8001cb4: 4622 mov r2, r4 8001cb6: 4621 mov r1, r4 8001cb8: 2025 movs r0, #37 ; 0x25 8001cba: f7fe fb2b bl 8000314 HAL_NVIC_EnableIRQ(USART1_IRQn); 8001cbe: 2025 movs r0, #37 ; 0x25 8001cc0: f7fe fb5c bl 800037c HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8001cc4: 4622 mov r2, r4 8001cc6: 4621 mov r1, r4 8001cc8: 2036 movs r0, #54 ; 0x36 8001cca: f7fe fb23 bl 8000314 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001cce: 2036 movs r0, #54 ; 0x36 8001cd0: f7fe fb54 bl 800037c HAL_TIM_Base_Start_IT(&htim6); 8001cd4: 4628 mov r0, r5 8001cd6: f7ff f9ed bl 80010b4 setbuf(stdout, NULL); 8001cda: 4b16 ldr r3, [pc, #88] ; (8001d34 ) 8001cdc: 4621 mov r1, r4 8001cde: 681b ldr r3, [r3, #0] while (TerminalQueue.data > 0 && UartTimerCnt > 1500) GetDataFromUartQueue(&hTerminal); 8001ce0: 4c15 ldr r4, [pc, #84] ; (8001d38 ) setbuf(stdout, NULL); 8001ce2: 6898 ldr r0, [r3, #8] 8001ce4: f000 fa7a bl 80021dc Firmware_BootStart_Signal(); 8001ce8: f7ff fdf8 bl 80018dc InitUartQueue(&TerminalQueue); 8001cec: 4812 ldr r0, [pc, #72] ; (8001d38 ) 8001cee: f000 f92b bl 8001f48 while(FirmwareTimerCnt > 100000) Jump_App(); 8001cf2: 4d12 ldr r5, [pc, #72] ; (8001d3c ) 8001cf4: 4e12 ldr r6, [pc, #72] ; (8001d40 ) while (TerminalQueue.data > 0 && UartTimerCnt > 1500) GetDataFromUartQueue(&hTerminal); 8001cf6: 68a3 ldr r3, [r4, #8] 8001cf8: 2b00 cmp r3, #0 8001cfa: dd0b ble.n 8001d14 8001cfc: 4b11 ldr r3, [pc, #68] ; (8001d44 ) 8001cfe: 681a ldr r2, [r3, #0] 8001d00: f240 53dc movw r3, #1500 ; 0x5dc 8001d04: 429a cmp r2, r3 8001d06: d905 bls.n 8001d14 8001d08: 4806 ldr r0, [pc, #24] ; (8001d24 ) 8001d0a: f000 f92b bl 8001f64 8001d0e: e7f2 b.n 8001cf6 while(FirmwareTimerCnt > 100000) Jump_App(); 8001d10: f7ff fe8e bl 8001a30 8001d14: 682b ldr r3, [r5, #0] 8001d16: 42b3 cmp r3, r6 8001d18: d8fa bhi.n 8001d10 8001d1a: e7ec b.n 8001cf6 8001d1c: 40021000 .word 0x40021000 8001d20: 40010800 .word 0x40010800 8001d24: 2000053c .word 0x2000053c 8001d28: 40013800 .word 0x40013800 8001d2c: 2000057c .word 0x2000057c 8001d30: 40001000 .word 0x40001000 8001d34: 20000010 .word 0x20000010 8001d38: 200005bc .word 0x200005bc 8001d3c: 200000ac .word 0x200000ac 8001d40: 000186a0 .word 0x000186a0 8001d44: 200000b4 .word 0x200000b4 08001d48 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001d48: 4770 bx lr ... 08001d4c : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001d4c: 4b0e ldr r3, [pc, #56] ; (8001d88 ) { 8001d4e: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8001d50: 699a ldr r2, [r3, #24] 8001d52: f042 0201 orr.w r2, r2, #1 8001d56: 619a str r2, [r3, #24] 8001d58: 699a ldr r2, [r3, #24] 8001d5a: f002 0201 and.w r2, r2, #1 8001d5e: 9200 str r2, [sp, #0] 8001d60: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8001d62: 69da ldr r2, [r3, #28] 8001d64: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8001d68: 61da str r2, [r3, #28] 8001d6a: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001d6c: 4a07 ldr r2, [pc, #28] ; (8001d8c ) __HAL_RCC_PWR_CLK_ENABLE(); 8001d6e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001d72: 9301 str r3, [sp, #4] 8001d74: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001d76: 6853 ldr r3, [r2, #4] 8001d78: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8001d7c: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8001d80: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001d82: b002 add sp, #8 8001d84: 4770 bx lr 8001d86: bf00 nop 8001d88: 40021000 .word 0x40021000 8001d8c: 40010000 .word 0x40010000 08001d90 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8001d90: 6802 ldr r2, [r0, #0] 8001d92: 4b08 ldr r3, [pc, #32] ; (8001db4 ) { 8001d94: b082 sub sp, #8 if(htim_base->Instance==TIM6) 8001d96: 429a cmp r2, r3 8001d98: d10a bne.n 8001db0 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8001d9a: f503 3300 add.w r3, r3, #131072 ; 0x20000 8001d9e: 69da ldr r2, [r3, #28] 8001da0: f042 0210 orr.w r2, r2, #16 8001da4: 61da str r2, [r3, #28] 8001da6: 69db ldr r3, [r3, #28] 8001da8: f003 0310 and.w r3, r3, #16 8001dac: 9301 str r3, [sp, #4] 8001dae: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8001db0: b002 add sp, #8 8001db2: 4770 bx lr 8001db4: 40001000 .word 0x40001000 08001db8 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001db8: b570 push {r4, r5, r6, lr} 8001dba: 4606 mov r6, r0 8001dbc: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001dbe: 2210 movs r2, #16 8001dc0: 2100 movs r1, #0 8001dc2: a802 add r0, sp, #8 8001dc4: f000 f986 bl 80020d4 if(huart->Instance==USART1) 8001dc8: 6832 ldr r2, [r6, #0] 8001dca: 4b20 ldr r3, [pc, #128] ; (8001e4c ) 8001dcc: 429a cmp r2, r3 8001dce: d13b bne.n 8001e48 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8001dd0: f503 4358 add.w r3, r3, #55296 ; 0xd800 8001dd4: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001dd6: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 8001dd8: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8001ddc: 619a str r2, [r3, #24] 8001dde: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001de0: 481b ldr r0, [pc, #108] ; (8001e50 ) __HAL_RCC_USART1_CLK_ENABLE(); 8001de2: f402 4280 and.w r2, r2, #16384 ; 0x4000 8001de6: 9200 str r2, [sp, #0] 8001de8: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001dea: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001dec: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001dee: f042 0204 orr.w r2, r2, #4 8001df2: 619a str r2, [r3, #24] 8001df4: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 8001df6: 4c17 ldr r4, [pc, #92] ; (8001e54 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8001df8: f003 0304 and.w r3, r3, #4 8001dfc: 9301 str r3, [sp, #4] 8001dfe: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8001e00: f44f 7300 mov.w r3, #512 ; 0x200 8001e04: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001e06: 2302 movs r3, #2 8001e08: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001e0a: 2303 movs r3, #3 8001e0c: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001e0e: f7fe fdc5 bl 800099c GPIO_InitStruct.Pin = GPIO_PIN_10; 8001e12: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001e16: 480e ldr r0, [pc, #56] ; (8001e50 ) 8001e18: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 8001e1a: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001e1c: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001e1e: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001e20: f7fe fdbc bl 800099c hdma_usart1_rx.Instance = DMA1_Channel5; 8001e24: 4b0c ldr r3, [pc, #48] ; (8001e58 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8001e26: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 8001e28: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8001e2c: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 8001e2e: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 8001e30: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 8001e32: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 8001e34: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 8001e36: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 8001e38: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 8001e3a: f7fe fac1 bl 80003c0 8001e3e: b108 cbz r0, 8001e44 { Error_Handler(); 8001e40: f7ff ff82 bl 8001d48 } __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 8001e44: 6374 str r4, [r6, #52] ; 0x34 8001e46: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8001e48: b006 add sp, #24 8001e4a: bd70 pop {r4, r5, r6, pc} 8001e4c: 40013800 .word 0x40013800 8001e50: 40010800 .word 0x40010800 8001e54: 200004f8 .word 0x200004f8 8001e58: 40020058 .word 0x40020058 08001e5c : 8001e5c: 4770 bx lr 08001e5e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001e5e: e7fe b.n 8001e5e 08001e60 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001e60: e7fe b.n 8001e60 08001e62 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8001e62: e7fe b.n 8001e62 08001e64 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001e64: e7fe b.n 8001e64 08001e66 : 8001e66: 4770 bx lr 08001e68 : 8001e68: 4770 bx lr 08001e6a : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8001e6a: 4770 bx lr 08001e6c : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001e6c: f7fe ba1c b.w 80002a8 08001e70 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8001e70: 4801 ldr r0, [pc, #4] ; (8001e78 ) 8001e72: f7fe bb91 b.w 8000598 8001e76: bf00 nop 8001e78: 200004f8 .word 0x200004f8 08001e7c : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8001e7c: 4801 ldr r0, [pc, #4] ; (8001e84 ) 8001e7e: f7ff bc85 b.w 800178c 8001e82: bf00 nop 8001e84: 2000053c .word 0x2000053c 08001e88 : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8001e88: 4801 ldr r0, [pc, #4] ; (8001e90 ) 8001e8a: f7ff b922 b.w 80010d2 8001e8e: bf00 nop 8001e90: 2000057c .word 0x2000057c 08001e94 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8001e94: b570 push {r4, r5, r6, lr} 8001e96: 460e mov r6, r1 8001e98: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8001e9a: 460c mov r4, r1 8001e9c: 1ba3 subs r3, r4, r6 8001e9e: 429d cmp r5, r3 8001ea0: dc01 bgt.n 8001ea6 <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8001ea2: 4628 mov r0, r5 8001ea4: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 8001ea6: f3af 8000 nop.w 8001eaa: f804 0b01 strb.w r0, [r4], #1 8001eae: e7f5 b.n 8001e9c <_read+0x8> 08001eb0 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8001eb0: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8001eb2: 4b0a ldr r3, [pc, #40] ; (8001edc <_sbrk+0x2c>) { 8001eb4: 4602 mov r2, r0 if (heap_end == 0) 8001eb6: 6819 ldr r1, [r3, #0] 8001eb8: b909 cbnz r1, 8001ebe <_sbrk+0xe> heap_end = &end; 8001eba: 4909 ldr r1, [pc, #36] ; (8001ee0 <_sbrk+0x30>) 8001ebc: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8001ebe: 4669 mov r1, sp prev_heap_end = heap_end; 8001ec0: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8001ec2: 4402 add r2, r0 8001ec4: 428a cmp r2, r1 8001ec6: d906 bls.n 8001ed6 <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 8001ec8: f000 f8da bl 8002080 <__errno> 8001ecc: 230c movs r3, #12 8001ece: 6003 str r3, [r0, #0] return (caddr_t) -1; 8001ed0: f04f 30ff mov.w r0, #4294967295 8001ed4: bd08 pop {r3, pc} } heap_end += incr; 8001ed6: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 8001ed8: bd08 pop {r3, pc} 8001eda: bf00 nop 8001edc: 200000b8 .word 0x200000b8 8001ee0: 200015d8 .word 0x200015d8 08001ee4 <_close>: int _close(int file) { return -1; } 8001ee4: f04f 30ff mov.w r0, #4294967295 8001ee8: 4770 bx lr 08001eea <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 8001eea: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 8001eee: 2000 movs r0, #0 st->st_mode = S_IFCHR; 8001ef0: 604b str r3, [r1, #4] } 8001ef2: 4770 bx lr 08001ef4 <_isatty>: int _isatty(int file) { return 1; } 8001ef4: 2001 movs r0, #1 8001ef6: 4770 bx lr 08001ef8 <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 8001ef8: 2000 movs r0, #0 8001efa: 4770 bx lr 08001efc : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8001efc: 4b0f ldr r3, [pc, #60] ; (8001f3c ) 8001efe: 681a ldr r2, [r3, #0] 8001f00: f042 0201 orr.w r2, r2, #1 8001f04: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 8001f06: 6859 ldr r1, [r3, #4] 8001f08: 4a0d ldr r2, [pc, #52] ; (8001f40 ) 8001f0a: 400a ands r2, r1 8001f0c: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8001f0e: 681a ldr r2, [r3, #0] 8001f10: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 8001f14: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8001f18: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8001f1a: 681a ldr r2, [r3, #0] 8001f1c: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8001f20: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 8001f22: 685a ldr r2, [r3, #4] 8001f24: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8001f28: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8001f2a: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8001f2e: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8001f30: f04f 6200 mov.w r2, #134217728 ; 0x8000000 8001f34: 4b03 ldr r3, [pc, #12] ; (8001f44 ) 8001f36: 609a str r2, [r3, #8] 8001f38: 4770 bx lr 8001f3a: bf00 nop 8001f3c: 40021000 .word 0x40021000 8001f40: f8ff0000 .word 0xf8ff0000 8001f44: e000ed00 .word 0xe000ed00 08001f48 : UARTQUEUE TerminalQueue; UARTQUEUE WifiQueue; void InitUartQueue(pUARTQUEUE pQueue) { pQueue->data = pQueue->head = pQueue->tail = 0; 8001f48: 2300 movs r3, #0 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8001f4a: 2201 movs r2, #1 pQueue->data = pQueue->head = pQueue->tail = 0; 8001f4c: 6043 str r3, [r0, #4] 8001f4e: 6003 str r3, [r0, #0] 8001f50: 6083 str r3, [r0, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8001f52: 4902 ldr r1, [pc, #8] ; (8001f5c ) 8001f54: 4802 ldr r0, [pc, #8] ; (8001f60 ) 8001f56: f7ff bb47 b.w 80015e8 8001f5a: bf00 nop 8001f5c: 200005c8 .word 0x200005c8 8001f60: 2000053c .word 0x2000053c 08001f64 : pQueue->data++; // HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 10); } void GetDataFromUartQueue(UART_HandleTypeDef *huart) { 8001f64: b57f push {r0, r1, r2, r3, r4, r5, r6, lr} pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8001f66: 4e17 ldr r6, [pc, #92] ; (8001fc4 ) 8001f68: 6834 ldr r4, [r6, #0] 8001f6a: 1c63 adds r3, r4, #1 8001f6c: 6033 str r3, [r6, #0] 8001f6e: 4b16 ldr r3, [pc, #88] ; (8001fc8 ) 8001f70: 685a ldr r2, [r3, #4] 8001f72: f103 010c add.w r1, r3, #12 8001f76: 5c55 ldrb r5, [r2, r1] pQueue->tail++; 8001f78: 3201 adds r2, #1 if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8001f7a: f5b2 6f00 cmp.w r2, #2048 ; 0x800 8001f7e: bfa8 it ge 8001f80: 2200 movge r2, #0 update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8001f82: 4912 ldr r1, [pc, #72] ; (8001fcc ) if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8001f84: 605a str r2, [r3, #4] update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8001f86: 550d strb r5, [r1, r4] pQueue->data--; 8001f88: 689c ldr r4, [r3, #8] 8001f8a: 460d mov r5, r1 8001f8c: 3c01 subs r4, #1 8001f8e: 609c str r4, [r3, #8] if(pQueue->data == 0){ 8001f90: b9ac cbnz r4, 8001fbe HAL_UART_Transmit(dst, &temp_buf[BLUECELL_HEADER00], 11, 3000); 8001f92: f640 33b8 movw r3, #3000 ; 0xbb8 8001f96: 220b movs r2, #11 8001f98: a901 add r1, sp, #4 8001f9a: 480d ldr r0, [pc, #52] ; (8001fd0 ) 8001f9c: f7ff fac8 bl 8001530 // for(int i = 0; i < cnt; i++){ // printf("%02x",update_data_buf[i]); // } #endif // PYJ.2019.07.15_END -- cnt = 0; FirmwareUpdateStart(&update_data_buf[0]); 8001fa0: 480a ldr r0, [pc, #40] ; (8001fcc ) cnt = 0; 8001fa2: 6034 str r4, [r6, #0] FirmwareUpdateStart(&update_data_buf[0]); 8001fa4: f7ff fcb4 bl 8001910 for(int i = 0; i < 1024; i++) update_data_buf[i] = 0; 8001fa8: 4623 mov r3, r4 8001faa: 552b strb r3, [r5, r4] for(int i = 0; i < 1024; i++) 8001fac: 3401 adds r4, #1 8001fae: f5b4 6f80 cmp.w r4, #1024 ; 0x400 8001fb2: d1fa bne.n 8001faa FirmwareTimerCnt = 0; 8001fb4: 4a07 ldr r2, [pc, #28] ; (8001fd4 ) HAL_Delay(1); 8001fb6: 2001 movs r0, #1 FirmwareTimerCnt = 0; 8001fb8: 6013 str r3, [r2, #0] HAL_Delay(1); 8001fba: f7fe f987 bl 80002cc } } 8001fbe: b004 add sp, #16 8001fc0: bd70 pop {r4, r5, r6, pc} 8001fc2: bf00 nop 8001fc4: 200000bc .word 0x200000bc 8001fc8: 200005bc .word 0x200005bc 8001fcc: 200000c0 .word 0x200000c0 8001fd0: 2000053c .word 0x2000053c 8001fd4: 200000ac .word 0x200000ac 08001fd8 : UartTimerCnt = 0; 8001fd8: 2300 movs r3, #0 { 8001fda: b510 push {r4, lr} UartTimerCnt = 0; 8001fdc: 4a0d ldr r2, [pc, #52] ; (8002014 ) pQueue->head++; 8001fde: 4c0e ldr r4, [pc, #56] ; (8002018 ) UartTimerCnt = 0; 8001fe0: 6013 str r3, [r2, #0] pQueue->head++; 8001fe2: 6822 ldr r2, [r4, #0] 8001fe4: 3201 adds r2, #1 8001fe6: f5b2 6f00 cmp.w r2, #2048 ; 0x800 8001fea: bfb8 it lt 8001fec: 4613 movlt r3, r2 8001fee: 6023 str r3, [r4, #0] pQueue->data++; 8001ff0: 68a3 ldr r3, [r4, #8] 8001ff2: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8001ff4: f5b3 6f00 cmp.w r3, #2048 ; 0x800 pQueue->data++; 8001ff8: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 8001ffa: db01 blt.n 8002000 GetDataFromUartQueue(huart); 8001ffc: f7ff ffb2 bl 8001f64 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8002000: 6823 ldr r3, [r4, #0] 8002002: 4906 ldr r1, [pc, #24] ; (800201c ) 8002004: 2201 movs r2, #1 } 8002006: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800200a: 4419 add r1, r3 800200c: 4804 ldr r0, [pc, #16] ; (8002020 ) 800200e: f7ff baeb b.w 80015e8 8002012: bf00 nop 8002014: 200000b4 .word 0x200000b4 8002018: 200005bc .word 0x200005bc 800201c: 200005c8 .word 0x200005c8 8002020: 2000053c .word 0x2000053c 08002024 : void Uart1_Data_Send(uint8_t* data,uint8_t size){ HAL_UART_Transmit(&huart1, data,size, 10); 8002024: 460a mov r2, r1 8002026: 230a movs r3, #10 8002028: 4601 mov r1, r0 800202a: 4801 ldr r0, [pc, #4] ; (8002030 ) 800202c: f7ff ba80 b.w 8001530 8002030: 2000053c .word 0x2000053c 08002034 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8002034: 2100 movs r1, #0 b LoopCopyDataInit 8002036: e003 b.n 8002040 08002038 : CopyDataInit: ldr r3, =_sidata 8002038: 4b0b ldr r3, [pc, #44] ; (8002068 ) ldr r3, [r3, r1] 800203a: 585b ldr r3, [r3, r1] str r3, [r0, r1] 800203c: 5043 str r3, [r0, r1] adds r1, r1, #4 800203e: 3104 adds r1, #4 08002040 : LoopCopyDataInit: ldr r0, =_sdata 8002040: 480a ldr r0, [pc, #40] ; (800206c ) ldr r3, =_edata 8002042: 4b0b ldr r3, [pc, #44] ; (8002070 ) adds r2, r0, r1 8002044: 1842 adds r2, r0, r1 cmp r2, r3 8002046: 429a cmp r2, r3 bcc CopyDataInit 8002048: d3f6 bcc.n 8002038 ldr r2, =_sbss 800204a: 4a0a ldr r2, [pc, #40] ; (8002074 ) b LoopFillZerobss 800204c: e002 b.n 8002054 0800204e : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 800204e: 2300 movs r3, #0 str r3, [r2], #4 8002050: f842 3b04 str.w r3, [r2], #4 08002054 : LoopFillZerobss: ldr r3, = _ebss 8002054: 4b08 ldr r3, [pc, #32] ; (8002078 ) cmp r2, r3 8002056: 429a cmp r2, r3 bcc FillZerobss 8002058: d3f9 bcc.n 800204e /* Call the clock system intitialization function.*/ bl SystemInit 800205a: f7ff ff4f bl 8001efc /* Call static constructors */ bl __libc_init_array 800205e: f000 f815 bl 800208c <__libc_init_array> /* Call the application's entry point.*/ bl main 8002062: f7ff fdcb bl 8001bfc
bx lr 8002066: 4770 bx lr ldr r3, =_sidata 8002068: 08003278 .word 0x08003278 ldr r0, =_sdata 800206c: 20000000 .word 0x20000000 ldr r3, =_edata 8002070: 20000074 .word 0x20000074 ldr r2, =_sbss 8002074: 20000078 .word 0x20000078 ldr r3, = _ebss 8002078: 200015d8 .word 0x200015d8 0800207c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800207c: e7fe b.n 800207c ... 08002080 <__errno>: 8002080: 4b01 ldr r3, [pc, #4] ; (8002088 <__errno+0x8>) 8002082: 6818 ldr r0, [r3, #0] 8002084: 4770 bx lr 8002086: bf00 nop 8002088: 20000010 .word 0x20000010 0800208c <__libc_init_array>: 800208c: b570 push {r4, r5, r6, lr} 800208e: 2500 movs r5, #0 8002090: 4e0c ldr r6, [pc, #48] ; (80020c4 <__libc_init_array+0x38>) 8002092: 4c0d ldr r4, [pc, #52] ; (80020c8 <__libc_init_array+0x3c>) 8002094: 1ba4 subs r4, r4, r6 8002096: 10a4 asrs r4, r4, #2 8002098: 42a5 cmp r5, r4 800209a: d109 bne.n 80020b0 <__libc_init_array+0x24> 800209c: f001 f848 bl 8003130 <_init> 80020a0: 2500 movs r5, #0 80020a2: 4e0a ldr r6, [pc, #40] ; (80020cc <__libc_init_array+0x40>) 80020a4: 4c0a ldr r4, [pc, #40] ; (80020d0 <__libc_init_array+0x44>) 80020a6: 1ba4 subs r4, r4, r6 80020a8: 10a4 asrs r4, r4, #2 80020aa: 42a5 cmp r5, r4 80020ac: d105 bne.n 80020ba <__libc_init_array+0x2e> 80020ae: bd70 pop {r4, r5, r6, pc} 80020b0: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80020b4: 4798 blx r3 80020b6: 3501 adds r5, #1 80020b8: e7ee b.n 8002098 <__libc_init_array+0xc> 80020ba: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80020be: 4798 blx r3 80020c0: 3501 adds r5, #1 80020c2: e7f2 b.n 80020aa <__libc_init_array+0x1e> 80020c4: 08003270 .word 0x08003270 80020c8: 08003270 .word 0x08003270 80020cc: 08003270 .word 0x08003270 80020d0: 08003274 .word 0x08003274 080020d4 : 80020d4: 4603 mov r3, r0 80020d6: 4402 add r2, r0 80020d8: 4293 cmp r3, r2 80020da: d100 bne.n 80020de 80020dc: 4770 bx lr 80020de: f803 1b01 strb.w r1, [r3], #1 80020e2: e7f9 b.n 80020d8 080020e4 : 80020e4: b40f push {r0, r1, r2, r3} 80020e6: 4b0a ldr r3, [pc, #40] ; (8002110 ) 80020e8: b513 push {r0, r1, r4, lr} 80020ea: 681c ldr r4, [r3, #0] 80020ec: b124 cbz r4, 80020f8 80020ee: 69a3 ldr r3, [r4, #24] 80020f0: b913 cbnz r3, 80020f8 80020f2: 4620 mov r0, r4 80020f4: f000 fada bl 80026ac <__sinit> 80020f8: ab05 add r3, sp, #20 80020fa: 9a04 ldr r2, [sp, #16] 80020fc: 68a1 ldr r1, [r4, #8] 80020fe: 4620 mov r0, r4 8002100: 9301 str r3, [sp, #4] 8002102: f000 fc9b bl 8002a3c <_vfiprintf_r> 8002106: b002 add sp, #8 8002108: e8bd 4010 ldmia.w sp!, {r4, lr} 800210c: b004 add sp, #16 800210e: 4770 bx lr 8002110: 20000010 .word 0x20000010 08002114 <_puts_r>: 8002114: b570 push {r4, r5, r6, lr} 8002116: 460e mov r6, r1 8002118: 4605 mov r5, r0 800211a: b118 cbz r0, 8002124 <_puts_r+0x10> 800211c: 6983 ldr r3, [r0, #24] 800211e: b90b cbnz r3, 8002124 <_puts_r+0x10> 8002120: f000 fac4 bl 80026ac <__sinit> 8002124: 69ab ldr r3, [r5, #24] 8002126: 68ac ldr r4, [r5, #8] 8002128: b913 cbnz r3, 8002130 <_puts_r+0x1c> 800212a: 4628 mov r0, r5 800212c: f000 fabe bl 80026ac <__sinit> 8002130: 4b23 ldr r3, [pc, #140] ; (80021c0 <_puts_r+0xac>) 8002132: 429c cmp r4, r3 8002134: d117 bne.n 8002166 <_puts_r+0x52> 8002136: 686c ldr r4, [r5, #4] 8002138: 89a3 ldrh r3, [r4, #12] 800213a: 071b lsls r3, r3, #28 800213c: d51d bpl.n 800217a <_puts_r+0x66> 800213e: 6923 ldr r3, [r4, #16] 8002140: b1db cbz r3, 800217a <_puts_r+0x66> 8002142: 3e01 subs r6, #1 8002144: 68a3 ldr r3, [r4, #8] 8002146: f816 1f01 ldrb.w r1, [r6, #1]! 800214a: 3b01 subs r3, #1 800214c: 60a3 str r3, [r4, #8] 800214e: b9e9 cbnz r1, 800218c <_puts_r+0x78> 8002150: 2b00 cmp r3, #0 8002152: da2e bge.n 80021b2 <_puts_r+0x9e> 8002154: 4622 mov r2, r4 8002156: 210a movs r1, #10 8002158: 4628 mov r0, r5 800215a: f000 f8f5 bl 8002348 <__swbuf_r> 800215e: 3001 adds r0, #1 8002160: d011 beq.n 8002186 <_puts_r+0x72> 8002162: 200a movs r0, #10 8002164: bd70 pop {r4, r5, r6, pc} 8002166: 4b17 ldr r3, [pc, #92] ; (80021c4 <_puts_r+0xb0>) 8002168: 429c cmp r4, r3 800216a: d101 bne.n 8002170 <_puts_r+0x5c> 800216c: 68ac ldr r4, [r5, #8] 800216e: e7e3 b.n 8002138 <_puts_r+0x24> 8002170: 4b15 ldr r3, [pc, #84] ; (80021c8 <_puts_r+0xb4>) 8002172: 429c cmp r4, r3 8002174: bf08 it eq 8002176: 68ec ldreq r4, [r5, #12] 8002178: e7de b.n 8002138 <_puts_r+0x24> 800217a: 4621 mov r1, r4 800217c: 4628 mov r0, r5 800217e: f000 f935 bl 80023ec <__swsetup_r> 8002182: 2800 cmp r0, #0 8002184: d0dd beq.n 8002142 <_puts_r+0x2e> 8002186: f04f 30ff mov.w r0, #4294967295 800218a: bd70 pop {r4, r5, r6, pc} 800218c: 2b00 cmp r3, #0 800218e: da04 bge.n 800219a <_puts_r+0x86> 8002190: 69a2 ldr r2, [r4, #24] 8002192: 4293 cmp r3, r2 8002194: db06 blt.n 80021a4 <_puts_r+0x90> 8002196: 290a cmp r1, #10 8002198: d004 beq.n 80021a4 <_puts_r+0x90> 800219a: 6823 ldr r3, [r4, #0] 800219c: 1c5a adds r2, r3, #1 800219e: 6022 str r2, [r4, #0] 80021a0: 7019 strb r1, [r3, #0] 80021a2: e7cf b.n 8002144 <_puts_r+0x30> 80021a4: 4622 mov r2, r4 80021a6: 4628 mov r0, r5 80021a8: f000 f8ce bl 8002348 <__swbuf_r> 80021ac: 3001 adds r0, #1 80021ae: d1c9 bne.n 8002144 <_puts_r+0x30> 80021b0: e7e9 b.n 8002186 <_puts_r+0x72> 80021b2: 200a movs r0, #10 80021b4: 6823 ldr r3, [r4, #0] 80021b6: 1c5a adds r2, r3, #1 80021b8: 6022 str r2, [r4, #0] 80021ba: 7018 strb r0, [r3, #0] 80021bc: bd70 pop {r4, r5, r6, pc} 80021be: bf00 nop 80021c0: 080031fc .word 0x080031fc 80021c4: 0800321c .word 0x0800321c 80021c8: 080031dc .word 0x080031dc 080021cc : 80021cc: 4b02 ldr r3, [pc, #8] ; (80021d8 ) 80021ce: 4601 mov r1, r0 80021d0: 6818 ldr r0, [r3, #0] 80021d2: f7ff bf9f b.w 8002114 <_puts_r> 80021d6: bf00 nop 80021d8: 20000010 .word 0x20000010 080021dc : 80021dc: 2900 cmp r1, #0 80021de: f44f 6380 mov.w r3, #1024 ; 0x400 80021e2: bf0c ite eq 80021e4: 2202 moveq r2, #2 80021e6: 2200 movne r2, #0 80021e8: f000 b800 b.w 80021ec 080021ec : 80021ec: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 80021f0: 461d mov r5, r3 80021f2: 4b51 ldr r3, [pc, #324] ; (8002338 ) 80021f4: 4604 mov r4, r0 80021f6: 681e ldr r6, [r3, #0] 80021f8: 460f mov r7, r1 80021fa: 4690 mov r8, r2 80021fc: b126 cbz r6, 8002208 80021fe: 69b3 ldr r3, [r6, #24] 8002200: b913 cbnz r3, 8002208 8002202: 4630 mov r0, r6 8002204: f000 fa52 bl 80026ac <__sinit> 8002208: 4b4c ldr r3, [pc, #304] ; (800233c ) 800220a: 429c cmp r4, r3 800220c: d152 bne.n 80022b4 800220e: 6874 ldr r4, [r6, #4] 8002210: f1b8 0f02 cmp.w r8, #2 8002214: d006 beq.n 8002224 8002216: f1b8 0f01 cmp.w r8, #1 800221a: f200 8089 bhi.w 8002330 800221e: 2d00 cmp r5, #0 8002220: f2c0 8086 blt.w 8002330 8002224: 4621 mov r1, r4 8002226: 4630 mov r0, r6 8002228: f000 f9d6 bl 80025d8 <_fflush_r> 800222c: 6b61 ldr r1, [r4, #52] ; 0x34 800222e: b141 cbz r1, 8002242 8002230: f104 0344 add.w r3, r4, #68 ; 0x44 8002234: 4299 cmp r1, r3 8002236: d002 beq.n 800223e 8002238: 4630 mov r0, r6 800223a: f000 fb2d bl 8002898 <_free_r> 800223e: 2300 movs r3, #0 8002240: 6363 str r3, [r4, #52] ; 0x34 8002242: 2300 movs r3, #0 8002244: 61a3 str r3, [r4, #24] 8002246: 6063 str r3, [r4, #4] 8002248: 89a3 ldrh r3, [r4, #12] 800224a: 061b lsls r3, r3, #24 800224c: d503 bpl.n 8002256 800224e: 6921 ldr r1, [r4, #16] 8002250: 4630 mov r0, r6 8002252: f000 fb21 bl 8002898 <_free_r> 8002256: 89a3 ldrh r3, [r4, #12] 8002258: f1b8 0f02 cmp.w r8, #2 800225c: f423 634a bic.w r3, r3, #3232 ; 0xca0 8002260: f023 0303 bic.w r3, r3, #3 8002264: 81a3 strh r3, [r4, #12] 8002266: d05d beq.n 8002324 8002268: ab01 add r3, sp, #4 800226a: 466a mov r2, sp 800226c: 4621 mov r1, r4 800226e: 4630 mov r0, r6 8002270: f000 faa6 bl 80027c0 <__swhatbuf_r> 8002274: 89a3 ldrh r3, [r4, #12] 8002276: 4318 orrs r0, r3 8002278: 81a0 strh r0, [r4, #12] 800227a: bb2d cbnz r5, 80022c8 800227c: 9d00 ldr r5, [sp, #0] 800227e: 4628 mov r0, r5 8002280: f000 fb02 bl 8002888 8002284: 4607 mov r7, r0 8002286: 2800 cmp r0, #0 8002288: d14e bne.n 8002328 800228a: f8dd 9000 ldr.w r9, [sp] 800228e: 45a9 cmp r9, r5 8002290: d13c bne.n 800230c 8002292: f04f 30ff mov.w r0, #4294967295 8002296: 89a3 ldrh r3, [r4, #12] 8002298: f043 0302 orr.w r3, r3, #2 800229c: 81a3 strh r3, [r4, #12] 800229e: 2300 movs r3, #0 80022a0: 60a3 str r3, [r4, #8] 80022a2: f104 0347 add.w r3, r4, #71 ; 0x47 80022a6: 6023 str r3, [r4, #0] 80022a8: 6123 str r3, [r4, #16] 80022aa: 2301 movs r3, #1 80022ac: 6163 str r3, [r4, #20] 80022ae: b003 add sp, #12 80022b0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80022b4: 4b22 ldr r3, [pc, #136] ; (8002340 ) 80022b6: 429c cmp r4, r3 80022b8: d101 bne.n 80022be 80022ba: 68b4 ldr r4, [r6, #8] 80022bc: e7a8 b.n 8002210 80022be: 4b21 ldr r3, [pc, #132] ; (8002344 ) 80022c0: 429c cmp r4, r3 80022c2: bf08 it eq 80022c4: 68f4 ldreq r4, [r6, #12] 80022c6: e7a3 b.n 8002210 80022c8: 2f00 cmp r7, #0 80022ca: d0d8 beq.n 800227e 80022cc: 69b3 ldr r3, [r6, #24] 80022ce: b913 cbnz r3, 80022d6 80022d0: 4630 mov r0, r6 80022d2: f000 f9eb bl 80026ac <__sinit> 80022d6: f1b8 0f01 cmp.w r8, #1 80022da: bf08 it eq 80022dc: 89a3 ldrheq r3, [r4, #12] 80022de: 6027 str r7, [r4, #0] 80022e0: bf04 itt eq 80022e2: f043 0301 orreq.w r3, r3, #1 80022e6: 81a3 strheq r3, [r4, #12] 80022e8: 89a3 ldrh r3, [r4, #12] 80022ea: 6127 str r7, [r4, #16] 80022ec: f013 0008 ands.w r0, r3, #8 80022f0: 6165 str r5, [r4, #20] 80022f2: d01b beq.n 800232c 80022f4: f013 0001 ands.w r0, r3, #1 80022f8: f04f 0300 mov.w r3, #0 80022fc: bf1f itttt ne 80022fe: 426d negne r5, r5 8002300: 60a3 strne r3, [r4, #8] 8002302: 61a5 strne r5, [r4, #24] 8002304: 4618 movne r0, r3 8002306: bf08 it eq 8002308: 60a5 streq r5, [r4, #8] 800230a: e7d0 b.n 80022ae 800230c: 4648 mov r0, r9 800230e: f000 fabb bl 8002888 8002312: 4607 mov r7, r0 8002314: 2800 cmp r0, #0 8002316: d0bc beq.n 8002292 8002318: 89a3 ldrh r3, [r4, #12] 800231a: 464d mov r5, r9 800231c: f043 0380 orr.w r3, r3, #128 ; 0x80 8002320: 81a3 strh r3, [r4, #12] 8002322: e7d3 b.n 80022cc 8002324: 2000 movs r0, #0 8002326: e7b6 b.n 8002296 8002328: 46a9 mov r9, r5 800232a: e7f5 b.n 8002318 800232c: 60a0 str r0, [r4, #8] 800232e: e7be b.n 80022ae 8002330: f04f 30ff mov.w r0, #4294967295 8002334: e7bb b.n 80022ae 8002336: bf00 nop 8002338: 20000010 .word 0x20000010 800233c: 080031fc .word 0x080031fc 8002340: 0800321c .word 0x0800321c 8002344: 080031dc .word 0x080031dc 08002348 <__swbuf_r>: 8002348: b5f8 push {r3, r4, r5, r6, r7, lr} 800234a: 460e mov r6, r1 800234c: 4614 mov r4, r2 800234e: 4605 mov r5, r0 8002350: b118 cbz r0, 800235a <__swbuf_r+0x12> 8002352: 6983 ldr r3, [r0, #24] 8002354: b90b cbnz r3, 800235a <__swbuf_r+0x12> 8002356: f000 f9a9 bl 80026ac <__sinit> 800235a: 4b21 ldr r3, [pc, #132] ; (80023e0 <__swbuf_r+0x98>) 800235c: 429c cmp r4, r3 800235e: d12a bne.n 80023b6 <__swbuf_r+0x6e> 8002360: 686c ldr r4, [r5, #4] 8002362: 69a3 ldr r3, [r4, #24] 8002364: 60a3 str r3, [r4, #8] 8002366: 89a3 ldrh r3, [r4, #12] 8002368: 071a lsls r2, r3, #28 800236a: d52e bpl.n 80023ca <__swbuf_r+0x82> 800236c: 6923 ldr r3, [r4, #16] 800236e: b363 cbz r3, 80023ca <__swbuf_r+0x82> 8002370: 6923 ldr r3, [r4, #16] 8002372: 6820 ldr r0, [r4, #0] 8002374: b2f6 uxtb r6, r6 8002376: 1ac0 subs r0, r0, r3 8002378: 6963 ldr r3, [r4, #20] 800237a: 4637 mov r7, r6 800237c: 4298 cmp r0, r3 800237e: db04 blt.n 800238a <__swbuf_r+0x42> 8002380: 4621 mov r1, r4 8002382: 4628 mov r0, r5 8002384: f000 f928 bl 80025d8 <_fflush_r> 8002388: bb28 cbnz r0, 80023d6 <__swbuf_r+0x8e> 800238a: 68a3 ldr r3, [r4, #8] 800238c: 3001 adds r0, #1 800238e: 3b01 subs r3, #1 8002390: 60a3 str r3, [r4, #8] 8002392: 6823 ldr r3, [r4, #0] 8002394: 1c5a adds r2, r3, #1 8002396: 6022 str r2, [r4, #0] 8002398: 701e strb r6, [r3, #0] 800239a: 6963 ldr r3, [r4, #20] 800239c: 4298 cmp r0, r3 800239e: d004 beq.n 80023aa <__swbuf_r+0x62> 80023a0: 89a3 ldrh r3, [r4, #12] 80023a2: 07db lsls r3, r3, #31 80023a4: d519 bpl.n 80023da <__swbuf_r+0x92> 80023a6: 2e0a cmp r6, #10 80023a8: d117 bne.n 80023da <__swbuf_r+0x92> 80023aa: 4621 mov r1, r4 80023ac: 4628 mov r0, r5 80023ae: f000 f913 bl 80025d8 <_fflush_r> 80023b2: b190 cbz r0, 80023da <__swbuf_r+0x92> 80023b4: e00f b.n 80023d6 <__swbuf_r+0x8e> 80023b6: 4b0b ldr r3, [pc, #44] ; (80023e4 <__swbuf_r+0x9c>) 80023b8: 429c cmp r4, r3 80023ba: d101 bne.n 80023c0 <__swbuf_r+0x78> 80023bc: 68ac ldr r4, [r5, #8] 80023be: e7d0 b.n 8002362 <__swbuf_r+0x1a> 80023c0: 4b09 ldr r3, [pc, #36] ; (80023e8 <__swbuf_r+0xa0>) 80023c2: 429c cmp r4, r3 80023c4: bf08 it eq 80023c6: 68ec ldreq r4, [r5, #12] 80023c8: e7cb b.n 8002362 <__swbuf_r+0x1a> 80023ca: 4621 mov r1, r4 80023cc: 4628 mov r0, r5 80023ce: f000 f80d bl 80023ec <__swsetup_r> 80023d2: 2800 cmp r0, #0 80023d4: d0cc beq.n 8002370 <__swbuf_r+0x28> 80023d6: f04f 37ff mov.w r7, #4294967295 80023da: 4638 mov r0, r7 80023dc: bdf8 pop {r3, r4, r5, r6, r7, pc} 80023de: bf00 nop 80023e0: 080031fc .word 0x080031fc 80023e4: 0800321c .word 0x0800321c 80023e8: 080031dc .word 0x080031dc 080023ec <__swsetup_r>: 80023ec: 4b32 ldr r3, [pc, #200] ; (80024b8 <__swsetup_r+0xcc>) 80023ee: b570 push {r4, r5, r6, lr} 80023f0: 681d ldr r5, [r3, #0] 80023f2: 4606 mov r6, r0 80023f4: 460c mov r4, r1 80023f6: b125 cbz r5, 8002402 <__swsetup_r+0x16> 80023f8: 69ab ldr r3, [r5, #24] 80023fa: b913 cbnz r3, 8002402 <__swsetup_r+0x16> 80023fc: 4628 mov r0, r5 80023fe: f000 f955 bl 80026ac <__sinit> 8002402: 4b2e ldr r3, [pc, #184] ; (80024bc <__swsetup_r+0xd0>) 8002404: 429c cmp r4, r3 8002406: d10f bne.n 8002428 <__swsetup_r+0x3c> 8002408: 686c ldr r4, [r5, #4] 800240a: f9b4 300c ldrsh.w r3, [r4, #12] 800240e: b29a uxth r2, r3 8002410: 0715 lsls r5, r2, #28 8002412: d42c bmi.n 800246e <__swsetup_r+0x82> 8002414: 06d0 lsls r0, r2, #27 8002416: d411 bmi.n 800243c <__swsetup_r+0x50> 8002418: 2209 movs r2, #9 800241a: 6032 str r2, [r6, #0] 800241c: f043 0340 orr.w r3, r3, #64 ; 0x40 8002420: 81a3 strh r3, [r4, #12] 8002422: f04f 30ff mov.w r0, #4294967295 8002426: bd70 pop {r4, r5, r6, pc} 8002428: 4b25 ldr r3, [pc, #148] ; (80024c0 <__swsetup_r+0xd4>) 800242a: 429c cmp r4, r3 800242c: d101 bne.n 8002432 <__swsetup_r+0x46> 800242e: 68ac ldr r4, [r5, #8] 8002430: e7eb b.n 800240a <__swsetup_r+0x1e> 8002432: 4b24 ldr r3, [pc, #144] ; (80024c4 <__swsetup_r+0xd8>) 8002434: 429c cmp r4, r3 8002436: bf08 it eq 8002438: 68ec ldreq r4, [r5, #12] 800243a: e7e6 b.n 800240a <__swsetup_r+0x1e> 800243c: 0751 lsls r1, r2, #29 800243e: d512 bpl.n 8002466 <__swsetup_r+0x7a> 8002440: 6b61 ldr r1, [r4, #52] ; 0x34 8002442: b141 cbz r1, 8002456 <__swsetup_r+0x6a> 8002444: f104 0344 add.w r3, r4, #68 ; 0x44 8002448: 4299 cmp r1, r3 800244a: d002 beq.n 8002452 <__swsetup_r+0x66> 800244c: 4630 mov r0, r6 800244e: f000 fa23 bl 8002898 <_free_r> 8002452: 2300 movs r3, #0 8002454: 6363 str r3, [r4, #52] ; 0x34 8002456: 89a3 ldrh r3, [r4, #12] 8002458: f023 0324 bic.w r3, r3, #36 ; 0x24 800245c: 81a3 strh r3, [r4, #12] 800245e: 2300 movs r3, #0 8002460: 6063 str r3, [r4, #4] 8002462: 6923 ldr r3, [r4, #16] 8002464: 6023 str r3, [r4, #0] 8002466: 89a3 ldrh r3, [r4, #12] 8002468: f043 0308 orr.w r3, r3, #8 800246c: 81a3 strh r3, [r4, #12] 800246e: 6923 ldr r3, [r4, #16] 8002470: b94b cbnz r3, 8002486 <__swsetup_r+0x9a> 8002472: 89a3 ldrh r3, [r4, #12] 8002474: f403 7320 and.w r3, r3, #640 ; 0x280 8002478: f5b3 7f00 cmp.w r3, #512 ; 0x200 800247c: d003 beq.n 8002486 <__swsetup_r+0x9a> 800247e: 4621 mov r1, r4 8002480: 4630 mov r0, r6 8002482: f000 f9c1 bl 8002808 <__smakebuf_r> 8002486: 89a2 ldrh r2, [r4, #12] 8002488: f012 0301 ands.w r3, r2, #1 800248c: d00c beq.n 80024a8 <__swsetup_r+0xbc> 800248e: 2300 movs r3, #0 8002490: 60a3 str r3, [r4, #8] 8002492: 6963 ldr r3, [r4, #20] 8002494: 425b negs r3, r3 8002496: 61a3 str r3, [r4, #24] 8002498: 6923 ldr r3, [r4, #16] 800249a: b953 cbnz r3, 80024b2 <__swsetup_r+0xc6> 800249c: f9b4 300c ldrsh.w r3, [r4, #12] 80024a0: f013 0080 ands.w r0, r3, #128 ; 0x80 80024a4: d1ba bne.n 800241c <__swsetup_r+0x30> 80024a6: bd70 pop {r4, r5, r6, pc} 80024a8: 0792 lsls r2, r2, #30 80024aa: bf58 it pl 80024ac: 6963 ldrpl r3, [r4, #20] 80024ae: 60a3 str r3, [r4, #8] 80024b0: e7f2 b.n 8002498 <__swsetup_r+0xac> 80024b2: 2000 movs r0, #0 80024b4: e7f7 b.n 80024a6 <__swsetup_r+0xba> 80024b6: bf00 nop 80024b8: 20000010 .word 0x20000010 80024bc: 080031fc .word 0x080031fc 80024c0: 0800321c .word 0x0800321c 80024c4: 080031dc .word 0x080031dc 080024c8 <__sflush_r>: 80024c8: 898a ldrh r2, [r1, #12] 80024ca: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80024ce: 4605 mov r5, r0 80024d0: 0710 lsls r0, r2, #28 80024d2: 460c mov r4, r1 80024d4: d45a bmi.n 800258c <__sflush_r+0xc4> 80024d6: 684b ldr r3, [r1, #4] 80024d8: 2b00 cmp r3, #0 80024da: dc05 bgt.n 80024e8 <__sflush_r+0x20> 80024dc: 6c0b ldr r3, [r1, #64] ; 0x40 80024de: 2b00 cmp r3, #0 80024e0: dc02 bgt.n 80024e8 <__sflush_r+0x20> 80024e2: 2000 movs r0, #0 80024e4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80024e8: 6ae6 ldr r6, [r4, #44] ; 0x2c 80024ea: 2e00 cmp r6, #0 80024ec: d0f9 beq.n 80024e2 <__sflush_r+0x1a> 80024ee: 2300 movs r3, #0 80024f0: f412 5280 ands.w r2, r2, #4096 ; 0x1000 80024f4: 682f ldr r7, [r5, #0] 80024f6: 602b str r3, [r5, #0] 80024f8: d033 beq.n 8002562 <__sflush_r+0x9a> 80024fa: 6d60 ldr r0, [r4, #84] ; 0x54 80024fc: 89a3 ldrh r3, [r4, #12] 80024fe: 075a lsls r2, r3, #29 8002500: d505 bpl.n 800250e <__sflush_r+0x46> 8002502: 6863 ldr r3, [r4, #4] 8002504: 1ac0 subs r0, r0, r3 8002506: 6b63 ldr r3, [r4, #52] ; 0x34 8002508: b10b cbz r3, 800250e <__sflush_r+0x46> 800250a: 6c23 ldr r3, [r4, #64] ; 0x40 800250c: 1ac0 subs r0, r0, r3 800250e: 2300 movs r3, #0 8002510: 4602 mov r2, r0 8002512: 6ae6 ldr r6, [r4, #44] ; 0x2c 8002514: 6a21 ldr r1, [r4, #32] 8002516: 4628 mov r0, r5 8002518: 47b0 blx r6 800251a: 1c43 adds r3, r0, #1 800251c: 89a3 ldrh r3, [r4, #12] 800251e: d106 bne.n 800252e <__sflush_r+0x66> 8002520: 6829 ldr r1, [r5, #0] 8002522: 291d cmp r1, #29 8002524: d84b bhi.n 80025be <__sflush_r+0xf6> 8002526: 4a2b ldr r2, [pc, #172] ; (80025d4 <__sflush_r+0x10c>) 8002528: 40ca lsrs r2, r1 800252a: 07d6 lsls r6, r2, #31 800252c: d547 bpl.n 80025be <__sflush_r+0xf6> 800252e: 2200 movs r2, #0 8002530: 6062 str r2, [r4, #4] 8002532: 6922 ldr r2, [r4, #16] 8002534: 04d9 lsls r1, r3, #19 8002536: 6022 str r2, [r4, #0] 8002538: d504 bpl.n 8002544 <__sflush_r+0x7c> 800253a: 1c42 adds r2, r0, #1 800253c: d101 bne.n 8002542 <__sflush_r+0x7a> 800253e: 682b ldr r3, [r5, #0] 8002540: b903 cbnz r3, 8002544 <__sflush_r+0x7c> 8002542: 6560 str r0, [r4, #84] ; 0x54 8002544: 6b61 ldr r1, [r4, #52] ; 0x34 8002546: 602f str r7, [r5, #0] 8002548: 2900 cmp r1, #0 800254a: d0ca beq.n 80024e2 <__sflush_r+0x1a> 800254c: f104 0344 add.w r3, r4, #68 ; 0x44 8002550: 4299 cmp r1, r3 8002552: d002 beq.n 800255a <__sflush_r+0x92> 8002554: 4628 mov r0, r5 8002556: f000 f99f bl 8002898 <_free_r> 800255a: 2000 movs r0, #0 800255c: 6360 str r0, [r4, #52] ; 0x34 800255e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002562: 6a21 ldr r1, [r4, #32] 8002564: 2301 movs r3, #1 8002566: 4628 mov r0, r5 8002568: 47b0 blx r6 800256a: 1c41 adds r1, r0, #1 800256c: d1c6 bne.n 80024fc <__sflush_r+0x34> 800256e: 682b ldr r3, [r5, #0] 8002570: 2b00 cmp r3, #0 8002572: d0c3 beq.n 80024fc <__sflush_r+0x34> 8002574: 2b1d cmp r3, #29 8002576: d001 beq.n 800257c <__sflush_r+0xb4> 8002578: 2b16 cmp r3, #22 800257a: d101 bne.n 8002580 <__sflush_r+0xb8> 800257c: 602f str r7, [r5, #0] 800257e: e7b0 b.n 80024e2 <__sflush_r+0x1a> 8002580: 89a3 ldrh r3, [r4, #12] 8002582: f043 0340 orr.w r3, r3, #64 ; 0x40 8002586: 81a3 strh r3, [r4, #12] 8002588: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800258c: 690f ldr r7, [r1, #16] 800258e: 2f00 cmp r7, #0 8002590: d0a7 beq.n 80024e2 <__sflush_r+0x1a> 8002592: 0793 lsls r3, r2, #30 8002594: bf18 it ne 8002596: 2300 movne r3, #0 8002598: 680e ldr r6, [r1, #0] 800259a: bf08 it eq 800259c: 694b ldreq r3, [r1, #20] 800259e: eba6 0807 sub.w r8, r6, r7 80025a2: 600f str r7, [r1, #0] 80025a4: 608b str r3, [r1, #8] 80025a6: f1b8 0f00 cmp.w r8, #0 80025aa: dd9a ble.n 80024e2 <__sflush_r+0x1a> 80025ac: 4643 mov r3, r8 80025ae: 463a mov r2, r7 80025b0: 6a21 ldr r1, [r4, #32] 80025b2: 4628 mov r0, r5 80025b4: 6aa6 ldr r6, [r4, #40] ; 0x28 80025b6: 47b0 blx r6 80025b8: 2800 cmp r0, #0 80025ba: dc07 bgt.n 80025cc <__sflush_r+0x104> 80025bc: 89a3 ldrh r3, [r4, #12] 80025be: f043 0340 orr.w r3, r3, #64 ; 0x40 80025c2: 81a3 strh r3, [r4, #12] 80025c4: f04f 30ff mov.w r0, #4294967295 80025c8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80025cc: 4407 add r7, r0 80025ce: eba8 0800 sub.w r8, r8, r0 80025d2: e7e8 b.n 80025a6 <__sflush_r+0xde> 80025d4: 20400001 .word 0x20400001 080025d8 <_fflush_r>: 80025d8: b538 push {r3, r4, r5, lr} 80025da: 690b ldr r3, [r1, #16] 80025dc: 4605 mov r5, r0 80025de: 460c mov r4, r1 80025e0: b1db cbz r3, 800261a <_fflush_r+0x42> 80025e2: b118 cbz r0, 80025ec <_fflush_r+0x14> 80025e4: 6983 ldr r3, [r0, #24] 80025e6: b90b cbnz r3, 80025ec <_fflush_r+0x14> 80025e8: f000 f860 bl 80026ac <__sinit> 80025ec: 4b0c ldr r3, [pc, #48] ; (8002620 <_fflush_r+0x48>) 80025ee: 429c cmp r4, r3 80025f0: d109 bne.n 8002606 <_fflush_r+0x2e> 80025f2: 686c ldr r4, [r5, #4] 80025f4: f9b4 300c ldrsh.w r3, [r4, #12] 80025f8: b17b cbz r3, 800261a <_fflush_r+0x42> 80025fa: 4621 mov r1, r4 80025fc: 4628 mov r0, r5 80025fe: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8002602: f7ff bf61 b.w 80024c8 <__sflush_r> 8002606: 4b07 ldr r3, [pc, #28] ; (8002624 <_fflush_r+0x4c>) 8002608: 429c cmp r4, r3 800260a: d101 bne.n 8002610 <_fflush_r+0x38> 800260c: 68ac ldr r4, [r5, #8] 800260e: e7f1 b.n 80025f4 <_fflush_r+0x1c> 8002610: 4b05 ldr r3, [pc, #20] ; (8002628 <_fflush_r+0x50>) 8002612: 429c cmp r4, r3 8002614: bf08 it eq 8002616: 68ec ldreq r4, [r5, #12] 8002618: e7ec b.n 80025f4 <_fflush_r+0x1c> 800261a: 2000 movs r0, #0 800261c: bd38 pop {r3, r4, r5, pc} 800261e: bf00 nop 8002620: 080031fc .word 0x080031fc 8002624: 0800321c .word 0x0800321c 8002628: 080031dc .word 0x080031dc 0800262c <_cleanup_r>: 800262c: 4901 ldr r1, [pc, #4] ; (8002634 <_cleanup_r+0x8>) 800262e: f000 b8a9 b.w 8002784 <_fwalk_reent> 8002632: bf00 nop 8002634: 080025d9 .word 0x080025d9 08002638 : 8002638: 2300 movs r3, #0 800263a: b510 push {r4, lr} 800263c: 4604 mov r4, r0 800263e: 6003 str r3, [r0, #0] 8002640: 6043 str r3, [r0, #4] 8002642: 6083 str r3, [r0, #8] 8002644: 8181 strh r1, [r0, #12] 8002646: 6643 str r3, [r0, #100] ; 0x64 8002648: 81c2 strh r2, [r0, #14] 800264a: 6103 str r3, [r0, #16] 800264c: 6143 str r3, [r0, #20] 800264e: 6183 str r3, [r0, #24] 8002650: 4619 mov r1, r3 8002652: 2208 movs r2, #8 8002654: 305c adds r0, #92 ; 0x5c 8002656: f7ff fd3d bl 80020d4 800265a: 4b05 ldr r3, [pc, #20] ; (8002670 ) 800265c: 6224 str r4, [r4, #32] 800265e: 6263 str r3, [r4, #36] ; 0x24 8002660: 4b04 ldr r3, [pc, #16] ; (8002674 ) 8002662: 62a3 str r3, [r4, #40] ; 0x28 8002664: 4b04 ldr r3, [pc, #16] ; (8002678 ) 8002666: 62e3 str r3, [r4, #44] ; 0x2c 8002668: 4b04 ldr r3, [pc, #16] ; (800267c ) 800266a: 6323 str r3, [r4, #48] ; 0x30 800266c: bd10 pop {r4, pc} 800266e: bf00 nop 8002670: 08002fb9 .word 0x08002fb9 8002674: 08002fdb .word 0x08002fdb 8002678: 08003013 .word 0x08003013 800267c: 08003037 .word 0x08003037 08002680 <__sfmoreglue>: 8002680: b570 push {r4, r5, r6, lr} 8002682: 2568 movs r5, #104 ; 0x68 8002684: 1e4a subs r2, r1, #1 8002686: 4355 muls r5, r2 8002688: 460e mov r6, r1 800268a: f105 0174 add.w r1, r5, #116 ; 0x74 800268e: f000 f94f bl 8002930 <_malloc_r> 8002692: 4604 mov r4, r0 8002694: b140 cbz r0, 80026a8 <__sfmoreglue+0x28> 8002696: 2100 movs r1, #0 8002698: e880 0042 stmia.w r0, {r1, r6} 800269c: 300c adds r0, #12 800269e: 60a0 str r0, [r4, #8] 80026a0: f105 0268 add.w r2, r5, #104 ; 0x68 80026a4: f7ff fd16 bl 80020d4 80026a8: 4620 mov r0, r4 80026aa: bd70 pop {r4, r5, r6, pc} 080026ac <__sinit>: 80026ac: 6983 ldr r3, [r0, #24] 80026ae: b510 push {r4, lr} 80026b0: 4604 mov r4, r0 80026b2: bb33 cbnz r3, 8002702 <__sinit+0x56> 80026b4: 6483 str r3, [r0, #72] ; 0x48 80026b6: 64c3 str r3, [r0, #76] ; 0x4c 80026b8: 6503 str r3, [r0, #80] ; 0x50 80026ba: 4b12 ldr r3, [pc, #72] ; (8002704 <__sinit+0x58>) 80026bc: 4a12 ldr r2, [pc, #72] ; (8002708 <__sinit+0x5c>) 80026be: 681b ldr r3, [r3, #0] 80026c0: 6282 str r2, [r0, #40] ; 0x28 80026c2: 4298 cmp r0, r3 80026c4: bf04 itt eq 80026c6: 2301 moveq r3, #1 80026c8: 6183 streq r3, [r0, #24] 80026ca: f000 f81f bl 800270c <__sfp> 80026ce: 6060 str r0, [r4, #4] 80026d0: 4620 mov r0, r4 80026d2: f000 f81b bl 800270c <__sfp> 80026d6: 60a0 str r0, [r4, #8] 80026d8: 4620 mov r0, r4 80026da: f000 f817 bl 800270c <__sfp> 80026de: 2200 movs r2, #0 80026e0: 60e0 str r0, [r4, #12] 80026e2: 2104 movs r1, #4 80026e4: 6860 ldr r0, [r4, #4] 80026e6: f7ff ffa7 bl 8002638 80026ea: 2201 movs r2, #1 80026ec: 2109 movs r1, #9 80026ee: 68a0 ldr r0, [r4, #8] 80026f0: f7ff ffa2 bl 8002638 80026f4: 2202 movs r2, #2 80026f6: 2112 movs r1, #18 80026f8: 68e0 ldr r0, [r4, #12] 80026fa: f7ff ff9d bl 8002638 80026fe: 2301 movs r3, #1 8002700: 61a3 str r3, [r4, #24] 8002702: bd10 pop {r4, pc} 8002704: 080031d8 .word 0x080031d8 8002708: 0800262d .word 0x0800262d 0800270c <__sfp>: 800270c: b5f8 push {r3, r4, r5, r6, r7, lr} 800270e: 4b1c ldr r3, [pc, #112] ; (8002780 <__sfp+0x74>) 8002710: 4607 mov r7, r0 8002712: 681e ldr r6, [r3, #0] 8002714: 69b3 ldr r3, [r6, #24] 8002716: b913 cbnz r3, 800271e <__sfp+0x12> 8002718: 4630 mov r0, r6 800271a: f7ff ffc7 bl 80026ac <__sinit> 800271e: 3648 adds r6, #72 ; 0x48 8002720: 68b4 ldr r4, [r6, #8] 8002722: 6873 ldr r3, [r6, #4] 8002724: 3b01 subs r3, #1 8002726: d503 bpl.n 8002730 <__sfp+0x24> 8002728: 6833 ldr r3, [r6, #0] 800272a: b133 cbz r3, 800273a <__sfp+0x2e> 800272c: 6836 ldr r6, [r6, #0] 800272e: e7f7 b.n 8002720 <__sfp+0x14> 8002730: f9b4 500c ldrsh.w r5, [r4, #12] 8002734: b16d cbz r5, 8002752 <__sfp+0x46> 8002736: 3468 adds r4, #104 ; 0x68 8002738: e7f4 b.n 8002724 <__sfp+0x18> 800273a: 2104 movs r1, #4 800273c: 4638 mov r0, r7 800273e: f7ff ff9f bl 8002680 <__sfmoreglue> 8002742: 6030 str r0, [r6, #0] 8002744: 2800 cmp r0, #0 8002746: d1f1 bne.n 800272c <__sfp+0x20> 8002748: 230c movs r3, #12 800274a: 4604 mov r4, r0 800274c: 603b str r3, [r7, #0] 800274e: 4620 mov r0, r4 8002750: bdf8 pop {r3, r4, r5, r6, r7, pc} 8002752: f64f 73ff movw r3, #65535 ; 0xffff 8002756: 81e3 strh r3, [r4, #14] 8002758: 2301 movs r3, #1 800275a: 6665 str r5, [r4, #100] ; 0x64 800275c: 81a3 strh r3, [r4, #12] 800275e: 6025 str r5, [r4, #0] 8002760: 60a5 str r5, [r4, #8] 8002762: 6065 str r5, [r4, #4] 8002764: 6125 str r5, [r4, #16] 8002766: 6165 str r5, [r4, #20] 8002768: 61a5 str r5, [r4, #24] 800276a: 2208 movs r2, #8 800276c: 4629 mov r1, r5 800276e: f104 005c add.w r0, r4, #92 ; 0x5c 8002772: f7ff fcaf bl 80020d4 8002776: 6365 str r5, [r4, #52] ; 0x34 8002778: 63a5 str r5, [r4, #56] ; 0x38 800277a: 64a5 str r5, [r4, #72] ; 0x48 800277c: 64e5 str r5, [r4, #76] ; 0x4c 800277e: e7e6 b.n 800274e <__sfp+0x42> 8002780: 080031d8 .word 0x080031d8 08002784 <_fwalk_reent>: 8002784: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8002788: 4680 mov r8, r0 800278a: 4689 mov r9, r1 800278c: 2600 movs r6, #0 800278e: f100 0448 add.w r4, r0, #72 ; 0x48 8002792: b914 cbnz r4, 800279a <_fwalk_reent+0x16> 8002794: 4630 mov r0, r6 8002796: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800279a: 68a5 ldr r5, [r4, #8] 800279c: 6867 ldr r7, [r4, #4] 800279e: 3f01 subs r7, #1 80027a0: d501 bpl.n 80027a6 <_fwalk_reent+0x22> 80027a2: 6824 ldr r4, [r4, #0] 80027a4: e7f5 b.n 8002792 <_fwalk_reent+0xe> 80027a6: 89ab ldrh r3, [r5, #12] 80027a8: 2b01 cmp r3, #1 80027aa: d907 bls.n 80027bc <_fwalk_reent+0x38> 80027ac: f9b5 300e ldrsh.w r3, [r5, #14] 80027b0: 3301 adds r3, #1 80027b2: d003 beq.n 80027bc <_fwalk_reent+0x38> 80027b4: 4629 mov r1, r5 80027b6: 4640 mov r0, r8 80027b8: 47c8 blx r9 80027ba: 4306 orrs r6, r0 80027bc: 3568 adds r5, #104 ; 0x68 80027be: e7ee b.n 800279e <_fwalk_reent+0x1a> 080027c0 <__swhatbuf_r>: 80027c0: b570 push {r4, r5, r6, lr} 80027c2: 460e mov r6, r1 80027c4: f9b1 100e ldrsh.w r1, [r1, #14] 80027c8: b090 sub sp, #64 ; 0x40 80027ca: 2900 cmp r1, #0 80027cc: 4614 mov r4, r2 80027ce: 461d mov r5, r3 80027d0: da07 bge.n 80027e2 <__swhatbuf_r+0x22> 80027d2: 2300 movs r3, #0 80027d4: 602b str r3, [r5, #0] 80027d6: 89b3 ldrh r3, [r6, #12] 80027d8: 061a lsls r2, r3, #24 80027da: d410 bmi.n 80027fe <__swhatbuf_r+0x3e> 80027dc: f44f 6380 mov.w r3, #1024 ; 0x400 80027e0: e00e b.n 8002800 <__swhatbuf_r+0x40> 80027e2: aa01 add r2, sp, #4 80027e4: f000 fc4e bl 8003084 <_fstat_r> 80027e8: 2800 cmp r0, #0 80027ea: dbf2 blt.n 80027d2 <__swhatbuf_r+0x12> 80027ec: 9a02 ldr r2, [sp, #8] 80027ee: f402 4270 and.w r2, r2, #61440 ; 0xf000 80027f2: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 80027f6: 425a negs r2, r3 80027f8: 415a adcs r2, r3 80027fa: 602a str r2, [r5, #0] 80027fc: e7ee b.n 80027dc <__swhatbuf_r+0x1c> 80027fe: 2340 movs r3, #64 ; 0x40 8002800: 2000 movs r0, #0 8002802: 6023 str r3, [r4, #0] 8002804: b010 add sp, #64 ; 0x40 8002806: bd70 pop {r4, r5, r6, pc} 08002808 <__smakebuf_r>: 8002808: 898b ldrh r3, [r1, #12] 800280a: b573 push {r0, r1, r4, r5, r6, lr} 800280c: 079d lsls r5, r3, #30 800280e: 4606 mov r6, r0 8002810: 460c mov r4, r1 8002812: d507 bpl.n 8002824 <__smakebuf_r+0x1c> 8002814: f104 0347 add.w r3, r4, #71 ; 0x47 8002818: 6023 str r3, [r4, #0] 800281a: 6123 str r3, [r4, #16] 800281c: 2301 movs r3, #1 800281e: 6163 str r3, [r4, #20] 8002820: b002 add sp, #8 8002822: bd70 pop {r4, r5, r6, pc} 8002824: ab01 add r3, sp, #4 8002826: 466a mov r2, sp 8002828: f7ff ffca bl 80027c0 <__swhatbuf_r> 800282c: 9900 ldr r1, [sp, #0] 800282e: 4605 mov r5, r0 8002830: 4630 mov r0, r6 8002832: f000 f87d bl 8002930 <_malloc_r> 8002836: b948 cbnz r0, 800284c <__smakebuf_r+0x44> 8002838: f9b4 300c ldrsh.w r3, [r4, #12] 800283c: 059a lsls r2, r3, #22 800283e: d4ef bmi.n 8002820 <__smakebuf_r+0x18> 8002840: f023 0303 bic.w r3, r3, #3 8002844: f043 0302 orr.w r3, r3, #2 8002848: 81a3 strh r3, [r4, #12] 800284a: e7e3 b.n 8002814 <__smakebuf_r+0xc> 800284c: 4b0d ldr r3, [pc, #52] ; (8002884 <__smakebuf_r+0x7c>) 800284e: 62b3 str r3, [r6, #40] ; 0x28 8002850: 89a3 ldrh r3, [r4, #12] 8002852: 6020 str r0, [r4, #0] 8002854: f043 0380 orr.w r3, r3, #128 ; 0x80 8002858: 81a3 strh r3, [r4, #12] 800285a: 9b00 ldr r3, [sp, #0] 800285c: 6120 str r0, [r4, #16] 800285e: 6163 str r3, [r4, #20] 8002860: 9b01 ldr r3, [sp, #4] 8002862: b15b cbz r3, 800287c <__smakebuf_r+0x74> 8002864: f9b4 100e ldrsh.w r1, [r4, #14] 8002868: 4630 mov r0, r6 800286a: f000 fc1d bl 80030a8 <_isatty_r> 800286e: b128 cbz r0, 800287c <__smakebuf_r+0x74> 8002870: 89a3 ldrh r3, [r4, #12] 8002872: f023 0303 bic.w r3, r3, #3 8002876: f043 0301 orr.w r3, r3, #1 800287a: 81a3 strh r3, [r4, #12] 800287c: 89a3 ldrh r3, [r4, #12] 800287e: 431d orrs r5, r3 8002880: 81a5 strh r5, [r4, #12] 8002882: e7cd b.n 8002820 <__smakebuf_r+0x18> 8002884: 0800262d .word 0x0800262d 08002888 : 8002888: 4b02 ldr r3, [pc, #8] ; (8002894 ) 800288a: 4601 mov r1, r0 800288c: 6818 ldr r0, [r3, #0] 800288e: f000 b84f b.w 8002930 <_malloc_r> 8002892: bf00 nop 8002894: 20000010 .word 0x20000010 08002898 <_free_r>: 8002898: b538 push {r3, r4, r5, lr} 800289a: 4605 mov r5, r0 800289c: 2900 cmp r1, #0 800289e: d043 beq.n 8002928 <_free_r+0x90> 80028a0: f851 3c04 ldr.w r3, [r1, #-4] 80028a4: 1f0c subs r4, r1, #4 80028a6: 2b00 cmp r3, #0 80028a8: bfb8 it lt 80028aa: 18e4 addlt r4, r4, r3 80028ac: f000 fc2c bl 8003108 <__malloc_lock> 80028b0: 4a1e ldr r2, [pc, #120] ; (800292c <_free_r+0x94>) 80028b2: 6813 ldr r3, [r2, #0] 80028b4: 4610 mov r0, r2 80028b6: b933 cbnz r3, 80028c6 <_free_r+0x2e> 80028b8: 6063 str r3, [r4, #4] 80028ba: 6014 str r4, [r2, #0] 80028bc: 4628 mov r0, r5 80028be: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80028c2: f000 bc22 b.w 800310a <__malloc_unlock> 80028c6: 42a3 cmp r3, r4 80028c8: d90b bls.n 80028e2 <_free_r+0x4a> 80028ca: 6821 ldr r1, [r4, #0] 80028cc: 1862 adds r2, r4, r1 80028ce: 4293 cmp r3, r2 80028d0: bf01 itttt eq 80028d2: 681a ldreq r2, [r3, #0] 80028d4: 685b ldreq r3, [r3, #4] 80028d6: 1852 addeq r2, r2, r1 80028d8: 6022 streq r2, [r4, #0] 80028da: 6063 str r3, [r4, #4] 80028dc: 6004 str r4, [r0, #0] 80028de: e7ed b.n 80028bc <_free_r+0x24> 80028e0: 4613 mov r3, r2 80028e2: 685a ldr r2, [r3, #4] 80028e4: b10a cbz r2, 80028ea <_free_r+0x52> 80028e6: 42a2 cmp r2, r4 80028e8: d9fa bls.n 80028e0 <_free_r+0x48> 80028ea: 6819 ldr r1, [r3, #0] 80028ec: 1858 adds r0, r3, r1 80028ee: 42a0 cmp r0, r4 80028f0: d10b bne.n 800290a <_free_r+0x72> 80028f2: 6820 ldr r0, [r4, #0] 80028f4: 4401 add r1, r0 80028f6: 1858 adds r0, r3, r1 80028f8: 4282 cmp r2, r0 80028fa: 6019 str r1, [r3, #0] 80028fc: d1de bne.n 80028bc <_free_r+0x24> 80028fe: 6810 ldr r0, [r2, #0] 8002900: 6852 ldr r2, [r2, #4] 8002902: 4401 add r1, r0 8002904: 6019 str r1, [r3, #0] 8002906: 605a str r2, [r3, #4] 8002908: e7d8 b.n 80028bc <_free_r+0x24> 800290a: d902 bls.n 8002912 <_free_r+0x7a> 800290c: 230c movs r3, #12 800290e: 602b str r3, [r5, #0] 8002910: e7d4 b.n 80028bc <_free_r+0x24> 8002912: 6820 ldr r0, [r4, #0] 8002914: 1821 adds r1, r4, r0 8002916: 428a cmp r2, r1 8002918: bf01 itttt eq 800291a: 6811 ldreq r1, [r2, #0] 800291c: 6852 ldreq r2, [r2, #4] 800291e: 1809 addeq r1, r1, r0 8002920: 6021 streq r1, [r4, #0] 8002922: 6062 str r2, [r4, #4] 8002924: 605c str r4, [r3, #4] 8002926: e7c9 b.n 80028bc <_free_r+0x24> 8002928: bd38 pop {r3, r4, r5, pc} 800292a: bf00 nop 800292c: 200004c0 .word 0x200004c0 08002930 <_malloc_r>: 8002930: b570 push {r4, r5, r6, lr} 8002932: 1ccd adds r5, r1, #3 8002934: f025 0503 bic.w r5, r5, #3 8002938: 3508 adds r5, #8 800293a: 2d0c cmp r5, #12 800293c: bf38 it cc 800293e: 250c movcc r5, #12 8002940: 2d00 cmp r5, #0 8002942: 4606 mov r6, r0 8002944: db01 blt.n 800294a <_malloc_r+0x1a> 8002946: 42a9 cmp r1, r5 8002948: d903 bls.n 8002952 <_malloc_r+0x22> 800294a: 230c movs r3, #12 800294c: 6033 str r3, [r6, #0] 800294e: 2000 movs r0, #0 8002950: bd70 pop {r4, r5, r6, pc} 8002952: f000 fbd9 bl 8003108 <__malloc_lock> 8002956: 4a23 ldr r2, [pc, #140] ; (80029e4 <_malloc_r+0xb4>) 8002958: 6814 ldr r4, [r2, #0] 800295a: 4621 mov r1, r4 800295c: b991 cbnz r1, 8002984 <_malloc_r+0x54> 800295e: 4c22 ldr r4, [pc, #136] ; (80029e8 <_malloc_r+0xb8>) 8002960: 6823 ldr r3, [r4, #0] 8002962: b91b cbnz r3, 800296c <_malloc_r+0x3c> 8002964: 4630 mov r0, r6 8002966: f000 fb17 bl 8002f98 <_sbrk_r> 800296a: 6020 str r0, [r4, #0] 800296c: 4629 mov r1, r5 800296e: 4630 mov r0, r6 8002970: f000 fb12 bl 8002f98 <_sbrk_r> 8002974: 1c43 adds r3, r0, #1 8002976: d126 bne.n 80029c6 <_malloc_r+0x96> 8002978: 230c movs r3, #12 800297a: 4630 mov r0, r6 800297c: 6033 str r3, [r6, #0] 800297e: f000 fbc4 bl 800310a <__malloc_unlock> 8002982: e7e4 b.n 800294e <_malloc_r+0x1e> 8002984: 680b ldr r3, [r1, #0] 8002986: 1b5b subs r3, r3, r5 8002988: d41a bmi.n 80029c0 <_malloc_r+0x90> 800298a: 2b0b cmp r3, #11 800298c: d90f bls.n 80029ae <_malloc_r+0x7e> 800298e: 600b str r3, [r1, #0] 8002990: 18cc adds r4, r1, r3 8002992: 50cd str r5, [r1, r3] 8002994: 4630 mov r0, r6 8002996: f000 fbb8 bl 800310a <__malloc_unlock> 800299a: f104 000b add.w r0, r4, #11 800299e: 1d23 adds r3, r4, #4 80029a0: f020 0007 bic.w r0, r0, #7 80029a4: 1ac3 subs r3, r0, r3 80029a6: d01b beq.n 80029e0 <_malloc_r+0xb0> 80029a8: 425a negs r2, r3 80029aa: 50e2 str r2, [r4, r3] 80029ac: bd70 pop {r4, r5, r6, pc} 80029ae: 428c cmp r4, r1 80029b0: bf0b itete eq 80029b2: 6863 ldreq r3, [r4, #4] 80029b4: 684b ldrne r3, [r1, #4] 80029b6: 6013 streq r3, [r2, #0] 80029b8: 6063 strne r3, [r4, #4] 80029ba: bf18 it ne 80029bc: 460c movne r4, r1 80029be: e7e9 b.n 8002994 <_malloc_r+0x64> 80029c0: 460c mov r4, r1 80029c2: 6849 ldr r1, [r1, #4] 80029c4: e7ca b.n 800295c <_malloc_r+0x2c> 80029c6: 1cc4 adds r4, r0, #3 80029c8: f024 0403 bic.w r4, r4, #3 80029cc: 42a0 cmp r0, r4 80029ce: d005 beq.n 80029dc <_malloc_r+0xac> 80029d0: 1a21 subs r1, r4, r0 80029d2: 4630 mov r0, r6 80029d4: f000 fae0 bl 8002f98 <_sbrk_r> 80029d8: 3001 adds r0, #1 80029da: d0cd beq.n 8002978 <_malloc_r+0x48> 80029dc: 6025 str r5, [r4, #0] 80029de: e7d9 b.n 8002994 <_malloc_r+0x64> 80029e0: bd70 pop {r4, r5, r6, pc} 80029e2: bf00 nop 80029e4: 200004c0 .word 0x200004c0 80029e8: 200004c4 .word 0x200004c4 080029ec <__sfputc_r>: 80029ec: 6893 ldr r3, [r2, #8] 80029ee: b410 push {r4} 80029f0: 3b01 subs r3, #1 80029f2: 2b00 cmp r3, #0 80029f4: 6093 str r3, [r2, #8] 80029f6: da08 bge.n 8002a0a <__sfputc_r+0x1e> 80029f8: 6994 ldr r4, [r2, #24] 80029fa: 42a3 cmp r3, r4 80029fc: db02 blt.n 8002a04 <__sfputc_r+0x18> 80029fe: b2cb uxtb r3, r1 8002a00: 2b0a cmp r3, #10 8002a02: d102 bne.n 8002a0a <__sfputc_r+0x1e> 8002a04: bc10 pop {r4} 8002a06: f7ff bc9f b.w 8002348 <__swbuf_r> 8002a0a: 6813 ldr r3, [r2, #0] 8002a0c: 1c58 adds r0, r3, #1 8002a0e: 6010 str r0, [r2, #0] 8002a10: 7019 strb r1, [r3, #0] 8002a12: b2c8 uxtb r0, r1 8002a14: bc10 pop {r4} 8002a16: 4770 bx lr 08002a18 <__sfputs_r>: 8002a18: b5f8 push {r3, r4, r5, r6, r7, lr} 8002a1a: 4606 mov r6, r0 8002a1c: 460f mov r7, r1 8002a1e: 4614 mov r4, r2 8002a20: 18d5 adds r5, r2, r3 8002a22: 42ac cmp r4, r5 8002a24: d101 bne.n 8002a2a <__sfputs_r+0x12> 8002a26: 2000 movs r0, #0 8002a28: e007 b.n 8002a3a <__sfputs_r+0x22> 8002a2a: 463a mov r2, r7 8002a2c: f814 1b01 ldrb.w r1, [r4], #1 8002a30: 4630 mov r0, r6 8002a32: f7ff ffdb bl 80029ec <__sfputc_r> 8002a36: 1c43 adds r3, r0, #1 8002a38: d1f3 bne.n 8002a22 <__sfputs_r+0xa> 8002a3a: bdf8 pop {r3, r4, r5, r6, r7, pc} 08002a3c <_vfiprintf_r>: 8002a3c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8002a40: b09d sub sp, #116 ; 0x74 8002a42: 460c mov r4, r1 8002a44: 4617 mov r7, r2 8002a46: 9303 str r3, [sp, #12] 8002a48: 4606 mov r6, r0 8002a4a: b118 cbz r0, 8002a54 <_vfiprintf_r+0x18> 8002a4c: 6983 ldr r3, [r0, #24] 8002a4e: b90b cbnz r3, 8002a54 <_vfiprintf_r+0x18> 8002a50: f7ff fe2c bl 80026ac <__sinit> 8002a54: 4b7c ldr r3, [pc, #496] ; (8002c48 <_vfiprintf_r+0x20c>) 8002a56: 429c cmp r4, r3 8002a58: d157 bne.n 8002b0a <_vfiprintf_r+0xce> 8002a5a: 6874 ldr r4, [r6, #4] 8002a5c: 89a3 ldrh r3, [r4, #12] 8002a5e: 0718 lsls r0, r3, #28 8002a60: d55d bpl.n 8002b1e <_vfiprintf_r+0xe2> 8002a62: 6923 ldr r3, [r4, #16] 8002a64: 2b00 cmp r3, #0 8002a66: d05a beq.n 8002b1e <_vfiprintf_r+0xe2> 8002a68: 2300 movs r3, #0 8002a6a: 9309 str r3, [sp, #36] ; 0x24 8002a6c: 2320 movs r3, #32 8002a6e: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8002a72: 2330 movs r3, #48 ; 0x30 8002a74: f04f 0b01 mov.w fp, #1 8002a78: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8002a7c: 46b8 mov r8, r7 8002a7e: 4645 mov r5, r8 8002a80: f815 3b01 ldrb.w r3, [r5], #1 8002a84: 2b00 cmp r3, #0 8002a86: d155 bne.n 8002b34 <_vfiprintf_r+0xf8> 8002a88: ebb8 0a07 subs.w sl, r8, r7 8002a8c: d00b beq.n 8002aa6 <_vfiprintf_r+0x6a> 8002a8e: 4653 mov r3, sl 8002a90: 463a mov r2, r7 8002a92: 4621 mov r1, r4 8002a94: 4630 mov r0, r6 8002a96: f7ff ffbf bl 8002a18 <__sfputs_r> 8002a9a: 3001 adds r0, #1 8002a9c: f000 80c4 beq.w 8002c28 <_vfiprintf_r+0x1ec> 8002aa0: 9b09 ldr r3, [sp, #36] ; 0x24 8002aa2: 4453 add r3, sl 8002aa4: 9309 str r3, [sp, #36] ; 0x24 8002aa6: f898 3000 ldrb.w r3, [r8] 8002aaa: 2b00 cmp r3, #0 8002aac: f000 80bc beq.w 8002c28 <_vfiprintf_r+0x1ec> 8002ab0: 2300 movs r3, #0 8002ab2: f04f 32ff mov.w r2, #4294967295 8002ab6: 9304 str r3, [sp, #16] 8002ab8: 9307 str r3, [sp, #28] 8002aba: 9205 str r2, [sp, #20] 8002abc: 9306 str r3, [sp, #24] 8002abe: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8002ac2: 931a str r3, [sp, #104] ; 0x68 8002ac4: 2205 movs r2, #5 8002ac6: 7829 ldrb r1, [r5, #0] 8002ac8: 4860 ldr r0, [pc, #384] ; (8002c4c <_vfiprintf_r+0x210>) 8002aca: f000 fb0f bl 80030ec 8002ace: f105 0801 add.w r8, r5, #1 8002ad2: 9b04 ldr r3, [sp, #16] 8002ad4: 2800 cmp r0, #0 8002ad6: d131 bne.n 8002b3c <_vfiprintf_r+0x100> 8002ad8: 06d9 lsls r1, r3, #27 8002ada: bf44 itt mi 8002adc: 2220 movmi r2, #32 8002ade: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002ae2: 071a lsls r2, r3, #28 8002ae4: bf44 itt mi 8002ae6: 222b movmi r2, #43 ; 0x2b 8002ae8: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002aec: 782a ldrb r2, [r5, #0] 8002aee: 2a2a cmp r2, #42 ; 0x2a 8002af0: d02c beq.n 8002b4c <_vfiprintf_r+0x110> 8002af2: 2100 movs r1, #0 8002af4: 200a movs r0, #10 8002af6: 9a07 ldr r2, [sp, #28] 8002af8: 46a8 mov r8, r5 8002afa: f898 3000 ldrb.w r3, [r8] 8002afe: 3501 adds r5, #1 8002b00: 3b30 subs r3, #48 ; 0x30 8002b02: 2b09 cmp r3, #9 8002b04: d96d bls.n 8002be2 <_vfiprintf_r+0x1a6> 8002b06: b371 cbz r1, 8002b66 <_vfiprintf_r+0x12a> 8002b08: e026 b.n 8002b58 <_vfiprintf_r+0x11c> 8002b0a: 4b51 ldr r3, [pc, #324] ; (8002c50 <_vfiprintf_r+0x214>) 8002b0c: 429c cmp r4, r3 8002b0e: d101 bne.n 8002b14 <_vfiprintf_r+0xd8> 8002b10: 68b4 ldr r4, [r6, #8] 8002b12: e7a3 b.n 8002a5c <_vfiprintf_r+0x20> 8002b14: 4b4f ldr r3, [pc, #316] ; (8002c54 <_vfiprintf_r+0x218>) 8002b16: 429c cmp r4, r3 8002b18: bf08 it eq 8002b1a: 68f4 ldreq r4, [r6, #12] 8002b1c: e79e b.n 8002a5c <_vfiprintf_r+0x20> 8002b1e: 4621 mov r1, r4 8002b20: 4630 mov r0, r6 8002b22: f7ff fc63 bl 80023ec <__swsetup_r> 8002b26: 2800 cmp r0, #0 8002b28: d09e beq.n 8002a68 <_vfiprintf_r+0x2c> 8002b2a: f04f 30ff mov.w r0, #4294967295 8002b2e: b01d add sp, #116 ; 0x74 8002b30: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002b34: 2b25 cmp r3, #37 ; 0x25 8002b36: d0a7 beq.n 8002a88 <_vfiprintf_r+0x4c> 8002b38: 46a8 mov r8, r5 8002b3a: e7a0 b.n 8002a7e <_vfiprintf_r+0x42> 8002b3c: 4a43 ldr r2, [pc, #268] ; (8002c4c <_vfiprintf_r+0x210>) 8002b3e: 4645 mov r5, r8 8002b40: 1a80 subs r0, r0, r2 8002b42: fa0b f000 lsl.w r0, fp, r0 8002b46: 4318 orrs r0, r3 8002b48: 9004 str r0, [sp, #16] 8002b4a: e7bb b.n 8002ac4 <_vfiprintf_r+0x88> 8002b4c: 9a03 ldr r2, [sp, #12] 8002b4e: 1d11 adds r1, r2, #4 8002b50: 6812 ldr r2, [r2, #0] 8002b52: 9103 str r1, [sp, #12] 8002b54: 2a00 cmp r2, #0 8002b56: db01 blt.n 8002b5c <_vfiprintf_r+0x120> 8002b58: 9207 str r2, [sp, #28] 8002b5a: e004 b.n 8002b66 <_vfiprintf_r+0x12a> 8002b5c: 4252 negs r2, r2 8002b5e: f043 0302 orr.w r3, r3, #2 8002b62: 9207 str r2, [sp, #28] 8002b64: 9304 str r3, [sp, #16] 8002b66: f898 3000 ldrb.w r3, [r8] 8002b6a: 2b2e cmp r3, #46 ; 0x2e 8002b6c: d110 bne.n 8002b90 <_vfiprintf_r+0x154> 8002b6e: f898 3001 ldrb.w r3, [r8, #1] 8002b72: f108 0101 add.w r1, r8, #1 8002b76: 2b2a cmp r3, #42 ; 0x2a 8002b78: d137 bne.n 8002bea <_vfiprintf_r+0x1ae> 8002b7a: 9b03 ldr r3, [sp, #12] 8002b7c: f108 0802 add.w r8, r8, #2 8002b80: 1d1a adds r2, r3, #4 8002b82: 681b ldr r3, [r3, #0] 8002b84: 9203 str r2, [sp, #12] 8002b86: 2b00 cmp r3, #0 8002b88: bfb8 it lt 8002b8a: f04f 33ff movlt.w r3, #4294967295 8002b8e: 9305 str r3, [sp, #20] 8002b90: 4d31 ldr r5, [pc, #196] ; (8002c58 <_vfiprintf_r+0x21c>) 8002b92: 2203 movs r2, #3 8002b94: f898 1000 ldrb.w r1, [r8] 8002b98: 4628 mov r0, r5 8002b9a: f000 faa7 bl 80030ec 8002b9e: b140 cbz r0, 8002bb2 <_vfiprintf_r+0x176> 8002ba0: 2340 movs r3, #64 ; 0x40 8002ba2: 1b40 subs r0, r0, r5 8002ba4: fa03 f000 lsl.w r0, r3, r0 8002ba8: 9b04 ldr r3, [sp, #16] 8002baa: f108 0801 add.w r8, r8, #1 8002bae: 4303 orrs r3, r0 8002bb0: 9304 str r3, [sp, #16] 8002bb2: f898 1000 ldrb.w r1, [r8] 8002bb6: 2206 movs r2, #6 8002bb8: 4828 ldr r0, [pc, #160] ; (8002c5c <_vfiprintf_r+0x220>) 8002bba: f108 0701 add.w r7, r8, #1 8002bbe: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8002bc2: f000 fa93 bl 80030ec 8002bc6: 2800 cmp r0, #0 8002bc8: d034 beq.n 8002c34 <_vfiprintf_r+0x1f8> 8002bca: 4b25 ldr r3, [pc, #148] ; (8002c60 <_vfiprintf_r+0x224>) 8002bcc: bb03 cbnz r3, 8002c10 <_vfiprintf_r+0x1d4> 8002bce: 9b03 ldr r3, [sp, #12] 8002bd0: 3307 adds r3, #7 8002bd2: f023 0307 bic.w r3, r3, #7 8002bd6: 3308 adds r3, #8 8002bd8: 9303 str r3, [sp, #12] 8002bda: 9b09 ldr r3, [sp, #36] ; 0x24 8002bdc: 444b add r3, r9 8002bde: 9309 str r3, [sp, #36] ; 0x24 8002be0: e74c b.n 8002a7c <_vfiprintf_r+0x40> 8002be2: fb00 3202 mla r2, r0, r2, r3 8002be6: 2101 movs r1, #1 8002be8: e786 b.n 8002af8 <_vfiprintf_r+0xbc> 8002bea: 2300 movs r3, #0 8002bec: 250a movs r5, #10 8002bee: 4618 mov r0, r3 8002bf0: 9305 str r3, [sp, #20] 8002bf2: 4688 mov r8, r1 8002bf4: f898 2000 ldrb.w r2, [r8] 8002bf8: 3101 adds r1, #1 8002bfa: 3a30 subs r2, #48 ; 0x30 8002bfc: 2a09 cmp r2, #9 8002bfe: d903 bls.n 8002c08 <_vfiprintf_r+0x1cc> 8002c00: 2b00 cmp r3, #0 8002c02: d0c5 beq.n 8002b90 <_vfiprintf_r+0x154> 8002c04: 9005 str r0, [sp, #20] 8002c06: e7c3 b.n 8002b90 <_vfiprintf_r+0x154> 8002c08: fb05 2000 mla r0, r5, r0, r2 8002c0c: 2301 movs r3, #1 8002c0e: e7f0 b.n 8002bf2 <_vfiprintf_r+0x1b6> 8002c10: ab03 add r3, sp, #12 8002c12: 9300 str r3, [sp, #0] 8002c14: 4622 mov r2, r4 8002c16: 4b13 ldr r3, [pc, #76] ; (8002c64 <_vfiprintf_r+0x228>) 8002c18: a904 add r1, sp, #16 8002c1a: 4630 mov r0, r6 8002c1c: f3af 8000 nop.w 8002c20: f1b0 3fff cmp.w r0, #4294967295 8002c24: 4681 mov r9, r0 8002c26: d1d8 bne.n 8002bda <_vfiprintf_r+0x19e> 8002c28: 89a3 ldrh r3, [r4, #12] 8002c2a: 065b lsls r3, r3, #25 8002c2c: f53f af7d bmi.w 8002b2a <_vfiprintf_r+0xee> 8002c30: 9809 ldr r0, [sp, #36] ; 0x24 8002c32: e77c b.n 8002b2e <_vfiprintf_r+0xf2> 8002c34: ab03 add r3, sp, #12 8002c36: 9300 str r3, [sp, #0] 8002c38: 4622 mov r2, r4 8002c3a: 4b0a ldr r3, [pc, #40] ; (8002c64 <_vfiprintf_r+0x228>) 8002c3c: a904 add r1, sp, #16 8002c3e: 4630 mov r0, r6 8002c40: f000 f88a bl 8002d58 <_printf_i> 8002c44: e7ec b.n 8002c20 <_vfiprintf_r+0x1e4> 8002c46: bf00 nop 8002c48: 080031fc .word 0x080031fc 8002c4c: 0800323c .word 0x0800323c 8002c50: 0800321c .word 0x0800321c 8002c54: 080031dc .word 0x080031dc 8002c58: 08003242 .word 0x08003242 8002c5c: 08003246 .word 0x08003246 8002c60: 00000000 .word 0x00000000 8002c64: 08002a19 .word 0x08002a19 08002c68 <_printf_common>: 8002c68: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8002c6c: 4691 mov r9, r2 8002c6e: 461f mov r7, r3 8002c70: 688a ldr r2, [r1, #8] 8002c72: 690b ldr r3, [r1, #16] 8002c74: 4606 mov r6, r0 8002c76: 4293 cmp r3, r2 8002c78: bfb8 it lt 8002c7a: 4613 movlt r3, r2 8002c7c: f8c9 3000 str.w r3, [r9] 8002c80: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8002c84: 460c mov r4, r1 8002c86: f8dd 8020 ldr.w r8, [sp, #32] 8002c8a: b112 cbz r2, 8002c92 <_printf_common+0x2a> 8002c8c: 3301 adds r3, #1 8002c8e: f8c9 3000 str.w r3, [r9] 8002c92: 6823 ldr r3, [r4, #0] 8002c94: 0699 lsls r1, r3, #26 8002c96: bf42 ittt mi 8002c98: f8d9 3000 ldrmi.w r3, [r9] 8002c9c: 3302 addmi r3, #2 8002c9e: f8c9 3000 strmi.w r3, [r9] 8002ca2: 6825 ldr r5, [r4, #0] 8002ca4: f015 0506 ands.w r5, r5, #6 8002ca8: d107 bne.n 8002cba <_printf_common+0x52> 8002caa: f104 0a19 add.w sl, r4, #25 8002cae: 68e3 ldr r3, [r4, #12] 8002cb0: f8d9 2000 ldr.w r2, [r9] 8002cb4: 1a9b subs r3, r3, r2 8002cb6: 429d cmp r5, r3 8002cb8: db2a blt.n 8002d10 <_printf_common+0xa8> 8002cba: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8002cbe: 6822 ldr r2, [r4, #0] 8002cc0: 3300 adds r3, #0 8002cc2: bf18 it ne 8002cc4: 2301 movne r3, #1 8002cc6: 0692 lsls r2, r2, #26 8002cc8: d42f bmi.n 8002d2a <_printf_common+0xc2> 8002cca: f104 0243 add.w r2, r4, #67 ; 0x43 8002cce: 4639 mov r1, r7 8002cd0: 4630 mov r0, r6 8002cd2: 47c0 blx r8 8002cd4: 3001 adds r0, #1 8002cd6: d022 beq.n 8002d1e <_printf_common+0xb6> 8002cd8: 6823 ldr r3, [r4, #0] 8002cda: 68e5 ldr r5, [r4, #12] 8002cdc: f003 0306 and.w r3, r3, #6 8002ce0: 2b04 cmp r3, #4 8002ce2: bf18 it ne 8002ce4: 2500 movne r5, #0 8002ce6: f8d9 2000 ldr.w r2, [r9] 8002cea: f04f 0900 mov.w r9, #0 8002cee: bf08 it eq 8002cf0: 1aad subeq r5, r5, r2 8002cf2: 68a3 ldr r3, [r4, #8] 8002cf4: 6922 ldr r2, [r4, #16] 8002cf6: bf08 it eq 8002cf8: ea25 75e5 biceq.w r5, r5, r5, asr #31 8002cfc: 4293 cmp r3, r2 8002cfe: bfc4 itt gt 8002d00: 1a9b subgt r3, r3, r2 8002d02: 18ed addgt r5, r5, r3 8002d04: 341a adds r4, #26 8002d06: 454d cmp r5, r9 8002d08: d11b bne.n 8002d42 <_printf_common+0xda> 8002d0a: 2000 movs r0, #0 8002d0c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002d10: 2301 movs r3, #1 8002d12: 4652 mov r2, sl 8002d14: 4639 mov r1, r7 8002d16: 4630 mov r0, r6 8002d18: 47c0 blx r8 8002d1a: 3001 adds r0, #1 8002d1c: d103 bne.n 8002d26 <_printf_common+0xbe> 8002d1e: f04f 30ff mov.w r0, #4294967295 8002d22: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002d26: 3501 adds r5, #1 8002d28: e7c1 b.n 8002cae <_printf_common+0x46> 8002d2a: 2030 movs r0, #48 ; 0x30 8002d2c: 18e1 adds r1, r4, r3 8002d2e: f881 0043 strb.w r0, [r1, #67] ; 0x43 8002d32: 1c5a adds r2, r3, #1 8002d34: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8002d38: 4422 add r2, r4 8002d3a: 3302 adds r3, #2 8002d3c: f882 1043 strb.w r1, [r2, #67] ; 0x43 8002d40: e7c3 b.n 8002cca <_printf_common+0x62> 8002d42: 2301 movs r3, #1 8002d44: 4622 mov r2, r4 8002d46: 4639 mov r1, r7 8002d48: 4630 mov r0, r6 8002d4a: 47c0 blx r8 8002d4c: 3001 adds r0, #1 8002d4e: d0e6 beq.n 8002d1e <_printf_common+0xb6> 8002d50: f109 0901 add.w r9, r9, #1 8002d54: e7d7 b.n 8002d06 <_printf_common+0x9e> ... 08002d58 <_printf_i>: 8002d58: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8002d5c: 4617 mov r7, r2 8002d5e: 7e0a ldrb r2, [r1, #24] 8002d60: b085 sub sp, #20 8002d62: 2a6e cmp r2, #110 ; 0x6e 8002d64: 4698 mov r8, r3 8002d66: 4606 mov r6, r0 8002d68: 460c mov r4, r1 8002d6a: 9b0c ldr r3, [sp, #48] ; 0x30 8002d6c: f101 0e43 add.w lr, r1, #67 ; 0x43 8002d70: f000 80bc beq.w 8002eec <_printf_i+0x194> 8002d74: d81a bhi.n 8002dac <_printf_i+0x54> 8002d76: 2a63 cmp r2, #99 ; 0x63 8002d78: d02e beq.n 8002dd8 <_printf_i+0x80> 8002d7a: d80a bhi.n 8002d92 <_printf_i+0x3a> 8002d7c: 2a00 cmp r2, #0 8002d7e: f000 80c8 beq.w 8002f12 <_printf_i+0x1ba> 8002d82: 2a58 cmp r2, #88 ; 0x58 8002d84: f000 808a beq.w 8002e9c <_printf_i+0x144> 8002d88: f104 0542 add.w r5, r4, #66 ; 0x42 8002d8c: f884 2042 strb.w r2, [r4, #66] ; 0x42 8002d90: e02a b.n 8002de8 <_printf_i+0x90> 8002d92: 2a64 cmp r2, #100 ; 0x64 8002d94: d001 beq.n 8002d9a <_printf_i+0x42> 8002d96: 2a69 cmp r2, #105 ; 0x69 8002d98: d1f6 bne.n 8002d88 <_printf_i+0x30> 8002d9a: 6821 ldr r1, [r4, #0] 8002d9c: 681a ldr r2, [r3, #0] 8002d9e: f011 0f80 tst.w r1, #128 ; 0x80 8002da2: d023 beq.n 8002dec <_printf_i+0x94> 8002da4: 1d11 adds r1, r2, #4 8002da6: 6019 str r1, [r3, #0] 8002da8: 6813 ldr r3, [r2, #0] 8002daa: e027 b.n 8002dfc <_printf_i+0xa4> 8002dac: 2a73 cmp r2, #115 ; 0x73 8002dae: f000 80b4 beq.w 8002f1a <_printf_i+0x1c2> 8002db2: d808 bhi.n 8002dc6 <_printf_i+0x6e> 8002db4: 2a6f cmp r2, #111 ; 0x6f 8002db6: d02a beq.n 8002e0e <_printf_i+0xb6> 8002db8: 2a70 cmp r2, #112 ; 0x70 8002dba: d1e5 bne.n 8002d88 <_printf_i+0x30> 8002dbc: 680a ldr r2, [r1, #0] 8002dbe: f042 0220 orr.w r2, r2, #32 8002dc2: 600a str r2, [r1, #0] 8002dc4: e003 b.n 8002dce <_printf_i+0x76> 8002dc6: 2a75 cmp r2, #117 ; 0x75 8002dc8: d021 beq.n 8002e0e <_printf_i+0xb6> 8002dca: 2a78 cmp r2, #120 ; 0x78 8002dcc: d1dc bne.n 8002d88 <_printf_i+0x30> 8002dce: 2278 movs r2, #120 ; 0x78 8002dd0: 496f ldr r1, [pc, #444] ; (8002f90 <_printf_i+0x238>) 8002dd2: f884 2045 strb.w r2, [r4, #69] ; 0x45 8002dd6: e064 b.n 8002ea2 <_printf_i+0x14a> 8002dd8: 681a ldr r2, [r3, #0] 8002dda: f101 0542 add.w r5, r1, #66 ; 0x42 8002dde: 1d11 adds r1, r2, #4 8002de0: 6019 str r1, [r3, #0] 8002de2: 6813 ldr r3, [r2, #0] 8002de4: f884 3042 strb.w r3, [r4, #66] ; 0x42 8002de8: 2301 movs r3, #1 8002dea: e0a3 b.n 8002f34 <_printf_i+0x1dc> 8002dec: f011 0f40 tst.w r1, #64 ; 0x40 8002df0: f102 0104 add.w r1, r2, #4 8002df4: 6019 str r1, [r3, #0] 8002df6: d0d7 beq.n 8002da8 <_printf_i+0x50> 8002df8: f9b2 3000 ldrsh.w r3, [r2] 8002dfc: 2b00 cmp r3, #0 8002dfe: da03 bge.n 8002e08 <_printf_i+0xb0> 8002e00: 222d movs r2, #45 ; 0x2d 8002e02: 425b negs r3, r3 8002e04: f884 2043 strb.w r2, [r4, #67] ; 0x43 8002e08: 4962 ldr r1, [pc, #392] ; (8002f94 <_printf_i+0x23c>) 8002e0a: 220a movs r2, #10 8002e0c: e017 b.n 8002e3e <_printf_i+0xe6> 8002e0e: 6820 ldr r0, [r4, #0] 8002e10: 6819 ldr r1, [r3, #0] 8002e12: f010 0f80 tst.w r0, #128 ; 0x80 8002e16: d003 beq.n 8002e20 <_printf_i+0xc8> 8002e18: 1d08 adds r0, r1, #4 8002e1a: 6018 str r0, [r3, #0] 8002e1c: 680b ldr r3, [r1, #0] 8002e1e: e006 b.n 8002e2e <_printf_i+0xd6> 8002e20: f010 0f40 tst.w r0, #64 ; 0x40 8002e24: f101 0004 add.w r0, r1, #4 8002e28: 6018 str r0, [r3, #0] 8002e2a: d0f7 beq.n 8002e1c <_printf_i+0xc4> 8002e2c: 880b ldrh r3, [r1, #0] 8002e2e: 2a6f cmp r2, #111 ; 0x6f 8002e30: bf14 ite ne 8002e32: 220a movne r2, #10 8002e34: 2208 moveq r2, #8 8002e36: 4957 ldr r1, [pc, #348] ; (8002f94 <_printf_i+0x23c>) 8002e38: 2000 movs r0, #0 8002e3a: f884 0043 strb.w r0, [r4, #67] ; 0x43 8002e3e: 6865 ldr r5, [r4, #4] 8002e40: 2d00 cmp r5, #0 8002e42: 60a5 str r5, [r4, #8] 8002e44: f2c0 809c blt.w 8002f80 <_printf_i+0x228> 8002e48: 6820 ldr r0, [r4, #0] 8002e4a: f020 0004 bic.w r0, r0, #4 8002e4e: 6020 str r0, [r4, #0] 8002e50: 2b00 cmp r3, #0 8002e52: d13f bne.n 8002ed4 <_printf_i+0x17c> 8002e54: 2d00 cmp r5, #0 8002e56: f040 8095 bne.w 8002f84 <_printf_i+0x22c> 8002e5a: 4675 mov r5, lr 8002e5c: 2a08 cmp r2, #8 8002e5e: d10b bne.n 8002e78 <_printf_i+0x120> 8002e60: 6823 ldr r3, [r4, #0] 8002e62: 07da lsls r2, r3, #31 8002e64: d508 bpl.n 8002e78 <_printf_i+0x120> 8002e66: 6923 ldr r3, [r4, #16] 8002e68: 6862 ldr r2, [r4, #4] 8002e6a: 429a cmp r2, r3 8002e6c: bfde ittt le 8002e6e: 2330 movle r3, #48 ; 0x30 8002e70: f805 3c01 strble.w r3, [r5, #-1] 8002e74: f105 35ff addle.w r5, r5, #4294967295 8002e78: ebae 0305 sub.w r3, lr, r5 8002e7c: 6123 str r3, [r4, #16] 8002e7e: f8cd 8000 str.w r8, [sp] 8002e82: 463b mov r3, r7 8002e84: aa03 add r2, sp, #12 8002e86: 4621 mov r1, r4 8002e88: 4630 mov r0, r6 8002e8a: f7ff feed bl 8002c68 <_printf_common> 8002e8e: 3001 adds r0, #1 8002e90: d155 bne.n 8002f3e <_printf_i+0x1e6> 8002e92: f04f 30ff mov.w r0, #4294967295 8002e96: b005 add sp, #20 8002e98: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8002e9c: f881 2045 strb.w r2, [r1, #69] ; 0x45 8002ea0: 493c ldr r1, [pc, #240] ; (8002f94 <_printf_i+0x23c>) 8002ea2: 6822 ldr r2, [r4, #0] 8002ea4: 6818 ldr r0, [r3, #0] 8002ea6: f012 0f80 tst.w r2, #128 ; 0x80 8002eaa: f100 0504 add.w r5, r0, #4 8002eae: 601d str r5, [r3, #0] 8002eb0: d001 beq.n 8002eb6 <_printf_i+0x15e> 8002eb2: 6803 ldr r3, [r0, #0] 8002eb4: e002 b.n 8002ebc <_printf_i+0x164> 8002eb6: 0655 lsls r5, r2, #25 8002eb8: d5fb bpl.n 8002eb2 <_printf_i+0x15a> 8002eba: 8803 ldrh r3, [r0, #0] 8002ebc: 07d0 lsls r0, r2, #31 8002ebe: bf44 itt mi 8002ec0: f042 0220 orrmi.w r2, r2, #32 8002ec4: 6022 strmi r2, [r4, #0] 8002ec6: b91b cbnz r3, 8002ed0 <_printf_i+0x178> 8002ec8: 6822 ldr r2, [r4, #0] 8002eca: f022 0220 bic.w r2, r2, #32 8002ece: 6022 str r2, [r4, #0] 8002ed0: 2210 movs r2, #16 8002ed2: e7b1 b.n 8002e38 <_printf_i+0xe0> 8002ed4: 4675 mov r5, lr 8002ed6: fbb3 f0f2 udiv r0, r3, r2 8002eda: fb02 3310 mls r3, r2, r0, r3 8002ede: 5ccb ldrb r3, [r1, r3] 8002ee0: f805 3d01 strb.w r3, [r5, #-1]! 8002ee4: 4603 mov r3, r0 8002ee6: 2800 cmp r0, #0 8002ee8: d1f5 bne.n 8002ed6 <_printf_i+0x17e> 8002eea: e7b7 b.n 8002e5c <_printf_i+0x104> 8002eec: 6808 ldr r0, [r1, #0] 8002eee: 681a ldr r2, [r3, #0] 8002ef0: f010 0f80 tst.w r0, #128 ; 0x80 8002ef4: 6949 ldr r1, [r1, #20] 8002ef6: d004 beq.n 8002f02 <_printf_i+0x1aa> 8002ef8: 1d10 adds r0, r2, #4 8002efa: 6018 str r0, [r3, #0] 8002efc: 6813 ldr r3, [r2, #0] 8002efe: 6019 str r1, [r3, #0] 8002f00: e007 b.n 8002f12 <_printf_i+0x1ba> 8002f02: f010 0f40 tst.w r0, #64 ; 0x40 8002f06: f102 0004 add.w r0, r2, #4 8002f0a: 6018 str r0, [r3, #0] 8002f0c: 6813 ldr r3, [r2, #0] 8002f0e: d0f6 beq.n 8002efe <_printf_i+0x1a6> 8002f10: 8019 strh r1, [r3, #0] 8002f12: 2300 movs r3, #0 8002f14: 4675 mov r5, lr 8002f16: 6123 str r3, [r4, #16] 8002f18: e7b1 b.n 8002e7e <_printf_i+0x126> 8002f1a: 681a ldr r2, [r3, #0] 8002f1c: 1d11 adds r1, r2, #4 8002f1e: 6019 str r1, [r3, #0] 8002f20: 6815 ldr r5, [r2, #0] 8002f22: 2100 movs r1, #0 8002f24: 6862 ldr r2, [r4, #4] 8002f26: 4628 mov r0, r5 8002f28: f000 f8e0 bl 80030ec 8002f2c: b108 cbz r0, 8002f32 <_printf_i+0x1da> 8002f2e: 1b40 subs r0, r0, r5 8002f30: 6060 str r0, [r4, #4] 8002f32: 6863 ldr r3, [r4, #4] 8002f34: 6123 str r3, [r4, #16] 8002f36: 2300 movs r3, #0 8002f38: f884 3043 strb.w r3, [r4, #67] ; 0x43 8002f3c: e79f b.n 8002e7e <_printf_i+0x126> 8002f3e: 6923 ldr r3, [r4, #16] 8002f40: 462a mov r2, r5 8002f42: 4639 mov r1, r7 8002f44: 4630 mov r0, r6 8002f46: 47c0 blx r8 8002f48: 3001 adds r0, #1 8002f4a: d0a2 beq.n 8002e92 <_printf_i+0x13a> 8002f4c: 6823 ldr r3, [r4, #0] 8002f4e: 079b lsls r3, r3, #30 8002f50: d507 bpl.n 8002f62 <_printf_i+0x20a> 8002f52: 2500 movs r5, #0 8002f54: f104 0919 add.w r9, r4, #25 8002f58: 68e3 ldr r3, [r4, #12] 8002f5a: 9a03 ldr r2, [sp, #12] 8002f5c: 1a9b subs r3, r3, r2 8002f5e: 429d cmp r5, r3 8002f60: db05 blt.n 8002f6e <_printf_i+0x216> 8002f62: 68e0 ldr r0, [r4, #12] 8002f64: 9b03 ldr r3, [sp, #12] 8002f66: 4298 cmp r0, r3 8002f68: bfb8 it lt 8002f6a: 4618 movlt r0, r3 8002f6c: e793 b.n 8002e96 <_printf_i+0x13e> 8002f6e: 2301 movs r3, #1 8002f70: 464a mov r2, r9 8002f72: 4639 mov r1, r7 8002f74: 4630 mov r0, r6 8002f76: 47c0 blx r8 8002f78: 3001 adds r0, #1 8002f7a: d08a beq.n 8002e92 <_printf_i+0x13a> 8002f7c: 3501 adds r5, #1 8002f7e: e7eb b.n 8002f58 <_printf_i+0x200> 8002f80: 2b00 cmp r3, #0 8002f82: d1a7 bne.n 8002ed4 <_printf_i+0x17c> 8002f84: 780b ldrb r3, [r1, #0] 8002f86: f104 0542 add.w r5, r4, #66 ; 0x42 8002f8a: f884 3042 strb.w r3, [r4, #66] ; 0x42 8002f8e: e765 b.n 8002e5c <_printf_i+0x104> 8002f90: 0800325e .word 0x0800325e 8002f94: 0800324d .word 0x0800324d 08002f98 <_sbrk_r>: 8002f98: b538 push {r3, r4, r5, lr} 8002f9a: 2300 movs r3, #0 8002f9c: 4c05 ldr r4, [pc, #20] ; (8002fb4 <_sbrk_r+0x1c>) 8002f9e: 4605 mov r5, r0 8002fa0: 4608 mov r0, r1 8002fa2: 6023 str r3, [r4, #0] 8002fa4: f7fe ff84 bl 8001eb0 <_sbrk> 8002fa8: 1c43 adds r3, r0, #1 8002faa: d102 bne.n 8002fb2 <_sbrk_r+0x1a> 8002fac: 6823 ldr r3, [r4, #0] 8002fae: b103 cbz r3, 8002fb2 <_sbrk_r+0x1a> 8002fb0: 602b str r3, [r5, #0] 8002fb2: bd38 pop {r3, r4, r5, pc} 8002fb4: 200015d4 .word 0x200015d4 08002fb8 <__sread>: 8002fb8: b510 push {r4, lr} 8002fba: 460c mov r4, r1 8002fbc: f9b1 100e ldrsh.w r1, [r1, #14] 8002fc0: f000 f8a4 bl 800310c <_read_r> 8002fc4: 2800 cmp r0, #0 8002fc6: bfab itete ge 8002fc8: 6d63 ldrge r3, [r4, #84] ; 0x54 8002fca: 89a3 ldrhlt r3, [r4, #12] 8002fcc: 181b addge r3, r3, r0 8002fce: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 8002fd2: bfac ite ge 8002fd4: 6563 strge r3, [r4, #84] ; 0x54 8002fd6: 81a3 strhlt r3, [r4, #12] 8002fd8: bd10 pop {r4, pc} 08002fda <__swrite>: 8002fda: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8002fde: 461f mov r7, r3 8002fe0: 898b ldrh r3, [r1, #12] 8002fe2: 4605 mov r5, r0 8002fe4: 05db lsls r3, r3, #23 8002fe6: 460c mov r4, r1 8002fe8: 4616 mov r6, r2 8002fea: d505 bpl.n 8002ff8 <__swrite+0x1e> 8002fec: 2302 movs r3, #2 8002fee: 2200 movs r2, #0 8002ff0: f9b1 100e ldrsh.w r1, [r1, #14] 8002ff4: f000 f868 bl 80030c8 <_lseek_r> 8002ff8: 89a3 ldrh r3, [r4, #12] 8002ffa: 4632 mov r2, r6 8002ffc: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8003000: 81a3 strh r3, [r4, #12] 8003002: f9b4 100e ldrsh.w r1, [r4, #14] 8003006: 463b mov r3, r7 8003008: 4628 mov r0, r5 800300a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800300e: f000 b817 b.w 8003040 <_write_r> 08003012 <__sseek>: 8003012: b510 push {r4, lr} 8003014: 460c mov r4, r1 8003016: f9b1 100e ldrsh.w r1, [r1, #14] 800301a: f000 f855 bl 80030c8 <_lseek_r> 800301e: 1c43 adds r3, r0, #1 8003020: 89a3 ldrh r3, [r4, #12] 8003022: bf15 itete ne 8003024: 6560 strne r0, [r4, #84] ; 0x54 8003026: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800302a: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800302e: 81a3 strheq r3, [r4, #12] 8003030: bf18 it ne 8003032: 81a3 strhne r3, [r4, #12] 8003034: bd10 pop {r4, pc} 08003036 <__sclose>: 8003036: f9b1 100e ldrsh.w r1, [r1, #14] 800303a: f000 b813 b.w 8003064 <_close_r> ... 08003040 <_write_r>: 8003040: b538 push {r3, r4, r5, lr} 8003042: 4605 mov r5, r0 8003044: 4608 mov r0, r1 8003046: 4611 mov r1, r2 8003048: 2200 movs r2, #0 800304a: 4c05 ldr r4, [pc, #20] ; (8003060 <_write_r+0x20>) 800304c: 6022 str r2, [r4, #0] 800304e: 461a mov r2, r3 8003050: f7fe fda2 bl 8001b98 <_write> 8003054: 1c43 adds r3, r0, #1 8003056: d102 bne.n 800305e <_write_r+0x1e> 8003058: 6823 ldr r3, [r4, #0] 800305a: b103 cbz r3, 800305e <_write_r+0x1e> 800305c: 602b str r3, [r5, #0] 800305e: bd38 pop {r3, r4, r5, pc} 8003060: 200015d4 .word 0x200015d4 08003064 <_close_r>: 8003064: b538 push {r3, r4, r5, lr} 8003066: 2300 movs r3, #0 8003068: 4c05 ldr r4, [pc, #20] ; (8003080 <_close_r+0x1c>) 800306a: 4605 mov r5, r0 800306c: 4608 mov r0, r1 800306e: 6023 str r3, [r4, #0] 8003070: f7fe ff38 bl 8001ee4 <_close> 8003074: 1c43 adds r3, r0, #1 8003076: d102 bne.n 800307e <_close_r+0x1a> 8003078: 6823 ldr r3, [r4, #0] 800307a: b103 cbz r3, 800307e <_close_r+0x1a> 800307c: 602b str r3, [r5, #0] 800307e: bd38 pop {r3, r4, r5, pc} 8003080: 200015d4 .word 0x200015d4 08003084 <_fstat_r>: 8003084: b538 push {r3, r4, r5, lr} 8003086: 2300 movs r3, #0 8003088: 4c06 ldr r4, [pc, #24] ; (80030a4 <_fstat_r+0x20>) 800308a: 4605 mov r5, r0 800308c: 4608 mov r0, r1 800308e: 4611 mov r1, r2 8003090: 6023 str r3, [r4, #0] 8003092: f7fe ff2a bl 8001eea <_fstat> 8003096: 1c43 adds r3, r0, #1 8003098: d102 bne.n 80030a0 <_fstat_r+0x1c> 800309a: 6823 ldr r3, [r4, #0] 800309c: b103 cbz r3, 80030a0 <_fstat_r+0x1c> 800309e: 602b str r3, [r5, #0] 80030a0: bd38 pop {r3, r4, r5, pc} 80030a2: bf00 nop 80030a4: 200015d4 .word 0x200015d4 080030a8 <_isatty_r>: 80030a8: b538 push {r3, r4, r5, lr} 80030aa: 2300 movs r3, #0 80030ac: 4c05 ldr r4, [pc, #20] ; (80030c4 <_isatty_r+0x1c>) 80030ae: 4605 mov r5, r0 80030b0: 4608 mov r0, r1 80030b2: 6023 str r3, [r4, #0] 80030b4: f7fe ff1e bl 8001ef4 <_isatty> 80030b8: 1c43 adds r3, r0, #1 80030ba: d102 bne.n 80030c2 <_isatty_r+0x1a> 80030bc: 6823 ldr r3, [r4, #0] 80030be: b103 cbz r3, 80030c2 <_isatty_r+0x1a> 80030c0: 602b str r3, [r5, #0] 80030c2: bd38 pop {r3, r4, r5, pc} 80030c4: 200015d4 .word 0x200015d4 080030c8 <_lseek_r>: 80030c8: b538 push {r3, r4, r5, lr} 80030ca: 4605 mov r5, r0 80030cc: 4608 mov r0, r1 80030ce: 4611 mov r1, r2 80030d0: 2200 movs r2, #0 80030d2: 4c05 ldr r4, [pc, #20] ; (80030e8 <_lseek_r+0x20>) 80030d4: 6022 str r2, [r4, #0] 80030d6: 461a mov r2, r3 80030d8: f7fe ff0e bl 8001ef8 <_lseek> 80030dc: 1c43 adds r3, r0, #1 80030de: d102 bne.n 80030e6 <_lseek_r+0x1e> 80030e0: 6823 ldr r3, [r4, #0] 80030e2: b103 cbz r3, 80030e6 <_lseek_r+0x1e> 80030e4: 602b str r3, [r5, #0] 80030e6: bd38 pop {r3, r4, r5, pc} 80030e8: 200015d4 .word 0x200015d4 080030ec : 80030ec: b510 push {r4, lr} 80030ee: b2c9 uxtb r1, r1 80030f0: 4402 add r2, r0 80030f2: 4290 cmp r0, r2 80030f4: 4603 mov r3, r0 80030f6: d101 bne.n 80030fc 80030f8: 2000 movs r0, #0 80030fa: bd10 pop {r4, pc} 80030fc: 781c ldrb r4, [r3, #0] 80030fe: 3001 adds r0, #1 8003100: 428c cmp r4, r1 8003102: d1f6 bne.n 80030f2 8003104: 4618 mov r0, r3 8003106: bd10 pop {r4, pc} 08003108 <__malloc_lock>: 8003108: 4770 bx lr 0800310a <__malloc_unlock>: 800310a: 4770 bx lr 0800310c <_read_r>: 800310c: b538 push {r3, r4, r5, lr} 800310e: 4605 mov r5, r0 8003110: 4608 mov r0, r1 8003112: 4611 mov r1, r2 8003114: 2200 movs r2, #0 8003116: 4c05 ldr r4, [pc, #20] ; (800312c <_read_r+0x20>) 8003118: 6022 str r2, [r4, #0] 800311a: 461a mov r2, r3 800311c: f7fe feba bl 8001e94 <_read> 8003120: 1c43 adds r3, r0, #1 8003122: d102 bne.n 800312a <_read_r+0x1e> 8003124: 6823 ldr r3, [r4, #0] 8003126: b103 cbz r3, 800312a <_read_r+0x1e> 8003128: 602b str r3, [r5, #0] 800312a: bd38 pop {r3, r4, r5, pc} 800312c: 200015d4 .word 0x200015d4 08003130 <_init>: 8003130: b5f8 push {r3, r4, r5, r6, r7, lr} 8003132: bf00 nop 8003134: bcf8 pop {r3, r4, r5, r6, r7} 8003136: bc08 pop {r3} 8003138: 469e mov lr, r3 800313a: 4770 bx lr 0800313c <_fini>: 800313c: b5f8 push {r3, r4, r5, r6, r7, lr} 800313e: bf00 nop 8003140: bcf8 pop {r3, r4, r5, r6, r7} 8003142: bc08 pop {r3} 8003144: 469e mov lr, r3 8003146: 4770 bx lr