STM32F103_ATTEN_PLL_Zig.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000338c 080001e4 080001e4 000101e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000128 08003570 08003570 00013570 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 08003698 08003698 00013698 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 0800369c 0800369c 0001369c 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000280 20000000 080036a0 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00000edc 20000280 08003920 00020280 2**3 ALLOC 7 ._user_heap_stack 00000600 2000115c 08003920 0002115c 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00020280 2**0 CONTENTS, READONLY 9 .debug_info 0001ea13 00000000 00000000 000202a9 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00003e8e 00000000 00000000 0003ecbc 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000ac0a 00000000 00000000 00042b4a 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000cf8 00000000 00000000 0004d758 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 000013d0 00000000 00000000 0004e450 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00008ed3 00000000 00000000 0004f820 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004e4e 00000000 00000000 000586f3 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0005d541 2**0 CONTENTS, READONLY 17 .debug_frame 00002e38 00000000 00000000 0005d5c0 2**2 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001e4 <__do_global_dtors_aux>: 80001e4: b510 push {r4, lr} 80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>) 80001e8: 7823 ldrb r3, [r4, #0] 80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16> 80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>) 80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12> 80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>) 80001f2: f3af 8000 nop.w 80001f6: 2301 movs r3, #1 80001f8: 7023 strb r3, [r4, #0] 80001fa: bd10 pop {r4, pc} 80001fc: 20000280 .word 0x20000280 8000200: 00000000 .word 0x00000000 8000204: 08003558 .word 0x08003558 08000208 : 8000208: b508 push {r3, lr} 800020a: 4b03 ldr r3, [pc, #12] ; (8000218 ) 800020c: b11b cbz r3, 8000216 800020e: 4903 ldr r1, [pc, #12] ; (800021c ) 8000210: 4803 ldr r0, [pc, #12] ; (8000220 ) 8000212: f3af 8000 nop.w 8000216: bd08 pop {r3, pc} 8000218: 00000000 .word 0x00000000 800021c: 20000284 .word 0x20000284 8000220: 08003558 .word 0x08003558 08000224 <__aeabi_llsr>: 8000224: 40d0 lsrs r0, r2 8000226: 1c0b adds r3, r1, #0 8000228: 40d1 lsrs r1, r2 800022a: 469c mov ip, r3 800022c: 3a20 subs r2, #32 800022e: 40d3 lsrs r3, r2 8000230: 4318 orrs r0, r3 8000232: 4252 negs r2, r2 8000234: 4663 mov r3, ip 8000236: 4093 lsls r3, r2 8000238: 4318 orrs r0, r3 800023a: 4770 bx lr 0800023c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800023c: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800023e: 4b0e ldr r3, [pc, #56] ; (8000278 ) { 8000240: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000242: 7818 ldrb r0, [r3, #0] 8000244: f44f 737a mov.w r3, #1000 ; 0x3e8 8000248: fbb3 f3f0 udiv r3, r3, r0 800024c: 4a0b ldr r2, [pc, #44] ; (800027c ) 800024e: 6810 ldr r0, [r2, #0] 8000250: fbb0 f0f3 udiv r0, r0, r3 8000254: f000 f88c bl 8000370 8000258: 4604 mov r4, r0 800025a: b958 cbnz r0, 8000274 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800025c: 2d0f cmp r5, #15 800025e: d809 bhi.n 8000274 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000260: 4602 mov r2, r0 8000262: 4629 mov r1, r5 8000264: f04f 30ff mov.w r0, #4294967295 8000268: f000 f842 bl 80002f0 uwTickPrio = TickPriority; 800026c: 4b04 ldr r3, [pc, #16] ; (8000280 ) 800026e: 4620 mov r0, r4 8000270: 601d str r5, [r3, #0] 8000272: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000274: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 8000276: bd38 pop {r3, r4, r5, pc} 8000278: 20000000 .word 0x20000000 800027c: 20000218 .word 0x20000218 8000280: 20000004 .word 0x20000004 08000284 : __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000284: 4a07 ldr r2, [pc, #28] ; (80002a4 ) { 8000286: b508 push {r3, lr} __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8000288: 6813 ldr r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800028a: 2003 movs r0, #3 __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800028c: f043 0310 orr.w r3, r3, #16 8000290: 6013 str r3, [r2, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8000292: f000 f81b bl 80002cc HAL_InitTick(TICK_INT_PRIORITY); 8000296: 2000 movs r0, #0 8000298: f7ff ffd0 bl 800023c HAL_MspInit(); 800029c: f001 feee bl 800207c } 80002a0: 2000 movs r0, #0 80002a2: bd08 pop {r3, pc} 80002a4: 40022000 .word 0x40022000 080002a8 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 80002a8: 4a03 ldr r2, [pc, #12] ; (80002b8 ) 80002aa: 4b04 ldr r3, [pc, #16] ; (80002bc ) 80002ac: 6811 ldr r1, [r2, #0] 80002ae: 781b ldrb r3, [r3, #0] 80002b0: 440b add r3, r1 80002b2: 6013 str r3, [r2, #0] 80002b4: 4770 bx lr 80002b6: bf00 nop 80002b8: 200002d8 .word 0x200002d8 80002bc: 20000000 .word 0x20000000 080002c0 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 80002c0: 4b01 ldr r3, [pc, #4] ; (80002c8 ) 80002c2: 6818 ldr r0, [r3, #0] } 80002c4: 4770 bx lr 80002c6: bf00 nop 80002c8: 200002d8 .word 0x200002d8 080002cc : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 80002cc: 4a07 ldr r2, [pc, #28] ; (80002ec ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002ce: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 80002d0: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 80002d2: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80002d6: f423 63e0 bic.w r3, r3, #1792 ; 0x700 80002da: 041b lsls r3, r3, #16 80002dc: 0c1b lsrs r3, r3, #16 80002de: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80002e2: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 80002e6: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 80002e8: 60d3 str r3, [r2, #12] 80002ea: 4770 bx lr 80002ec: e000ed00 .word 0xe000ed00 080002f0 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80002f0: 4b17 ldr r3, [pc, #92] ; (8000350 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 80002f2: b530 push {r4, r5, lr} 80002f4: 68dc ldr r4, [r3, #12] 80002f6: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80002fa: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80002fe: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000300: 2b04 cmp r3, #4 8000302: bf28 it cs 8000304: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000306: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000308: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800030c: bf98 it ls 800030e: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000310: fa05 f303 lsl.w r3, r5, r3 8000314: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000318: bf88 it hi 800031a: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800031c: 4019 ands r1, r3 800031e: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000320: fa05 f404 lsl.w r4, r5, r4 8000324: 3c01 subs r4, #1 8000326: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8000328: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 800032a: ea42 0201 orr.w r2, r2, r1 800032e: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000332: bfaf iteee ge 8000334: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000338: 4b06 ldrlt r3, [pc, #24] ; (8000354 ) 800033a: f000 000f andlt.w r0, r0, #15 800033e: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000340: bfa5 ittet ge 8000342: b2d2 uxtbge r2, r2 8000344: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000348: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800034a: f880 2300 strbge.w r2, [r0, #768] ; 0x300 800034e: bd30 pop {r4, r5, pc} 8000350: e000ed00 .word 0xe000ed00 8000354: e000ed14 .word 0xe000ed14 08000358 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 8000358: 2301 movs r3, #1 800035a: 0942 lsrs r2, r0, #5 800035c: f000 001f and.w r0, r0, #31 8000360: fa03 f000 lsl.w r0, r3, r0 8000364: 4b01 ldr r3, [pc, #4] ; (800036c ) 8000366: f843 0022 str.w r0, [r3, r2, lsl #2] 800036a: 4770 bx lr 800036c: e000e100 .word 0xe000e100 08000370 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8000370: 3801 subs r0, #1 8000372: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8000376: d20a bcs.n 800038e SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000378: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800037a: 4b06 ldr r3, [pc, #24] ; (8000394 ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800037c: 4a06 ldr r2, [pc, #24] ; (8000398 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800037e: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000380: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000384: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8000386: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8000388: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 800038a: 601a str r2, [r3, #0] 800038c: 4770 bx lr return (1UL); /* Reload value impossible */ 800038e: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 8000390: 4770 bx lr 8000392: bf00 nop 8000394: e000e010 .word 0xe000e010 8000398: e000ed00 .word 0xe000ed00 0800039c : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 800039c: b510 push {r4, lr} uint32_t tmp = 0U; /* Check the DMA handle allocation */ if(hdma == NULL) 800039e: 2800 cmp r0, #0 80003a0: d032 beq.n 8000408 assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F100xE) || defined (STM32F105xC) || defined (STM32F107xC) /* calculation of the channel index */ if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) 80003a2: 6801 ldr r1, [r0, #0] 80003a4: 4b19 ldr r3, [pc, #100] ; (800040c ) 80003a6: 2414 movs r4, #20 80003a8: 4299 cmp r1, r3 80003aa: d825 bhi.n 80003f8 { /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003ac: 4a18 ldr r2, [pc, #96] ; (8000410 ) hdma->DmaBaseAddress = DMA1; 80003ae: f2a3 4307 subw r3, r3, #1031 ; 0x407 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 80003b2: 440a add r2, r1 80003b4: fbb2 f2f4 udiv r2, r2, r4 80003b8: 0092 lsls r2, r2, #2 80003ba: 6402 str r2, [r0, #64] ; 0x40 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 80003bc: 6884 ldr r4, [r0, #8] hdma->DmaBaseAddress = DMA2; 80003be: 63c3 str r3, [r0, #60] ; 0x3c tmp |= hdma->Init.Direction | 80003c0: 6843 ldr r3, [r0, #4] tmp = hdma->Instance->CCR; 80003c2: 680a ldr r2, [r1, #0] tmp |= hdma->Init.Direction | 80003c4: 4323 orrs r3, r4 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003c6: 68c4 ldr r4, [r0, #12] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003c8: f422 527f bic.w r2, r2, #16320 ; 0x3fc0 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003cc: 4323 orrs r3, r4 80003ce: 6904 ldr r4, [r0, #16] tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 80003d0: f022 0230 bic.w r2, r2, #48 ; 0x30 hdma->Init.PeriphInc | hdma->Init.MemInc | 80003d4: 4323 orrs r3, r4 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 80003d6: 6944 ldr r4, [r0, #20] 80003d8: 4323 orrs r3, r4 80003da: 6984 ldr r4, [r0, #24] 80003dc: 4323 orrs r3, r4 hdma->Init.Mode | hdma->Init.Priority; 80003de: 69c4 ldr r4, [r0, #28] 80003e0: 4323 orrs r3, r4 tmp |= hdma->Init.Direction | 80003e2: 4313 orrs r3, r2 /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 80003e4: 600b str r3, [r1, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 80003e6: 2201 movs r2, #1 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003e8: 2300 movs r3, #0 hdma->State = HAL_DMA_STATE_READY; 80003ea: f880 2021 strb.w r2, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80003ee: 6383 str r3, [r0, #56] ; 0x38 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 80003f0: f880 3020 strb.w r3, [r0, #32] return HAL_OK; 80003f4: 4618 mov r0, r3 80003f6: bd10 pop {r4, pc} hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; 80003f8: 4b06 ldr r3, [pc, #24] ; (8000414 ) 80003fa: 440b add r3, r1 80003fc: fbb3 f3f4 udiv r3, r3, r4 8000400: 009b lsls r3, r3, #2 8000402: 6403 str r3, [r0, #64] ; 0x40 hdma->DmaBaseAddress = DMA2; 8000404: 4b04 ldr r3, [pc, #16] ; (8000418 ) 8000406: e7d9 b.n 80003bc return HAL_ERROR; 8000408: 2001 movs r0, #1 } 800040a: bd10 pop {r4, pc} 800040c: 40020407 .word 0x40020407 8000410: bffdfff8 .word 0xbffdfff8 8000414: bffdfbf8 .word 0xbffdfbf8 8000418: 40020400 .word 0x40020400 0800041c : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 800041c: b5f0 push {r4, r5, r6, r7, lr} /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 800041e: f890 4020 ldrb.w r4, [r0, #32] 8000422: 2c01 cmp r4, #1 8000424: d035 beq.n 8000492 8000426: 2401 movs r4, #1 if(HAL_DMA_STATE_READY == hdma->State) 8000428: f890 5021 ldrb.w r5, [r0, #33] ; 0x21 __HAL_LOCK(hdma); 800042c: f880 4020 strb.w r4, [r0, #32] if(HAL_DMA_STATE_READY == hdma->State) 8000430: 42a5 cmp r5, r4 8000432: f04f 0600 mov.w r6, #0 8000436: f04f 0402 mov.w r4, #2 800043a: d128 bne.n 800048e { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 800043c: f880 4021 strb.w r4, [r0, #33] ; 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8000440: 6804 ldr r4, [r0, #0] hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8000442: 6386 str r6, [r0, #56] ; 0x38 __HAL_DMA_DISABLE(hdma); 8000444: 6826 ldr r6, [r4, #0] * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000446: 6c07 ldr r7, [r0, #64] ; 0x40 __HAL_DMA_DISABLE(hdma); 8000448: f026 0601 bic.w r6, r6, #1 800044c: 6026 str r6, [r4, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800044e: 6bc6 ldr r6, [r0, #60] ; 0x3c 8000450: 40bd lsls r5, r7 8000452: 6075 str r5, [r6, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8000454: 6063 str r3, [r4, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8000456: 6843 ldr r3, [r0, #4] 8000458: 6805 ldr r5, [r0, #0] 800045a: 2b10 cmp r3, #16 if(NULL != hdma->XferHalfCpltCallback) 800045c: 6ac3 ldr r3, [r0, #44] ; 0x2c { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 800045e: bf0b itete eq 8000460: 60a2 streq r2, [r4, #8] } /* Peripheral to Memory */ else { /* Configure DMA Channel source address */ hdma->Instance->CPAR = SrcAddress; 8000462: 60a1 strne r1, [r4, #8] hdma->Instance->CMAR = SrcAddress; 8000464: 60e1 streq r1, [r4, #12] /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; 8000466: 60e2 strne r2, [r4, #12] if(NULL != hdma->XferHalfCpltCallback) 8000468: b14b cbz r3, 800047e __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800046a: 6823 ldr r3, [r4, #0] 800046c: f043 030e orr.w r3, r3, #14 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000470: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE(hdma); 8000472: 682b ldr r3, [r5, #0] HAL_StatusTypeDef status = HAL_OK; 8000474: 2000 movs r0, #0 __HAL_DMA_ENABLE(hdma); 8000476: f043 0301 orr.w r3, r3, #1 800047a: 602b str r3, [r5, #0] 800047c: bdf0 pop {r4, r5, r6, r7, pc} __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 800047e: 6823 ldr r3, [r4, #0] 8000480: f023 0304 bic.w r3, r3, #4 8000484: 6023 str r3, [r4, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8000486: 6823 ldr r3, [r4, #0] 8000488: f043 030a orr.w r3, r3, #10 800048c: e7f0 b.n 8000470 __HAL_UNLOCK(hdma); 800048e: f880 6020 strb.w r6, [r0, #32] __HAL_LOCK(hdma); 8000492: 2002 movs r0, #2 } 8000494: bdf0 pop {r4, r5, r6, r7, pc} ... 08000498 : if(HAL_DMA_STATE_BUSY != hdma->State) 8000498: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 800049c: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 800049e: 2b02 cmp r3, #2 80004a0: d003 beq.n 80004aa hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80004a2: 2304 movs r3, #4 80004a4: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80004a6: 2001 movs r0, #1 80004a8: bd10 pop {r4, pc} __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80004aa: 6803 ldr r3, [r0, #0] 80004ac: 681a ldr r2, [r3, #0] 80004ae: f022 020e bic.w r2, r2, #14 80004b2: 601a str r2, [r3, #0] __HAL_DMA_DISABLE(hdma); 80004b4: 681a ldr r2, [r3, #0] 80004b6: f022 0201 bic.w r2, r2, #1 80004ba: 601a str r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004bc: 4a29 ldr r2, [pc, #164] ; (8000564 ) 80004be: 4293 cmp r3, r2 80004c0: d924 bls.n 800050c 80004c2: f502 7262 add.w r2, r2, #904 ; 0x388 80004c6: 4293 cmp r3, r2 80004c8: d019 beq.n 80004fe 80004ca: 3214 adds r2, #20 80004cc: 4293 cmp r3, r2 80004ce: d018 beq.n 8000502 80004d0: 3214 adds r2, #20 80004d2: 4293 cmp r3, r2 80004d4: d017 beq.n 8000506 80004d6: 3214 adds r2, #20 80004d8: 4293 cmp r3, r2 80004da: bf0c ite eq 80004dc: f44f 5380 moveq.w r3, #4096 ; 0x1000 80004e0: f44f 3380 movne.w r3, #65536 ; 0x10000 80004e4: 4a20 ldr r2, [pc, #128] ; (8000568 ) 80004e6: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 80004e8: 2301 movs r3, #1 __HAL_UNLOCK(hdma); 80004ea: 2400 movs r4, #0 hdma->State = HAL_DMA_STATE_READY; 80004ec: f880 3021 strb.w r3, [r0, #33] ; 0x21 if(hdma->XferAbortCallback != NULL) 80004f0: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 80004f2: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 80004f6: b39b cbz r3, 8000560 hdma->XferAbortCallback(hdma); 80004f8: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 80004fa: 4620 mov r0, r4 80004fc: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80004fe: 2301 movs r3, #1 8000500: e7f0 b.n 80004e4 8000502: 2310 movs r3, #16 8000504: e7ee b.n 80004e4 8000506: f44f 7380 mov.w r3, #256 ; 0x100 800050a: e7eb b.n 80004e4 800050c: 4917 ldr r1, [pc, #92] ; (800056c ) 800050e: 428b cmp r3, r1 8000510: d016 beq.n 8000540 8000512: 3114 adds r1, #20 8000514: 428b cmp r3, r1 8000516: d015 beq.n 8000544 8000518: 3114 adds r1, #20 800051a: 428b cmp r3, r1 800051c: d014 beq.n 8000548 800051e: 3114 adds r1, #20 8000520: 428b cmp r3, r1 8000522: d014 beq.n 800054e 8000524: 3114 adds r1, #20 8000526: 428b cmp r3, r1 8000528: d014 beq.n 8000554 800052a: 3114 adds r1, #20 800052c: 428b cmp r3, r1 800052e: d014 beq.n 800055a 8000530: 4293 cmp r3, r2 8000532: bf14 ite ne 8000534: f44f 3380 movne.w r3, #65536 ; 0x10000 8000538: f04f 7380 moveq.w r3, #16777216 ; 0x1000000 800053c: 4a0c ldr r2, [pc, #48] ; (8000570 ) 800053e: e7d2 b.n 80004e6 8000540: 2301 movs r3, #1 8000542: e7fb b.n 800053c 8000544: 2310 movs r3, #16 8000546: e7f9 b.n 800053c 8000548: f44f 7380 mov.w r3, #256 ; 0x100 800054c: e7f6 b.n 800053c 800054e: f44f 5380 mov.w r3, #4096 ; 0x1000 8000552: e7f3 b.n 800053c 8000554: f44f 3380 mov.w r3, #65536 ; 0x10000 8000558: e7f0 b.n 800053c 800055a: f44f 1380 mov.w r3, #1048576 ; 0x100000 800055e: e7ed b.n 800053c HAL_StatusTypeDef status = HAL_OK; 8000560: 4618 mov r0, r3 } 8000562: bd10 pop {r4, pc} 8000564: 40020080 .word 0x40020080 8000568: 40020400 .word 0x40020400 800056c: 40020008 .word 0x40020008 8000570: 40020000 .word 0x40020000 08000574 : { 8000574: b470 push {r4, r5, r6} if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000576: 2504 movs r5, #4 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8000578: 6bc6 ldr r6, [r0, #60] ; 0x3c if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 800057a: 6c02 ldr r2, [r0, #64] ; 0x40 uint32_t flag_it = hdma->DmaBaseAddress->ISR; 800057c: 6834 ldr r4, [r6, #0] uint32_t source_it = hdma->Instance->CCR; 800057e: 6803 ldr r3, [r0, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000580: 4095 lsls r5, r2 8000582: 4225 tst r5, r4 uint32_t source_it = hdma->Instance->CCR; 8000584: 6819 ldr r1, [r3, #0] if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8000586: d055 beq.n 8000634 8000588: 074d lsls r5, r1, #29 800058a: d553 bpl.n 8000634 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 800058c: 681a ldr r2, [r3, #0] 800058e: 0696 lsls r6, r2, #26 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8000590: bf5e ittt pl 8000592: 681a ldrpl r2, [r3, #0] 8000594: f022 0204 bicpl.w r2, r2, #4 8000598: 601a strpl r2, [r3, #0] __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 800059a: 4a60 ldr r2, [pc, #384] ; (800071c ) 800059c: 4293 cmp r3, r2 800059e: d91f bls.n 80005e0 80005a0: f502 7262 add.w r2, r2, #904 ; 0x388 80005a4: 4293 cmp r3, r2 80005a6: d014 beq.n 80005d2 80005a8: 3214 adds r2, #20 80005aa: 4293 cmp r3, r2 80005ac: d013 beq.n 80005d6 80005ae: 3214 adds r2, #20 80005b0: 4293 cmp r3, r2 80005b2: d012 beq.n 80005da 80005b4: 3214 adds r2, #20 80005b6: 4293 cmp r3, r2 80005b8: bf0c ite eq 80005ba: f44f 4380 moveq.w r3, #16384 ; 0x4000 80005be: f44f 2380 movne.w r3, #262144 ; 0x40000 80005c2: 4a57 ldr r2, [pc, #348] ; (8000720 ) 80005c4: 6053 str r3, [r2, #4] if(hdma->XferHalfCpltCallback != NULL) 80005c6: 6ac3 ldr r3, [r0, #44] ; 0x2c if (hdma->XferErrorCallback != NULL) 80005c8: 2b00 cmp r3, #0 80005ca: f000 80a5 beq.w 8000718 } 80005ce: bc70 pop {r4, r5, r6} hdma->XferErrorCallback(hdma); 80005d0: 4718 bx r3 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80005d2: 2304 movs r3, #4 80005d4: e7f5 b.n 80005c2 80005d6: 2340 movs r3, #64 ; 0x40 80005d8: e7f3 b.n 80005c2 80005da: f44f 6380 mov.w r3, #1024 ; 0x400 80005de: e7f0 b.n 80005c2 80005e0: 4950 ldr r1, [pc, #320] ; (8000724 ) 80005e2: 428b cmp r3, r1 80005e4: d016 beq.n 8000614 80005e6: 3114 adds r1, #20 80005e8: 428b cmp r3, r1 80005ea: d015 beq.n 8000618 80005ec: 3114 adds r1, #20 80005ee: 428b cmp r3, r1 80005f0: d014 beq.n 800061c 80005f2: 3114 adds r1, #20 80005f4: 428b cmp r3, r1 80005f6: d014 beq.n 8000622 80005f8: 3114 adds r1, #20 80005fa: 428b cmp r3, r1 80005fc: d014 beq.n 8000628 80005fe: 3114 adds r1, #20 8000600: 428b cmp r3, r1 8000602: d014 beq.n 800062e 8000604: 4293 cmp r3, r2 8000606: bf14 ite ne 8000608: f44f 2380 movne.w r3, #262144 ; 0x40000 800060c: f04f 6380 moveq.w r3, #67108864 ; 0x4000000 8000610: 4a45 ldr r2, [pc, #276] ; (8000728 ) 8000612: e7d7 b.n 80005c4 8000614: 2304 movs r3, #4 8000616: e7fb b.n 8000610 8000618: 2340 movs r3, #64 ; 0x40 800061a: e7f9 b.n 8000610 800061c: f44f 6380 mov.w r3, #1024 ; 0x400 8000620: e7f6 b.n 8000610 8000622: f44f 4380 mov.w r3, #16384 ; 0x4000 8000626: e7f3 b.n 8000610 8000628: f44f 2380 mov.w r3, #262144 ; 0x40000 800062c: e7f0 b.n 8000610 800062e: f44f 0380 mov.w r3, #4194304 ; 0x400000 8000632: e7ed b.n 8000610 else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8000634: 2502 movs r5, #2 8000636: 4095 lsls r5, r2 8000638: 4225 tst r5, r4 800063a: d057 beq.n 80006ec 800063c: 078d lsls r5, r1, #30 800063e: d555 bpl.n 80006ec if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8000640: 681a ldr r2, [r3, #0] 8000642: 0694 lsls r4, r2, #26 8000644: d406 bmi.n 8000654 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8000646: 681a ldr r2, [r3, #0] 8000648: f022 020a bic.w r2, r2, #10 800064c: 601a str r2, [r3, #0] hdma->State = HAL_DMA_STATE_READY; 800064e: 2201 movs r2, #1 8000650: f880 2021 strb.w r2, [r0, #33] ; 0x21 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8000654: 4a31 ldr r2, [pc, #196] ; (800071c ) 8000656: 4293 cmp r3, r2 8000658: d91e bls.n 8000698 800065a: f502 7262 add.w r2, r2, #904 ; 0x388 800065e: 4293 cmp r3, r2 8000660: d013 beq.n 800068a 8000662: 3214 adds r2, #20 8000664: 4293 cmp r3, r2 8000666: d012 beq.n 800068e 8000668: 3214 adds r2, #20 800066a: 4293 cmp r3, r2 800066c: d011 beq.n 8000692 800066e: 3214 adds r2, #20 8000670: 4293 cmp r3, r2 8000672: bf0c ite eq 8000674: f44f 5300 moveq.w r3, #8192 ; 0x2000 8000678: f44f 3300 movne.w r3, #131072 ; 0x20000 800067c: 4a28 ldr r2, [pc, #160] ; (8000720 ) 800067e: 6053 str r3, [r2, #4] __HAL_UNLOCK(hdma); 8000680: 2300 movs r3, #0 8000682: f880 3020 strb.w r3, [r0, #32] if(hdma->XferCpltCallback != NULL) 8000686: 6a83 ldr r3, [r0, #40] ; 0x28 8000688: e79e b.n 80005c8 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 800068a: 2302 movs r3, #2 800068c: e7f6 b.n 800067c 800068e: 2320 movs r3, #32 8000690: e7f4 b.n 800067c 8000692: f44f 7300 mov.w r3, #512 ; 0x200 8000696: e7f1 b.n 800067c 8000698: 4922 ldr r1, [pc, #136] ; (8000724 ) 800069a: 428b cmp r3, r1 800069c: d016 beq.n 80006cc 800069e: 3114 adds r1, #20 80006a0: 428b cmp r3, r1 80006a2: d015 beq.n 80006d0 80006a4: 3114 adds r1, #20 80006a6: 428b cmp r3, r1 80006a8: d014 beq.n 80006d4 80006aa: 3114 adds r1, #20 80006ac: 428b cmp r3, r1 80006ae: d014 beq.n 80006da 80006b0: 3114 adds r1, #20 80006b2: 428b cmp r3, r1 80006b4: d014 beq.n 80006e0 80006b6: 3114 adds r1, #20 80006b8: 428b cmp r3, r1 80006ba: d014 beq.n 80006e6 80006bc: 4293 cmp r3, r2 80006be: bf14 ite ne 80006c0: f44f 3300 movne.w r3, #131072 ; 0x20000 80006c4: f04f 7300 moveq.w r3, #33554432 ; 0x2000000 80006c8: 4a17 ldr r2, [pc, #92] ; (8000728 ) 80006ca: e7d8 b.n 800067e 80006cc: 2302 movs r3, #2 80006ce: e7fb b.n 80006c8 80006d0: 2320 movs r3, #32 80006d2: e7f9 b.n 80006c8 80006d4: f44f 7300 mov.w r3, #512 ; 0x200 80006d8: e7f6 b.n 80006c8 80006da: f44f 5300 mov.w r3, #8192 ; 0x2000 80006de: e7f3 b.n 80006c8 80006e0: f44f 3300 mov.w r3, #131072 ; 0x20000 80006e4: e7f0 b.n 80006c8 80006e6: f44f 1300 mov.w r3, #2097152 ; 0x200000 80006ea: e7ed b.n 80006c8 else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 80006ec: 2508 movs r5, #8 80006ee: 4095 lsls r5, r2 80006f0: 4225 tst r5, r4 80006f2: d011 beq.n 8000718 80006f4: 0709 lsls r1, r1, #28 80006f6: d50f bpl.n 8000718 __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80006f8: 6819 ldr r1, [r3, #0] 80006fa: f021 010e bic.w r1, r1, #14 80006fe: 6019 str r1, [r3, #0] hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8000700: 2301 movs r3, #1 8000702: fa03 f202 lsl.w r2, r3, r2 8000706: 6072 str r2, [r6, #4] hdma->ErrorCode = HAL_DMA_ERROR_TE; 8000708: 6383 str r3, [r0, #56] ; 0x38 hdma->State = HAL_DMA_STATE_READY; 800070a: f880 3021 strb.w r3, [r0, #33] ; 0x21 __HAL_UNLOCK(hdma); 800070e: 2300 movs r3, #0 8000710: f880 3020 strb.w r3, [r0, #32] if (hdma->XferErrorCallback != NULL) 8000714: 6b03 ldr r3, [r0, #48] ; 0x30 8000716: e757 b.n 80005c8 } 8000718: bc70 pop {r4, r5, r6} 800071a: 4770 bx lr 800071c: 40020080 .word 0x40020080 8000720: 40020400 .word 0x40020400 8000724: 40020008 .word 0x40020008 8000728: 40020000 .word 0x40020000 0800072c : uint32_t flags = 0U; #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800072c: 4a11 ldr r2, [pc, #68] ; (8000774 ) 800072e: 68d3 ldr r3, [r2, #12] 8000730: f013 0310 ands.w r3, r3, #16 8000734: d005 beq.n 8000742 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 8000736: 4910 ldr r1, [pc, #64] ; (8000778 ) 8000738: 69cb ldr r3, [r1, #28] 800073a: f043 0302 orr.w r3, r3, #2 800073e: 61cb str r3, [r1, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8000740: 2310 movs r3, #16 #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8000742: 68d2 ldr r2, [r2, #12] 8000744: 0750 lsls r0, r2, #29 8000746: d506 bpl.n 8000756 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8000748: 490b ldr r1, [pc, #44] ; (8000778 ) #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 800074a: f043 0304 orr.w r3, r3, #4 pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800074e: 69ca ldr r2, [r1, #28] 8000750: f042 0201 orr.w r2, r2, #1 8000754: 61ca str r2, [r1, #28] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 8000756: 4a07 ldr r2, [pc, #28] ; (8000774 ) 8000758: 69d1 ldr r1, [r2, #28] 800075a: 07c9 lsls r1, r1, #31 800075c: d508 bpl.n 8000770 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 800075e: 4806 ldr r0, [pc, #24] ; (8000778 ) 8000760: 69c1 ldr r1, [r0, #28] 8000762: f041 0104 orr.w r1, r1, #4 8000766: 61c1 str r1, [r0, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 8000768: 69d1 ldr r1, [r2, #28] 800076a: f021 0101 bic.w r1, r1, #1 800076e: 61d1 str r1, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8000770: 60d3 str r3, [r2, #12] 8000772: 4770 bx lr 8000774: 40022000 .word 0x40022000 8000778: 200002e0 .word 0x200002e0 0800077c : if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 800077c: 4b06 ldr r3, [pc, #24] ; (8000798 ) 800077e: 6918 ldr r0, [r3, #16] 8000780: f010 0080 ands.w r0, r0, #128 ; 0x80 8000784: d007 beq.n 8000796 WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8000786: 4a05 ldr r2, [pc, #20] ; (800079c ) 8000788: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 800078a: f102 3288 add.w r2, r2, #2290649224 ; 0x88888888 800078e: 605a str r2, [r3, #4] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8000790: 6918 ldr r0, [r3, #16] HAL_StatusTypeDef status = HAL_OK; 8000792: f3c0 10c0 ubfx r0, r0, #7, #1 } 8000796: 4770 bx lr 8000798: 40022000 .word 0x40022000 800079c: 45670123 .word 0x45670123 080007a0 : SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a0: 4a03 ldr r2, [pc, #12] ; (80007b0 ) } 80007a2: 2000 movs r0, #0 SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80007a4: 6913 ldr r3, [r2, #16] 80007a6: f043 0380 orr.w r3, r3, #128 ; 0x80 80007aa: 6113 str r3, [r2, #16] } 80007ac: 4770 bx lr 80007ae: bf00 nop 80007b0: 40022000 .word 0x40022000 080007b4 : { 80007b4: b5f8 push {r3, r4, r5, r6, r7, lr} 80007b6: 4606 mov r6, r0 uint32_t tickstart = HAL_GetTick(); 80007b8: f7ff fd82 bl 80002c0 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007bc: 4c11 ldr r4, [pc, #68] ; (8000804 ) uint32_t tickstart = HAL_GetTick(); 80007be: 4607 mov r7, r0 80007c0: 4625 mov r5, r4 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80007c2: 68e3 ldr r3, [r4, #12] 80007c4: 07d8 lsls r0, r3, #31 80007c6: d412 bmi.n 80007ee if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 80007c8: 68e3 ldr r3, [r4, #12] 80007ca: 0699 lsls r1, r3, #26 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 80007cc: bf44 itt mi 80007ce: 2320 movmi r3, #32 80007d0: 60e3 strmi r3, [r4, #12] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007d2: 68eb ldr r3, [r5, #12] 80007d4: 06da lsls r2, r3, #27 80007d6: d406 bmi.n 80007e6 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007d8: 69eb ldr r3, [r5, #28] if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80007da: 07db lsls r3, r3, #31 80007dc: d403 bmi.n 80007e6 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80007de: 68e8 ldr r0, [r5, #12] __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80007e0: f010 0004 ands.w r0, r0, #4 80007e4: d002 beq.n 80007ec FLASH_SetErrorCode(); 80007e6: f7ff ffa1 bl 800072c return HAL_ERROR; 80007ea: 2001 movs r0, #1 } 80007ec: bdf8 pop {r3, r4, r5, r6, r7, pc} if (Timeout != HAL_MAX_DELAY) 80007ee: 1c73 adds r3, r6, #1 80007f0: d0e7 beq.n 80007c2 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80007f2: b90e cbnz r6, 80007f8 return HAL_TIMEOUT; 80007f4: 2003 movs r0, #3 80007f6: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80007f8: f7ff fd62 bl 80002c0 80007fc: 1bc0 subs r0, r0, r7 80007fe: 4286 cmp r6, r0 8000800: d2df bcs.n 80007c2 8000802: e7f7 b.n 80007f4 8000804: 40022000 .word 0x40022000 08000808 : { 8000808: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} __HAL_LOCK(&pFlash); 800080c: 4c1f ldr r4, [pc, #124] ; (800088c ) { 800080e: 4699 mov r9, r3 __HAL_LOCK(&pFlash); 8000810: 7e23 ldrb r3, [r4, #24] { 8000812: 4605 mov r5, r0 __HAL_LOCK(&pFlash); 8000814: 2b01 cmp r3, #1 { 8000816: 460f mov r7, r1 8000818: 4690 mov r8, r2 __HAL_LOCK(&pFlash); 800081a: d033 beq.n 8000884 800081c: 2301 movs r3, #1 status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800081e: f24c 3050 movw r0, #50000 ; 0xc350 __HAL_LOCK(&pFlash); 8000822: 7623 strb r3, [r4, #24] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8000824: f7ff ffc6 bl 80007b4 if(status == HAL_OK) 8000828: bb40 cbnz r0, 800087c if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 800082a: 2d01 cmp r5, #1 800082c: d003 beq.n 8000836 nbiterations = 4U; 800082e: 2d02 cmp r5, #2 8000830: bf0c ite eq 8000832: 2502 moveq r5, #2 8000834: 2504 movne r5, #4 8000836: 2600 movs r6, #0 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000838: 46b2 mov sl, r6 SET_BIT(FLASH->CR, FLASH_CR_PG); 800083a: f8df b054 ldr.w fp, [pc, #84] ; 8000890 FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 800083e: 0132 lsls r2, r6, #4 8000840: 4640 mov r0, r8 8000842: 4649 mov r1, r9 8000844: f7ff fcee bl 8000224 <__aeabi_llsr> pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000848: f8c4 a01c str.w sl, [r4, #28] SET_BIT(FLASH->CR, FLASH_CR_PG); 800084c: f8db 3010 ldr.w r3, [fp, #16] FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8000850: b280 uxth r0, r0 SET_BIT(FLASH->CR, FLASH_CR_PG); 8000852: f043 0301 orr.w r3, r3, #1 8000856: f8cb 3010 str.w r3, [fp, #16] *(__IO uint16_t*)Address = Data; 800085a: f827 0016 strh.w r0, [r7, r6, lsl #1] status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 800085e: f24c 3050 movw r0, #50000 ; 0xc350 8000862: f7ff ffa7 bl 80007b4 CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8000866: f8db 3010 ldr.w r3, [fp, #16] 800086a: f023 0301 bic.w r3, r3, #1 800086e: f8cb 3010 str.w r3, [fp, #16] if (status != HAL_OK) 8000872: b918 cbnz r0, 800087c 8000874: 3601 adds r6, #1 for (index = 0U; index < nbiterations; index++) 8000876: b2f3 uxtb r3, r6 8000878: 429d cmp r5, r3 800087a: d8e0 bhi.n 800083e __HAL_UNLOCK(&pFlash); 800087c: 2300 movs r3, #0 800087e: 7623 strb r3, [r4, #24] return status; 8000880: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} __HAL_LOCK(&pFlash); 8000884: 2002 movs r0, #2 } 8000886: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 800088a: bf00 nop 800088c: 200002e0 .word 0x200002e0 8000890: 40022000 .word 0x40022000 08000894 : { /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8000894: 2200 movs r2, #0 8000896: 4b06 ldr r3, [pc, #24] ; (80008b0 ) 8000898: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 800089a: 4b06 ldr r3, [pc, #24] ; (80008b4 ) 800089c: 691a ldr r2, [r3, #16] 800089e: f042 0204 orr.w r2, r2, #4 80008a2: 611a str r2, [r3, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008a4: 691a ldr r2, [r3, #16] 80008a6: f042 0240 orr.w r2, r2, #64 ; 0x40 80008aa: 611a str r2, [r3, #16] 80008ac: 4770 bx lr 80008ae: bf00 nop 80008b0: 200002e0 .word 0x200002e0 80008b4: 40022000 .word 0x40022000 080008b8 : * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80008b8: 2200 movs r2, #0 80008ba: 4b06 ldr r3, [pc, #24] ; (80008d4 ) 80008bc: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 80008be: 4b06 ldr r3, [pc, #24] ; (80008d8 ) 80008c0: 691a ldr r2, [r3, #16] 80008c2: f042 0202 orr.w r2, r2, #2 80008c6: 611a str r2, [r3, #16] WRITE_REG(FLASH->AR, PageAddress); 80008c8: 6158 str r0, [r3, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80008ca: 691a ldr r2, [r3, #16] 80008cc: f042 0240 orr.w r2, r2, #64 ; 0x40 80008d0: 611a str r2, [r3, #16] 80008d2: 4770 bx lr 80008d4: 200002e0 .word 0x200002e0 80008d8: 40022000 .word 0x40022000 080008dc : { 80008dc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} __HAL_LOCK(&pFlash); 80008e0: 4d23 ldr r5, [pc, #140] ; (8000970 ) { 80008e2: 4607 mov r7, r0 __HAL_LOCK(&pFlash); 80008e4: 7e2b ldrb r3, [r5, #24] { 80008e6: 4688 mov r8, r1 __HAL_LOCK(&pFlash); 80008e8: 2b01 cmp r3, #1 80008ea: d03d beq.n 8000968 80008ec: 2401 movs r4, #1 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008ee: 6803 ldr r3, [r0, #0] __HAL_LOCK(&pFlash); 80008f0: 762c strb r4, [r5, #24] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008f2: 2b02 cmp r3, #2 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80008f4: f24c 3050 movw r0, #50000 ; 0xc350 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80008f8: d113 bne.n 8000922 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80008fa: f7ff ff5b bl 80007b4 80008fe: b120 cbz r0, 800090a HAL_StatusTypeDef status = HAL_ERROR; 8000900: 2001 movs r0, #1 __HAL_UNLOCK(&pFlash); 8000902: 2300 movs r3, #0 8000904: 762b strb r3, [r5, #24] return status; 8000906: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} FLASH_MassErase(FLASH_BANK_1); 800090a: f7ff ffc3 bl 8000894 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800090e: f24c 3050 movw r0, #50000 ; 0xc350 8000912: f7ff ff4f bl 80007b4 CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 8000916: 4a17 ldr r2, [pc, #92] ; (8000974 ) 8000918: 6913 ldr r3, [r2, #16] 800091a: f023 0304 bic.w r3, r3, #4 800091e: 6113 str r3, [r2, #16] 8000920: e7ef b.n 8000902 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8000922: f7ff ff47 bl 80007b4 8000926: 2800 cmp r0, #0 8000928: d1ea bne.n 8000900 *PageError = 0xFFFFFFFFU; 800092a: f04f 33ff mov.w r3, #4294967295 800092e: f8c8 3000 str.w r3, [r8] HAL_StatusTypeDef status = HAL_ERROR; 8000932: 4620 mov r0, r4 for(address = pEraseInit->PageAddress; 8000934: 68be ldr r6, [r7, #8] CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000936: 4c0f ldr r4, [pc, #60] ; (8000974 ) address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 8000938: 68fa ldr r2, [r7, #12] 800093a: 68bb ldr r3, [r7, #8] 800093c: eb03 23c2 add.w r3, r3, r2, lsl #11 for(address = pEraseInit->PageAddress; 8000940: 429e cmp r6, r3 8000942: d2de bcs.n 8000902 FLASH_PageErase(address); 8000944: 4630 mov r0, r6 8000946: f7ff ffb7 bl 80008b8 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800094a: f24c 3050 movw r0, #50000 ; 0xc350 800094e: f7ff ff31 bl 80007b4 CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8000952: 6923 ldr r3, [r4, #16] 8000954: f023 0302 bic.w r3, r3, #2 8000958: 6123 str r3, [r4, #16] if (status != HAL_OK) 800095a: b110 cbz r0, 8000962 *PageError = address; 800095c: f8c8 6000 str.w r6, [r8] break; 8000960: e7cf b.n 8000902 address += FLASH_PAGE_SIZE) 8000962: f506 6600 add.w r6, r6, #2048 ; 0x800 8000966: e7e7 b.n 8000938 __HAL_LOCK(&pFlash); 8000968: 2002 movs r0, #2 } 800096a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800096e: bf00 nop 8000970: 200002e0 .word 0x200002e0 8000974: 40022000 .word 0x40022000 08000978 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8000978: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 800097c: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800097e: 4616 mov r6, r2 /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8000980: 4f6c ldr r7, [pc, #432] ; (8000b34 ) 8000982: 4b6d ldr r3, [pc, #436] ; (8000b38 ) temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000984: f8df e1b8 ldr.w lr, [pc, #440] ; 8000b40 switch (GPIO_Init->Mode) 8000988: f8df c1b8 ldr.w ip, [pc, #440] ; 8000b44 ioposition = (0x01U << position); 800098c: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8000990: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 8000992: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8000996: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 800099a: 45a0 cmp r8, r4 800099c: f040 8085 bne.w 8000aaa switch (GPIO_Init->Mode) 80009a0: 684d ldr r5, [r1, #4] 80009a2: 2d12 cmp r5, #18 80009a4: f000 80b7 beq.w 8000b16 80009a8: f200 808d bhi.w 8000ac6 80009ac: 2d02 cmp r5, #2 80009ae: f000 80af beq.w 8000b10 80009b2: f200 8081 bhi.w 8000ab8 80009b6: 2d00 cmp r5, #0 80009b8: f000 8091 beq.w 8000ade 80009bc: 2d01 cmp r5, #1 80009be: f000 80a5 beq.w 8000b0c MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009c2: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009c6: 2cff cmp r4, #255 ; 0xff 80009c8: bf93 iteet ls 80009ca: 4682 movls sl, r0 80009cc: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 80009d0: 3d08 subhi r5, #8 80009d2: f8d0 b000 ldrls.w fp, [r0] 80009d6: bf92 itee ls 80009d8: 00b5 lslls r5, r6, #2 80009da: f8d0 b004 ldrhi.w fp, [r0, #4] 80009de: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009e0: fa09 f805 lsl.w r8, r9, r5 80009e4: ea2b 0808 bic.w r8, fp, r8 80009e8: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80009ec: bf88 it hi 80009ee: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80009f2: ea48 0505 orr.w r5, r8, r5 80009f6: f8ca 5000 str.w r5, [sl] if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 80009fa: f8d1 a004 ldr.w sl, [r1, #4] 80009fe: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 8000a02: d052 beq.n 8000aaa __HAL_RCC_AFIO_CLK_ENABLE(); 8000a04: 69bd ldr r5, [r7, #24] 8000a06: f026 0803 bic.w r8, r6, #3 8000a0a: f045 0501 orr.w r5, r5, #1 8000a0e: 61bd str r5, [r7, #24] 8000a10: 69bd ldr r5, [r7, #24] 8000a12: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000a16: f005 0501 and.w r5, r5, #1 8000a1a: 9501 str r5, [sp, #4] 8000a1c: f508 3880 add.w r8, r8, #65536 ; 0x10000 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a20: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 8000a24: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a26: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8000a2a: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000a2e: fa09 f90b lsl.w r9, r9, fp 8000a32: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000a36: 4d41 ldr r5, [pc, #260] ; (8000b3c ) 8000a38: 42a8 cmp r0, r5 8000a3a: d071 beq.n 8000b20 8000a3c: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a40: 42a8 cmp r0, r5 8000a42: d06f beq.n 8000b24 8000a44: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a48: 42a8 cmp r0, r5 8000a4a: d06d beq.n 8000b28 8000a4c: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a50: 42a8 cmp r0, r5 8000a52: d06b beq.n 8000b2c 8000a54: f505 6580 add.w r5, r5, #1024 ; 0x400 8000a58: 42a8 cmp r0, r5 8000a5a: d069 beq.n 8000b30 8000a5c: 4570 cmp r0, lr 8000a5e: bf0c ite eq 8000a60: 2505 moveq r5, #5 8000a62: 2506 movne r5, #6 8000a64: fa05 f50b lsl.w r5, r5, fp 8000a68: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 8000a6c: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 8000a70: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8000a72: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8000a76: bf14 ite ne 8000a78: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8000a7a: 43a5 biceq r5, r4 8000a7c: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 8000a7e: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8000a80: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8000a84: bf14 ite ne 8000a86: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8000a88: 43a5 biceq r5, r4 8000a8a: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 8000a8c: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8000a8e: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000a92: bf14 ite ne 8000a94: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8000a96: 43a5 biceq r5, r4 8000a98: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8000a9a: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8000a9c: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 8000aa0: bf14 ite ne 8000aa2: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8000aa4: ea25 0404 biceq.w r4, r5, r4 8000aa8: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8000aaa: 3601 adds r6, #1 8000aac: 2e10 cmp r6, #16 8000aae: f47f af6d bne.w 800098c } } } } } 8000ab2: b003 add sp, #12 8000ab4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8000ab8: 2d03 cmp r5, #3 8000aba: d025 beq.n 8000b08 8000abc: 2d11 cmp r5, #17 8000abe: d180 bne.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8000ac0: 68ca ldr r2, [r1, #12] 8000ac2: 3204 adds r2, #4 break; 8000ac4: e77d b.n 80009c2 switch (GPIO_Init->Mode) 8000ac6: 4565 cmp r5, ip 8000ac8: d009 beq.n 8000ade 8000aca: d812 bhi.n 8000af2 8000acc: f8df 9078 ldr.w r9, [pc, #120] ; 8000b48 8000ad0: 454d cmp r5, r9 8000ad2: d004 beq.n 8000ade 8000ad4: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000ad8: 454d cmp r5, r9 8000ada: f47f af72 bne.w 80009c2 if (GPIO_Init->Pull == GPIO_NOPULL) 8000ade: 688a ldr r2, [r1, #8] 8000ae0: b1e2 cbz r2, 8000b1c else if (GPIO_Init->Pull == GPIO_PULLUP) 8000ae2: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 8000ae4: bf0c ite eq 8000ae6: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 8000aea: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8000aee: 2208 movs r2, #8 8000af0: e767 b.n 80009c2 switch (GPIO_Init->Mode) 8000af2: f8df 9058 ldr.w r9, [pc, #88] ; 8000b4c 8000af6: 454d cmp r5, r9 8000af8: d0f1 beq.n 8000ade 8000afa: f509 3980 add.w r9, r9, #65536 ; 0x10000 8000afe: 454d cmp r5, r9 8000b00: d0ed beq.n 8000ade 8000b02: f5a9 1980 sub.w r9, r9, #1048576 ; 0x100000 8000b06: e7e7 b.n 8000ad8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8000b08: 2200 movs r2, #0 8000b0a: e75a b.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8000b0c: 68ca ldr r2, [r1, #12] break; 8000b0e: e758 b.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8000b10: 68ca ldr r2, [r1, #12] 8000b12: 3208 adds r2, #8 break; 8000b14: e755 b.n 80009c2 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8000b16: 68ca ldr r2, [r1, #12] 8000b18: 320c adds r2, #12 break; 8000b1a: e752 b.n 80009c2 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8000b1c: 2204 movs r2, #4 8000b1e: e750 b.n 80009c2 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000b20: 2500 movs r5, #0 8000b22: e79f b.n 8000a64 8000b24: 2501 movs r5, #1 8000b26: e79d b.n 8000a64 8000b28: 2502 movs r5, #2 8000b2a: e79b b.n 8000a64 8000b2c: 2503 movs r5, #3 8000b2e: e799 b.n 8000a64 8000b30: 2504 movs r5, #4 8000b32: e797 b.n 8000a64 8000b34: 40021000 .word 0x40021000 8000b38: 40010400 .word 0x40010400 8000b3c: 40010800 .word 0x40010800 8000b40: 40011c00 .word 0x40011c00 8000b44: 10210000 .word 0x10210000 8000b48: 10110000 .word 0x10110000 8000b4c: 10310000 .word 0x10310000 08000b50 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8000b50: b10a cbz r2, 8000b56 { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8000b52: 6101 str r1, [r0, #16] 8000b54: 4770 bx lr 8000b56: 0409 lsls r1, r1, #16 8000b58: e7fb b.n 8000b52 08000b5a : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 8000b5a: 68c3 ldr r3, [r0, #12] 8000b5c: 4059 eors r1, r3 8000b5e: 60c1 str r1, [r0, #12] 8000b60: 4770 bx lr ... 08000b64 : * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8000b64: b538 push {r3, r4, r5, lr} uint32_t freqrange = 0U; uint32_t pclk1 = 0U; /* Check the I2C handle allocation */ if(hi2c == NULL) 8000b66: 4604 mov r4, r0 8000b68: b908 cbnz r0, 8000b6e { return HAL_ERROR; 8000b6a: 2001 movs r0, #1 8000b6c: bd38 pop {r3, r4, r5, pc} assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if(hi2c->State == HAL_I2C_STATE_RESET) 8000b6e: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8000b72: f003 02ff and.w r2, r3, #255 ; 0xff 8000b76: b91b cbnz r3, 8000b80 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8000b78: f880 203c strb.w r2, [r0, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8000b7c: f001 faa0 bl 80020c0 } hi2c->State = HAL_I2C_STATE_BUSY; 8000b80: 2324 movs r3, #36 ; 0x24 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8000b82: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 8000b84: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8000b88: 6813 ldr r3, [r2, #0] 8000b8a: f023 0301 bic.w r3, r3, #1 8000b8e: 6013 str r3, [r2, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8000b90: f000 fae2 bl 8001158 /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000b94: 6863 ldr r3, [r4, #4] 8000b96: 4a2f ldr r2, [pc, #188] ; (8000c54 ) 8000b98: 4293 cmp r3, r2 8000b9a: d830 bhi.n 8000bfe 8000b9c: 4a2e ldr r2, [pc, #184] ; (8000c58 ) 8000b9e: 4290 cmp r0, r2 8000ba0: d9e3 bls.n 8000b6a { return HAL_ERROR; } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 8000ba2: 4a2e ldr r2, [pc, #184] ; (8000c5c ) /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->CR2 = freqrange; 8000ba4: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 8000ba6: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8000baa: 604a str r2, [r1, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000bac: 3201 adds r2, #1 8000bae: 620a str r2, [r1, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000bb0: 4a28 ldr r2, [pc, #160] ; (8000c54 ) 8000bb2: 3801 subs r0, #1 8000bb4: 4293 cmp r3, r2 8000bb6: d832 bhi.n 8000c1e 8000bb8: 005b lsls r3, r3, #1 8000bba: fbb0 f0f3 udiv r0, r0, r3 8000bbe: 1c43 adds r3, r0, #1 8000bc0: f3c3 030b ubfx r3, r3, #0, #12 8000bc4: 2b04 cmp r3, #4 8000bc6: bf38 it cc 8000bc8: 2304 movcc r3, #4 8000bca: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000bcc: 6a22 ldr r2, [r4, #32] 8000bce: 69e3 ldr r3, [r4, #28] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000bd0: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000bd2: 4313 orrs r3, r2 8000bd4: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 8000bd6: 68e2 ldr r2, [r4, #12] 8000bd8: 6923 ldr r3, [r4, #16] 8000bda: 4313 orrs r3, r2 8000bdc: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8000bde: 69a2 ldr r2, [r4, #24] 8000be0: 6963 ldr r3, [r4, #20] 8000be2: 4313 orrs r3, r2 8000be4: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 8000be6: 680b ldr r3, [r1, #0] 8000be8: f043 0301 orr.w r3, r3, #1 8000bec: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8000bee: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000bf0: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 8000bf2: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8000bf6: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8000bf8: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8000bfc: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000bfe: 4a18 ldr r2, [pc, #96] ; (8000c60 ) 8000c00: 4290 cmp r0, r2 8000c02: d9b2 bls.n 8000b6a freqrange = I2C_FREQRANGE(pclk1); 8000c04: 4d15 ldr r5, [pc, #84] ; (8000c5c ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c06: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 8000c0a: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 8000c0e: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c10: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 8000c12: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c14: f44f 757a mov.w r5, #1000 ; 0x3e8 8000c18: fbb2 f2f5 udiv r2, r2, r5 8000c1c: e7c6 b.n 8000bac hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000c1e: 68a2 ldr r2, [r4, #8] 8000c20: b952 cbnz r2, 8000c38 8000c22: eb03 0343 add.w r3, r3, r3, lsl #1 8000c26: fbb0 f0f3 udiv r0, r0, r3 8000c2a: 1c43 adds r3, r0, #1 8000c2c: f3c3 030b ubfx r3, r3, #0, #12 8000c30: b16b cbz r3, 8000c4e 8000c32: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8000c36: e7c8 b.n 8000bca 8000c38: 2219 movs r2, #25 8000c3a: 4353 muls r3, r2 8000c3c: fbb0 f0f3 udiv r0, r0, r3 8000c40: 1c43 adds r3, r0, #1 8000c42: f3c3 030b ubfx r3, r3, #0, #12 8000c46: b113 cbz r3, 8000c4e 8000c48: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8000c4c: e7bd b.n 8000bca 8000c4e: 2301 movs r3, #1 8000c50: e7bb b.n 8000bca 8000c52: bf00 nop 8000c54: 000186a0 .word 0x000186a0 8000c58: 001e847f .word 0x001e847f 8000c5c: 000f4240 .word 0x000f4240 8000c60: 003d08ff .word 0x003d08ff 08000c64 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000c64: 6803 ldr r3, [r0, #0] { 8000c66: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000c6a: 07db lsls r3, r3, #31 { 8000c6c: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8000c6e: d410 bmi.n 8000c92 } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8000c70: 682b ldr r3, [r5, #0] 8000c72: 079f lsls r7, r3, #30 8000c74: d45e bmi.n 8000d34 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8000c76: 682b ldr r3, [r5, #0] 8000c78: 0719 lsls r1, r3, #28 8000c7a: f100 8095 bmi.w 8000da8 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8000c7e: 682b ldr r3, [r5, #0] 8000c80: 075a lsls r2, r3, #29 8000c82: f100 80bf bmi.w 8000e04 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8000c86: 69ea ldr r2, [r5, #28] 8000c88: 2a00 cmp r2, #0 8000c8a: f040 812d bne.w 8000ee8 { return HAL_ERROR; } } return HAL_OK; 8000c8e: 2000 movs r0, #0 8000c90: e014 b.n 8000cbc if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8000c92: 4c90 ldr r4, [pc, #576] ; (8000ed4 ) 8000c94: 6863 ldr r3, [r4, #4] 8000c96: f003 030c and.w r3, r3, #12 8000c9a: 2b04 cmp r3, #4 8000c9c: d007 beq.n 8000cae || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8000c9e: 6863 ldr r3, [r4, #4] 8000ca0: f003 030c and.w r3, r3, #12 8000ca4: 2b08 cmp r3, #8 8000ca6: d10c bne.n 8000cc2 8000ca8: 6863 ldr r3, [r4, #4] 8000caa: 03de lsls r6, r3, #15 8000cac: d509 bpl.n 8000cc2 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8000cae: 6823 ldr r3, [r4, #0] 8000cb0: 039c lsls r4, r3, #14 8000cb2: d5dd bpl.n 8000c70 8000cb4: 686b ldr r3, [r5, #4] 8000cb6: 2b00 cmp r3, #0 8000cb8: d1da bne.n 8000c70 return HAL_ERROR; 8000cba: 2001 movs r0, #1 } 8000cbc: b002 add sp, #8 8000cbe: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000cc2: 686b ldr r3, [r5, #4] 8000cc4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000cc8: d110 bne.n 8000cec 8000cca: 6823 ldr r3, [r4, #0] 8000ccc: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8000cd0: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000cd2: f7ff faf5 bl 80002c0 8000cd6: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8000cd8: 6823 ldr r3, [r4, #0] 8000cda: 0398 lsls r0, r3, #14 8000cdc: d4c8 bmi.n 8000c70 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000cde: f7ff faef bl 80002c0 8000ce2: 1b80 subs r0, r0, r6 8000ce4: 2864 cmp r0, #100 ; 0x64 8000ce6: d9f7 bls.n 8000cd8 return HAL_TIMEOUT; 8000ce8: 2003 movs r0, #3 8000cea: e7e7 b.n 8000cbc __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000cec: b99b cbnz r3, 8000d16 8000cee: 6823 ldr r3, [r4, #0] 8000cf0: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000cf4: 6023 str r3, [r4, #0] 8000cf6: 6823 ldr r3, [r4, #0] 8000cf8: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000cfc: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 8000cfe: f7ff fadf bl 80002c0 8000d02: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8000d04: 6823 ldr r3, [r4, #0] 8000d06: 0399 lsls r1, r3, #14 8000d08: d5b2 bpl.n 8000c70 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8000d0a: f7ff fad9 bl 80002c0 8000d0e: 1b80 subs r0, r0, r6 8000d10: 2864 cmp r0, #100 ; 0x64 8000d12: d9f7 bls.n 8000d04 8000d14: e7e8 b.n 8000ce8 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8000d16: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8000d1a: 6823 ldr r3, [r4, #0] 8000d1c: d103 bne.n 8000d26 8000d1e: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8000d22: 6023 str r3, [r4, #0] 8000d24: e7d1 b.n 8000cca 8000d26: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8000d2a: 6023 str r3, [r4, #0] 8000d2c: 6823 ldr r3, [r4, #0] 8000d2e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8000d32: e7cd b.n 8000cd0 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8000d34: 4c67 ldr r4, [pc, #412] ; (8000ed4 ) 8000d36: 6863 ldr r3, [r4, #4] 8000d38: f013 0f0c tst.w r3, #12 8000d3c: d007 beq.n 8000d4e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8000d3e: 6863 ldr r3, [r4, #4] 8000d40: f003 030c and.w r3, r3, #12 8000d44: 2b08 cmp r3, #8 8000d46: d110 bne.n 8000d6a 8000d48: 6863 ldr r3, [r4, #4] 8000d4a: 03da lsls r2, r3, #15 8000d4c: d40d bmi.n 8000d6a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8000d4e: 6823 ldr r3, [r4, #0] 8000d50: 079b lsls r3, r3, #30 8000d52: d502 bpl.n 8000d5a 8000d54: 692b ldr r3, [r5, #16] 8000d56: 2b01 cmp r3, #1 8000d58: d1af bne.n 8000cba __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8000d5a: 6823 ldr r3, [r4, #0] 8000d5c: 696a ldr r2, [r5, #20] 8000d5e: f023 03f8 bic.w r3, r3, #248 ; 0xf8 8000d62: ea43 03c2 orr.w r3, r3, r2, lsl #3 8000d66: 6023 str r3, [r4, #0] 8000d68: e785 b.n 8000c76 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8000d6a: 692a ldr r2, [r5, #16] 8000d6c: 4b5a ldr r3, [pc, #360] ; (8000ed8 ) 8000d6e: b16a cbz r2, 8000d8c __HAL_RCC_HSI_ENABLE(); 8000d70: 2201 movs r2, #1 8000d72: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000d74: f7ff faa4 bl 80002c0 8000d78: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8000d7a: 6823 ldr r3, [r4, #0] 8000d7c: 079f lsls r7, r3, #30 8000d7e: d4ec bmi.n 8000d5a if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000d80: f7ff fa9e bl 80002c0 8000d84: 1b80 subs r0, r0, r6 8000d86: 2802 cmp r0, #2 8000d88: d9f7 bls.n 8000d7a 8000d8a: e7ad b.n 8000ce8 __HAL_RCC_HSI_DISABLE(); 8000d8c: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000d8e: f7ff fa97 bl 80002c0 8000d92: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8000d94: 6823 ldr r3, [r4, #0] 8000d96: 0798 lsls r0, r3, #30 8000d98: f57f af6d bpl.w 8000c76 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8000d9c: f7ff fa90 bl 80002c0 8000da0: 1b80 subs r0, r0, r6 8000da2: 2802 cmp r0, #2 8000da4: d9f6 bls.n 8000d94 8000da6: e79f b.n 8000ce8 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8000da8: 69aa ldr r2, [r5, #24] 8000daa: 4c4a ldr r4, [pc, #296] ; (8000ed4 ) 8000dac: 4b4b ldr r3, [pc, #300] ; (8000edc ) 8000dae: b1da cbz r2, 8000de8 __HAL_RCC_LSI_ENABLE(); 8000db0: 2201 movs r2, #1 8000db2: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000db4: f7ff fa84 bl 80002c0 8000db8: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8000dba: 6a63 ldr r3, [r4, #36] ; 0x24 8000dbc: 079b lsls r3, r3, #30 8000dbe: d50d bpl.n 8000ddc * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8000dc0: f44f 52fa mov.w r2, #8000 ; 0x1f40 8000dc4: 4b46 ldr r3, [pc, #280] ; (8000ee0 ) 8000dc6: 681b ldr r3, [r3, #0] 8000dc8: fbb3 f3f2 udiv r3, r3, r2 8000dcc: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 8000dce: bf00 nop do { __NOP(); } while (Delay --); 8000dd0: 9b01 ldr r3, [sp, #4] 8000dd2: 1e5a subs r2, r3, #1 8000dd4: 9201 str r2, [sp, #4] 8000dd6: 2b00 cmp r3, #0 8000dd8: d1f9 bne.n 8000dce 8000dda: e750 b.n 8000c7e if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000ddc: f7ff fa70 bl 80002c0 8000de0: 1b80 subs r0, r0, r6 8000de2: 2802 cmp r0, #2 8000de4: d9e9 bls.n 8000dba 8000de6: e77f b.n 8000ce8 __HAL_RCC_LSI_DISABLE(); 8000de8: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8000dea: f7ff fa69 bl 80002c0 8000dee: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8000df0: 6a63 ldr r3, [r4, #36] ; 0x24 8000df2: 079f lsls r7, r3, #30 8000df4: f57f af43 bpl.w 8000c7e if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8000df8: f7ff fa62 bl 80002c0 8000dfc: 1b80 subs r0, r0, r6 8000dfe: 2802 cmp r0, #2 8000e00: d9f6 bls.n 8000df0 8000e02: e771 b.n 8000ce8 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8000e04: 4c33 ldr r4, [pc, #204] ; (8000ed4 ) 8000e06: 69e3 ldr r3, [r4, #28] 8000e08: 00d8 lsls r0, r3, #3 8000e0a: d424 bmi.n 8000e56 pwrclkchanged = SET; 8000e0c: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8000e0e: 69e3 ldr r3, [r4, #28] 8000e10: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8000e14: 61e3 str r3, [r4, #28] 8000e16: 69e3 ldr r3, [r4, #28] 8000e18: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8000e1c: 9300 str r3, [sp, #0] 8000e1e: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000e20: 4e30 ldr r6, [pc, #192] ; (8000ee4 ) 8000e22: 6833 ldr r3, [r6, #0] 8000e24: 05d9 lsls r1, r3, #23 8000e26: d518 bpl.n 8000e5a __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000e28: 68eb ldr r3, [r5, #12] 8000e2a: 2b01 cmp r3, #1 8000e2c: d126 bne.n 8000e7c 8000e2e: 6a23 ldr r3, [r4, #32] 8000e30: f043 0301 orr.w r3, r3, #1 8000e34: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000e36: f7ff fa43 bl 80002c0 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000e3a: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8000e3e: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8000e40: 6a23 ldr r3, [r4, #32] 8000e42: 079b lsls r3, r3, #30 8000e44: d53f bpl.n 8000ec6 if(pwrclkchanged == SET) 8000e46: 2f00 cmp r7, #0 8000e48: f43f af1d beq.w 8000c86 __HAL_RCC_PWR_CLK_DISABLE(); 8000e4c: 69e3 ldr r3, [r4, #28] 8000e4e: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8000e52: 61e3 str r3, [r4, #28] 8000e54: e717 b.n 8000c86 FlagStatus pwrclkchanged = RESET; 8000e56: 2700 movs r7, #0 8000e58: e7e2 b.n 8000e20 SET_BIT(PWR->CR, PWR_CR_DBP); 8000e5a: 6833 ldr r3, [r6, #0] 8000e5c: f443 7380 orr.w r3, r3, #256 ; 0x100 8000e60: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000e62: f7ff fa2d bl 80002c0 8000e66: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8000e68: 6833 ldr r3, [r6, #0] 8000e6a: 05da lsls r2, r3, #23 8000e6c: d4dc bmi.n 8000e28 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8000e6e: f7ff fa27 bl 80002c0 8000e72: eba0 0008 sub.w r0, r0, r8 8000e76: 2864 cmp r0, #100 ; 0x64 8000e78: d9f6 bls.n 8000e68 8000e7a: e735 b.n 8000ce8 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000e7c: b9ab cbnz r3, 8000eaa 8000e7e: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000e80: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000e84: f023 0301 bic.w r3, r3, #1 8000e88: 6223 str r3, [r4, #32] 8000e8a: 6a23 ldr r3, [r4, #32] 8000e8c: f023 0304 bic.w r3, r3, #4 8000e90: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8000e92: f7ff fa15 bl 80002c0 8000e96: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8000e98: 6a23 ldr r3, [r4, #32] 8000e9a: 0798 lsls r0, r3, #30 8000e9c: d5d3 bpl.n 8000e46 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000e9e: f7ff fa0f bl 80002c0 8000ea2: 1b80 subs r0, r0, r6 8000ea4: 4540 cmp r0, r8 8000ea6: d9f7 bls.n 8000e98 8000ea8: e71e b.n 8000ce8 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8000eaa: 2b05 cmp r3, #5 8000eac: 6a23 ldr r3, [r4, #32] 8000eae: d103 bne.n 8000eb8 8000eb0: f043 0304 orr.w r3, r3, #4 8000eb4: 6223 str r3, [r4, #32] 8000eb6: e7ba b.n 8000e2e 8000eb8: f023 0301 bic.w r3, r3, #1 8000ebc: 6223 str r3, [r4, #32] 8000ebe: 6a23 ldr r3, [r4, #32] 8000ec0: f023 0304 bic.w r3, r3, #4 8000ec4: e7b6 b.n 8000e34 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8000ec6: f7ff f9fb bl 80002c0 8000eca: eba0 0008 sub.w r0, r0, r8 8000ece: 42b0 cmp r0, r6 8000ed0: d9b6 bls.n 8000e40 8000ed2: e709 b.n 8000ce8 8000ed4: 40021000 .word 0x40021000 8000ed8: 42420000 .word 0x42420000 8000edc: 42420480 .word 0x42420480 8000ee0: 20000218 .word 0x20000218 8000ee4: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8000ee8: 4c22 ldr r4, [pc, #136] ; (8000f74 ) 8000eea: 6863 ldr r3, [r4, #4] 8000eec: f003 030c and.w r3, r3, #12 8000ef0: 2b08 cmp r3, #8 8000ef2: f43f aee2 beq.w 8000cba 8000ef6: 2300 movs r3, #0 8000ef8: 4e1f ldr r6, [pc, #124] ; (8000f78 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000efa: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8000efc: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8000efe: d12b bne.n 8000f58 tickstart = HAL_GetTick(); 8000f00: f7ff f9de bl 80002c0 8000f04: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000f06: 6823 ldr r3, [r4, #0] 8000f08: 0199 lsls r1, r3, #6 8000f0a: d41f bmi.n 8000f4c if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8000f0c: 6a2b ldr r3, [r5, #32] 8000f0e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8000f12: d105 bne.n 8000f20 __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8000f14: 6862 ldr r2, [r4, #4] 8000f16: 68a9 ldr r1, [r5, #8] 8000f18: f422 3200 bic.w r2, r2, #131072 ; 0x20000 8000f1c: 430a orrs r2, r1 8000f1e: 6062 str r2, [r4, #4] __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8000f20: 6a69 ldr r1, [r5, #36] ; 0x24 8000f22: 6862 ldr r2, [r4, #4] 8000f24: 430b orrs r3, r1 8000f26: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8000f2a: 4313 orrs r3, r2 8000f2c: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8000f2e: 2301 movs r3, #1 8000f30: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8000f32: f7ff f9c5 bl 80002c0 8000f36: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8000f38: 6823 ldr r3, [r4, #0] 8000f3a: 019a lsls r2, r3, #6 8000f3c: f53f aea7 bmi.w 8000c8e if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000f40: f7ff f9be bl 80002c0 8000f44: 1b40 subs r0, r0, r5 8000f46: 2802 cmp r0, #2 8000f48: d9f6 bls.n 8000f38 8000f4a: e6cd b.n 8000ce8 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000f4c: f7ff f9b8 bl 80002c0 8000f50: 1bc0 subs r0, r0, r7 8000f52: 2802 cmp r0, #2 8000f54: d9d7 bls.n 8000f06 8000f56: e6c7 b.n 8000ce8 tickstart = HAL_GetTick(); 8000f58: f7ff f9b2 bl 80002c0 8000f5c: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8000f5e: 6823 ldr r3, [r4, #0] 8000f60: 019b lsls r3, r3, #6 8000f62: f57f ae94 bpl.w 8000c8e if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8000f66: f7ff f9ab bl 80002c0 8000f6a: 1b40 subs r0, r0, r5 8000f6c: 2802 cmp r0, #2 8000f6e: d9f6 bls.n 8000f5e 8000f70: e6ba b.n 8000ce8 8000f72: bf00 nop 8000f74: 40021000 .word 0x40021000 8000f78: 42420060 .word 0x42420060 08000f7c : { 8000f7c: b530 push {r4, r5, lr} const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000f7e: 4b19 ldr r3, [pc, #100] ; (8000fe4 ) { 8000f80: b087 sub sp, #28 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8000f82: ac02 add r4, sp, #8 8000f84: f103 0510 add.w r5, r3, #16 8000f88: 4622 mov r2, r4 8000f8a: 6818 ldr r0, [r3, #0] 8000f8c: 6859 ldr r1, [r3, #4] 8000f8e: 3308 adds r3, #8 8000f90: c203 stmia r2!, {r0, r1} 8000f92: 42ab cmp r3, r5 8000f94: 4614 mov r4, r2 8000f96: d1f7 bne.n 8000f88 const uint8_t aPredivFactorTable[2] = {1, 2}; 8000f98: 2301 movs r3, #1 8000f9a: f88d 3004 strb.w r3, [sp, #4] 8000f9e: 2302 movs r3, #2 tmpreg = RCC->CFGR; 8000fa0: 4911 ldr r1, [pc, #68] ; (8000fe8 ) const uint8_t aPredivFactorTable[2] = {1, 2}; 8000fa2: f88d 3005 strb.w r3, [sp, #5] tmpreg = RCC->CFGR; 8000fa6: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8000fa8: f003 020c and.w r2, r3, #12 8000fac: 2a08 cmp r2, #8 8000fae: d117 bne.n 8000fe0 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000fb0: f3c3 4283 ubfx r2, r3, #18, #4 8000fb4: a806 add r0, sp, #24 8000fb6: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000fb8: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8000fba: f812 2c10 ldrb.w r2, [r2, #-16] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8000fbe: d50c bpl.n 8000fda prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000fc0: 684b ldr r3, [r1, #4] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000fc2: 480a ldr r0, [pc, #40] ; (8000fec ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000fc4: f3c3 4340 ubfx r3, r3, #17, #1 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000fc8: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8000fca: aa06 add r2, sp, #24 8000fcc: 4413 add r3, r2 8000fce: f813 3c14 ldrb.w r3, [r3, #-20] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8000fd2: fbb0 f0f3 udiv r0, r0, r3 } 8000fd6: b007 add sp, #28 8000fd8: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8000fda: 4805 ldr r0, [pc, #20] ; (8000ff0 ) 8000fdc: 4350 muls r0, r2 8000fde: e7fa b.n 8000fd6 sysclockfreq = HSE_VALUE; 8000fe0: 4802 ldr r0, [pc, #8] ; (8000fec ) return sysclockfreq; 8000fe2: e7f8 b.n 8000fd6 8000fe4: 08003570 .word 0x08003570 8000fe8: 40021000 .word 0x40021000 8000fec: 007a1200 .word 0x007a1200 8000ff0: 003d0900 .word 0x003d0900 08000ff4 : if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000ff4: 4a54 ldr r2, [pc, #336] ; (8001148 ) { 8000ff6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000ffa: 6813 ldr r3, [r2, #0] { 8000ffc: 4605 mov r5, r0 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8000ffe: f003 0307 and.w r3, r3, #7 8001002: 428b cmp r3, r1 { 8001004: 460e mov r6, r1 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY)) 8001006: d32a bcc.n 800105e if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8001008: 6829 ldr r1, [r5, #0] 800100a: 078c lsls r4, r1, #30 800100c: d434 bmi.n 8001078 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 800100e: 07ca lsls r2, r1, #31 8001010: d447 bmi.n 80010a2 if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY)) 8001012: 4a4d ldr r2, [pc, #308] ; (8001148 ) 8001014: 6813 ldr r3, [r2, #0] 8001016: f003 0307 and.w r3, r3, #7 800101a: 429e cmp r6, r3 800101c: f0c0 8082 bcc.w 8001124 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8001020: 682a ldr r2, [r5, #0] 8001022: 4c4a ldr r4, [pc, #296] ; (800114c ) 8001024: f012 0f04 tst.w r2, #4 8001028: f040 8087 bne.w 800113a if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800102c: 0713 lsls r3, r2, #28 800102e: d506 bpl.n 800103e MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8001030: 6863 ldr r3, [r4, #4] 8001032: 692a ldr r2, [r5, #16] 8001034: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8001038: ea43 03c2 orr.w r3, r3, r2, lsl #3 800103c: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 800103e: f7ff ff9d bl 8000f7c 8001042: 6863 ldr r3, [r4, #4] 8001044: 4a42 ldr r2, [pc, #264] ; (8001150 ) 8001046: f3c3 1303 ubfx r3, r3, #4, #4 800104a: 5cd3 ldrb r3, [r2, r3] 800104c: 40d8 lsrs r0, r3 800104e: 4b41 ldr r3, [pc, #260] ; (8001154 ) 8001050: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8001052: 2000 movs r0, #0 8001054: f7ff f8f2 bl 800023c return HAL_OK; 8001058: 2000 movs r0, #0 } 800105a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_FLASH_SET_LATENCY(FLatency); 800105e: 6813 ldr r3, [r2, #0] 8001060: f023 0307 bic.w r3, r3, #7 8001064: 430b orrs r3, r1 8001066: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 8001068: 6813 ldr r3, [r2, #0] 800106a: f003 0307 and.w r3, r3, #7 800106e: 4299 cmp r1, r3 8001070: d0ca beq.n 8001008 return HAL_ERROR; 8001072: 2001 movs r0, #1 8001074: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8001078: 4b34 ldr r3, [pc, #208] ; (800114c ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800107a: f011 0f04 tst.w r1, #4 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 800107e: bf1e ittt ne 8001080: 685a ldrne r2, [r3, #4] 8001082: f442 62e0 orrne.w r2, r2, #1792 ; 0x700 8001086: 605a strne r2, [r3, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8001088: 0708 lsls r0, r1, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 800108a: bf42 ittt mi 800108c: 685a ldrmi r2, [r3, #4] 800108e: f442 5260 orrmi.w r2, r2, #14336 ; 0x3800 8001092: 605a strmi r2, [r3, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8001094: 685a ldr r2, [r3, #4] 8001096: 68a8 ldr r0, [r5, #8] 8001098: f022 02f0 bic.w r2, r2, #240 ; 0xf0 800109c: 4302 orrs r2, r0 800109e: 605a str r2, [r3, #4] 80010a0: e7b5 b.n 800100e if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010a2: 686a ldr r2, [r5, #4] 80010a4: 4c29 ldr r4, [pc, #164] ; (800114c ) 80010a6: 2a01 cmp r2, #1 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80010a8: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010aa: d11c bne.n 80010e6 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80010ac: f413 3f00 tst.w r3, #131072 ; 0x20000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80010b0: d0df beq.n 8001072 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80010b2: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80010b4: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80010b8: f023 0303 bic.w r3, r3, #3 80010bc: 4313 orrs r3, r2 80010be: 6063 str r3, [r4, #4] tickstart = HAL_GetTick(); 80010c0: f7ff f8fe bl 80002c0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010c4: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 80010c6: 4607 mov r7, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80010c8: 2b01 cmp r3, #1 80010ca: d114 bne.n 80010f6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 80010cc: 6863 ldr r3, [r4, #4] 80010ce: f003 030c and.w r3, r3, #12 80010d2: 2b04 cmp r3, #4 80010d4: d09d beq.n 8001012 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 80010d6: f7ff f8f3 bl 80002c0 80010da: 1bc0 subs r0, r0, r7 80010dc: 4540 cmp r0, r8 80010de: d9f5 bls.n 80010cc return HAL_TIMEOUT; 80010e0: 2003 movs r0, #3 80010e2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80010e6: 2a02 cmp r2, #2 80010e8: d102 bne.n 80010f0 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80010ea: f013 7f00 tst.w r3, #33554432 ; 0x2000000 80010ee: e7df b.n 80010b0 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80010f0: f013 0f02 tst.w r3, #2 80010f4: e7dc b.n 80010b0 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80010f6: 2b02 cmp r3, #2 80010f8: d10f bne.n 800111a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 80010fa: 6863 ldr r3, [r4, #4] 80010fc: f003 030c and.w r3, r3, #12 8001100: 2b08 cmp r3, #8 8001102: d086 beq.n 8001012 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001104: f7ff f8dc bl 80002c0 8001108: 1bc0 subs r0, r0, r7 800110a: 4540 cmp r0, r8 800110c: d9f5 bls.n 80010fa 800110e: e7e7 b.n 80010e0 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001110: f7ff f8d6 bl 80002c0 8001114: 1bc0 subs r0, r0, r7 8001116: 4540 cmp r0, r8 8001118: d8e2 bhi.n 80010e0 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 800111a: 6863 ldr r3, [r4, #4] 800111c: f013 0f0c tst.w r3, #12 8001120: d1f6 bne.n 8001110 8001122: e776 b.n 8001012 __HAL_FLASH_SET_LATENCY(FLatency); 8001124: 6813 ldr r3, [r2, #0] 8001126: f023 0307 bic.w r3, r3, #7 800112a: 4333 orrs r3, r6 800112c: 6013 str r3, [r2, #0] if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency) 800112e: 6813 ldr r3, [r2, #0] 8001130: f003 0307 and.w r3, r3, #7 8001134: 429e cmp r6, r3 8001136: d19c bne.n 8001072 8001138: e772 b.n 8001020 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800113a: 6863 ldr r3, [r4, #4] 800113c: 68e9 ldr r1, [r5, #12] 800113e: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8001142: 430b orrs r3, r1 8001144: 6063 str r3, [r4, #4] 8001146: e771 b.n 800102c 8001148: 40022000 .word 0x40022000 800114c: 40021000 .word 0x40021000 8001150: 080035c3 .word 0x080035c3 8001154: 20000218 .word 0x20000218 08001158 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8001158: 4b04 ldr r3, [pc, #16] ; (800116c ) 800115a: 4a05 ldr r2, [pc, #20] ; (8001170 ) 800115c: 685b ldr r3, [r3, #4] 800115e: f3c3 2302 ubfx r3, r3, #8, #3 8001162: 5cd3 ldrb r3, [r2, r3] 8001164: 4a03 ldr r2, [pc, #12] ; (8001174 ) 8001166: 6810 ldr r0, [r2, #0] } 8001168: 40d8 lsrs r0, r3 800116a: 4770 bx lr 800116c: 40021000 .word 0x40021000 8001170: 080035d3 .word 0x080035d3 8001174: 20000218 .word 0x20000218 08001178 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8001178: 4b04 ldr r3, [pc, #16] ; (800118c ) 800117a: 4a05 ldr r2, [pc, #20] ; (8001190 ) 800117c: 685b ldr r3, [r3, #4] 800117e: f3c3 23c2 ubfx r3, r3, #11, #3 8001182: 5cd3 ldrb r3, [r2, r3] 8001184: 4a03 ldr r2, [pc, #12] ; (8001194 ) 8001186: 6810 ldr r0, [r2, #0] } 8001188: 40d8 lsrs r0, r3 800118a: 4770 bx lr 800118c: 40021000 .word 0x40021000 8001190: 080035d3 .word 0x080035d3 8001194: 20000218 .word 0x20000218 08001198 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8001198: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 800119a: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 800119c: 68da ldr r2, [r3, #12] 800119e: f042 0201 orr.w r2, r2, #1 80011a2: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 80011a4: 681a ldr r2, [r3, #0] 80011a6: f042 0201 orr.w r2, r2, #1 80011aa: 601a str r2, [r3, #0] } 80011ac: 4770 bx lr 080011ae : 80011ae: 4770 bx lr 080011b0 : 80011b0: 4770 bx lr 080011b2 : 80011b2: 4770 bx lr 080011b4 : 80011b4: 4770 bx lr 080011b6 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80011b6: 6803 ldr r3, [r0, #0] { 80011b8: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80011ba: 691a ldr r2, [r3, #16] { 80011bc: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80011be: 0791 lsls r1, r2, #30 80011c0: d50e bpl.n 80011e0 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 80011c2: 68da ldr r2, [r3, #12] 80011c4: 0792 lsls r2, r2, #30 80011c6: d50b bpl.n 80011e0 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80011c8: f06f 0202 mvn.w r2, #2 80011cc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80011ce: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80011d0: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80011d2: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80011d4: 079b lsls r3, r3, #30 80011d6: d077 beq.n 80012c8 { HAL_TIM_IC_CaptureCallback(htim); 80011d8: f7ff ffea bl 80011b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80011dc: 2300 movs r3, #0 80011de: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80011e0: 6823 ldr r3, [r4, #0] 80011e2: 691a ldr r2, [r3, #16] 80011e4: 0750 lsls r0, r2, #29 80011e6: d510 bpl.n 800120a { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 80011e8: 68da ldr r2, [r3, #12] 80011ea: 0751 lsls r1, r2, #29 80011ec: d50d bpl.n 800120a { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 80011ee: f06f 0204 mvn.w r2, #4 80011f2: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80011f4: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80011f6: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80011f8: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80011fa: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 80011fe: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001200: d068 beq.n 80012d4 HAL_TIM_IC_CaptureCallback(htim); 8001202: f7ff ffd5 bl 80011b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001206: 2300 movs r3, #0 8001208: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 800120a: 6823 ldr r3, [r4, #0] 800120c: 691a ldr r2, [r3, #16] 800120e: 0712 lsls r2, r2, #28 8001210: d50f bpl.n 8001232 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8001212: 68da ldr r2, [r3, #12] 8001214: 0710 lsls r0, r2, #28 8001216: d50c bpl.n 8001232 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8001218: f06f 0208 mvn.w r2, #8 800121c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 800121e: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001220: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8001222: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001224: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8001226: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001228: d05a beq.n 80012e0 HAL_TIM_IC_CaptureCallback(htim); 800122a: f7ff ffc1 bl 80011b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800122e: 2300 movs r3, #0 8001230: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8001232: 6823 ldr r3, [r4, #0] 8001234: 691a ldr r2, [r3, #16] 8001236: 06d2 lsls r2, r2, #27 8001238: d510 bpl.n 800125c { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 800123a: 68da ldr r2, [r3, #12] 800123c: 06d0 lsls r0, r2, #27 800123e: d50d bpl.n 800125c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8001240: f06f 0210 mvn.w r2, #16 8001244: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001246: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001248: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 800124a: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800124c: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8001250: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001252: d04b beq.n 80012ec HAL_TIM_IC_CaptureCallback(htim); 8001254: f7ff ffac bl 80011b0 else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001258: 2300 movs r3, #0 800125a: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 800125c: 6823 ldr r3, [r4, #0] 800125e: 691a ldr r2, [r3, #16] 8001260: 07d1 lsls r1, r2, #31 8001262: d508 bpl.n 8001276 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8001264: 68da ldr r2, [r3, #12] 8001266: 07d2 lsls r2, r2, #31 8001268: d505 bpl.n 8001276 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 800126a: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 800126e: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001270: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8001272: f000 fddb bl 8001e2c } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8001276: 6823 ldr r3, [r4, #0] 8001278: 691a ldr r2, [r3, #16] 800127a: 0610 lsls r0, r2, #24 800127c: d508 bpl.n 8001290 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 800127e: 68da ldr r2, [r3, #12] 8001280: 0611 lsls r1, r2, #24 8001282: d505 bpl.n 8001290 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001284: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8001288: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 800128a: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 800128c: f000 f8bf bl 800140e } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8001290: 6823 ldr r3, [r4, #0] 8001292: 691a ldr r2, [r3, #16] 8001294: 0652 lsls r2, r2, #25 8001296: d508 bpl.n 80012aa { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8001298: 68da ldr r2, [r3, #12] 800129a: 0650 lsls r0, r2, #25 800129c: d505 bpl.n 80012aa { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 800129e: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 80012a2: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80012a4: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 80012a6: f7ff ff85 bl 80011b4 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80012aa: 6823 ldr r3, [r4, #0] 80012ac: 691a ldr r2, [r3, #16] 80012ae: 0691 lsls r1, r2, #26 80012b0: d522 bpl.n 80012f8 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 80012b2: 68da ldr r2, [r3, #12] 80012b4: 0692 lsls r2, r2, #26 80012b6: d51f bpl.n 80012f8 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80012b8: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 80012bc: 4620 mov r0, r4 } } } 80012be: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80012c2: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 80012c4: f000 b8a2 b.w 800140c HAL_TIM_OC_DelayElapsedCallback(htim); 80012c8: f7ff ff71 bl 80011ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80012cc: 4620 mov r0, r4 80012ce: f7ff ff70 bl 80011b2 80012d2: e783 b.n 80011dc HAL_TIM_OC_DelayElapsedCallback(htim); 80012d4: f7ff ff6b bl 80011ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80012d8: 4620 mov r0, r4 80012da: f7ff ff6a bl 80011b2 80012de: e792 b.n 8001206 HAL_TIM_OC_DelayElapsedCallback(htim); 80012e0: f7ff ff65 bl 80011ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80012e4: 4620 mov r0, r4 80012e6: f7ff ff64 bl 80011b2 80012ea: e7a0 b.n 800122e HAL_TIM_OC_DelayElapsedCallback(htim); 80012ec: f7ff ff5f bl 80011ae HAL_TIM_PWM_PulseFinishedCallback(htim); 80012f0: 4620 mov r0, r4 80012f2: f7ff ff5e bl 80011b2 80012f6: e7af b.n 8001258 80012f8: bd10 pop {r4, pc} ... 080012fc : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80012fc: 4a24 ldr r2, [pc, #144] ; (8001390 ) tmpcr1 = TIMx->CR1; 80012fe: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001300: 4290 cmp r0, r2 8001302: d012 beq.n 800132a 8001304: f502 6200 add.w r2, r2, #2048 ; 0x800 8001308: 4290 cmp r0, r2 800130a: d00e beq.n 800132a 800130c: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001310: d00b beq.n 800132a 8001312: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 8001316: 4290 cmp r0, r2 8001318: d007 beq.n 800132a 800131a: f502 6280 add.w r2, r2, #1024 ; 0x400 800131e: 4290 cmp r0, r2 8001320: d003 beq.n 800132a 8001322: f502 6280 add.w r2, r2, #1024 ; 0x400 8001326: 4290 cmp r0, r2 8001328: d11d bne.n 8001366 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 800132a: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 800132c: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8001330: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8001332: 4a17 ldr r2, [pc, #92] ; (8001390 ) 8001334: 4290 cmp r0, r2 8001336: d012 beq.n 800135e 8001338: f502 6200 add.w r2, r2, #2048 ; 0x800 800133c: 4290 cmp r0, r2 800133e: d00e beq.n 800135e 8001340: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001344: d00b beq.n 800135e 8001346: f5a2 3298 sub.w r2, r2, #77824 ; 0x13000 800134a: 4290 cmp r0, r2 800134c: d007 beq.n 800135e 800134e: f502 6280 add.w r2, r2, #1024 ; 0x400 8001352: 4290 cmp r0, r2 8001354: d003 beq.n 800135e 8001356: f502 6280 add.w r2, r2, #1024 ; 0x400 800135a: 4290 cmp r0, r2 800135c: d103 bne.n 8001366 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 800135e: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8001360: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8001364: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8001366: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 8001368: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 800136c: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 800136e: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8001370: 688b ldr r3, [r1, #8] 8001372: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8001374: 680b ldr r3, [r1, #0] 8001376: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8001378: 4b05 ldr r3, [pc, #20] ; (8001390 ) 800137a: 4298 cmp r0, r3 800137c: d003 beq.n 8001386 800137e: f503 6300 add.w r3, r3, #2048 ; 0x800 8001382: 4298 cmp r0, r3 8001384: d101 bne.n 800138a { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8001386: 690b ldr r3, [r1, #16] 8001388: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 800138a: 2301 movs r3, #1 800138c: 6143 str r3, [r0, #20] 800138e: 4770 bx lr 8001390: 40012c00 .word 0x40012c00 08001394 : { 8001394: b510 push {r4, lr} if(htim == NULL) 8001396: 4604 mov r4, r0 8001398: b1a0 cbz r0, 80013c4 if(htim->State == HAL_TIM_STATE_RESET) 800139a: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 800139e: f003 02ff and.w r2, r3, #255 ; 0xff 80013a2: b91b cbnz r3, 80013ac htim->Lock = HAL_UNLOCKED; 80013a4: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 80013a8: f000 febc bl 8002124 htim->State= HAL_TIM_STATE_BUSY; 80013ac: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 80013ae: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 80013b0: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 80013b4: 1d21 adds r1, r4, #4 80013b6: f7ff ffa1 bl 80012fc htim->State= HAL_TIM_STATE_READY; 80013ba: 2301 movs r3, #1 return HAL_OK; 80013bc: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 80013be: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 80013c2: bd10 pop {r4, pc} return HAL_ERROR; 80013c4: 2001 movs r0, #1 } 80013c6: bd10 pop {r4, pc} 080013c8 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 80013c8: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 80013cc: b510 push {r4, lr} __HAL_LOCK(htim); 80013ce: 2b01 cmp r3, #1 80013d0: f04f 0302 mov.w r3, #2 80013d4: d018 beq.n 8001408 htim->State = HAL_TIM_STATE_BUSY; 80013d6: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80013da: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80013dc: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80013de: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80013e0: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80013e2: f022 0270 bic.w r2, r2, #112 ; 0x70 80013e6: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80013e8: 685a ldr r2, [r3, #4] 80013ea: 4322 orrs r2, r4 80013ec: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 80013ee: 689a ldr r2, [r3, #8] 80013f0: f022 0280 bic.w r2, r2, #128 ; 0x80 80013f4: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80013f6: 689a ldr r2, [r3, #8] 80013f8: 430a orrs r2, r1 80013fa: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 80013fc: 2301 movs r3, #1 80013fe: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 8001402: 2300 movs r3, #0 8001404: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 8001408: 4618 mov r0, r3 return HAL_OK; } 800140a: bd10 pop {r4, pc} 0800140c : 800140c: 4770 bx lr 0800140e : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 800140e: 4770 bx lr 08001410 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8001410: 6803 ldr r3, [r0, #0] 8001412: 68da ldr r2, [r3, #12] 8001414: f422 7290 bic.w r2, r2, #288 ; 0x120 8001418: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800141a: 695a ldr r2, [r3, #20] 800141c: f022 0201 bic.w r2, r2, #1 8001420: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8001422: 2320 movs r3, #32 8001424: f880 303a strb.w r3, [r0, #58] ; 0x3a 8001428: 4770 bx lr ... 0800142c : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 800142c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001430: 6805 ldr r5, [r0, #0] 8001432: 68c2 ldr r2, [r0, #12] 8001434: 692b ldr r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001436: 6901 ldr r1, [r0, #16] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8001438: f423 5340 bic.w r3, r3, #12288 ; 0x3000 800143c: 4313 orrs r3, r2 800143e: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001440: 6883 ldr r3, [r0, #8] MODIFY_REG(huart->Instance->CR1, 8001442: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001444: 430b orrs r3, r1 8001446: 6941 ldr r1, [r0, #20] MODIFY_REG(huart->Instance->CR1, 8001448: f422 52b0 bic.w r2, r2, #5632 ; 0x1600 800144c: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8001450: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 8001452: 4313 orrs r3, r2 8001454: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8001456: 696b ldr r3, [r5, #20] 8001458: 6982 ldr r2, [r0, #24] 800145a: f423 7340 bic.w r3, r3, #768 ; 0x300 800145e: 4313 orrs r3, r2 8001460: 616b str r3, [r5, #20] huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); } } #else /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 8001462: 4b40 ldr r3, [pc, #256] ; (8001564 ) { 8001464: 4681 mov r9, r0 if(huart->Instance == USART1) 8001466: 429d cmp r5, r3 8001468: f04f 0419 mov.w r4, #25 800146c: d146 bne.n 80014fc { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 800146e: f7ff fe83 bl 8001178 8001472: fb04 f300 mul.w r3, r4, r0 8001476: f8d9 6004 ldr.w r6, [r9, #4] 800147a: f04f 0864 mov.w r8, #100 ; 0x64 800147e: 00b6 lsls r6, r6, #2 8001480: fbb3 f3f6 udiv r3, r3, r6 8001484: fbb3 f3f8 udiv r3, r3, r8 8001488: 011e lsls r6, r3, #4 800148a: f7ff fe75 bl 8001178 800148e: 4360 muls r0, r4 8001490: f8d9 3004 ldr.w r3, [r9, #4] 8001494: 009b lsls r3, r3, #2 8001496: fbb0 f7f3 udiv r7, r0, r3 800149a: f7ff fe6d bl 8001178 800149e: 4360 muls r0, r4 80014a0: f8d9 3004 ldr.w r3, [r9, #4] 80014a4: 009b lsls r3, r3, #2 80014a6: fbb0 f3f3 udiv r3, r0, r3 80014aa: fbb3 f3f8 udiv r3, r3, r8 80014ae: fb08 7313 mls r3, r8, r3, r7 80014b2: 011b lsls r3, r3, #4 80014b4: 3332 adds r3, #50 ; 0x32 80014b6: fbb3 f3f8 udiv r3, r3, r8 80014ba: f003 07f0 and.w r7, r3, #240 ; 0xf0 80014be: f7ff fe5b bl 8001178 80014c2: 4360 muls r0, r4 80014c4: f8d9 2004 ldr.w r2, [r9, #4] 80014c8: 0092 lsls r2, r2, #2 80014ca: fbb0 faf2 udiv sl, r0, r2 80014ce: f7ff fe53 bl 8001178 } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80014d2: 4360 muls r0, r4 80014d4: f8d9 3004 ldr.w r3, [r9, #4] 80014d8: 009b lsls r3, r3, #2 80014da: fbb0 f3f3 udiv r3, r0, r3 80014de: fbb3 f3f8 udiv r3, r3, r8 80014e2: fb08 a313 mls r3, r8, r3, sl 80014e6: 011b lsls r3, r3, #4 80014e8: 3332 adds r3, #50 ; 0x32 80014ea: fbb3 f3f8 udiv r3, r3, r8 80014ee: f003 030f and.w r3, r3, #15 80014f2: 433b orrs r3, r7 80014f4: 4433 add r3, r6 80014f6: 60ab str r3, [r5, #8] 80014f8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80014fc: f7ff fe2c bl 8001158 8001500: fb04 f300 mul.w r3, r4, r0 8001504: f8d9 6004 ldr.w r6, [r9, #4] 8001508: f04f 0864 mov.w r8, #100 ; 0x64 800150c: 00b6 lsls r6, r6, #2 800150e: fbb3 f3f6 udiv r3, r3, r6 8001512: fbb3 f3f8 udiv r3, r3, r8 8001516: 011e lsls r6, r3, #4 8001518: f7ff fe1e bl 8001158 800151c: 4360 muls r0, r4 800151e: f8d9 3004 ldr.w r3, [r9, #4] 8001522: 009b lsls r3, r3, #2 8001524: fbb0 f7f3 udiv r7, r0, r3 8001528: f7ff fe16 bl 8001158 800152c: 4360 muls r0, r4 800152e: f8d9 3004 ldr.w r3, [r9, #4] 8001532: 009b lsls r3, r3, #2 8001534: fbb0 f3f3 udiv r3, r0, r3 8001538: fbb3 f3f8 udiv r3, r3, r8 800153c: fb08 7313 mls r3, r8, r3, r7 8001540: 011b lsls r3, r3, #4 8001542: 3332 adds r3, #50 ; 0x32 8001544: fbb3 f3f8 udiv r3, r3, r8 8001548: f003 07f0 and.w r7, r3, #240 ; 0xf0 800154c: f7ff fe04 bl 8001158 8001550: 4360 muls r0, r4 8001552: f8d9 2004 ldr.w r2, [r9, #4] 8001556: 0092 lsls r2, r2, #2 8001558: fbb0 faf2 udiv sl, r0, r2 800155c: f7ff fdfc bl 8001158 8001560: e7b7 b.n 80014d2 8001562: bf00 nop 8001564: 40013800 .word 0x40013800 08001568 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8001568: b5f8 push {r3, r4, r5, r6, r7, lr} 800156a: 4604 mov r4, r0 800156c: 460e mov r6, r1 800156e: 4617 mov r7, r2 8001570: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8001572: 6821 ldr r1, [r4, #0] 8001574: 680b ldr r3, [r1, #0] 8001576: ea36 0303 bics.w r3, r6, r3 800157a: d101 bne.n 8001580 return HAL_OK; 800157c: 2000 movs r0, #0 } 800157e: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8001580: 1c6b adds r3, r5, #1 8001582: d0f7 beq.n 8001574 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8001584: b995 cbnz r5, 80015ac CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8001586: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8001588: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 800158a: 68da ldr r2, [r3, #12] 800158c: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8001590: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001592: 695a ldr r2, [r3, #20] 8001594: f022 0201 bic.w r2, r2, #1 8001598: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 800159a: 2320 movs r3, #32 800159c: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 80015a0: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 80015a4: 2300 movs r3, #0 80015a6: f884 3038 strb.w r3, [r4, #56] ; 0x38 80015aa: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80015ac: f7fe fe88 bl 80002c0 80015b0: 1bc0 subs r0, r0, r7 80015b2: 4285 cmp r5, r0 80015b4: d2dd bcs.n 8001572 80015b6: e7e6 b.n 8001586 080015b8 : { 80015b8: b510 push {r4, lr} if(huart == NULL) 80015ba: 4604 mov r4, r0 80015bc: b340 cbz r0, 8001610 if(huart->gState == HAL_UART_STATE_RESET) 80015be: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 80015c2: f003 02ff and.w r2, r3, #255 ; 0xff 80015c6: b91b cbnz r3, 80015d0 huart->Lock = HAL_UNLOCKED; 80015c8: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 80015cc: f000 fdbe bl 800214c huart->gState = HAL_UART_STATE_BUSY; 80015d0: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 80015d2: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 80015d4: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 80015d8: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 80015da: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 80015dc: f423 5300 bic.w r3, r3, #8192 ; 0x2000 80015e0: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 80015e2: f7ff ff23 bl 800142c CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80015e6: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 80015e8: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80015ea: 691a ldr r2, [r3, #16] 80015ec: f422 4290 bic.w r2, r2, #18432 ; 0x4800 80015f0: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80015f2: 695a ldr r2, [r3, #20] 80015f4: f022 022a bic.w r2, r2, #42 ; 0x2a 80015f8: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 80015fa: 68da ldr r2, [r3, #12] 80015fc: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8001600: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 8001602: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 8001604: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 8001606: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 800160a: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 800160e: bd10 pop {r4, pc} return HAL_ERROR; 8001610: 2001 movs r0, #1 } 8001612: bd10 pop {r4, pc} 08001614 : { 8001614: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001618: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 800161a: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 800161e: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 8001620: 2b20 cmp r3, #32 { 8001622: 460d mov r5, r1 8001624: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 8001626: d14e bne.n 80016c6 if((pData == NULL) || (Size == 0U)) 8001628: 2900 cmp r1, #0 800162a: d049 beq.n 80016c0 800162c: 2a00 cmp r2, #0 800162e: d047 beq.n 80016c0 __HAL_LOCK(huart); 8001630: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8001634: 2b01 cmp r3, #1 8001636: d046 beq.n 80016c6 8001638: 2301 movs r3, #1 800163a: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 800163e: 2300 movs r3, #0 8001640: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8001642: 2321 movs r3, #33 ; 0x21 8001644: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8001648: f7fe fe3a bl 80002c0 800164c: 4606 mov r6, r0 huart->TxXferSize = Size; 800164e: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8001652: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8001656: 8ce3 ldrh r3, [r4, #38] ; 0x26 8001658: b29b uxth r3, r3 800165a: b96b cbnz r3, 8001678 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 800165c: 463b mov r3, r7 800165e: 4632 mov r2, r6 8001660: 2140 movs r1, #64 ; 0x40 8001662: 4620 mov r0, r4 8001664: f7ff ff80 bl 8001568 8001668: b9a8 cbnz r0, 8001696 huart->gState = HAL_UART_STATE_READY; 800166a: 2320 movs r3, #32 __HAL_UNLOCK(huart); 800166c: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8001670: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8001674: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8001678: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800167a: 4632 mov r2, r6 huart->TxXferCount--; 800167c: 3b01 subs r3, #1 800167e: b29b uxth r3, r3 8001680: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001682: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001684: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8001686: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800168a: 4620 mov r0, r4 800168c: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800168e: d10e bne.n 80016ae if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8001690: f7ff ff6a bl 8001568 8001694: b110 cbz r0, 800169c return HAL_TIMEOUT; 8001696: 2003 movs r0, #3 8001698: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 800169c: 882b ldrh r3, [r5, #0] 800169e: 6822 ldr r2, [r4, #0] 80016a0: f3c3 0308 ubfx r3, r3, #0, #9 80016a4: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80016a6: 6923 ldr r3, [r4, #16] 80016a8: b943 cbnz r3, 80016bc pData +=2U; 80016aa: 3502 adds r5, #2 80016ac: e7d3 b.n 8001656 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80016ae: f7ff ff5b bl 8001568 80016b2: 2800 cmp r0, #0 80016b4: d1ef bne.n 8001696 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 80016b6: 6823 ldr r3, [r4, #0] 80016b8: 782a ldrb r2, [r5, #0] 80016ba: 605a str r2, [r3, #4] 80016bc: 3501 adds r5, #1 80016be: e7ca b.n 8001656 return HAL_ERROR; 80016c0: 2001 movs r0, #1 80016c2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 80016c6: 2002 movs r0, #2 } 80016c8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 080016cc : { 80016cc: 4613 mov r3, r2 if(huart->RxState == HAL_UART_STATE_READY) 80016ce: f890 203a ldrb.w r2, [r0, #58] ; 0x3a { 80016d2: b573 push {r0, r1, r4, r5, r6, lr} if(huart->RxState == HAL_UART_STATE_READY) 80016d4: 2a20 cmp r2, #32 { 80016d6: 4605 mov r5, r0 if(huart->RxState == HAL_UART_STATE_READY) 80016d8: d138 bne.n 800174c if((pData == NULL) || (Size == 0U)) 80016da: 2900 cmp r1, #0 80016dc: d034 beq.n 8001748 80016de: 2b00 cmp r3, #0 80016e0: d032 beq.n 8001748 __HAL_LOCK(huart); 80016e2: f890 2038 ldrb.w r2, [r0, #56] ; 0x38 80016e6: 2a01 cmp r2, #1 80016e8: d030 beq.n 800174c 80016ea: 2201 movs r2, #1 huart->ErrorCode = HAL_UART_ERROR_NONE; 80016ec: 2400 movs r4, #0 __HAL_LOCK(huart); 80016ee: f880 2038 strb.w r2, [r0, #56] ; 0x38 huart->RxState = HAL_UART_STATE_BUSY_RX; 80016f2: 2222 movs r2, #34 ; 0x22 huart->pRxBuffPtr = pData; 80016f4: 6281 str r1, [r0, #40] ; 0x28 huart->RxXferSize = Size; 80016f6: 8583 strh r3, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 80016f8: 63c4 str r4, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 80016fa: f880 203a strb.w r2, [r0, #58] ; 0x3a huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 80016fe: 6b40 ldr r0, [r0, #52] ; 0x34 8001700: 4a13 ldr r2, [pc, #76] ; (8001750 ) HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8001702: 682e ldr r6, [r5, #0] huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 8001704: 6282 str r2, [r0, #40] ; 0x28 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 8001706: 4a13 ldr r2, [pc, #76] ; (8001754 ) huart->hdmarx->XferAbortCallback = NULL; 8001708: 6344 str r4, [r0, #52] ; 0x34 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 800170a: 62c2 str r2, [r0, #44] ; 0x2c huart->hdmarx->XferErrorCallback = UART_DMAError; 800170c: 4a12 ldr r2, [pc, #72] ; (8001758 ) 800170e: 6302 str r2, [r0, #48] ; 0x30 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size); 8001710: 460a mov r2, r1 8001712: 1d31 adds r1, r6, #4 8001714: f7fe fe82 bl 800041c return HAL_OK; 8001718: 4620 mov r0, r4 __HAL_UART_CLEAR_OREFLAG(huart); 800171a: 682b ldr r3, [r5, #0] 800171c: 9401 str r4, [sp, #4] 800171e: 681a ldr r2, [r3, #0] 8001720: 9201 str r2, [sp, #4] 8001722: 685a ldr r2, [r3, #4] __HAL_UNLOCK(huart); 8001724: f885 4038 strb.w r4, [r5, #56] ; 0x38 __HAL_UART_CLEAR_OREFLAG(huart); 8001728: 9201 str r2, [sp, #4] 800172a: 9a01 ldr r2, [sp, #4] SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 800172c: 68da ldr r2, [r3, #12] 800172e: f442 7280 orr.w r2, r2, #256 ; 0x100 8001732: 60da str r2, [r3, #12] SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001734: 695a ldr r2, [r3, #20] 8001736: f042 0201 orr.w r2, r2, #1 800173a: 615a str r2, [r3, #20] SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 800173c: 695a ldr r2, [r3, #20] 800173e: f042 0240 orr.w r2, r2, #64 ; 0x40 8001742: 615a str r2, [r3, #20] } 8001744: b002 add sp, #8 8001746: bd70 pop {r4, r5, r6, pc} return HAL_ERROR; 8001748: 2001 movs r0, #1 800174a: e7fb b.n 8001744 return HAL_BUSY; 800174c: 2002 movs r0, #2 800174e: e7f9 b.n 8001744 8001750: 0800175f .word 0x0800175f 8001754: 08001815 .word 0x08001815 8001758: 08001821 .word 0x08001821 0800175c : 800175c: 4770 bx lr 0800175e : { 800175e: b508 push {r3, lr} if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001760: 6803 ldr r3, [r0, #0] UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8001762: 6a42 ldr r2, [r0, #36] ; 0x24 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8001764: 681b ldr r3, [r3, #0] 8001766: f013 0320 ands.w r3, r3, #32 800176a: d110 bne.n 800178e huart->RxXferCount = 0U; 800176c: 85d3 strh r3, [r2, #46] ; 0x2e CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 800176e: 6813 ldr r3, [r2, #0] 8001770: 68d9 ldr r1, [r3, #12] 8001772: f421 7180 bic.w r1, r1, #256 ; 0x100 8001776: 60d9 str r1, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8001778: 6959 ldr r1, [r3, #20] 800177a: f021 0101 bic.w r1, r1, #1 800177e: 6159 str r1, [r3, #20] CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001780: 6959 ldr r1, [r3, #20] 8001782: f021 0140 bic.w r1, r1, #64 ; 0x40 8001786: 6159 str r1, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8001788: 2320 movs r3, #32 800178a: f882 303a strb.w r3, [r2, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 800178e: 4610 mov r0, r2 8001790: f000 fe34 bl 80023fc 8001794: bd08 pop {r3, pc} 08001796 : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 8001796: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 800179a: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 800179c: 2b22 cmp r3, #34 ; 0x22 800179e: d136 bne.n 800180e if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80017a0: 6883 ldr r3, [r0, #8] 80017a2: 6901 ldr r1, [r0, #16] 80017a4: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 80017a8: 6802 ldr r2, [r0, #0] 80017aa: 6a83 ldr r3, [r0, #40] ; 0x28 80017ac: d123 bne.n 80017f6 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80017ae: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 80017b0: b9e9 cbnz r1, 80017ee *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 80017b2: f3c2 0208 ubfx r2, r2, #0, #9 80017b6: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 80017ba: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 80017bc: 8dc4 ldrh r4, [r0, #46] ; 0x2e 80017be: 3c01 subs r4, #1 80017c0: b2a4 uxth r4, r4 80017c2: 85c4 strh r4, [r0, #46] ; 0x2e 80017c4: b98c cbnz r4, 80017ea __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 80017c6: 6803 ldr r3, [r0, #0] 80017c8: 68da ldr r2, [r3, #12] 80017ca: f022 0220 bic.w r2, r2, #32 80017ce: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 80017d0: 68da ldr r2, [r3, #12] 80017d2: f422 7280 bic.w r2, r2, #256 ; 0x100 80017d6: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 80017d8: 695a ldr r2, [r3, #20] 80017da: f022 0201 bic.w r2, r2, #1 80017de: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 80017e0: 2320 movs r3, #32 80017e2: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 80017e6: f000 fe09 bl 80023fc if(--huart->RxXferCount == 0U) 80017ea: 2000 movs r0, #0 } 80017ec: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 80017ee: b2d2 uxtb r2, r2 80017f0: f823 2b01 strh.w r2, [r3], #1 80017f4: e7e1 b.n 80017ba if(huart->Init.Parity == UART_PARITY_NONE) 80017f6: b921 cbnz r1, 8001802 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 80017f8: 1c59 adds r1, r3, #1 80017fa: 6852 ldr r2, [r2, #4] 80017fc: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 80017fe: 701a strb r2, [r3, #0] 8001800: e7dc b.n 80017bc 8001802: 6852 ldr r2, [r2, #4] 8001804: 1c59 adds r1, r3, #1 8001806: 6281 str r1, [r0, #40] ; 0x28 8001808: f002 027f and.w r2, r2, #127 ; 0x7f 800180c: e7f7 b.n 80017fe return HAL_BUSY; 800180e: 2002 movs r0, #2 8001810: bd10 pop {r4, pc} 08001812 : 8001812: 4770 bx lr 08001814 : { 8001814: b508 push {r3, lr} HAL_UART_RxHalfCpltCallback(huart); 8001816: 6a40 ldr r0, [r0, #36] ; 0x24 8001818: f7ff fffb bl 8001812 800181c: bd08 pop {r3, pc} 0800181e : 800181e: 4770 bx lr 08001820 : UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8001820: 6a41 ldr r1, [r0, #36] ; 0x24 { 8001822: b508 push {r3, lr} dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 8001824: 680b ldr r3, [r1, #0] 8001826: 695a ldr r2, [r3, #20] if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8001828: f891 0039 ldrb.w r0, [r1, #57] ; 0x39 800182c: 2821 cmp r0, #33 ; 0x21 800182e: d10a bne.n 8001846 8001830: 0612 lsls r2, r2, #24 8001832: d508 bpl.n 8001846 huart->TxXferCount = 0U; 8001834: 2200 movs r2, #0 8001836: 84ca strh r2, [r1, #38] ; 0x26 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 8001838: 68da ldr r2, [r3, #12] 800183a: f022 02c0 bic.w r2, r2, #192 ; 0xc0 800183e: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 8001840: 2220 movs r2, #32 8001842: f881 2039 strb.w r2, [r1, #57] ; 0x39 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8001846: 695b ldr r3, [r3, #20] if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8001848: f891 203a ldrb.w r2, [r1, #58] ; 0x3a 800184c: 2a22 cmp r2, #34 ; 0x22 800184e: d106 bne.n 800185e 8001850: 065b lsls r3, r3, #25 8001852: d504 bpl.n 800185e huart->RxXferCount = 0U; 8001854: 2300 movs r3, #0 UART_EndRxTransfer(huart); 8001856: 4608 mov r0, r1 huart->RxXferCount = 0U; 8001858: 85cb strh r3, [r1, #46] ; 0x2e UART_EndRxTransfer(huart); 800185a: f7ff fdd9 bl 8001410 huart->ErrorCode |= HAL_UART_ERROR_DMA; 800185e: 6bcb ldr r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001860: 4608 mov r0, r1 huart->ErrorCode |= HAL_UART_ERROR_DMA; 8001862: f043 0310 orr.w r3, r3, #16 8001866: 63cb str r3, [r1, #60] ; 0x3c HAL_UART_ErrorCallback(huart); 8001868: f7ff ffd9 bl 800181e 800186c: bd08 pop {r3, pc} ... 08001870 : uint32_t isrflags = READ_REG(huart->Instance->SR); 8001870: 6803 ldr r3, [r0, #0] { 8001872: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8001874: 681a ldr r2, [r3, #0] { 8001876: 4604 mov r4, r0 if(errorflags == RESET) 8001878: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 800187a: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 800187c: 695d ldr r5, [r3, #20] if(errorflags == RESET) 800187e: d107 bne.n 8001890 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8001880: 0696 lsls r6, r2, #26 8001882: d55a bpl.n 800193a 8001884: 068d lsls r5, r1, #26 8001886: d558 bpl.n 800193a } 8001888: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 800188c: f7ff bf83 b.w 8001796 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 8001890: f015 0501 ands.w r5, r5, #1 8001894: d102 bne.n 800189c 8001896: f411 7f90 tst.w r1, #288 ; 0x120 800189a: d04e beq.n 800193a if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 800189c: 07d3 lsls r3, r2, #31 800189e: d505 bpl.n 80018ac 80018a0: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 80018a2: bf42 ittt mi 80018a4: 6be3 ldrmi r3, [r4, #60] ; 0x3c 80018a6: f043 0301 orrmi.w r3, r3, #1 80018aa: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80018ac: 0750 lsls r0, r2, #29 80018ae: d504 bpl.n 80018ba 80018b0: b11d cbz r5, 80018ba huart->ErrorCode |= HAL_UART_ERROR_NE; 80018b2: 6be3 ldr r3, [r4, #60] ; 0x3c 80018b4: f043 0302 orr.w r3, r3, #2 80018b8: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80018ba: 0793 lsls r3, r2, #30 80018bc: d504 bpl.n 80018c8 80018be: b11d cbz r5, 80018c8 huart->ErrorCode |= HAL_UART_ERROR_FE; 80018c0: 6be3 ldr r3, [r4, #60] ; 0x3c 80018c2: f043 0304 orr.w r3, r3, #4 80018c6: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80018c8: 0716 lsls r6, r2, #28 80018ca: d504 bpl.n 80018d6 80018cc: b11d cbz r5, 80018d6 huart->ErrorCode |= HAL_UART_ERROR_ORE; 80018ce: 6be3 ldr r3, [r4, #60] ; 0x3c 80018d0: f043 0308 orr.w r3, r3, #8 80018d4: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 80018d6: 6be3 ldr r3, [r4, #60] ; 0x3c 80018d8: 2b00 cmp r3, #0 80018da: d066 beq.n 80019aa if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80018dc: 0695 lsls r5, r2, #26 80018de: d504 bpl.n 80018ea 80018e0: 0688 lsls r0, r1, #26 80018e2: d502 bpl.n 80018ea UART_Receive_IT(huart); 80018e4: 4620 mov r0, r4 80018e6: f7ff ff56 bl 8001796 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80018ea: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 80018ec: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80018ee: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 80018f0: 6be2 ldr r2, [r4, #60] ; 0x3c 80018f2: 0711 lsls r1, r2, #28 80018f4: d402 bmi.n 80018fc 80018f6: f015 0540 ands.w r5, r5, #64 ; 0x40 80018fa: d01a beq.n 8001932 UART_EndRxTransfer(huart); 80018fc: f7ff fd88 bl 8001410 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8001900: 6823 ldr r3, [r4, #0] 8001902: 695a ldr r2, [r3, #20] 8001904: 0652 lsls r2, r2, #25 8001906: d510 bpl.n 800192a CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8001908: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 800190a: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 800190c: f022 0240 bic.w r2, r2, #64 ; 0x40 8001910: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 8001912: b150 cbz r0, 800192a huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8001914: 4b25 ldr r3, [pc, #148] ; (80019ac ) 8001916: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8001918: f7fe fdbe bl 8000498 800191c: 2800 cmp r0, #0 800191e: d044 beq.n 80019aa huart->hdmarx->XferAbortCallback(huart->hdmarx); 8001920: 6b60 ldr r0, [r4, #52] ; 0x34 } 8001922: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8001926: 6b43 ldr r3, [r0, #52] ; 0x34 8001928: 4718 bx r3 HAL_UART_ErrorCallback(huart); 800192a: 4620 mov r0, r4 800192c: f7ff ff77 bl 800181e 8001930: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 8001932: f7ff ff74 bl 800181e huart->ErrorCode = HAL_UART_ERROR_NONE; 8001936: 63e5 str r5, [r4, #60] ; 0x3c 8001938: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 800193a: 0616 lsls r6, r2, #24 800193c: d527 bpl.n 800198e 800193e: 060d lsls r5, r1, #24 8001940: d525 bpl.n 800198e if(huart->gState == HAL_UART_STATE_BUSY_TX) 8001942: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8001946: 2a21 cmp r2, #33 ; 0x21 8001948: d12f bne.n 80019aa if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800194a: 68a2 ldr r2, [r4, #8] 800194c: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 8001950: 6a22 ldr r2, [r4, #32] 8001952: d117 bne.n 8001984 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8001954: 8811 ldrh r1, [r2, #0] 8001956: f3c1 0108 ubfx r1, r1, #0, #9 800195a: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 800195c: 6921 ldr r1, [r4, #16] 800195e: b979 cbnz r1, 8001980 huart->pTxBuffPtr += 2U; 8001960: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 8001962: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8001964: 8ce2 ldrh r2, [r4, #38] ; 0x26 8001966: 3a01 subs r2, #1 8001968: b292 uxth r2, r2 800196a: 84e2 strh r2, [r4, #38] ; 0x26 800196c: b9ea cbnz r2, 80019aa __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 800196e: 68da ldr r2, [r3, #12] 8001970: f022 0280 bic.w r2, r2, #128 ; 0x80 8001974: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8001976: 68da ldr r2, [r3, #12] 8001978: f042 0240 orr.w r2, r2, #64 ; 0x40 800197c: 60da str r2, [r3, #12] 800197e: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 8001980: 3201 adds r2, #1 8001982: e7ee b.n 8001962 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8001984: 1c51 adds r1, r2, #1 8001986: 6221 str r1, [r4, #32] 8001988: 7812 ldrb r2, [r2, #0] 800198a: 605a str r2, [r3, #4] 800198c: e7ea b.n 8001964 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 800198e: 0650 lsls r0, r2, #25 8001990: d50b bpl.n 80019aa 8001992: 064a lsls r2, r1, #25 8001994: d509 bpl.n 80019aa __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8001996: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8001998: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 800199a: f022 0240 bic.w r2, r2, #64 ; 0x40 800199e: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 80019a0: 2320 movs r3, #32 80019a2: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 80019a6: f7ff fed9 bl 800175c 80019aa: bd70 pop {r4, r5, r6, pc} 80019ac: 080019b1 .word 0x080019b1 080019b0 : { 80019b0: b508 push {r3, lr} huart->RxXferCount = 0x00U; 80019b2: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80019b4: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 80019b6: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 80019b8: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 80019ba: f7ff ff30 bl 800181e 80019be: bd08 pop {r3, pc} 080019c0 : * ***/ #define Bluecell_BootStart 0x0b uint8_t BootStartdata[6] = {0xbe,Bluecell_BootStart,0x03,4,0,0xeb}; void Firmware_BootStart_Signal(){ 80019c0: b510 push {r4, lr} BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 80019c2: 4c07 ldr r4, [pc, #28] ; (80019e0 ) 80019c4: 78a1 ldrb r1, [r4, #2] 80019c6: 1c60 adds r0, r4, #1 80019c8: f000 f8c2 bl 8001b50 Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80019cc: 78a1 ldrb r1, [r4, #2] BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]); 80019ce: 7120 strb r0, [r4, #4] Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80019d0: 3103 adds r1, #3 80019d2: 4620 mov r0, r4 } 80019d4: e8bd 4010 ldmia.w sp!, {r4, lr} Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3); 80019d8: b2c9 uxtb r1, r1 80019da: f000 bd35 b.w 8002448 80019de: bf00 nop 80019e0: 2000000e .word 0x2000000e 080019e4 : uint8_t AckData_Buf[6] = {0xbe,FirmwareUpdataAck,0x03,5,0,0xbe}; void FirmwareUpdateStart(uint8_t* data){ 80019e4: b570 push {r4, r5, r6, lr} uint8_t ret = 0,crccheck = 0; crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80019e6: 7881 ldrb r1, [r0, #2] void FirmwareUpdateStart(uint8_t* data){ 80019e8: 4604 mov r4, r0 crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]); 80019ea: 1843 adds r3, r0, r1 80019ec: 785a ldrb r2, [r3, #1] 80019ee: 3001 adds r0, #1 80019f0: f000 f8c9 bl 8001b86 if(crccheck == NO_ERROR){ 80019f4: b2c0 uxtb r0, r0 80019f6: 2801 cmp r0, #1 80019f8: d00e beq.n 8001a18 80019fa: 2300 movs r3, #0 ret = Flash_write(&data[0]); if(ret == 1) AckData_Buf[bluecell_type] = FirmwareUpdataNak; }else{ for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) printf("%02x ",data[i]); 80019fc: 4e1e ldr r6, [pc, #120] ; (8001a78 ) for(uint8_t i = 0; i < data[bluecell_length] + 3; i++) 80019fe: 78a2 ldrb r2, [r4, #2] 8001a00: 1c5d adds r5, r3, #1 8001a02: 3202 adds r2, #2 8001a04: b2db uxtb r3, r3 8001a06: 429a cmp r2, r3 8001a08: da2f bge.n 8001a6a printf("Check Sum error \n"); 8001a0a: 481c ldr r0, [pc, #112] ; (8001a7c ) 8001a0c: f000 fdf2 bl 80025f4 AckData_Buf[bluecell_type] = FirmwareUpdataNak; 8001a10: 2222 movs r2, #34 ; 0x22 8001a12: 4b1b ldr r3, [pc, #108] ; (8001a80 ) 8001a14: 705a strb r2, [r3, #1] 8001a16: e00f b.n 8001a38 AckData_Buf[bluecell_type] = FirmwareUpdataAck; 8001a18: 2211 movs r2, #17 8001a1a: 4d19 ldr r5, [pc, #100] ; (8001a80 ) 8001a1c: 706a strb r2, [r5, #1] if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte 8001a1e: 7862 ldrb r2, [r4, #1] 8001a20: 2add cmp r2, #221 ; 0xdd 8001a22: d001 beq.n 8001a28 8001a24: 2aee cmp r2, #238 ; 0xee 8001a26: d107 bne.n 8001a38 ret = Flash_write(&data[0]); 8001a28: 4620 mov r0, r4 8001a2a: f000 f9d5 bl 8001dd8 if(ret == 1) 8001a2e: b2c0 uxtb r0, r0 8001a30: 2801 cmp r0, #1 8001a32: d101 bne.n 8001a38 AckData_Buf[bluecell_type] = FirmwareUpdataNak; 8001a34: 2322 movs r3, #34 ; 0x22 8001a36: 706b strb r3, [r5, #1] } AckData_Buf[bluecell_crc] = STH30_CreateCrc(&AckData_Buf[bluecell_type],AckData_Buf[bluecell_length]); 8001a38: 4d11 ldr r5, [pc, #68] ; (8001a80 ) 8001a3a: 78a9 ldrb r1, [r5, #2] 8001a3c: 1c68 adds r0, r5, #1 8001a3e: f000 f887 bl 8001b50 8001a42: 7128 strb r0, [r5, #4] if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){ 8001a44: 7863 ldrb r3, [r4, #1] 8001a46: 2bee cmp r3, #238 ; 0xee 8001a48: d007 beq.n 8001a5a 8001a4a: 2b0a cmp r3, #10 8001a4c: d005 beq.n 8001a5a Uart1_Data_Send(&AckData_Buf[bluecell_stx],AckData_Buf[bluecell_length] + 3); 8001a4e: 78a9 ldrb r1, [r5, #2] 8001a50: 4628 mov r0, r5 8001a52: 3103 adds r1, #3 8001a54: b2c9 uxtb r1, r1 8001a56: f000 fcf7 bl 8002448 } if(data[bluecell_type] == 0xEE) 8001a5a: 7863 ldrb r3, [r4, #1] 8001a5c: 2bee cmp r3, #238 ; 0xee 8001a5e: d10a bne.n 8001a76 printf("update Complete \n"); } 8001a60: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} printf("update Complete \n"); 8001a64: 4807 ldr r0, [pc, #28] ; (8001a84 ) 8001a66: f000 bdc5 b.w 80025f4 printf("%02x ",data[i]); 8001a6a: 5ce1 ldrb r1, [r4, r3] 8001a6c: 4630 mov r0, r6 8001a6e: f000 fd4d bl 800250c 8001a72: 462b mov r3, r5 8001a74: e7c3 b.n 80019fe 8001a76: bd70 pop {r4, r5, r6, pc} 8001a78: 08003580 .word 0x08003580 8001a7c: 08003586 .word 0x08003586 8001a80: 20000008 .word 0x20000008 8001a84: 08003597 .word 0x08003597 08001a88 : //----------------------------------------------- //UART CRC üũ �Լ� //----------------------------------------------- bool Chksum_Check(uint8_t *data, uint32_t leng,uint8_t chkdata) { uint8_t dataret = 0; 8001a88: 2300 movs r3, #0 { 8001a8a: b510 push {r4, lr} 8001a8c: 1cc1 adds r1, r0, #3 8001a8e: 3014 adds r0, #20 bool ret = false; for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ dataret += data[i]; 8001a90: f811 4f01 ldrb.w r4, [r1, #1]! 8001a94: 4423 add r3, r4 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001a96: 4281 cmp r1, r0 dataret += data[i]; 8001a98: b2db uxtb r3, r3 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001a9a: d1f9 bne.n 8001a90 if(dataret == chkdata){ ret = true; } // printf("dataret : %x chkdata : %x \r\n",dataret,chkdata); return ret; } 8001a9c: 1a9b subs r3, r3, r2 8001a9e: 4258 negs r0, r3 8001aa0: 4158 adcs r0, r3 8001aa2: bd10 pop {r4, pc} 08001aa4 : uint8_t Chksum_Create(uint8_t *data) { 8001aa4: 1cc2 adds r2, r0, #3 8001aa6: f100 0314 add.w r3, r0, #20 uint8_t dataret = 0; 8001aaa: 2000 movs r0, #0 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ dataret += data[i]; 8001aac: f812 1f01 ldrb.w r1, [r2, #1]! 8001ab0: 4408 add r0, r1 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001ab2: 429a cmp r2, r3 dataret += data[i]; 8001ab4: b2c0 uxtb r0, r0 for(int i = MBIC_SUBUID_0; i < MBIC_HEADERCHECKSUM_0; i++){ 8001ab6: d1f9 bne.n 8001aac // printf("dataret : %x data[%d] : %x \r\n",dataret,i,data[i]); } // printf("dataret : %x \r\n",dataret); return dataret; } 8001ab8: 4770 bx lr ... 08001abc : { uint8_t dt = 0U; uint16_t crc16 = 0U; len *= 8; for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001abc: 2300 movs r3, #0 { 8001abe: b510 push {r4, lr} { crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001ac0: 4c0f ldr r4, [pc, #60] ; (8001b00 ) len *= 8; 8001ac2: 00c9 lsls r1, r1, #3 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001ac4: 2907 cmp r1, #7 8001ac6: dc0f bgt.n 8001ae8 } if(len != 0) 8001ac8: b161 cbz r1, 8001ae4 len--; if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) { crc16 = (uint16_t)(crc16 << 1); crc16 = (uint16_t)(crc16 ^ 0x1021); 8001aca: f241 0221 movw r2, #4129 ; 0x1021 if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) 8001ace: f413 4f00 tst.w r3, #32768 ; 0x8000 8001ad2: ea4f 0343 mov.w r3, r3, lsl #1 crc16 = (uint16_t)(crc16 << 1); 8001ad6: b29b uxth r3, r3 len--; 8001ad8: f101 31ff add.w r1, r1, #4294967295 crc16 = (uint16_t)(crc16 ^ 0x1021); 8001adc: bf18 it ne 8001ade: 4053 eorne r3, r2 while(len != 0) 8001ae0: 2900 cmp r1, #0 8001ae2: d1f4 bne.n 8001ace } dt = (uint8_t)(dt << 1); } } return(crc16); } 8001ae4: 4618 mov r0, r3 8001ae6: bd10 pop {r4, pc} crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001ae8: f810 2b01 ldrb.w r2, [r0], #1 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001aec: 3908 subs r1, #8 crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001aee: ea82 2213 eor.w r2, r2, r3, lsr #8 8001af2: f834 2012 ldrh.w r2, [r4, r2, lsl #1] 8001af6: ea82 2303 eor.w r3, r2, r3, lsl #8 8001afa: b29b uxth r3, r3 8001afc: e7e2 b.n 8001ac4 8001afe: bf00 nop 8001b00: 20000014 .word 0x20000014 08001b04 : { uint8_t dt = 0U; uint16_t crc16 = 0U; len *= 8; for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001b04: 2300 movs r3, #0 { 8001b06: b530 push {r4, r5, lr} { crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001b08: 4d10 ldr r5, [pc, #64] ; (8001b4c ) len *= 8; 8001b0a: 00c9 lsls r1, r1, #3 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001b0c: 2907 cmp r1, #7 8001b0e: dc11 bgt.n 8001b34 } if(len != 0) 8001b10: b161 cbz r1, 8001b2c len--; if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) { crc16 = (uint16_t)(crc16 << 1); crc16 = (uint16_t)(crc16 ^ 0x1021); 8001b12: f241 0021 movw r0, #4129 ; 0x1021 if(((crc16^dt) & ((uint16_t)1 << 15)) != 0) 8001b16: f413 4f00 tst.w r3, #32768 ; 0x8000 8001b1a: ea4f 0343 mov.w r3, r3, lsl #1 crc16 = (uint16_t)(crc16 << 1); 8001b1e: b29b uxth r3, r3 len--; 8001b20: f101 31ff add.w r1, r1, #4294967295 crc16 = (uint16_t)(crc16 ^ 0x1021); 8001b24: bf18 it ne 8001b26: 4043 eorne r3, r0 while(len != 0) 8001b28: 2900 cmp r1, #0 8001b2a: d1f4 bne.n 8001b16 } dt = (uint8_t)(dt << 1); } } return(crc16 == checksum ? CHECKSUM_ERROR : NO_ERROR ); } 8001b2c: 1a98 subs r0, r3, r2 8001b2e: bf18 it ne 8001b30: 2001 movne r0, #1 8001b32: bd30 pop {r4, r5, pc} crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001b34: f810 4b01 ldrb.w r4, [r0], #1 for(crc16 = (uint16_t)0x0000; len >= 8; len -= 8, buf_ptr++) 8001b38: 3908 subs r1, #8 crc16 = (uint16_t)(Table_CRC16[(crc16>>8) ^ (uint16_t)(*buf_ptr)] ^ (crc16<<8)); 8001b3a: ea84 2413 eor.w r4, r4, r3, lsr #8 8001b3e: f835 4014 ldrh.w r4, [r5, r4, lsl #1] 8001b42: ea84 2303 eor.w r3, r4, r3, lsl #8 8001b46: b29b uxth r3, r3 8001b48: e7e0 b.n 8001b0c 8001b4a: bf00 nop 8001b4c: 20000014 .word 0x20000014 08001b50 : uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 8001b50: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001b52: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001b54: 4604 mov r4, r0 8001b56: 1a22 subs r2, r4, r0 8001b58: b2d2 uxtb r2, r2 8001b5a: 4291 cmp r1, r2 8001b5c: d801 bhi.n 8001b62 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 8001b5e: 4618 mov r0, r3 8001b60: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 8001b62: f814 2b01 ldrb.w r2, [r4], #1 8001b66: 4053 eors r3, r2 8001b68: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001b6a: f013 0f80 tst.w r3, #128 ; 0x80 8001b6e: f102 32ff add.w r2, r2, #4294967295 8001b72: ea4f 0343 mov.w r3, r3, lsl #1 8001b76: bf18 it ne 8001b78: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001b7c: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8001b80: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001b82: d1f2 bne.n 8001b6a 8001b84: e7e7 b.n 8001b56 08001b86 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8001b86: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8001b88: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8001b8a: 4605 mov r5, r0 8001b8c: 1a2c subs r4, r5, r0 8001b8e: b2e4 uxtb r4, r4 8001b90: 42a1 cmp r1, r4 8001b92: d803 bhi.n 8001b9c else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8001b94: 1a9b subs r3, r3, r2 8001b96: 4258 negs r0, r3 8001b98: 4158 adcs r0, r3 8001b9a: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8001b9c: f815 4b01 ldrb.w r4, [r5], #1 8001ba0: 4063 eors r3, r4 8001ba2: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8001ba4: f013 0f80 tst.w r3, #128 ; 0x80 8001ba8: f104 34ff add.w r4, r4, #4294967295 8001bac: ea4f 0343 mov.w r3, r3, lsl #1 8001bb0: bf18 it ne 8001bb2: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8001bb6: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8001bba: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8001bbc: d1f2 bne.n 8001ba4 8001bbe: e7e5 b.n 8001b8c 08001bc0 : Length : Response Data Length CRCINDEX : CRC INDEX Number */ uint8_t* MBIC_HeaderMergeFunction(uint8_t* data,uint16_t Length ) { 8001bc0: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 8001bc4: f101 0320 add.w r3, r1, #32 8001bc8: f023 0307 bic.w r3, r3, #7 { 8001bcc: af00 add r7, sp, #0 uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 8001bce: ebad 0d03 sub.w sp, sp, r3 { 8001bd2: 4604 mov r4, r0 8001bd4: 460e mov r6, r1 uint16_t CRCData = CRC16_Generate(data,Length); 8001bd6: f7ff ff71 bl 8001abc /*CRC Create*/ ret[MBIC_PAYLOADSTART + Length + 0] = ((CRCData & 0xFF00) >> 8); 8001bda: eb0d 0306 add.w r3, sp, r6 8001bde: 0a02 lsrs r2, r0, #8 8001be0: 759a strb r2, [r3, #22] ret[MBIC_PAYLOADSTART + Length + 1] = ((CRCData & 0x00FF)); ret[MBIC_PAYLOADSTART + Length + 2] = 0x03; 8001be2: 2203 movs r2, #3 ret[MBIC_PAYLOADSTART + Length + 1] = ((CRCData & 0x00FF)); 8001be4: 75d8 strb r0, [r3, #23] ret[MBIC_PAYLOADSTART + Length + 2] = 0x03; 8001be6: 761a strb r2, [r3, #24] /*Data Mark Create*/ ret[MBIC_PREAMBLE_0] = MBIC_PREAMBLE0; 8001be8: 2316 movs r3, #22 8001bea: f88d 3000 strb.w r3, [sp] ret[MBIC_PREAMBLE_1] = MBIC_PREAMBLE1; 8001bee: f88d 3001 strb.w r3, [sp, #1] ret[MBIC_PREAMBLE_2] = MBIC_PREAMBLE2; 8001bf2: f88d 3002 strb.w r3, [sp, #2] ret[MBIC_PREAMBLE_3] = MBIC_PREAMBLE3; 8001bf6: f88d 3003 strb.w r3, [sp, #3] /*Data Subid Create*/ ret[MBIC_SUBUID_0] = MBIC_SUBUID0; ret[MBIC_SUBUID_1] = MBIC_SUBUID1; 8001bfa: 23f1 movs r3, #241 ; 0xf1 ret[MBIC_SUBUID_0] = MBIC_SUBUID0; 8001bfc: 2500 movs r5, #0 ret[MBIC_SUBUID_1] = MBIC_SUBUID1; 8001bfe: f88d 3005 strb.w r3, [sp, #5] ret[MBIC_RCODE_0] = data[MBIC_RCODE_0]; 8001c02: 79a3 ldrb r3, [r4, #6] ret[MBIC_LENGTH_0] = (Length & 0xFF00) << 8; ret[MBIC_LENGTH_1] = Length & 0x00FF; ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8001c04: 4668 mov r0, sp ret[MBIC_RCODE_0] = data[MBIC_RCODE_0]; 8001c06: f88d 3006 strb.w r3, [sp, #6] ret[MBIC_TRID_0] = data[MBIC_TRID_0]; 8001c0a: 79e3 ldrb r3, [r4, #7] ret[MBIC_SUBUID_0] = MBIC_SUBUID0; 8001c0c: f88d 5004 strb.w r5, [sp, #4] ret[MBIC_TRID_0] = data[MBIC_TRID_0]; 8001c10: f88d 3007 strb.w r3, [sp, #7] ret[MBIC_TRID_1] = data[MBIC_TRID_1]; 8001c14: 7a23 ldrb r3, [r4, #8] ret[MBIC_ERRRESPONSE_0] = MBIC_ERRRESPONSE; 8001c16: f88d 5011 strb.w r5, [sp, #17] ret[MBIC_TRID_1] = data[MBIC_TRID_1]; 8001c1a: f88d 3008 strb.w r3, [sp, #8] ret[MBIC_SEQSUM_0] = data[MBIC_SEQSUM_0]; 8001c1e: 7a63 ldrb r3, [r4, #9] uint8_t ret[Length + 22 + 3];/*Data Length + Header Length + Tail Length*/ 8001c20: 46e8 mov r8, sp ret[MBIC_SEQSUM_0] = data[MBIC_SEQSUM_0]; 8001c22: f88d 3009 strb.w r3, [sp, #9] ret[MBIC_TTL_0] = data[MBIC_TTL_0]; 8001c26: 7aa3 ldrb r3, [r4, #10] 8001c28: f88d 300a strb.w r3, [sp, #10] ret[MBIC_TIME_0] = data[MBIC_TIME_0]; 8001c2c: 7ae3 ldrb r3, [r4, #11] 8001c2e: f88d 300b strb.w r3, [sp, #11] ret[MBIC_TIME_1] = data[MBIC_TIME_1]; 8001c32: 7b23 ldrb r3, [r4, #12] 8001c34: f88d 300c strb.w r3, [sp, #12] ret[MBIC_TIME_2] = data[MBIC_TIME_2]; 8001c38: 7b63 ldrb r3, [r4, #13] 8001c3a: f88d 300d strb.w r3, [sp, #13] ret[MBIC_TIME_3] = data[MBIC_TIME_3]; 8001c3e: 7ba3 ldrb r3, [r4, #14] 8001c40: f88d 300e strb.w r3, [sp, #14] ret[MBIC_TIME_4] = data[MBIC_TIME_4]; 8001c44: 7be3 ldrb r3, [r4, #15] 8001c46: f88d 300f strb.w r3, [sp, #15] ret[MBIC_TIME_5] = data[MBIC_TIME_5]; 8001c4a: 7c23 ldrb r3, [r4, #16] 8001c4c: f88d 3010 strb.w r3, [sp, #16] ret[MBIC_LENGTH_0] = (Length & 0xFF00) << 8; 8001c50: f88d 5013 strb.w r5, [sp, #19] ret[MBIC_LENGTH_1] = Length & 0x00FF; 8001c54: f88d 6014 strb.w r6, [sp, #20] ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8001c58: f7ff ff24 bl 8001aa4 // data[MBIC_PAYLOADSTART + i] = data[i]; // } /* MBIC Header Data input */ for(int i = 0; i < MBIC_HEADER_SIZE; i++){ 8001c5c: 462b mov r3, r5 ret[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ret); 8001c5e: f88d 0015 strb.w r0, [sp, #21] if(i == MBIC_CMD_0) /*cmd exception*/ 8001c62: 2b12 cmp r3, #18 continue; data[i] = ret[i]; 8001c64: bf1c itt ne 8001c66: f818 2003 ldrbne.w r2, [r8, r3] 8001c6a: 54e2 strbne r2, [r4, r3] for(int i = 0; i < MBIC_HEADER_SIZE; i++){ 8001c6c: 3301 adds r3, #1 8001c6e: 2b16 cmp r3, #22 8001c70: d1f7 bne.n 8001c62 8001c72: 2300 movs r3, #0 8001c74: 3301 adds r3, #1 } /* MBIC Tail Data input */ for(int i = MBIC_HEADER_SIZE + Length; i < MBIC_HEADER_SIZE + MBIC_TAIL_SIZE + Length; i++){ 8001c76: 2b04 cmp r3, #4 8001c78: d103 bne.n 8001c82 // ret[MBIC_PAYLOADSTART + i] = data[i]; // for(int i = 0; i < Length; i++) // printf("MBIC : %x \r\n",data[i]); return data; } 8001c7a: 4620 mov r0, r4 8001c7c: 46bd mov sp, r7 8001c7e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} data[i] = ret[i]; 8001c82: 199a adds r2, r3, r6 8001c84: 18a1 adds r1, r4, r2 8001c86: 4442 add r2, r8 8001c88: 7d52 ldrb r2, [r2, #21] 8001c8a: 754a strb r2, [r1, #21] 8001c8c: e7f2 b.n 8001c74 ... 08001c90 : void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){ 8001c90: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} // printf("RX"); // for(int i = 0; i < 128; i++) // printf("%c",*data++); switch(cmd){ 8001c94: 7c83 ldrb r3, [r0, #18] void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){ 8001c96: 4604 mov r4, r0 switch(cmd){ 8001c98: 3b10 subs r3, #16 8001c9a: 2b04 cmp r3, #4 8001c9c: d86b bhi.n 8001d76 8001c9e: e8df f003 tbb [pc, r3] 8001ca2: 1903 .short 0x1903 8001ca4: 5043 .short 0x5043 8001ca6: 5d .byte 0x5d 8001ca7: 00 .byte 0x00 data[MBIC_PAYLOADSTART + index++] = data[MBIC_PAYLOADSTART + 3]; /*DOWNLOAD OPTION*/ data[MBIC_PAYLOADSTART + index++] = data[MBIC_PAYLOADSTART + 4]; Download_Option = data[MBIC_PAYLOADSTART + 4]; /*DOWNLOAD DELAY REQUEST*/ data[MBIC_PAYLOADSTART + index++] = 3; 8001ca8: 2303 movs r3, #3 8001caa: 76c3 strb r3, [r0, #27] /*DOWNLOAD Reserve*/ data[MBIC_PAYLOADSTART + index++] = 0; 8001cac: 2300 movs r3, #0 8001cae: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001cb0: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001cb2: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001cb4: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001cb6: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001cba: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Notice_RSP; 8001cbe: 2390 movs r3, #144 ; 0x90 data[MBIC_PAYLOADSTART + index++] = 0; break; default: return; } data[MBIC_CMD_0] = cmd; 8001cc0: 74a3 strb r3, [r4, #18] data = MBIC_HeaderMergeFunction(data,index); // reponse 8001cc2: 210c movs r1, #12 8001cc4: 4620 mov r0, r4 8001cc6: f7ff ff7b bl 8001bc0 // HAL_UART_Transmit_DMA(&huart1, data,22 + 3 + index); Uart1_Data_Send(data ,22 + 3 + index); } 8001cca: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} Uart1_Data_Send(data ,22 + 3 + index); 8001cce: 2125 movs r1, #37 ; 0x25 8001cd0: f000 bbba b.w 8002448 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8001cd4: 7ec3 ldrb r3, [r0, #27] Curr_Download_DataIndex = data[MBIC_PAYLOADSTART + 4] << 24; 8001cd6: 7e81 ldrb r1, [r0, #26] Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 5] << 16; 8001cd8: 041b lsls r3, r3, #16 8001cda: eb03 6301 add.w r3, r3, r1, lsl #24 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8001cde: 7f41 ldrb r1, [r0, #29] 8001ce0: 4e26 ldr r6, [pc, #152] ; (8001d7c ) 8001ce2: 440b add r3, r1 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 6] << 8; 8001ce4: 7f01 ldrb r1, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001ce6: 4607 mov r7, r0 Curr_Download_DataIndex += data[MBIC_PAYLOADSTART + 7]; 8001ce8: eb03 2301 add.w r3, r3, r1, lsl #8 8001cec: 6033 str r3, [r6, #0] data[MBIC_PAYLOADSTART + index++] = 0; 8001cee: 2300 movs r3, #0 for(i = 0; i < Curr_Download_DataIndex - Prev_Download_DataIndex; i++){ 8001cf0: 461d mov r5, r3 8001cf2: f8df 808c ldr.w r8, [pc, #140] ; 8001d80 printf("%02x ",MBIC_DownLoadData[i]); 8001cf6: f8df 908c ldr.w r9, [pc, #140] ; 8001d84 data[MBIC_PAYLOADSTART + index++] = 0; 8001cfa: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001cfc: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001cfe: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001d02: f807 3f21 strb.w r3, [r7, #33]! for(i = 0; i < Curr_Download_DataIndex - Prev_Download_DataIndex; i++){ 8001d06: 6832 ldr r2, [r6, #0] 8001d08: f8d8 3000 ldr.w r3, [r8] 8001d0c: 1ad3 subs r3, r2, r3 8001d0e: 429d cmp r5, r3 8001d10: d303 bcc.n 8001d1a Prev_Download_DataIndex = Curr_Download_DataIndex; 8001d12: f8c8 2000 str.w r2, [r8] cmd = MBIC_Download_DATA_RSP; 8001d16: 2391 movs r3, #145 ; 0x91 break; 8001d18: e7d2 b.n 8001cc0 printf("%02x ",MBIC_DownLoadData[i]); 8001d1a: f817 1f01 ldrb.w r1, [r7, #1]! 8001d1e: 4648 mov r0, r9 8001d20: f000 fbf4 bl 800250c for(i = 0; i < Curr_Download_DataIndex - Prev_Download_DataIndex; i++){ 8001d24: 3501 adds r5, #1 8001d26: e7ee b.n 8001d06 data[MBIC_PAYLOADSTART + index++] = 3; 8001d28: 2303 movs r3, #3 8001d2a: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 8001d2c: 2300 movs r3, #0 8001d2e: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001d30: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001d32: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001d34: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001d36: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001d3a: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Download_Confirm_RSP; 8001d3e: 2392 movs r3, #146 ; 0x92 break; 8001d40: e7be b.n 8001cc0 data[MBIC_PAYLOADSTART + index++] = 3; 8001d42: 2303 movs r3, #3 8001d44: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 8001d46: 2300 movs r3, #0 8001d48: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001d4a: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001d4c: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001d4e: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001d50: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001d54: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Complete_Notice_RSP; 8001d58: 2393 movs r3, #147 ; 0x93 break; 8001d5a: e7b1 b.n 8001cc0 data[MBIC_PAYLOADSTART + index++] = 3; 8001d5c: 2303 movs r3, #3 8001d5e: 76c3 strb r3, [r0, #27] data[MBIC_PAYLOADSTART + index++] = 0; 8001d60: 2300 movs r3, #0 8001d62: 7703 strb r3, [r0, #28] data[MBIC_PAYLOADSTART + index++] = 0; 8001d64: 7743 strb r3, [r0, #29] data[MBIC_PAYLOADSTART + index++] = 0; 8001d66: 7783 strb r3, [r0, #30] data[MBIC_PAYLOADSTART + index++] = 0; 8001d68: 77c3 strb r3, [r0, #31] data[MBIC_PAYLOADSTART + index++] = 0; 8001d6a: f880 3020 strb.w r3, [r0, #32] data[MBIC_PAYLOADSTART + index++] = 0; 8001d6e: f880 3021 strb.w r3, [r0, #33] ; 0x21 cmd = MBIC_Reboot_Notice_RSP; 8001d72: 2394 movs r3, #148 ; 0x94 break; 8001d74: e7a4 b.n 8001cc0 8001d76: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8001d7a: bf00 nop 8001d7c: 2000029c .word 0x2000029c 8001d80: 200002a0 .word 0x200002a0 8001d84: 08003580 .word 0x08003580 08001d88 : #endif // PYJ.2019.03.27_END -- } #if 1 // PYJ.2020.05.20_BEGIN -- uint8_t Flash_RGB_Data_Write(uint8_t* data){ 8001d88: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8001d8c: 4605 mov r5, r0 uint16_t Firmdata = 0; uint8_t ret = 0; for(int i = 0; i < data[bluecell_length] - 2; i+=2){ 8001d8e: 4604 mov r4, r0 uint8_t ret = 0; 8001d90: 2700 movs r7, #0 Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001d92: 4e0f ldr r6, [pc, #60] ; (8001dd0 ) printf("HAL NOT OK \n"); 8001d94: f8df 803c ldr.w r8, [pc, #60] ; 8001dd4 for(int i = 0; i < data[bluecell_length] - 2; i+=2){ 8001d98: 78ab ldrb r3, [r5, #2] 8001d9a: 1b62 subs r2, r4, r5 8001d9c: 3b02 subs r3, #2 8001d9e: 4293 cmp r3, r2 8001da0: dc02 bgt.n 8001da8 Address += 2; //if(!(i%FirmwareUpdateDelay)) // HAL_Delay(1); } return ret; } 8001da2: 4638 mov r0, r7 8001da4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001da8: 7923 ldrb r3, [r4, #4] Firmdata = ((data[(bluecell_length + 1) + i]) & 0x00FF); 8001daa: 78e2 ldrb r2, [r4, #3] if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001dac: 6831 ldr r1, [r6, #0] Firmdata += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00); 8001dae: eb02 2203 add.w r2, r2, r3, lsl #8 if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address , (uint16_t)Firmdata) != HAL_OK){ 8001db2: b292 uxth r2, r2 8001db4: 2300 movs r3, #0 8001db6: 2001 movs r0, #1 8001db8: f7fe fd26 bl 8000808 8001dbc: b118 cbz r0, 8001dc6 printf("HAL NOT OK \n"); 8001dbe: 4640 mov r0, r8 8001dc0: f000 fc18 bl 80025f4 ret = 1; 8001dc4: 2701 movs r7, #1 Address += 2; 8001dc6: 6833 ldr r3, [r6, #0] 8001dc8: 3402 adds r4, #2 8001dca: 3302 adds r3, #2 8001dcc: 6033 str r3, [r6, #0] 8001dce: e7e3 b.n 8001d98 8001dd0: 20000214 .word 0x20000214 8001dd4: 080035a8 .word 0x080035a8 08001dd8 : return ret; } #endif // PYJ.2020.05.20_END -- uint8_t Flash_write(uint8_t* data) // ?占쏙옙湲고븿?占쏙옙 { 8001dd8: b538 push {r3, r4, r5, lr} /*Variable used for Erase procedure*/ static FLASH_EraseInitTypeDef EraseInitStruct; static uint32_t PAGEError = 0; uint8_t ret = 0; /* Fill EraseInit structure*/ EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001dda: 2300 movs r3, #0 8001ddc: 4c0e ldr r4, [pc, #56] ; (8001e18 ) { 8001dde: 4605 mov r5, r0 EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; 8001de0: 6023 str r3, [r4, #0] EraseInitStruct.PageAddress = FLASH_USER_START_ADDR; 8001de2: 4b0e ldr r3, [pc, #56] ; (8001e1c ) 8001de4: 60a3 str r3, [r4, #8] EraseInitStruct.NbPages = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE; 8001de6: 231f movs r3, #31 8001de8: 60e3 str r3, [r4, #12] // __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙 HAL_FLASH_Unlock(); // lock ??占�? 8001dea: f7fe fcc7 bl 800077c if(flashinit == 0){ 8001dee: 4b0c ldr r3, [pc, #48] ; (8001e20 ) 8001df0: 781a ldrb r2, [r3, #0] 8001df2: b94a cbnz r2, 8001e08 flashinit= 1; 8001df4: 2201 movs r2, #1 //FLASH_PageErase(StartAddr); if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001df6: 490b ldr r1, [pc, #44] ; (8001e24 ) 8001df8: 4620 mov r0, r4 flashinit= 1; 8001dfa: 701a strb r2, [r3, #0] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){ 8001dfc: f7fe fd6e bl 80008dc 8001e00: b110 cbz r0, 8001e08 printf("Erase Failed \r\n"); 8001e02: 4809 ldr r0, [pc, #36] ; (8001e28 ) 8001e04: f000 fbf6 bl 80025f4 } } // FLASH_If_Erase(); ret = Flash_RGB_Data_Write(&data[bluecell_stx]); 8001e08: 4628 mov r0, r5 8001e0a: f7ff ffbd bl 8001d88 8001e0e: 4604 mov r4, r0 // ret = Flash_DataTest_Write(&data[bluecell_stx]); HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린 8001e10: f7fe fcc6 bl 80007a0 // __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙 return ret; } 8001e14: 4620 mov r0, r4 8001e16: bd38 pop {r3, r4, r5, pc} 8001e18: 200002a4 .word 0x200002a4 8001e1c: 08005000 .word 0x08005000 8001e20: 200002b8 .word 0x200002b8 8001e24: 200002b4 .word 0x200002b4 8001e28: 080035b4 .word 0x080035b4 08001e2c : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { if(htim->Instance == TIM6){ 8001e2c: 6802 ldr r2, [r0, #0] 8001e2e: 4b08 ldr r3, [pc, #32] ; (8001e50 ) 8001e30: 429a cmp r2, r3 8001e32: d10b bne.n 8001e4c UartTimerCnt++; 8001e34: 4a07 ldr r2, [pc, #28] ; (8001e54 ) 8001e36: 6813 ldr r3, [r2, #0] 8001e38: 3301 adds r3, #1 8001e3a: 6013 str r3, [r2, #0] LedTimerCnt++; 8001e3c: 4a06 ldr r2, [pc, #24] ; (8001e58 ) 8001e3e: 6813 ldr r3, [r2, #0] 8001e40: 3301 adds r3, #1 8001e42: 6013 str r3, [r2, #0] FirmwareTimerCnt++; 8001e44: 4a05 ldr r2, [pc, #20] ; (8001e5c ) 8001e46: 6813 ldr r3, [r2, #0] 8001e48: 3301 adds r3, #1 8001e4a: 6013 str r3, [r2, #0] 8001e4c: 4770 bx lr 8001e4e: bf00 nop 8001e50: 40001000 .word 0x40001000 8001e54: 200002c4 .word 0x200002c4 8001e58: 200002c0 .word 0x200002c0 8001e5c: 200002bc .word 0x200002bc 08001e60 <_write>: } } int _write (int file, uint8_t *ptr, uint16_t len) { 8001e60: b510 push {r4, lr} 8001e62: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8001e64: 230a movs r3, #10 8001e66: 4802 ldr r0, [pc, #8] ; (8001e70 <_write+0x10>) 8001e68: f7ff fbd4 bl 8001614 return len; } 8001e6c: 4620 mov r0, r4 8001e6e: bd10 pop {r4, pc} 8001e70: 200003dc .word 0x200003dc 08001e74 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001e74: b510 push {r4, lr} 8001e76: b090 sub sp, #64 ; 0x40 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001e78: 2228 movs r2, #40 ; 0x28 8001e7a: 2100 movs r1, #0 8001e7c: a806 add r0, sp, #24 8001e7e: f000 fb3d bl 80024fc RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001e82: 2214 movs r2, #20 8001e84: 2100 movs r1, #0 8001e86: a801 add r0, sp, #4 8001e88: f000 fb38 bl 80024fc /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001e8c: 2301 movs r3, #1 8001e8e: 930a str r3, [sp, #40] ; 0x28 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001e90: 2310 movs r3, #16 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001e92: 2402 movs r4, #2 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001e94: 930b str r3, [sp, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 8001e96: f44f 1340 mov.w r3, #3145728 ; 0x300000 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001e9a: a806 add r0, sp, #24 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14; 8001e9c: 930f str r3, [sp, #60] ; 0x3c RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8001e9e: 9406 str r4, [sp, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001ea0: 940d str r4, [sp, #52] ; 0x34 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001ea2: f7fe fedf bl 8000c64 { Error_Handler(); } /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001ea6: 230f movs r3, #15 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001ea8: f44f 6280 mov.w r2, #1024 ; 0x400 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001eac: 9301 str r3, [sp, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001eae: 2300 movs r3, #0 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001eb0: 4621 mov r1, r4 8001eb2: a801 add r0, sp, #4 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001eb4: 9402 str r4, [sp, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001eb6: 9303 str r3, [sp, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001eb8: 9204 str r2, [sp, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001eba: 9305 str r3, [sp, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001ebc: f7ff f89a bl 8000ff4 { Error_Handler(); } } 8001ec0: b010 add sp, #64 ; 0x40 8001ec2: bd10 pop {r4, pc} 08001ec4
: { 8001ec4: b580 push {r7, lr} 8001ec6: b088 sub sp, #32 HAL_Init(); 8001ec8: f7fe f9dc bl 8000284 SystemClock_Config(); 8001ecc: f7ff ffd2 bl 8001e74 * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001ed0: 2210 movs r2, #16 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8001ed2: 4d5c ldr r5, [pc, #368] ; (8002044 ) GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001ed4: 2100 movs r1, #0 8001ed6: eb0d 0002 add.w r0, sp, r2 8001eda: f000 fb0f bl 80024fc __HAL_RCC_GPIOC_CLK_ENABLE(); 8001ede: 69ab ldr r3, [r5, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001ee0: 2200 movs r2, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8001ee2: f043 0310 orr.w r3, r3, #16 8001ee6: 61ab str r3, [r5, #24] 8001ee8: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001eea: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOC_CLK_ENABLE(); 8001eee: f003 0310 and.w r3, r3, #16 8001ef2: 9301 str r3, [sp, #4] 8001ef4: 9b01 ldr r3, [sp, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001ef6: 69ab ldr r3, [r5, #24] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001ef8: 4853 ldr r0, [pc, #332] ; (8002048 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 8001efa: f043 0308 orr.w r3, r3, #8 8001efe: 61ab str r3, [r5, #24] 8001f00: 69ab ldr r3, [r5, #24] /*Configure GPIO pin : BOOT_LED_Pin */ GPIO_InitStruct.Pin = BOOT_LED_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8001f02: 2400 movs r4, #0 __HAL_RCC_GPIOB_CLK_ENABLE(); 8001f04: f003 0308 and.w r3, r3, #8 8001f08: 9302 str r3, [sp, #8] 8001f0a: 9b02 ldr r3, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001f0c: 69ab ldr r3, [r5, #24] if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin);LedTimerCnt = 0;} 8001f0e: 4e4e ldr r6, [pc, #312] ; (8002048 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 8001f10: f043 0304 orr.w r3, r3, #4 8001f14: 61ab str r3, [r5, #24] 8001f16: 69ab ldr r3, [r5, #24] 8001f18: f003 0304 and.w r3, r3, #4 8001f1c: 9303 str r3, [sp, #12] 8001f1e: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET); 8001f20: f7fe fe16 bl 8000b50 GPIO_InitStruct.Pin = BOOT_LED_Pin; 8001f24: f44f 4300 mov.w r3, #32768 ; 0x8000 8001f28: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001f2a: 2301 movs r3, #1 8001f2c: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001f2e: 2302 movs r3, #2 HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8001f30: a904 add r1, sp, #16 8001f32: 4845 ldr r0, [pc, #276] ; (8002048 ) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001f34: 9307 str r3, [sp, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001f36: 9406 str r4, [sp, #24] HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct); 8001f38: f7fe fd1e bl 8000978 __HAL_RCC_DMA1_CLK_ENABLE(); 8001f3c: 696b ldr r3, [r5, #20] huart1.Instance = USART1; 8001f3e: 4843 ldr r0, [pc, #268] ; (800204c ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001f40: f043 0301 orr.w r3, r3, #1 8001f44: 616b str r3, [r5, #20] 8001f46: 696b ldr r3, [r5, #20] huart1.Init.BaudRate = 115200; 8001f48: 4a41 ldr r2, [pc, #260] ; (8002050 ) __HAL_RCC_DMA1_CLK_ENABLE(); 8001f4a: f003 0301 and.w r3, r3, #1 8001f4e: 9300 str r3, [sp, #0] 8001f50: 9b00 ldr r3, [sp, #0] huart1.Init.BaudRate = 115200; 8001f52: f44f 33e1 mov.w r3, #115200 ; 0x1c200 8001f56: e880 000c stmia.w r0, {r2, r3} huart1.Init.Mode = UART_MODE_TX_RX; 8001f5a: 230c movs r3, #12 huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001f5c: 6084 str r4, [r0, #8] huart1.Init.Mode = UART_MODE_TX_RX; 8001f5e: 6143 str r3, [r0, #20] huart1.Init.StopBits = UART_STOPBITS_1; 8001f60: 60c4 str r4, [r0, #12] huart1.Init.Parity = UART_PARITY_NONE; 8001f62: 6104 str r4, [r0, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001f64: 6184 str r4, [r0, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001f66: 61c4 str r4, [r0, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8001f68: f7ff fb26 bl 80015b8 hi2c2.Instance = I2C2; 8001f6c: 4839 ldr r0, [pc, #228] ; (8002054 ) hi2c2.Init.ClockSpeed = 400000; 8001f6e: 493a ldr r1, [pc, #232] ; (8002058 ) 8001f70: 4b3a ldr r3, [pc, #232] ; (800205c ) hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 8001f72: 6084 str r4, [r0, #8] hi2c2.Init.ClockSpeed = 400000; 8001f74: e880 000a stmia.w r0, {r1, r3} hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8001f78: f44f 4380 mov.w r3, #16384 ; 0x4000 hi2c2.Init.OwnAddress1 = 0; 8001f7c: 60c4 str r4, [r0, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8001f7e: 6103 str r3, [r0, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8001f80: 6144 str r4, [r0, #20] hi2c2.Init.OwnAddress2 = 0; 8001f82: 6184 str r4, [r0, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8001f84: 61c4 str r4, [r0, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8001f86: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8001f88: f7fe fdec bl 8000b64 htim6.Init.Prescaler = 5600 - 1; 8001f8c: f241 53df movw r3, #5599 ; 0x15df htim6.Instance = TIM6; 8001f90: 4d33 ldr r5, [pc, #204] ; (8002060 ) htim6.Init.Prescaler = 5600 - 1; 8001f92: 4834 ldr r0, [pc, #208] ; (8002064 ) htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8001f94: 60ac str r4, [r5, #8] htim6.Init.Prescaler = 5600 - 1; 8001f96: e885 0009 stmia.w r5, {r0, r3} htim6.Init.Period = 10 - 1; 8001f9a: 2309 movs r3, #9 if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001f9c: 4628 mov r0, r5 htim6.Init.Period = 10 - 1; 8001f9e: 60eb str r3, [r5, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001fa0: 61ac str r4, [r5, #24] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8001fa2: 9404 str r4, [sp, #16] 8001fa4: 9405 str r4, [sp, #20] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001fa6: f7ff f9f5 bl 8001394 if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001faa: a904 add r1, sp, #16 8001fac: 4628 mov r0, r5 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001fae: 9404 str r4, [sp, #16] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001fb0: 9405 str r4, [sp, #20] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 8001fb2: f7ff fa09 bl 80013c8 HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0); 8001fb6: 4622 mov r2, r4 8001fb8: 4621 mov r1, r4 8001fba: 200f movs r0, #15 8001fbc: f7fe f998 bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn); 8001fc0: 200f movs r0, #15 8001fc2: f7fe f9c9 bl 8000358 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8001fc6: 4622 mov r2, r4 8001fc8: 4621 mov r1, r4 8001fca: 2025 movs r0, #37 ; 0x25 8001fcc: f7fe f990 bl 80002f0 HAL_NVIC_EnableIRQ(USART1_IRQn); 8001fd0: 2025 movs r0, #37 ; 0x25 8001fd2: f7fe f9c1 bl 8000358 HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 8001fd6: 4622 mov r2, r4 8001fd8: 4621 mov r1, r4 8001fda: 2036 movs r0, #54 ; 0x36 8001fdc: f7fe f988 bl 80002f0 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001fe0: 2036 movs r0, #54 ; 0x36 8001fe2: f7fe f9b9 bl 8000358 HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0); 8001fe6: 4622 mov r2, r4 8001fe8: 4621 mov r1, r4 8001fea: 200e movs r0, #14 8001fec: f7fe f980 bl 80002f0 HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); 8001ff0: 200e movs r0, #14 8001ff2: f7fe f9b1 bl 8000358 HAL_TIM_Base_Start_IT(&htim6); 8001ff6: 4628 mov r0, r5 8001ff8: f7ff f8ce bl 8001198 setbuf(stdout, NULL); 8001ffc: 4b1a ldr r3, [pc, #104] ; (8002068 ) 8001ffe: 4621 mov r1, r4 8002000: 681b ldr r3, [r3, #0] while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 8002002: 4d1a ldr r5, [pc, #104] ; (800206c ) setbuf(stdout, NULL); 8002004: 6898 ldr r0, [r3, #8] 8002006: f000 fafd bl 8002604 Firmware_BootStart_Signal(); 800200a: f7ff fcd9 bl 80019c0 InitUartQueue(&TerminalQueue); 800200e: 4818 ldr r0, [pc, #96] ; (8002070 ) 8002010: f000 f984 bl 800231c if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin);LedTimerCnt = 0;} 8002014: 4c17 ldr r4, [pc, #92] ; (8002074 ) 8002016: 6823 ldr r3, [r4, #0] 8002018: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 800201c: d906 bls.n 800202c 800201e: f44f 4100 mov.w r1, #32768 ; 0x8000 8002022: 4630 mov r0, r6 8002024: f7fe fd99 bl 8000b5a 8002028: 2300 movs r3, #0 800202a: 6023 str r3, [r4, #0] while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal); 800202c: 4c10 ldr r4, [pc, #64] ; (8002070 ) 800202e: 4f07 ldr r7, [pc, #28] ; (800204c ) 8002030: 68a3 ldr r3, [r4, #8] 8002032: 2b00 cmp r3, #0 8002034: ddee ble.n 8002014 8002036: 682b ldr r3, [r5, #0] 8002038: 2b1e cmp r3, #30 800203a: d9eb bls.n 8002014 800203c: 4638 mov r0, r7 800203e: f000 f97b bl 8002338 8002042: e7f5 b.n 8002030 8002044: 40021000 .word 0x40021000 8002048: 40011000 .word 0x40011000 800204c: 200003dc .word 0x200003dc 8002050: 40013800 .word 0x40013800 8002054: 20000300 .word 0x20000300 8002058: 40005800 .word 0x40005800 800205c: 00061a80 .word 0x00061a80 8002060: 2000041c .word 0x2000041c 8002064: 40001000 .word 0x40001000 8002068: 2000021c .word 0x2000021c 800206c: 200002c4 .word 0x200002c4 8002070: 2000045c .word 0x2000045c 8002074: 200002c0 .word 0x200002c0 08002078 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8002078: 4770 bx lr ... 0800207c : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800207c: 4b0e ldr r3, [pc, #56] ; (80020b8 ) { 800207e: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8002080: 699a ldr r2, [r3, #24] 8002082: f042 0201 orr.w r2, r2, #1 8002086: 619a str r2, [r3, #24] 8002088: 699a ldr r2, [r3, #24] 800208a: f002 0201 and.w r2, r2, #1 800208e: 9200 str r2, [sp, #0] 8002090: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8002092: 69da ldr r2, [r3, #28] 8002094: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8002098: 61da str r2, [r3, #28] 800209a: 69db ldr r3, [r3, #28] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800209c: 4a07 ldr r2, [pc, #28] ; (80020bc ) __HAL_RCC_PWR_CLK_ENABLE(); 800209e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80020a2: 9301 str r3, [sp, #4] 80020a4: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80020a6: 6853 ldr r3, [r2, #4] 80020a8: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80020ac: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 80020b0: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80020b2: b002 add sp, #8 80020b4: 4770 bx lr 80020b6: bf00 nop 80020b8: 40021000 .word 0x40021000 80020bc: 40010000 .word 0x40010000 080020c0 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 80020c0: b510 push {r4, lr} 80020c2: 4604 mov r4, r0 80020c4: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80020c6: 2210 movs r2, #16 80020c8: 2100 movs r1, #0 80020ca: a802 add r0, sp, #8 80020cc: f000 fa16 bl 80024fc if(hi2c->Instance==I2C2) 80020d0: 6822 ldr r2, [r4, #0] 80020d2: 4b11 ldr r3, [pc, #68] ; (8002118 ) 80020d4: 429a cmp r2, r3 80020d6: d11d bne.n 8002114 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 80020d8: 4c10 ldr r4, [pc, #64] ; (800211c ) PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = EEPROM_SCL_Pin|EEPROM_SDA_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80020da: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 80020dc: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80020de: 4810 ldr r0, [pc, #64] ; (8002120 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 80020e0: f043 0308 orr.w r3, r3, #8 80020e4: 61a3 str r3, [r4, #24] 80020e6: 69a3 ldr r3, [r4, #24] 80020e8: f003 0308 and.w r3, r3, #8 80020ec: 9300 str r3, [sp, #0] 80020ee: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = EEPROM_SCL_Pin|EEPROM_SDA_Pin; 80020f0: f44f 6340 mov.w r3, #3072 ; 0xc00 80020f4: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 80020f6: 2312 movs r3, #18 80020f8: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80020fa: 2303 movs r3, #3 80020fc: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80020fe: f7fe fc3b bl 8000978 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 8002102: 69e3 ldr r3, [r4, #28] 8002104: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 8002108: 61e3 str r3, [r4, #28] 800210a: 69e3 ldr r3, [r4, #28] 800210c: f403 0380 and.w r3, r3, #4194304 ; 0x400000 8002110: 9301 str r3, [sp, #4] 8002112: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 8002114: b006 add sp, #24 8002116: bd10 pop {r4, pc} 8002118: 40005800 .word 0x40005800 800211c: 40021000 .word 0x40021000 8002120: 40010c00 .word 0x40010c00 08002124 : * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM6) 8002124: 6802 ldr r2, [r0, #0] 8002126: 4b08 ldr r3, [pc, #32] ; (8002148 ) { 8002128: b082 sub sp, #8 if(htim_base->Instance==TIM6) 800212a: 429a cmp r2, r3 800212c: d10a bne.n 8002144 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 800212e: f503 3300 add.w r3, r3, #131072 ; 0x20000 8002132: 69da ldr r2, [r3, #28] 8002134: f042 0210 orr.w r2, r2, #16 8002138: 61da str r2, [r3, #28] 800213a: 69db ldr r3, [r3, #28] 800213c: f003 0310 and.w r3, r3, #16 8002140: 9301 str r3, [sp, #4] 8002142: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8002144: b002 add sp, #8 8002146: 4770 bx lr 8002148: 40001000 .word 0x40001000 0800214c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 800214c: b570 push {r4, r5, r6, lr} 800214e: 4606 mov r6, r0 8002150: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002152: 2210 movs r2, #16 8002154: 2100 movs r1, #0 8002156: a802 add r0, sp, #8 8002158: f000 f9d0 bl 80024fc if(huart->Instance==USART1) 800215c: 6832 ldr r2, [r6, #0] 800215e: 4b2b ldr r3, [pc, #172] ; (800220c ) 8002160: 429a cmp r2, r3 8002162: d151 bne.n 8002208 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8002164: f503 4358 add.w r3, r3, #55296 ; 0xd800 8002168: 699a ldr r2, [r3, #24] PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800216a: a902 add r1, sp, #8 __HAL_RCC_USART1_CLK_ENABLE(); 800216c: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8002170: 619a str r2, [r3, #24] 8002172: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002174: 4826 ldr r0, [pc, #152] ; (8002210 ) __HAL_RCC_USART1_CLK_ENABLE(); 8002176: f402 4280 and.w r2, r2, #16384 ; 0x4000 800217a: 9200 str r2, [sp, #0] 800217c: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 800217e: 699a ldr r2, [r3, #24] GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8002180: 2500 movs r5, #0 __HAL_RCC_GPIOA_CLK_ENABLE(); 8002182: f042 0204 orr.w r2, r2, #4 8002186: 619a str r2, [r3, #24] 8002188: 699b ldr r3, [r3, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USART1 DMA Init */ /* USART1_RX Init */ hdma_usart1_rx.Instance = DMA1_Channel5; 800218a: 4c22 ldr r4, [pc, #136] ; (8002214 ) __HAL_RCC_GPIOA_CLK_ENABLE(); 800218c: f003 0304 and.w r3, r3, #4 8002190: 9301 str r3, [sp, #4] 8002192: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8002194: f44f 7300 mov.w r3, #512 ; 0x200 8002198: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800219a: 2302 movs r3, #2 800219c: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800219e: 2303 movs r3, #3 80021a0: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80021a2: f7fe fbe9 bl 8000978 GPIO_InitStruct.Pin = GPIO_PIN_10; 80021a6: f44f 6380 mov.w r3, #1024 ; 0x400 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80021aa: 4819 ldr r0, [pc, #100] ; (8002210 ) 80021ac: a902 add r1, sp, #8 GPIO_InitStruct.Pin = GPIO_PIN_10; 80021ae: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80021b0: 9503 str r5, [sp, #12] GPIO_InitStruct.Pull = GPIO_NOPULL; 80021b2: 9504 str r5, [sp, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80021b4: f7fe fbe0 bl 8000978 hdma_usart1_rx.Instance = DMA1_Channel5; 80021b8: 4b17 ldr r3, [pc, #92] ; (8002218 ) hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_rx.Init.Mode = DMA_NORMAL; hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80021ba: 4620 mov r0, r4 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; 80021bc: e884 0028 stmia.w r4, {r3, r5} hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80021c0: 2380 movs r3, #128 ; 0x80 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; 80021c2: 60a5 str r5, [r4, #8] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; 80021c4: 60e3 str r3, [r4, #12] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80021c6: 6125 str r5, [r4, #16] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80021c8: 6165 str r5, [r4, #20] hdma_usart1_rx.Init.Mode = DMA_NORMAL; 80021ca: 61a5 str r5, [r4, #24] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; 80021cc: 61e5 str r5, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) 80021ce: f7fe f8e5 bl 800039c 80021d2: b108 cbz r0, 80021d8 { Error_Handler(); 80021d4: f7ff ff50 bl 8002078 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); /* USART1_TX Init */ hdma_usart1_tx.Instance = DMA1_Channel4; hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80021d8: f04f 0c10 mov.w ip, #16 80021dc: 4b0f ldr r3, [pc, #60] ; (800221c ) __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); 80021de: 6374 str r4, [r6, #52] ; 0x34 80021e0: 6266 str r6, [r4, #36] ; 0x24 hdma_usart1_tx.Instance = DMA1_Channel4; 80021e2: 4c0f ldr r4, [pc, #60] ; (8002220 ) hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80021e4: 2280 movs r2, #128 ; 0x80 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; 80021e6: e884 1008 stmia.w r4, {r3, ip} hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 80021ea: 2300 movs r3, #0 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart1_tx.Init.Mode = DMA_NORMAL; hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80021ec: 4620 mov r0, r4 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; 80021ee: 60a3 str r3, [r4, #8] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; 80021f0: 60e2 str r2, [r4, #12] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; 80021f2: 6123 str r3, [r4, #16] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; 80021f4: 6163 str r3, [r4, #20] hdma_usart1_tx.Init.Mode = DMA_NORMAL; 80021f6: 61a3 str r3, [r4, #24] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; 80021f8: 61e3 str r3, [r4, #28] if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) 80021fa: f7fe f8cf bl 800039c 80021fe: b108 cbz r0, 8002204 { Error_Handler(); 8002200: f7ff ff3a bl 8002078 } __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx); 8002204: 6334 str r4, [r6, #48] ; 0x30 8002206: 6266 str r6, [r4, #36] ; 0x24 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8002208: b006 add sp, #24 800220a: bd70 pop {r4, r5, r6, pc} 800220c: 40013800 .word 0x40013800 8002210: 40010800 .word 0x40010800 8002214: 20000398 .word 0x20000398 8002218: 40020058 .word 0x40020058 800221c: 40020044 .word 0x40020044 8002220: 20000354 .word 0x20000354 08002224 : 8002224: 4770 bx lr 08002226 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8002226: e7fe b.n 8002226 08002228 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8002228: e7fe b.n 8002228 0800222a : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800222a: e7fe b.n 800222a 0800222c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 800222c: e7fe b.n 800222c 0800222e : 800222e: 4770 bx lr 08002230 : 8002230: 4770 bx lr 08002232 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8002232: 4770 bx lr 08002234 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8002234: f7fe b838 b.w 80002a8 08002238 : void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ /* USER CODE END DMA1_Channel4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); 8002238: 4801 ldr r0, [pc, #4] ; (8002240 ) 800223a: f7fe b99b b.w 8000574 800223e: bf00 nop 8002240: 20000354 .word 0x20000354 08002244 : void DMA1_Channel5_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ /* USER CODE END DMA1_Channel5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); 8002244: 4801 ldr r0, [pc, #4] ; (800224c ) 8002246: f7fe b995 b.w 8000574 800224a: bf00 nop 800224c: 20000398 .word 0x20000398 08002250 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8002250: 4801 ldr r0, [pc, #4] ; (8002258 ) 8002252: f7ff bb0d b.w 8001870 8002256: bf00 nop 8002258: 200003dc .word 0x200003dc 0800225c : void TIM6_IRQHandler(void) { /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 800225c: 4801 ldr r0, [pc, #4] ; (8002264 ) 800225e: f7fe bfaa b.w 80011b6 8002262: bf00 nop 8002264: 2000041c .word 0x2000041c 08002268 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8002268: b570 push {r4, r5, r6, lr} 800226a: 460e mov r6, r1 800226c: 4615 mov r5, r2 int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800226e: 460c mov r4, r1 8002270: 1ba3 subs r3, r4, r6 8002272: 429d cmp r5, r3 8002274: dc01 bgt.n 800227a <_read+0x12> { *ptr++ = __io_getchar(); } return len; } 8002276: 4628 mov r0, r5 8002278: bd70 pop {r4, r5, r6, pc} *ptr++ = __io_getchar(); 800227a: f3af 8000 nop.w 800227e: f804 0b01 strb.w r0, [r4], #1 8002282: e7f5 b.n 8002270 <_read+0x8> 08002284 <_sbrk>: } return len; } caddr_t _sbrk(int incr) { 8002284: b508 push {r3, lr} extern char end asm("end"); static char *heap_end; char *prev_heap_end; if (heap_end == 0) 8002286: 4b0a ldr r3, [pc, #40] ; (80022b0 <_sbrk+0x2c>) { 8002288: 4602 mov r2, r0 if (heap_end == 0) 800228a: 6819 ldr r1, [r3, #0] 800228c: b909 cbnz r1, 8002292 <_sbrk+0xe> heap_end = &end; 800228e: 4909 ldr r1, [pc, #36] ; (80022b4 <_sbrk+0x30>) 8002290: 6019 str r1, [r3, #0] prev_heap_end = heap_end; if (heap_end + incr > stack_ptr) 8002292: 4669 mov r1, sp prev_heap_end = heap_end; 8002294: 6818 ldr r0, [r3, #0] if (heap_end + incr > stack_ptr) 8002296: 4402 add r2, r0 8002298: 428a cmp r2, r1 800229a: d906 bls.n 80022aa <_sbrk+0x26> { // write(1, "Heap and stack collision\n", 25); // abort(); errno = ENOMEM; 800229c: f000 f904 bl 80024a8 <__errno> 80022a0: 230c movs r3, #12 80022a2: 6003 str r3, [r0, #0] return (caddr_t) -1; 80022a4: f04f 30ff mov.w r0, #4294967295 80022a8: bd08 pop {r3, pc} } heap_end += incr; 80022aa: 601a str r2, [r3, #0] return (caddr_t) prev_heap_end; } 80022ac: bd08 pop {r3, pc} 80022ae: bf00 nop 80022b0: 200002c8 .word 0x200002c8 80022b4: 2000115c .word 0x2000115c 080022b8 <_close>: int _close(int file) { return -1; } 80022b8: f04f 30ff mov.w r0, #4294967295 80022bc: 4770 bx lr 080022be <_fstat>: int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR; 80022be: f44f 5300 mov.w r3, #8192 ; 0x2000 return 0; } 80022c2: 2000 movs r0, #0 st->st_mode = S_IFCHR; 80022c4: 604b str r3, [r1, #4] } 80022c6: 4770 bx lr 080022c8 <_isatty>: int _isatty(int file) { return 1; } 80022c8: 2001 movs r0, #1 80022ca: 4770 bx lr 080022cc <_lseek>: int _lseek(int file, int ptr, int dir) { return 0; } 80022cc: 2000 movs r0, #0 80022ce: 4770 bx lr 080022d0 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 80022d0: 4b0f ldr r3, [pc, #60] ; (8002310 ) 80022d2: 681a ldr r2, [r3, #0] 80022d4: f042 0201 orr.w r2, r2, #1 80022d8: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 80022da: 6859 ldr r1, [r3, #4] 80022dc: 4a0d ldr r2, [pc, #52] ; (8002314 ) 80022de: 400a ands r2, r1 80022e0: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 80022e2: 681a ldr r2, [r3, #0] 80022e4: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 80022e8: f422 3280 bic.w r2, r2, #65536 ; 0x10000 80022ec: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 80022ee: 681a ldr r2, [r3, #0] 80022f0: f422 2280 bic.w r2, r2, #262144 ; 0x40000 80022f4: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 80022f6: 685a ldr r2, [r3, #4] 80022f8: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 80022fc: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 80022fe: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8002302: 609a str r2, [r3, #8] #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 8002304: f04f 6200 mov.w r2, #134217728 ; 0x8000000 8002308: 4b03 ldr r3, [pc, #12] ; (8002318 ) 800230a: 609a str r2, [r3, #8] 800230c: 4770 bx lr 800230e: bf00 nop 8002310: 40021000 .word 0x40021000 8002314: f8ff0000 .word 0xf8ff0000 8002318: e000ed00 .word 0xe000ed00 0800231c : UARTQUEUE TerminalQueue; UARTQUEUE WifiQueue; void InitUartQueue(pUARTQUEUE pQueue) { pQueue->data = pQueue->head = pQueue->tail = 0; 800231c: 2300 movs r3, #0 if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 800231e: 2201 movs r2, #1 pQueue->data = pQueue->head = pQueue->tail = 0; 8002320: 6043 str r3, [r0, #4] 8002322: 6003 str r3, [r0, #0] 8002324: 6083 str r3, [r0, #8] if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK) 8002326: 4902 ldr r1, [pc, #8] ; (8002330 ) 8002328: 4802 ldr r0, [pc, #8] ; (8002334 ) 800232a: f7ff b9cf b.w 80016cc 800232e: bf00 nop 8002330: 20000468 .word 0x20000468 8002334: 200003dc .word 0x200003dc 08002338 : pUARTQUEUE pQueue = &TerminalQueue; // if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK) // { // _Error_Handler(__FILE__, __LINE__); // } update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8002338: 4a29 ldr r2, [pc, #164] ; (80023e0 ) { 800233a: b570 push {r4, r5, r6, lr} update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 800233c: 6810 ldr r0, [r2, #0] 800233e: 4c29 ldr r4, [pc, #164] ; (80023e4 ) 8002340: 1c43 adds r3, r0, #1 8002342: 6013 str r3, [r2, #0] 8002344: 4b28 ldr r3, [pc, #160] ; (80023e8 ) 8002346: 6859 ldr r1, [r3, #4] 8002348: f103 050c add.w r5, r3, #12 800234c: 5d4d ldrb r5, [r1, r5] pQueue->tail++; 800234e: 3101 adds r1, #1 update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 8002350: 5425 strb r5, [r4, r0] if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 8002352: f240 404b movw r0, #1099 ; 0x44b 8002356: 4281 cmp r1, r0 8002358: bfc8 it gt 800235a: 2100 movgt r1, #0 pQueue->data--; 800235c: 689d ldr r5, [r3, #8] if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0; 800235e: 6059 str r1, [r3, #4] pQueue->data--; 8002360: 3d01 subs r5, #1 8002362: 609d str r5, [r3, #8] if(pQueue->data == 0){ 8002364: b97d cbnz r5, 8002386 for(int i = 0; i < 128; i++){ printf("%02x",update_data_buf[i]); } #endif // PYJ.2019.07.15_END -- cnt = 0; if(update_data_buf[0] == 0xbe){ 8002366: 7823 ldrb r3, [r4, #0] cnt = 0; 8002368: 6015 str r5, [r2, #0] if(update_data_buf[0] == 0xbe){ 800236a: 2bbe cmp r3, #190 ; 0xbe 800236c: d10c bne.n 8002388 FirmwareUpdateStart(&update_data_buf[0]); 800236e: 481d ldr r0, [pc, #116] ; (80023e4 ) 8002370: f7ff fb38 bl 80019e4 else{ printf("CHECK SUM ERR %x \r\n",update_data_buf[MBIC_CHECKSHUM_INDEX]); } } for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) update_data_buf[i] = 0; 8002374: 2300 movs r3, #0 for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) 8002376: f240 424c movw r2, #1100 ; 0x44c update_data_buf[i] = 0; 800237a: 5563 strb r3, [r4, r5] for(int i = 0; i < QUEUE_BUFFER_LENGTH; i++) 800237c: 3501 adds r5, #1 800237e: 4295 cmp r5, r2 8002380: d1fb bne.n 800237a FirmwareTimerCnt = 0; 8002382: 4a1a ldr r2, [pc, #104] ; (80023ec ) 8002384: 6013 str r3, [r2, #0] 8002386: bd70 pop {r4, r5, r6, pc} else if(update_data_buf[0] == MBIC_PREAMBLE0 8002388: 2b16 cmp r3, #22 800238a: d1f3 bne.n 8002374 &&update_data_buf[1] == MBIC_PREAMBLE1 800238c: 7863 ldrb r3, [r4, #1] 800238e: 2b16 cmp r3, #22 8002390: d1f0 bne.n 8002374 &&update_data_buf[2] == MBIC_PREAMBLE2 8002392: 78a3 ldrb r3, [r4, #2] 8002394: 2b16 cmp r3, #22 8002396: d1ed bne.n 8002374 &&update_data_buf[3] == MBIC_PREAMBLE3){ 8002398: 78e3 ldrb r3, [r4, #3] 800239a: 2b16 cmp r3, #22 800239c: d1ea bne.n 8002374 if(Chksum_Check(update_data_buf,MBIC_HEADER_SIZE - 4,update_data_buf[MBIC_CHECKSHUM_INDEX])){ 800239e: 7d62 ldrb r2, [r4, #21] 80023a0: 2112 movs r1, #18 80023a2: 4810 ldr r0, [pc, #64] ; (80023e4 ) 80023a4: f7ff fb70 bl 8001a88 80023a8: b1b0 cbz r0, 80023d8 Length = ((update_data_buf[MBIC_LENGTH_0] << 8) | update_data_buf[MBIC_LENGTH_1]); 80023aa: 7ce3 ldrb r3, [r4, #19] 80023ac: 7d21 ldrb r1, [r4, #20] if(CRC16_Check(&update_data_buf[MBIC_PAYLOADSTART], Length,CrcChk)){ 80023ae: 4810 ldr r0, [pc, #64] ; (80023f0 ) CrcChk = ((update_data_buf[MBIC_PAYLOADSTART + Length + 1] << 8) | (update_data_buf[MBIC_PAYLOADSTART + Length + 2])); 80023b0: ea41 2103 orr.w r1, r1, r3, lsl #8 80023b4: 1863 adds r3, r4, r1 80023b6: 7dda ldrb r2, [r3, #23] 80023b8: 7e1e ldrb r6, [r3, #24] 80023ba: ea46 2602 orr.w r6, r6, r2, lsl #8 if(CRC16_Check(&update_data_buf[MBIC_PAYLOADSTART], Length,CrcChk)){ 80023be: 4632 mov r2, r6 80023c0: f7ff fba0 bl 8001b04 80023c4: b118 cbz r0, 80023ce MBIC_Bootloader_FirmwareUpdate(&update_data_buf[0]); 80023c6: 4807 ldr r0, [pc, #28] ; (80023e4 ) 80023c8: f7ff fc62 bl 8001c90 80023cc: e7d2 b.n 8002374 printf("CRC ERR %x \r\n",CrcChk); 80023ce: 4631 mov r1, r6 80023d0: 4808 ldr r0, [pc, #32] ; (80023f4 ) printf("CHECK SUM ERR %x \r\n",update_data_buf[MBIC_CHECKSHUM_INDEX]); 80023d2: f000 f89b bl 800250c 80023d6: e7cd b.n 8002374 80023d8: 7d61 ldrb r1, [r4, #21] 80023da: 4807 ldr r0, [pc, #28] ; (80023f8 ) 80023dc: e7f9 b.n 80023d2 80023de: bf00 nop 80023e0: 200002cc .word 0x200002cc 80023e4: 200008b4 .word 0x200008b4 80023e8: 2000045c .word 0x2000045c 80023ec: 200002bc .word 0x200002bc 80023f0: 200008ca .word 0x200008ca 80023f4: 080035db .word 0x080035db 80023f8: 080035e9 .word 0x080035e9 080023fc : UartTimerCnt = 0; 80023fc: 2200 movs r2, #0 80023fe: 4b0e ldr r3, [pc, #56] ; (8002438 ) { 8002400: b510 push {r4, lr} UartTimerCnt = 0; 8002402: 601a str r2, [r3, #0] if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0; 8002404: f240 424b movw r2, #1099 ; 0x44b pQueue->head++; 8002408: 4c0c ldr r4, [pc, #48] ; (800243c ) 800240a: 6823 ldr r3, [r4, #0] 800240c: 3301 adds r3, #1 800240e: 4293 cmp r3, r2 8002410: bfc8 it gt 8002412: 2300 movgt r3, #0 8002414: 6023 str r3, [r4, #0] pQueue->data++; 8002416: 68a3 ldr r3, [r4, #8] 8002418: 3301 adds r3, #1 if (pQueue->data >= QUEUE_BUFFER_LENGTH) 800241a: 4293 cmp r3, r2 pQueue->data++; 800241c: 60a3 str r3, [r4, #8] if (pQueue->data >= QUEUE_BUFFER_LENGTH) 800241e: dd01 ble.n 8002424 GetDataFromUartQueue(huart); 8002420: f7ff ff8a bl 8002338 HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 8002424: 6823 ldr r3, [r4, #0] 8002426: 4906 ldr r1, [pc, #24] ; (8002440 ) 8002428: 2201 movs r2, #1 } 800242a: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1); 800242e: 4419 add r1, r3 8002430: 4804 ldr r0, [pc, #16] ; (8002444 ) 8002432: f7ff b94b b.w 80016cc 8002436: bf00 nop 8002438: 200002c4 .word 0x200002c4 800243c: 2000045c .word 0x2000045c 8002440: 20000468 .word 0x20000468 8002444: 200003dc .word 0x200003dc 08002448 : } void Uart1_Data_Send(uint8_t* data,uint16_t size){ // printf("size : %d \r\n",size); HAL_UART_Transmit (&huart1, data, size, 0xFFFF); 8002448: 460a mov r2, r1 800244a: f64f 73ff movw r3, #65535 ; 0xffff 800244e: 4601 mov r1, r0 8002450: 4801 ldr r0, [pc, #4] ; (8002458 ) 8002452: f7ff b8df b.w 8001614 8002456: bf00 nop 8002458: 200003dc .word 0x200003dc 0800245c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 800245c: 2100 movs r1, #0 b LoopCopyDataInit 800245e: e003 b.n 8002468 08002460 : CopyDataInit: ldr r3, =_sidata 8002460: 4b0b ldr r3, [pc, #44] ; (8002490 ) ldr r3, [r3, r1] 8002462: 585b ldr r3, [r3, r1] str r3, [r0, r1] 8002464: 5043 str r3, [r0, r1] adds r1, r1, #4 8002466: 3104 adds r1, #4 08002468 : LoopCopyDataInit: ldr r0, =_sdata 8002468: 480a ldr r0, [pc, #40] ; (8002494 ) ldr r3, =_edata 800246a: 4b0b ldr r3, [pc, #44] ; (8002498 ) adds r2, r0, r1 800246c: 1842 adds r2, r0, r1 cmp r2, r3 800246e: 429a cmp r2, r3 bcc CopyDataInit 8002470: d3f6 bcc.n 8002460 ldr r2, =_sbss 8002472: 4a0a ldr r2, [pc, #40] ; (800249c ) b LoopFillZerobss 8002474: e002 b.n 800247c 08002476 : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 8002476: 2300 movs r3, #0 str r3, [r2], #4 8002478: f842 3b04 str.w r3, [r2], #4 0800247c : LoopFillZerobss: ldr r3, = _ebss 800247c: 4b08 ldr r3, [pc, #32] ; (80024a0 ) cmp r2, r3 800247e: 429a cmp r2, r3 bcc FillZerobss 8002480: d3f9 bcc.n 8002476 /* Call the clock system intitialization function.*/ bl SystemInit 8002482: f7ff ff25 bl 80022d0 /* Call static constructors */ bl __libc_init_array 8002486: f000 f815 bl 80024b4 <__libc_init_array> /* Call the application's entry point.*/ bl main 800248a: f7ff fd1b bl 8001ec4
bx lr 800248e: 4770 bx lr ldr r3, =_sidata 8002490: 080036a0 .word 0x080036a0 ldr r0, =_sdata 8002494: 20000000 .word 0x20000000 ldr r3, =_edata 8002498: 20000280 .word 0x20000280 ldr r2, =_sbss 800249c: 20000280 .word 0x20000280 ldr r3, = _ebss 80024a0: 2000115c .word 0x2000115c 080024a4 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80024a4: e7fe b.n 80024a4 ... 080024a8 <__errno>: 80024a8: 4b01 ldr r3, [pc, #4] ; (80024b0 <__errno+0x8>) 80024aa: 6818 ldr r0, [r3, #0] 80024ac: 4770 bx lr 80024ae: bf00 nop 80024b0: 2000021c .word 0x2000021c 080024b4 <__libc_init_array>: 80024b4: b570 push {r4, r5, r6, lr} 80024b6: 2500 movs r5, #0 80024b8: 4e0c ldr r6, [pc, #48] ; (80024ec <__libc_init_array+0x38>) 80024ba: 4c0d ldr r4, [pc, #52] ; (80024f0 <__libc_init_array+0x3c>) 80024bc: 1ba4 subs r4, r4, r6 80024be: 10a4 asrs r4, r4, #2 80024c0: 42a5 cmp r5, r4 80024c2: d109 bne.n 80024d8 <__libc_init_array+0x24> 80024c4: f001 f848 bl 8003558 <_init> 80024c8: 2500 movs r5, #0 80024ca: 4e0a ldr r6, [pc, #40] ; (80024f4 <__libc_init_array+0x40>) 80024cc: 4c0a ldr r4, [pc, #40] ; (80024f8 <__libc_init_array+0x44>) 80024ce: 1ba4 subs r4, r4, r6 80024d0: 10a4 asrs r4, r4, #2 80024d2: 42a5 cmp r5, r4 80024d4: d105 bne.n 80024e2 <__libc_init_array+0x2e> 80024d6: bd70 pop {r4, r5, r6, pc} 80024d8: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80024dc: 4798 blx r3 80024de: 3501 adds r5, #1 80024e0: e7ee b.n 80024c0 <__libc_init_array+0xc> 80024e2: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80024e6: 4798 blx r3 80024e8: 3501 adds r5, #1 80024ea: e7f2 b.n 80024d2 <__libc_init_array+0x1e> 80024ec: 08003698 .word 0x08003698 80024f0: 08003698 .word 0x08003698 80024f4: 08003698 .word 0x08003698 80024f8: 0800369c .word 0x0800369c 080024fc : 80024fc: 4603 mov r3, r0 80024fe: 4402 add r2, r0 8002500: 4293 cmp r3, r2 8002502: d100 bne.n 8002506 8002504: 4770 bx lr 8002506: f803 1b01 strb.w r1, [r3], #1 800250a: e7f9 b.n 8002500 0800250c : 800250c: b40f push {r0, r1, r2, r3} 800250e: 4b0a ldr r3, [pc, #40] ; (8002538 ) 8002510: b513 push {r0, r1, r4, lr} 8002512: 681c ldr r4, [r3, #0] 8002514: b124 cbz r4, 8002520 8002516: 69a3 ldr r3, [r4, #24] 8002518: b913 cbnz r3, 8002520 800251a: 4620 mov r0, r4 800251c: f000 fada bl 8002ad4 <__sinit> 8002520: ab05 add r3, sp, #20 8002522: 9a04 ldr r2, [sp, #16] 8002524: 68a1 ldr r1, [r4, #8] 8002526: 4620 mov r0, r4 8002528: 9301 str r3, [sp, #4] 800252a: f000 fc9b bl 8002e64 <_vfiprintf_r> 800252e: b002 add sp, #8 8002530: e8bd 4010 ldmia.w sp!, {r4, lr} 8002534: b004 add sp, #16 8002536: 4770 bx lr 8002538: 2000021c .word 0x2000021c 0800253c <_puts_r>: 800253c: b570 push {r4, r5, r6, lr} 800253e: 460e mov r6, r1 8002540: 4605 mov r5, r0 8002542: b118 cbz r0, 800254c <_puts_r+0x10> 8002544: 6983 ldr r3, [r0, #24] 8002546: b90b cbnz r3, 800254c <_puts_r+0x10> 8002548: f000 fac4 bl 8002ad4 <__sinit> 800254c: 69ab ldr r3, [r5, #24] 800254e: 68ac ldr r4, [r5, #8] 8002550: b913 cbnz r3, 8002558 <_puts_r+0x1c> 8002552: 4628 mov r0, r5 8002554: f000 fabe bl 8002ad4 <__sinit> 8002558: 4b23 ldr r3, [pc, #140] ; (80025e8 <_puts_r+0xac>) 800255a: 429c cmp r4, r3 800255c: d117 bne.n 800258e <_puts_r+0x52> 800255e: 686c ldr r4, [r5, #4] 8002560: 89a3 ldrh r3, [r4, #12] 8002562: 071b lsls r3, r3, #28 8002564: d51d bpl.n 80025a2 <_puts_r+0x66> 8002566: 6923 ldr r3, [r4, #16] 8002568: b1db cbz r3, 80025a2 <_puts_r+0x66> 800256a: 3e01 subs r6, #1 800256c: 68a3 ldr r3, [r4, #8] 800256e: f816 1f01 ldrb.w r1, [r6, #1]! 8002572: 3b01 subs r3, #1 8002574: 60a3 str r3, [r4, #8] 8002576: b9e9 cbnz r1, 80025b4 <_puts_r+0x78> 8002578: 2b00 cmp r3, #0 800257a: da2e bge.n 80025da <_puts_r+0x9e> 800257c: 4622 mov r2, r4 800257e: 210a movs r1, #10 8002580: 4628 mov r0, r5 8002582: f000 f8f5 bl 8002770 <__swbuf_r> 8002586: 3001 adds r0, #1 8002588: d011 beq.n 80025ae <_puts_r+0x72> 800258a: 200a movs r0, #10 800258c: bd70 pop {r4, r5, r6, pc} 800258e: 4b17 ldr r3, [pc, #92] ; (80025ec <_puts_r+0xb0>) 8002590: 429c cmp r4, r3 8002592: d101 bne.n 8002598 <_puts_r+0x5c> 8002594: 68ac ldr r4, [r5, #8] 8002596: e7e3 b.n 8002560 <_puts_r+0x24> 8002598: 4b15 ldr r3, [pc, #84] ; (80025f0 <_puts_r+0xb4>) 800259a: 429c cmp r4, r3 800259c: bf08 it eq 800259e: 68ec ldreq r4, [r5, #12] 80025a0: e7de b.n 8002560 <_puts_r+0x24> 80025a2: 4621 mov r1, r4 80025a4: 4628 mov r0, r5 80025a6: f000 f935 bl 8002814 <__swsetup_r> 80025aa: 2800 cmp r0, #0 80025ac: d0dd beq.n 800256a <_puts_r+0x2e> 80025ae: f04f 30ff mov.w r0, #4294967295 80025b2: bd70 pop {r4, r5, r6, pc} 80025b4: 2b00 cmp r3, #0 80025b6: da04 bge.n 80025c2 <_puts_r+0x86> 80025b8: 69a2 ldr r2, [r4, #24] 80025ba: 4293 cmp r3, r2 80025bc: db06 blt.n 80025cc <_puts_r+0x90> 80025be: 290a cmp r1, #10 80025c0: d004 beq.n 80025cc <_puts_r+0x90> 80025c2: 6823 ldr r3, [r4, #0] 80025c4: 1c5a adds r2, r3, #1 80025c6: 6022 str r2, [r4, #0] 80025c8: 7019 strb r1, [r3, #0] 80025ca: e7cf b.n 800256c <_puts_r+0x30> 80025cc: 4622 mov r2, r4 80025ce: 4628 mov r0, r5 80025d0: f000 f8ce bl 8002770 <__swbuf_r> 80025d4: 3001 adds r0, #1 80025d6: d1c9 bne.n 800256c <_puts_r+0x30> 80025d8: e7e9 b.n 80025ae <_puts_r+0x72> 80025da: 200a movs r0, #10 80025dc: 6823 ldr r3, [r4, #0] 80025de: 1c5a adds r2, r3, #1 80025e0: 6022 str r2, [r4, #0] 80025e2: 7018 strb r0, [r3, #0] 80025e4: bd70 pop {r4, r5, r6, pc} 80025e6: bf00 nop 80025e8: 08003624 .word 0x08003624 80025ec: 08003644 .word 0x08003644 80025f0: 08003604 .word 0x08003604 080025f4 : 80025f4: 4b02 ldr r3, [pc, #8] ; (8002600 ) 80025f6: 4601 mov r1, r0 80025f8: 6818 ldr r0, [r3, #0] 80025fa: f7ff bf9f b.w 800253c <_puts_r> 80025fe: bf00 nop 8002600: 2000021c .word 0x2000021c 08002604 : 8002604: 2900 cmp r1, #0 8002606: f44f 6380 mov.w r3, #1024 ; 0x400 800260a: bf0c ite eq 800260c: 2202 moveq r2, #2 800260e: 2200 movne r2, #0 8002610: f000 b800 b.w 8002614 08002614 : 8002614: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8002618: 461d mov r5, r3 800261a: 4b51 ldr r3, [pc, #324] ; (8002760 ) 800261c: 4604 mov r4, r0 800261e: 681e ldr r6, [r3, #0] 8002620: 460f mov r7, r1 8002622: 4690 mov r8, r2 8002624: b126 cbz r6, 8002630 8002626: 69b3 ldr r3, [r6, #24] 8002628: b913 cbnz r3, 8002630 800262a: 4630 mov r0, r6 800262c: f000 fa52 bl 8002ad4 <__sinit> 8002630: 4b4c ldr r3, [pc, #304] ; (8002764 ) 8002632: 429c cmp r4, r3 8002634: d152 bne.n 80026dc 8002636: 6874 ldr r4, [r6, #4] 8002638: f1b8 0f02 cmp.w r8, #2 800263c: d006 beq.n 800264c 800263e: f1b8 0f01 cmp.w r8, #1 8002642: f200 8089 bhi.w 8002758 8002646: 2d00 cmp r5, #0 8002648: f2c0 8086 blt.w 8002758 800264c: 4621 mov r1, r4 800264e: 4630 mov r0, r6 8002650: f000 f9d6 bl 8002a00 <_fflush_r> 8002654: 6b61 ldr r1, [r4, #52] ; 0x34 8002656: b141 cbz r1, 800266a 8002658: f104 0344 add.w r3, r4, #68 ; 0x44 800265c: 4299 cmp r1, r3 800265e: d002 beq.n 8002666 8002660: 4630 mov r0, r6 8002662: f000 fb2d bl 8002cc0 <_free_r> 8002666: 2300 movs r3, #0 8002668: 6363 str r3, [r4, #52] ; 0x34 800266a: 2300 movs r3, #0 800266c: 61a3 str r3, [r4, #24] 800266e: 6063 str r3, [r4, #4] 8002670: 89a3 ldrh r3, [r4, #12] 8002672: 061b lsls r3, r3, #24 8002674: d503 bpl.n 800267e 8002676: 6921 ldr r1, [r4, #16] 8002678: 4630 mov r0, r6 800267a: f000 fb21 bl 8002cc0 <_free_r> 800267e: 89a3 ldrh r3, [r4, #12] 8002680: f1b8 0f02 cmp.w r8, #2 8002684: f423 634a bic.w r3, r3, #3232 ; 0xca0 8002688: f023 0303 bic.w r3, r3, #3 800268c: 81a3 strh r3, [r4, #12] 800268e: d05d beq.n 800274c 8002690: ab01 add r3, sp, #4 8002692: 466a mov r2, sp 8002694: 4621 mov r1, r4 8002696: 4630 mov r0, r6 8002698: f000 faa6 bl 8002be8 <__swhatbuf_r> 800269c: 89a3 ldrh r3, [r4, #12] 800269e: 4318 orrs r0, r3 80026a0: 81a0 strh r0, [r4, #12] 80026a2: bb2d cbnz r5, 80026f0 80026a4: 9d00 ldr r5, [sp, #0] 80026a6: 4628 mov r0, r5 80026a8: f000 fb02 bl 8002cb0 80026ac: 4607 mov r7, r0 80026ae: 2800 cmp r0, #0 80026b0: d14e bne.n 8002750 80026b2: f8dd 9000 ldr.w r9, [sp] 80026b6: 45a9 cmp r9, r5 80026b8: d13c bne.n 8002734 80026ba: f04f 30ff mov.w r0, #4294967295 80026be: 89a3 ldrh r3, [r4, #12] 80026c0: f043 0302 orr.w r3, r3, #2 80026c4: 81a3 strh r3, [r4, #12] 80026c6: 2300 movs r3, #0 80026c8: 60a3 str r3, [r4, #8] 80026ca: f104 0347 add.w r3, r4, #71 ; 0x47 80026ce: 6023 str r3, [r4, #0] 80026d0: 6123 str r3, [r4, #16] 80026d2: 2301 movs r3, #1 80026d4: 6163 str r3, [r4, #20] 80026d6: b003 add sp, #12 80026d8: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80026dc: 4b22 ldr r3, [pc, #136] ; (8002768 ) 80026de: 429c cmp r4, r3 80026e0: d101 bne.n 80026e6 80026e2: 68b4 ldr r4, [r6, #8] 80026e4: e7a8 b.n 8002638 80026e6: 4b21 ldr r3, [pc, #132] ; (800276c ) 80026e8: 429c cmp r4, r3 80026ea: bf08 it eq 80026ec: 68f4 ldreq r4, [r6, #12] 80026ee: e7a3 b.n 8002638 80026f0: 2f00 cmp r7, #0 80026f2: d0d8 beq.n 80026a6 80026f4: 69b3 ldr r3, [r6, #24] 80026f6: b913 cbnz r3, 80026fe 80026f8: 4630 mov r0, r6 80026fa: f000 f9eb bl 8002ad4 <__sinit> 80026fe: f1b8 0f01 cmp.w r8, #1 8002702: bf08 it eq 8002704: 89a3 ldrheq r3, [r4, #12] 8002706: 6027 str r7, [r4, #0] 8002708: bf04 itt eq 800270a: f043 0301 orreq.w r3, r3, #1 800270e: 81a3 strheq r3, [r4, #12] 8002710: 89a3 ldrh r3, [r4, #12] 8002712: 6127 str r7, [r4, #16] 8002714: f013 0008 ands.w r0, r3, #8 8002718: 6165 str r5, [r4, #20] 800271a: d01b beq.n 8002754 800271c: f013 0001 ands.w r0, r3, #1 8002720: f04f 0300 mov.w r3, #0 8002724: bf1f itttt ne 8002726: 426d negne r5, r5 8002728: 60a3 strne r3, [r4, #8] 800272a: 61a5 strne r5, [r4, #24] 800272c: 4618 movne r0, r3 800272e: bf08 it eq 8002730: 60a5 streq r5, [r4, #8] 8002732: e7d0 b.n 80026d6 8002734: 4648 mov r0, r9 8002736: f000 fabb bl 8002cb0 800273a: 4607 mov r7, r0 800273c: 2800 cmp r0, #0 800273e: d0bc beq.n 80026ba 8002740: 89a3 ldrh r3, [r4, #12] 8002742: 464d mov r5, r9 8002744: f043 0380 orr.w r3, r3, #128 ; 0x80 8002748: 81a3 strh r3, [r4, #12] 800274a: e7d3 b.n 80026f4 800274c: 2000 movs r0, #0 800274e: e7b6 b.n 80026be 8002750: 46a9 mov r9, r5 8002752: e7f5 b.n 8002740 8002754: 60a0 str r0, [r4, #8] 8002756: e7be b.n 80026d6 8002758: f04f 30ff mov.w r0, #4294967295 800275c: e7bb b.n 80026d6 800275e: bf00 nop 8002760: 2000021c .word 0x2000021c 8002764: 08003624 .word 0x08003624 8002768: 08003644 .word 0x08003644 800276c: 08003604 .word 0x08003604 08002770 <__swbuf_r>: 8002770: b5f8 push {r3, r4, r5, r6, r7, lr} 8002772: 460e mov r6, r1 8002774: 4614 mov r4, r2 8002776: 4605 mov r5, r0 8002778: b118 cbz r0, 8002782 <__swbuf_r+0x12> 800277a: 6983 ldr r3, [r0, #24] 800277c: b90b cbnz r3, 8002782 <__swbuf_r+0x12> 800277e: f000 f9a9 bl 8002ad4 <__sinit> 8002782: 4b21 ldr r3, [pc, #132] ; (8002808 <__swbuf_r+0x98>) 8002784: 429c cmp r4, r3 8002786: d12a bne.n 80027de <__swbuf_r+0x6e> 8002788: 686c ldr r4, [r5, #4] 800278a: 69a3 ldr r3, [r4, #24] 800278c: 60a3 str r3, [r4, #8] 800278e: 89a3 ldrh r3, [r4, #12] 8002790: 071a lsls r2, r3, #28 8002792: d52e bpl.n 80027f2 <__swbuf_r+0x82> 8002794: 6923 ldr r3, [r4, #16] 8002796: b363 cbz r3, 80027f2 <__swbuf_r+0x82> 8002798: 6923 ldr r3, [r4, #16] 800279a: 6820 ldr r0, [r4, #0] 800279c: b2f6 uxtb r6, r6 800279e: 1ac0 subs r0, r0, r3 80027a0: 6963 ldr r3, [r4, #20] 80027a2: 4637 mov r7, r6 80027a4: 4298 cmp r0, r3 80027a6: db04 blt.n 80027b2 <__swbuf_r+0x42> 80027a8: 4621 mov r1, r4 80027aa: 4628 mov r0, r5 80027ac: f000 f928 bl 8002a00 <_fflush_r> 80027b0: bb28 cbnz r0, 80027fe <__swbuf_r+0x8e> 80027b2: 68a3 ldr r3, [r4, #8] 80027b4: 3001 adds r0, #1 80027b6: 3b01 subs r3, #1 80027b8: 60a3 str r3, [r4, #8] 80027ba: 6823 ldr r3, [r4, #0] 80027bc: 1c5a adds r2, r3, #1 80027be: 6022 str r2, [r4, #0] 80027c0: 701e strb r6, [r3, #0] 80027c2: 6963 ldr r3, [r4, #20] 80027c4: 4298 cmp r0, r3 80027c6: d004 beq.n 80027d2 <__swbuf_r+0x62> 80027c8: 89a3 ldrh r3, [r4, #12] 80027ca: 07db lsls r3, r3, #31 80027cc: d519 bpl.n 8002802 <__swbuf_r+0x92> 80027ce: 2e0a cmp r6, #10 80027d0: d117 bne.n 8002802 <__swbuf_r+0x92> 80027d2: 4621 mov r1, r4 80027d4: 4628 mov r0, r5 80027d6: f000 f913 bl 8002a00 <_fflush_r> 80027da: b190 cbz r0, 8002802 <__swbuf_r+0x92> 80027dc: e00f b.n 80027fe <__swbuf_r+0x8e> 80027de: 4b0b ldr r3, [pc, #44] ; (800280c <__swbuf_r+0x9c>) 80027e0: 429c cmp r4, r3 80027e2: d101 bne.n 80027e8 <__swbuf_r+0x78> 80027e4: 68ac ldr r4, [r5, #8] 80027e6: e7d0 b.n 800278a <__swbuf_r+0x1a> 80027e8: 4b09 ldr r3, [pc, #36] ; (8002810 <__swbuf_r+0xa0>) 80027ea: 429c cmp r4, r3 80027ec: bf08 it eq 80027ee: 68ec ldreq r4, [r5, #12] 80027f0: e7cb b.n 800278a <__swbuf_r+0x1a> 80027f2: 4621 mov r1, r4 80027f4: 4628 mov r0, r5 80027f6: f000 f80d bl 8002814 <__swsetup_r> 80027fa: 2800 cmp r0, #0 80027fc: d0cc beq.n 8002798 <__swbuf_r+0x28> 80027fe: f04f 37ff mov.w r7, #4294967295 8002802: 4638 mov r0, r7 8002804: bdf8 pop {r3, r4, r5, r6, r7, pc} 8002806: bf00 nop 8002808: 08003624 .word 0x08003624 800280c: 08003644 .word 0x08003644 8002810: 08003604 .word 0x08003604 08002814 <__swsetup_r>: 8002814: 4b32 ldr r3, [pc, #200] ; (80028e0 <__swsetup_r+0xcc>) 8002816: b570 push {r4, r5, r6, lr} 8002818: 681d ldr r5, [r3, #0] 800281a: 4606 mov r6, r0 800281c: 460c mov r4, r1 800281e: b125 cbz r5, 800282a <__swsetup_r+0x16> 8002820: 69ab ldr r3, [r5, #24] 8002822: b913 cbnz r3, 800282a <__swsetup_r+0x16> 8002824: 4628 mov r0, r5 8002826: f000 f955 bl 8002ad4 <__sinit> 800282a: 4b2e ldr r3, [pc, #184] ; (80028e4 <__swsetup_r+0xd0>) 800282c: 429c cmp r4, r3 800282e: d10f bne.n 8002850 <__swsetup_r+0x3c> 8002830: 686c ldr r4, [r5, #4] 8002832: f9b4 300c ldrsh.w r3, [r4, #12] 8002836: b29a uxth r2, r3 8002838: 0715 lsls r5, r2, #28 800283a: d42c bmi.n 8002896 <__swsetup_r+0x82> 800283c: 06d0 lsls r0, r2, #27 800283e: d411 bmi.n 8002864 <__swsetup_r+0x50> 8002840: 2209 movs r2, #9 8002842: 6032 str r2, [r6, #0] 8002844: f043 0340 orr.w r3, r3, #64 ; 0x40 8002848: 81a3 strh r3, [r4, #12] 800284a: f04f 30ff mov.w r0, #4294967295 800284e: bd70 pop {r4, r5, r6, pc} 8002850: 4b25 ldr r3, [pc, #148] ; (80028e8 <__swsetup_r+0xd4>) 8002852: 429c cmp r4, r3 8002854: d101 bne.n 800285a <__swsetup_r+0x46> 8002856: 68ac ldr r4, [r5, #8] 8002858: e7eb b.n 8002832 <__swsetup_r+0x1e> 800285a: 4b24 ldr r3, [pc, #144] ; (80028ec <__swsetup_r+0xd8>) 800285c: 429c cmp r4, r3 800285e: bf08 it eq 8002860: 68ec ldreq r4, [r5, #12] 8002862: e7e6 b.n 8002832 <__swsetup_r+0x1e> 8002864: 0751 lsls r1, r2, #29 8002866: d512 bpl.n 800288e <__swsetup_r+0x7a> 8002868: 6b61 ldr r1, [r4, #52] ; 0x34 800286a: b141 cbz r1, 800287e <__swsetup_r+0x6a> 800286c: f104 0344 add.w r3, r4, #68 ; 0x44 8002870: 4299 cmp r1, r3 8002872: d002 beq.n 800287a <__swsetup_r+0x66> 8002874: 4630 mov r0, r6 8002876: f000 fa23 bl 8002cc0 <_free_r> 800287a: 2300 movs r3, #0 800287c: 6363 str r3, [r4, #52] ; 0x34 800287e: 89a3 ldrh r3, [r4, #12] 8002880: f023 0324 bic.w r3, r3, #36 ; 0x24 8002884: 81a3 strh r3, [r4, #12] 8002886: 2300 movs r3, #0 8002888: 6063 str r3, [r4, #4] 800288a: 6923 ldr r3, [r4, #16] 800288c: 6023 str r3, [r4, #0] 800288e: 89a3 ldrh r3, [r4, #12] 8002890: f043 0308 orr.w r3, r3, #8 8002894: 81a3 strh r3, [r4, #12] 8002896: 6923 ldr r3, [r4, #16] 8002898: b94b cbnz r3, 80028ae <__swsetup_r+0x9a> 800289a: 89a3 ldrh r3, [r4, #12] 800289c: f403 7320 and.w r3, r3, #640 ; 0x280 80028a0: f5b3 7f00 cmp.w r3, #512 ; 0x200 80028a4: d003 beq.n 80028ae <__swsetup_r+0x9a> 80028a6: 4621 mov r1, r4 80028a8: 4630 mov r0, r6 80028aa: f000 f9c1 bl 8002c30 <__smakebuf_r> 80028ae: 89a2 ldrh r2, [r4, #12] 80028b0: f012 0301 ands.w r3, r2, #1 80028b4: d00c beq.n 80028d0 <__swsetup_r+0xbc> 80028b6: 2300 movs r3, #0 80028b8: 60a3 str r3, [r4, #8] 80028ba: 6963 ldr r3, [r4, #20] 80028bc: 425b negs r3, r3 80028be: 61a3 str r3, [r4, #24] 80028c0: 6923 ldr r3, [r4, #16] 80028c2: b953 cbnz r3, 80028da <__swsetup_r+0xc6> 80028c4: f9b4 300c ldrsh.w r3, [r4, #12] 80028c8: f013 0080 ands.w r0, r3, #128 ; 0x80 80028cc: d1ba bne.n 8002844 <__swsetup_r+0x30> 80028ce: bd70 pop {r4, r5, r6, pc} 80028d0: 0792 lsls r2, r2, #30 80028d2: bf58 it pl 80028d4: 6963 ldrpl r3, [r4, #20] 80028d6: 60a3 str r3, [r4, #8] 80028d8: e7f2 b.n 80028c0 <__swsetup_r+0xac> 80028da: 2000 movs r0, #0 80028dc: e7f7 b.n 80028ce <__swsetup_r+0xba> 80028de: bf00 nop 80028e0: 2000021c .word 0x2000021c 80028e4: 08003624 .word 0x08003624 80028e8: 08003644 .word 0x08003644 80028ec: 08003604 .word 0x08003604 080028f0 <__sflush_r>: 80028f0: 898a ldrh r2, [r1, #12] 80028f2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80028f6: 4605 mov r5, r0 80028f8: 0710 lsls r0, r2, #28 80028fa: 460c mov r4, r1 80028fc: d45a bmi.n 80029b4 <__sflush_r+0xc4> 80028fe: 684b ldr r3, [r1, #4] 8002900: 2b00 cmp r3, #0 8002902: dc05 bgt.n 8002910 <__sflush_r+0x20> 8002904: 6c0b ldr r3, [r1, #64] ; 0x40 8002906: 2b00 cmp r3, #0 8002908: dc02 bgt.n 8002910 <__sflush_r+0x20> 800290a: 2000 movs r0, #0 800290c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8002910: 6ae6 ldr r6, [r4, #44] ; 0x2c 8002912: 2e00 cmp r6, #0 8002914: d0f9 beq.n 800290a <__sflush_r+0x1a> 8002916: 2300 movs r3, #0 8002918: f412 5280 ands.w r2, r2, #4096 ; 0x1000 800291c: 682f ldr r7, [r5, #0] 800291e: 602b str r3, [r5, #0] 8002920: d033 beq.n 800298a <__sflush_r+0x9a> 8002922: 6d60 ldr r0, [r4, #84] ; 0x54 8002924: 89a3 ldrh r3, [r4, #12] 8002926: 075a lsls r2, r3, #29 8002928: d505 bpl.n 8002936 <__sflush_r+0x46> 800292a: 6863 ldr r3, [r4, #4] 800292c: 1ac0 subs r0, r0, r3 800292e: 6b63 ldr r3, [r4, #52] ; 0x34 8002930: b10b cbz r3, 8002936 <__sflush_r+0x46> 8002932: 6c23 ldr r3, [r4, #64] ; 0x40 8002934: 1ac0 subs r0, r0, r3 8002936: 2300 movs r3, #0 8002938: 4602 mov r2, r0 800293a: 6ae6 ldr r6, [r4, #44] ; 0x2c 800293c: 6a21 ldr r1, [r4, #32] 800293e: 4628 mov r0, r5 8002940: 47b0 blx r6 8002942: 1c43 adds r3, r0, #1 8002944: 89a3 ldrh r3, [r4, #12] 8002946: d106 bne.n 8002956 <__sflush_r+0x66> 8002948: 6829 ldr r1, [r5, #0] 800294a: 291d cmp r1, #29 800294c: d84b bhi.n 80029e6 <__sflush_r+0xf6> 800294e: 4a2b ldr r2, [pc, #172] ; (80029fc <__sflush_r+0x10c>) 8002950: 40ca lsrs r2, r1 8002952: 07d6 lsls r6, r2, #31 8002954: d547 bpl.n 80029e6 <__sflush_r+0xf6> 8002956: 2200 movs r2, #0 8002958: 6062 str r2, [r4, #4] 800295a: 6922 ldr r2, [r4, #16] 800295c: 04d9 lsls r1, r3, #19 800295e: 6022 str r2, [r4, #0] 8002960: d504 bpl.n 800296c <__sflush_r+0x7c> 8002962: 1c42 adds r2, r0, #1 8002964: d101 bne.n 800296a <__sflush_r+0x7a> 8002966: 682b ldr r3, [r5, #0] 8002968: b903 cbnz r3, 800296c <__sflush_r+0x7c> 800296a: 6560 str r0, [r4, #84] ; 0x54 800296c: 6b61 ldr r1, [r4, #52] ; 0x34 800296e: 602f str r7, [r5, #0] 8002970: 2900 cmp r1, #0 8002972: d0ca beq.n 800290a <__sflush_r+0x1a> 8002974: f104 0344 add.w r3, r4, #68 ; 0x44 8002978: 4299 cmp r1, r3 800297a: d002 beq.n 8002982 <__sflush_r+0x92> 800297c: 4628 mov r0, r5 800297e: f000 f99f bl 8002cc0 <_free_r> 8002982: 2000 movs r0, #0 8002984: 6360 str r0, [r4, #52] ; 0x34 8002986: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800298a: 6a21 ldr r1, [r4, #32] 800298c: 2301 movs r3, #1 800298e: 4628 mov r0, r5 8002990: 47b0 blx r6 8002992: 1c41 adds r1, r0, #1 8002994: d1c6 bne.n 8002924 <__sflush_r+0x34> 8002996: 682b ldr r3, [r5, #0] 8002998: 2b00 cmp r3, #0 800299a: d0c3 beq.n 8002924 <__sflush_r+0x34> 800299c: 2b1d cmp r3, #29 800299e: d001 beq.n 80029a4 <__sflush_r+0xb4> 80029a0: 2b16 cmp r3, #22 80029a2: d101 bne.n 80029a8 <__sflush_r+0xb8> 80029a4: 602f str r7, [r5, #0] 80029a6: e7b0 b.n 800290a <__sflush_r+0x1a> 80029a8: 89a3 ldrh r3, [r4, #12] 80029aa: f043 0340 orr.w r3, r3, #64 ; 0x40 80029ae: 81a3 strh r3, [r4, #12] 80029b0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80029b4: 690f ldr r7, [r1, #16] 80029b6: 2f00 cmp r7, #0 80029b8: d0a7 beq.n 800290a <__sflush_r+0x1a> 80029ba: 0793 lsls r3, r2, #30 80029bc: bf18 it ne 80029be: 2300 movne r3, #0 80029c0: 680e ldr r6, [r1, #0] 80029c2: bf08 it eq 80029c4: 694b ldreq r3, [r1, #20] 80029c6: eba6 0807 sub.w r8, r6, r7 80029ca: 600f str r7, [r1, #0] 80029cc: 608b str r3, [r1, #8] 80029ce: f1b8 0f00 cmp.w r8, #0 80029d2: dd9a ble.n 800290a <__sflush_r+0x1a> 80029d4: 4643 mov r3, r8 80029d6: 463a mov r2, r7 80029d8: 6a21 ldr r1, [r4, #32] 80029da: 4628 mov r0, r5 80029dc: 6aa6 ldr r6, [r4, #40] ; 0x28 80029de: 47b0 blx r6 80029e0: 2800 cmp r0, #0 80029e2: dc07 bgt.n 80029f4 <__sflush_r+0x104> 80029e4: 89a3 ldrh r3, [r4, #12] 80029e6: f043 0340 orr.w r3, r3, #64 ; 0x40 80029ea: 81a3 strh r3, [r4, #12] 80029ec: f04f 30ff mov.w r0, #4294967295 80029f0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80029f4: 4407 add r7, r0 80029f6: eba8 0800 sub.w r8, r8, r0 80029fa: e7e8 b.n 80029ce <__sflush_r+0xde> 80029fc: 20400001 .word 0x20400001 08002a00 <_fflush_r>: 8002a00: b538 push {r3, r4, r5, lr} 8002a02: 690b ldr r3, [r1, #16] 8002a04: 4605 mov r5, r0 8002a06: 460c mov r4, r1 8002a08: b1db cbz r3, 8002a42 <_fflush_r+0x42> 8002a0a: b118 cbz r0, 8002a14 <_fflush_r+0x14> 8002a0c: 6983 ldr r3, [r0, #24] 8002a0e: b90b cbnz r3, 8002a14 <_fflush_r+0x14> 8002a10: f000 f860 bl 8002ad4 <__sinit> 8002a14: 4b0c ldr r3, [pc, #48] ; (8002a48 <_fflush_r+0x48>) 8002a16: 429c cmp r4, r3 8002a18: d109 bne.n 8002a2e <_fflush_r+0x2e> 8002a1a: 686c ldr r4, [r5, #4] 8002a1c: f9b4 300c ldrsh.w r3, [r4, #12] 8002a20: b17b cbz r3, 8002a42 <_fflush_r+0x42> 8002a22: 4621 mov r1, r4 8002a24: 4628 mov r0, r5 8002a26: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8002a2a: f7ff bf61 b.w 80028f0 <__sflush_r> 8002a2e: 4b07 ldr r3, [pc, #28] ; (8002a4c <_fflush_r+0x4c>) 8002a30: 429c cmp r4, r3 8002a32: d101 bne.n 8002a38 <_fflush_r+0x38> 8002a34: 68ac ldr r4, [r5, #8] 8002a36: e7f1 b.n 8002a1c <_fflush_r+0x1c> 8002a38: 4b05 ldr r3, [pc, #20] ; (8002a50 <_fflush_r+0x50>) 8002a3a: 429c cmp r4, r3 8002a3c: bf08 it eq 8002a3e: 68ec ldreq r4, [r5, #12] 8002a40: e7ec b.n 8002a1c <_fflush_r+0x1c> 8002a42: 2000 movs r0, #0 8002a44: bd38 pop {r3, r4, r5, pc} 8002a46: bf00 nop 8002a48: 08003624 .word 0x08003624 8002a4c: 08003644 .word 0x08003644 8002a50: 08003604 .word 0x08003604 08002a54 <_cleanup_r>: 8002a54: 4901 ldr r1, [pc, #4] ; (8002a5c <_cleanup_r+0x8>) 8002a56: f000 b8a9 b.w 8002bac <_fwalk_reent> 8002a5a: bf00 nop 8002a5c: 08002a01 .word 0x08002a01 08002a60 : 8002a60: 2300 movs r3, #0 8002a62: b510 push {r4, lr} 8002a64: 4604 mov r4, r0 8002a66: 6003 str r3, [r0, #0] 8002a68: 6043 str r3, [r0, #4] 8002a6a: 6083 str r3, [r0, #8] 8002a6c: 8181 strh r1, [r0, #12] 8002a6e: 6643 str r3, [r0, #100] ; 0x64 8002a70: 81c2 strh r2, [r0, #14] 8002a72: 6103 str r3, [r0, #16] 8002a74: 6143 str r3, [r0, #20] 8002a76: 6183 str r3, [r0, #24] 8002a78: 4619 mov r1, r3 8002a7a: 2208 movs r2, #8 8002a7c: 305c adds r0, #92 ; 0x5c 8002a7e: f7ff fd3d bl 80024fc 8002a82: 4b05 ldr r3, [pc, #20] ; (8002a98 ) 8002a84: 6224 str r4, [r4, #32] 8002a86: 6263 str r3, [r4, #36] ; 0x24 8002a88: 4b04 ldr r3, [pc, #16] ; (8002a9c ) 8002a8a: 62a3 str r3, [r4, #40] ; 0x28 8002a8c: 4b04 ldr r3, [pc, #16] ; (8002aa0 ) 8002a8e: 62e3 str r3, [r4, #44] ; 0x2c 8002a90: 4b04 ldr r3, [pc, #16] ; (8002aa4 ) 8002a92: 6323 str r3, [r4, #48] ; 0x30 8002a94: bd10 pop {r4, pc} 8002a96: bf00 nop 8002a98: 080033e1 .word 0x080033e1 8002a9c: 08003403 .word 0x08003403 8002aa0: 0800343b .word 0x0800343b 8002aa4: 0800345f .word 0x0800345f 08002aa8 <__sfmoreglue>: 8002aa8: b570 push {r4, r5, r6, lr} 8002aaa: 2568 movs r5, #104 ; 0x68 8002aac: 1e4a subs r2, r1, #1 8002aae: 4355 muls r5, r2 8002ab0: 460e mov r6, r1 8002ab2: f105 0174 add.w r1, r5, #116 ; 0x74 8002ab6: f000 f94f bl 8002d58 <_malloc_r> 8002aba: 4604 mov r4, r0 8002abc: b140 cbz r0, 8002ad0 <__sfmoreglue+0x28> 8002abe: 2100 movs r1, #0 8002ac0: e880 0042 stmia.w r0, {r1, r6} 8002ac4: 300c adds r0, #12 8002ac6: 60a0 str r0, [r4, #8] 8002ac8: f105 0268 add.w r2, r5, #104 ; 0x68 8002acc: f7ff fd16 bl 80024fc 8002ad0: 4620 mov r0, r4 8002ad2: bd70 pop {r4, r5, r6, pc} 08002ad4 <__sinit>: 8002ad4: 6983 ldr r3, [r0, #24] 8002ad6: b510 push {r4, lr} 8002ad8: 4604 mov r4, r0 8002ada: bb33 cbnz r3, 8002b2a <__sinit+0x56> 8002adc: 6483 str r3, [r0, #72] ; 0x48 8002ade: 64c3 str r3, [r0, #76] ; 0x4c 8002ae0: 6503 str r3, [r0, #80] ; 0x50 8002ae2: 4b12 ldr r3, [pc, #72] ; (8002b2c <__sinit+0x58>) 8002ae4: 4a12 ldr r2, [pc, #72] ; (8002b30 <__sinit+0x5c>) 8002ae6: 681b ldr r3, [r3, #0] 8002ae8: 6282 str r2, [r0, #40] ; 0x28 8002aea: 4298 cmp r0, r3 8002aec: bf04 itt eq 8002aee: 2301 moveq r3, #1 8002af0: 6183 streq r3, [r0, #24] 8002af2: f000 f81f bl 8002b34 <__sfp> 8002af6: 6060 str r0, [r4, #4] 8002af8: 4620 mov r0, r4 8002afa: f000 f81b bl 8002b34 <__sfp> 8002afe: 60a0 str r0, [r4, #8] 8002b00: 4620 mov r0, r4 8002b02: f000 f817 bl 8002b34 <__sfp> 8002b06: 2200 movs r2, #0 8002b08: 60e0 str r0, [r4, #12] 8002b0a: 2104 movs r1, #4 8002b0c: 6860 ldr r0, [r4, #4] 8002b0e: f7ff ffa7 bl 8002a60 8002b12: 2201 movs r2, #1 8002b14: 2109 movs r1, #9 8002b16: 68a0 ldr r0, [r4, #8] 8002b18: f7ff ffa2 bl 8002a60 8002b1c: 2202 movs r2, #2 8002b1e: 2112 movs r1, #18 8002b20: 68e0 ldr r0, [r4, #12] 8002b22: f7ff ff9d bl 8002a60 8002b26: 2301 movs r3, #1 8002b28: 61a3 str r3, [r4, #24] 8002b2a: bd10 pop {r4, pc} 8002b2c: 08003600 .word 0x08003600 8002b30: 08002a55 .word 0x08002a55 08002b34 <__sfp>: 8002b34: b5f8 push {r3, r4, r5, r6, r7, lr} 8002b36: 4b1c ldr r3, [pc, #112] ; (8002ba8 <__sfp+0x74>) 8002b38: 4607 mov r7, r0 8002b3a: 681e ldr r6, [r3, #0] 8002b3c: 69b3 ldr r3, [r6, #24] 8002b3e: b913 cbnz r3, 8002b46 <__sfp+0x12> 8002b40: 4630 mov r0, r6 8002b42: f7ff ffc7 bl 8002ad4 <__sinit> 8002b46: 3648 adds r6, #72 ; 0x48 8002b48: 68b4 ldr r4, [r6, #8] 8002b4a: 6873 ldr r3, [r6, #4] 8002b4c: 3b01 subs r3, #1 8002b4e: d503 bpl.n 8002b58 <__sfp+0x24> 8002b50: 6833 ldr r3, [r6, #0] 8002b52: b133 cbz r3, 8002b62 <__sfp+0x2e> 8002b54: 6836 ldr r6, [r6, #0] 8002b56: e7f7 b.n 8002b48 <__sfp+0x14> 8002b58: f9b4 500c ldrsh.w r5, [r4, #12] 8002b5c: b16d cbz r5, 8002b7a <__sfp+0x46> 8002b5e: 3468 adds r4, #104 ; 0x68 8002b60: e7f4 b.n 8002b4c <__sfp+0x18> 8002b62: 2104 movs r1, #4 8002b64: 4638 mov r0, r7 8002b66: f7ff ff9f bl 8002aa8 <__sfmoreglue> 8002b6a: 6030 str r0, [r6, #0] 8002b6c: 2800 cmp r0, #0 8002b6e: d1f1 bne.n 8002b54 <__sfp+0x20> 8002b70: 230c movs r3, #12 8002b72: 4604 mov r4, r0 8002b74: 603b str r3, [r7, #0] 8002b76: 4620 mov r0, r4 8002b78: bdf8 pop {r3, r4, r5, r6, r7, pc} 8002b7a: f64f 73ff movw r3, #65535 ; 0xffff 8002b7e: 81e3 strh r3, [r4, #14] 8002b80: 2301 movs r3, #1 8002b82: 6665 str r5, [r4, #100] ; 0x64 8002b84: 81a3 strh r3, [r4, #12] 8002b86: 6025 str r5, [r4, #0] 8002b88: 60a5 str r5, [r4, #8] 8002b8a: 6065 str r5, [r4, #4] 8002b8c: 6125 str r5, [r4, #16] 8002b8e: 6165 str r5, [r4, #20] 8002b90: 61a5 str r5, [r4, #24] 8002b92: 2208 movs r2, #8 8002b94: 4629 mov r1, r5 8002b96: f104 005c add.w r0, r4, #92 ; 0x5c 8002b9a: f7ff fcaf bl 80024fc 8002b9e: 6365 str r5, [r4, #52] ; 0x34 8002ba0: 63a5 str r5, [r4, #56] ; 0x38 8002ba2: 64a5 str r5, [r4, #72] ; 0x48 8002ba4: 64e5 str r5, [r4, #76] ; 0x4c 8002ba6: e7e6 b.n 8002b76 <__sfp+0x42> 8002ba8: 08003600 .word 0x08003600 08002bac <_fwalk_reent>: 8002bac: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8002bb0: 4680 mov r8, r0 8002bb2: 4689 mov r9, r1 8002bb4: 2600 movs r6, #0 8002bb6: f100 0448 add.w r4, r0, #72 ; 0x48 8002bba: b914 cbnz r4, 8002bc2 <_fwalk_reent+0x16> 8002bbc: 4630 mov r0, r6 8002bbe: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8002bc2: 68a5 ldr r5, [r4, #8] 8002bc4: 6867 ldr r7, [r4, #4] 8002bc6: 3f01 subs r7, #1 8002bc8: d501 bpl.n 8002bce <_fwalk_reent+0x22> 8002bca: 6824 ldr r4, [r4, #0] 8002bcc: e7f5 b.n 8002bba <_fwalk_reent+0xe> 8002bce: 89ab ldrh r3, [r5, #12] 8002bd0: 2b01 cmp r3, #1 8002bd2: d907 bls.n 8002be4 <_fwalk_reent+0x38> 8002bd4: f9b5 300e ldrsh.w r3, [r5, #14] 8002bd8: 3301 adds r3, #1 8002bda: d003 beq.n 8002be4 <_fwalk_reent+0x38> 8002bdc: 4629 mov r1, r5 8002bde: 4640 mov r0, r8 8002be0: 47c8 blx r9 8002be2: 4306 orrs r6, r0 8002be4: 3568 adds r5, #104 ; 0x68 8002be6: e7ee b.n 8002bc6 <_fwalk_reent+0x1a> 08002be8 <__swhatbuf_r>: 8002be8: b570 push {r4, r5, r6, lr} 8002bea: 460e mov r6, r1 8002bec: f9b1 100e ldrsh.w r1, [r1, #14] 8002bf0: b090 sub sp, #64 ; 0x40 8002bf2: 2900 cmp r1, #0 8002bf4: 4614 mov r4, r2 8002bf6: 461d mov r5, r3 8002bf8: da07 bge.n 8002c0a <__swhatbuf_r+0x22> 8002bfa: 2300 movs r3, #0 8002bfc: 602b str r3, [r5, #0] 8002bfe: 89b3 ldrh r3, [r6, #12] 8002c00: 061a lsls r2, r3, #24 8002c02: d410 bmi.n 8002c26 <__swhatbuf_r+0x3e> 8002c04: f44f 6380 mov.w r3, #1024 ; 0x400 8002c08: e00e b.n 8002c28 <__swhatbuf_r+0x40> 8002c0a: aa01 add r2, sp, #4 8002c0c: f000 fc4e bl 80034ac <_fstat_r> 8002c10: 2800 cmp r0, #0 8002c12: dbf2 blt.n 8002bfa <__swhatbuf_r+0x12> 8002c14: 9a02 ldr r2, [sp, #8] 8002c16: f402 4270 and.w r2, r2, #61440 ; 0xf000 8002c1a: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8002c1e: 425a negs r2, r3 8002c20: 415a adcs r2, r3 8002c22: 602a str r2, [r5, #0] 8002c24: e7ee b.n 8002c04 <__swhatbuf_r+0x1c> 8002c26: 2340 movs r3, #64 ; 0x40 8002c28: 2000 movs r0, #0 8002c2a: 6023 str r3, [r4, #0] 8002c2c: b010 add sp, #64 ; 0x40 8002c2e: bd70 pop {r4, r5, r6, pc} 08002c30 <__smakebuf_r>: 8002c30: 898b ldrh r3, [r1, #12] 8002c32: b573 push {r0, r1, r4, r5, r6, lr} 8002c34: 079d lsls r5, r3, #30 8002c36: 4606 mov r6, r0 8002c38: 460c mov r4, r1 8002c3a: d507 bpl.n 8002c4c <__smakebuf_r+0x1c> 8002c3c: f104 0347 add.w r3, r4, #71 ; 0x47 8002c40: 6023 str r3, [r4, #0] 8002c42: 6123 str r3, [r4, #16] 8002c44: 2301 movs r3, #1 8002c46: 6163 str r3, [r4, #20] 8002c48: b002 add sp, #8 8002c4a: bd70 pop {r4, r5, r6, pc} 8002c4c: ab01 add r3, sp, #4 8002c4e: 466a mov r2, sp 8002c50: f7ff ffca bl 8002be8 <__swhatbuf_r> 8002c54: 9900 ldr r1, [sp, #0] 8002c56: 4605 mov r5, r0 8002c58: 4630 mov r0, r6 8002c5a: f000 f87d bl 8002d58 <_malloc_r> 8002c5e: b948 cbnz r0, 8002c74 <__smakebuf_r+0x44> 8002c60: f9b4 300c ldrsh.w r3, [r4, #12] 8002c64: 059a lsls r2, r3, #22 8002c66: d4ef bmi.n 8002c48 <__smakebuf_r+0x18> 8002c68: f023 0303 bic.w r3, r3, #3 8002c6c: f043 0302 orr.w r3, r3, #2 8002c70: 81a3 strh r3, [r4, #12] 8002c72: e7e3 b.n 8002c3c <__smakebuf_r+0xc> 8002c74: 4b0d ldr r3, [pc, #52] ; (8002cac <__smakebuf_r+0x7c>) 8002c76: 62b3 str r3, [r6, #40] ; 0x28 8002c78: 89a3 ldrh r3, [r4, #12] 8002c7a: 6020 str r0, [r4, #0] 8002c7c: f043 0380 orr.w r3, r3, #128 ; 0x80 8002c80: 81a3 strh r3, [r4, #12] 8002c82: 9b00 ldr r3, [sp, #0] 8002c84: 6120 str r0, [r4, #16] 8002c86: 6163 str r3, [r4, #20] 8002c88: 9b01 ldr r3, [sp, #4] 8002c8a: b15b cbz r3, 8002ca4 <__smakebuf_r+0x74> 8002c8c: f9b4 100e ldrsh.w r1, [r4, #14] 8002c90: 4630 mov r0, r6 8002c92: f000 fc1d bl 80034d0 <_isatty_r> 8002c96: b128 cbz r0, 8002ca4 <__smakebuf_r+0x74> 8002c98: 89a3 ldrh r3, [r4, #12] 8002c9a: f023 0303 bic.w r3, r3, #3 8002c9e: f043 0301 orr.w r3, r3, #1 8002ca2: 81a3 strh r3, [r4, #12] 8002ca4: 89a3 ldrh r3, [r4, #12] 8002ca6: 431d orrs r5, r3 8002ca8: 81a5 strh r5, [r4, #12] 8002caa: e7cd b.n 8002c48 <__smakebuf_r+0x18> 8002cac: 08002a55 .word 0x08002a55 08002cb0 : 8002cb0: 4b02 ldr r3, [pc, #8] ; (8002cbc ) 8002cb2: 4601 mov r1, r0 8002cb4: 6818 ldr r0, [r3, #0] 8002cb6: f000 b84f b.w 8002d58 <_malloc_r> 8002cba: bf00 nop 8002cbc: 2000021c .word 0x2000021c 08002cc0 <_free_r>: 8002cc0: b538 push {r3, r4, r5, lr} 8002cc2: 4605 mov r5, r0 8002cc4: 2900 cmp r1, #0 8002cc6: d043 beq.n 8002d50 <_free_r+0x90> 8002cc8: f851 3c04 ldr.w r3, [r1, #-4] 8002ccc: 1f0c subs r4, r1, #4 8002cce: 2b00 cmp r3, #0 8002cd0: bfb8 it lt 8002cd2: 18e4 addlt r4, r4, r3 8002cd4: f000 fc2c bl 8003530 <__malloc_lock> 8002cd8: 4a1e ldr r2, [pc, #120] ; (8002d54 <_free_r+0x94>) 8002cda: 6813 ldr r3, [r2, #0] 8002cdc: 4610 mov r0, r2 8002cde: b933 cbnz r3, 8002cee <_free_r+0x2e> 8002ce0: 6063 str r3, [r4, #4] 8002ce2: 6014 str r4, [r2, #0] 8002ce4: 4628 mov r0, r5 8002ce6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8002cea: f000 bc22 b.w 8003532 <__malloc_unlock> 8002cee: 42a3 cmp r3, r4 8002cf0: d90b bls.n 8002d0a <_free_r+0x4a> 8002cf2: 6821 ldr r1, [r4, #0] 8002cf4: 1862 adds r2, r4, r1 8002cf6: 4293 cmp r3, r2 8002cf8: bf01 itttt eq 8002cfa: 681a ldreq r2, [r3, #0] 8002cfc: 685b ldreq r3, [r3, #4] 8002cfe: 1852 addeq r2, r2, r1 8002d00: 6022 streq r2, [r4, #0] 8002d02: 6063 str r3, [r4, #4] 8002d04: 6004 str r4, [r0, #0] 8002d06: e7ed b.n 8002ce4 <_free_r+0x24> 8002d08: 4613 mov r3, r2 8002d0a: 685a ldr r2, [r3, #4] 8002d0c: b10a cbz r2, 8002d12 <_free_r+0x52> 8002d0e: 42a2 cmp r2, r4 8002d10: d9fa bls.n 8002d08 <_free_r+0x48> 8002d12: 6819 ldr r1, [r3, #0] 8002d14: 1858 adds r0, r3, r1 8002d16: 42a0 cmp r0, r4 8002d18: d10b bne.n 8002d32 <_free_r+0x72> 8002d1a: 6820 ldr r0, [r4, #0] 8002d1c: 4401 add r1, r0 8002d1e: 1858 adds r0, r3, r1 8002d20: 4282 cmp r2, r0 8002d22: 6019 str r1, [r3, #0] 8002d24: d1de bne.n 8002ce4 <_free_r+0x24> 8002d26: 6810 ldr r0, [r2, #0] 8002d28: 6852 ldr r2, [r2, #4] 8002d2a: 4401 add r1, r0 8002d2c: 6019 str r1, [r3, #0] 8002d2e: 605a str r2, [r3, #4] 8002d30: e7d8 b.n 8002ce4 <_free_r+0x24> 8002d32: d902 bls.n 8002d3a <_free_r+0x7a> 8002d34: 230c movs r3, #12 8002d36: 602b str r3, [r5, #0] 8002d38: e7d4 b.n 8002ce4 <_free_r+0x24> 8002d3a: 6820 ldr r0, [r4, #0] 8002d3c: 1821 adds r1, r4, r0 8002d3e: 428a cmp r2, r1 8002d40: bf01 itttt eq 8002d42: 6811 ldreq r1, [r2, #0] 8002d44: 6852 ldreq r2, [r2, #4] 8002d46: 1809 addeq r1, r1, r0 8002d48: 6021 streq r1, [r4, #0] 8002d4a: 6062 str r2, [r4, #4] 8002d4c: 605c str r4, [r3, #4] 8002d4e: e7c9 b.n 8002ce4 <_free_r+0x24> 8002d50: bd38 pop {r3, r4, r5, pc} 8002d52: bf00 nop 8002d54: 200002d0 .word 0x200002d0 08002d58 <_malloc_r>: 8002d58: b570 push {r4, r5, r6, lr} 8002d5a: 1ccd adds r5, r1, #3 8002d5c: f025 0503 bic.w r5, r5, #3 8002d60: 3508 adds r5, #8 8002d62: 2d0c cmp r5, #12 8002d64: bf38 it cc 8002d66: 250c movcc r5, #12 8002d68: 2d00 cmp r5, #0 8002d6a: 4606 mov r6, r0 8002d6c: db01 blt.n 8002d72 <_malloc_r+0x1a> 8002d6e: 42a9 cmp r1, r5 8002d70: d903 bls.n 8002d7a <_malloc_r+0x22> 8002d72: 230c movs r3, #12 8002d74: 6033 str r3, [r6, #0] 8002d76: 2000 movs r0, #0 8002d78: bd70 pop {r4, r5, r6, pc} 8002d7a: f000 fbd9 bl 8003530 <__malloc_lock> 8002d7e: 4a23 ldr r2, [pc, #140] ; (8002e0c <_malloc_r+0xb4>) 8002d80: 6814 ldr r4, [r2, #0] 8002d82: 4621 mov r1, r4 8002d84: b991 cbnz r1, 8002dac <_malloc_r+0x54> 8002d86: 4c22 ldr r4, [pc, #136] ; (8002e10 <_malloc_r+0xb8>) 8002d88: 6823 ldr r3, [r4, #0] 8002d8a: b91b cbnz r3, 8002d94 <_malloc_r+0x3c> 8002d8c: 4630 mov r0, r6 8002d8e: f000 fb17 bl 80033c0 <_sbrk_r> 8002d92: 6020 str r0, [r4, #0] 8002d94: 4629 mov r1, r5 8002d96: 4630 mov r0, r6 8002d98: f000 fb12 bl 80033c0 <_sbrk_r> 8002d9c: 1c43 adds r3, r0, #1 8002d9e: d126 bne.n 8002dee <_malloc_r+0x96> 8002da0: 230c movs r3, #12 8002da2: 4630 mov r0, r6 8002da4: 6033 str r3, [r6, #0] 8002da6: f000 fbc4 bl 8003532 <__malloc_unlock> 8002daa: e7e4 b.n 8002d76 <_malloc_r+0x1e> 8002dac: 680b ldr r3, [r1, #0] 8002dae: 1b5b subs r3, r3, r5 8002db0: d41a bmi.n 8002de8 <_malloc_r+0x90> 8002db2: 2b0b cmp r3, #11 8002db4: d90f bls.n 8002dd6 <_malloc_r+0x7e> 8002db6: 600b str r3, [r1, #0] 8002db8: 18cc adds r4, r1, r3 8002dba: 50cd str r5, [r1, r3] 8002dbc: 4630 mov r0, r6 8002dbe: f000 fbb8 bl 8003532 <__malloc_unlock> 8002dc2: f104 000b add.w r0, r4, #11 8002dc6: 1d23 adds r3, r4, #4 8002dc8: f020 0007 bic.w r0, r0, #7 8002dcc: 1ac3 subs r3, r0, r3 8002dce: d01b beq.n 8002e08 <_malloc_r+0xb0> 8002dd0: 425a negs r2, r3 8002dd2: 50e2 str r2, [r4, r3] 8002dd4: bd70 pop {r4, r5, r6, pc} 8002dd6: 428c cmp r4, r1 8002dd8: bf0b itete eq 8002dda: 6863 ldreq r3, [r4, #4] 8002ddc: 684b ldrne r3, [r1, #4] 8002dde: 6013 streq r3, [r2, #0] 8002de0: 6063 strne r3, [r4, #4] 8002de2: bf18 it ne 8002de4: 460c movne r4, r1 8002de6: e7e9 b.n 8002dbc <_malloc_r+0x64> 8002de8: 460c mov r4, r1 8002dea: 6849 ldr r1, [r1, #4] 8002dec: e7ca b.n 8002d84 <_malloc_r+0x2c> 8002dee: 1cc4 adds r4, r0, #3 8002df0: f024 0403 bic.w r4, r4, #3 8002df4: 42a0 cmp r0, r4 8002df6: d005 beq.n 8002e04 <_malloc_r+0xac> 8002df8: 1a21 subs r1, r4, r0 8002dfa: 4630 mov r0, r6 8002dfc: f000 fae0 bl 80033c0 <_sbrk_r> 8002e00: 3001 adds r0, #1 8002e02: d0cd beq.n 8002da0 <_malloc_r+0x48> 8002e04: 6025 str r5, [r4, #0] 8002e06: e7d9 b.n 8002dbc <_malloc_r+0x64> 8002e08: bd70 pop {r4, r5, r6, pc} 8002e0a: bf00 nop 8002e0c: 200002d0 .word 0x200002d0 8002e10: 200002d4 .word 0x200002d4 08002e14 <__sfputc_r>: 8002e14: 6893 ldr r3, [r2, #8] 8002e16: b410 push {r4} 8002e18: 3b01 subs r3, #1 8002e1a: 2b00 cmp r3, #0 8002e1c: 6093 str r3, [r2, #8] 8002e1e: da08 bge.n 8002e32 <__sfputc_r+0x1e> 8002e20: 6994 ldr r4, [r2, #24] 8002e22: 42a3 cmp r3, r4 8002e24: db02 blt.n 8002e2c <__sfputc_r+0x18> 8002e26: b2cb uxtb r3, r1 8002e28: 2b0a cmp r3, #10 8002e2a: d102 bne.n 8002e32 <__sfputc_r+0x1e> 8002e2c: bc10 pop {r4} 8002e2e: f7ff bc9f b.w 8002770 <__swbuf_r> 8002e32: 6813 ldr r3, [r2, #0] 8002e34: 1c58 adds r0, r3, #1 8002e36: 6010 str r0, [r2, #0] 8002e38: 7019 strb r1, [r3, #0] 8002e3a: b2c8 uxtb r0, r1 8002e3c: bc10 pop {r4} 8002e3e: 4770 bx lr 08002e40 <__sfputs_r>: 8002e40: b5f8 push {r3, r4, r5, r6, r7, lr} 8002e42: 4606 mov r6, r0 8002e44: 460f mov r7, r1 8002e46: 4614 mov r4, r2 8002e48: 18d5 adds r5, r2, r3 8002e4a: 42ac cmp r4, r5 8002e4c: d101 bne.n 8002e52 <__sfputs_r+0x12> 8002e4e: 2000 movs r0, #0 8002e50: e007 b.n 8002e62 <__sfputs_r+0x22> 8002e52: 463a mov r2, r7 8002e54: f814 1b01 ldrb.w r1, [r4], #1 8002e58: 4630 mov r0, r6 8002e5a: f7ff ffdb bl 8002e14 <__sfputc_r> 8002e5e: 1c43 adds r3, r0, #1 8002e60: d1f3 bne.n 8002e4a <__sfputs_r+0xa> 8002e62: bdf8 pop {r3, r4, r5, r6, r7, pc} 08002e64 <_vfiprintf_r>: 8002e64: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8002e68: b09d sub sp, #116 ; 0x74 8002e6a: 460c mov r4, r1 8002e6c: 4617 mov r7, r2 8002e6e: 9303 str r3, [sp, #12] 8002e70: 4606 mov r6, r0 8002e72: b118 cbz r0, 8002e7c <_vfiprintf_r+0x18> 8002e74: 6983 ldr r3, [r0, #24] 8002e76: b90b cbnz r3, 8002e7c <_vfiprintf_r+0x18> 8002e78: f7ff fe2c bl 8002ad4 <__sinit> 8002e7c: 4b7c ldr r3, [pc, #496] ; (8003070 <_vfiprintf_r+0x20c>) 8002e7e: 429c cmp r4, r3 8002e80: d157 bne.n 8002f32 <_vfiprintf_r+0xce> 8002e82: 6874 ldr r4, [r6, #4] 8002e84: 89a3 ldrh r3, [r4, #12] 8002e86: 0718 lsls r0, r3, #28 8002e88: d55d bpl.n 8002f46 <_vfiprintf_r+0xe2> 8002e8a: 6923 ldr r3, [r4, #16] 8002e8c: 2b00 cmp r3, #0 8002e8e: d05a beq.n 8002f46 <_vfiprintf_r+0xe2> 8002e90: 2300 movs r3, #0 8002e92: 9309 str r3, [sp, #36] ; 0x24 8002e94: 2320 movs r3, #32 8002e96: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8002e9a: 2330 movs r3, #48 ; 0x30 8002e9c: f04f 0b01 mov.w fp, #1 8002ea0: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8002ea4: 46b8 mov r8, r7 8002ea6: 4645 mov r5, r8 8002ea8: f815 3b01 ldrb.w r3, [r5], #1 8002eac: 2b00 cmp r3, #0 8002eae: d155 bne.n 8002f5c <_vfiprintf_r+0xf8> 8002eb0: ebb8 0a07 subs.w sl, r8, r7 8002eb4: d00b beq.n 8002ece <_vfiprintf_r+0x6a> 8002eb6: 4653 mov r3, sl 8002eb8: 463a mov r2, r7 8002eba: 4621 mov r1, r4 8002ebc: 4630 mov r0, r6 8002ebe: f7ff ffbf bl 8002e40 <__sfputs_r> 8002ec2: 3001 adds r0, #1 8002ec4: f000 80c4 beq.w 8003050 <_vfiprintf_r+0x1ec> 8002ec8: 9b09 ldr r3, [sp, #36] ; 0x24 8002eca: 4453 add r3, sl 8002ecc: 9309 str r3, [sp, #36] ; 0x24 8002ece: f898 3000 ldrb.w r3, [r8] 8002ed2: 2b00 cmp r3, #0 8002ed4: f000 80bc beq.w 8003050 <_vfiprintf_r+0x1ec> 8002ed8: 2300 movs r3, #0 8002eda: f04f 32ff mov.w r2, #4294967295 8002ede: 9304 str r3, [sp, #16] 8002ee0: 9307 str r3, [sp, #28] 8002ee2: 9205 str r2, [sp, #20] 8002ee4: 9306 str r3, [sp, #24] 8002ee6: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8002eea: 931a str r3, [sp, #104] ; 0x68 8002eec: 2205 movs r2, #5 8002eee: 7829 ldrb r1, [r5, #0] 8002ef0: 4860 ldr r0, [pc, #384] ; (8003074 <_vfiprintf_r+0x210>) 8002ef2: f000 fb0f bl 8003514 8002ef6: f105 0801 add.w r8, r5, #1 8002efa: 9b04 ldr r3, [sp, #16] 8002efc: 2800 cmp r0, #0 8002efe: d131 bne.n 8002f64 <_vfiprintf_r+0x100> 8002f00: 06d9 lsls r1, r3, #27 8002f02: bf44 itt mi 8002f04: 2220 movmi r2, #32 8002f06: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002f0a: 071a lsls r2, r3, #28 8002f0c: bf44 itt mi 8002f0e: 222b movmi r2, #43 ; 0x2b 8002f10: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8002f14: 782a ldrb r2, [r5, #0] 8002f16: 2a2a cmp r2, #42 ; 0x2a 8002f18: d02c beq.n 8002f74 <_vfiprintf_r+0x110> 8002f1a: 2100 movs r1, #0 8002f1c: 200a movs r0, #10 8002f1e: 9a07 ldr r2, [sp, #28] 8002f20: 46a8 mov r8, r5 8002f22: f898 3000 ldrb.w r3, [r8] 8002f26: 3501 adds r5, #1 8002f28: 3b30 subs r3, #48 ; 0x30 8002f2a: 2b09 cmp r3, #9 8002f2c: d96d bls.n 800300a <_vfiprintf_r+0x1a6> 8002f2e: b371 cbz r1, 8002f8e <_vfiprintf_r+0x12a> 8002f30: e026 b.n 8002f80 <_vfiprintf_r+0x11c> 8002f32: 4b51 ldr r3, [pc, #324] ; (8003078 <_vfiprintf_r+0x214>) 8002f34: 429c cmp r4, r3 8002f36: d101 bne.n 8002f3c <_vfiprintf_r+0xd8> 8002f38: 68b4 ldr r4, [r6, #8] 8002f3a: e7a3 b.n 8002e84 <_vfiprintf_r+0x20> 8002f3c: 4b4f ldr r3, [pc, #316] ; (800307c <_vfiprintf_r+0x218>) 8002f3e: 429c cmp r4, r3 8002f40: bf08 it eq 8002f42: 68f4 ldreq r4, [r6, #12] 8002f44: e79e b.n 8002e84 <_vfiprintf_r+0x20> 8002f46: 4621 mov r1, r4 8002f48: 4630 mov r0, r6 8002f4a: f7ff fc63 bl 8002814 <__swsetup_r> 8002f4e: 2800 cmp r0, #0 8002f50: d09e beq.n 8002e90 <_vfiprintf_r+0x2c> 8002f52: f04f 30ff mov.w r0, #4294967295 8002f56: b01d add sp, #116 ; 0x74 8002f58: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002f5c: 2b25 cmp r3, #37 ; 0x25 8002f5e: d0a7 beq.n 8002eb0 <_vfiprintf_r+0x4c> 8002f60: 46a8 mov r8, r5 8002f62: e7a0 b.n 8002ea6 <_vfiprintf_r+0x42> 8002f64: 4a43 ldr r2, [pc, #268] ; (8003074 <_vfiprintf_r+0x210>) 8002f66: 4645 mov r5, r8 8002f68: 1a80 subs r0, r0, r2 8002f6a: fa0b f000 lsl.w r0, fp, r0 8002f6e: 4318 orrs r0, r3 8002f70: 9004 str r0, [sp, #16] 8002f72: e7bb b.n 8002eec <_vfiprintf_r+0x88> 8002f74: 9a03 ldr r2, [sp, #12] 8002f76: 1d11 adds r1, r2, #4 8002f78: 6812 ldr r2, [r2, #0] 8002f7a: 9103 str r1, [sp, #12] 8002f7c: 2a00 cmp r2, #0 8002f7e: db01 blt.n 8002f84 <_vfiprintf_r+0x120> 8002f80: 9207 str r2, [sp, #28] 8002f82: e004 b.n 8002f8e <_vfiprintf_r+0x12a> 8002f84: 4252 negs r2, r2 8002f86: f043 0302 orr.w r3, r3, #2 8002f8a: 9207 str r2, [sp, #28] 8002f8c: 9304 str r3, [sp, #16] 8002f8e: f898 3000 ldrb.w r3, [r8] 8002f92: 2b2e cmp r3, #46 ; 0x2e 8002f94: d110 bne.n 8002fb8 <_vfiprintf_r+0x154> 8002f96: f898 3001 ldrb.w r3, [r8, #1] 8002f9a: f108 0101 add.w r1, r8, #1 8002f9e: 2b2a cmp r3, #42 ; 0x2a 8002fa0: d137 bne.n 8003012 <_vfiprintf_r+0x1ae> 8002fa2: 9b03 ldr r3, [sp, #12] 8002fa4: f108 0802 add.w r8, r8, #2 8002fa8: 1d1a adds r2, r3, #4 8002faa: 681b ldr r3, [r3, #0] 8002fac: 9203 str r2, [sp, #12] 8002fae: 2b00 cmp r3, #0 8002fb0: bfb8 it lt 8002fb2: f04f 33ff movlt.w r3, #4294967295 8002fb6: 9305 str r3, [sp, #20] 8002fb8: 4d31 ldr r5, [pc, #196] ; (8003080 <_vfiprintf_r+0x21c>) 8002fba: 2203 movs r2, #3 8002fbc: f898 1000 ldrb.w r1, [r8] 8002fc0: 4628 mov r0, r5 8002fc2: f000 faa7 bl 8003514 8002fc6: b140 cbz r0, 8002fda <_vfiprintf_r+0x176> 8002fc8: 2340 movs r3, #64 ; 0x40 8002fca: 1b40 subs r0, r0, r5 8002fcc: fa03 f000 lsl.w r0, r3, r0 8002fd0: 9b04 ldr r3, [sp, #16] 8002fd2: f108 0801 add.w r8, r8, #1 8002fd6: 4303 orrs r3, r0 8002fd8: 9304 str r3, [sp, #16] 8002fda: f898 1000 ldrb.w r1, [r8] 8002fde: 2206 movs r2, #6 8002fe0: 4828 ldr r0, [pc, #160] ; (8003084 <_vfiprintf_r+0x220>) 8002fe2: f108 0701 add.w r7, r8, #1 8002fe6: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8002fea: f000 fa93 bl 8003514 8002fee: 2800 cmp r0, #0 8002ff0: d034 beq.n 800305c <_vfiprintf_r+0x1f8> 8002ff2: 4b25 ldr r3, [pc, #148] ; (8003088 <_vfiprintf_r+0x224>) 8002ff4: bb03 cbnz r3, 8003038 <_vfiprintf_r+0x1d4> 8002ff6: 9b03 ldr r3, [sp, #12] 8002ff8: 3307 adds r3, #7 8002ffa: f023 0307 bic.w r3, r3, #7 8002ffe: 3308 adds r3, #8 8003000: 9303 str r3, [sp, #12] 8003002: 9b09 ldr r3, [sp, #36] ; 0x24 8003004: 444b add r3, r9 8003006: 9309 str r3, [sp, #36] ; 0x24 8003008: e74c b.n 8002ea4 <_vfiprintf_r+0x40> 800300a: fb00 3202 mla r2, r0, r2, r3 800300e: 2101 movs r1, #1 8003010: e786 b.n 8002f20 <_vfiprintf_r+0xbc> 8003012: 2300 movs r3, #0 8003014: 250a movs r5, #10 8003016: 4618 mov r0, r3 8003018: 9305 str r3, [sp, #20] 800301a: 4688 mov r8, r1 800301c: f898 2000 ldrb.w r2, [r8] 8003020: 3101 adds r1, #1 8003022: 3a30 subs r2, #48 ; 0x30 8003024: 2a09 cmp r2, #9 8003026: d903 bls.n 8003030 <_vfiprintf_r+0x1cc> 8003028: 2b00 cmp r3, #0 800302a: d0c5 beq.n 8002fb8 <_vfiprintf_r+0x154> 800302c: 9005 str r0, [sp, #20] 800302e: e7c3 b.n 8002fb8 <_vfiprintf_r+0x154> 8003030: fb05 2000 mla r0, r5, r0, r2 8003034: 2301 movs r3, #1 8003036: e7f0 b.n 800301a <_vfiprintf_r+0x1b6> 8003038: ab03 add r3, sp, #12 800303a: 9300 str r3, [sp, #0] 800303c: 4622 mov r2, r4 800303e: 4b13 ldr r3, [pc, #76] ; (800308c <_vfiprintf_r+0x228>) 8003040: a904 add r1, sp, #16 8003042: 4630 mov r0, r6 8003044: f3af 8000 nop.w 8003048: f1b0 3fff cmp.w r0, #4294967295 800304c: 4681 mov r9, r0 800304e: d1d8 bne.n 8003002 <_vfiprintf_r+0x19e> 8003050: 89a3 ldrh r3, [r4, #12] 8003052: 065b lsls r3, r3, #25 8003054: f53f af7d bmi.w 8002f52 <_vfiprintf_r+0xee> 8003058: 9809 ldr r0, [sp, #36] ; 0x24 800305a: e77c b.n 8002f56 <_vfiprintf_r+0xf2> 800305c: ab03 add r3, sp, #12 800305e: 9300 str r3, [sp, #0] 8003060: 4622 mov r2, r4 8003062: 4b0a ldr r3, [pc, #40] ; (800308c <_vfiprintf_r+0x228>) 8003064: a904 add r1, sp, #16 8003066: 4630 mov r0, r6 8003068: f000 f88a bl 8003180 <_printf_i> 800306c: e7ec b.n 8003048 <_vfiprintf_r+0x1e4> 800306e: bf00 nop 8003070: 08003624 .word 0x08003624 8003074: 08003664 .word 0x08003664 8003078: 08003644 .word 0x08003644 800307c: 08003604 .word 0x08003604 8003080: 0800366a .word 0x0800366a 8003084: 0800366e .word 0x0800366e 8003088: 00000000 .word 0x00000000 800308c: 08002e41 .word 0x08002e41 08003090 <_printf_common>: 8003090: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8003094: 4691 mov r9, r2 8003096: 461f mov r7, r3 8003098: 688a ldr r2, [r1, #8] 800309a: 690b ldr r3, [r1, #16] 800309c: 4606 mov r6, r0 800309e: 4293 cmp r3, r2 80030a0: bfb8 it lt 80030a2: 4613 movlt r3, r2 80030a4: f8c9 3000 str.w r3, [r9] 80030a8: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 80030ac: 460c mov r4, r1 80030ae: f8dd 8020 ldr.w r8, [sp, #32] 80030b2: b112 cbz r2, 80030ba <_printf_common+0x2a> 80030b4: 3301 adds r3, #1 80030b6: f8c9 3000 str.w r3, [r9] 80030ba: 6823 ldr r3, [r4, #0] 80030bc: 0699 lsls r1, r3, #26 80030be: bf42 ittt mi 80030c0: f8d9 3000 ldrmi.w r3, [r9] 80030c4: 3302 addmi r3, #2 80030c6: f8c9 3000 strmi.w r3, [r9] 80030ca: 6825 ldr r5, [r4, #0] 80030cc: f015 0506 ands.w r5, r5, #6 80030d0: d107 bne.n 80030e2 <_printf_common+0x52> 80030d2: f104 0a19 add.w sl, r4, #25 80030d6: 68e3 ldr r3, [r4, #12] 80030d8: f8d9 2000 ldr.w r2, [r9] 80030dc: 1a9b subs r3, r3, r2 80030de: 429d cmp r5, r3 80030e0: db2a blt.n 8003138 <_printf_common+0xa8> 80030e2: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 80030e6: 6822 ldr r2, [r4, #0] 80030e8: 3300 adds r3, #0 80030ea: bf18 it ne 80030ec: 2301 movne r3, #1 80030ee: 0692 lsls r2, r2, #26 80030f0: d42f bmi.n 8003152 <_printf_common+0xc2> 80030f2: f104 0243 add.w r2, r4, #67 ; 0x43 80030f6: 4639 mov r1, r7 80030f8: 4630 mov r0, r6 80030fa: 47c0 blx r8 80030fc: 3001 adds r0, #1 80030fe: d022 beq.n 8003146 <_printf_common+0xb6> 8003100: 6823 ldr r3, [r4, #0] 8003102: 68e5 ldr r5, [r4, #12] 8003104: f003 0306 and.w r3, r3, #6 8003108: 2b04 cmp r3, #4 800310a: bf18 it ne 800310c: 2500 movne r5, #0 800310e: f8d9 2000 ldr.w r2, [r9] 8003112: f04f 0900 mov.w r9, #0 8003116: bf08 it eq 8003118: 1aad subeq r5, r5, r2 800311a: 68a3 ldr r3, [r4, #8] 800311c: 6922 ldr r2, [r4, #16] 800311e: bf08 it eq 8003120: ea25 75e5 biceq.w r5, r5, r5, asr #31 8003124: 4293 cmp r3, r2 8003126: bfc4 itt gt 8003128: 1a9b subgt r3, r3, r2 800312a: 18ed addgt r5, r5, r3 800312c: 341a adds r4, #26 800312e: 454d cmp r5, r9 8003130: d11b bne.n 800316a <_printf_common+0xda> 8003132: 2000 movs r0, #0 8003134: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8003138: 2301 movs r3, #1 800313a: 4652 mov r2, sl 800313c: 4639 mov r1, r7 800313e: 4630 mov r0, r6 8003140: 47c0 blx r8 8003142: 3001 adds r0, #1 8003144: d103 bne.n 800314e <_printf_common+0xbe> 8003146: f04f 30ff mov.w r0, #4294967295 800314a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800314e: 3501 adds r5, #1 8003150: e7c1 b.n 80030d6 <_printf_common+0x46> 8003152: 2030 movs r0, #48 ; 0x30 8003154: 18e1 adds r1, r4, r3 8003156: f881 0043 strb.w r0, [r1, #67] ; 0x43 800315a: 1c5a adds r2, r3, #1 800315c: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8003160: 4422 add r2, r4 8003162: 3302 adds r3, #2 8003164: f882 1043 strb.w r1, [r2, #67] ; 0x43 8003168: e7c3 b.n 80030f2 <_printf_common+0x62> 800316a: 2301 movs r3, #1 800316c: 4622 mov r2, r4 800316e: 4639 mov r1, r7 8003170: 4630 mov r0, r6 8003172: 47c0 blx r8 8003174: 3001 adds r0, #1 8003176: d0e6 beq.n 8003146 <_printf_common+0xb6> 8003178: f109 0901 add.w r9, r9, #1 800317c: e7d7 b.n 800312e <_printf_common+0x9e> ... 08003180 <_printf_i>: 8003180: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8003184: 4617 mov r7, r2 8003186: 7e0a ldrb r2, [r1, #24] 8003188: b085 sub sp, #20 800318a: 2a6e cmp r2, #110 ; 0x6e 800318c: 4698 mov r8, r3 800318e: 4606 mov r6, r0 8003190: 460c mov r4, r1 8003192: 9b0c ldr r3, [sp, #48] ; 0x30 8003194: f101 0e43 add.w lr, r1, #67 ; 0x43 8003198: f000 80bc beq.w 8003314 <_printf_i+0x194> 800319c: d81a bhi.n 80031d4 <_printf_i+0x54> 800319e: 2a63 cmp r2, #99 ; 0x63 80031a0: d02e beq.n 8003200 <_printf_i+0x80> 80031a2: d80a bhi.n 80031ba <_printf_i+0x3a> 80031a4: 2a00 cmp r2, #0 80031a6: f000 80c8 beq.w 800333a <_printf_i+0x1ba> 80031aa: 2a58 cmp r2, #88 ; 0x58 80031ac: f000 808a beq.w 80032c4 <_printf_i+0x144> 80031b0: f104 0542 add.w r5, r4, #66 ; 0x42 80031b4: f884 2042 strb.w r2, [r4, #66] ; 0x42 80031b8: e02a b.n 8003210 <_printf_i+0x90> 80031ba: 2a64 cmp r2, #100 ; 0x64 80031bc: d001 beq.n 80031c2 <_printf_i+0x42> 80031be: 2a69 cmp r2, #105 ; 0x69 80031c0: d1f6 bne.n 80031b0 <_printf_i+0x30> 80031c2: 6821 ldr r1, [r4, #0] 80031c4: 681a ldr r2, [r3, #0] 80031c6: f011 0f80 tst.w r1, #128 ; 0x80 80031ca: d023 beq.n 8003214 <_printf_i+0x94> 80031cc: 1d11 adds r1, r2, #4 80031ce: 6019 str r1, [r3, #0] 80031d0: 6813 ldr r3, [r2, #0] 80031d2: e027 b.n 8003224 <_printf_i+0xa4> 80031d4: 2a73 cmp r2, #115 ; 0x73 80031d6: f000 80b4 beq.w 8003342 <_printf_i+0x1c2> 80031da: d808 bhi.n 80031ee <_printf_i+0x6e> 80031dc: 2a6f cmp r2, #111 ; 0x6f 80031de: d02a beq.n 8003236 <_printf_i+0xb6> 80031e0: 2a70 cmp r2, #112 ; 0x70 80031e2: d1e5 bne.n 80031b0 <_printf_i+0x30> 80031e4: 680a ldr r2, [r1, #0] 80031e6: f042 0220 orr.w r2, r2, #32 80031ea: 600a str r2, [r1, #0] 80031ec: e003 b.n 80031f6 <_printf_i+0x76> 80031ee: 2a75 cmp r2, #117 ; 0x75 80031f0: d021 beq.n 8003236 <_printf_i+0xb6> 80031f2: 2a78 cmp r2, #120 ; 0x78 80031f4: d1dc bne.n 80031b0 <_printf_i+0x30> 80031f6: 2278 movs r2, #120 ; 0x78 80031f8: 496f ldr r1, [pc, #444] ; (80033b8 <_printf_i+0x238>) 80031fa: f884 2045 strb.w r2, [r4, #69] ; 0x45 80031fe: e064 b.n 80032ca <_printf_i+0x14a> 8003200: 681a ldr r2, [r3, #0] 8003202: f101 0542 add.w r5, r1, #66 ; 0x42 8003206: 1d11 adds r1, r2, #4 8003208: 6019 str r1, [r3, #0] 800320a: 6813 ldr r3, [r2, #0] 800320c: f884 3042 strb.w r3, [r4, #66] ; 0x42 8003210: 2301 movs r3, #1 8003212: e0a3 b.n 800335c <_printf_i+0x1dc> 8003214: f011 0f40 tst.w r1, #64 ; 0x40 8003218: f102 0104 add.w r1, r2, #4 800321c: 6019 str r1, [r3, #0] 800321e: d0d7 beq.n 80031d0 <_printf_i+0x50> 8003220: f9b2 3000 ldrsh.w r3, [r2] 8003224: 2b00 cmp r3, #0 8003226: da03 bge.n 8003230 <_printf_i+0xb0> 8003228: 222d movs r2, #45 ; 0x2d 800322a: 425b negs r3, r3 800322c: f884 2043 strb.w r2, [r4, #67] ; 0x43 8003230: 4962 ldr r1, [pc, #392] ; (80033bc <_printf_i+0x23c>) 8003232: 220a movs r2, #10 8003234: e017 b.n 8003266 <_printf_i+0xe6> 8003236: 6820 ldr r0, [r4, #0] 8003238: 6819 ldr r1, [r3, #0] 800323a: f010 0f80 tst.w r0, #128 ; 0x80 800323e: d003 beq.n 8003248 <_printf_i+0xc8> 8003240: 1d08 adds r0, r1, #4 8003242: 6018 str r0, [r3, #0] 8003244: 680b ldr r3, [r1, #0] 8003246: e006 b.n 8003256 <_printf_i+0xd6> 8003248: f010 0f40 tst.w r0, #64 ; 0x40 800324c: f101 0004 add.w r0, r1, #4 8003250: 6018 str r0, [r3, #0] 8003252: d0f7 beq.n 8003244 <_printf_i+0xc4> 8003254: 880b ldrh r3, [r1, #0] 8003256: 2a6f cmp r2, #111 ; 0x6f 8003258: bf14 ite ne 800325a: 220a movne r2, #10 800325c: 2208 moveq r2, #8 800325e: 4957 ldr r1, [pc, #348] ; (80033bc <_printf_i+0x23c>) 8003260: 2000 movs r0, #0 8003262: f884 0043 strb.w r0, [r4, #67] ; 0x43 8003266: 6865 ldr r5, [r4, #4] 8003268: 2d00 cmp r5, #0 800326a: 60a5 str r5, [r4, #8] 800326c: f2c0 809c blt.w 80033a8 <_printf_i+0x228> 8003270: 6820 ldr r0, [r4, #0] 8003272: f020 0004 bic.w r0, r0, #4 8003276: 6020 str r0, [r4, #0] 8003278: 2b00 cmp r3, #0 800327a: d13f bne.n 80032fc <_printf_i+0x17c> 800327c: 2d00 cmp r5, #0 800327e: f040 8095 bne.w 80033ac <_printf_i+0x22c> 8003282: 4675 mov r5, lr 8003284: 2a08 cmp r2, #8 8003286: d10b bne.n 80032a0 <_printf_i+0x120> 8003288: 6823 ldr r3, [r4, #0] 800328a: 07da lsls r2, r3, #31 800328c: d508 bpl.n 80032a0 <_printf_i+0x120> 800328e: 6923 ldr r3, [r4, #16] 8003290: 6862 ldr r2, [r4, #4] 8003292: 429a cmp r2, r3 8003294: bfde ittt le 8003296: 2330 movle r3, #48 ; 0x30 8003298: f805 3c01 strble.w r3, [r5, #-1] 800329c: f105 35ff addle.w r5, r5, #4294967295 80032a0: ebae 0305 sub.w r3, lr, r5 80032a4: 6123 str r3, [r4, #16] 80032a6: f8cd 8000 str.w r8, [sp] 80032aa: 463b mov r3, r7 80032ac: aa03 add r2, sp, #12 80032ae: 4621 mov r1, r4 80032b0: 4630 mov r0, r6 80032b2: f7ff feed bl 8003090 <_printf_common> 80032b6: 3001 adds r0, #1 80032b8: d155 bne.n 8003366 <_printf_i+0x1e6> 80032ba: f04f 30ff mov.w r0, #4294967295 80032be: b005 add sp, #20 80032c0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80032c4: f881 2045 strb.w r2, [r1, #69] ; 0x45 80032c8: 493c ldr r1, [pc, #240] ; (80033bc <_printf_i+0x23c>) 80032ca: 6822 ldr r2, [r4, #0] 80032cc: 6818 ldr r0, [r3, #0] 80032ce: f012 0f80 tst.w r2, #128 ; 0x80 80032d2: f100 0504 add.w r5, r0, #4 80032d6: 601d str r5, [r3, #0] 80032d8: d001 beq.n 80032de <_printf_i+0x15e> 80032da: 6803 ldr r3, [r0, #0] 80032dc: e002 b.n 80032e4 <_printf_i+0x164> 80032de: 0655 lsls r5, r2, #25 80032e0: d5fb bpl.n 80032da <_printf_i+0x15a> 80032e2: 8803 ldrh r3, [r0, #0] 80032e4: 07d0 lsls r0, r2, #31 80032e6: bf44 itt mi 80032e8: f042 0220 orrmi.w r2, r2, #32 80032ec: 6022 strmi r2, [r4, #0] 80032ee: b91b cbnz r3, 80032f8 <_printf_i+0x178> 80032f0: 6822 ldr r2, [r4, #0] 80032f2: f022 0220 bic.w r2, r2, #32 80032f6: 6022 str r2, [r4, #0] 80032f8: 2210 movs r2, #16 80032fa: e7b1 b.n 8003260 <_printf_i+0xe0> 80032fc: 4675 mov r5, lr 80032fe: fbb3 f0f2 udiv r0, r3, r2 8003302: fb02 3310 mls r3, r2, r0, r3 8003306: 5ccb ldrb r3, [r1, r3] 8003308: f805 3d01 strb.w r3, [r5, #-1]! 800330c: 4603 mov r3, r0 800330e: 2800 cmp r0, #0 8003310: d1f5 bne.n 80032fe <_printf_i+0x17e> 8003312: e7b7 b.n 8003284 <_printf_i+0x104> 8003314: 6808 ldr r0, [r1, #0] 8003316: 681a ldr r2, [r3, #0] 8003318: f010 0f80 tst.w r0, #128 ; 0x80 800331c: 6949 ldr r1, [r1, #20] 800331e: d004 beq.n 800332a <_printf_i+0x1aa> 8003320: 1d10 adds r0, r2, #4 8003322: 6018 str r0, [r3, #0] 8003324: 6813 ldr r3, [r2, #0] 8003326: 6019 str r1, [r3, #0] 8003328: e007 b.n 800333a <_printf_i+0x1ba> 800332a: f010 0f40 tst.w r0, #64 ; 0x40 800332e: f102 0004 add.w r0, r2, #4 8003332: 6018 str r0, [r3, #0] 8003334: 6813 ldr r3, [r2, #0] 8003336: d0f6 beq.n 8003326 <_printf_i+0x1a6> 8003338: 8019 strh r1, [r3, #0] 800333a: 2300 movs r3, #0 800333c: 4675 mov r5, lr 800333e: 6123 str r3, [r4, #16] 8003340: e7b1 b.n 80032a6 <_printf_i+0x126> 8003342: 681a ldr r2, [r3, #0] 8003344: 1d11 adds r1, r2, #4 8003346: 6019 str r1, [r3, #0] 8003348: 6815 ldr r5, [r2, #0] 800334a: 2100 movs r1, #0 800334c: 6862 ldr r2, [r4, #4] 800334e: 4628 mov r0, r5 8003350: f000 f8e0 bl 8003514 8003354: b108 cbz r0, 800335a <_printf_i+0x1da> 8003356: 1b40 subs r0, r0, r5 8003358: 6060 str r0, [r4, #4] 800335a: 6863 ldr r3, [r4, #4] 800335c: 6123 str r3, [r4, #16] 800335e: 2300 movs r3, #0 8003360: f884 3043 strb.w r3, [r4, #67] ; 0x43 8003364: e79f b.n 80032a6 <_printf_i+0x126> 8003366: 6923 ldr r3, [r4, #16] 8003368: 462a mov r2, r5 800336a: 4639 mov r1, r7 800336c: 4630 mov r0, r6 800336e: 47c0 blx r8 8003370: 3001 adds r0, #1 8003372: d0a2 beq.n 80032ba <_printf_i+0x13a> 8003374: 6823 ldr r3, [r4, #0] 8003376: 079b lsls r3, r3, #30 8003378: d507 bpl.n 800338a <_printf_i+0x20a> 800337a: 2500 movs r5, #0 800337c: f104 0919 add.w r9, r4, #25 8003380: 68e3 ldr r3, [r4, #12] 8003382: 9a03 ldr r2, [sp, #12] 8003384: 1a9b subs r3, r3, r2 8003386: 429d cmp r5, r3 8003388: db05 blt.n 8003396 <_printf_i+0x216> 800338a: 68e0 ldr r0, [r4, #12] 800338c: 9b03 ldr r3, [sp, #12] 800338e: 4298 cmp r0, r3 8003390: bfb8 it lt 8003392: 4618 movlt r0, r3 8003394: e793 b.n 80032be <_printf_i+0x13e> 8003396: 2301 movs r3, #1 8003398: 464a mov r2, r9 800339a: 4639 mov r1, r7 800339c: 4630 mov r0, r6 800339e: 47c0 blx r8 80033a0: 3001 adds r0, #1 80033a2: d08a beq.n 80032ba <_printf_i+0x13a> 80033a4: 3501 adds r5, #1 80033a6: e7eb b.n 8003380 <_printf_i+0x200> 80033a8: 2b00 cmp r3, #0 80033aa: d1a7 bne.n 80032fc <_printf_i+0x17c> 80033ac: 780b ldrb r3, [r1, #0] 80033ae: f104 0542 add.w r5, r4, #66 ; 0x42 80033b2: f884 3042 strb.w r3, [r4, #66] ; 0x42 80033b6: e765 b.n 8003284 <_printf_i+0x104> 80033b8: 08003686 .word 0x08003686 80033bc: 08003675 .word 0x08003675 080033c0 <_sbrk_r>: 80033c0: b538 push {r3, r4, r5, lr} 80033c2: 2300 movs r3, #0 80033c4: 4c05 ldr r4, [pc, #20] ; (80033dc <_sbrk_r+0x1c>) 80033c6: 4605 mov r5, r0 80033c8: 4608 mov r0, r1 80033ca: 6023 str r3, [r4, #0] 80033cc: f7fe ff5a bl 8002284 <_sbrk> 80033d0: 1c43 adds r3, r0, #1 80033d2: d102 bne.n 80033da <_sbrk_r+0x1a> 80033d4: 6823 ldr r3, [r4, #0] 80033d6: b103 cbz r3, 80033da <_sbrk_r+0x1a> 80033d8: 602b str r3, [r5, #0] 80033da: bd38 pop {r3, r4, r5, pc} 80033dc: 20001158 .word 0x20001158 080033e0 <__sread>: 80033e0: b510 push {r4, lr} 80033e2: 460c mov r4, r1 80033e4: f9b1 100e ldrsh.w r1, [r1, #14] 80033e8: f000 f8a4 bl 8003534 <_read_r> 80033ec: 2800 cmp r0, #0 80033ee: bfab itete ge 80033f0: 6d63 ldrge r3, [r4, #84] ; 0x54 80033f2: 89a3 ldrhlt r3, [r4, #12] 80033f4: 181b addge r3, r3, r0 80033f6: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 80033fa: bfac ite ge 80033fc: 6563 strge r3, [r4, #84] ; 0x54 80033fe: 81a3 strhlt r3, [r4, #12] 8003400: bd10 pop {r4, pc} 08003402 <__swrite>: 8003402: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8003406: 461f mov r7, r3 8003408: 898b ldrh r3, [r1, #12] 800340a: 4605 mov r5, r0 800340c: 05db lsls r3, r3, #23 800340e: 460c mov r4, r1 8003410: 4616 mov r6, r2 8003412: d505 bpl.n 8003420 <__swrite+0x1e> 8003414: 2302 movs r3, #2 8003416: 2200 movs r2, #0 8003418: f9b1 100e ldrsh.w r1, [r1, #14] 800341c: f000 f868 bl 80034f0 <_lseek_r> 8003420: 89a3 ldrh r3, [r4, #12] 8003422: 4632 mov r2, r6 8003424: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8003428: 81a3 strh r3, [r4, #12] 800342a: f9b4 100e ldrsh.w r1, [r4, #14] 800342e: 463b mov r3, r7 8003430: 4628 mov r0, r5 8003432: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8003436: f000 b817 b.w 8003468 <_write_r> 0800343a <__sseek>: 800343a: b510 push {r4, lr} 800343c: 460c mov r4, r1 800343e: f9b1 100e ldrsh.w r1, [r1, #14] 8003442: f000 f855 bl 80034f0 <_lseek_r> 8003446: 1c43 adds r3, r0, #1 8003448: 89a3 ldrh r3, [r4, #12] 800344a: bf15 itete ne 800344c: 6560 strne r0, [r4, #84] ; 0x54 800344e: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8003452: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8003456: 81a3 strheq r3, [r4, #12] 8003458: bf18 it ne 800345a: 81a3 strhne r3, [r4, #12] 800345c: bd10 pop {r4, pc} 0800345e <__sclose>: 800345e: f9b1 100e ldrsh.w r1, [r1, #14] 8003462: f000 b813 b.w 800348c <_close_r> ... 08003468 <_write_r>: 8003468: b538 push {r3, r4, r5, lr} 800346a: 4605 mov r5, r0 800346c: 4608 mov r0, r1 800346e: 4611 mov r1, r2 8003470: 2200 movs r2, #0 8003472: 4c05 ldr r4, [pc, #20] ; (8003488 <_write_r+0x20>) 8003474: 6022 str r2, [r4, #0] 8003476: 461a mov r2, r3 8003478: f7fe fcf2 bl 8001e60 <_write> 800347c: 1c43 adds r3, r0, #1 800347e: d102 bne.n 8003486 <_write_r+0x1e> 8003480: 6823 ldr r3, [r4, #0] 8003482: b103 cbz r3, 8003486 <_write_r+0x1e> 8003484: 602b str r3, [r5, #0] 8003486: bd38 pop {r3, r4, r5, pc} 8003488: 20001158 .word 0x20001158 0800348c <_close_r>: 800348c: b538 push {r3, r4, r5, lr} 800348e: 2300 movs r3, #0 8003490: 4c05 ldr r4, [pc, #20] ; (80034a8 <_close_r+0x1c>) 8003492: 4605 mov r5, r0 8003494: 4608 mov r0, r1 8003496: 6023 str r3, [r4, #0] 8003498: f7fe ff0e bl 80022b8 <_close> 800349c: 1c43 adds r3, r0, #1 800349e: d102 bne.n 80034a6 <_close_r+0x1a> 80034a0: 6823 ldr r3, [r4, #0] 80034a2: b103 cbz r3, 80034a6 <_close_r+0x1a> 80034a4: 602b str r3, [r5, #0] 80034a6: bd38 pop {r3, r4, r5, pc} 80034a8: 20001158 .word 0x20001158 080034ac <_fstat_r>: 80034ac: b538 push {r3, r4, r5, lr} 80034ae: 2300 movs r3, #0 80034b0: 4c06 ldr r4, [pc, #24] ; (80034cc <_fstat_r+0x20>) 80034b2: 4605 mov r5, r0 80034b4: 4608 mov r0, r1 80034b6: 4611 mov r1, r2 80034b8: 6023 str r3, [r4, #0] 80034ba: f7fe ff00 bl 80022be <_fstat> 80034be: 1c43 adds r3, r0, #1 80034c0: d102 bne.n 80034c8 <_fstat_r+0x1c> 80034c2: 6823 ldr r3, [r4, #0] 80034c4: b103 cbz r3, 80034c8 <_fstat_r+0x1c> 80034c6: 602b str r3, [r5, #0] 80034c8: bd38 pop {r3, r4, r5, pc} 80034ca: bf00 nop 80034cc: 20001158 .word 0x20001158 080034d0 <_isatty_r>: 80034d0: b538 push {r3, r4, r5, lr} 80034d2: 2300 movs r3, #0 80034d4: 4c05 ldr r4, [pc, #20] ; (80034ec <_isatty_r+0x1c>) 80034d6: 4605 mov r5, r0 80034d8: 4608 mov r0, r1 80034da: 6023 str r3, [r4, #0] 80034dc: f7fe fef4 bl 80022c8 <_isatty> 80034e0: 1c43 adds r3, r0, #1 80034e2: d102 bne.n 80034ea <_isatty_r+0x1a> 80034e4: 6823 ldr r3, [r4, #0] 80034e6: b103 cbz r3, 80034ea <_isatty_r+0x1a> 80034e8: 602b str r3, [r5, #0] 80034ea: bd38 pop {r3, r4, r5, pc} 80034ec: 20001158 .word 0x20001158 080034f0 <_lseek_r>: 80034f0: b538 push {r3, r4, r5, lr} 80034f2: 4605 mov r5, r0 80034f4: 4608 mov r0, r1 80034f6: 4611 mov r1, r2 80034f8: 2200 movs r2, #0 80034fa: 4c05 ldr r4, [pc, #20] ; (8003510 <_lseek_r+0x20>) 80034fc: 6022 str r2, [r4, #0] 80034fe: 461a mov r2, r3 8003500: f7fe fee4 bl 80022cc <_lseek> 8003504: 1c43 adds r3, r0, #1 8003506: d102 bne.n 800350e <_lseek_r+0x1e> 8003508: 6823 ldr r3, [r4, #0] 800350a: b103 cbz r3, 800350e <_lseek_r+0x1e> 800350c: 602b str r3, [r5, #0] 800350e: bd38 pop {r3, r4, r5, pc} 8003510: 20001158 .word 0x20001158 08003514 : 8003514: b510 push {r4, lr} 8003516: b2c9 uxtb r1, r1 8003518: 4402 add r2, r0 800351a: 4290 cmp r0, r2 800351c: 4603 mov r3, r0 800351e: d101 bne.n 8003524 8003520: 2000 movs r0, #0 8003522: bd10 pop {r4, pc} 8003524: 781c ldrb r4, [r3, #0] 8003526: 3001 adds r0, #1 8003528: 428c cmp r4, r1 800352a: d1f6 bne.n 800351a 800352c: 4618 mov r0, r3 800352e: bd10 pop {r4, pc} 08003530 <__malloc_lock>: 8003530: 4770 bx lr 08003532 <__malloc_unlock>: 8003532: 4770 bx lr 08003534 <_read_r>: 8003534: b538 push {r3, r4, r5, lr} 8003536: 4605 mov r5, r0 8003538: 4608 mov r0, r1 800353a: 4611 mov r1, r2 800353c: 2200 movs r2, #0 800353e: 4c05 ldr r4, [pc, #20] ; (8003554 <_read_r+0x20>) 8003540: 6022 str r2, [r4, #0] 8003542: 461a mov r2, r3 8003544: f7fe fe90 bl 8002268 <_read> 8003548: 1c43 adds r3, r0, #1 800354a: d102 bne.n 8003552 <_read_r+0x1e> 800354c: 6823 ldr r3, [r4, #0] 800354e: b103 cbz r3, 8003552 <_read_r+0x1e> 8003550: 602b str r3, [r5, #0] 8003552: bd38 pop {r3, r4, r5, pc} 8003554: 20001158 .word 0x20001158 08003558 <_init>: 8003558: b5f8 push {r3, r4, r5, r6, r7, lr} 800355a: bf00 nop 800355c: bcf8 pop {r3, r4, r5, r6, r7} 800355e: bc08 pop {r3} 8003560: 469e mov lr, r3 8003562: 4770 bx lr 08003564 <_fini>: 8003564: b5f8 push {r3, r4, r5, r6, r7, lr} 8003566: bf00 nop 8003568: bcf8 pop {r3, r4, r5, r6, r7} 800356a: bc08 pop {r3} 800356c: 469e mov lr, r3 800356e: 4770 bx lr