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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h

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+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_adc_ex.h
+  * @author  MCD Application Team
+  * @brief   Header file of ADC HAL extension module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_ADC_EX_H
+#define __STM32F1xx_HAL_ADC_EX_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"  
+
+/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup ADCEx
+  * @{
+  */ 
+
+/* Exported types ------------------------------------------------------------*/ 
+/** @defgroup ADCEx_Exported_Types ADCEx Exported Types
+  * @{
+  */
+
+/** 
+  * @brief  ADC Configuration injected Channel structure definition
+  * @note   Parameters of this structure are shared within 2 scopes:
+  *          - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
+  *          - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
+  *            AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
+  * @note   The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
+  *         ADC state can be either:
+  *          - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
+  *          - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
+  */
+typedef struct 
+{
+  uint32_t InjectedChannel;                       /*!< Selection of ADC channel to configure
+                                                       This parameter can be a value of @ref ADC_channels
+                                                       Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
+                                                       Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
+                                                       Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
+                                                             It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
+                                                             Refer to errata sheet of these devices for more details. */
+  uint32_t InjectedRank;                          /*!< Rank in the injected group sequencer
+                                                       This parameter must be a value of @ref ADCEx_injected_rank
+                                                       Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
+  uint32_t InjectedSamplingTime;                  /*!< Sampling time value to be set for the selected channel.
+                                                       Unit: ADC clock cycles
+                                                       Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
+                                                       This parameter can be a value of @ref ADC_sampling_times
+                                                       Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
+                                                                If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
+                                                       Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
+                                                             sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
+                                                             Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
+  uint32_t InjectedOffset;                        /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
+                                                       Offset value must be a positive number.
+                                                       Depending of ADC resolution selected (12, 10, 8 or 6 bits),
+                                                       this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
+  uint32_t InjectedNbrOfConversion;               /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
+                                                       To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
+                                                       This parameter must be a number between Min_Data = 1 and Max_Data = 4.
+                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
+                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
+  FunctionalState InjectedDiscontinuousConvMode;  /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
+                                                       Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
+                                                       Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
+                                                       This parameter can be set to ENABLE or DISABLE.
+                                                       Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
+                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
+                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
+  FunctionalState AutoInjectedConv;               /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
+                                                       This parameter can be set to ENABLE or DISABLE.
+                                                       Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
+                                                       Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
+                                                       Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
+                                                             To maintain JAUTO always enabled, DMA must be configured in circular mode.
+                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
+                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
+  uint32_t ExternalTrigInjecConv;                 /*!< Selects the external event used to trigger the conversion start of injected group.
+                                                       If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
+                                                       If set to external trigger source, triggering is on event rising edge.
+                                                       This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
+                                                       Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
+                                                             If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
+                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
+                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
+}ADC_InjectionConfTypeDef;
+
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+/** 
+  * @brief  Structure definition of ADC multimode
+  * @note   The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
+  *         State of ADCs of the common group must be: disabled.
+  */
+typedef struct
+{
+  uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode. 
+                                   This parameter can be a value of @ref ADCEx_Common_mode
+                                   Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
+                                   Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
+                                   Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
+                                   Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
+                                         The equivalences are:
+                                           - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
+                                           - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
+
+  
+}ADC_MultiModeTypeDef;                                                          
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+/**
+  * @}
+  */
+
+
+/* Exported constants --------------------------------------------------------*/
+   
+/** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
+  * @{
+  */
+
+/** @defgroup ADCEx_injected_rank ADCEx rank into injected group
+  * @{
+  */
+#define ADC_INJECTED_RANK_1                           0x00000001U
+#define ADC_INJECTED_RANK_2                           0x00000002U
+#define ADC_INJECTED_RANK_3                           0x00000003U
+#define ADC_INJECTED_RANK_4                           0x00000004U
+/**
+  * @}
+  */
+
+/** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
+  * @{
+  */
+#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE           0x00000000U
+#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING         ((uint32_t)ADC_CR2_JEXTTRIG)
+/**
+  * @}
+  */
+    
+/** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
+  * @{
+  */
+/*!< List of external triggers with generic trigger name, independently of    */
+/* ADC target, sorted by trigger name:                                        */
+
+/*!< External triggers of regular group for ADC1&ADC2 only */
+#define ADC_EXTERNALTRIGCONV_T1_CC1         ADC1_2_EXTERNALTRIG_T1_CC1
+#define ADC_EXTERNALTRIGCONV_T1_CC2         ADC1_2_EXTERNALTRIG_T1_CC2
+#define ADC_EXTERNALTRIGCONV_T2_CC2         ADC1_2_EXTERNALTRIG_T2_CC2
+#define ADC_EXTERNALTRIGCONV_T3_TRGO        ADC1_2_EXTERNALTRIG_T3_TRGO
+#define ADC_EXTERNALTRIGCONV_T4_CC4         ADC1_2_EXTERNALTRIG_T4_CC4
+#define ADC_EXTERNALTRIGCONV_EXT_IT11       ADC1_2_EXTERNALTRIG_EXT_IT11
+
+#if defined (STM32F103xE) || defined (STM32F103xG)
+/*!< External triggers of regular group for ADC3 only */
+#define ADC_EXTERNALTRIGCONV_T2_CC3         ADC3_EXTERNALTRIG_T2_CC3
+#define ADC_EXTERNALTRIGCONV_T3_CC1         ADC3_EXTERNALTRIG_T3_CC1
+#define ADC_EXTERNALTRIGCONV_T5_CC1         ADC3_EXTERNALTRIG_T5_CC1
+#define ADC_EXTERNALTRIGCONV_T5_CC3         ADC3_EXTERNALTRIG_T5_CC3
+#define ADC_EXTERNALTRIGCONV_T8_CC1         ADC3_EXTERNALTRIG_T8_CC1
+#endif /* STM32F103xE || defined STM32F103xG */
+
+/*!< External triggers of regular group for all ADC instances */
+#define ADC_EXTERNALTRIGCONV_T1_CC3         ADC1_2_3_EXTERNALTRIG_T1_CC3
+
+#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
+/*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and   */
+/*         XL-density devices.                                                */
+/*         To use it on ADC or ADC2, a remap of trigger must be done from     */
+/*         EXTI line 11 to TIM8_TRGO with macro:                              */
+/*           __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE()                           */
+/*           __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE()                           */
+
+/* Note for internal constant value management: If TIM8_TRGO is available,    */
+/* its definition is set to value for ADC1&ADC2 by default and changed to     */
+/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
+#define ADC_EXTERNALTRIGCONV_T8_TRGO        ADC1_2_EXTERNALTRIG_T8_TRGO
+#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
+
+#define ADC_SOFTWARE_START                  ADC1_2_3_SWSTART
+/**
+  * @}
+  */
+
+/** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
+  * @{
+  */
+/*!< List of external triggers with generic trigger name, independently of    */
+/* ADC target, sorted by trigger name:                                        */
+
+/*!< External triggers of injected group for ADC1&ADC2 only */
+#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO        ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
+#define ADC_EXTERNALTRIGINJECCONV_T2_CC1         ADC1_2_EXTERNALTRIGINJEC_T2_CC1
+#define ADC_EXTERNALTRIGINJECCONV_T3_CC4         ADC1_2_EXTERNALTRIGINJEC_T3_CC4
+#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO        ADC1_2_EXTERNALTRIGINJEC_T4_TRGO 
+#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15       ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
+
+#if defined (STM32F103xE) || defined (STM32F103xG)
+/*!< External triggers of injected group for ADC3 only */
+#define ADC_EXTERNALTRIGINJECCONV_T4_CC3         ADC3_EXTERNALTRIGINJEC_T4_CC3
+#define ADC_EXTERNALTRIGINJECCONV_T8_CC2         ADC3_EXTERNALTRIGINJEC_T8_CC2
+#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO        ADC3_EXTERNALTRIGINJEC_T5_TRGO
+#define ADC_EXTERNALTRIGINJECCONV_T5_CC4         ADC3_EXTERNALTRIGINJEC_T5_CC4
+#endif /* STM32F103xE || defined STM32F103xG */
+
+/*!< External triggers of injected group for all ADC instances */
+#define ADC_EXTERNALTRIGINJECCONV_T1_CC4         ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
+#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO        ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
+
+#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
+/*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and    */
+/*         XL-density devices.                                                */
+/*         To use it on ADC1 or ADC2, a remap of trigger must be done from    */
+/*         EXTI line 11 to TIM8_CC4 with macro:                               */
+/*           __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE()                           */
+/*           __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE()                           */
+
+/* Note for internal constant value management: If TIM8_CC4 is available,     */
+/* its definition is set to value for ADC1&ADC2 by default and changed to     */
+/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
+#define ADC_EXTERNALTRIGINJECCONV_T8_CC4         ADC1_2_EXTERNALTRIGINJEC_T8_CC4
+#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
+
+#define ADC_INJECTED_SOFTWARE_START              ADC1_2_3_JSWSTART
+/**
+  * @}
+  */
+
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
+  * @{
+  */
+#define ADC_MODE_INDEPENDENT                              0x00000000U                                                                     /*!< ADC dual mode disabled (ADC independent mode) */
+#define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)(                                                            ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
+#define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)(                                        ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
+#define ADC_DUALMODE_INJECSIMULT_INTERLFAST   ((uint32_t)(                                        ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
+#define ADC_DUALMODE_INJECSIMULT_INTERLSLOW   ((uint32_t)(                    ADC_CR1_DUALMOD_2                                        )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
+#define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(                    ADC_CR1_DUALMOD_2 |                     ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
+#define ADC_DUALMODE_REGSIMULT                ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
+#define ADC_DUALMODE_INTERLFAST               ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
+#define ADC_DUALMODE_INTERLSLOW               ((uint32_t)(ADC_CR1_DUALMOD_3                                                            )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
+#define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CR1_DUALMOD_3 |                                         ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
+/**
+  * @}
+  */
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+/**
+  * @}
+  */
+
+
+/* Private constants ---------------------------------------------------------*/
+
+/** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
+  * @{
+  */
+
+/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
+  * @{
+  */
+/* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC    */
+/* instance is available on the selected device).                             */
+/* (used internally by HAL driver. To not use into HAL structure parameters)  */
+
+/* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
+#define ADC1_2_EXTERNALTRIG_T1_CC1                       0x00000000U
+#define ADC1_2_EXTERNALTRIG_T1_CC2           ((uint32_t)(                                      ADC_CR2_EXTSEL_0))
+#define ADC1_2_EXTERNALTRIG_T2_CC2           ((uint32_t)(                   ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
+#define ADC1_2_EXTERNALTRIG_T3_TRGO          ((uint32_t)(ADC_CR2_EXTSEL_2                                      ))
+#define ADC1_2_EXTERNALTRIG_T4_CC4           ((uint32_t)(ADC_CR2_EXTSEL_2 |                    ADC_CR2_EXTSEL_0))
+#define ADC1_2_EXTERNALTRIG_EXT_IT11         ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1                   ))
+#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
+/* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and     */
+/* XL-density devices.                                                        */
+#define ADC1_2_EXTERNALTRIG_T8_TRGO          ADC1_2_EXTERNALTRIG_EXT_IT11
+#endif
+
+#if defined (STM32F103xE) || defined (STM32F103xG)
+/* External triggers of regular group for ADC3 */
+#define ADC3_EXTERNALTRIG_T3_CC1             ADC1_2_EXTERNALTRIG_T1_CC1
+#define ADC3_EXTERNALTRIG_T2_CC3             ADC1_2_EXTERNALTRIG_T1_CC2
+#define ADC3_EXTERNALTRIG_T8_CC1             ADC1_2_EXTERNALTRIG_T2_CC2
+#define ADC3_EXTERNALTRIG_T8_TRGO            ADC1_2_EXTERNALTRIG_T3_TRGO
+#define ADC3_EXTERNALTRIG_T5_CC1             ADC1_2_EXTERNALTRIG_T4_CC4
+#define ADC3_EXTERNALTRIG_T5_CC3             ADC1_2_EXTERNALTRIG_EXT_IT11
+#endif
+
+/* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
+#define ADC1_2_3_EXTERNALTRIG_T1_CC3         ((uint32_t)(                   ADC_CR2_EXTSEL_1                   ))
+#define ADC1_2_3_SWSTART                     ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
+/**
+  * @}
+  */
+
+/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
+  * @{
+  */
+/* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC    */
+/* instance is available on the selected device).                             */
+/* (used internally by HAL driver. To not use into HAL structure parameters)  */
+
+/* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
+#define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO          ((uint32_t)(                    ADC_CR2_JEXTSEL_1                    ))
+#define ADC1_2_EXTERNALTRIGINJEC_T2_CC1           ((uint32_t)(                    ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
+#define ADC1_2_EXTERNALTRIGINJEC_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2                                        ))
+#define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_2 |                     ADC_CR2_JEXTSEL_0))
+#define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1                    ))
+#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
+/* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and      */
+/* XL-density devices.                                                        */
+#define ADC1_2_EXTERNALTRIGINJEC_T8_CC4           ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
+#endif
+
+#if defined (STM32F103xE) || defined (STM32F103xG)
+/* External triggers of injected group for ADC3 */
+#define ADC3_EXTERNALTRIGINJEC_T4_CC3             ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
+#define ADC3_EXTERNALTRIGINJEC_T8_CC2             ADC1_2_EXTERNALTRIGINJEC_T2_CC1
+#define ADC3_EXTERNALTRIGINJEC_T8_CC4             ADC1_2_EXTERNALTRIGINJEC_T3_CC4
+#define ADC3_EXTERNALTRIGINJEC_T5_TRGO            ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
+#define ADC3_EXTERNALTRIGINJEC_T5_CC4             ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
+#endif /* STM32F103xE || defined STM32F103xG */
+
+/* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
+#define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO                    0x00000000U
+#define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4         ((uint32_t)(                                        ADC_CR2_JEXTSEL_0))
+#define ADC1_2_3_JSWSTART                         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+/* Exported macro ------------------------------------------------------------*/
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup ADCEx_Private_Macro ADCEx Private Macro
+  * @{
+  */
+/* Macro reserved for internal HAL driver usage, not intended to be used in   */
+/* code of final user.                                                        */
+
+    
+/**
+  * @brief For devices with 3 ADCs: Defines the external trigger source 
+  *        for regular group according to ADC into common group ADC1&ADC2 or 
+  *        ADC3 (some triggers with same source have different value to
+  *        be programmed into ADC EXTSEL bits of CR2 register).
+  *        For devices with 2 ADCs or less: this macro makes no change.
+  * @param __HANDLE__: ADC handle
+  * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
+  * @retval External trigger to be programmed into EXTSEL bits of CR2 register
+  */
+#if defined (STM32F103xE) || defined (STM32F103xG)
+#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
+ (( (((__HANDLE__)->Instance) == ADC3)                                         \
+  )?                                                                           \
+   ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO                     \
+     )?                                                                        \
+      (ADC3_EXTERNALTRIG_T8_TRGO)                                              \
+      :                                                                        \
+      (__EXT_TRIG_CONV__)                                                      \
+   )                                                                           \
+   :                                                                           \
+   (__EXT_TRIG_CONV__)                                                         \
+ )
+#else
+#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
+  (__EXT_TRIG_CONV__)
+#endif /* STM32F103xE || STM32F103xG */
+
+/**
+  * @brief For devices with 3 ADCs: Defines the external trigger source 
+  *        for injected group according to ADC into common group ADC1&ADC2 or 
+  *        ADC3 (some triggers with same source have different value to
+  *        be programmed into ADC JEXTSEL bits of CR2 register).
+  *        For devices with 2 ADCs or less: this macro makes no change.
+  * @param __HANDLE__: ADC handle
+  * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
+  * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
+  */
+#if defined (STM32F103xE) || defined (STM32F103xG)
+#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
+ (( (((__HANDLE__)->Instance) == ADC3)                                         \
+  )?                                                                           \
+   ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4           \
+     )?                                                                        \
+      (ADC3_EXTERNALTRIGINJEC_T8_CC4)                                          \
+      :                                                                        \
+      (__EXT_TRIG_INJECTCONV__)                                                \
+   )                                                                           \
+   :                                                                           \
+   (__EXT_TRIG_INJECTCONV__)                                                   \
+ )
+#else
+#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
+   (__EXT_TRIG_INJECTCONV__)
+#endif /* STM32F103xE || STM32F103xG */
+
+
+/**
+  * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
+  * @param __HANDLE__: ADC handle
+  * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
+  */
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
+ (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)   \
+  )?                                                                           \
+   (ADC1->CR1 & ADC_CR1_DUALMOD)                                               \
+   :                                                                           \
+   (RESET)                                                                     \
+ )
+#else
+#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
+  (RESET)
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+/**
+  * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
+  * @param __HANDLE__: ADC handle
+  * @retval None
+  */
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
+  (( (((__HANDLE__)->Instance) == ADC2)                                        \
+   )?                                                                          \
+    ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET)                                   \
+    :                                                                          \
+    (!RESET)                                                                   \
+  )
+#else
+#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
+  (!RESET)
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+/**
+  * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
+  * @param __HANDLE__: ADC handle
+  * @retval None
+  */
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
+  (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)  \
+   )?                                                                          \
+    (ADC1->CR1 & ADC_CR1_JAUTO)                                                \
+    :                                                                          \
+    (RESET)                                                                    \
+  )
+#else
+#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
+  (RESET)
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+/**
+  * @brief Set handle of the other ADC sharing the common multimode settings
+  * @param __HANDLE__: ADC handle
+  * @param __HANDLE_OTHER_ADC__: other ADC handle
+  * @retval None
+  */
+#define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__)                 \
+  ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
+
+/**
+  * @brief Set handle of the ADC slave associated to the ADC master
+  * On STM32F1 devices, ADC slave is always ADC2 (this can be different
+  * on other STM32 devices)
+  * @param __HANDLE_MASTER__: ADC master handle
+  * @param __HANDLE_SLAVE__: ADC slave handle
+  * @retval None
+  */
+#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)                   \
+  ((__HANDLE_SLAVE__)->Instance = ADC2)
+       
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+#define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
+                                       ((CHANNEL) == ADC_INJECTED_RANK_2) || \
+                                       ((CHANNEL) == ADC_INJECTED_RANK_3) || \
+                                       ((CHANNEL) == ADC_INJECTED_RANK_4))
+
+#define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)  || \
+                                        ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
+
+/** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
+  * @{
+  */
+#define IS_ADC_INJECTED_NB_CONV(LENGTH)  (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
+/**
+  * @}
+  */
+
+#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
+#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
+                                 ((REGTRIG) == ADC_SOFTWARE_START))
+#endif
+#if defined (STM32F101xE)
+#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
+                                 ((REGTRIG) == ADC_SOFTWARE_START))
+#endif
+#if defined (STM32F101xG)
+#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
+                                 ((REGTRIG) == ADC_SOFTWARE_START))
+#endif
+#if defined (STM32F103xE) || defined (STM32F103xG)
+#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)    || \
+                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
+                                 ((REGTRIG) == ADC_SOFTWARE_START))
+#endif
+
+#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
+#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
+                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
+#endif
+#if defined (STM32F101xE)
+#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
+                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
+#endif
+#if defined (STM32F101xG)
+#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
+                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
+#endif
+#if defined (STM32F103xE) || defined (STM32F103xG)
+#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
+                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
+                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
+#endif
+
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                || \
+                           ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)  || \
+                           ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)    || \
+                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
+                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
+                           ((MODE) == ADC_DUALMODE_INJECSIMULT)            || \
+                           ((MODE) == ADC_DUALMODE_REGSIMULT)              || \
+                           ((MODE) == ADC_DUALMODE_INTERLFAST)             || \
+                           ((MODE) == ADC_DUALMODE_INTERLSLOW)             || \
+                           ((MODE) == ADC_DUALMODE_ALTERTRIG) )
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+/**
+  * @}
+  */      
+   
+    
+
+    
+    
+   
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup ADCEx_Exported_Functions
+  * @{
+  */
+
+/* IO operation functions  *****************************************************/
+/** @addtogroup ADCEx_Exported_Functions_Group1
+  * @{
+  */
+
+/* ADC calibration */
+HAL_StatusTypeDef       HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
+
+/* Blocking mode: Polling */
+HAL_StatusTypeDef       HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
+HAL_StatusTypeDef       HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
+HAL_StatusTypeDef       HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
+
+/* Non-blocking mode: Interruption */
+HAL_StatusTypeDef       HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
+HAL_StatusTypeDef       HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
+
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+/* ADC multimode */
+HAL_StatusTypeDef       HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
+HAL_StatusTypeDef       HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); 
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+/* ADC retrieve conversion value intended to be used with polling or interruption */
+uint32_t                HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+uint32_t                HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+
+/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
+void                    HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
+/**
+  * @}
+  */
+
+
+/* Peripheral Control functions ***********************************************/
+/** @addtogroup ADCEx_Exported_Functions_Group2
+  * @{
+  */
+HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
+#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
+HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
+#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */ 
+
+/**
+  * @}
+  */
+  
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_HAL_ADC_EX_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Inc/main.h

@@ -58,6 +58,30 @@ void Error_Handler(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
+#define FAIL_MBIC_Pin GPIO_PIN_4
+#define FAIL_MBIC_GPIO_Port GPIOE
+#define BOOT_LED_Pin GPIO_PIN_15
+#define BOOT_LED_GPIO_Port GPIOC
+#define RFU_TX_Pin GPIO_PIN_2
+#define RFU_TX_GPIO_Port GPIOA
+#define RFU_RX_Pin GPIO_PIN_3
+#define RFU_RX_GPIO_Port GPIOA
+#define ATT_CLOCK3_Pin GPIO_PIN_0
+#define ATT_CLOCK3_GPIO_Port GPIOG
+#define ATT_DATA3_Pin GPIO_PIN_1
+#define ATT_DATA3_GPIO_Port GPIOG
+#define ATT_CLOCK4_Pin GPIO_PIN_10
+#define ATT_CLOCK4_GPIO_Port GPIOE
+#define ATT_DATA4_Pin GPIO_PIN_11
+#define ATT_DATA4_GPIO_Port GPIOE
+#define ATT_EN_DL4_Pin GPIO_PIN_12
+#define ATT_EN_DL4_GPIO_Port GPIOE
+#define ATT_EN_UL4_Pin GPIO_PIN_13
+#define ATT_EN_UL4_GPIO_Port GPIOE
+#define PATH_EN_DL4_Pin GPIO_PIN_14
+#define PATH_EN_DL4_GPIO_Port GPIOE
+#define PATH_EN_UL4_Pin GPIO_PIN_15
+#define PATH_EN_UL4_GPIO_Port GPIOE
 #define EEPROM_SCL_Pin GPIO_PIN_10
 #define EEPROM_SCL_GPIO_Port GPIOB
 #define EEPROM_SDA_Pin GPIO_PIN_11
@@ -70,6 +94,18 @@ void Error_Handler(void);
 #define PATH_EN_DL2_GPIO_Port GPIOD
 #define PATH_EN_UL2_Pin GPIO_PIN_11
 #define PATH_EN_UL2_GPIO_Port GPIOD
+#define LED_ACT_Pin GPIO_PIN_14
+#define LED_ACT_GPIO_Port GPIOD
+#define ATT_EN_DL3_Pin GPIO_PIN_2
+#define ATT_EN_DL3_GPIO_Port GPIOG
+#define ATT_EN_UL3_Pin GPIO_PIN_3
+#define ATT_EN_UL3_GPIO_Port GPIOG
+#define PATH_EN_DL3_Pin GPIO_PIN_4
+#define PATH_EN_DL3_GPIO_Port GPIOG
+#define PATH_EN_UL3_Pin GPIO_PIN_5
+#define PATH_EN_UL3_GPIO_Port GPIOG
+#define _PATH_SW1_Pin GPIO_PIN_8
+#define _PATH_SW1_GPIO_Port GPIOG
 #define PATH_EN_UL1_Pin GPIO_PIN_6
 #define PATH_EN_UL1_GPIO_Port GPIOC
 #define MBIC_UP_Pin GPIO_PIN_9
@@ -84,6 +120,20 @@ void Error_Handler(void);
 #define ATT_EN_DL2_GPIO_Port GPIOD
 #define ATT_EN_UL2_Pin GPIO_PIN_7
 #define ATT_EN_UL2_GPIO_Port GPIOD
+#define PATH_SW1_Pin GPIO_PIN_9
+#define PATH_SW1_GPIO_Port GPIOG
+#define _PATH_SW2_Pin GPIO_PIN_10
+#define _PATH_SW2_GPIO_Port GPIOG
+#define PATH_SW2_Pin GPIO_PIN_11
+#define PATH_SW2_GPIO_Port GPIOG
+#define _PATH_SW3_Pin GPIO_PIN_12
+#define _PATH_SW3_GPIO_Port GPIOG
+#define PATH_SW3_Pin GPIO_PIN_13
+#define PATH_SW3_GPIO_Port GPIOG
+#define _PATH_SW4_Pin GPIO_PIN_14
+#define _PATH_SW4_GPIO_Port GPIOG
+#define PATH_SW4_Pin GPIO_PIN_15
+#define PATH_SW4_GPIO_Port GPIOG
 #define ATT_CLOCK1_Pin GPIO_PIN_6
 #define ATT_CLOCK1_GPIO_Port GPIOB
 #define ATT_DATA1_Pin GPIO_PIN_7

Inc/stm32f1xx_hal_conf.h

@@ -33,7 +33,7 @@
   */
   
 #define HAL_MODULE_ENABLED  
-  /*#define HAL_ADC_MODULE_ENABLED   */
+  #define HAL_ADC_MODULE_ENABLED
 /*#define HAL_CRYP_MODULE_ENABLED   */
 /*#define HAL_CAN_MODULE_ENABLED   */
 /*#define HAL_CAN_LEGACY_MODULE_ENABLED   */

STM32F103ZET_JDASMBIC.ioc

@@ -1,4 +1,15 @@
 #MicroXplorer Configuration settings - do not modify
+ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_4
+ADC1.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,NbrOfConversionFlag,master
+ADC1.NbrOfConversionFlag=1
+ADC1.Rank-2\#ChannelRegularConversion=1
+ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
+ADC1.master=1
+ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_4
+ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag
+ADC3.NbrOfConversionFlag=1
+ADC3.Rank-0\#ChannelRegularConversion=1
+ADC3.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
 Dma.Request0=USART1_RX
 Dma.Request1=USART1_TX
 Dma.RequestsNb=2
@@ -21,40 +32,78 @@ Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE
 Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW
 Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
 File.Version=6
-GPIO.groupedBy=
+GPIO.groupedBy=Group By Peripherals
 KeepUserPlacement=false
 Mcu.Family=STM32F1
-Mcu.IP0=DMA
-Mcu.IP1=I2C2
-Mcu.IP2=NVIC
-Mcu.IP3=RCC
-Mcu.IP4=SYS
-Mcu.IP5=TIM6
-Mcu.IP6=USART1
-Mcu.IPNb=7
+Mcu.IP0=ADC1
+Mcu.IP1=ADC3
+Mcu.IP2=DMA
+Mcu.IP3=I2C2
+Mcu.IP4=NVIC
+Mcu.IP5=RCC
+Mcu.IP6=SYS
+Mcu.IP7=TIM6
+Mcu.IP8=USART1
+Mcu.IP9=USART2
+Mcu.IPNb=10
 Mcu.Name=STM32F103Z(C-D-E)Tx
 Mcu.Package=LQFP144
-Mcu.Pin0=PB10
-Mcu.Pin1=PB11
-Mcu.Pin10=PA14
-Mcu.Pin11=PD2
-Mcu.Pin12=PD3
-Mcu.Pin13=PD4
-Mcu.Pin14=PD7
-Mcu.Pin15=PB6
-Mcu.Pin16=PB7
-Mcu.Pin17=PB9
-Mcu.Pin18=VP_SYS_VS_tim2
-Mcu.Pin19=VP_TIM6_VS_ClockSourceINT
-Mcu.Pin2=PB14
-Mcu.Pin3=PB15
-Mcu.Pin4=PD10
-Mcu.Pin5=PD11
-Mcu.Pin6=PC6
-Mcu.Pin7=PA9
-Mcu.Pin8=PA10
-Mcu.Pin9=PA13
-Mcu.PinsNb=20
+Mcu.Pin0=PE3
+Mcu.Pin1=PE4
+Mcu.Pin10=PA4
+Mcu.Pin11=PA5
+Mcu.Pin12=PA6
+Mcu.Pin13=PG0
+Mcu.Pin14=PG1
+Mcu.Pin15=PE10
+Mcu.Pin16=PE11
+Mcu.Pin17=PE12
+Mcu.Pin18=PE13
+Mcu.Pin19=PE14
+Mcu.Pin2=PC15-OSC32_OUT
+Mcu.Pin20=PE15
+Mcu.Pin21=PB10
+Mcu.Pin22=PB11
+Mcu.Pin23=PB14
+Mcu.Pin24=PB15
+Mcu.Pin25=PD10
+Mcu.Pin26=PD11
+Mcu.Pin27=PD14
+Mcu.Pin28=PD15
+Mcu.Pin29=PG2
+Mcu.Pin3=PF6
+Mcu.Pin30=PG3
+Mcu.Pin31=PG4
+Mcu.Pin32=PG5
+Mcu.Pin33=PG8
+Mcu.Pin34=PC6
+Mcu.Pin35=PA9
+Mcu.Pin36=PA10
+Mcu.Pin37=PA13
+Mcu.Pin38=PA14
+Mcu.Pin39=PD2
+Mcu.Pin4=PF7
+Mcu.Pin40=PD3
+Mcu.Pin41=PD4
+Mcu.Pin42=PD7
+Mcu.Pin43=PG9
+Mcu.Pin44=PG10
+Mcu.Pin45=PG11
+Mcu.Pin46=PG12
+Mcu.Pin47=PG13
+Mcu.Pin48=PG14
+Mcu.Pin49=PG15
+Mcu.Pin5=PF8
+Mcu.Pin50=PB6
+Mcu.Pin51=PB7
+Mcu.Pin52=PB9
+Mcu.Pin53=VP_SYS_VS_tim2
+Mcu.Pin54=VP_TIM6_VS_ClockSourceINT
+Mcu.Pin6=PF9
+Mcu.Pin7=PF10
+Mcu.Pin8=PA2
+Mcu.Pin9=PA3
+Mcu.PinsNb=55
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F103ZETx
@@ -85,6 +134,20 @@ PA13.Mode=Serial_Wire
 PA13.Signal=SYS_JTMS-SWDIO
 PA14.Mode=Serial_Wire
 PA14.Signal=SYS_JTCK-SWCLK
+PA2.GPIOParameters=GPIO_Label
+PA2.GPIO_Label=RFU_TX
+PA2.Mode=Asynchronous
+PA2.Signal=USART2_TX
+PA3.GPIOParameters=GPIO_Label
+PA3.GPIO_Label=RFU_RX
+PA3.Mode=Asynchronous
+PA3.Signal=USART2_RX
+PA4.Locked=true
+PA4.Signal=ADCx_IN4
+PA5.Locked=true
+PA5.Signal=ADCx_IN5
+PA6.Locked=true
+PA6.Signal=ADCx_IN6
 PA9.GPIOParameters=GPIO_Label
 PA9.GPIO_Label=MBIC_UP
 PA9.Mode=Asynchronous
@@ -117,6 +180,10 @@ PB9.GPIOParameters=GPIO_Label
 PB9.GPIO_Label=ATT_EN_DL1
 PB9.Locked=true
 PB9.Signal=GPIO_Output
+PC15-OSC32_OUT.GPIOParameters=GPIO_Label
+PC15-OSC32_OUT.GPIO_Label=BOOT_LED
+PC15-OSC32_OUT.Locked=true
+PC15-OSC32_OUT.Signal=GPIO_Output
 PC6.GPIOParameters=GPIO_Label
 PC6.GPIO_Label=PATH_EN_UL1
 PC6.Locked=true
@@ -137,6 +204,12 @@ PD11.GPIOParameters=GPIO_Label
 PD11.GPIO_Label=PATH_EN_UL2
 PD11.Locked=true
 PD11.Signal=GPIO_Output
+PD14.GPIOParameters=GPIO_Label
+PD14.GPIO_Label=LED_ACT
+PD14.Locked=true
+PD14.Signal=GPIO_Output
+PD15.Locked=true
+PD15.Signal=GPIO_Output
 PD2.GPIOParameters=GPIO_Label
 PD2.GPIO_Label=ATT_CLOCK2
 PD2.Locked=true
@@ -153,6 +226,107 @@ PD7.GPIOParameters=GPIO_Label
 PD7.GPIO_Label=ATT_EN_UL2
 PD7.Locked=true
 PD7.Signal=GPIO_Output
+PE10.GPIOParameters=GPIO_Label
+PE10.GPIO_Label=ATT_CLOCK4
+PE10.Locked=true
+PE10.Signal=GPIO_Output
+PE11.GPIOParameters=GPIO_Label
+PE11.GPIO_Label=ATT_DATA4
+PE11.Locked=true
+PE11.Signal=GPIO_Output
+PE12.GPIOParameters=GPIO_Label
+PE12.GPIO_Label=ATT_EN_DL4
+PE12.Locked=true
+PE12.Signal=GPIO_Output
+PE13.GPIOParameters=GPIO_Label
+PE13.GPIO_Label=ATT_EN_UL4
+PE13.Locked=true
+PE13.Signal=GPIO_Output
+PE14.GPIOParameters=GPIO_Label
+PE14.GPIO_Label=PATH_EN_DL4
+PE14.Locked=true
+PE14.Signal=GPIO_Output
+PE15.GPIOParameters=GPIO_Label
+PE15.GPIO_Label=PATH_EN_UL4
+PE15.Locked=true
+PE15.Signal=GPIO_Output
+PE3.Locked=true
+PE3.Signal=GPIO_Output
+PE4.GPIOParameters=GPIO_Label
+PE4.GPIO_Label=FAIL_MBIC
+PE4.Locked=true
+PE4.Signal=GPIO_Output
+PF10.Locked=true
+PF10.Mode=IN8
+PF10.Signal=ADC3_IN8
+PF6.Locked=true
+PF6.Mode=IN4
+PF6.Signal=ADC3_IN4
+PF7.Locked=true
+PF7.Mode=IN5
+PF7.Signal=ADC3_IN5
+PF8.Locked=true
+PF8.Mode=IN6
+PF8.Signal=ADC3_IN6
+PF9.Locked=true
+PF9.Mode=IN7
+PF9.Signal=ADC3_IN7
+PG0.GPIOParameters=GPIO_Label
+PG0.GPIO_Label=ATT_CLOCK3
+PG0.Locked=true
+PG0.Signal=GPIO_Output
+PG1.GPIOParameters=GPIO_Label
+PG1.GPIO_Label=ATT_DATA3
+PG1.Locked=true
+PG1.Signal=GPIO_Output
+PG10.GPIOParameters=GPIO_Label
+PG10.GPIO_Label=_PATH_SW2
+PG10.Locked=true
+PG10.Signal=GPIO_Output
+PG11.GPIOParameters=GPIO_Label
+PG11.GPIO_Label=PATH_SW2
+PG11.Locked=true
+PG11.Signal=GPIO_Output
+PG12.GPIOParameters=GPIO_Label
+PG12.GPIO_Label=_PATH_SW3
+PG12.Locked=true
+PG12.Signal=GPIO_Output
+PG13.GPIOParameters=GPIO_Label
+PG13.GPIO_Label=PATH_SW3
+PG13.Locked=true
+PG13.Signal=GPIO_Output
+PG14.GPIOParameters=GPIO_Label
+PG14.GPIO_Label=_PATH_SW4
+PG14.Locked=true
+PG14.Signal=GPIO_Output
+PG15.GPIOParameters=GPIO_Label
+PG15.GPIO_Label=PATH_SW4
+PG15.Locked=true
+PG15.Signal=GPIO_Output
+PG2.GPIOParameters=GPIO_Label
+PG2.GPIO_Label=ATT_EN_DL3
+PG2.Locked=true
+PG2.Signal=GPIO_Output
+PG3.GPIOParameters=GPIO_Label
+PG3.GPIO_Label=ATT_EN_UL3
+PG3.Locked=true
+PG3.Signal=GPIO_Output
+PG4.GPIOParameters=GPIO_Label
+PG4.GPIO_Label=PATH_EN_DL3
+PG4.Locked=true
+PG4.Signal=GPIO_Output
+PG5.GPIOParameters=GPIO_Label
+PG5.GPIO_Label=PATH_EN_UL3
+PG5.Locked=true
+PG5.Signal=GPIO_Output
+PG8.GPIOParameters=GPIO_Label
+PG8.GPIO_Label=_PATH_SW1
+PG8.Locked=true
+PG8.Signal=GPIO_Output
+PG9.GPIOParameters=GPIO_Label
+PG9.GPIO_Label=PATH_SW1
+PG9.Locked=true
+PG9.Signal=GPIO_Output
 PinOutPanel.RotationAngle=0
 ProjectManager.AskForMigrate=true
 ProjectManager.BackupPrevious=false
@@ -181,7 +355,8 @@ ProjectManager.TargetToolchain=TrueSTUDIO
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=true
 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_I2C2_Init-I2C2-false-HAL-true,5-MX_USART1_UART_Init-USART1-false-HAL-true
-RCC.ADCFreqValue=32000000
+RCC.ADCFreqValue=8000000
+RCC.ADCPresc=RCC_ADCPCLK2_DIV8
 RCC.AHBFreq_Value=64000000
 RCC.APB1CLKDivider=RCC_HCLK_DIV2
 RCC.APB1Freq_Value=32000000
@@ -194,7 +369,7 @@ RCC.FamilyName=M
 RCC.HCLKFreq_Value=64000000
 RCC.I2S2Freq_Value=64000000
 RCC.I2S3Freq_Value=64000000
-RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FSMCFreq_Value,FamilyName,HCLKFreq_Value,I2S2Freq_Value,I2S3Freq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,SDIOFreq_Value,SDIOHCLKDiv2FreqValue,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value
+RCC.IPParameters=ADCFreqValue,ADCPresc,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FSMCFreq_Value,FamilyName,HCLKFreq_Value,I2S2Freq_Value,I2S3Freq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,SDIOFreq_Value,SDIOHCLKDiv2FreqValue,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value
 RCC.MCOFreq_Value=64000000
 RCC.PLLCLKFreq_Value=64000000
 RCC.PLLMCOFreq_Value=32000000
@@ -205,11 +380,20 @@ RCC.SYSCLKFreq_VALUE=64000000
 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
 RCC.TimSysFreq_Value=64000000
 RCC.USBFreq_Value=64000000
+SH.ADCx_IN4.0=ADC1_IN4,IN4
+SH.ADCx_IN4.ConfNb=1
+SH.ADCx_IN5.0=ADC1_IN5,IN5
+SH.ADCx_IN5.ConfNb=1
+SH.ADCx_IN6.0=ADC1_IN6,IN6
+SH.ADCx_IN6.ConfNb=1
 TIM6.IPParameters=Prescaler,Period
 TIM6.Period=1
 TIM6.Prescaler=64000-1
-USART1.IPParameters=VirtualMode
+USART1.BaudRate=921600
+USART1.IPParameters=VirtualMode,BaudRate
 USART1.VirtualMode=VM_ASYNC
+USART2.IPParameters=VirtualMode
+USART2.VirtualMode=VM_ASYNC
 VP_SYS_VS_tim2.Mode=TIM2
 VP_SYS_VS_tim2.Signal=SYS_VS_tim2
 VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer

Src/main.c

@@ -41,11 +41,15 @@
 /* USER CODE END PM */
 
 /* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+ADC_HandleTypeDef hadc3;
+
 I2C_HandleTypeDef hi2c2;
 
 TIM_HandleTypeDef htim6;
 
 UART_HandleTypeDef huart1;
+UART_HandleTypeDef huart2;
 DMA_HandleTypeDef hdma_usart1_rx;
 DMA_HandleTypeDef hdma_usart1_tx;
 
@@ -59,7 +63,10 @@ static void MX_GPIO_Init(void);
 static void MX_DMA_Init(void);
 static void MX_I2C2_Init(void);
 static void MX_USART1_UART_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_ADC3_Init(void);
 static void MX_TIM6_Init(void);
+static void MX_USART2_UART_Init(void);
 /* USER CODE BEGIN PFP */
 
 /* USER CODE END PFP */
@@ -101,7 +108,10 @@ int main(void)
   MX_DMA_Init();
   MX_I2C2_Init();
   MX_USART1_UART_Init();
+  MX_ADC1_Init();
+  MX_ADC3_Init();
   MX_TIM6_Init();
+  MX_USART2_UART_Init();
   /* USER CODE BEGIN 2 */
 
   /* USER CODE END 2 */
@@ -127,6 +137,7 @@ void SystemClock_Config(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
   /** Initializes the CPU, AHB and APB busses clocks 
   */
@@ -153,6 +164,102 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
+  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief ADC1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC1_Init(void)
+{
+
+  /* USER CODE BEGIN ADC1_Init 0 */
+
+  /* USER CODE END ADC1_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC1_Init 1 */
+
+  /* USER CODE END ADC1_Init 1 */
+  /** Common config 
+  */
+  hadc1.Instance = ADC1;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.ContinuousConvMode = DISABLE;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.NbrOfConversion = 1;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_4;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC1_Init 2 */
+
+  /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+  * @brief ADC3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC3_Init(void)
+{
+
+  /* USER CODE BEGIN ADC3_Init 0 */
+
+  /* USER CODE END ADC3_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC3_Init 1 */
+
+  /* USER CODE END ADC3_Init 1 */
+  /** Common config 
+  */
+  hadc3.Instance = ADC3;
+  hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc3.Init.ContinuousConvMode = DISABLE;
+  hadc3.Init.DiscontinuousConvMode = DISABLE;
+  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc3.Init.NbrOfConversion = 1;
+  if (HAL_ADC_Init(&hadc3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel 
+  */
+  sConfig.Channel = ADC_CHANNEL_4;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC3_Init 2 */
+
+  /* USER CODE END ADC3_Init 2 */
+
 }
 
 /**
@@ -243,7 +350,7 @@ static void MX_USART1_UART_Init(void)
 
   /* USER CODE END USART1_Init 1 */
   huart1.Instance = USART1;
-  huart1.Init.BaudRate = 115200;
+  huart1.Init.BaudRate = 921600;
   huart1.Init.WordLength = UART_WORDLENGTH_8B;
   huart1.Init.StopBits = UART_STOPBITS_1;
   huart1.Init.Parity = UART_PARITY_NONE;
@@ -260,6 +367,39 @@ static void MX_USART1_UART_Init(void)
 
 }
 
+/**
+  * @brief USART2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART2_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART2_Init 0 */
+
+  /* USER CODE END USART2_Init 0 */
+
+  /* USER CODE BEGIN USART2_Init 1 */
+
+  /* USER CODE END USART2_Init 1 */
+  huart2.Instance = USART2;
+  huart2.Init.BaudRate = 115200;
+  huart2.Init.WordLength = UART_WORDLENGTH_8B;
+  huart2.Init.StopBits = UART_STOPBITS_1;
+  huart2.Init.Parity = UART_PARITY_NONE;
+  huart2.Init.Mode = UART_MODE_TX_RX;
+  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART2_Init 2 */
+
+  /* USER CODE END USART2_Init 2 */
+
+}
+
 /** 
   * Enable DMA controller clock
   */
@@ -289,21 +429,63 @@ static void MX_GPIO_Init(void)
   GPIO_InitTypeDef GPIO_InitStruct = {0};
 
   /* GPIO Ports Clock Enable */
-  __HAL_RCC_GPIOB_CLK_ENABLE();
-  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOE_CLK_ENABLE();
   __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
   __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3|FAIL_MBIC_Pin|ATT_CLOCK4_Pin|ATT_DATA4_Pin 
+                          |ATT_EN_DL4_Pin|ATT_EN_UL4_Pin|PATH_EN_DL4_Pin|PATH_EN_UL4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|PATH_EN_UL1_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, ATT_CLOCK3_Pin|ATT_DATA3_Pin|ATT_EN_DL3_Pin|ATT_EN_UL3_Pin 
+                          |PATH_EN_DL3_Pin|PATH_EN_UL3_Pin|_PATH_SW1_Pin|PATH_SW1_Pin 
+                          |_PATH_SW2_Pin|PATH_SW2_Pin|_PATH_SW3_Pin|PATH_SW3_Pin 
+                          |_PATH_SW4_Pin|PATH_SW4_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOB, ATT_EN_UL1_Pin|PATH_EN_DL1_Pin|ATT_CLOCK1_Pin|ATT_DATA1_Pin 
                           |ATT_EN_DL1_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOD, PATH_EN_DL2_Pin|PATH_EN_UL2_Pin|ATT_CLOCK2_Pin|ATT_DATA2_Pin 
-                          |ATT_EN_DL2_Pin|ATT_EN_UL2_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(GPIOD, PATH_EN_DL2_Pin|PATH_EN_UL2_Pin|LED_ACT_Pin|GPIO_PIN_15 
+                          |ATT_CLOCK2_Pin|ATT_DATA2_Pin|ATT_EN_DL2_Pin|ATT_EN_UL2_Pin, GPIO_PIN_RESET);
 
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(PATH_EN_UL1_GPIO_Port, PATH_EN_UL1_Pin, GPIO_PIN_RESET);
+  /*Configure GPIO pins : PE3 FAIL_MBIC_Pin ATT_CLOCK4_Pin ATT_DATA4_Pin 
+                           ATT_EN_DL4_Pin ATT_EN_UL4_Pin PATH_EN_DL4_Pin PATH_EN_UL4_Pin */
+  GPIO_InitStruct.Pin = GPIO_PIN_3|FAIL_MBIC_Pin|ATT_CLOCK4_Pin|ATT_DATA4_Pin 
+                          |ATT_EN_DL4_Pin|ATT_EN_UL4_Pin|PATH_EN_DL4_Pin|PATH_EN_UL4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : BOOT_LED_Pin PATH_EN_UL1_Pin */
+  GPIO_InitStruct.Pin = BOOT_LED_Pin|PATH_EN_UL1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : ATT_CLOCK3_Pin ATT_DATA3_Pin ATT_EN_DL3_Pin ATT_EN_UL3_Pin 
+                           PATH_EN_DL3_Pin PATH_EN_UL3_Pin _PATH_SW1_Pin PATH_SW1_Pin 
+                           _PATH_SW2_Pin PATH_SW2_Pin _PATH_SW3_Pin PATH_SW3_Pin 
+                           _PATH_SW4_Pin PATH_SW4_Pin */
+  GPIO_InitStruct.Pin = ATT_CLOCK3_Pin|ATT_DATA3_Pin|ATT_EN_DL3_Pin|ATT_EN_UL3_Pin 
+                          |PATH_EN_DL3_Pin|PATH_EN_UL3_Pin|_PATH_SW1_Pin|PATH_SW1_Pin 
+                          |_PATH_SW2_Pin|PATH_SW2_Pin|_PATH_SW3_Pin|PATH_SW3_Pin 
+                          |_PATH_SW4_Pin|PATH_SW4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
 
   /*Configure GPIO pins : ATT_EN_UL1_Pin PATH_EN_DL1_Pin ATT_CLOCK1_Pin ATT_DATA1_Pin 
                            ATT_EN_DL1_Pin */
@@ -314,22 +496,15 @@ static void MX_GPIO_Init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
-  /*Configure GPIO pins : PATH_EN_DL2_Pin PATH_EN_UL2_Pin ATT_CLOCK2_Pin ATT_DATA2_Pin 
-                           ATT_EN_DL2_Pin ATT_EN_UL2_Pin */
-  GPIO_InitStruct.Pin = PATH_EN_DL2_Pin|PATH_EN_UL2_Pin|ATT_CLOCK2_Pin|ATT_DATA2_Pin 
-                          |ATT_EN_DL2_Pin|ATT_EN_UL2_Pin;
+  /*Configure GPIO pins : PATH_EN_DL2_Pin PATH_EN_UL2_Pin LED_ACT_Pin PD15 
+                           ATT_CLOCK2_Pin ATT_DATA2_Pin ATT_EN_DL2_Pin ATT_EN_UL2_Pin */
+  GPIO_InitStruct.Pin = PATH_EN_DL2_Pin|PATH_EN_UL2_Pin|LED_ACT_Pin|GPIO_PIN_15 
+                          |ATT_CLOCK2_Pin|ATT_DATA2_Pin|ATT_EN_DL2_Pin|ATT_EN_UL2_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 
-  /*Configure GPIO pin : PATH_EN_UL1_Pin */
-  GPIO_InitStruct.Pin = PATH_EN_UL1_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(PATH_EN_UL1_GPIO_Port, &GPIO_InitStruct);
-
 }
 
 /* USER CODE BEGIN 4 */

Src/stm32f1xx_hal_msp.c

@@ -84,6 +84,117 @@ void HAL_MspInit(void)
   /* USER CODE END MspInit 1 */
 }
 
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspInit 0 */
+
+  /* USER CODE END ADC1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC1_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**ADC1 GPIO Configuration    
+    PA4     ------> ADC1_IN4
+    PA5     ------> ADC1_IN5
+    PA6     ------> ADC1_IN6 
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN ADC1_MspInit 1 */
+
+  /* USER CODE END ADC1_MspInit 1 */
+  }
+  else if(hadc->Instance==ADC3)
+  {
+  /* USER CODE BEGIN ADC3_MspInit 0 */
+
+  /* USER CODE END ADC3_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_ADC3_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    /**ADC3 GPIO Configuration    
+    PF6     ------> ADC3_IN4
+    PF7     ------> ADC3_IN5
+    PF8     ------> ADC3_IN6
+    PF9     ------> ADC3_IN7
+    PF10     ------> ADC3_IN8 
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9 
+                          |GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN ADC3_MspInit 1 */
+
+  /* USER CODE END ADC3_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+  if(hadc->Instance==ADC1)
+  {
+  /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+  /* USER CODE END ADC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADC1_CLK_DISABLE();
+  
+    /**ADC1 GPIO Configuration    
+    PA4     ------> ADC1_IN4
+    PA5     ------> ADC1_IN5
+    PA6     ------> ADC1_IN6 
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
+
+  /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+  /* USER CODE END ADC1_MspDeInit 1 */
+  }
+  else if(hadc->Instance==ADC3)
+  {
+  /* USER CODE BEGIN ADC3_MspDeInit 0 */
+
+  /* USER CODE END ADC3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADC3_CLK_DISABLE();
+  
+    /**ADC3 GPIO Configuration    
+    PF6     ------> ADC3_IN4
+    PF7     ------> ADC3_IN5
+    PF8     ------> ADC3_IN6
+    PF9     ------> ADC3_IN7
+    PF10     ------> ADC3_IN8 
+    */
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9 
+                          |GPIO_PIN_10);
+
+  /* USER CODE BEGIN ADC3_MspDeInit 1 */
+
+  /* USER CODE END ADC3_MspDeInit 1 */
+  }
+
+}
+
 /**
 * @brief I2C MSP Initialization
 * This function configures the hardware resources used in this example
@@ -263,6 +374,33 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
 
   /* USER CODE END USART1_MspInit 1 */
   }
+  else if(huart->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspInit 0 */
+
+  /* USER CODE END USART2_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_USART2_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**USART2 GPIO Configuration    
+    PA2     ------> USART2_TX
+    PA3     ------> USART2_RX 
+    */
+    GPIO_InitStruct.Pin = RFU_TX_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    HAL_GPIO_Init(RFU_TX_GPIO_Port, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = RFU_RX_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(RFU_RX_GPIO_Port, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN USART2_MspInit 1 */
+
+  /* USER CODE END USART2_MspInit 1 */
+  }
 
 }
 
@@ -298,6 +436,24 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 
   /* USER CODE END USART1_MspDeInit 1 */
   }
+  else if(huart->Instance==USART2)
+  {
+  /* USER CODE BEGIN USART2_MspDeInit 0 */
+
+  /* USER CODE END USART2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART2_CLK_DISABLE();
+  
+    /**USART2 GPIO Configuration    
+    PA2     ------> USART2_TX
+    PA3     ------> USART2_RX 
+    */
+    HAL_GPIO_DeInit(GPIOA, RFU_TX_Pin|RFU_RX_Pin);
+
+  /* USER CODE BEGIN USART2_MspDeInit 1 */
+
+  /* USER CODE END USART2_MspDeInit 1 */
+  }
 
 }