BootLoader STart

.gitignore

@@ -0,0 +1,3 @@
+insight
+insight
+insight

Debug/STM32F103_ATTEN_PLL_Zig.hex

@@ -1,23 +1,23 @@
 :020000040800F2
-:100000000000012075190008FD180008FF180008FD
-:100010000119000803190008051900080000000074
-:1000200000000000000000000000000007190008A8
-:1000300009190008000000000B1900080D1900083C
-:10004000BD190008BD190008BD190008BD19000838
-:10005000BD190008BD190008BD190008BD19000828
-:10006000BD190008BD190008BD19000811190008C4
-:10007000BD190008BD190008BD190008BD19000808
-:10008000BD190008BD190008BD190008BD190008F8
-:10009000BD190008BD190008BD190008BD190008E8
-:1000A000BD190008BD190008BD190008BD190008D8
-:1000B000BD190008BD190008BD190008BD190008C8
-:1000C000BD190008BD190008BD190008BD190008B8
-:1000D000BD1900081D190008BD190008BD19000848
-:1000E000BD190008BD190008BD190008BD19000898
-:1000F000BD190008BD190008BD190008BD19000888
-:10010000BD190008BD190008BD190008BD19000877
-:10011000BD190008BD190008BD190008BD19000867
-:10012000BD190008BD190008BD190008BD19000857
+:1000000000000120ED130008691300086B130008BD
+:100010006D1300086F130008711300080000000042
+:100020000000000000000000000000007313000842
+:10003000751300080000000077130008791300080A
+:10004000351400083514000835140008351400086C
+:10005000351400083514000835140008351400085C
+:10006000351400083514000835140008351400084C
+:1000700035140008351400087D13000889130008A2
+:10008000351400083514000835140008351400082C
+:10009000351400083514000835140008351400081C
+:1000A000351400083514000835140008351400080C
+:1000B00035140008351400083514000835140008FC
+:1000C00035140008351400083514000835140008EC
+:1000D000351400089513000835140008351400087D
+:1000E00035140008351400083514000835140008CC
+:1000F00035140008351400083514000835140008BC
+:1001000035140008351400083514000835140008AB
+:10011000351400083514000835140008351400089B
+:10012000351400083514000835140008351400088B
 :1001300000000000000000000000000000000000BF
 :1001400000000000000000000000000000000000AF
 :10015000000000000000000000000000000000009F
@@ -32,398 +32,310 @@
 :0401E0005FF8E0F1F3
 :1001E40010B5054C237833B9044B13B10448AFF36D
 :1001F40000800123237010BD0C00002000000000CB
-:10020400181A000808B5034B1BB103490348AFF3A0
-:10021400008008BD0000000010000020181A00082B
+:100204009014000808B5034B1BB103490348AFF32E
+:10021400008008BD000000001000002090140008B9
 :1002240038B50E4B054618784FF47A73B3FBF0F3E8
-:100234000B4A1068B0FBF3F000F0BCF9044658B95F
-:100244000F2D09D8024629464FF0FF3000F072F90D
+:100234000B4A1068B0FBF3F000F08CF8044658B990
+:100244000F2D09D8024629464FF0FF3000F042F83E
 :10025400044B20461D6038BD012038BD000000203D
 :100264000800002004000020074A08B51368032092
-:1002740043F01003136000F04BF90020FFF7D0FFA8
-:1002840001F06CFA002008BD00200240034A044B30
+:1002740043F01003136000F01BF80020FFF7D0FFD9
+:1002840000F0E2FF002008BD00200240034A044BB6
 :1002940011681B780B441360704700BF28000020CE
 :1002A40000000020014B1868704700BF28000020A0
-:1002B400002373B5019390F82430012B74D00123EB
-:1002C4004D6880F82430062D02684FEA85030C68D7
-:1002D40025D82B441F25566B053B9D4026EA050572
-:1002E40004FA03F32B435363092C4FEA44038D6848
-:1002F4002FD907262344D1681E3B9E4021EA0601DC
-:1003040005FA03F30B43D360A4F11003012B2BD99B
-:100314000023002280F82420184602B070BD0C2D62
-:100324000BD82B441F25166B233B9D4026EA05055D
-:1003340004FA03F32B431363D6E72B441F25D66A31
-:10034400413B9D4026EA050504FA03F32B43D3629F
-:10035400CAE70726116923449E4021EA060105FAEB
-:1003640003F30B431361CFE7104B9A4216D1936802
-:100374001B02CDD49368102C43F400039360C7D1BF
-:100384000B4B0C4A1B68B3FBF2F20A235343019351
-:10039400019B002BBCD0019B013BF8E7836A43F02F
-:1003A400200383620123B4E70223B5E7002401405C
-:1003B4000800002040420F0038B5036804469A68DC
-:1003C400D20701D4002038BD9A6822F001029A6055
-:1003D400FFF768FF054623689B68DB07F2D5FFF744
-:1003E40061FF401B0228F6D9A36A012043F01003E1
-:1003F400A362E36A43F00103E36238BDF8B504463F
-:10040400002877D0836A23B9C36280F8243001F0CE
-:10041400C7F92046FFF7D0FFA36A13F010036BD18E
-:10042400002869D1A26A374922F4885222F00202D4
-:1004340042F00202A26294E824008A42E16904D1F3
-:10044400B1F5402F08BF4FF40021E66845EA4605A0
-:100454002943A568B5F5807F35D0012D08BF4FF439
-:1004640080736769012F06D17EBBA669013E43EA0A
-:10047400463343F400635668B5F5807F26F4694635
-:1004840043EA0603536096681F4B03EA060343EAF4
-:100494000103936001D0012D20D12369013B1B0589
-:1004A400D56A25F470052B43D3629268174B134029
-:1004B400994215D10023E362A36A23F0030343F0B6
-:1004C4000103A362F8BD2B46CBE7A66A46F02006DB
-:1004D400A662E66A46F00106E662CCE70023DFE79F
-:1004E400A36A23F0120343F01003A362E36A43F008
-:1004F4000103E3620120F8BDA36A43F01003A36281
-:10050400F8E700BF003C0140FDF7E1FFFE0E1FFFCE
-:10051400074A0002D36800F4E06023F4E0631B049C
-:100524001B0C43F0BF6343F400330343D3607047B1
-:1005340000ED00E0174B30B5DC68C4F30224C4F1CD
-:100544000703251D042B28BF0423062D4FF00105A6
-:1005540098BF002405FA03F303F1FF3388BF033C7B
-:100564001940A14005FA04F4013C2240002842EA63
-:1005740001024FEA0212AFBF00F16040064B00F0E7
-:100584000F00D2B2A5BFD2B200F561401A5480F870
-:10059400002330BD00ED00E014ED00E0012342092A
-:1005A40000F01F0003FA00F0014B43F822007047EB
-:1005B40000E100E00138B0F1807F0AD2F021064B5F
-:1005C400064A586082F823100020072298601A60B7
-:1005D40070470120704700BF10E000E000ED00E02C
-:1005E40010B5002832D00168194B1424994225D83B
-:1005F400184AA3F207430A44B2FBF4F292000264DD
-:100604008468C36343680A682343C46822F47F523E
-:100614002343046922F03002234344692343846959
-:100624002343C469234313430B600122002380F84E
-:100634002120836380F82030184610BD064B0B44FC
-:10064400B3FBF4F39B000364044BD9E7012010BD12
-:1006540007040240F8FFFDBFF8FBFDBF00040240A1
-:1006640090F8213010B5022B03D0042383630120BA
-:1006740010BD03681A6822F00E021A601A6822F08C
-:1006840001021A60294A934224D902F56272934204
-:1006940019D01432934218D01432934217D0143222
-:1006A40093420CBF4FF480534FF48033204A53607D
-:1006B4000123002480F82130436B80F820409BB351
-:1006C4009847204610BD0123F0E71023EEE74FF4CE
-:1006D4008073EBE717498B4216D014318B4215D047
-:1006E40014318B4214D014318B4214D014318B4208
-:1006F40014D014318B4214D0934214BF4FF480337E
-:100704004FF080730C4AD2E70123FBE71023F9E78B
-:100714004FF48073F6E74FF48053F3E74FF48033DC
-:10072400F0E74FF48013EDE7184610BD8000024057
-:1007340000040240080002400000024070B4042596
-:10074400C66B026C3468036895402542196855D01D
-:100754004D0753D51A6896065EBF1A6822F0040244
-:100764001A60604A93421FD902F56272934214D010
-:100774001432934213D01432934212D0143293425F
-:100784000CBF4FF480434FF48023574A5360C36A2D
-:10079400002B00F0A58070BC18470423F5E7402324
-:1007A400F3E74FF48063F0E750498B4216D01431DD
-:1007B4008B4215D014318B4214D014318B4214D097
-:1007C40014318B4214D014318B4214D0934214BF91
-:1007D4004FF480234FF08063454AD7E70423FBE7B7
-:1007E4004023F9E74FF48063F6E74FF48043F3E7DF
-:1007F4004FF48023F0E74FF48003EDE702259540A2
-:10080400254257D08D0755D51A68940606D41A6820
-:1008140022F00A021A60012280F82120314A934210
-:100824001ED902F56272934213D01432934212D04D
-:100834001432934211D0143293420CBF4FF400533C
-:100844004FF40033284A5360002380F82030836A31
-:100854009EE70223F6E72023F4E74FF40073F1E761
-:1008640022498B4216D014318B4215D014318B425D
-:1008740014D014318B4214D014318B4214D014315F
-:100884008B4214D0934214BF4FF400334FF00073E3
-:10089400174AD8E70223FBE72023F9E74FF4007354
-:1008A400F6E74FF40053F3E74FF40033F0E74FF467
-:1008B4000013EDE708259540254211D009070FD50F
-:1008C400196821F00E011960012303FA02F2726023
-:1008D400836380F82130002380F82030036B57E7CE
-:1008E40070BC7047800002400004024008000240CF
-:1008F400000002402DE9F74F002216466C4F6D4B65
-:10090400DFF8B8E1DFF8B8C14FF001080C6808FA65
-:1009140006F808EA0404A04540F085804D68122DCD
-:1009240000F0B78000F28D80022D00F0AF8000F25D
-:100934008180002D00F09180012D00F0A5804FF002
-:100944000F09FF2C93BF824606F18045083DD0F87D
-:1009540000B092BFB500D0F804B0AD0009FA05F8B4
-:100964002BEA080802FA05F588BF00F1040A48EAF0
-:100974000505CAF80050D1F804A01AF0805F52D0DF
-:10098400BD6926F0030845F00105BD61BD6908F1A4
-:10099400804805F00105019508F5803806F0030B41
-:1009A400019D4FEA8B0BD8F8085009FA0BF925EA98
-:1009B4000909414DA84271D005F58065A8426FD060
-:1009C40005F58065A8426DD005F58065A8426BD019
-:1009D40005F58065A84269D070450CBF052506253C
-:1009E40005FA0BF545EA0905C8F808501D681AF41C
-:1009F400803F14BF2543A5431D605D681AF4003F82
-:100A040014BF2543A5435D609D681AF4801F14BF7D
-:100A14002543A5439D60DD681AF4001F14BF2C43D1
-:100A240025EA0404DC600136102E7FF46DAF03B0B8
-:100A3400BDE8F08F032D25D0112D80D1CA68043272
-:100A44007DE7654509D012D8DFF878904D4504D08C
-:100A540009F580394D457FF472AF8A68E2B1012A05
-:100A64000CBFC0F81080C0F81480082267E7DFF8D4
-:100A740058904D45F1D009F580394D45EDD0A9F593
-:100A84008019E7E700225AE7CA6858E7CA680832BB
-:100A940055E7CA680C3252E7042250E700259FE765
-:100AA40001259DE702259BE7032599E7042597E7A0
-:100AB400001002400004014000080140001C0140F5
-:100AC4000000211000001110000031100AB1016172
-:100AD40070470904FBE7000003682DE9F341DB07D5
-:100AE400054610D42B689F075ED42B68190700F1C4
-:100AF40095802B685A0700F1BF80EA69002A40F00C
-:100B04002D81002014E0904C636803F00C03042B47
-:100B140007D0636803F00C03082B0CD16368DE0371
-:100B240009D523689C03DDD56B68002BDAD101203D
-:100B340002B0BDE8F0816B68B3F5803F10D1236843
-:100B440043F480332360FFF7ADFB06462368980324
-:100B5400C8D4FFF7A7FB801B6428F7D90320E7E775
-:100B64009BB9236823F480332360236823F4802310
-:100B74002360FFF797FB064623689903B2D5FFF776
-:100B840091FB801B6428F7D9E8E7B3F5A02F23680D
-:100B940003D143F480232360D1E723F4803323601B
-:100BA400236823F48023CDE7674C636813F00C0FAC
-:100BB40007D0636803F00C03082B10D16368DA03D1
-:100BC4000DD423689B0702D52B69012BAFD1236871
-:100BD4006A6923F0F80343EAC203236085E72A69BC
-:100BE4005A4B6AB101221A60FFF75CFB0646236880
-:100BF4009F07ECD4FFF756FB801B0228F7D9ADE71B
-:100C04001A60FFF74FFB0646236898077FF56DAF20
-:100C1400FFF748FB801B0228F6D99FE7AA694A4CD4
-:100C24004B4BDAB101221A60FFF73CFB0646636ABC
-:100C34009B070DD54FF4FA52464B1B68B3FBF2F3F6
-:100C4400019300BF019B5A1E0192002BF9D150E77A
-:100C5400FFF728FB801B0228E9D97FE71A60FFF71A
-:100C640021FB0646636A9F077FF543AFFFF71AFB34
-:100C7400801B0228F6D971E7334CE369D80024D4E9
-:100C84000127E36943F08053E361E36903F0805390
-:100C94000093009B304E3368D90518D5EB68012BBF
-:100CA40026D1236A43F001032362FFF7FBFA41F2E2
-:100CB40088368046236A9B073FD5002F3FF41DAF3B
-:100CC400E36923F08053E36117E70027E2E7336821
-:100CD40043F480733360FFF7E5FA80463368DA053E
-:100CE400DCD4FFF7DFFAA0EB08006428F6D935E777
-:100CF400ABB9236A41F2883823F001032362236AE3
-:100D040023F004032362FFF7CDFA0646236A98070B
-:100D1400D3D5FFF7C7FA801B4045F7D91EE7052B4B
-:100D2400236A03D143F004032362BAE723F00103E7
-:100D34002362236A23F00403B6E7FFF7B3FAA0EBB8
-:100D44000800B042B6D909E7001002400000424250
-:100D5400800442420800002000700040224C636876
-:100D640003F00C03082B3FF4E2AE00231F4E022ACB
-:100D740033602BD1FFF796FA0746236899011FD4F5
-:100D84002B6AB3F5803F05D16268A96822F400326A
-:100D94000A436260696A62680B4322F47412134363
-:100DA400636001233360FFF77DFA054623689A01E7
-:100DB4003FF5A7AEFFF776FA401B0228F6D9CDE639
-:100DC400FFF770FAC01B0228D7D9C7E6FFF76AFA03
-:100DD400054623689B017FF594AEFFF763FA401B39
-:100DE4000228F6D9BAE600BF001002406000424271
-:100DF40030B5194B87B002AC03F1100522461868D0
-:100E04005968083303C2AB421446F7D101238DF865
-:100E14000430022311498DF805304B6803F00C02AD
-:100E2400082A17D1C3F3834206A80244DB0312F84D
-:100E3400102C0CD54B680A48C3F34043504306AA10
-:100E4400134413F8143CB0FBF3F007B030BD05486D
-:100E54005043FAE70248F8E7301A0008001002404D
-:100E640000127A0000093D00544A2DE9F04113684C
-:100E7400054603F007038B420E462AD329688C07E4
-:100E840034D4CA0747D44D4A136803F007039E427B
-:100E9400C0F082802A684A4C12F0040F40F0878028
-:100EA400130706D563682A6923F4605343EAC2032F
-:100EB4006360FFF79DFF6368424AC3F30313D35C87
-:100EC400D840414B18600020FFF7AAF90020BDE884
-:100ED400F081136823F007030B431360136803F0D6
-:100EE40007039942CAD00120BDE8F081344B11F0C8
-:100EF400040F1EBF5A6842F4E0625A60080742BFFA
-:100F04005A6842F460525A605A68A86822F0F002A3
-:100F140002435A60B5E76A68294C012A23681CD148
-:100F240013F4003FDFD0636841F2883823F00303F1
-:100F340013436360FFF7B6F96B680746012B14D1BE
-:100F4400636803F00C03042B9DD0FFF7ABF9C01BBF
-:100F54004045F5D90320BDE8F081022A02D113F0FF
-:100F6400007FDFE713F0020FDCE7022B0FD1636889
-:100F740003F00C03082B86D0FFF794F9C01B4045FF
-:100F8400F5D9E7E7FFF78EF9C01B4045E2D863685F
-:100F940013F00C0FF6D176E7136823F007033343FD
-:100FA4001360136803F007039E429CD172E76368E1
-:100FB400E96823F4E0630B43636071E700200240B7
-:100FC40000100240401A000808000020044B054AA3
-:100FD4005B68C3F30223D35C034A1068D8407047AC
-:100FE40000100240501A000808000020044B054A73
-:100FF4005B68C3F3C223D35C034A1068D8407047CC
-:1010040000100240501A00080800002003682DE96F
-:10101400F341D907054620D5354CE369DA0032D4CB
-:101024000127E36943F08053E361E36903F08053EC
-:101034000193019B2F4E3368DB0526D5236A13F4F5
-:10104400407336D1236A6A6823F4407313432362DE
-:101054001FB1E36923F08053E3612868830706D551
-:10106400234AA968536823F440430B43536010F0A8
-:1010740010001BD01E4A69695368002023F48003C2
-:101084000B43536012E00027D4E7336843F48073C2
-:101094003360FFF707F980463368D805CED4FFF7ED
-:1010A40001F9A0EB08006428F6D9032002B0BDE8DA
-:1010B400F0816A6802F440729342C3D001200E4A60
-:1010C400236A1060002023F4407110602162D90764
-:1010D400B8D5FFF7E7F841F288380646236A9A073D
-:1010E400B0D4FFF7DFF8801B4045F7D9DDE700BF38
-:1010F4000010024000700040400442420368DA6875
-:1011040022F49072DA605A6922F001025A612023B3
-:1011140080F83A30704700002DE9F0470568C2684E
-:101124002B69016923F4405313432B618368EA68F4
-:101134000B43416922F4B05222F00C020B431343D7
-:10114400EB606B69826923F4407313436B61404B1A
-:1011540081469D424FF0190446D1FFF747FF04FB37
-:1011640000F3D9F804604FF06408B600B3FBF6F35B
-:10117400B3FBF8F31E01FFF739FF6043D9F80430DD
-:101184009B00B0FBF3F7FFF731FF6043D9F804305D
-:101194009B00B0FBF3F3B3FBF8F308FB13731B01E1
-:1011A4003233B3FBF8F303F0F007FFF71FFF60439C
-:1011B400D9F804209200B0FBF2FAFFF717FF60435E
-:1011C400D9F804309B00B0FBF3F3B3FBF8F308FB4E
-:1011D40013A31B013233B3FBF8F303F00F033B43B8
-:1011E4003344AB60BDE8F087FFF7F0FE04FB00F387
-:1011F400D9F804604FF06408B600B3FBF6F3B3FB10
-:10120400F8F31E01FFF7E2FE6043D9F804309B00B7
-:10121400B0FBF3F7FFF7DAFE6043D9F804309B0024
-:10122400B0FBF3F3B3FBF8F308FB13731B01323386
-:10123400B3FBF8F303F0F007FFF7C8FE6043D9F8F7
-:1012440004209200B0FBF2FAFFF7C0FEB7E700BF3C
-:101254000038014010B5044640B390F8393003F02B
-:10126400FF021BB980F8382000F00AFB242322680F
-:1012740084F83930D368204623F40053D360FFF751
-:101284004BFF236800201A6922F490421A615A69BC
-:1012940022F02A025A61DA6842F40052DA6020230A
-:1012A400E06384F8393084F83A3010BD012010BD71
-:1012B4007047704790F83A3010B5222B36D18368C6
-:1012C4000169B3F5805F0268836A23D15268E9B982
-:1012D400C2F3080223F8022B8362C48D013CA4B23A
-:1012E400C4858CB90368DA6822F02002DA60DA680F
-:1012F40022F48072DA605A6922F001025A612023D2
-:1013040080F83A30FFF7D5FF002010BDD2B223F8A1
-:10131400012BE1E721B9591C526881621A70DCE79C
-:101324005268591C816202F07F02F7E7022010BD67
-:1013340070470000036870B51A6804461607D96838
-:101344005D6907D196065AD58D0658D5BDE870401B
-:10135400FFF7B0BF15F0010502D111F4907F4ED014
-:10136400D30705D5CE0542BFE36B43F00103E36326
-:10137400500704D51DB1E36B43F00203E363930705
-:1013840004D51DB1E36B43F00403E363160704D5EE
-:101394001DB1E36B43F00803E363E36B002B66D0FA
-:1013A400950604D5880602D52046FFF783FF2368F7
-:1013B40020465D69E26B110702D415F040051AD08E
-:1013C400FFF79CFE23685A69520610D55A69606B70
-:1013D40022F040025A6150B1254B4363FFF740F9B4
-:1013E400002844D0606BBDE87040436B184720462A
-:1013F400FFF79EFF70BDFFF79BFFE56370BD160608
-:1014040027D50D0625D594F83920212A2FD1A26895
-:10141400B2F5805F226A17D11188C1F308015960BF
-:10142400216979B902322262E28C013A92B2E284F1
-:10143400EAB9DA6822F08002DA60DA6842F040023F
-:10144400DA6070BD0132EEE7511C216212785A60F5
-:10145400EAE750060BD54A0609D5DA68204622F099
-:101464004002DA60202384F83930FFF721FF70BD91
-:101474007914000808B50023406AC385C384FFF7C4
-:1014840057FF08BD10B596B0282200210CA800F023
-:10149400B9FA1422002101A800F0B4FA182200219C
-:1014A4000DEB020000F0AEFA012310931023022486
-:1014B40011934FF450130CA815930C941394FFF745
-:1014C4000BFB0F234FF4806201930023214601A8F4
-:1014D4000393049205930294FFF7C6FC4FF4004370
-:1014E40006A806940893FFF791FD16B010BD0000FE
-:1014F40080B58E4D8CB0FEF7B7FEFFF7C3FF102208
-:10150400002108A800F07EFAAB69002243F04003F2
-:10151400AB61AB697F2103F040030193019BAB698D
-:10152400834843F01003AB61AB69002403F010035C
-:101534000293029BAB69012743F08003AB61AB6963
-:10154400022603F080030393039BAB694FF00C085E
-:1015540043F00403AB61AB6903F004030493049BFD
-:10156400AB6943F00803AB61AB6903F0080305936F
-:10157400059BAB6943F02003AB61AB6903F0200327
-:101584000693069BAB6943F48073AB61AB6903F4C8
-:1015940080730793079BFFF799FA00224EF2C0016C
-:1015A4006448FFF793FA002240F2F3316248FFF7F0
-:1015B4008DFA002248F6FF716048FFF787FA00228F
-:1015C40043F6FC515E48FFF781FA002218215D487A
-:1015D400FFF77CFA7F2308A95548089309970A94D2
-:1015E4000B96FFF787F94EF2C00308A951480893F8
-:1015F40009970A940B96FFF77DF940F2F33308A993
-:101604004D48089309970A940B96FFF773F908A9B4
-:101614004948CDF8208009940A94FFF76BF948F6FD
-:10162400FF7308A94548089309970A940B96FFF796
-:1016340061F94FF4405308A94048089309940A9467
-:10164400FFF758F943F6FC5308A93D480893099756
-:101654000A940B96FFF74EF94FF4407308A93548E6
-:10166400089309940A94FFF745F94FF4007308931B
-:10167400032308A932480993FFF73CF9182308A962
-:101684003048089309970A940B96FFF733F96023BF
-:1016940008A92C48089309940A94FFF72BF96B695D
-:1016A40022463B436B616B6921463B4000930B2010
-:1016B400009BFEF73FFF0B20FEF770FF224D234BEC
-:1016C40028462B604FF48073AB604FF4602308947A
-:1016D400EB6109940A94EC606C616C602E61FEF716
-:1016E4008DFE08A92846089409970A94FEF7E0FDA0
-:1016F40008A928460996FEF7DBFD4FF4E1331448A8
-:10170400144A846080E80C00C4600461C0F814804A
-:101714008461C461FFF79EFD252022462146FEF721
-:1017240009FF2520FEF73AFFFEE700BF0010024044
-:101734000018014000100140001C01400014014049
-:1017440000200140000C01402C0000200024014036
-:101754005C00002000380140704700000E4B82B04E
-:101764009A6942F001029A619A6902F001020092B8
-:10177400009ADA6942F08052DA61DB69074A03F0C1
-:1017840080530193019B536823F0E06343F080632B
-:10179400536002B0704700BF0010024000000140D7
-:1017A400102230B5054689B00DEB0200002100F08F
-:1017B40029F92A682C4B9A4253D103F56C439A6950
-:1017C400032442F400729A619A6904A902F4007233
-:1017D4000092009A9A69254842F010029A619A6927
-:1017E40002F010020192019A9A6942F004029A618D
-:1017F4009A6902F004020292029A9A6942F008027B
-:101804009A619B69059403F008030393039B0F23D8
-:101814000493FFF76FF8FF2304A915480493059474
-:10182400FFF768F8134804A904940594FFF762F8D5
-:101834008022114C114BE2604FF4807222614FF40C
-:101844008062236062610023202220466360A360DB
-:10185400A261E361FEF7C4FE08B1FFF77DFF2C62CD
-:10186400656209B030BD00BF002401400010014092
-:1018740000080140000C01409C00002008000240C8
-:1018840010B5044686B01022002102A800F0BAF870
-:101894002268174B9A4228D103F558439A6902A942
-:1018A40042F480429A619A69124802F4804200929A
-:1018B400009A9A6942F004029A619B6903F0040356
-:1018C4000193019B4FF400730293022303930323B8
-:1018D4000593FFF70FF84FF480630293002302A9E6
-:1018E400044803930493FFF705F806B010BD00BF46
-:1018F40000380140000801407047FEE7FEE7FEE7BC
-:10190400FEE7704770477047FEF7C0BC0148FEF71A
-:1019140015BF00BF9C0000200148FFF70BBD00BFAE
-:101924005C0000200F4B1A6842F001021A605968EB
-:101934000D4A0A405A601A6822F0847222F48032F6
-:101944001A601A6822F480221A605A6822F4FE028D
-:101954005A604FF41F029A604FF00062034B9A6082
-:10196400704700BF001002400000FFF800ED00E0E7
-:10197400002103E00B4B5B58435004310A480B4BE6
-:1019840042189A42F6D30A4A02E0002342F8043B82
-:10199400084B9A42F9D3FFF7C5FF00F00FF8FFF7A1
-:1019A400A7FD7047601A0008000000200C0000200A
-:1019B4000C000020E0000020FEE7000070B50025C8
-:1019C4000C4E0D4CA41BA410A54209D100F022F822
-:1019D40000250A4E0A4CA41BA410A54205D170BDD3
-:1019E40056F8253098470135EEE756F825309847E4
-:1019F4000135F2E7581A0008581A0008581A000866
-:101A04005C1A000803460244934200D1704703F86D
-:101A1400011BF9E7F8B500BFF8BC08BC9E46704747
-:0C1A2400F8B500BFF8BC08BC9E46704737
-:101A300002030405060708090A0B0C0D0E0F10100F
-:101A4000000000000000000001020304060708096E
-:081A5000000000000102030484
-:041A58000902000877
-:041A5C00E501000898
-:0C1A6000010000001000000000A24A0479
-:040000050800197561
+:1002B400074A0002D36800F4E06023F4E0631B04FF
+:1002C4001B0C43F0BF6343F400330343D360704714
+:1002D40000ED00E0174B30B5DC68C4F30224C4F130
+:1002E4000703251D042B28BF0423062D4FF0010509
+:1002F40098BF002405FA03F303F1FF3388BF033CDE
+:100304001940A14005FA04F4013C2240002842EAC5
+:1003140001024FEA0212AFBF00F16040064B00F049
+:100324000F00D2B2A5BFD2B200F561401A5480F8D2
+:10033400002330BD00ED00E014ED00E0012342098C
+:1003440000F01F0003FA00F0014B43F8220070474D
+:1003540000E100E00138B0F1807F0AD2F021064BC1
+:10036400064A586082F823100020072298601A6019
+:1003740070470120704700BF10E000E000ED00E08E
+:1003840010B5002832D00168194B1424994225D89D
+:10039400184AA3F207430A44B2FBF4F2920002643F
+:1003A4008468C36343680A682343C46822F47F52A1
+:1003B4002343046922F030022343446923438469BC
+:1003C4002343C469234313430B600122002380F8B1
+:1003D4002120836380F82030184610BD064B0B445F
+:1003E400B3FBF4F39B000364044BD9E7012010BD75
+:1003F40007040240F8FFFDBFF8FBFDBF0004024004
+:1004040090F8213010B5022B03D00423836301201C
+:1004140010BD03681A6822F00E021A601A6822F0EE
+:1004240001021A60294A934224D902F56272934266
+:1004340019D01432934218D01432934217D0143284
+:1004440093420CBF4FF480534FF48033204A5360DF
+:100454000123002480F82130436B80F820409BB3B3
+:100464009847204610BD0123F0E71023EEE74FF430
+:100474008073EBE717498B4216D014318B4215D0A9
+:1004840014318B4214D014318B4214D014318B426A
+:1004940014D014318B4214D0934214BF4FF48033E0
+:1004A4004FF080730C4AD2E70123FBE71023F9E7EE
+:1004B4004FF48073F6E74FF48053F3E74FF480333F
+:1004C400F0E74FF48013EDE7184610BD80000240BA
+:1004D40000040240080002400000024070B40425F9
+:1004E400C66B026C3468036895402542196855D080
+:1004F4004D0753D51A6896065EBF1A6822F00402A7
+:100504001A60604A93421FD902F56272934214D072
+:100514001432934213D01432934212D014329342C1
+:100524000CBF4FF480434FF48023574A5360C36A8F
+:10053400002B00F0A58070BC18470423F5E7402386
+:10054400F3E74FF48063F0E750498B4216D014313F
+:100554008B4215D014318B4214D014318B4214D0F9
+:1005640014318B4214D014318B4214D0934214BFF3
+:100574004FF480234FF08063454AD7E70423FBE719
+:100584004023F9E74FF48063F6E74FF48043F3E741
+:100594004FF48023F0E74FF48003EDE70225954004
+:1005A400254257D08D0755D51A68940606D41A6883
+:1005B40022F00A021A60012280F82120314A934273
+:1005C4001ED902F56272934213D01432934212D0B0
+:1005D4001432934211D0143293420CBF4FF400539F
+:1005E4004FF40033284A5360002380F82030836A94
+:1005F4009EE70223F6E72023F4E74FF40073F1E7C4
+:1006040022498B4216D014318B4215D014318B42BF
+:1006140014D014318B4214D014318B4214D01431C1
+:100624008B4214D0934214BF4FF400334FF0007345
+:10063400174AD8E70223FBE72023F9E74FF40073B6
+:10064400F6E74FF40053F3E74FF40033F0E74FF4C9
+:100654000013EDE708259540254211D009070FD571
+:10066400196821F00E011960012303FA02F2726085
+:10067400836380F82130002380F82030036B57E730
+:1006840070BC704780000240000402400800024031
+:10069400000002402DE9F74F002216466C4F6D4BC7
+:1006A400DFF8B8E1DFF8B8C14FF001080C6808FAC8
+:1006B40006F808EA0404A04540F085804D68122D30
+:1006C40000F0B78000F28D80022D00F0AF8000F2C0
+:1006D4008180002D00F09180012D00F0A5804FF065
+:1006E4000F09FF2C93BF824606F18045083DD0F8E0
+:1006F40000B092BFB500D0F804B0AD0009FA05F817
+:100704002BEA080802FA05F588BF00F1040A48EA52
+:100714000505CAF80050D1F804A01AF0805F52D041
+:10072400BD6926F0030845F00105BD61BD6908F106
+:10073400804805F00105019508F5803806F0030BA3
+:10074400019D4FEA8B0BD8F8085009FA0BF925EAFA
+:100754000909414DA84271D005F58065A8426FD0C2
+:1007640005F58065A8426DD005F58065A8426BD07B
+:1007740005F58065A84269D070450CBF052506259E
+:1007840005FA0BF545EA0905C8F808501D681AF47E
+:10079400803F14BF2543A5431D605D681AF4003FE4
+:1007A40014BF2543A5435D609D681AF4801F14BFE0
+:1007B4002543A5439D60DD681AF4001F14BF2C4334
+:1007C40025EA0404DC600136102E7FF46DAF03B01B
+:1007D400BDE8F08F032D25D0112D80D1CA680432D5
+:1007E4007DE7654509D012D8DFF878904D4504D0EF
+:1007F40009F580394D457FF472AF8A68E2B1012A68
+:100804000CBFC0F81080C0F81480082267E7DFF836
+:1008140058904D45F1D009F580394D45EDD0A9F5F5
+:100824008019E7E700225AE7CA6858E7CA6808321D
+:1008340055E7CA680C3252E7042250E700259FE7C7
+:1008440001259DE702259BE7032599E7042597E702
+:10085400001002400004014000080140001C014057
+:100864000000211000001110000031100AB10161D4
+:1008740070470904FBE7000003682DE9F341DB0737
+:10088400054610D42B689F075ED42B68190700F126
+:1008940095802B685A0700F1BF80EA69002A40F06E
+:1008A4002D81002014E0904C636803F00C03042BAA
+:1008B40007D0636803F00C03082B0CD16368DE03D4
+:1008C40009D523689C03DDD56B68002BDAD10120A0
+:1008D40002B0BDE8F0816B68B3F5803F10D12368A6
+:1008E40043F480332360FFF7DDFC06462368980356
+:1008F400C8D4FFF7D7FC801B6428F7D90320E7E7A7
+:100904009BB9236823F480332360236823F4802372
+:100914002360FFF7C7FC064623689903B2D5FFF7A7
+:10092400C1FC801B6428F7D9E8E7B3F5A02F23683E
+:1009340003D143F480232360D1E723F4803323607D
+:10094400236823F48023CDE7674C636813F00C0F0E
+:1009540007D0636803F00C03082B10D16368DA0333
+:100964000DD423689B0702D52B69012BAFD12368D3
+:100974006A6923F0F80343EAC203236085E72A691E
+:100984005A4B6AB101221A60FFF78CFC06462368B1
+:100994009F07ECD4FFF786FC801B0228F7D9ADE74C
+:1009A4001A60FFF77FFC0646236898077FF56DAF52
+:1009B400FFF778FC801B0228F6D99FE7AA694A4C06
+:1009C4004B4BDAB101221A60FFF76CFC0646636AEE
+:1009D4009B070DD54FF4FA52464B1B68B3FBF2F359
+:1009E400019300BF019B5A1E0192002BF9D150E7DD
+:1009F400FFF758FC801B0228E9D97FE71A60FFF74C
+:100A040051FC0646636A9F077FF543AFFFF74AFC34
+:100A1400801B0228F6D971E7334CE369D80024D44B
+:100A24000127E36943F08053E361E36903F08053F2
+:100A34000093009B304E3368D90518D5EB68012B21
+:100A440026D1236A43F001032362FFF72BFC41F212
+:100A540088368046236A9B073FD5002F3FF41DAF9D
+:100A6400E36923F08053E36117E70027E2E7336883
+:100A740043F480733360FFF715FC80463368DA056E
+:100A8400DCD4FFF70FFCA0EB08006428F6D935E7A7
+:100A9400ABB9236A41F2883823F001032362236A45
+:100AA40023F004032362FFF7FDFB0646236A98073D
+:100AB400D3D5FFF7F7FB801B4045F7D91EE7052B7D
+:100AC400236A03D143F004032362BAE723F001034A
+:100AD4002362236A23F00403B6E7FFF7E3FBA0EBEA
+:100AE4000800B042B6D909E70010024000004242B3
+:100AF400800442420800002000700040224C6368D9
+:100B040003F00C03082B3FF4E2AE00231F4E022A2D
+:100B140033602BD1FFF7C6FB0746236899011FD426
+:100B24002B6AB3F5803F05D16268A96822F40032CC
+:100B34000A436260696A62680B4322F474121343C5
+:100B4400636001233360FFF7ADFB054623689A0118
+:100B54003FF5A7AEFFF7A6FB401B0228F6D9CDE66A
+:100B6400FFF7A0FBC01B0228D7D9C7E6FFF79AFB03
+:100B7400054623689B017FF594AEFFF793FB401B6A
+:100B84000228F6D9BAE600BF0010024060004242D3
+:100B940030B5194B87B002AC03F110052246186832
+:100BA4005968083303C2AB421446F7D101238DF8C8
+:100BB4000430022311498DF805304B6803F00C0210
+:100BC400082A17D1C3F3834206A80244DB0312F8B0
+:100BD400102C0CD54B680A48C3F34043504306AA73
+:100BE400134413F8143CB0FBF3F007B030BD0548D0
+:100BF4005043FAE70248F8E7A8140008001002403E
+:100C040000127A0000093D00544A2DE9F0411368AE
+:100C1400054603F007038B420E462AD329688C0746
+:100C240034D4CA0747D44D4A136803F007039E42DD
+:100C3400C0F082802A684A4C12F0040F40F087808A
+:100C4400130706D563682A6923F4605343EAC20391
+:100C54006360FFF79DFF6368424AC3F30313D35CE9
+:100C6400D840414B18600020FFF7DAFA0020BDE8B5
+:100C7400F081136823F007030B431360136803F038
+:100C840007039942CAD00120BDE8F081344B11F02A
+:100C9400040F1EBF5A6842F4E0625A60080742BF5C
+:100CA4005A6842F460525A605A68A86822F0F00206
+:100CB40002435A60B5E76A68294C012A23681CD1AB
+:100CC40013F4003FDFD0636841F2883823F0030354
+:100CD40013436360FFF7E6FA6B680746012B14D1F0
+:100CE400636803F00C03042B9DD0FFF7DBFAC01BF1
+:100CF4004045F5D90320BDE8F081022A02D113F062
+:100D0400007FDFE713F0020FDCE7022B0FD16368EB
+:100D140003F00C03082B86D0FFF7C4FAC01B404530
+:100D2400F5D9E7E7FFF7BEFAC01B4045E2D8636890
+:100D340013F00C0FF6D176E7136823F0070333435F
+:100D44001360136803F007039E429CD172E7636843
+:100D5400E96823F4E0630B43636071E70020024019
+:100D640000100240B814000808000020044B054A93
+:100D74005B68C3F30223D35C034A1068D84070470E
+:100D840000100240C814000808000020044B054A63
+:100D94005B68C3F3C223D35C034A1068D84070472E
+:100DA40000100240C8140008080000200368DA6834
+:100DB40022F49072DA605A6922F001025A61202307
+:100DC40080F83A30704700002DE9F0470568C268A2
+:100DD4002B69016923F4405313432B618368EA6848
+:100DE4000B43416922F4B05222F00C020B4313432B
+:100DF400EB606B69826923F4407313436B61404B6E
+:100E040081469D424FF0190446D1FFF7BFFF04FB12
+:100E140000F3D9F804604FF06408B600B3FBF6F3AE
+:100E2400B3FBF8F31E01FFF7B1FF6043D9F80430B8
+:100E34009B00B0FBF3F7FFF7A9FF6043D9F8043038
+:100E44009B00B0FBF3F3B3FBF8F308FB13731B0134
+:100E54003233B3FBF8F303F0F007FFF797FF604377
+:100E6400D9F804209200B0FBF2FAFFF78FFF604339
+:100E7400D9F804309B00B0FBF3F3B3FBF8F308FBA1
+:100E840013A31B013233B3FBF8F303F00F033B430B
+:100E94003344AB60BDE8F087FFF768FF04FB00F361
+:100EA400D9F804604FF06408B600B3FBF6F3B3FB63
+:100EB400F8F31E01FFF75AFF6043D9F804309B0092
+:100EC400B0FBF3F7FFF752FF6043D9F804309B00FF
+:100ED400B0FBF3F3B3FBF8F308FB13731B013233DA
+:100EE400B3FBF8F303F0F007FFF740FF6043D9F8D2
+:100EF40004209200B0FBF2FAFFF738FFB7E700BF17
+:100F04000038014010B5044640B390F8393003F07E
+:100F1400FF021BB980F8382000F0B8F924232268B6
+:100F240084F83930D368204623F40053D360FFF7A4
+:100F34004BFF236800201A6922F490421A615A690F
+:100F440022F02A025A61DA6842F40052DA6020235D
+:100F5400E06384F8393084F83A3010BD012010BDC4
+:100F64007047704790F83A3010B5222B36D1836819
+:100F74000169B3F5805F0268836A23D15268E9B9D5
+:100F8400C2F3080223F8022B8362C48D013CA4B28D
+:100F9400C4858CB90368DA6822F02002DA60DA6862
+:100FA40022F48072DA605A6922F001025A61202325
+:100FB40080F83A30FFF7D5FF002010BDD2B223F8F5
+:100FC400012BE1E721B9591C526881621A70DCE7F0
+:100FD4005268591C816202F07F02F7E7022010BDBB
+:100FE40070470000036870B51A6804461607D9688C
+:100FF4005D6907D196065AD58D0658D5BDE870406F
+:10100400FFF7B0BF15F0010502D111F4907F4ED067
+:10101400D30705D5CE0542BFE36B43F00103E36379
+:10102400500704D51DB1E36B43F00203E363930758
+:1010340004D51DB1E36B43F00403E363160704D541
+:101044001DB1E36B43F00803E363E36B002B66D04D
+:10105400950604D5880602D52046FFF783FF23684A
+:1010640020465D69E26B110702D415F040051AD0E1
+:10107400FFF79CFE23685A69520610D55A69606BC3
+:1010840022F040025A6150B1254B4363FFF7B8F98F
+:10109400002844D0606BBDE87040436B184720467D
+:1010A400FFF79EFF70BDFFF79BFFE56370BD16065B
+:1010B40027D50D0625D594F83920212A2FD1A268E9
+:1010C400B2F5805F226A17D11188C1F30801596013
+:1010D400216979B902322262E28C013A92B2E28445
+:1010E400EAB9DA6822F08002DA60DA6842F0400293
+:1010F400DA6070BD0132EEE7511C216212785A6049
+:10110400EAE750060BD54A0609D5DA68204622F0EC
+:101114004002DA60202384F83930FFF721FF70BDE4
+:101124002911000808B50023406AC385C384FFF76A
+:1011340057FF08BD10B590B02822002106A800F082
+:101144009DF91422002101A800F098F901230A93C3
+:10115400102302240B934FF4501306A80F93069404
+:101164000D94FFF789FB0F234FF480620193002352
+:10117400214601A80294039304920593FFF744FDCA
+:1011840010B010BD7FB52B4DFFF76EF8FFF7D2FFFF
+:101194001022002102A800F071F9AB69002243F08B
+:1011A4000403AB61AB694FF4004103F00403019302
+:1011B4002148019BFFF75AFB4FF40043029301239C
+:1011C40000240393022302A91B4805930494FFF708
+:1011D40061FA6B69194843F001036B616B69184A42
+:1011E40003F001030293029B4FF4E13380E80C0007
+:1011F4000C2384604361C46004618461C461FFF7AB
+:1012040081FE224621460F20FFF764F80F20FFF7E6
+:1012140095F8224621460E20FFF75CF80E20FFF7D2
+:101224008DF8252022462146FFF754F82520FFF7A4
+:1012340085F8FEE70010024000080140B4000020D9
+:1012440000380140704700000E4B82B09A6942F0AA
+:1012540001029A619A6902F001020092009ADA6925
+:1012640042F08052DA61DB69074A03F0805301934C
+:10127400019B536823F0E06343F08063536002B042
+:10128400704700BF001002400000014070B50646E0
+:1012940086B01022002102A800F0F0F832682B4B2F
+:1012A4009A4251D103F558439A6902A942F4804203
+:1012B4009A619A69264802F480420092009A9A69D7
+:1012C400002542F004029A619B69224C03F0040356
+:1012D4000193019B4FF400730293022303930323AE
+:1012E4000593FFF7D7F94FF48063194802A90293D5
+:1012F40003950495FFF7CEF9174B204684E82800A0
+:101304008023A560E36025616561A561E561FFF760
+:1013140037F808B1FFF796FF4FF0100C0F4B7463CA
+:1013240066620F4C802284E8081000232046A360E4
+:10133400E26023616361A361E361FFF721F808B10F
+:10134400FFF780FF3463666206B070BD0038014069
+:101354000008014070000020580002404400024090
+:101364002C0000207047FEE7FEE7FEE7FEE770472B
+:1013740070477047FEF78ABF0148FFF7AFB800BF58
+:101384002C0000200148FFF7A9B800BF700000201E
+:101394000148FFF727BE00BFB40000200F4B1A68B6
+:1013A40042F001021A6059680D4A0A405A601A68EC
+:1013B40022F0847222F480321A601A6822F48022A5
+:1013C4001A605A6822F4FE025A604FF41F029A60AF
+:1013D4004FF00062034B9A60704700BF0010024058
+:1013E4000000FFF800ED00E0002103E00B4B5B5828
+:1013F400435004310A480B4B42189A42F6D30A4A26
+:1014040002E0002342F8043B084B9A42F9D3FFF769
+:10141400C5FF00F00FF8FFF7B5FE7047D8140008B9
+:10142400000000200C0000200C0000202C010020F3
+:10143400FEE7000070B500250C4E0D4CA41BA41053
+:10144400A54209D100F022F800250A4E0A4CA41B3B
+:10145400A410A54205D170BD56F825309847013532
+:10146400EEE756F8253098470135F2E7D014000826
+:10147400D0140008D0140008D41400080346024411
+:10148400934200D1704703F8011BF9E7F8B500BF98
+:10149400F8BC08BC9E467047F8B500BFF8BC08BC51
+:0414A4009E467047A9
+:1014A80002030405060708090A0B0C0D0E0F10109D
+:1014B80000000000000000000102030406070809FC
+:0814C800000000000102030412
+:0414D0000902000805
+:0414D400E501000826
+:0C14D800010000001000000000A24A0407
+:04000005080013EDEF
 :00000001FF

Debug/Src/CRC16.su

@@ -0,0 +1 @@
+CRC16.c:49:16:genCRC16	8	static

Debug/Src/main.su

@@ -1,3 +1,3 @@
-main.c:124:6:SystemClock_Config	96	static
-main.c:74:5:main	56	static
-main.c:415:6:Error_Handler	0	static
+main.c:122:6:SystemClock_Config	72	static
+main.c:73:5:main	32	static
+main.c:246:6:Error_Handler	0	static

Debug/Src/stm32f1xx_hal_msp.su

@@ -1,5 +1,3 @@
-stm32f1xx_hal_msp.c:65:6:HAL_MspInit	8	static
-stm32f1xx_hal_msp.c:91:6:HAL_ADC_MspInit	48	static
-stm32f1xx_hal_msp.c:164:6:HAL_ADC_MspDeInit	8	static
-stm32f1xx_hal_msp.c:212:6:HAL_UART_MspInit	32	static
-stm32f1xx_hal_msp.c:251:6:HAL_UART_MspDeInit	8	static
+stm32f1xx_hal_msp.c:67:6:HAL_MspInit	8	static
+stm32f1xx_hal_msp.c:93:6:HAL_UART_MspInit	40	static
+stm32f1xx_hal_msp.c:165:6:HAL_UART_MspDeInit	8	static

Debug/Src/stm32f1xx_it.su

@@ -1,11 +1,12 @@
-stm32f1xx_it.c:71:6:NMI_Handler	0	static
-stm32f1xx_it.c:84:6:HardFault_Handler	0	static
-stm32f1xx_it.c:99:6:MemManage_Handler	0	static
-stm32f1xx_it.c:114:6:BusFault_Handler	0	static
-stm32f1xx_it.c:129:6:UsageFault_Handler	0	static
-stm32f1xx_it.c:144:6:SVC_Handler	0	static
-stm32f1xx_it.c:157:6:DebugMon_Handler	0	static
-stm32f1xx_it.c:170:6:PendSV_Handler	0	static
-stm32f1xx_it.c:183:6:SysTick_Handler	0	static
-stm32f1xx_it.c:204:6:DMA1_Channel1_IRQHandler	0	static
-stm32f1xx_it.c:218:6:USART1_IRQHandler	0	static
+stm32f1xx_it.c:72:6:NMI_Handler	0	static
+stm32f1xx_it.c:85:6:HardFault_Handler	0	static
+stm32f1xx_it.c:100:6:MemManage_Handler	0	static
+stm32f1xx_it.c:115:6:BusFault_Handler	0	static
+stm32f1xx_it.c:130:6:UsageFault_Handler	0	static
+stm32f1xx_it.c:145:6:SVC_Handler	0	static
+stm32f1xx_it.c:158:6:DebugMon_Handler	0	static
+stm32f1xx_it.c:171:6:PendSV_Handler	0	static
+stm32f1xx_it.c:184:6:SysTick_Handler	0	static
+stm32f1xx_it.c:205:6:DMA1_Channel4_IRQHandler	0	static
+stm32f1xx_it.c:219:6:DMA1_Channel5_IRQHandler	0	static
+stm32f1xx_it.c:233:6:USART1_IRQHandler	0	static

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h

@@ -1,965 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f1xx_hal_adc.h
-  * @author  MCD Application Team
-  * @brief   Header file containing functions prototypes of ADC HAL library.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F1xx_HAL_ADC_H
-#define __STM32F1xx_HAL_ADC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f1xx_hal_def.h"  
-/** @addtogroup STM32F1xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup ADC
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-/** @defgroup ADC_Exported_Types ADC Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  Structure definition of ADC and regular group initialization 
-  * @note   Parameters of this structure are shared within 2 scopes:
-  *          - Scope entire ADC (affects regular and injected groups): DataAlign, ScanConvMode.
-  *          - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge, ExternalTrigConv.
-  * @note   The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state.
-  *         ADC can be either disabled or enabled without conversion on going on regular group.
-  */
-typedef struct
-{
-  uint32_t DataAlign;             /*!< Specifies ADC data alignment to right (MSB on register bit 11 and LSB on register bit 0) (default setting)
-                                       or to left (if regular group: MSB on register bit 15 and LSB on register bit 4, if injected group (MSB kept as signed value due to potential negative value after offset application): MSB on register bit 14 and LSB on register bit 3).
-                                       This parameter can be a value of @ref ADC_Data_align */
-  uint32_t ScanConvMode;          /*!< Configures the sequencer of regular and injected groups.
-                                       This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
-                                       If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1).
-                                                    Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1).
-                                       If enabled:  Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
-                                                    Scan direction is upward: from rank1 to rank 'n'.
-                                       This parameter can be a value of @ref ADC_Scan_mode
-                                       Note: For regular group, this parameter should be enabled in conversion either by polling (HAL_ADC_Start with Discontinuous mode and NbrOfDiscConversion=1)
-                                             or by DMA (HAL_ADC_Start_DMA), but not by interruption (HAL_ADC_Start_IT): in scan mode, interruption is triggered only on the
-                                             the last conversion of the sequence. All previous conversions would be overwritten by the last one.
-                                             Injected group used with scan mode has not this constraint: each rank has its own result register, no data is overwritten. */
-  uint32_t ContinuousConvMode;    /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
-                                       after the selected trigger occurred (software start or external trigger).
-                                       This parameter can be set to ENABLE or DISABLE. */
-  uint32_t NbrOfConversion;       /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
-                                       To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
-                                       This parameter must be a number between Min_Data = 1 and Max_Data = 16. */
-  uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
-                                       Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
-                                       Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
-                                       This parameter can be set to ENABLE or DISABLE. */
-  uint32_t NbrOfDiscConversion;   /*!< Specifies the number of discontinuous conversions in which the  main sequence of regular group (parameter NbrOfConversion) will be subdivided.
-                                       If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
-                                       This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
-  uint32_t ExternalTrigConv;      /*!< Selects the external event used to trigger the conversion start of regular group.
-                                       If set to ADC_SOFTWARE_START, external triggers are disabled.
-                                       If set to external trigger source, triggering is on event rising edge.
-                                       This parameter can be a value of @ref ADC_External_trigger_source_Regular */
-}ADC_InitTypeDef;
-
-/** 
-  * @brief  Structure definition of ADC channel for regular group   
-  * @note   The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state.
-  *         ADC can be either disabled or enabled without conversion on going on regular group.
-  */ 
-typedef struct 
-{
-  uint32_t Channel;                /*!< Specifies the channel to configure into ADC regular group.
-                                        This parameter can be a value of @ref ADC_channels
-                                        Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
-                                        Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor) 
-                                        Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
-                                              It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
-                                              Refer to errata sheet of these devices for more details. */
-  uint32_t Rank;                   /*!< Specifies the rank in the regular group sequencer 
-                                        This parameter can be a value of @ref ADC_regular_rank
-                                        Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
-  uint32_t SamplingTime;           /*!< Sampling time value to be set for the selected channel.
-                                        Unit: ADC clock cycles
-                                        Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
-                                        This parameter can be a value of @ref ADC_sampling_times
-                                        Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
-                                                 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
-                                        Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
-                                              sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
-                                              Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
-}ADC_ChannelConfTypeDef;
-
-/**
-  * @brief  ADC Configuration analog watchdog definition
-  * @note   The setting of these parameters with function is conditioned to ADC state.
-  *         ADC state can be either disabled or enabled without conversion on going on regular and injected groups.
-  */
-typedef struct
-{
-  uint32_t WatchdogMode;      /*!< Configures the ADC analog watchdog mode: single/all channels, regular/injected group.
-                                   This parameter can be a value of @ref ADC_analog_watchdog_mode. */
-  uint32_t Channel;           /*!< Selects which ADC channel to monitor by analog watchdog.
-                                   This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
-                                   This parameter can be a value of @ref ADC_channels. */
-  uint32_t ITMode;            /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
-                                   This parameter can be set to ENABLE or DISABLE */
-  uint32_t HighThreshold;     /*!< Configures the ADC analog watchdog High threshold value.
-                                   This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
-  uint32_t LowThreshold;      /*!< Configures the ADC analog watchdog High threshold value.
-                                   This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
-  uint32_t WatchdogNumber;    /*!< Reserved for future use, can be set to 0 */
-}ADC_AnalogWDGConfTypeDef;
-
-/** 
-  * @brief  HAL ADC state machine: ADC states definition (bitfields)
-  */ 
-/* States of ADC global scope */
-#define HAL_ADC_STATE_RESET             0x00000000U    /*!< ADC not yet initialized or disabled */
-#define HAL_ADC_STATE_READY             0x00000001U    /*!< ADC peripheral ready for use */
-#define HAL_ADC_STATE_BUSY_INTERNAL     0x00000002U    /*!< ADC is busy to internal process (initialization, calibration) */
-#define HAL_ADC_STATE_TIMEOUT           0x00000004U    /*!< TimeOut occurrence */
-
-/* States of ADC errors */
-#define HAL_ADC_STATE_ERROR_INTERNAL    0x00000010U    /*!< Internal error occurrence */
-#define HAL_ADC_STATE_ERROR_CONFIG      0x00000020U    /*!< Configuration error occurrence */
-#define HAL_ADC_STATE_ERROR_DMA         0x00000040U    /*!< DMA error occurrence */
-
-/* States of ADC group regular */
-#define HAL_ADC_STATE_REG_BUSY          0x00000100U    /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
-                                                           external trigger, low power auto power-on, multimode ADC master control) */
-#define HAL_ADC_STATE_REG_EOC           0x00000200U    /*!< Conversion data available on group regular */
-#define HAL_ADC_STATE_REG_OVR           0x00000400U    /*!< Not available on STM32F1 device: Overrun occurrence */
-#define HAL_ADC_STATE_REG_EOSMP         0x00000800U    /*!< Not available on STM32F1 device: End Of Sampling flag raised  */
-
-/* States of ADC group injected */
-#define HAL_ADC_STATE_INJ_BUSY          0x00001000U    /*!< A conversion on group injected is ongoing or can occur (either by auto-injection mode,
-                                                           external trigger, low power auto power-on, multimode ADC master control) */
-#define HAL_ADC_STATE_INJ_EOC           0x00002000U    /*!< Conversion data available on group injected */
-#define HAL_ADC_STATE_INJ_JQOVF         0x00004000U    /*!< Not available on STM32F1 device: Injected queue overflow occurrence */
-
-/* States of ADC analog watchdogs */
-#define HAL_ADC_STATE_AWD1              0x00010000U    /*!< Out-of-window occurrence of analog watchdog 1 */
-#define HAL_ADC_STATE_AWD2              0x00020000U    /*!< Not available on STM32F1 device: Out-of-window occurrence of analog watchdog 2 */
-#define HAL_ADC_STATE_AWD3              0x00040000U    /*!< Not available on STM32F1 device: Out-of-window occurrence of analog watchdog 3 */
-
-/* States of ADC multi-mode */
-#define HAL_ADC_STATE_MULTIMODE_SLAVE   0x00100000U    /*!< ADC in multimode slave state, controlled by another ADC master ( */
-
-
-/** 
-  * @brief  ADC handle Structure definition  
-  */ 
-typedef struct
-{
-  ADC_TypeDef                   *Instance;              /*!< Register base address */
-
-  ADC_InitTypeDef               Init;                   /*!< ADC required parameters */
-
-  DMA_HandleTypeDef             *DMA_Handle;            /*!< Pointer DMA Handler */
-
-  HAL_LockTypeDef               Lock;                   /*!< ADC locking object */
-  
-  __IO uint32_t                 State;                  /*!< ADC communication state (bitmap of ADC states) */
-
-  __IO uint32_t                 ErrorCode;              /*!< ADC Error code */
-}ADC_HandleTypeDef;
-/**
-  * @}
-  */
-
-
-
-/* Exported constants --------------------------------------------------------*/
-
-/** @defgroup ADC_Exported_Constants ADC Exported Constants
-  * @{
-  */
-
-/** @defgroup ADC_Error_Code ADC Error Code
-  * @{
-  */
-#define HAL_ADC_ERROR_NONE                0x00U   /*!< No error                                              */
-#define HAL_ADC_ERROR_INTERNAL            0x01U   /*!< ADC IP internal error: if problem of clocking, 
-                                                       enable/disable, erroneous state                       */
-#define HAL_ADC_ERROR_OVR                 0x02U   /*!< Overrun error                                         */
-#define HAL_ADC_ERROR_DMA                 0x04U   /*!< DMA transfer error                                    */
-
-/**
-  * @}
-  */
-
-
-/** @defgroup ADC_Data_align ADC data alignment
-  * @{
-  */
-#define ADC_DATAALIGN_RIGHT      0x00000000U
-#define ADC_DATAALIGN_LEFT       ((uint32_t)ADC_CR2_ALIGN)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Scan_mode ADC scan mode
-  * @{
-  */
-/* Note: Scan mode values are not among binary choices ENABLE/DISABLE for     */
-/*       compatibility with other STM32 devices having a sequencer with       */
-/*       additional options.                                                  */
-#define ADC_SCAN_DISABLE         0x00000000U
-#define ADC_SCAN_ENABLE          ((uint32_t)ADC_CR1_SCAN)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_External_trigger_edge_Regular ADC external trigger enable for regular group
-  * @{
-  */
-#define ADC_EXTERNALTRIGCONVEDGE_NONE           0x00000000U
-#define ADC_EXTERNALTRIGCONVEDGE_RISING         ((uint32_t)ADC_CR2_EXTTRIG)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_channels ADC channels
-  * @{
-  */
-/* Note: Depending on devices, some channels may not be available on package  */
-/*       pins. Refer to device datasheet for channels availability.           */
-#define ADC_CHANNEL_0                       0x00000000U
-#define ADC_CHANNEL_1           ((uint32_t)(                                                                    ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_2           ((uint32_t)(                                                   ADC_SQR3_SQ1_1                 ))
-#define ADC_CHANNEL_3           ((uint32_t)(                                                   ADC_SQR3_SQ1_1 | ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_4           ((uint32_t)(                                  ADC_SQR3_SQ1_2                                  ))
-#define ADC_CHANNEL_5           ((uint32_t)(                                  ADC_SQR3_SQ1_2                  | ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_6           ((uint32_t)(                                  ADC_SQR3_SQ1_2 | ADC_SQR3_SQ1_1                 ))
-#define ADC_CHANNEL_7           ((uint32_t)(                                  ADC_SQR3_SQ1_2 | ADC_SQR3_SQ1_1 | ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_8           ((uint32_t)(                 ADC_SQR3_SQ1_3                                                   ))
-#define ADC_CHANNEL_9           ((uint32_t)(                 ADC_SQR3_SQ1_3                                   | ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_10          ((uint32_t)(                 ADC_SQR3_SQ1_3                  | ADC_SQR3_SQ1_1                 ))
-#define ADC_CHANNEL_11          ((uint32_t)(                 ADC_SQR3_SQ1_3                  | ADC_SQR3_SQ1_1 | ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_12          ((uint32_t)(                 ADC_SQR3_SQ1_3 | ADC_SQR3_SQ1_2                                  ))
-#define ADC_CHANNEL_13          ((uint32_t)(                 ADC_SQR3_SQ1_3 | ADC_SQR3_SQ1_2                  | ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_14          ((uint32_t)(                 ADC_SQR3_SQ1_3 | ADC_SQR3_SQ1_2 | ADC_SQR3_SQ1_1                 ))
-#define ADC_CHANNEL_15          ((uint32_t)(                 ADC_SQR3_SQ1_3 | ADC_SQR3_SQ1_2 | ADC_SQR3_SQ1_1 | ADC_SQR3_SQ1_0))
-#define ADC_CHANNEL_16          ((uint32_t)(ADC_SQR3_SQ1_4                                                                    ))
-#define ADC_CHANNEL_17          ((uint32_t)(ADC_SQR3_SQ1_4                                                    | ADC_SQR3_SQ1_0))
-
-#define ADC_CHANNEL_TEMPSENSOR  ADC_CHANNEL_16  /* ADC internal channel (no connection on device pin) */
-#define ADC_CHANNEL_VREFINT     ADC_CHANNEL_17  /* ADC internal channel (no connection on device pin) */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_sampling_times ADC sampling times
-  * @{
-  */
-#define ADC_SAMPLETIME_1CYCLE_5                   0x00000000U                                              /*!< Sampling time 1.5 ADC clock cycle */
-#define ADC_SAMPLETIME_7CYCLES_5      ((uint32_t)(                                      ADC_SMPR2_SMP0_0)) /*!< Sampling time 7.5 ADC clock cycles */
-#define ADC_SAMPLETIME_13CYCLES_5     ((uint32_t)(                   ADC_SMPR2_SMP0_1                   )) /*!< Sampling time 13.5 ADC clock cycles */
-#define ADC_SAMPLETIME_28CYCLES_5     ((uint32_t)(                   ADC_SMPR2_SMP0_1 | ADC_SMPR2_SMP0_0)) /*!< Sampling time 28.5 ADC clock cycles */
-#define ADC_SAMPLETIME_41CYCLES_5     ((uint32_t)(ADC_SMPR2_SMP0_2                                      )) /*!< Sampling time 41.5 ADC clock cycles */
-#define ADC_SAMPLETIME_55CYCLES_5     ((uint32_t)(ADC_SMPR2_SMP0_2                    | ADC_SMPR2_SMP0_0)) /*!< Sampling time 55.5 ADC clock cycles */
-#define ADC_SAMPLETIME_71CYCLES_5     ((uint32_t)(ADC_SMPR2_SMP0_2 | ADC_SMPR2_SMP0_1                   )) /*!< Sampling time 71.5 ADC clock cycles */
-#define ADC_SAMPLETIME_239CYCLES_5    ((uint32_t)(ADC_SMPR2_SMP0_2 | ADC_SMPR2_SMP0_1 | ADC_SMPR2_SMP0_0)) /*!< Sampling time 239.5 ADC clock cycles */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_regular_rank ADC rank into regular group
-  * @{
-  */
-#define ADC_REGULAR_RANK_1                 0x00000001U
-#define ADC_REGULAR_RANK_2                 0x00000002U
-#define ADC_REGULAR_RANK_3                 0x00000003U
-#define ADC_REGULAR_RANK_4                 0x00000004U
-#define ADC_REGULAR_RANK_5                 0x00000005U
-#define ADC_REGULAR_RANK_6                 0x00000006U
-#define ADC_REGULAR_RANK_7                 0x00000007U
-#define ADC_REGULAR_RANK_8                 0x00000008U
-#define ADC_REGULAR_RANK_9                 0x00000009U
-#define ADC_REGULAR_RANK_10                0x0000000AU
-#define ADC_REGULAR_RANK_11                0x0000000BU
-#define ADC_REGULAR_RANK_12                0x0000000CU
-#define ADC_REGULAR_RANK_13                0x0000000DU
-#define ADC_REGULAR_RANK_14                0x0000000EU
-#define ADC_REGULAR_RANK_15                0x0000000FU
-#define ADC_REGULAR_RANK_16                0x00000010U
-/**
-  * @}
-  */
-
-/** @defgroup ADC_analog_watchdog_mode ADC analog watchdog mode
-  * @{
-  */
-#define ADC_ANALOGWATCHDOG_NONE                             0x00000000U
-#define ADC_ANALOGWATCHDOG_SINGLE_REG           ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN))
-#define ADC_ANALOGWATCHDOG_SINGLE_INJEC         ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN))
-#define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC      ((uint32_t)(ADC_CR1_AWDSGL | ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
-#define ADC_ANALOGWATCHDOG_ALL_REG              ((uint32_t)ADC_CR1_AWDEN)
-#define ADC_ANALOGWATCHDOG_ALL_INJEC            ((uint32_t)ADC_CR1_JAWDEN)
-#define ADC_ANALOGWATCHDOG_ALL_REGINJEC         ((uint32_t)(ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
-/**
-  * @}
-  */
-
-/** @defgroup ADC_conversion_group ADC conversion group
-  * @{
-  */
-#define ADC_REGULAR_GROUP             ((uint32_t)(ADC_FLAG_EOC))
-#define ADC_INJECTED_GROUP            ((uint32_t)(ADC_FLAG_JEOC))
-#define ADC_REGULAR_INJECTED_GROUP    ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_JEOC))
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Event_type ADC Event type
-  * @{
-  */
-#define ADC_AWD_EVENT               ((uint32_t)ADC_FLAG_AWD)   /*!< ADC Analog watchdog event */
-
-#define ADC_AWD1_EVENT              ADC_AWD_EVENT              /*!< ADC Analog watchdog 1 event: Alternate naming for compatibility with other STM32 devices having several analog watchdogs */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_interrupts_definition ADC interrupts definition
-  * @{
-  */
-#define ADC_IT_EOC           ADC_CR1_EOCIE        /*!< ADC End of Regular Conversion interrupt source */
-#define ADC_IT_JEOC          ADC_CR1_JEOCIE       /*!< ADC End of Injected Conversion interrupt source */
-#define ADC_IT_AWD           ADC_CR1_AWDIE        /*!< ADC Analog watchdog interrupt source */
-/**
-  * @}
-  */
-
-/** @defgroup ADC_flags_definition ADC flags definition
-  * @{
-  */
-#define ADC_FLAG_STRT          ADC_SR_STRT     /*!< ADC Regular group start flag */
-#define ADC_FLAG_JSTRT         ADC_SR_JSTRT    /*!< ADC Injected group start flag */
-#define ADC_FLAG_EOC           ADC_SR_EOC      /*!< ADC End of Regular conversion flag */
-#define ADC_FLAG_JEOC          ADC_SR_JEOC     /*!< ADC End of Injected conversion flag */
-#define ADC_FLAG_AWD           ADC_SR_AWD      /*!< ADC Analog watchdog flag */
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */ 
-
-/* Private constants ---------------------------------------------------------*/
-
-/** @addtogroup ADC_Private_Constants ADC Private Constants
-  * @{
-  */
-
-/** @defgroup ADC_conversion_cycles ADC conversion cycles
-  * @{
-  */
-/* ADC conversion cycles (unit: ADC clock cycles)                           */
-/* (selected sampling time + conversion time of 12.5 ADC clock cycles, with */
-/* resolution 12 bits)                                                      */
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_1CYCLE5                  14U
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_7CYCLES5                 20U
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_13CYCLES5                26U
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_28CYCLES5                41U
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_41CYCLES5                54U
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_55CYCLES5                68U
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_71CYCLES5                84U
-#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_239CYCLES5              252U
-/**
-  * @}
-  */
-
-/** @defgroup ADC_sampling_times_all_channels ADC sampling times all channels
-  * @{
-  */
-#define ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2                                          \
-     (ADC_SMPR2_SMP9_2 | ADC_SMPR2_SMP8_2 | ADC_SMPR2_SMP7_2 | ADC_SMPR2_SMP6_2 |     \
-      ADC_SMPR2_SMP5_2 | ADC_SMPR2_SMP4_2 | ADC_SMPR2_SMP3_2 | ADC_SMPR2_SMP2_2 |     \
-      ADC_SMPR2_SMP1_2 | ADC_SMPR2_SMP0_2)
-#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2                                          \
-     (ADC_SMPR1_SMP17_2 | ADC_SMPR1_SMP16_2 | ADC_SMPR1_SMP15_2 | ADC_SMPR1_SMP14_2 | \
-      ADC_SMPR1_SMP13_2 | ADC_SMPR1_SMP12_2 | ADC_SMPR1_SMP11_2 | ADC_SMPR1_SMP10_2 )
-
-#define ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1                                          \
-     (ADC_SMPR2_SMP9_1 | ADC_SMPR2_SMP8_1 | ADC_SMPR2_SMP7_1 | ADC_SMPR2_SMP6_1 |     \
-      ADC_SMPR2_SMP5_1 | ADC_SMPR2_SMP4_1 | ADC_SMPR2_SMP3_1 | ADC_SMPR2_SMP2_1 |     \
-      ADC_SMPR2_SMP1_1 | ADC_SMPR2_SMP0_1)
-#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1                                          \
-     (ADC_SMPR1_SMP17_1 | ADC_SMPR1_SMP16_1 | ADC_SMPR1_SMP15_1 | ADC_SMPR1_SMP14_1 | \
-      ADC_SMPR1_SMP13_1 | ADC_SMPR1_SMP12_1 | ADC_SMPR1_SMP11_1 | ADC_SMPR1_SMP10_1 )
-
-#define ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT0                                          \
-     (ADC_SMPR2_SMP9_0 | ADC_SMPR2_SMP8_0 | ADC_SMPR2_SMP7_0 | ADC_SMPR2_SMP6_0 |     \
-      ADC_SMPR2_SMP5_0 | ADC_SMPR2_SMP4_0 | ADC_SMPR2_SMP3_0 | ADC_SMPR2_SMP2_0 |     \
-      ADC_SMPR2_SMP1_0 | ADC_SMPR2_SMP0_0)
-#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0                                          \
-     (ADC_SMPR1_SMP17_0 | ADC_SMPR1_SMP16_0 | ADC_SMPR1_SMP15_0 | ADC_SMPR1_SMP14_0 | \
-      ADC_SMPR1_SMP13_0 | ADC_SMPR1_SMP12_0 | ADC_SMPR1_SMP11_0 | ADC_SMPR1_SMP10_0 )
-
-#define ADC_SAMPLETIME_1CYCLE5_SMPR2ALLCHANNELS    0x00000000U
-#define ADC_SAMPLETIME_7CYCLES5_SMPR2ALLCHANNELS   (ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT0)
-#define ADC_SAMPLETIME_13CYCLES5_SMPR2ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1)
-#define ADC_SAMPLETIME_28CYCLES5_SMPR2ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1 | ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT0)
-#define ADC_SAMPLETIME_41CYCLES5_SMPR2ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2)
-#define ADC_SAMPLETIME_55CYCLES5_SMPR2ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2 | ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT0)
-#define ADC_SAMPLETIME_71CYCLES5_SMPR2ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2 | ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1)
-#define ADC_SAMPLETIME_239CYCLES5_SMPR2ALLCHANNELS (ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2 | ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1 | ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT0)
-
-#define ADC_SAMPLETIME_1CYCLE5_SMPR1ALLCHANNELS    0x00000000U
-#define ADC_SAMPLETIME_7CYCLES5_SMPR1ALLCHANNELS   (ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0)
-#define ADC_SAMPLETIME_13CYCLES5_SMPR1ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1)
-#define ADC_SAMPLETIME_28CYCLES5_SMPR1ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1 | ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0)
-#define ADC_SAMPLETIME_41CYCLES5_SMPR1ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2)
-#define ADC_SAMPLETIME_55CYCLES5_SMPR1ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2 | ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0)
-#define ADC_SAMPLETIME_71CYCLES5_SMPR1ALLCHANNELS  (ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2 | ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1)
-#define ADC_SAMPLETIME_239CYCLES5_SMPR1ALLCHANNELS (ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2 | ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1 | ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0)
-/**
-  * @}
-  */
-
-/* Combination of all post-conversion flags bits: EOC/EOS, JEOC/JEOS, OVR, AWDx */
-#define ADC_FLAG_POSTCONV_ALL   (ADC_FLAG_EOC | ADC_FLAG_JEOC | ADC_FLAG_AWD )
-
-/**
-  * @}
-  */
-
-
-/* Exported macro ------------------------------------------------------------*/
-
-/** @defgroup ADC_Exported_Macros ADC Exported Macros
-  * @{
-  */
-/* Macro for internal HAL driver usage, and possibly can be used into code of */
-/* final user.                                                                */    
-
-/**
-  * @brief Enable the ADC peripheral
-  * @note ADC enable requires a delay for ADC stabilization time
-  *       (refer to device datasheet, parameter tSTAB)
-  * @note On STM32F1, if ADC is already enabled this macro trigs a conversion 
-  *       SW start on regular group.
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#define __HAL_ADC_ENABLE(__HANDLE__)                                           \
-  (SET_BIT((__HANDLE__)->Instance->CR2, (ADC_CR2_ADON)))
-    
-/**
-  * @brief Disable the ADC peripheral
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#define __HAL_ADC_DISABLE(__HANDLE__)                                          \
-  (CLEAR_BIT((__HANDLE__)->Instance->CR2, (ADC_CR2_ADON)))
-    
-/** @brief Enable the ADC end of conversion interrupt.
-  * @param __HANDLE__: ADC handle
-  * @param __INTERRUPT__: ADC Interrupt
-  *          This parameter can be any combination of the following values:
-  *            @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
-  *            @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source
-  *            @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
-  * @retval None
-  */
-#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__)                         \
-  (SET_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__)))
-    
-/** @brief Disable the ADC end of conversion interrupt.
-  * @param __HANDLE__: ADC handle
-  * @param __INTERRUPT__: ADC Interrupt
-  *          This parameter can be any combination of the following values:
-  *            @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
-  *            @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source
-  *            @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
-  * @retval None
-  */
-#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__)                        \
-  (CLEAR_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__)))
-
-/** @brief  Checks if the specified ADC interrupt source is enabled or disabled.
-  * @param __HANDLE__: ADC handle
-  * @param __INTERRUPT__: ADC interrupt source to check
-  *          This parameter can be any combination of the following values:
-  *            @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source
-  *            @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source
-  *            @arg ADC_IT_AWD: ADC Analog watchdog interrupt source
-  * @retval None
-  */
-#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)                     \
-  (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
-
-/** @brief Get the selected ADC's flag status.
-  * @param __HANDLE__: ADC handle
-  * @param __FLAG__: ADC flag
-  *          This parameter can be any combination of the following values:
-  *            @arg ADC_FLAG_STRT: ADC Regular group start flag
-  *            @arg ADC_FLAG_JSTRT: ADC Injected group start flag
-  *            @arg ADC_FLAG_EOC: ADC End of Regular conversion flag
-  *            @arg ADC_FLAG_JEOC: ADC End of Injected conversion flag
-  *            @arg ADC_FLAG_AWD: ADC Analog watchdog flag
-  * @retval None
-  */
-#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__)                               \
-  ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
-    
-/** @brief Clear the ADC's pending flags
-  * @param __HANDLE__: ADC handle
-  * @param __FLAG__: ADC flag
-  *          This parameter can be any combination of the following values:
-  *            @arg ADC_FLAG_STRT: ADC Regular group start flag
-  *            @arg ADC_FLAG_JSTRT: ADC Injected group start flag
-  *            @arg ADC_FLAG_EOC: ADC End of Regular conversion flag
-  *            @arg ADC_FLAG_JEOC: ADC End of Injected conversion flag
-  *            @arg ADC_FLAG_AWD: ADC Analog watchdog flag
-  * @retval None
-  */
-#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__)                             \
-  (WRITE_REG((__HANDLE__)->Instance->SR, ~(__FLAG__)))
-
-/** @brief  Reset ADC handle state
-  * @param  __HANDLE__: ADC handle
-  * @retval None
-  */
-#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__)                               \
-  ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
-
-/**
-  * @}
-  */
-
-/* Private macro ------------------------------------------------------------*/
-
-/** @defgroup ADC_Private_Macros ADC Private Macros
-  * @{
-  */
-/* Macro reserved for internal HAL driver usage, not intended to be used in   */
-/* code of final user.                                                        */
-
-/**
-  * @brief Verification of ADC state: enabled or disabled
-  * @param __HANDLE__: ADC handle
-  * @retval SET (ADC enabled) or RESET (ADC disabled)
-  */
-#define ADC_IS_ENABLE(__HANDLE__)                                              \
-  ((( ((__HANDLE__)->Instance->CR2 & ADC_CR2_ADON) == ADC_CR2_ADON )           \
-   ) ? SET : RESET)
-
-/**
-  * @brief Test if conversion trigger of regular group is software start
-  *        or external trigger.
-  * @param __HANDLE__: ADC handle
-  * @retval SET (software start) or RESET (external trigger)
-  */
-#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__)                              \
-  (READ_BIT((__HANDLE__)->Instance->CR2, ADC_CR2_EXTSEL) == ADC_SOFTWARE_START)
-
-/**
-  * @brief Test if conversion trigger of injected group is software start
-  *        or external trigger.
-  * @param __HANDLE__: ADC handle
-  * @retval SET (software start) or RESET (external trigger)
-  */
-#define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__)                             \
-  (READ_BIT((__HANDLE__)->Instance->CR2, ADC_CR2_JEXTSEL) == ADC_INJECTED_SOFTWARE_START)
-
-/**
-  * @brief Simultaneously clears and sets specific bits of the handle State
-  * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(),
-  *        the first parameter is the ADC handle State, the second parameter is the
-  *        bit field to clear, the third and last parameter is the bit field to set.
-  * @retval None
-  */
-#define ADC_STATE_CLR_SET MODIFY_REG
-
-/**
-  * @brief Clear ADC error code (set it to error code: "no error")
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#define ADC_CLEAR_ERRORCODE(__HANDLE__)                                        \
-  ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
-
-/**
-  * @brief Set ADC number of conversions into regular channel sequence length.
-  * @param _NbrOfConversion_: Regular channel sequence length 
-  * @retval None
-  */
-#define ADC_SQR1_L_SHIFT(_NbrOfConversion_)                                    \
-  (((_NbrOfConversion_) - (uint8_t)1) << ADC_SQR1_L_Pos)
-
-/**
-  * @brief Set the ADC's sample time for channel numbers between 10 and 18.
-  * @param _SAMPLETIME_: Sample time parameter.
-  * @param _CHANNELNB_: Channel number.  
-  * @retval None
-  */
-#define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_)                                   \
-  ((_SAMPLETIME_) << (ADC_SMPR1_SMP11_Pos * ((_CHANNELNB_) - 10)))
-
-/**
-  * @brief Set the ADC's sample time for channel numbers between 0 and 9.
-  * @param _SAMPLETIME_: Sample time parameter.
-  * @param _CHANNELNB_: Channel number.  
-  * @retval None
-  */
-#define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_)                                   \
-  ((_SAMPLETIME_) << (ADC_SMPR2_SMP1_Pos * (_CHANNELNB_)))
-
-/**
-  * @brief Set the selected regular channel rank for rank between 1 and 6.
-  * @param _CHANNELNB_: Channel number.
-  * @param _RANKNB_: Rank number.    
-  * @retval None
-  */
-#define ADC_SQR3_RK(_CHANNELNB_, _RANKNB_)                                     \
-  ((_CHANNELNB_) << (ADC_SQR3_SQ2_Pos * ((_RANKNB_) - 1)))
-
-/**
-  * @brief Set the selected regular channel rank for rank between 7 and 12.
-  * @param _CHANNELNB_: Channel number.
-  * @param _RANKNB_: Rank number.    
-  * @retval None
-  */
-#define ADC_SQR2_RK(_CHANNELNB_, _RANKNB_)                                     \
-  ((_CHANNELNB_) << (ADC_SQR2_SQ8_Pos * ((_RANKNB_) - 7)))
-
-/**
-  * @brief Set the selected regular channel rank for rank between 13 and 16.
-  * @param _CHANNELNB_: Channel number.
-  * @param _RANKNB_: Rank number.    
-  * @retval None
-  */
-#define ADC_SQR1_RK(_CHANNELNB_, _RANKNB_)                                     \
-  ((_CHANNELNB_) << (ADC_SQR1_SQ14_Pos * ((_RANKNB_) - 13)))
-
-/**
-  * @brief Set the injected sequence length.
-  * @param _JSQR_JL_: Sequence length.
-  * @retval None
-  */
-#define ADC_JSQR_JL_SHIFT(_JSQR_JL_)                                           \
-  (((_JSQR_JL_) -1) << ADC_JSQR_JL_Pos)
-
-/**
-  * @brief Set the selected injected channel rank
-  *        Note: on STM32F1 devices, channel rank position in JSQR register
-  *              is depending on total number of ranks selected into
-  *              injected sequencer (ranks sequence starting from 4-JL)
-  * @param _CHANNELNB_: Channel number.
-  * @param _RANKNB_: Rank number.
-  * @param _JSQR_JL_: Sequence length.
-  * @retval None
-  */
-#define ADC_JSQR_RK_JL(_CHANNELNB_, _RANKNB_, _JSQR_JL_)                       \
-  ((_CHANNELNB_) << (ADC_JSQR_JSQ2_Pos * ((4 - ((_JSQR_JL_) - (_RANKNB_))) - 1)))
-
-/**
-  * @brief Enable ADC continuous conversion mode.
-  * @param _CONTINUOUS_MODE_: Continuous mode.
-  * @retval None
-  */
-#define ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_)                                  \
-  ((_CONTINUOUS_MODE_) << ADC_CR2_CONT_Pos)
-
-/**
-  * @brief Configures the number of discontinuous conversions for the regular group channels.
-  * @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions.
-  * @retval None
-  */
-#define ADC_CR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_)                    \
-  (((_NBR_DISCONTINUOUS_CONV_) - 1) << ADC_CR1_DISCNUM_Pos)
-
-/**
-  * @brief Enable ADC scan mode to convert multiple ranks with sequencer.
-  * @param _SCAN_MODE_: Scan conversion mode.
-  * @retval None
-  */
-/* Note: Scan mode is compared to ENABLE for legacy purpose, this parameter   */
-/*       is equivalent to ADC_SCAN_ENABLE.                                    */
-#define ADC_CR1_SCAN_SET(_SCAN_MODE_)                                          \
-  (( ((_SCAN_MODE_) == ADC_SCAN_ENABLE) || ((_SCAN_MODE_) == ENABLE)           \
-   )? (ADC_SCAN_ENABLE) : (ADC_SCAN_DISABLE)                                   \
-  )
-
-/**
-  * @brief Get the maximum ADC conversion cycles on all channels.
-  * Returns the selected sampling time + conversion time (12.5 ADC clock cycles)
-  * Approximation of sampling time within 4 ranges, returns the highest value:
-  *   below 7.5 cycles {1.5 cycle; 7.5 cycles},
-  *   between 13.5 cycles and 28.5 cycles {13.5 cycles; 28.5 cycles}
-  *   between 41.5 cycles and 71.5 cycles {41.5 cycles; 55.5 cycles; 71.5cycles}
-  *   equal to 239.5 cycles
-  * Unit: ADC clock cycles
-  * @param __HANDLE__: ADC handle
-  * @retval ADC conversion cycles on all channels
-  */   
-#define ADC_CONVCYCLES_MAX_RANGE(__HANDLE__)                                                                     \
-    (( (((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2) == RESET)  &&                     \
-       (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2) == RESET) ) ?                     \
-                                                                                                                 \
-          (( (((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1) == RESET)  &&               \
-             (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1) == RESET) ) ?               \
-               ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_7CYCLES5 : ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_28CYCLES5)   \
-          :                                                                                                      \
-          ((((((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1) == RESET)  &&               \
-             (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1) == RESET)) ||               \
-            ((((__HANDLE__)->Instance->SMPR2 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0) == RESET)  &&               \
-             (((__HANDLE__)->Instance->SMPR1 & ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0) == RESET))) ?               \
-               ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_71CYCLES5 : ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_239CYCLES5) \
-     )
-
-#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
-                                  ((ALIGN) == ADC_DATAALIGN_LEFT)    )
-
-#define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DISABLE) || \
-                                     ((SCAN_MODE) == ADC_SCAN_ENABLE)    )
-
-#define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE)  || \
-                                   ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING)  )
-
-#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_1)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_2)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_3)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_4)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_5)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_6)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_7)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_8)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_9)           || \
-                                 ((CHANNEL) == ADC_CHANNEL_10)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_11)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_12)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_13)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_14)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_15)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_16)          || \
-                                 ((CHANNEL) == ADC_CHANNEL_17)            )
-
-#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5)    || \
-                                  ((TIME) == ADC_SAMPLETIME_7CYCLES_5)   || \
-                                  ((TIME) == ADC_SAMPLETIME_13CYCLES_5)  || \
-                                  ((TIME) == ADC_SAMPLETIME_28CYCLES_5)  || \
-                                  ((TIME) == ADC_SAMPLETIME_41CYCLES_5)  || \
-                                  ((TIME) == ADC_SAMPLETIME_55CYCLES_5)  || \
-                                  ((TIME) == ADC_SAMPLETIME_71CYCLES_5)  || \
-                                  ((TIME) == ADC_SAMPLETIME_239CYCLES_5)   )
-
-#define IS_ADC_REGULAR_RANK(CHANNEL) (((CHANNEL) == ADC_REGULAR_RANK_1 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_2 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_3 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_4 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_5 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_6 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_7 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_8 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_9 ) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_10) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_11) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_12) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_13) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_14) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_15) || \
-                                      ((CHANNEL) == ADC_REGULAR_RANK_16)   )
-
-#define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE)             || \
-                                               ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG)       || \
-                                               ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_INJEC)     || \
-                                               ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC)  || \
-                                               ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG)          || \
-                                               ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_INJEC)        || \
-                                               ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REGINJEC)       )
-
-#define IS_ADC_CONVERSION_GROUP(CONVERSION) (((CONVERSION) == ADC_REGULAR_GROUP)         || \
-                                             ((CONVERSION) == ADC_INJECTED_GROUP)        || \
-                                             ((CONVERSION) == ADC_REGULAR_INJECTED_GROUP)  )
-
-#define IS_ADC_EVENT_TYPE(EVENT) ((EVENT) == ADC_AWD_EVENT)
-
-
-/** @defgroup ADC_range_verification ADC range verification
-  * For a unique ADC resolution: 12 bits
-  * @{
-  */
-#define IS_ADC_RANGE(ADC_VALUE) ((ADC_VALUE) <= 0x0FFFU)
-/**
-  * @}
-  */
-
-/** @defgroup ADC_regular_nb_conv_verification ADC regular nb conv verification
-  * @{
-  */
-#define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 16U))
-/**
-  * @}
-  */
-
-/** @defgroup ADC_regular_discontinuous_mode_number_verification ADC regular discontinuous mode number verification
-  * @{
-  */
-#define IS_ADC_REGULAR_DISCONT_NUMBER(NUMBER) (((NUMBER) >= 1U) && ((NUMBER) <= 8U))
-/**
-  * @}
-  */
-      
-/**
-  * @}
-  */
-    
-/* Include ADC HAL Extension module */
-#include "stm32f1xx_hal_adc_ex.h"
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup ADC_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup ADC_Exported_Functions_Group1
-  * @{
-  */
-
-
-/* Initialization and de-initialization functions  **********************************/
-HAL_StatusTypeDef       HAL_ADC_Init(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef       HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
-void                    HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
-void                    HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
-/**
-  * @}
-  */
-
-/* IO operation functions  *****************************************************/
-
-/** @addtogroup ADC_Exported_Functions_Group2
-  * @{
-  */
-
-
-/* Blocking mode: Polling */
-HAL_StatusTypeDef       HAL_ADC_Start(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef       HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef       HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
-HAL_StatusTypeDef       HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
-
-/* Non-blocking mode: Interruption */
-HAL_StatusTypeDef       HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef       HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
-
-/* Non-blocking mode: DMA */
-HAL_StatusTypeDef       HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
-HAL_StatusTypeDef       HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
-
-/* ADC retrieve conversion value intended to be used with polling or interruption */
-uint32_t                HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
-
-/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
-void                    HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
-void                    HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
-void                    HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
-void                    HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
-void                    HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
-/**
-  * @}
-  */
-
-
-/* Peripheral Control functions ***********************************************/
-/** @addtogroup ADC_Exported_Functions_Group3
-  * @{
-  */
-HAL_StatusTypeDef       HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
-HAL_StatusTypeDef       HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
-/**
-  * @}
-  */
-
-
-/* Peripheral State functions *************************************************/
-/** @addtogroup ADC_Exported_Functions_Group4
-  * @{
-  */
-uint32_t                HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
-uint32_t                HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-
-/* Internal HAL driver functions **********************************************/
-/** @addtogroup ADC_Private_Functions
-  * @{
-  */
-HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc);
-void              ADC_StabilizationTime(uint32_t DelayUs);
-void              ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
-void              ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
-void              ADC_DMAError(DMA_HandleTypeDef *hdma);
-/**
-  * @}
-  */ 
-
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* __STM32F1xx_HAL_ADC_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h

@@ -1,726 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f1xx_hal_adc_ex.h
-  * @author  MCD Application Team
-  * @brief   Header file of ADC HAL extension module.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F1xx_HAL_ADC_EX_H
-#define __STM32F1xx_HAL_ADC_EX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f1xx_hal_def.h"  
-
-/** @addtogroup STM32F1xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup ADCEx
-  * @{
-  */ 
-
-/* Exported types ------------------------------------------------------------*/ 
-/** @defgroup ADCEx_Exported_Types ADCEx Exported Types
-  * @{
-  */
-
-/** 
-  * @brief  ADC Configuration injected Channel structure definition
-  * @note   Parameters of this structure are shared within 2 scopes:
-  *          - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
-  *          - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
-  *            AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
-  * @note   The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
-  *         ADC state can be either:
-  *          - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
-  *          - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
-  */
-typedef struct 
-{
-  uint32_t InjectedChannel;               /*!< Selection of ADC channel to configure
-                                               This parameter can be a value of @ref ADC_channels
-                                               Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
-                                               Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor) 
-                                               Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
-                                                     It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
-                                                     Refer to errata sheet of these devices for more details. */
-  uint32_t InjectedRank;                  /*!< Rank in the injected group sequencer
-                                               This parameter must be a value of @ref ADCEx_injected_rank
-                                               Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
-  uint32_t InjectedSamplingTime;          /*!< Sampling time value to be set for the selected channel.
-                                               Unit: ADC clock cycles
-                                               Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
-                                               This parameter can be a value of @ref ADC_sampling_times
-                                               Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
-                                                        If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
-                                               Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
-                                                     sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
-                                                     Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
-  uint32_t InjectedOffset;                /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
-                                               Offset value must be a positive number.
-                                               Depending of ADC resolution selected (12, 10, 8 or 6 bits),
-                                               this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
-  uint32_t InjectedNbrOfConversion;       /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
-                                               To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
-                                               This parameter must be a number between Min_Data = 1 and Max_Data = 4.
-                                               Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 
-                                                        configure a channel on injected group can impact the configuration of other channels previously set. */
-  uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
-                                               Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
-                                               Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
-                                               This parameter can be set to ENABLE or DISABLE.
-                                               Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
-                                               Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 
-                                                        configure a channel on injected group can impact the configuration of other channels previously set. */
-  uint32_t AutoInjectedConv;              /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
-                                               This parameter can be set to ENABLE or DISABLE.      
-                                               Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
-                                               Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
-                                               Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
-                                                     To maintain JAUTO always enabled, DMA must be configured in circular mode.
-                                               Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
-                                                        configure a channel on injected group can impact the configuration of other channels previously set. */
-  uint32_t ExternalTrigInjecConv;         /*!< Selects the external event used to trigger the conversion start of injected group.
-                                               If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
-                                               If set to external trigger source, triggering is on event rising edge.
-                                               This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
-                                               Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
-                                                     If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
-                                               Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
-                                                        configure a channel on injected group can impact the configuration of other channels previously set. */
-}ADC_InjectionConfTypeDef;
-
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-/** 
-  * @brief  Structure definition of ADC multimode
-  * @note   The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
-  *         State of ADCs of the common group must be: disabled.
-  */
-typedef struct
-{
-  uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode. 
-                                   This parameter can be a value of @ref ADCEx_Common_mode
-                                   Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
-                                   Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
-                                   Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
-                                   Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
-                                         The equivalences are:
-                                           - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
-                                           - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
-
-  
-}ADC_MultiModeTypeDef;                                                          
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-/**
-  * @}
-  */
-
-
-/* Exported constants --------------------------------------------------------*/
-   
-/** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
-  * @{
-  */
-
-/** @defgroup ADCEx_injected_rank ADCEx rank into injected group
-  * @{
-  */
-#define ADC_INJECTED_RANK_1                           0x00000001U
-#define ADC_INJECTED_RANK_2                           0x00000002U
-#define ADC_INJECTED_RANK_3                           0x00000003U
-#define ADC_INJECTED_RANK_4                           0x00000004U
-/**
-  * @}
-  */
-
-/** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
-  * @{
-  */
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE           0x00000000U
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING         ((uint32_t)ADC_CR2_JEXTTRIG)
-/**
-  * @}
-  */
-    
-/** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
-  * @{
-  */
-/*!< List of external triggers with generic trigger name, independently of    */
-/* ADC target, sorted by trigger name:                                        */
-
-/*!< External triggers of regular group for ADC1&ADC2 only */
-#define ADC_EXTERNALTRIGCONV_T1_CC1         ADC1_2_EXTERNALTRIG_T1_CC1
-#define ADC_EXTERNALTRIGCONV_T1_CC2         ADC1_2_EXTERNALTRIG_T1_CC2
-#define ADC_EXTERNALTRIGCONV_T2_CC2         ADC1_2_EXTERNALTRIG_T2_CC2
-#define ADC_EXTERNALTRIGCONV_T3_TRGO        ADC1_2_EXTERNALTRIG_T3_TRGO
-#define ADC_EXTERNALTRIGCONV_T4_CC4         ADC1_2_EXTERNALTRIG_T4_CC4
-#define ADC_EXTERNALTRIGCONV_EXT_IT11       ADC1_2_EXTERNALTRIG_EXT_IT11
-
-#if defined (STM32F103xE) || defined (STM32F103xG)
-/*!< External triggers of regular group for ADC3 only */
-#define ADC_EXTERNALTRIGCONV_T2_CC3         ADC3_EXTERNALTRIG_T2_CC3
-#define ADC_EXTERNALTRIGCONV_T3_CC1         ADC3_EXTERNALTRIG_T3_CC1
-#define ADC_EXTERNALTRIGCONV_T5_CC1         ADC3_EXTERNALTRIG_T5_CC1
-#define ADC_EXTERNALTRIGCONV_T5_CC3         ADC3_EXTERNALTRIG_T5_CC3
-#define ADC_EXTERNALTRIGCONV_T8_CC1         ADC3_EXTERNALTRIG_T8_CC1
-#endif /* STM32F103xE || defined STM32F103xG */
-
-/*!< External triggers of regular group for all ADC instances */
-#define ADC_EXTERNALTRIGCONV_T1_CC3         ADC1_2_3_EXTERNALTRIG_T1_CC3
-
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
-/*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and   */
-/*         XL-density devices.                                                */
-/*         To use it on ADC or ADC2, a remap of trigger must be done from     */
-/*         EXTI line 11 to TIM8_TRGO with macro:                              */
-/*           __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE()                           */
-/*           __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE()                           */
-
-/* Note for internal constant value management: If TIM8_TRGO is available,    */
-/* its definition is set to value for ADC1&ADC2 by default and changed to     */
-/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
-#define ADC_EXTERNALTRIGCONV_T8_TRGO        ADC1_2_EXTERNALTRIG_T8_TRGO
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
-
-#define ADC_SOFTWARE_START                  ADC1_2_3_SWSTART
-/**
-  * @}
-  */
-
-/** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
-  * @{
-  */
-/*!< List of external triggers with generic trigger name, independently of    */
-/* ADC target, sorted by trigger name:                                        */
-
-/*!< External triggers of injected group for ADC1&ADC2 only */
-#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO        ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
-#define ADC_EXTERNALTRIGINJECCONV_T2_CC1         ADC1_2_EXTERNALTRIGINJEC_T2_CC1
-#define ADC_EXTERNALTRIGINJECCONV_T3_CC4         ADC1_2_EXTERNALTRIGINJEC_T3_CC4
-#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO        ADC1_2_EXTERNALTRIGINJEC_T4_TRGO 
-#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15       ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
-
-#if defined (STM32F103xE) || defined (STM32F103xG)
-/*!< External triggers of injected group for ADC3 only */
-#define ADC_EXTERNALTRIGINJECCONV_T4_CC3         ADC3_EXTERNALTRIGINJEC_T4_CC3
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC2         ADC3_EXTERNALTRIGINJEC_T8_CC2
-#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO        ADC3_EXTERNALTRIGINJEC_T5_TRGO
-#define ADC_EXTERNALTRIGINJECCONV_T5_CC4         ADC3_EXTERNALTRIGINJEC_T5_CC4
-#endif /* STM32F103xE || defined STM32F103xG */
-
-/*!< External triggers of injected group for all ADC instances */
-#define ADC_EXTERNALTRIGINJECCONV_T1_CC4         ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
-#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO        ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
-
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
-/*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and    */
-/*         XL-density devices.                                                */
-/*         To use it on ADC1 or ADC2, a remap of trigger must be done from    */
-/*         EXTI line 11 to TIM8_CC4 with macro:                               */
-/*           __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE()                           */
-/*           __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE()                           */
-
-/* Note for internal constant value management: If TIM8_CC4 is available,     */
-/* its definition is set to value for ADC1&ADC2 by default and changed to     */
-/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC4         ADC1_2_EXTERNALTRIGINJEC_T8_CC4
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
-
-#define ADC_INJECTED_SOFTWARE_START              ADC1_2_3_JSWSTART
-/**
-  * @}
-  */
-
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
-  * @{
-  */
-#define ADC_MODE_INDEPENDENT                              0x00000000U                                                                     /*!< ADC dual mode disabled (ADC independent mode) */
-#define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)(                                                            ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
-#define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)(                                        ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
-#define ADC_DUALMODE_INJECSIMULT_INTERLFAST   ((uint32_t)(                                        ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
-#define ADC_DUALMODE_INJECSIMULT_INTERLSLOW   ((uint32_t)(                    ADC_CR1_DUALMOD_2                                        )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
-#define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(                    ADC_CR1_DUALMOD_2 |                     ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
-#define ADC_DUALMODE_REGSIMULT                ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
-#define ADC_DUALMODE_INTERLFAST               ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
-#define ADC_DUALMODE_INTERLSLOW               ((uint32_t)(ADC_CR1_DUALMOD_3                                                            )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
-#define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CR1_DUALMOD_3 |                                         ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
-/**
-  * @}
-  */
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-/**
-  * @}
-  */
-
-
-/* Private constants ---------------------------------------------------------*/
-
-/** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
-  * @{
-  */
-
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
-  * @{
-  */
-/* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC    */
-/* instance is available on the selected device).                             */
-/* (used internally by HAL driver. To not use into HAL structure parameters)  */
-
-/* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
-#define ADC1_2_EXTERNALTRIG_T1_CC1                       0x00000000U
-#define ADC1_2_EXTERNALTRIG_T1_CC2           ((uint32_t)(                                      ADC_CR2_EXTSEL_0))
-#define ADC1_2_EXTERNALTRIG_T2_CC2           ((uint32_t)(                   ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
-#define ADC1_2_EXTERNALTRIG_T3_TRGO          ((uint32_t)(ADC_CR2_EXTSEL_2                                      ))
-#define ADC1_2_EXTERNALTRIG_T4_CC4           ((uint32_t)(ADC_CR2_EXTSEL_2 |                    ADC_CR2_EXTSEL_0))
-#define ADC1_2_EXTERNALTRIG_EXT_IT11         ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1                   ))
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
-/* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and     */
-/* XL-density devices.                                                        */
-#define ADC1_2_EXTERNALTRIG_T8_TRGO          ADC1_2_EXTERNALTRIG_EXT_IT11
-#endif
-
-#if defined (STM32F103xE) || defined (STM32F103xG)
-/* External triggers of regular group for ADC3 */
-#define ADC3_EXTERNALTRIG_T3_CC1             ADC1_2_EXTERNALTRIG_T1_CC1
-#define ADC3_EXTERNALTRIG_T2_CC3             ADC1_2_EXTERNALTRIG_T1_CC2
-#define ADC3_EXTERNALTRIG_T8_CC1             ADC1_2_EXTERNALTRIG_T2_CC2
-#define ADC3_EXTERNALTRIG_T8_TRGO            ADC1_2_EXTERNALTRIG_T3_TRGO
-#define ADC3_EXTERNALTRIG_T5_CC1             ADC1_2_EXTERNALTRIG_T4_CC4
-#define ADC3_EXTERNALTRIG_T5_CC3             ADC1_2_EXTERNALTRIG_EXT_IT11
-#endif
-
-/* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
-#define ADC1_2_3_EXTERNALTRIG_T1_CC3         ((uint32_t)(                   ADC_CR2_EXTSEL_1                   ))
-#define ADC1_2_3_SWSTART                     ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
-/**
-  * @}
-  */
-
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
-  * @{
-  */
-/* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC    */
-/* instance is available on the selected device).                             */
-/* (used internally by HAL driver. To not use into HAL structure parameters)  */
-
-/* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
-#define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO          ((uint32_t)(                    ADC_CR2_JEXTSEL_1                    ))
-#define ADC1_2_EXTERNALTRIGINJEC_T2_CC1           ((uint32_t)(                    ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
-#define ADC1_2_EXTERNALTRIGINJEC_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2                                        ))
-#define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_2 |                     ADC_CR2_JEXTSEL_0))
-#define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1                    ))
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
-/* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and      */
-/* XL-density devices.                                                        */
-#define ADC1_2_EXTERNALTRIGINJEC_T8_CC4           ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
-#endif
-
-#if defined (STM32F103xE) || defined (STM32F103xG)
-/* External triggers of injected group for ADC3 */
-#define ADC3_EXTERNALTRIGINJEC_T4_CC3             ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
-#define ADC3_EXTERNALTRIGINJEC_T8_CC2             ADC1_2_EXTERNALTRIGINJEC_T2_CC1
-#define ADC3_EXTERNALTRIGINJEC_T8_CC4             ADC1_2_EXTERNALTRIGINJEC_T3_CC4
-#define ADC3_EXTERNALTRIGINJEC_T5_TRGO            ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
-#define ADC3_EXTERNALTRIGINJEC_T5_CC4             ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
-#endif /* STM32F103xE || defined STM32F103xG */
-
-/* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO                    0x00000000U
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4         ((uint32_t)(                                        ADC_CR2_JEXTSEL_0))
-#define ADC1_2_3_JSWSTART                         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-
-/* Exported macro ------------------------------------------------------------*/
-
-/* Private macro -------------------------------------------------------------*/
-
-/** @defgroup ADCEx_Private_Macro ADCEx Private Macro
-  * @{
-  */
-/* Macro reserved for internal HAL driver usage, not intended to be used in   */
-/* code of final user.                                                        */
-
-    
-/**
-  * @brief For devices with 3 ADCs: Defines the external trigger source 
-  *        for regular group according to ADC into common group ADC1&ADC2 or 
-  *        ADC3 (some triggers with same source have different value to
-  *        be programmed into ADC EXTSEL bits of CR2 register).
-  *        For devices with 2 ADCs or less: this macro makes no change.
-  * @param __HANDLE__: ADC handle
-  * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
-  * @retval External trigger to be programmed into EXTSEL bits of CR2 register
-  */
-#if defined (STM32F103xE) || defined (STM32F103xG)
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
- (( (((__HANDLE__)->Instance) == ADC3)                                         \
-  )?                                                                           \
-   ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO                     \
-     )?                                                                        \
-      (ADC3_EXTERNALTRIG_T8_TRGO)                                              \
-      :                                                                        \
-      (__EXT_TRIG_CONV__)                                                      \
-   )                                                                           \
-   :                                                                           \
-   (__EXT_TRIG_CONV__)                                                         \
- )
-#else
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
-  (__EXT_TRIG_CONV__)
-#endif /* STM32F103xE || STM32F103xG */
-
-/**
-  * @brief For devices with 3 ADCs: Defines the external trigger source 
-  *        for injected group according to ADC into common group ADC1&ADC2 or 
-  *        ADC3 (some triggers with same source have different value to
-  *        be programmed into ADC JEXTSEL bits of CR2 register).
-  *        For devices with 2 ADCs or less: this macro makes no change.
-  * @param __HANDLE__: ADC handle
-  * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
-  * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
-  */
-#if defined (STM32F103xE) || defined (STM32F103xG)
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
- (( (((__HANDLE__)->Instance) == ADC3)                                         \
-  )?                                                                           \
-   ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4           \
-     )?                                                                        \
-      (ADC3_EXTERNALTRIGINJEC_T8_CC4)                                          \
-      :                                                                        \
-      (__EXT_TRIG_INJECTCONV__)                                                \
-   )                                                                           \
-   :                                                                           \
-   (__EXT_TRIG_INJECTCONV__)                                                   \
- )
-#else
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
-   (__EXT_TRIG_INJECTCONV__)
-#endif /* STM32F103xE || STM32F103xG */
-
-
-/**
-  * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
-  * @param __HANDLE__: ADC handle
-  * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
-  */
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
- (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)   \
-  )?                                                                           \
-   (ADC1->CR1 & ADC_CR1_DUALMOD)                                               \
-   :                                                                           \
-   (RESET)                                                                     \
- )
-#else
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
-  (RESET)
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-/**
-  * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
-  (( (((__HANDLE__)->Instance) == ADC2)                                        \
-   )?                                                                          \
-    ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET)                                   \
-    :                                                                          \
-    (!RESET)                                                                   \
-  )
-#else
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
-  (!RESET)
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-/**
-  * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
-  * @param __HANDLE__: ADC handle
-  * @retval None
-  */
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
-  (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)  \
-   )?                                                                          \
-    (ADC1->CR1 & ADC_CR1_JAUTO)                                                \
-    :                                                                          \
-    (RESET)                                                                    \
-  )
-#else
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
-  (RESET)
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-/**
-  * @brief Set handle of the other ADC sharing the common multimode settings
-  * @param __HANDLE__: ADC handle
-  * @param __HANDLE_OTHER_ADC__: other ADC handle
-  * @retval None
-  */
-#define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__)                 \
-  ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
-
-/**
-  * @brief Set handle of the ADC slave associated to the ADC master
-  * On STM32F1 devices, ADC slave is always ADC2 (this can be different
-  * on other STM32 devices)
-  * @param __HANDLE_MASTER__: ADC master handle
-  * @param __HANDLE_SLAVE__: ADC slave handle
-  * @retval None
-  */
-#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)                   \
-  ((__HANDLE_SLAVE__)->Instance = ADC2)
-       
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-#define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
-                                       ((CHANNEL) == ADC_INJECTED_RANK_2) || \
-                                       ((CHANNEL) == ADC_INJECTED_RANK_3) || \
-                                       ((CHANNEL) == ADC_INJECTED_RANK_4))
-
-#define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)  || \
-                                        ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
-
-/** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
-  * @{
-  */
-#define IS_ADC_INJECTED_NB_CONV(LENGTH)  (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
-/**
-  * @}
-  */
-
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
-#endif
-#if defined (STM32F101xE)
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
-#endif
-#if defined (STM32F101xG)
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
-#endif
-#if defined (STM32F103xE) || defined (STM32F103xG)
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)    || \
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
-#endif
-
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
-#endif
-#if defined (STM32F101xE)
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
-#endif
-#if defined (STM32F101xG)
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
-#endif
-#if defined (STM32F103xE) || defined (STM32F103xG)
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
-#endif
-
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                || \
-                           ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)  || \
-                           ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)    || \
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT)            || \
-                           ((MODE) == ADC_DUALMODE_REGSIMULT)              || \
-                           ((MODE) == ADC_DUALMODE_INTERLFAST)             || \
-                           ((MODE) == ADC_DUALMODE_INTERLSLOW)             || \
-                           ((MODE) == ADC_DUALMODE_ALTERTRIG) )
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-/**
-  * @}
-  */      
-   
-    
-
-    
-    
-   
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup ADCEx_Exported_Functions
-  * @{
-  */
-
-/* IO operation functions  *****************************************************/
-/** @addtogroup ADCEx_Exported_Functions_Group1
-  * @{
-  */
-
-/* ADC calibration */
-HAL_StatusTypeDef       HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
-
-/* Blocking mode: Polling */
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef       HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
-
-/* Non-blocking mode: Interruption */
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
-
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-/* ADC multimode */
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); 
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-/* ADC retrieve conversion value intended to be used with polling or interruption */
-uint32_t                HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-uint32_t                HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-
-/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
-void                    HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
-/**
-  * @}
-  */
-
-
-/* Peripheral Control functions ***********************************************/
-/** @addtogroup ADCEx_Exported_Functions_Group2
-  * @{
-  */
-HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */
-  
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F1xx_HAL_ADC_EX_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Inc/BDA4601.h

@@ -1,13 +0,0 @@
-/*
- * BDA4601.h
- *
- *  Created on: 2019. 6. 28.
- *      Author: parkyj
- */
-
-#ifndef BDA4601_H_
-#define BDA4601_H_
-
-
-
-#endif /* BDA4601_H_ */

Inc/CRC16.h

@@ -0,0 +1,13 @@
+/*
+ * CRC16.h
+ *
+ *  Created on: 2019. 7. 3.
+ *      Author: parkyj
+ */
+
+#ifndef CRC16_H_
+#define CRC16_H_
+
+unsigned short genCRC16(char *buf_ptr, int len);
+
+#endif /* CRC16_H_ */

Inc/PE43711.h

@@ -1,13 +0,0 @@
-/*
- * PE43711.h
- *
- *  Created on: 2019. 6. 28.
- *      Author: parkyj
- */
-
-#ifndef PE43711_H_
-#define PE43711_H_
-#include "main.h"
-
-
-#endif /* PE43711_H_ */

Inc/main.h

@@ -58,144 +58,6 @@ void Error_Handler(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
-#define ATT_EN_1_8G_DL1_Pin GPIO_PIN_2
-#define ATT_EN_1_8G_DL1_GPIO_Port GPIOE
-#define ATT_EN_1_8G_DL2_Pin GPIO_PIN_3
-#define ATT_EN_1_8G_DL2_GPIO_Port GPIOE
-#define ATT_EN_1_8G_UL1_Pin GPIO_PIN_4
-#define ATT_EN_1_8G_UL1_GPIO_Port GPIOE
-#define ATT_EN_1_8G_UL2_Pin GPIO_PIN_5
-#define ATT_EN_1_8G_UL2_GPIO_Port GPIOE
-#define ATT_EN_1_8G_UL3_Pin GPIO_PIN_6
-#define ATT_EN_1_8G_UL3_GPIO_Port GPIOE
-#define ATT_EN_1_8G_UL4_Pin GPIO_PIN_13
-#define ATT_EN_1_8G_UL4_GPIO_Port GPIOC
-#define PATH_EN_1_8G_DL_Pin GPIO_PIN_14
-#define PATH_EN_1_8G_DL_GPIO_Port GPIOC
-#define PATH_EN_1_8G_UL_Pin GPIO_PIN_15
-#define PATH_EN_1_8G_UL_GPIO_Port GPIOC
-#define PLL_EN_1_8G_DL_Pin GPIO_PIN_0
-#define PLL_EN_1_8G_DL_GPIO_Port GPIOF
-#define PLL_EN_1_8G_UL_Pin GPIO_PIN_1
-#define PLL_EN_1_8G_UL_GPIO_Port GPIOF
-#define PLL_LD_1_8G_DL_Pin GPIO_PIN_2
-#define PLL_LD_1_8G_DL_GPIO_Port GPIOF
-#define PLL_LD_1_8G_UL_Pin GPIO_PIN_3
-#define PLL_LD_1_8G_UL_GPIO_Port GPIOF
-#define ATT_EN_2_1G_DL1_Pin GPIO_PIN_4
-#define ATT_EN_2_1G_DL1_GPIO_Port GPIOF
-#define ATT_EN_2_1G_DL2_Pin GPIO_PIN_5
-#define ATT_EN_2_1G_DL2_GPIO_Port GPIOF
-#define ATT_EN_2_1G_UL1_Pin GPIO_PIN_6
-#define ATT_EN_2_1G_UL1_GPIO_Port GPIOF
-#define ATT_EN_2_1G_UL2_Pin GPIO_PIN_7
-#define ATT_EN_2_1G_UL2_GPIO_Port GPIOF
-#define ATT_EN_2_1G_UL3_Pin GPIO_PIN_8
-#define ATT_EN_2_1G_UL3_GPIO_Port GPIOF
-#define ATT_EN_2_1G_UL4_Pin GPIO_PIN_9
-#define ATT_EN_2_1G_UL4_GPIO_Port GPIOF
-#define DET_3_5G_UL_IN_Pin GPIO_PIN_0
-#define DET_3_5G_UL_IN_GPIO_Port GPIOC
-#define DET_3_5G_UL_OUT_Pin GPIO_PIN_1
-#define DET_3_5G_UL_OUT_GPIO_Port GPIOC
-#define RFU_TEMP_Pin GPIO_PIN_2
-#define RFU_TEMP_GPIO_Port GPIOC
-#define _28V_DET_Pin GPIO_PIN_3
-#define _28V_DET_GPIO_Port GPIOC
-#define DET_1_8G_DL_IN_Pin GPIO_PIN_0
-#define DET_1_8G_DL_IN_GPIO_Port GPIOA
-#define DET_1_8G_DL_OUT_Pin GPIO_PIN_1
-#define DET_1_8G_DL_OUT_GPIO_Port GPIOA
-#define DET_1_8G_UL_IN_Pin GPIO_PIN_2
-#define DET_1_8G_UL_IN_GPIO_Port GPIOA
-#define DET_1_8G_UL_OUT_Pin GPIO_PIN_3
-#define DET_1_8G_UL_OUT_GPIO_Port GPIOA
-#define DET_2_1G_DL_IN_Pin GPIO_PIN_4
-#define DET_2_1G_DL_IN_GPIO_Port GPIOA
-#define DET_2_1G_DL_OUT_Pin GPIO_PIN_5
-#define DET_2_1G_DL_OUT_GPIO_Port GPIOA
-#define DET_2_1G_UL_IN_Pin GPIO_PIN_6
-#define DET_2_1G_UL_IN_GPIO_Port GPIOA
-#define DET_2_1G_UL_OUT_Pin GPIO_PIN_7
-#define DET_2_1G_UL_OUT_GPIO_Port GPIOA
-#define DET_3_5G_DL_IN_Pin GPIO_PIN_0
-#define DET_3_5G_DL_IN_GPIO_Port GPIOB
-#define DET_3_5G_DL_OUT_Pin GPIO_PIN_1
-#define DET_3_5G_DL_OUT_GPIO_Port GPIOB
-#define PLL_DATA_Pin GPIO_PIN_8
-#define PLL_DATA_GPIO_Port GPIOD
-#define PLL_CLK_Pin GPIO_PIN_9
-#define PLL_CLK_GPIO_Port GPIOD
-#define ATT_DATA_Pin GPIO_PIN_10
-#define ATT_DATA_GPIO_Port GPIOD
-#define ATT_CLK_Pin GPIO_PIN_11
-#define ATT_CLK_GPIO_Port GPIOD
-#define ALARM_DC_Pin GPIO_PIN_12
-#define ALARM_DC_GPIO_Port GPIOD
-#define ALARM_AC_Pin GPIO_PIN_13
-#define ALARM_AC_GPIO_Port GPIOD
-#define DA_LDAC_Pin GPIO_PIN_15
-#define DA_LDAC_GPIO_Port GPIOD
-#define DA_SYNC_Pin GPIO_PIN_2
-#define DA_SYNC_GPIO_Port GPIOG
-#define DA_SCLK_Pin GPIO_PIN_3
-#define DA_SCLK_GPIO_Port GPIOG
-#define DA_DIN_Pin GPIO_PIN_4
-#define DA_DIN_GPIO_Port GPIOG
-#define _T_SYNC_UL_Pin GPIO_PIN_5
-#define _T_SYNC_UL_GPIO_Port GPIOG
-#define T_SYNC_UL_Pin GPIO_PIN_6
-#define T_SYNC_UL_GPIO_Port GPIOG
-#define _T_SYNC_DL_Pin GPIO_PIN_7
-#define _T_SYNC_DL_GPIO_Port GPIOG
-#define T_SYNC_DL_Pin GPIO_PIN_8
-#define T_SYNC_DL_GPIO_Port GPIOG
-#define PLL_EN_3_5G_L_Pin GPIO_PIN_6
-#define PLL_EN_3_5G_L_GPIO_Port GPIOC
-#define PLL_EN_3_5G_H_Pin GPIO_PIN_7
-#define PLL_EN_3_5G_H_GPIO_Port GPIOC
-#define PLL_LD_3_5G_L_Pin GPIO_PIN_8
-#define PLL_LD_3_5G_L_GPIO_Port GPIOC
-#define PLL_LD_3_5G_H_Pin GPIO_PIN_9
-#define PLL_LD_3_5G_H_GPIO_Port GPIOC
-#define ATT_CLK_3_5G_Pin GPIO_PIN_0
-#define ATT_CLK_3_5G_GPIO_Port GPIOD
-#define ATT_EN_3_5G_Pin GPIO_PIN_1
-#define ATT_EN_3_5G_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_DL_Pin GPIO_PIN_2
-#define ATT_DATA_3_5G_DL_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_UL_Pin GPIO_PIN_3
-#define ATT_DATA_3_5G_UL_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_COM1_Pin GPIO_PIN_4
-#define ATT_DATA_3_5G_COM1_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_COM2_Pin GPIO_PIN_5
-#define ATT_DATA_3_5G_COM2_GPIO_Port GPIOD
-#define ATT_DATA_3_5G_COM3_Pin GPIO_PIN_6
-#define ATT_DATA_3_5G_COM3_GPIO_Port GPIOD
-#define PATH_EN_3_5G_L_Pin GPIO_PIN_7
-#define PATH_EN_3_5G_L_GPIO_Port GPIOD
-#define PATH_EN_3_5G_H_Pin GPIO_PIN_9
-#define PATH_EN_3_5G_H_GPIO_Port GPIOG
-#define PATH_EN_3_5G_DL_Pin GPIO_PIN_10
-#define PATH_EN_3_5G_DL_GPIO_Port GPIOG
-#define PATH_EN_3_5G_UL_Pin GPIO_PIN_11
-#define PATH_EN_3_5G_UL_GPIO_Port GPIOG
-#define PLL_ON_OFF_3_5G_L_Pin GPIO_PIN_12
-#define PLL_ON_OFF_3_5G_L_GPIO_Port GPIOG
-#define PLL_ON_OFF_3_5G_H_Pin GPIO_PIN_13
-#define PLL_ON_OFF_3_5G_H_GPIO_Port GPIOG
-#define PLL_EN_2_1G_DL_Pin GPIO_PIN_3
-#define PLL_EN_2_1G_DL_GPIO_Port GPIOB
-#define PLL_EN_2_1G_UL_Pin GPIO_PIN_4
-#define PLL_EN_2_1G_UL_GPIO_Port GPIOB
-#define PLL_LD_2_1G_DL_Pin GPIO_PIN_5
-#define PLL_LD_2_1G_DL_GPIO_Port GPIOB
-#define PLL_LD_2_1G_UL_Pin GPIO_PIN_6
-#define PLL_LD_2_1G_UL_GPIO_Port GPIOB
-#define PATH_EN_2_1G_DL_Pin GPIO_PIN_0
-#define PATH_EN_2_1G_DL_GPIO_Port GPIOE
-#define PATH_EN_2_1G_UL_Pin GPIO_PIN_1
-#define PATH_EN_2_1G_UL_GPIO_Port GPIOE
 /* USER CODE BEGIN Private defines */
 
 /* USER CODE END Private defines */

Inc/stm32f1xx_hal_conf.h

@@ -49,7 +49,7 @@
   */
   
 #define HAL_MODULE_ENABLED  
-#define HAL_ADC_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED   */
 /*#define HAL_CRYP_MODULE_ENABLED   */
 /*#define HAL_CAN_MODULE_ENABLED   */
 /*#define HAL_CEC_MODULE_ENABLED   */

Inc/stm32f1xx_it.h

@@ -56,7 +56,8 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
-void DMA1_Channel1_IRQHandler(void);
+void DMA1_Channel4_IRQHandler(void);
+void DMA1_Channel5_IRQHandler(void);
 void USART1_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 

Src/BDA4601.c

@@ -1,36 +0,0 @@
-/*
- * BDA4601.c
- *
- *  Created on: 2019. 6. 28.
- *      Author: parkyj
- */
-void BDA4601_atten_ctrl(PE43711_st* type ,double data){
-    uint8_t i = 0;
-    uint8_t temp = 0;
-    data = 4 * data;
-    temp = (uint8_t)data;
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_1,GPIO_PIN_RESET);
-    HAL_Delay(1);
-    for(i = 0; i < 8; i++){
-        if((uint8_t)temp & 0x01){
-           HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);//DATA
-        }
-           else{
-           HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
-           }
-
-        HAL_GPIO_WritePin(GPIOB,GPIO_PIN_2,GPIO_PIN_SET);//CLOCK
-        HAL_Delay(1);
-        HAL_GPIO_WritePin(GPIOB,GPIO_PIN_2,GPIO_PIN_RESET);//CLOCK
-        HAL_Delay(1);
-        temp >>= 1;
-    }
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_2,GPIO_PIN_RESET);//CLOCK
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
-    HAL_Delay(5);
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_1,GPIO_PIN_SET);//LE
-    HAL_Delay(1);
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_1,GPIO_PIN_RESET);
-}
-
-

Src/PE43711.c

@@ -1,107 +0,0 @@
-/*
- * PE43711.c
- *
- *  Created on: 2019. 6. 28.
- *      Author: parkyj
- */
- #include "PE43711.h"
- typedef struct{
-    uint16_t ATT_EN_1_8G_DL1_PIN;
-    GPIO_TypeDef *ATT_EN_1_8G_DL1_PORT;
-        
-    uint16_t ATT_EN_1_8G_DL2_PIN;
-    GPIO_TypeDef *ATT_EN_1_8G_DL2_PORT;
-
-    uint16_t ATT_EN_1_8G_UL1_PIN;
-    GPIO_TypeDef *ATT_EN_1_8G_UL1_PORT;
-
-    uint16_t ATT_EN_1_8G_UL2_PIN;
-    GPIO_TypeDef *ATT_EN_1_8G_UL2_PORT;
-
-    uint16_t ATT_EN_1_8G_UL3_PIN;
-    GPIO_TypeDef *ATT_EN_1_8G_UL3_PORT;
-
-    uint16_t ATT_EN_1_8G_UL4_PIN;
-    GPIO_TypeDef *ATT_EN_1_8G_UL4_PORT;
- }PE43711_st;
-
-PE43711_st *Atten_1_8Ghz; 
-PE43711_st *Atten_2_1Ghz; 
-
- 
-void PE43711_PinInit(void){
-    Atten_1_8Ghz->ATT_EN_1_8G_DL1_PIN = GPIO_PIN_1;
-    Atten_1_8Ghz->ATT_EN_1_8G_DL1_PORT = GPIOB;
-    
-    Atten_1_8Ghz->ATT_EN_1_8G_DL2_PIN = GPIO_PIN_1;
-    Atten_1_8Ghz->ATT_EN_1_8G_DL2_PORT = GPIOB;
-    
-    Atten_1_8Ghz->ATT_EN_1_8G_UL1_PIN = GPIO_PIN_1;
-    Atten_1_8Ghz->ATT_EN_1_8G_UL1_PORT = GPIOB;
-    
-    Atten_1_8Ghz->ATT_EN_1_8G_DL1_PIN = GPIO_PIN_1;
-    Atten_1_8Ghz->ATT_EN_1_8G_DL1_PORT = GPIOB;
-    
-    Atten_1_8Ghz->ATT_EN_1_8G_UL2_PIN = GPIO_PIN_1;
-    Atten_1_8Ghz->ATT_EN_1_8G_UL2_PORT = GPIOB;
-
-    Atten_1_8Ghz->ATT_EN_1_8G_UL3_PIN = GPIO_PIN_1;
-    Atten_1_8Ghz->ATT_EN_1_8G_UL3_PORT = GPIOB;
-    
-    Atten_1_8Ghz->ATT_EN_1_8G_UL4_PIN = GPIO_PIN_1;
-    Atten_1_8Ghz->ATT_EN_1_8G_UL4_PORT = GPIOB;
-
-
-    Atten_2_1Ghz->ATT_EN_1_8G_DL1_PIN = GPIO_PIN_1;
-    Atten_2_1Ghz->ATT_EN_1_8G_DL1_PORT = GPIOB;
-
-    Atten_2_1Ghz->ATT_EN_1_8G_DL2_PIN = GPIO_PIN_1;
-    Atten_2_1Ghz->ATT_EN_1_8G_DL2_PORT = GPIOB;
-
-    Atten_2_1Ghz->ATT_EN_1_8G_UL1_PIN = GPIO_PIN_1;
-    Atten_2_1Ghz->ATT_EN_1_8G_UL1_PORT = GPIOB;
-
-    Atten_2_1Ghz->ATT_EN_1_8G_DL1_PIN = GPIO_PIN_1;
-    Atten_2_1Ghz->ATT_EN_1_8G_DL1_PORT = GPIOB;
-
-    Atten_2_1Ghz->ATT_EN_1_8G_UL2_PIN = GPIO_PIN_1;
-    Atten_2_1Ghz->ATT_EN_1_8G_UL2_PORT = GPIOB;
-
-    Atten_2_1Ghz->ATT_EN_1_8G_UL3_PIN = GPIO_PIN_1;
-    Atten_2_1Ghz->ATT_EN_1_8G_UL3_PORT = GPIOB;
-
-    Atten_2_1Ghz->ATT_EN_1_8G_UL4_PIN = GPIO_PIN_1;
-    Atten_2_1Ghz->ATT_EN_1_8G_UL4_PORT = GPIOB;
-    
-}
-
-void PE43711_atten_ctrl(PE43711_st* Atten_xGhz ,double data){
-    uint8_t i = 0;
-    uint8_t temp = 0;
-    data = 4 * data;
-    temp = (uint8_t)data;
-    
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_1,GPIO_PIN_RESET);
-    HAL_Delay(1);
-    for(i = 0; i < 8; i++){
-        if((uint8_t)temp & 0x01){
-           HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_SET);//DATA
-        }
-           else{
-           HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
-           }
-
-		HAL_GPIO_WritePin(GPIOB,GPIO_PIN_2,GPIO_PIN_SET);//CLOCK
-		HAL_Delay(1);
-		HAL_GPIO_WritePin(GPIOB,GPIO_PIN_2,GPIO_PIN_RESET);//CLOCK
-		HAL_Delay(1);
-		temp >>= 1;
-    }
-    
-	HAL_GPIO_WritePin(GPIOB,GPIO_PIN_2,GPIO_PIN_RESET);//CLOCK
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
-    HAL_Delay(5);
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_1,GPIO_PIN_SET);//LE
-    HAL_Delay(1);
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_1,GPIO_PIN_RESET);
-}

Src/main.c

@@ -42,10 +42,9 @@
 /* USER CODE END PM */
 
 /* Private variables ---------------------------------------------------------*/
-ADC_HandleTypeDef hadc1;
-DMA_HandleTypeDef hdma_adc1;
-
 UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_usart1_rx;
+DMA_HandleTypeDef hdma_usart1_tx;
 
 /* USER CODE BEGIN PV */
 
@@ -55,7 +54,6 @@ UART_HandleTypeDef huart1;
 void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
 static void MX_DMA_Init(void);
-static void MX_ADC1_Init(void);
 static void MX_USART1_UART_Init(void);
 static void MX_NVIC_Init(void);
 /* USER CODE BEGIN PFP */
@@ -98,7 +96,6 @@ int main(void)
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
   MX_DMA_Init();
-  MX_ADC1_Init();
   MX_USART1_UART_Init();
 
   /* Initialize interrupts */
@@ -109,8 +106,6 @@ int main(void)
 
   /* Infinite loop */
   /* USER CODE BEGIN WHILE */
-  while(HAL_ADCEx_Calibration_Start(&hadc1) != HAL_OK); //ADC Calibration 
-   HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADCvalue, ADC_EA);
   while (1)
   {
     /* USER CODE END WHILE */
@@ -128,7 +123,6 @@ void SystemClock_Config(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
   /** Initializes the CPU, AHB and APB busses clocks 
   */
@@ -155,12 +149,6 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
-  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  {
-    Error_Handler();
-  }
 }
 
 /**
@@ -169,147 +157,17 @@ void SystemClock_Config(void)
   */
 static void MX_NVIC_Init(void)
 {
+  /* DMA1_Channel5_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+  /* DMA1_Channel4_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
   /* USART1_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
   HAL_NVIC_EnableIRQ(USART1_IRQn);
 }
 
-/**
-  * @brief ADC1 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_ADC1_Init(void)
-{
-
-  /* USER CODE BEGIN ADC1_Init 0 */
-
-  /* USER CODE END ADC1_Init 0 */
-
-  ADC_ChannelConfTypeDef sConfig = {0};
-
-  /* USER CODE BEGIN ADC1_Init 1 */
-
-  /* USER CODE END ADC1_Init 1 */
-  /** Common config 
-  */
-  hadc1.Instance = ADC1;
-  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
-  hadc1.Init.ContinuousConvMode = ENABLE;
-  hadc1.Init.DiscontinuousConvMode = DISABLE;
-  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-  hadc1.Init.NbrOfConversion = 14;
-  if (HAL_ADC_Init(&hadc1) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Channel = ADC_CHANNEL_0;
-  sConfig.Rank = ADC_REGULAR_RANK_1;
-  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_2;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_3;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_4;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_5;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_6;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_7;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_8;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_9;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_10;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_11;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_12;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_13;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /** Configure Regular Channel 
-  */
-  sConfig.Rank = ADC_REGULAR_RANK_14;
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /* USER CODE BEGIN ADC1_Init 2 */
-
-  /* USER CODE END ADC1_Init 2 */
-
-}
-
 /**
   * @brief USART1 Initialization Function
   * @param None
@@ -351,11 +209,6 @@ static void MX_DMA_Init(void)
   /* DMA controller clock enable */
   __HAL_RCC_DMA1_CLK_ENABLE();
 
-  /* DMA interrupt init */
-  /* DMA1_Channel1_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
-  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
-
 }
 
 /**
@@ -368,126 +221,17 @@ static void MX_GPIO_Init(void)
   GPIO_InitTypeDef GPIO_InitStruct = {0};
 
   /* GPIO Ports Clock Enable */
-  __HAL_RCC_GPIOE_CLK_ENABLE();
-  __HAL_RCC_GPIOC_CLK_ENABLE();
-  __HAL_RCC_GPIOF_CLK_ENABLE();
   __HAL_RCC_GPIOA_CLK_ENABLE();
-  __HAL_RCC_GPIOB_CLK_ENABLE();
-  __HAL_RCC_GPIOD_CLK_ENABLE();
-  __HAL_RCC_GPIOG_CLK_ENABLE();
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOE, ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
-                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOC, ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
-                          |PLL_EN_3_5G_H_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOF, PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
-                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOD, PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
-                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
-                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
-                          |PATH_EN_3_5G_L_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOG, DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
-                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
-                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_15, GPIO_PIN_RESET);
 
-  /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(GPIOB, PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin, GPIO_PIN_RESET);
-
-  /*Configure GPIO pins : ATT_EN_1_8G_DL1_Pin ATT_EN_1_8G_DL2_Pin ATT_EN_1_8G_UL1_Pin ATT_EN_1_8G_UL2_Pin 
-                           ATT_EN_1_8G_UL3_Pin PATH_EN_2_1G_DL_Pin PATH_EN_2_1G_UL_Pin */
-  GPIO_InitStruct.Pin = ATT_EN_1_8G_DL1_Pin|ATT_EN_1_8G_DL2_Pin|ATT_EN_1_8G_UL1_Pin|ATT_EN_1_8G_UL2_Pin 
-                          |ATT_EN_1_8G_UL3_Pin|PATH_EN_2_1G_DL_Pin|PATH_EN_2_1G_UL_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : ATT_EN_1_8G_UL4_Pin PATH_EN_1_8G_DL_Pin PATH_EN_1_8G_UL_Pin PLL_EN_3_5G_L_Pin 
-                           PLL_EN_3_5G_H_Pin */
-  GPIO_InitStruct.Pin = ATT_EN_1_8G_UL4_Pin|PATH_EN_1_8G_DL_Pin|PATH_EN_1_8G_UL_Pin|PLL_EN_3_5G_L_Pin 
-                          |PLL_EN_3_5G_H_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PLL_EN_1_8G_DL_Pin PLL_EN_1_8G_UL_Pin ATT_EN_2_1G_DL1_Pin ATT_EN_2_1G_DL2_Pin 
-                           ATT_EN_2_1G_UL1_Pin ATT_EN_2_1G_UL2_Pin ATT_EN_2_1G_UL3_Pin ATT_EN_2_1G_UL4_Pin */
-  GPIO_InitStruct.Pin = PLL_EN_1_8G_DL_Pin|PLL_EN_1_8G_UL_Pin|ATT_EN_2_1G_DL1_Pin|ATT_EN_2_1G_DL2_Pin 
-                          |ATT_EN_2_1G_UL1_Pin|ATT_EN_2_1G_UL2_Pin|ATT_EN_2_1G_UL3_Pin|ATT_EN_2_1G_UL4_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PLL_LD_1_8G_DL_Pin PLL_LD_1_8G_UL_Pin */
-  GPIO_InitStruct.Pin = PLL_LD_1_8G_DL_Pin|PLL_LD_1_8G_UL_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PLL_DATA_Pin PLL_CLK_Pin ATT_DATA_Pin ATT_CLK_Pin 
-                           DA_LDAC_Pin ATT_CLK_3_5G_Pin ATT_EN_3_5G_Pin ATT_DATA_3_5G_DL_Pin 
-                           ATT_DATA_3_5G_UL_Pin ATT_DATA_3_5G_COM1_Pin ATT_DATA_3_5G_COM2_Pin ATT_DATA_3_5G_COM3_Pin 
-                           PATH_EN_3_5G_L_Pin */
-  GPIO_InitStruct.Pin = PLL_DATA_Pin|PLL_CLK_Pin|ATT_DATA_Pin|ATT_CLK_Pin 
-                          |DA_LDAC_Pin|ATT_CLK_3_5G_Pin|ATT_EN_3_5G_Pin|ATT_DATA_3_5G_DL_Pin 
-                          |ATT_DATA_3_5G_UL_Pin|ATT_DATA_3_5G_COM1_Pin|ATT_DATA_3_5G_COM2_Pin|ATT_DATA_3_5G_COM3_Pin 
-                          |PATH_EN_3_5G_L_Pin;
+  /*Configure GPIO pin : PA15 */
+  GPIO_InitStruct.Pin = GPIO_PIN_15;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : ALARM_DC_Pin ALARM_AC_Pin */
-  GPIO_InitStruct.Pin = ALARM_DC_Pin|ALARM_AC_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : DA_SYNC_Pin DA_SCLK_Pin DA_DIN_Pin _T_SYNC_UL_Pin 
-                           T_SYNC_UL_Pin _T_SYNC_DL_Pin T_SYNC_DL_Pin PATH_EN_3_5G_DL_Pin 
-                           PATH_EN_3_5G_UL_Pin PLL_ON_OFF_3_5G_L_Pin PLL_ON_OFF_3_5G_H_Pin */
-  GPIO_InitStruct.Pin = DA_SYNC_Pin|DA_SCLK_Pin|DA_DIN_Pin|_T_SYNC_UL_Pin 
-                          |T_SYNC_UL_Pin|_T_SYNC_DL_Pin|T_SYNC_DL_Pin|PATH_EN_3_5G_DL_Pin 
-                          |PATH_EN_3_5G_UL_Pin|PLL_ON_OFF_3_5G_L_Pin|PLL_ON_OFF_3_5G_H_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PLL_LD_3_5G_L_Pin PLL_LD_3_5G_H_Pin */
-  GPIO_InitStruct.Pin = PLL_LD_3_5G_L_Pin|PLL_LD_3_5G_H_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-  /*Configure GPIO pin : PATH_EN_3_5G_H_Pin */
-  GPIO_InitStruct.Pin = PATH_EN_3_5G_H_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-  HAL_GPIO_Init(PATH_EN_3_5G_H_GPIO_Port, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PLL_EN_2_1G_DL_Pin PLL_EN_2_1G_UL_Pin */
-  GPIO_InitStruct.Pin = PLL_EN_2_1G_DL_Pin|PLL_EN_2_1G_UL_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-  /*Configure GPIO pins : PLL_LD_2_1G_DL_Pin PLL_LD_2_1G_UL_Pin */
-  GPIO_InitStruct.Pin = PLL_LD_2_1G_DL_Pin|PLL_LD_2_1G_UL_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
 }
 

Src/stm32f1xx_hal_msp.c

@@ -24,7 +24,9 @@
 /* USER CODE BEGIN Includes */
 
 /* USER CODE END Includes */
-extern DMA_HandleTypeDef hdma_adc1;
+extern DMA_HandleTypeDef hdma_usart1_rx;
+
+extern DMA_HandleTypeDef hdma_usart1_tx;
 
 /* Private typedef -----------------------------------------------------------*/
 /* USER CODE BEGIN TD */
@@ -73,136 +75,15 @@ void HAL_MspInit(void)
 
   /* System interrupt init*/
 
-  /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled 
+  /** DISABLE: JTAG-DP Disabled and SW-DP Disabled 
   */
-  __HAL_AFIO_REMAP_SWJ_NOJTAG();
+  __HAL_AFIO_REMAP_SWJ_DISABLE();
 
   /* USER CODE BEGIN MspInit 1 */
 
   /* USER CODE END MspInit 1 */
 }
 
-/**
-* @brief ADC MSP Initialization
-* This function configures the hardware resources used in this example
-* @param hadc: ADC handle pointer
-* @retval None
-*/
-void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
-{
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
-  if(hadc->Instance==ADC1)
-  {
-  /* USER CODE BEGIN ADC1_MspInit 0 */
-
-  /* USER CODE END ADC1_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_ADC1_CLK_ENABLE();
-  
-    __HAL_RCC_GPIOC_CLK_ENABLE();
-    __HAL_RCC_GPIOA_CLK_ENABLE();
-    __HAL_RCC_GPIOB_CLK_ENABLE();
-    /**ADC1 GPIO Configuration    
-    PC0     ------> ADC1_IN10
-    PC1     ------> ADC1_IN11
-    PC2     ------> ADC1_IN12
-    PC3     ------> ADC1_IN13
-    PA0-WKUP     ------> ADC1_IN0
-    PA1     ------> ADC1_IN1
-    PA2     ------> ADC1_IN2
-    PA3     ------> ADC1_IN3
-    PA4     ------> ADC1_IN4
-    PA5     ------> ADC1_IN5
-    PA6     ------> ADC1_IN6
-    PA7     ------> ADC1_IN7
-    PB0     ------> ADC1_IN8
-    PB1     ------> ADC1_IN9 
-    */
-    GPIO_InitStruct.Pin = DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-    GPIO_InitStruct.Pin = DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
-                          |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-    GPIO_InitStruct.Pin = DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin;
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
-    /* ADC1 DMA Init */
-    /* ADC1 Init */
-    hdma_adc1.Instance = DMA1_Channel1;
-    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
-    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
-    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
-    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
-    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
-    hdma_adc1.Init.Mode = DMA_NORMAL;
-    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
-    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
-    {
-      Error_Handler();
-    }
-
-    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
-
-  /* USER CODE BEGIN ADC1_MspInit 1 */
-
-  /* USER CODE END ADC1_MspInit 1 */
-  }
-
-}
-
-/**
-* @brief ADC MSP De-Initialization
-* This function freeze the hardware resources used in this example
-* @param hadc: ADC handle pointer
-* @retval None
-*/
-void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
-{
-  if(hadc->Instance==ADC1)
-  {
-  /* USER CODE BEGIN ADC1_MspDeInit 0 */
-
-  /* USER CODE END ADC1_MspDeInit 0 */
-    /* Peripheral clock disable */
-    __HAL_RCC_ADC1_CLK_DISABLE();
-  
-    /**ADC1 GPIO Configuration    
-    PC0     ------> ADC1_IN10
-    PC1     ------> ADC1_IN11
-    PC2     ------> ADC1_IN12
-    PC3     ------> ADC1_IN13
-    PA0-WKUP     ------> ADC1_IN0
-    PA1     ------> ADC1_IN1
-    PA2     ------> ADC1_IN2
-    PA3     ------> ADC1_IN3
-    PA4     ------> ADC1_IN4
-    PA5     ------> ADC1_IN5
-    PA6     ------> ADC1_IN6
-    PA7     ------> ADC1_IN7
-    PB0     ------> ADC1_IN8
-    PB1     ------> ADC1_IN9 
-    */
-    HAL_GPIO_DeInit(GPIOC, DET_3_5G_UL_IN_Pin|DET_3_5G_UL_OUT_Pin|RFU_TEMP_Pin|_28V_DET_Pin);
-
-    HAL_GPIO_DeInit(GPIOA, DET_1_8G_DL_IN_Pin|DET_1_8G_DL_OUT_Pin|DET_1_8G_UL_IN_Pin|DET_1_8G_UL_OUT_Pin 
-                          |DET_2_1G_DL_IN_Pin|DET_2_1G_DL_OUT_Pin|DET_2_1G_UL_IN_Pin|DET_2_1G_UL_OUT_Pin);
-
-    HAL_GPIO_DeInit(GPIOB, DET_3_5G_DL_IN_Pin|DET_3_5G_DL_OUT_Pin);
-
-    /* ADC1 DMA DeInit */
-    HAL_DMA_DeInit(hadc->DMA_Handle);
-  /* USER CODE BEGIN ADC1_MspDeInit 1 */
-
-  /* USER CODE END ADC1_MspDeInit 1 */
-  }
-
-}
-
 /**
 * @brief UART MSP Initialization
 * This function configures the hardware resources used in this example
@@ -235,6 +116,39 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
     GPIO_InitStruct.Pull = GPIO_NOPULL;
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
+    /* USART1 DMA Init */
+    /* USART1_RX Init */
+    hdma_usart1_rx.Instance = DMA1_Channel5;
+    hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_usart1_rx.Init.Mode = DMA_NORMAL;
+    hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
+
+    /* USART1_TX Init */
+    hdma_usart1_tx.Instance = DMA1_Channel4;
+    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
+    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
+
   /* USER CODE BEGIN USART1_MspInit 1 */
 
   /* USER CODE END USART1_MspInit 1 */
@@ -264,6 +178,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
     */
     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
 
+    /* USART1 DMA DeInit */
+    HAL_DMA_DeInit(huart->hdmarx);
+    HAL_DMA_DeInit(huart->hdmatx);
+
     /* USART1 interrupt DeInit */
     HAL_NVIC_DisableIRQ(USART1_IRQn);
   /* USER CODE BEGIN USART1_MspDeInit 1 */

Src/stm32f1xx_it.c

@@ -56,7 +56,8 @@
 /* USER CODE END 0 */
 
 /* External variables --------------------------------------------------------*/
-extern DMA_HandleTypeDef hdma_adc1;
+extern DMA_HandleTypeDef hdma_usart1_rx;
+extern DMA_HandleTypeDef hdma_usart1_tx;
 extern UART_HandleTypeDef huart1;
 /* USER CODE BEGIN EV */
 
@@ -199,17 +200,31 @@ void SysTick_Handler(void)
 /******************************************************************************/
 
 /**
-  * @brief This function handles DMA1 channel1 global interrupt.
+  * @brief This function handles DMA1 channel4 global interrupt.
   */
-void DMA1_Channel1_IRQHandler(void)
+void DMA1_Channel4_IRQHandler(void)
 {
-  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+  /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
 
-  /* USER CODE END DMA1_Channel1_IRQn 0 */
-  HAL_DMA_IRQHandler(&hdma_adc1);
-  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+  /* USER CODE END DMA1_Channel4_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_usart1_tx);
+  /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
 
-  /* USER CODE END DMA1_Channel1_IRQn 1 */
+  /* USER CODE END DMA1_Channel4_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 channel5 global interrupt.
+  */
+void DMA1_Channel5_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
+
+  /* USER CODE END DMA1_Channel5_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_usart1_rx);
+  /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
+
+  /* USER CODE END DMA1_Channel5_IRQn 1 */
 }
 
 /**