Table 구조체 Enum 추가 / EEPROM Write Read 기능 추가 수정필요 / ADC Data 평균 취하는 기능 추가

Bluecell_Inc/Bluecell_operate.h

@@ -330,7 +330,10 @@ enum DATATYPE
     AGC2_EN = 0x62,
     AGC3_EN = 0x63,
     AGC4_EN = 0x64,
+    ATT_TableSet = 0x70,
+    ATT_TableGet = 0x71,
 	Bluecell_StatusReq = 0x77,
+	Bluecell_StatusSave = 0x78,
 };
 
 
@@ -435,54 +438,54 @@ typedef struct{
 typedef struct{
     uint8_t bluecell_header;
     uint8_t bluecell_type;
-    uint8_t bluecell_length;    
-    uint8_t bluecell_crcindex;        
+    uint8_t bluecell_length;
+    uint8_t bluecell_crcindex;
     uint8_t Selftest0;
     uint8_t Selftest1;
     uint8_t Selftest2;
-    uint8_t Selftest3;    
-    uint8_t ATT_DL1_PATH;    
-    uint8_t ATT_DL2_PATH;    
-    uint8_t ATT_DL3_PATH;    
-    uint8_t ATT_DL4_PATH;        
-    uint8_t ATT_UL1_PATH;        
-    uint8_t ATT_UL2_PATH;        
-    uint8_t ATT_UL3_PATH;        
+    uint8_t Selftest3;
+    uint8_t ATT_DL1_PATH;
+    uint8_t ATT_DL2_PATH;
+    uint8_t ATT_DL3_PATH;
+    uint8_t ATT_DL4_PATH;
+    uint8_t ATT_UL1_PATH;
+    uint8_t ATT_UL2_PATH;
+    uint8_t ATT_UL3_PATH;
     uint8_t ATT_UL4_PATH;
-    uint8_t ATT_DL1_H;    
-    uint8_t ATT_DL1_L;        
-    uint8_t ATT_DL2_H;    
-    uint8_t ATT_DL2_L;        
-    uint8_t ATT_DL3_H;    
-    uint8_t ATT_DL3_L;        
-    uint8_t ATT_DL4_H;    
-    uint8_t ATT_DL4_L;        
-    uint8_t ATT_UL1_H;    
-    uint8_t ATT_UL1_L;        
-    uint8_t ATT_UL2_H;    
-    uint8_t ATT_UL2_L;        
-    uint8_t ATT_UL3_H;    
-    uint8_t ATT_UL3_L;        
+    uint8_t ATT_DL1_H;
+    uint8_t ATT_DL1_L;
+    uint8_t ATT_DL2_H;
+    uint8_t ATT_DL2_L;
+    uint8_t ATT_DL3_H;
+    uint8_t ATT_DL3_L;
+    uint8_t ATT_DL4_H;
+    uint8_t ATT_DL4_L;
+    uint8_t ATT_UL1_H;
+    uint8_t ATT_UL1_L;
+    uint8_t ATT_UL2_H;
+    uint8_t ATT_UL2_L;
+    uint8_t ATT_UL3_H;
+    uint8_t ATT_UL3_L;
     uint8_t ATT_UL4_H;
     uint8_t ATT_UL4_L;
-    uint8_t DET_DL1_IN_H;
-    uint8_t DET_DL1_IN_L;    
-    uint8_t DET_DL2_IN_H;
-    uint8_t DET_DL2_IN_L;    
-    uint8_t DET_DL3_IN_H;
-    uint8_t DET_DL3_IN_L;    
-    uint8_t DET_DL4_IN_H;
-    uint8_t DET_DL4_IN_L;    
-    uint8_t DET_UL1_IN_H;
-    uint8_t DET_UL1_IN_L;    
-    uint8_t DET_UL2_IN_H;
-    uint8_t DET_UL2_IN_L;    
-    uint8_t DET_UL3_IN_H;
-    uint8_t DET_UL3_IN_L;    
-    uint8_t DET_UL4_IN_H;
-    uint8_t DET_UL4_IN_L;        
-    uint8_t DET_TEMP_H;            
-    uint8_t DET_TEMP_L;                
+    uint8_t DET_DL1_IN_H;//ADC3   5
+    uint8_t DET_DL1_IN_L;//ADC3   5
+    uint8_t DET_DL2_IN_H;//ADC3   6 
+    uint8_t DET_DL2_IN_L;//ADC3   6
+    uint8_t DET_DL3_IN_H;//ADC3   7
+    uint8_t DET_DL3_IN_L;//ADC3   7
+    uint8_t DET_DL4_IN_H;//ADC3   8   
+    uint8_t DET_DL4_IN_L;//ADC3   8
+    uint8_t DET_UL1_IN_H;//ADC1   4  
+    uint8_t DET_UL1_IN_L;//ADC1   4 
+    uint8_t DET_UL2_IN_H;//ADC1   5 
+    uint8_t DET_UL2_IN_L;//ADC1   5
+    uint8_t DET_UL3_IN_H;//ADC1   6
+    uint8_t DET_UL3_IN_L;//ADC1   6
+    uint8_t DET_UL4_IN_H;//ADC3   4
+    uint8_t DET_UL4_IN_L;//ADC3   4
+    uint8_t DET_TEMP_H;
+    uint8_t DET_TEMP_L;
     uint8_t ATT_AGC1_ONOFF;
     uint8_t ATT_ALC1_ONOFF;
     uint8_t ATT_AGC2_ONOFF;
@@ -491,24 +494,188 @@ typedef struct{
     uint8_t ATT_ALC3_ONOFF;
     uint8_t ATT_AGC4_ONOFF;
     uint8_t ATT_ALC4_ONOFF;
-    uint8_t ATT_AGC1_H;
-    uint8_t ATT_AGC1_L;    
     uint8_t ATT_ALC1_H;
-    uint8_t ATT_ALC1_L;    
-    uint8_t ATT_AGC2_H;
-    uint8_t ATT_AGC2_L;    
+    uint8_t ATT_ALC1_L;
     uint8_t ATT_ALC2_H;
-    uint8_t ATT_ALC2_L;    
-    uint8_t ATT_AGC3_H;
-    uint8_t ATT_AGC3_L;    
+    uint8_t ATT_ALC2_L;
     uint8_t ATT_ALC3_H;
-    uint8_t ATT_ALC3_L;    
-    uint8_t ATT_AGC4_H;
-    uint8_t ATT_AGC4_L;    
+    uint8_t ATT_ALC3_L;
     uint8_t ATT_ALC4_H;
-    uint8_t ATT_ALC4_L;    
-    uint8_t bluecell_crc;        
+    uint8_t ATT_ALC4_L;
+    uint8_t ATT_AGC1_H;
+    uint8_t ATT_AGC1_L;
+    uint8_t ATT_AGC2_H;
+    uint8_t ATT_AGC2_L;
+    uint8_t ATT_AGC3_H;
+    uint8_t ATT_AGC3_L;
+    uint8_t ATT_AGC4_H;
+    uint8_t ATT_AGC4_L;
+    uint8_t bluecell_crc;
+    uint8_t bluecell_etx;
+
 }BLUESTATUS_st;
+typedef struct{
+  uint16_t Table_0_0_dBm	;
+  uint16_t Table_0_5_dBm	;
+  uint16_t Table_1_0_dBm	;
+  uint16_t Table_1_5_dBm	;
+  uint16_t Table_2_0_dBm	;
+  uint16_t Table_2_5_dBm	;
+  uint16_t Table_3_0_dBm	;
+  uint16_t Table_3_5_dBm	;
+  uint16_t Table_4_0_dBm	;
+  uint16_t Table_4_5_dBm	;
+  uint16_t Table_5_0_dBm	;
+  uint16_t Table_5_5_dBm	;
+  uint16_t Table_6_0_dBm	;
+  uint16_t Table_6_5_dBm	;
+  uint16_t Table_7_0_dBm	;
+  uint16_t Table_7_5_dBm	;
+  uint16_t Table_8_0_dBm	;
+  uint16_t Table_8_5_dBm	;
+  uint16_t Table_9_0_dBm	;
+  uint16_t Table_9_5_dBm	;
+  uint16_t Table_10_0_dBm;
+  uint16_t Table_10_5_dBm;
+  uint16_t Table_11_0_dBm;
+  uint16_t Table_11_5_dBm;
+  uint16_t Table_12_0_dBm;
+  uint16_t Table_12_5_dBm;
+  uint16_t Table_13_0_dBm;
+  uint16_t Table_13_5_dBm;
+  uint16_t Table_14_0_dBm;
+  uint16_t Table_14_5_dBm;
+  uint16_t Table_15_0_dBm;
+  uint16_t Table_15_5_dBm;
+  uint16_t Table_16_0_dBm;
+  uint16_t Table_16_5_dBm;
+  uint16_t Table_17_0_dBm;
+  uint16_t Table_17_5_dBm;
+  uint16_t Table_18_0_dBm;
+  uint16_t Table_18_5_dBm;
+  uint16_t Table_19_0_dBm;
+  uint16_t Table_19_5_dBm;
+  uint16_t Table_20_0_dBm;
+  uint16_t Table_20_5_dBm;
+  uint16_t Table_21_0_dBm;
+  uint16_t Table_21_5_dBm;
+  uint16_t Table_22_0_dBm;
+  uint16_t Table_22_5_dBm;
+  uint16_t Table_23_0_dBm;
+  uint16_t Table_23_5_dBm;
+  uint16_t Table_24_0_dBm;
+  uint16_t Table_24_5_dBm;
+  uint16_t Table_25_0_dBm;
+  uint16_t Table_25_5_dBm;
+  uint16_t Table_26_0_dBm;
+  uint16_t Table_26_5_dBm;
+  uint16_t Table_27_0_dBm;
+  uint16_t Table_27_5_dBm;
+  uint16_t Table_28_0_dBm;
+  uint16_t Table_28_5_dBm;
+  uint16_t Table_29_0_dBm;
+  uint16_t Table_29_5_dBm;
+  uint16_t Table_30_0_dBm;
+  uint16_t Table_30_5_dBm;
+  uint16_t Table_31_0_dBm;
+  uint16_t Table_31_5_dBm;
+}ATT_TABLE_st;
+typedef struct{
+
+  uint16_t Table_Det5_dBm	;
+  uint16_t Table_Det4_dBm	;
+  uint16_t Table_Det3_dBm	;
+  uint16_t Table_Det2_dBm	;
+  uint16_t Table_Det1_dBm	;
+  uint16_t Table_Det0_dBm	;
+  uint16_t Table_Det_1_dBm	;
+  uint16_t Table_Det_2_dBm	;
+  uint16_t Table_Det_3_dBm	;
+  uint16_t Table_Det_4_dBm	;
+  uint16_t Table_Det_5_dBm	;
+  uint16_t Table_Det_6_dBm	;
+  uint16_t Table_Det_7_dBm	;
+  uint16_t Table_Det_8_dBm	;
+  uint16_t Table_Det_9_dBm	;
+  uint16_t Table_Det_10_dBm	;
+  uint16_t Table_Det_11_dBm	;
+  uint16_t Table_Det_12_dBm	;
+  uint16_t Table_Det_13_dBm	;
+  uint16_t Table_Det_14_dBm	;
+  uint16_t Table_Det_15_dBm	;
+  uint16_t Table_Det_16_dBm	;
+  uint16_t Table_Det_17_dBm	;
+  uint16_t Table_Det_18_dBm	;
+  uint16_t Table_Det_19_dBm	;
+  uint16_t Table_Det_20_dBm	;
+  uint16_t Table_Det_21_dBm	;
+  uint16_t Table_Det_22_dBm	;
+  uint16_t Table_Det_23_dBm	;
+  uint16_t Table_Det_24_dBm	;
+  uint16_t Table_Det_25_dBm	;
+}DET_TABLEDL_st;
+typedef struct{
+  uint16_t Table_Det_15_dBm	;
+  uint16_t Table_Det_16_dBm	;
+  uint16_t Table_Det_17_dBm	;
+  uint16_t Table_Det_18_dBm	;
+  uint16_t Table_Det_19_dBm	;
+  uint16_t Table_Det_20_dBm	;
+  uint16_t Table_Det_21_dBm	;
+  uint16_t Table_Det_22_dBm	;
+  uint16_t Table_Det_23_dBm	;
+  uint16_t Table_Det_24_dBm	;
+  uint16_t Table_Det_25_dBm	;
+  uint16_t Table_Det_26_dBm	;
+  uint16_t Table_Det_27_dBm	;
+  uint16_t Table_Det_28_dBm	;
+  uint16_t Table_Det_29_dBm	;
+  uint16_t Table_Det_30_dBm	;
+  uint16_t Table_Det_31_dBm	;
+  uint16_t Table_Det_32_dBm	;
+  uint16_t Table_Det_33_dBm	;
+  uint16_t Table_Det_34_dBm	;
+  uint16_t Table_Det_35_dBm	;
+  uint16_t Table_Det_36_dBm	;
+  uint16_t Table_Det_37_dBm	;
+  uint16_t Table_Det_38_dBm	;
+  uint16_t Table_Det_39_dBm	;
+  uint16_t Table_Det_40_dBm	;
+  uint16_t Table_Det_41_dBm	;
+  uint16_t Table_Det_42_dBm	;
+  uint16_t Table_Det_43_dBm	;
+  uint16_t Table_Det_44_dBm	;
+  uint16_t Table_Det_45_dBm	;
+  uint16_t Table_Det_46_dBm	;
+  uint16_t Table_Det_47_dBm	;
+  uint16_t Table_Det_48_dBm	;
+  uint16_t Table_Det_49_dBm	;
+  uint16_t Table_Det_50_dBm	;
+  uint16_t Table_Det_51_dBm	;
+  uint16_t Table_Det_52_dBm	;
+  uint16_t Table_Det_53_dBm	;
+  uint16_t Table_Det_54_dBm	;
+  uint16_t Table_Det_55_dBm	;
+  uint16_t Table_Det_56_dBm	;
+  uint16_t Table_Det_57_dBm	;
+  uint16_t Table_Det_58_dBm	;
+  uint16_t Table_Det_59_dBm	;
+  uint16_t Table_Det_60_dBm	;
+}DET_TABLEUL_st;
+
+typedef struct{
+
+  uint16_t Table_10_Temp;
+  uint16_t Table_15_Temp;
+  uint16_t Table_20_Temp;
+  uint16_t Table_25_Temp;
+  uint16_t Table_30_Temp;
+  uint16_t Table_35_Temp;
+  uint16_t Table_40_Temp;
+  uint16_t Table_45_Temp;
+  uint16_t Table_50_Temp;
+  uint16_t Table_55_Temp;
+}TEMP_TABLE_st;
 typedef enum{
   Bluecell_DET_UL1_ADC_INDEX_H = 0,
   Bluecell_DET_UL1_ADC_INDEX_L,
@@ -535,4 +702,41 @@ typedef enum{
 }Bluecell_ADC3_Index;
 #define ADC1_EA Bluecell_ADC1_MaxLength /2
 #define ADC3_EA Bluecell_ADC3_MaxLength /2
+
+
+extern ATT_TABLE_st Att_DL1;
+extern ATT_TABLE_st Att_DL2;
+extern ATT_TABLE_st Att_DL3;
+extern ATT_TABLE_st Att_DL4;
+extern ATT_TABLE_st Att_UL1;
+extern ATT_TABLE_st Att_UL2;
+extern ATT_TABLE_st Att_UL3;
+extern ATT_TABLE_st Att_UL4;
+
+extern DET_TABLEDL_st Det_DL1;
+extern DET_TABLEDL_st Det_DL2;
+extern DET_TABLEDL_st Det_DL3;
+extern DET_TABLEDL_st Det_DL4;
+
+extern DET_TABLEUL_st Det_UL1;
+extern DET_TABLEUL_st Det_UL2;
+extern DET_TABLEUL_st Det_UL3;
+extern DET_TABLEUL_st Det_UL4;
+
+extern TEMP_TABLE_st Temp_DL1;
+extern TEMP_TABLE_st Temp_DL2;
+extern TEMP_TABLE_st Temp_DL3;
+extern TEMP_TABLE_st Temp_DL4;
+
+extern TEMP_TABLE_st Temp_UL1;
+extern TEMP_TABLE_st Temp_UL2;
+extern TEMP_TABLE_st Temp_UL3;
+extern TEMP_TABLE_st Temp_UL4;
+
+extern BLUESTATUS_st bluecell_Currdatastatus;
+
+
+
+extern void Bluecell_DataInit();
+
 #endif /* BLUECELL_OPERATE_H_ */

Bluecell_Inc/eeprom.h

@@ -0,0 +1,198 @@
+/*
+ * eeprom.h
+ *
+ *  Created on: 2020. 4. 22.
+ *      Author: parkyj
+ */
+
+#ifndef EEPROM_H_
+#define EEPROM_H_
+
+
+#define EEPROM_M24C08_ID                  0xA0
+#define EEPROM_Block0_ADDRESS             EEPROM_M24C08_ID
+#define EEPROM_ATT_BASE					  0x0000
+
+#define EEPROM_ATT_DL1_TABLE_ADDRESDS	  EEPROM_ATT_BASE               + (sizeof(ATT_TABLE_st)            * 2)
+#define EEPROM_ATT_DL2_TABLE_ADDRESDS	  EEPROM_ATT_DL1_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)            * 2)
+#define EEPROM_ATT_DL3_TABLE_ADDRESDS	  EEPROM_ATT_DL2_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)            * 2)
+#define EEPROM_ATT_DL4_TABLE_ADDRESDS	  EEPROM_ATT_DL3_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)            * 2)
+
+#define EEPROM_ATT_UL1_TABLE_ADDRESDS	  EEPROM_ATT_DL4_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)            * 2)
+#define EEPROM_ATT_UL2_TABLE_ADDRESDS	  EEPROM_ATT_UL1_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)            * 2)
+#define EEPROM_ATT_UL3_TABLE_ADDRESDS	  EEPROM_ATT_UL2_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)            * 2)
+#define EEPROM_ATT_UL4_TABLE_ADDRESDS	  EEPROM_ATT_UL3_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)            * 2)
+
+#define EEPROM_DET_DL1_TABLE_ADDRESDS	  EEPROM_ATT_UL4_TABLE_ADDRESDS + (sizeof(DET_TABLEDL_st)          * 2)
+#define EEPROM_DET_DL2_TABLE_ADDRESDS	  EEPROM_DET_DL1_TABLE_ADDRESDS + (sizeof(DET_TABLEDL_st)          * 2)
+#define EEPROM_DET_DL3_TABLE_ADDRESDS	  EEPROM_DET_DL2_TABLE_ADDRESDS + (sizeof(DET_TABLEDL_st)          * 2)
+#define EEPROM_DET_DL4_TABLE_ADDRESDS	  EEPROM_DET_DL3_TABLE_ADDRESDS + (sizeof(DET_TABLEDL_st)          * 2)
+
+#define EEPROM_DET_UL1_TABLE_ADDRESDS	  EEPROM_DET_DL4_TABLE_ADDRESDS + (sizeof(DET_TABLEUL_st)          * 2)
+#define EEPROM_DET_UL2_TABLE_ADDRESDS	  EEPROM_DET_UL1_TABLE_ADDRESDS + (sizeof(DET_TABLEUL_st)          * 2)
+#define EEPROM_DET_UL3_TABLE_ADDRESDS	  EEPROM_DET_UL2_TABLE_ADDRESDS + (sizeof(DET_TABLEUL_st)          * 2)
+#define EEPROM_DET_UL4_TABLE_ADDRESDS	  EEPROM_DET_UL3_TABLE_ADDRESDS + (sizeof(DET_TABLEUL_st)          * 2)
+
+#define EEPROM_TEMP_DL1_TABLE_ADDRESDS	  EEPROM_DET_UL4_TABLE_ADDRESDS + (sizeof(TEMP_TABLE_st)           * 2)
+#define EEPROM_TEMP_DL2_TABLE_ADDRESDS	  EEPROM_TEMP_DL1_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)          * 2)
+#define EEPROM_TEMP_DL3_TABLE_ADDRESDS	  EEPROM_TEMP_DL2_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)          * 2)
+#define EEPROM_TEMP_DL4_TABLE_ADDRESDS	  EEPROM_TEMP_DL3_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)          * 2)
+
+#define EEPROM_TEMP_UL1_TABLE_ADDRESDS	  EEPROM_TEMP_DL4_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)          * 2)
+#define EEPROM_TEMP_UL2_TABLE_ADDRESDS	  EEPROM_TEMP_UL1_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)          * 2)
+#define EEPROM_TEMP_UL3_TABLE_ADDRESDS	  EEPROM_TEMP_UL2_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)          * 2)
+#define EEPROM_TEMP_UL4_TABLE_ADDRESDS	  EEPROM_TEMP_UL3_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)          * 2)
+
+
+#define EEPROM_WINDOW_STATUS_ADDRESDS	  EEPROM_TEMP_UL4_TABLE_ADDRESDS +( sizeof(BLUESTATUS_st)          * 2)
+
+#define MAKE_ADDRESS(_addr, _e2)            ((uint8_t)EEPROM_M24C08_ADDR | \
+                                             ((_e2) ? EEPROM_M24C08_ADDR_E2 : 0) | \
+                                             ((uint8_t)((_addr) >> 7) & EEPROM_M24C08_BYTE_ADDR_H))
+
+#define EEPROM_M24C08_ADDR                  0xA0        //!< M24C08 device identifier
+#define EEPROM_M24C08_ADDR_E2               0x08        //!< M24C08 E2 address bit
+
+
+
+
+#define EEPROM_M24C08_BYTE_ADDR_H           0x06
+
+HAL_StatusTypeDef EEPROM_M24C08_Read(uint16_t devid,uint16_t Address,uint16_t* data,uint8_t size);
+HAL_StatusTypeDef EEPROM_M24C08_write(uint16_t devid,uint16_t Address,uint16_t* data,uint8_t size);
+
+HAL_StatusTypeDef EEPROM_M24C08_ByteRead(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size);
+HAL_StatusTypeDef EEPROM_M24C08_Bytewrite(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size);
+
+void EEPROM_M24C08_Init(void);
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+// Exported type definitions --------------------------------------------------
+/**
+ * The possible states the EEPROM driver can be in.
+ */
+typedef enum
+{
+    EE_UNINIT = 0,      //!< Driver has not been initialized
+    EE_IDLE,            //!< Driver has been initialized and is ready to start a transfer
+    EE_FINISH,          //!< Driver has finished with a transfer
+    EE_READ,            //!< Driver is doing a read operation
+    EE_WRITE_SEND,      //!< Driver is writing data
+    EE_WRITE_WAIT       //!< Driver is waiting for the EEPROM to finish a write cycle
+} EEPROM_Status;
+
+/**
+ * The possible outcomes of an operation.
+ */
+typedef enum
+{
+    EE_OK = 0,      //!< Indicates success
+    EE_BUSY,        //!< Indicates that the driver is currently busy doing a transfer
+    EE_ERROR        //!< Indicates an error condition
+} EEPROM_Error;
+
+/**
+ * Contains static configuration for the board such as populated peripherals, fitted resistor values and Ethernet MAC
+ * address, that are stored on the EEPROM.
+ */
+
+// Macros ---------------------------------------------------------------------
+
+#ifndef LOBYTE
+#define LOBYTE(x)  ((uint8_t)(x & 0x00FF))
+#endif
+#ifndef HIBYTE
+#define HIBYTE(x)  ((uint8_t)((x & 0xFF00) >> 8))
+#endif
+#define MAKE_ADDRESS(_addr, _e2)            ((uint8_t)EEPROM_M24C08_ADDR | \
+                                             ((_e2) ? EEPROM_M24C08_ADDR_E2 : 0) | \
+                                             ((uint8_t)((_addr) >> 7) & EEPROM_M24C08_BYTE_ADDR_H))
+
+// Constants ------------------------------------------------------------------
+
+/**
+ * @defgroup EEPROM_M24C08_ADDRESS M24C08 Address definitions
+ * 
+ * The address byte that is sent to an M24C08 consists of 4 parts:
+ *  + The device identifier {@link EEPROM_M24C08_ADDR} (4 bits)
+ *  + An address bit {@link EEPROM_M24C08_ADDR_E2} that is either set or not, depending on the value of the `E2` pin on
+ *    the M24C08 device
+ *  + The two most significant bits of the memory address to be read/written {@link EEPROM_M24C08_BYTE_ADDR_H}
+ *  + The standard I2C read/write bit
+ * @{
+ */
+#define EEPROM_M24C08_ADDR                  0xA0        //!< M24C08 device identifier
+#define EEPROM_M24C08_ADDR_E2               0x08        //!< M24C08 E2 address bit
+/**
+ * Bitmask for the M24C08 I2C Address bits that are used for the high byte of the memory address. The address bits are
+ * either the high byte shifted left by one or the 16 bit address shifted right by 7 and then masked.
+ */
+#define EEPROM_M24C08_BYTE_ADDR_H           0x06
+/** @} */
+
+/**
+ * Timeout in ms for I2C communication
+ */
+#define EEPROM_I2C_TIMEOUT                  0x200
+
+/**
+ * EEPROM size in bytes
+ */
+#define EEPROM_SIZE                         0x400
+
+/**
+ * Mask for the page address, a page write can only write to addresses which have the same page address
+ */
+#define EEPROM_PAGE_MASK                    0x03F0
+
+/**
+ * Page size of the EEPROM, only one page can be written at a time
+ */
+#define EEPROM_PAGE_SIZE                    0x10
+
+/**
+ * Configuration data offset, that is the first address of the configuration data space
+ */
+#define EEPROM_CONFIG_OFFSET                0
+
+/**
+ * Size of the configuration data section in bytes
+ */
+#define EEPROM_CONFIG_SIZE                  128
+
+/**
+ * Data offset, that is the first address for arbitrary data
+ */
+#define EEPROM_DATA_OFFSET                  0x80
+
+/**
+ * Size of the data section in bytes, this is the EEPROM size minus the data offset
+ */
+#define EEPROM_DATA_SIZE                    (EEPROM_SIZE - EEPROM_DATA_OFFSET)
+
+/**
+ * Size of the settings buffer in bytes
+ */
+#define EEPROM_SETTINGS_SIZE                64
+
+// Exported functions ---------------------------------------------------------
+
+
+
+// ----------------------------------------------------------------------------
+
+
+#endif /* EEPROM_H_ */

Bluecell_Src/CRC.c

@@ -9,6 +9,7 @@
 /*									CRC16	TABLE						    			 */
 /*---------------------------------------------------------------------------------------*/
 #include <CRC.h>
+#include "uart.h"
 const unsigned short Table_CRC16[]  = {
 	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
 	0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
@@ -45,7 +46,7 @@ const unsigned short Table_CRC16[]  = {
 };
 
 //-----------------------------------------------
-//UART CRC üũ ÇÔ¼ö
+//UART CRC üũ �Լ�
 //-----------------------------------------------
 unsigned short genCRC16(char *buf_ptr, int len)
 {

Bluecell_Src/PE43711.c

@@ -167,7 +167,7 @@ void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){
 void PE43711_atten_ctrl(PE43711_st ATT ,uint8_t data){
     uint8_t i = 0;
     uint8_t temp = 0;
-    data = 4 * data;
+    //data = 4 * data; // ATTEN ERROR 수정 
     temp = (uint8_t)data;
     
     HAL_GPIO_WritePin(ATT.LE_PORT,ATT.LE_PIN,GPIO_PIN_RESET);

Bluecell_Src/eeprom.c

@@ -0,0 +1,205 @@
+/*
+ * eeprom.c
+ *
+ *  Created on: 2020. 4. 22.
+ *      Author: parkyj
+ */
+#include "main.h"
+#include "eeprom.h"
+#include "Bluecell_operate.h"
+#include "stm32f1xx_hal.h"
+/* Includes ------------------------------------------------------------------*/   
+HAL_StatusTypeDef EEPROM_M24C08_ByteRead(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size);
+
+
+
+
+
+
+
+
+
+
+void EEPROM_M24C08_Init(void){
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_BASE,&Att_DL1.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+//    printf("%x\r\n",Att_DL1.Table_0_0_dBm);
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_DL1_TABLE_ADDRESDS,&Att_DL2.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_DL2_TABLE_ADDRESDS,&Att_DL3.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_DL3_TABLE_ADDRESDS,&Att_DL4.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_DL4_TABLE_ADDRESDS,&Att_UL1.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_UL1_TABLE_ADDRESDS,&Att_UL2.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_UL2_TABLE_ADDRESDS,&Att_UL3.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_UL3_TABLE_ADDRESDS,&Att_UL4.Table_0_0_dBm,sizeof(ATT_TABLE_st) );
+
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_UL4_TABLE_ADDRESDS,&Det_DL1.Table_Det5_dBm,sizeof(DET_TABLEDL_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_DL1_TABLE_ADDRESDS,&Det_DL2.Table_Det5_dBm,sizeof(DET_TABLEDL_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_DL2_TABLE_ADDRESDS,&Det_DL3.Table_Det5_dBm,sizeof(DET_TABLEDL_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_DL3_TABLE_ADDRESDS,&Det_DL4.Table_Det5_dBm,sizeof(DET_TABLEDL_st) );
+
+
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_DL4_TABLE_ADDRESDS,&Det_UL1.Table_Det_15_dBm,sizeof(DET_TABLEUL_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_UL1_TABLE_ADDRESDS,&Det_UL2.Table_Det_15_dBm,sizeof(DET_TABLEUL_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_UL2_TABLE_ADDRESDS,&Det_UL3.Table_Det_15_dBm,sizeof(DET_TABLEUL_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_UL3_TABLE_ADDRESDS,&Det_UL4.Table_Det_15_dBm,sizeof(DET_TABLEUL_st) );
+
+
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_DET_UL4_TABLE_ADDRESDS,&Temp_DL1.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_DL1_TABLE_ADDRESDS,&Temp_DL2.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_DL2_TABLE_ADDRESDS,&Temp_DL3.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_DL3_TABLE_ADDRESDS,&Temp_DL4.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+
+
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_DL4_TABLE_ADDRESDS,&Temp_UL1.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_UL1_TABLE_ADDRESDS,&Temp_UL2.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_UL2_TABLE_ADDRESDS,&Temp_UL3.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_UL3_TABLE_ADDRESDS,&Temp_UL4.Table_10_Temp,sizeof(TEMP_TABLE_st) );
+
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_TEMP_UL4_TABLE_ADDRESDS,&bluecell_Currdatastatus.bluecell_header,sizeof(BLUESTATUS_st) );
+    printf("bluecell_Currdatastatus.ATT_DL1_H : %x\r\n",bluecell_Currdatastatus.ATT_DL1_H);
+    printf("bluecell_Currdatastatus.ATT_DL1_L : %x\r\n",bluecell_Currdatastatus.ATT_DL1_L);        
+    
+    printf("EEPROM INIT COMPLETE\r\n");
+
+}
+
+
+
+
+
+
+
+
+
+
+#if 0 // PYJ.2020.04.23_BEGIN -- 
+
+
+void eepromtest(){
+    memset(&eepdata[0],0x33,100);
+    for(int i = 0; i < 100; i ++ ){
+        printf("data[%d] : %x \r\n",i,eepdata[i]);
+        EEPROM_M24C08_Bytewrite(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
+    }  
+    for(int i = 0; i < 100; i ++ ){
+        EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
+        printf("data[%d] : %x \r\n",i,eepdata[i]);
+    }  
+//    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_BASE,&eepdata[0],100);
+//    for(int i = 0; i < 100; i ++ ){
+//        printf("data[%d] : %x \r\n",i,eepdata[i]);
+//    }    
+
+}
+#endif // PYJ.2020.04.23_END -- 
+
+
+
+HAL_StatusTypeDef EEPROM_M24C08_Read(uint16_t devid,uint16_t Address,uint16_t* data,uint8_t size){
+   HAL_StatusTypeDef ret = HAL_ERROR;
+#if 0 // PYJ.2020.04.23_BEGIN -- 
+   for(uint16_t i = 0; i < size / 2; i++){
+//       ret = HAL_I2C_Mem_Read(&hi2c2, devid,(Address + (i * 2)), I2C_MEMADD_SIZE_16BIT, &data[i], 2, 512);
+
+//       printf("READdata[%d] : %x \r\n",i,data[i]);
+       if(ret == HAL_ERROR){
+         printf("Read ERR\r\n");
+       }
+     HAL_Delay(10);
+#else
+//      ret = HAL_I2C_Mem_Read(&hi2c2, devid,Address, I2C_MEMADD_SIZE_16BIT, data, size, 512);
+////       printf("READdata[%d] : %x \r\n",i,data[i]);
+//      if(ret == HAL_ERROR){
+//        printf("Read ERR\r\n");
+//      }
+//    HAL_Delay(10);
+    ret = HAL_I2C_Mem_Read(&hi2c2, devid, Address, I2C_MEMADD_SIZE_16BIT, data, size, 512);
+      if(ret == HAL_ERROR)
+            printf("Write ERR\r\n");
+
+    HAL_Delay(10);
+     return ret; 
+
+
+#endif // PYJ.2020.04.23_END -- 
+
+    return ret;   
+}
+HAL_StatusTypeDef EEPROM_M24C08_write(uint16_t devid,uint16_t Address,uint16_t* data,uint8_t size){
+    HAL_StatusTypeDef ret = HAL_ERROR;
+#if 0 // PYJ.2020.04.23_BEGIN -- 
+    for(int i = 0; i < size / 2; i++){
+        ret = HAL_I2C_Mem_Write(&hi2c2, devid,(Address + (i * 2)),  I2C_MEMADD_SIZE_16BIT, &data[i], 2, 512);
+        if(ret == HAL_ERROR)
+            printf("Write ERR\r\n");
+//        printf("Writedata[%d] : %x \r\n",i,data[i]);
+        HAL_Delay(10);
+    }
+#else
+//    ret = HAL_I2C_Mem_Write(&hi2c2, devid,Address,  I2C_MEMADD_SIZE_16BIT, data, size, 1024);
+//    if(ret == HAL_ERROR)
+//        printf("Write ERR\r\n");
+////        printf("Writedata[%d] : %x \r\n",i,data[i]);
+//    HAL_Delay(10);
+     ret = HAL_I2C_Mem_Write(&hi2c2, devid, Address,  I2C_MEMADD_SIZE_16BIT, data, size, 512);
+       if(ret == HAL_ERROR)
+             printf("Write ERR\r\n");
+
+     HAL_Delay(10);
+
+
+#endif // PYJ.2020.04.23_END -- 
+    return ret;
+}
+
+
+
+
+
+HAL_StatusTypeDef EEPROM_M24C08_ByteRead(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size){
+   HAL_StatusTypeDef ret = HAL_ERROR;
+   for(int i = 0; i < size; i++){
+     ret = HAL_I2C_Mem_Read(&hi2c2, devid, Address + i, I2C_MEMADD_SIZE_8BIT, &data[i], 1, 1024);
+       if(ret == HAL_ERROR)
+        printf("Write ERR\r\n");
+//     ret = HAL_I2C_Mem_Read_IT(&hi2c2, devid, Address + i, I2C_MEMADD_SIZE_8BIT, &data[i], 1);
+     HAL_Delay(10);
+   }
+    return ret;   
+}
+HAL_StatusTypeDef EEPROM_M24C08_Bytewrite(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size){
+    HAL_StatusTypeDef ret = HAL_ERROR;
+    for(int i = 0; i < size; i++){
+        ret = HAL_I2C_Mem_Write(&hi2c2, devid, Address + i,  I2C_MEMADD_SIZE_8BIT, &data[i], 1, 1024);
+        if(ret == HAL_ERROR)
+              printf("Write ERR\r\n");
+//        ret = HAL_I2C_Mem_Write_IT(&hi2c2, devid, Address + i, I2C_MEMADD_SIZE_8BIT, &data[i], 1);
+        HAL_Delay(7);
+    }
+    return ret;
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_crc.h

@@ -0,0 +1,184 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_crc.h
+  * @author  MCD Application Team
+  * @brief   Header file of CRC HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F1xx_HAL_CRC_H
+#define STM32F1xx_HAL_CRC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup CRC
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup CRC_Exported_Types CRC Exported Types
+  * @{
+  */
+
+/**
+  * @brief  CRC HAL State Structure definition
+  */
+typedef enum
+{
+  HAL_CRC_STATE_RESET     = 0x00U,  /*!< CRC not yet initialized or disabled */
+  HAL_CRC_STATE_READY     = 0x01U,  /*!< CRC initialized and ready for use   */
+  HAL_CRC_STATE_BUSY      = 0x02U,  /*!< CRC internal process is ongoing     */
+  HAL_CRC_STATE_TIMEOUT   = 0x03U,  /*!< CRC timeout state                   */
+  HAL_CRC_STATE_ERROR     = 0x04U   /*!< CRC error state                     */
+} HAL_CRC_StateTypeDef;
+
+
+/**
+  * @brief  CRC Handle Structure definition
+  */
+typedef struct
+{
+  CRC_TypeDef                 *Instance;   /*!< Register base address        */
+
+  HAL_LockTypeDef             Lock;        /*!< CRC Locking object           */
+
+  __IO HAL_CRC_StateTypeDef   State;       /*!< CRC communication state      */
+
+} CRC_HandleTypeDef;
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup CRC_Exported_Constants CRC Exported Constants
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup CRC_Exported_Macros CRC Exported Macros
+  * @{
+  */
+
+/** @brief Reset CRC handle state.
+  * @param  __HANDLE__ CRC handle.
+  * @retval None
+  */
+#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
+
+/**
+  * @brief  Reset CRC Data Register.
+  * @param  __HANDLE__ CRC handle
+  * @retval None
+  */
+#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
+
+/**
+  * @brief Store data in the Independent Data (ID) register.
+  * @param __HANDLE__ CRC handle
+  * @param __VALUE__  Value to be stored in the ID register
+  * @note  Refer to the Reference Manual to get the authorized __VALUE__ length in bits
+  * @retval None
+  */
+#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
+
+/**
+  * @brief Return the data stored in the Independent Data (ID) register.
+  * @param __HANDLE__ CRC handle
+  * @note  Refer to the Reference Manual to get the authorized __VALUE__ length in bits
+  * @retval Value of the ID register
+  */
+#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
+/**
+  * @}
+  */
+
+
+/* Private macros --------------------------------------------------------*/
+/** @defgroup  CRC_Private_Macros CRC Private Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup CRC_Exported_Functions CRC Exported Functions
+  * @{
+  */
+
+/* Initialization and de-initialization functions  ****************************/
+/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
+  * @{
+  */
+HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
+HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
+void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
+/**
+  * @}
+  */
+
+/* Peripheral Control functions ***********************************************/
+/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
+  * @{
+  */
+uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
+uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
+/**
+  * @}
+  */
+
+/* Peripheral State and Error functions ***************************************/
+/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
+  * @{
+  */
+HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32F1xx_HAL_CRC_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_crc.c

@@ -0,0 +1,330 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_crc.c
+  * @author  MCD Application Team
+  * @brief   CRC HAL module driver.
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the Cyclic Redundancy Check (CRC) peripheral:
+  *           + Initialization and de-initialization functions
+  *           + Peripheral Control functions
+  *           + Peripheral State functions
+  *
+  @verbatim
+ ===============================================================================
+                     ##### How to use this driver #####
+ ===============================================================================
+    [..]
+         (+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
+         (+) Initialize CRC calculator
+             (++) specify generating polynomial (peripheral default or non-default one)
+             (++) specify initialization value (peripheral default or non-default one)
+             (++) specify input data format
+             (++) specify input or output data inversion mode if any
+         (+) Use HAL_CRC_Accumulate() function to compute the CRC value of the
+             input data buffer starting with the previously computed CRC as
+             initialization value
+         (+) Use HAL_CRC_Calculate() function to compute the CRC value of the
+             input data buffer starting with the defined initialization value
+             (default or non-default) to initiate CRC calculation
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup CRC CRC
+  * @brief CRC HAL module driver.
+  * @{
+  */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup CRC_Exported_Functions CRC Exported Functions
+  * @{
+  */
+
+/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
+ *  @brief    Initialization and Configuration functions.
+ *
+@verbatim
+ ===============================================================================
+            ##### Initialization and de-initialization functions #####
+ ===============================================================================
+    [..]  This section provides functions allowing to:
+      (+) Initialize the CRC according to the specified parameters
+          in the CRC_InitTypeDef and create the associated handle
+      (+) DeInitialize the CRC peripheral
+      (+) Initialize the CRC MSP (MCU Specific Package)
+      (+) DeInitialize the CRC MSP
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Initialize the CRC according to the specified
+  *         parameters in the CRC_InitTypeDef and create the associated handle.
+  * @param  hcrc CRC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
+{
+  /* Check the CRC handle allocation */
+  if (hcrc == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameters */
+  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
+
+  if (hcrc->State == HAL_CRC_STATE_RESET)
+  {
+    /* Allocate lock resource and initialize it */
+    hcrc->Lock = HAL_UNLOCKED;
+    /* Init the low level hardware */
+    HAL_CRC_MspInit(hcrc);
+  }
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @brief  DeInitialize the CRC peripheral.
+  * @param  hcrc CRC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
+{
+  /* Check the CRC handle allocation */
+  if (hcrc == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameters */
+  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
+
+  /* Check the CRC peripheral state */
+  if (hcrc->State == HAL_CRC_STATE_BUSY)
+  {
+    return HAL_BUSY;
+  }
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_BUSY;
+
+  /* Reset CRC calculation unit */
+  __HAL_CRC_DR_RESET(hcrc);
+
+  /* Reset IDR register content */
+  CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
+
+  /* DeInit the low level hardware */
+  HAL_CRC_MspDeInit(hcrc);
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_RESET;
+
+  /* Process unlocked */
+  __HAL_UNLOCK(hcrc);
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @brief  Initializes the CRC MSP.
+  * @param  hcrc CRC handle
+  * @retval None
+  */
+__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hcrc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_CRC_MspInit can be implemented in the user file
+   */
+}
+
+/**
+  * @brief  DeInitialize the CRC MSP.
+  * @param  hcrc CRC handle
+  * @retval None
+  */
+__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hcrc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_CRC_MspDeInit can be implemented in the user file
+   */
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
+ *  @brief    management functions.
+ *
+@verbatim
+ ===============================================================================
+                      ##### Peripheral Control functions #####
+ ===============================================================================
+    [..]  This section provides functions allowing to:
+      (+) compute the 32-bit CRC value of a 32-bit data buffer
+          using combination of the previous CRC value and the new one.
+
+       [..]  or
+
+      (+) compute the 32-bit CRC value of a 32-bit data buffer
+          independently of the previous CRC value.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Compute the 32-bit CRC value of a 32-bit data buffer
+  *         starting with the previously computed CRC as initialization value.
+  * @param  hcrc CRC handle
+  * @param  pBuffer pointer to the input data buffer.
+  * @param  BufferLength input data buffer length (number of uint32_t words).
+  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
+  */
+uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
+{
+  uint32_t index;      /* CRC input data buffer index */
+  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_BUSY;
+
+  /* Enter Data to the CRC calculator */
+  for (index = 0U; index < BufferLength; index++)
+  {
+    hcrc->Instance->DR = pBuffer[index];
+  }
+  temp = hcrc->Instance->DR;
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+
+  /* Return the CRC computed value */
+  return temp;
+}
+
+/**
+  * @brief  Compute the 32-bit CRC value of a 32-bit data buffer
+  *         starting with hcrc->Instance->INIT as initialization value.
+  * @param  hcrc CRC handle
+  * @param  pBuffer pointer to the input data buffer.
+  * @param  BufferLength input data buffer length (number of uint32_t words).
+  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
+  */
+uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
+{
+  uint32_t index;      /* CRC input data buffer index */
+  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_BUSY;
+
+  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
+  *  written in hcrc->Instance->DR) */
+  __HAL_CRC_DR_RESET(hcrc);
+
+  /* Enter 32-bit input data to the CRC calculator */
+  for (index = 0U; index < BufferLength; index++)
+  {
+    hcrc->Instance->DR = pBuffer[index];
+  }
+  temp = hcrc->Instance->DR;
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+
+  /* Return the CRC computed value */
+  return temp;
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
+ *  @brief    Peripheral State functions.
+ *
+@verbatim
+ ===============================================================================
+                      ##### Peripheral State functions #####
+ ===============================================================================
+    [..]
+    This subsection permits to get in run-time the status of the peripheral.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Return the CRC handle state.
+  * @param  hcrc CRC handle
+  * @retval HAL state
+  */
+HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
+{
+  /* Return CRC handle state */
+  return hcrc->State;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+#endif /* HAL_CRC_MODULE_ENABLED */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Inc/main.h

@@ -55,8 +55,19 @@ extern "C" {
 void Error_Handler(void);
 
 /* USER CODE BEGIN EFP */
-extern uint32_t ADC1value[Bluecell_ADC1_MaxLength / 2];
-extern uint32_t ADC3value[Bluecell_ADC3_MaxLength / 2];
+extern volatile uint16_t ADC1value[4];
+extern volatile uint16_t ADC3value[5];
+extern volatile uint32_t ADC1_Average_value[4];
+extern volatile uint32_t ADC3_Average_value[5];
+
+extern uint8_t adc1cnt;
+extern uint8_t adc3cnt;
+
+extern ADC_HandleTypeDef hadc1;
+extern ADC_HandleTypeDef hadc3;
+extern I2C_HandleTypeDef hi2c2;
+
+
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/

Inc/stm32f1xx_hal_conf.h

@@ -39,7 +39,7 @@
 /*#define HAL_CAN_LEGACY_MODULE_ENABLED   */
 /*#define HAL_CEC_MODULE_ENABLED   */
 /*#define HAL_CORTEX_MODULE_ENABLED   */
-/*#define HAL_CRC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
 /*#define HAL_DAC_MODULE_ENABLED   */
 #define HAL_DMA_MODULE_ENABLED
 /*#define HAL_ETH_MODULE_ENABLED   */

STM32F103ZET_JDASMBIC.elf.launch

@@ -33,6 +33,7 @@
 <booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false" />
 <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb" />
 <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2" />
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value="" />
 <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32F103ZET_JDASMBIC.elf" />
 <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32F103ZET_JDASMBIC" />
 <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="" />
@@ -43,4 +44,5 @@
 <listEntry value="4" />
 </listAttribute>
 <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#xD;&#xA;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#xD;&#xA;" />
+<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory" />
 </launchConfiguration>

Src/main.c

@@ -27,6 +27,7 @@
 #include "PE43711.h"
 #include "uart.h"
 #include "Bluecell_operate.h"
+#include "eeprom.h"
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -49,6 +50,8 @@ ADC_HandleTypeDef hadc3;
 DMA_HandleTypeDef hdma_adc1;
 DMA_HandleTypeDef hdma_adc3;
 
+CRC_HandleTypeDef hcrc;
+
 I2C_HandleTypeDef hi2c2;
 
 TIM_HandleTypeDef htim6;
@@ -59,8 +62,11 @@ DMA_HandleTypeDef hdma_usart1_rx;
 DMA_HandleTypeDef hdma_usart1_tx;
 
 /* USER CODE BEGIN PV */
-uint32_t ADC1value[Bluecell_ADC1_MaxLength / 2] = {0,};
-uint32_t ADC3value[Bluecell_ADC3_MaxLength / 2] = {0,};
+volatile uint16_t ADC1value[4];
+volatile uint16_t ADC3value[5];
+volatile uint32_t ADC1_Average_value[4];
+volatile uint32_t ADC3_Average_value[5];
+
 volatile uint32_t AdcTimerCnt = 0;
 volatile uint32_t LedTimerCnt = 0;
 volatile uint32_t UartRxTimerCnt = 0;
@@ -77,6 +83,7 @@ static void MX_ADC1_Init(void);
 static void MX_ADC3_Init(void);
 static void MX_USART2_UART_Init(void);
 static void MX_TIM6_Init(void);
+static void MX_CRC_Init(void);
 static void MX_NVIC_Init(void);
 /* USER CODE BEGIN PFP */
 
@@ -99,6 +106,119 @@ int _write (int file, uint8_t *ptr, uint16_t len)
     HAL_UART_Transmit(&huart1, ptr, len,10);
     return len;
 }
+uint8_t adc1cnt = 0 ;
+uint8_t adc3cnt = 0 ;
+
+
+void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
+{
+//?��?��?�� 코드 ?��?��
+//만약 ?��?�� adc?���?? �???��?�� ?�� ?��?���?? ?��?���?? ?��?��?? 같이 조건�?? ?��?��
+
+    if(hadc->Instance == hadc1.Instance)
+    {
+        for(int i = 0; i < 5; i++){
+            ADC1_Average_value[i] += ADC1value[i]  ;
+        }
+        adc1cnt++;
+    }
+    if(hadc->Instance == hadc3.Instance)
+    {
+        for(int i = 0; i < 6; i++){
+            ADC3_Average_value[i] += ADC3value[i]  ;
+        }
+        adc3cnt++;
+    }
+
+}
+
+#if 0 // PYJ.2020.04.23_BEGIN -- 
+uint8_t eepdata[100];
+void eepromtest(){
+    memset(&eepdata[0],0x33,100);
+    for(int i = 0; i < 100; i ++ ){
+        printf("data[%d] : %x \r\n",i,eepdata[i]);
+        EEPROM_M24C08_Bytewrite(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
+    }  
+    for(int i = 0; i < 100; i ++ ){
+        EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
+        printf("data[%d] : %x \r\n",i,eepdata[i]);
+    }  
+//    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_BASE,&eepdata[0],100);
+//    for(int i = 0; i < 100; i ++ ){
+//        printf("data[%d] : %x \r\n",i,eepdata[i]);
+//    }    
+
+}
+uint8_t i2ctest[10] = {22,};
+uint8_t i2cTestData[1] = {44};
+#endif // PYJ.2020.04.23_END -- 
+uint16_t eepromtestarray[1024];
+uint16_t eepromtestReadarray[1024];
+uint8_t eepromtestarray1[EEPROM_WINDOW_STATUS_ADDRESDS];
+uint8_t eepromtestReadarray1[EEPROM_WINDOW_STATUS_ADDRESDS];
+
+void EEPROMTEST_J(){
+    int aa = 256;
+    for(int i = 0; i< 512; i++)
+        eepromtestarray[i] = i;
+    EEPROM_M24C08_Bytewrite(EEPROM_M24C08_ID,MAKE_ADDRESS(EEPROM_ATT_BASE     ,1),&eepromtestarray[0],0xFF);
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,MAKE_ADDRESS(EEPROM_ATT_BASE      ,1),&eepromtestReadarray[0],0xFF);
+//    EEPROM_M24C08_ByteRead(0xa0|0x01 ),MAKE_ADDRESS(EEPROM_ATT_BASE + 150,0),&eepromtestReadarray[150],150);
+    for(int i = 0; i< 128; i++)
+        printf("index [%d]: %d \r\n",i,eepromtestReadarray[i]);
+    EEPROM_M24C08_Bytewrite(EEPROM_M24C08_ID,MAKE_ADDRESS(EEPROM_ATT_BASE + aa    ,1),&eepromtestarray[128],0xFF);
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,MAKE_ADDRESS(EEPROM_ATT_BASE  + aa       ,1),&eepromtestReadarray[128],0xFF);
+    for(int i = 128; i< 256; i++)
+        printf("index [%d]: %d \r\n",i,eepromtestReadarray[i]);
+    EEPROM_M24C08_Bytewrite(EEPROM_M24C08_ID,MAKE_ADDRESS(EEPROM_ATT_BASE + aa * 2    ,1),&eepromtestarray[256],0xFF);
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,MAKE_ADDRESS(EEPROM_ATT_BASE  + aa * 2       ,1),&eepromtestReadarray[256],0xFF);
+    for(int i = 256; i< 384; i++)
+        printf("index [%d]: %d \r\n",i,eepromtestReadarray[i]);
+#if 0 // PYJ.2020.04.23_BEGIN -- 
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID ,MAKE_ADDRESS(EEPROM_ATT_DL2_TABLE_ADDRESDS,0),&eepromtestReadarray[0],EEPROM_WINDOW_STATUS_ADDRESDS);
+    for(int i = 0; i< EEPROM_WINDOW_STATUS_ADDRESDS; i++)
+        printf("%d ",eepromtestReadarray[i]);
+       printf("\r\n");    
+    EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID ,MAKE_ADDRESS(EEPROM_ATT_DL3_TABLE_ADDRESDS,0),&eepromtestReadarray[0],EEPROM_WINDOW_STATUS_ADDRESDS);
+    for(int i = 0; i< EEPROM_WINDOW_STATUS_ADDRESDS; i++)
+        printf("%d ",eepromtestReadarray[i]);
+           printf("\r\n");
+#endif // PYJ.2020.04.23_END -- 
+
+}
+#if 1 // PYJ.2020.04.23_BEGIN -- 
+void eepromtest_j1(){
+  for(int i = 0; i< 128; i++)
+      eepromtestarray[i] = i;
+
+  EEPROM_M24C08_write(EEPROM_M24C08_ID ,0,eepromtestarray,128);
+
+  EEPROM_M24C08_Read(EEPROM_M24C08_ID ,0,eepromtestReadarray,128);
+  
+   for(int i = 0; i< 128; i++)
+       printf("%d ",eepromtestReadarray[i]);
+          printf("\r\n");
+
+}
+#endif // PYJ.2020.04.23_END -- 
+#if 0 // PYJ.2020.04.23_BEGIN -- 
+void eepromtest_j1(){
+  for(int i = 0; i< 128; i++)
+        eepromtestarray[i] = i;
+
+  HAL_I2C_Mem_Write(&hi2c2,0xa0|((0x01&0x0300>>7)),(0x01&0xff),I2C_MEMADD_SIZE_16BIT,eepromtestarray,128,100);
+  HAL_Delay(10);
+  HAL_I2C_Mem_Read(&hi2c2,0xa0|((0x01&0x0300>>7)),(0x01&0xff),I2C_MEMADD_SIZE_16BIT,eepromtestReadarray,128,100);
+    for(int i = 0; i< 128; i++)
+        printf("%d ",eepromtestReadarray[i]);
+       printf("\r\n");
+
+
+}
+#endif // PYJ.2020.04.23_END -- 
+
+
 /* USER CODE END 0 */
 
 /**
@@ -136,27 +256,47 @@ int main(void)
   MX_ADC3_Init();
   MX_USART2_UART_Init();
   MX_TIM6_Init();
+  MX_CRC_Init();
 
   /* Initialize interrupts */
   MX_NVIC_Init();
   /* USER CODE BEGIN 2 */
+  while(!(HAL_ADCEx_Calibration_Start(&hadc3)==HAL_OK));
+  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
+  HAL_ADC_Start_DMA(&hadc3, (uint16_t*)ADC3value, 5);
+  HAL_ADC_Start_DMA(&hadc1, (uint16_t*)ADC1value, 4);
+
   InitUartQueue(&TerminalQueue);
   setbuf(stdout, NULL);
-  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
-  while(!(HAL_ADCEx_Calibration_Start(&hadc3)==HAL_OK));
   PE43711_PinInit();
-  HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC1value, Bluecell_ADC1_MaxLength / 2);
-  HAL_ADC_Start_DMA(&hadc3, (uint32_t*)ADC3value, Bluecell_ADC3_MaxLength / 2);
+//  EEPROM_M24C08_Init();
+//  Bluecell_DataInit();
+
+#if 0 // PYJ.2020.04.22_BEGIN -- 
+  EEPROM_M24C08_write(0xA0,0,i2cTestData,1);
+  printf("i2c Test Data1 %d\r\n",i2ctest[0]);
+  EEPROM_M24C08_Read(0xA0,0x00,i2ctest,2);
+  printf("i2c Test Data2 %d\r\n",i2ctest[0]);
+  printf("i2c Test Data2 %d\r\n",i2ctest[1]);
+#endif // PYJ.2020.04.22_END -- 
   /* USER CODE END 2 */
 
   /* Infinite loop */
   /* USER CODE BEGIN WHILE */
+    uint16_t ret = 0;
+
+//    EEPROMTEST_J();
+    
+    
+
+
+    printf("Project Start\r\n");
   while (1)
   {
 //	  HAL_GPIO_TogglePin(GPIOG,GPIO_PIN_14);
-//	  HAL_Delay(1000);
     Boot_LED_Toggle();
     Uart_Check();
+    ADC_Check();
     /* USER CODE END WHILE */
 
     /* USER CODE BEGIN 3 */
@@ -222,9 +362,6 @@ static void MX_NVIC_Init(void)
   /* DMA1_Channel5_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
   HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
-  /* ADC1_2_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
-  HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
   /* I2C2_EV_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(I2C2_EV_IRQn, 0, 0);
   HAL_NVIC_EnableIRQ(I2C2_EV_IRQn);
@@ -282,7 +419,7 @@ static void MX_ADC1_Init(void)
   */
   sConfig.Channel = ADC_CHANNEL_4;
   sConfig.Rank = ADC_REGULAR_RANK_1;
-  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
   {
     Error_Handler();
@@ -305,7 +442,7 @@ static void MX_ADC1_Init(void)
   }
   /** Configure Regular Channel 
   */
-  sConfig.Channel = ADC_CHANNEL_4;
+  sConfig.Channel = ADC_CHANNEL_12;
   sConfig.Rank = ADC_REGULAR_RANK_4;
   if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
   {
@@ -351,7 +488,7 @@ static void MX_ADC3_Init(void)
   */
   sConfig.Channel = ADC_CHANNEL_4;
   sConfig.Rank = ADC_REGULAR_RANK_1;
-  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
+  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
   if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
   {
     Error_Handler();
@@ -394,6 +531,32 @@ static void MX_ADC3_Init(void)
 
 }
 
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
 /**
   * @brief I2C2 Initialization Function
   * @param None
@@ -410,7 +573,7 @@ static void MX_I2C2_Init(void)
 
   /* USER CODE END I2C2_Init 1 */
   hi2c2.Instance = I2C2;
-  hi2c2.Init.ClockSpeed = 100000;
+  hi2c2.Init.ClockSpeed = 400000;
   hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
   hi2c2.Init.OwnAddress1 = 0;
   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;

Src/stm32f1xx_hal_msp.c

@@ -129,7 +129,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
     hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
     hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
     hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
-    hdma_adc1.Init.Mode = DMA_NORMAL;
+    hdma_adc1.Init.Mode = DMA_CIRCULAR;
     hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
     if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
     {
@@ -138,6 +138,9 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
 
     __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
 
+    /* ADC1 interrupt Init */
+    HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
   /* USER CODE BEGIN ADC1_MspInit 1 */
 
   /* USER CODE END ADC1_MspInit 1 */
@@ -171,7 +174,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
     hdma_adc3.Init.MemInc = DMA_MINC_ENABLE;
     hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
     hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
-    hdma_adc3.Init.Mode = DMA_NORMAL;
+    hdma_adc3.Init.Mode = DMA_CIRCULAR;
     hdma_adc3.Init.Priority = DMA_PRIORITY_LOW;
     if (HAL_DMA_Init(&hdma_adc3) != HAL_OK)
     {
@@ -252,6 +255,50 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
 
 }
 
+/**
+* @brief CRC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief CRC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hcrc: CRC handle pointer
+* @retval None
+*/
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+  /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+  /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+  /* USER CODE END CRC_MspDeInit 1 */
+  }
+
+}
+
 /**
 * @brief I2C MSP Initialization
 * This function configures the hardware resources used in this example