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BLUECELL BOOTLOADER 921600 속도 UPLOADE

PYJ 5 anni fa
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.mxproject


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.settings/org.eclipse.core.resources.prefs

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-eclipse.preferences.version=1
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-encoding//Bluecell_Src/Bluecell_operate.c=UTF-8

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Bluecell_Inc/Bluecell_operate.h

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-/*
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- * Bluecell_operate.h
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- *
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- *  Created on: 2020. 4. 3.
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- *      Author: YJ
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- */
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-
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-#ifndef BLUECELL_OPERATE_H_
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-#define BLUECELL_OPERATE_H_
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-
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-
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-#include <stdbool.h>
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-#include "Bluecell_operate.h"
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-/*
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-SYN
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-Sub-UID
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-R-Code
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-TR-ID
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-Seq-Num
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-TTL
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-Time
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-���� ����
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-CMD
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-Length
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-Header Checksum
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-SUB-DATA
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-SUB-DATA-CRC
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-ETX
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- */
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-
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-
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-/*
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- *
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-0	80	��ü ���� ��ȸ	��� AID �׸� ���� ���� ��û �� ���� (��û Frame�� SUB-DATA �� ���̴� 0)
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-1	81	���� ��û	���� ��û�� REQ�� 0x01 �̰� ������ ��ü ������ ���¸� ����
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-
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-10	90	Download Notification	�ٿ�ε� ����
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-11	91	Download Data	�ٿ�ε� data
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-12	92	Download Confirm	�ٿ�ε� Ȯ��
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-13	93	Download Complete	Download Complete Command
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-14	94	System-Reboot	System Rebooting Command
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-
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-40	C0	���̺� ��ȸ �� ����
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-41	C1	���̺� ���� �� ����
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-
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- *
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- *
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- */
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-typedef enum{
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-	AllDataReq = 0,      // -> Response 80
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-	DataCtrlReq,		 // -> Response 81
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-	DownNotification,    // -> Response 90
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-	DownData,            // -> Response 91
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-	DownConfirm ,        // -> Response 92
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-	DownComplete,        // -> Response 93
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-	SystemReboot,        // -> Response 94
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-
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-	TableDataReq = 40,
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-
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-}MBICBootProt_st;
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-
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-typedef enum{
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-	MBIC_PREAMBLE_0 = 0,
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-	MBIC_PREAMBLE_1,
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-	MBIC_PREAMBLE_2,
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-	MBIC_PREAMBLE_3,
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-	MBIC_SUBUID_0,
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-	MBIC_SUBUID_1,
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-	MBIC_RCODE_0,
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-	MBIC_TRID_0,
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-	MBIC_TRID_1,
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-	MBIC_SEQSUM_0, // 10byte
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-	MBIC_TTL_0,
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-	MBIC_TIME_0,
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-	MBIC_TIME_1,
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-	MBIC_TIME_2,
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-	MBIC_TIME_3,
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-	MBIC_TIME_4,
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-	MBIC_TIME_5,
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-	MBIC_ERRRESPONSE_0,
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-	MBIC_CMD_0,
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-	MBIC_LENGTH_0, // 20byte
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-	MBIC_LENGTH_1,
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-	MBIC_HEADERCHECKSUM_0,
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-	MBIC_PAYLOADSTART,
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-	/*
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-	 * PayLoadSTART
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-	 */
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-}MBICProt_st;
90
-
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-typedef enum{
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-	Alarm_Bit_List = 0xE000,
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-	Alarm_Mask,
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-	Alarm_Test_Mode,
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-	Alarm_Test_Dummy,
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-	CPU_Version,
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-	ModuleINFORMATION_null1,
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-	CPU_Current_Bank,
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-	CPU_Bank_Select_Reboot_by,
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-	CPU_Bank1_Image_Version,
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-	CPU_Bank1_Image_BuildTime,
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-	CPU_Bank1_Image_Name,
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-	CPU_Bank2_Image_Version,
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-	CPU_Bank2_Image_BuildTime,
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-	CPU_Bank2_Image_Name,
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-	SW_Reset,
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-	Factory_Set_Initialization,
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-}ModuleINFORMATION;
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-
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-typedef enum{
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-	Temperature = 0xE010,
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-	Temperature_Offset,
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-	Temp_High_Threshold,
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-	Temp_High_Threshold_Default,
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-	Temp_High_Alarm,
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-	LED_TEST,
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-	Node,
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-	Type,
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-	PCB_Version,
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-	Serial_Number,
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-	Manufacture,
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-	Manufacture_Date,
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-	ENVIRONMENT_INVENTORY_null1,
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-	Freq_ID,
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-	Carrier_ID,
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-	Carrier_ON_OFF,
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-}ENVIRONMENT_INVENTORY;
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-
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-
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-typedef enum{
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-	DLI_P1_Level= 0xE020,
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-	DLI_P2_Level,
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-	DLI_P3_Level,
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-	DLI_P4_Level,
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-	ULO_P1_Level,
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-	ULO_P2_Level,
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-	ULO_P3_Level,
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-	ULO_P4_Level,
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-}Current_Volt;
140
-typedef enum{
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-	DLI_RF_Path1_ON_OFF= 0xE030,
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-	DLI_RF_Path2_ON_OFF,
143
-	DLI_RF_Path3_ON_OFF,
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-	DLI_RF_Path4_ON_OFF,
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-	DLI_Gain_Atten1,
146
-	DLI_Gain_Atten2,
147
-	DLI_Gain_Atten3,
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-	DLI_Gain_Atten4,
149
-	DLI_Gain_Atten_Offset1,
150
-	DLI_Gain_Atten_Offset2,
151
-	DLI_Gain_Atten_Offset3,
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-	DLI_Gain_Atten_Offset4,
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-	DLI_Level_High_Threshold,
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-	DLI_Level_Low_Threshold,
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-	DLI_Level_High_Low_Threshold_default,
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-	DLI_Level,
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-}DL_Ctrl1;
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-typedef enum{
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-	DLI_Level_High_Alarm1= 0xE040,
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-	DLI_Level_High_Alarm2,
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-	DLI_Level_High_Alarm3,
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-	DLI_Level_High_Alarm4,
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-	DLI_Level_Low_Alarm1,
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-	DLI_Level_Low_Alarm2,
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-	DLI_Level_Low_Alarm3,
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-	DLI_Level_Low_Alarm4,
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-}DL_Ctrl2;
168
-typedef enum{
169
-	DLI_AGC_ON_OFF= 0xE050,
170
-	DLI_AGC_Threshold,
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-	DLI_AGC_Threshold_Default,
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-	DLI_Shutdown_ON_OFF,
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-	DLI_Shutdown_Threshold,
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-	DLI_Shutdown_Threshold_Default,
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-	DLI_Shutdown_Count,
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-	DLI_AGC_Alarm1,
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-	DLI_AGC_Alarm2,
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-	DLI_AGC_Alarm3,
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-	DLI_AGC_Alarm4,
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-	DLI_Shutdown_Alarm1,
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-	DLI_Shutdown_Alarm2,
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-	DLI_Shutdown_Alarm3,
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-	DLI_Shutdown_Alarm4,
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-}DL_Ctrl3;
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-
186
-
187
-typedef enum{
188
-	ULO_RF_Path1_ON_OFF= 0xE060,
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-	ULO_RF_Path2_ON_OFF,
190
-	ULO_RF_Path3_ON_OFF,
191
-	ULO_RF_Path4_ON_OFF,
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-	ULO_Gain_Atten1,
193
-	ULO_Gain_Atten2,
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-	ULO_Gain_Atten3,
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-	ULO_Gain_Atten4,
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-	ULO_Gain_Atten_Offset1,
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-	ULO_Gain_Atten_Offset2,
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-	ULO_Gain_Atten_Offset3,
199
-	ULO_Gain_Atten_Offset4,
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-	ULO_Level_High_Threshold,
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-	UL_Ctrl1_null1,
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-	ULO_Level_High_Threshold_default,
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-	ULO_Level,
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-
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-}UL_Ctrl1;
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-typedef enum{
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-	ULO_Level_High_Alarm1= 0xE070,
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-	ULO_Level_High_Alarm2,
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-	ULO_Level_High_Alarm3,
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-	ULO_Level_High_Alarm4,
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-
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-}UL_Ctrl2;
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-typedef enum{
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-	ULO_ALC_ON_OFF= 0xE080,
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-	ULO_ALC_Threshold,
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-	ULO_ALC_Threshold_Default,
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-	ULO_Shutdown_ON_OFF,
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-	ULO_Shutdown_Threshold,
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-	ULO_Shutdown_Threshold_Default,
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-	ULO_Shutdown_Retry_Count,
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-	ULO_ALC_Alarm1,
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-	ULO_ALC_Alarm2,
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-	ULO_ALC_Alarm3,
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-	ULO_ALC_Alarm4,
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-	ULO_Shutdown_Alarm1,
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-	ULO_Shutdown_Alarm2,
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-	ULO_Shutdown_Alarm3,
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-	ULO_Shutdown_Alarm4,
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-}UL_Ctrl3;
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-
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-
232
-
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-
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-
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-
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-#define MBIC_PREAMBLE0 0x16
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-#define MBIC_PREAMBLE1 0x16
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-#define MBIC_PREAMBLE2 0x16
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-#define MBIC_PREAMBLE3 0x16
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-#define MBIC_SUBUID0 0x00
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-#define MBIC_SUBUID1 0xF1
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-#define MBIC_RCODE
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-#define MBIC_TRID
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-#define MBIC_SEQNUM
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-#define MBIC_TTL
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-#define MBIC_TIME
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-#define MBIC_ERRRESPONSE
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-#define MBIC_CMD
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-#define MBIC_LENGTH
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-#define MBIC_CHECKSHUM
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-#define MBIC_ETX 0x03
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-
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-
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-
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-
256
-/*
257
- *
258
- *
259
- * ALARM LIST
260
- *
261
- */
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-struct Alarm_ENVIRONMENT {
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-	uint8_t ENVIRONMENT_Temp_High ;
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-	uint8_t ENVIRONMENT_Reserved0 ;
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-	uint8_t ENVIRONMENT_Reserved1 ;
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-	uint8_t ENVIRONMENT_Reserved2 ;
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-	uint8_t ENVIRONMENT_Reserved3 ;
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-	uint8_t ENVIRONMENT_Reserved4 ;
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-	uint8_t ENVIRONMENT_Reserved5 ;
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-	uint8_t ENVIRONMENT_Reserved6 ;
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-};
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-
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-
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-struct Alarm_DL {
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-	uint8_t DLI_P4_Level_Low  ;
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-	uint8_t DLI_P3_Level_Low  ;
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-	uint8_t DLI_P2_Level_Low  ;
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-	uint8_t DLI_P1_Level_Low  ;
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-	uint8_t ULO_P4_Level_High ;
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-	uint8_t ULO_P3_Level_High ;
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-	uint8_t ULO_P2_Level_High ;
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-	uint8_t ULO_P1_Level_High ;
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-	uint8_t DLI_P4_AGC_Alarm  ;
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-	uint8_t DLI_P3_AGC_Alarm  ;
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-	uint8_t DLI_P2_AGC_Alarm  ;
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-	uint8_t DLI_P1_AGC_Alarm  ;
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-	uint8_t DLI_P4_Shutdown_Alarm ;
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-	uint8_t DLI_P3_Shutdown_Alarm ;
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-	uint8_t DLI_P2_Shutdown_Alarm ;
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-	uint8_t DLI_P1_Shutdown_Alarm ;
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-};
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-struct Alarm_UL {
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-	uint8_t Reserved0         ;
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-	uint8_t Reserved1         ;
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-	uint8_t Reserved2         ;
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-	uint8_t Reserved3         ;
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-	uint8_t ULO_P4_Level_High ;
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-	uint8_t ULO_P3_Level_High ;
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-	uint8_t ULO_P2_Level_High ;
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-	uint8_t ULO_P1_Level_High ;
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-	uint8_t ULO_P4_ALC_Alarm  ;
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-	uint8_t ULO_P3_ALC_Alarm  ;
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-	uint8_t ULO_P2_ALC_Alarm  ;
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-	uint8_t ULO_P1_ALC_Alarm  ;
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-	uint8_t ULO_P4_Shutdown   ;
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-	uint8_t ULO_P3_Shutdown   ;
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-	uint8_t ULO_P2_Shutdown   ;
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-	uint8_t ULO_P1_Shutdown   ;
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-};
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-enum DATATYPE
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-{
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-    BLUECELL_SOFTWARERESET = 0,
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-	ATTSET  = 0x11,
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-	ATT_DL1_PATH = 0x12,
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-	ATT_UL1_PATH = 0x16,
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-	ATT_SelfTest1 = 0x18,
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-	ATT_DL2_PATH = 0x22,
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-	ATT_UL2_PATH = 0x26,
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-	ATT_SelfTest2 = 0x28,
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-	ATT_DL3_PATH = 0x32,
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-	ATT_UL3_PATH = 0x36,
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-	ATT_SelfTest3 = 0x38,
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-	ATT_DL4_PATH = 0x42,
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-	ATT_UL4_PATH = 0x46,
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-	ATT_SelfTest4 = 0x48,
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-	ALC1_EN = 0x51,
327
-	ALC2_EN = 0x52,
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-	ALC3_EN = 0x53,
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-	ALC4_EN = 0x54,
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-    AGC1_EN = 0x61,
331
-    AGC2_EN = 0x62,
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-    AGC3_EN = 0x63,
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-    AGC4_EN = 0x64,
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-    ATT_TableSet = 0x70,
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-    ATT_TableGet = 0x71,
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-	Bluecell_StatusReq = 0x77,
337
-	Bluecell_StatusSave = 0x78,
338
-    Bluecell_DL1_USER = 0x80,
339
-    Bluecell_DL2_USER = 0x81,
340
-    Bluecell_DL3_USER = 0x82,
341
-    Bluecell_DL4_USER = 0x83,    
342
-    Bluecell_UL1_USER = 0x84,
343
-    Bluecell_UL2_USER = 0x85,
344
-    Bluecell_UL3_USER = 0x86,
345
-    Bluecell_UL4_USER = 0x87,    
346
-    Bluecell_TEMP_USER = 0x88,    
347
-    
348
-};
349
-
350
-
351
-#define ALARM_ENVIRONMENT_FLAG 0x80
352
-#define ALARM_DL1_FLAG 0xFF
353
-#define ALARM_DL2_FLAG 0xFF
354
-#define ALARM_UL1_FLAG 0x0F
355
-#define ALARM_UL2_FLAG 0xFF
356
-
357
-typedef enum{
358
-	ENVIRONMENT = 0,
359
-	DL1,
360
-	DL2,
361
-	UL1,
362
-	UL2,
363
-	MAX_ALARM_Len,
364
-}AlarmList;
365
-
366
-
367
-typedef struct{
368
-  uint16_t m15_dBm;
369
-  uint16_t m16_dBm;
370
-  uint16_t m17_dBm;
371
-  uint16_t m18_dBm;
372
-  uint16_t m19_dBm;
373
-  uint16_t m20_dBm;
374
-  uint16_t m21_dBm;
375
-  uint16_t m22_dBm;
376
-  uint16_t m23_dBm;
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-  uint16_t m24_dBm;
378
-  uint16_t m25_dBm;
379
-  uint16_t m26_dBm;
380
-  uint16_t m27_dBm;
381
-  uint16_t m28_dBm;
382
-  uint16_t m29_dBm;
383
-  uint16_t m30_dBm;
384
-  uint16_t m31_dBm;
385
-  uint16_t m32_dBm;
386
-  uint16_t m33_dBm;
387
-  uint16_t m34_dBm;
388
-  uint16_t m35_dBm;
389
-  uint16_t m36_dBm;
390
-  uint16_t m37_dBm;
391
-  uint16_t m38_dBm;
392
-  uint16_t m39_dBm;
393
-  uint16_t m40_dBm;
394
-  uint16_t m41_dBm;
395
-  uint16_t m42_dBm;
396
-  uint16_t m43_dBm;
397
-  uint16_t m44_dBm;
398
-  uint16_t m45_dBm;
399
-  uint16_t m46_dBm;
400
-  uint16_t m47_dBm;
401
-  uint16_t m48_dBm;
402
-  uint16_t m49_dBm;
403
-  uint16_t m50_dBm;
404
-  uint16_t m51_dBm;
405
-  uint16_t m52_dBm;
406
-  uint16_t m53_dBm;
407
-  uint16_t m54_dBm;
408
-  uint16_t m55_dBm;
409
-  uint16_t m56_dBm;
410
-  uint16_t m57_dBm;
411
-  uint16_t m58_dBm;
412
-  uint16_t m59_dBm;
413
-  uint16_t m60_dBm;
414
-}DET_UL;
415
-
416
-typedef struct{
417
-  uint16_t p5_dBm;
418
-  uint16_t p4_dBm;
419
-  uint16_t p3_dBm;
420
-  uint16_t p2_dBm;
421
-  uint16_t p1_dBm;
422
-  uint16_t m0_dBm;
423
-  uint16_t m1_dBm;
424
-  uint16_t m2_dBm;
425
-  uint16_t m3_dBm;
426
-  uint16_t m4_dBm;
427
-  uint16_t m5_dBm;
428
-  uint16_t m6_dBm;
429
-  uint16_t m7_dBm;
430
-  uint16_t m8_dBm;
431
-  uint16_t m9_dBm;
432
-  uint16_t m10_dBm;
433
-  uint16_t m11_dBm;
434
-  uint16_t m12_dBm;
435
-  uint16_t m13_dBm;
436
-  uint16_t m14_dBm;
437
-  uint16_t m15_dBm;
438
-  uint16_t m16_dBm;
439
-  uint16_t m17_dBm;
440
-  uint16_t m18_dBm;
441
-  uint16_t m19_dBm;
442
-  uint16_t m20_dBm;
443
-  uint16_t m21_dBm;
444
-  uint16_t m22_dBm;
445
-  uint16_t m23_dBm;
446
-  uint16_t m24_dBm;
447
-  uint16_t m25_dBm;
448
-}DET_DL;
449
-typedef struct{
450
-    uint8_t bluecell_User_DL1_H;  uint8_t bluecell_User_DL1_L;
451
-    uint8_t bluecell_User_DL2_H;  uint8_t bluecell_User_DL2_L;
452
-    uint8_t bluecell_User_DL3_H;  uint8_t bluecell_User_DL3_L;
453
-    uint8_t bluecell_User_DL4_H;  uint8_t bluecell_User_DL4_L;
454
-    uint8_t bluecell_User_UL1_H;  uint8_t bluecell_User_UL1_L;
455
-    uint8_t bluecell_User_UL2_H;  uint8_t bluecell_User_UL2_L;
456
-    uint8_t bluecell_User_UL3_H;  uint8_t bluecell_User_UL3_L;
457
-    uint8_t bluecell_User_UL4_H;  uint8_t bluecell_User_UL4_L;
458
-}USER_ATTEN_st;
459
-
460
-typedef struct{
461
-    uint8_t bluecell_header;
462
-    uint8_t bluecell_type;
463
-    uint8_t bluecell_length;
464
-    uint8_t bluecell_crcindex;
465
-    uint8_t Selftest1;
466
-    uint8_t Selftest2;
467
-    uint8_t Selftest3;
468
-    uint8_t Selftest4;
469
-    uint8_t ATT_DL1_PATH;
470
-    uint8_t ATT_DL2_PATH;
471
-    uint8_t ATT_DL3_PATH;
472
-    uint8_t ATT_DL4_PATH;
473
-    uint8_t ATT_UL1_PATH;
474
-    uint8_t ATT_UL2_PATH;
475
-    uint8_t ATT_UL3_PATH;
476
-    uint8_t ATT_UL4_PATH;
477
-    uint8_t ATT_DL1_H;
478
-    uint8_t ATT_DL1_L;
479
-    uint8_t ATT_DL2_H;
480
-    uint8_t ATT_DL2_L;
481
-    uint8_t ATT_DL3_H;
482
-    uint8_t ATT_DL3_L;
483
-    uint8_t ATT_DL4_H;
484
-    uint8_t ATT_DL4_L;
485
-    uint8_t ATT_UL1_H;
486
-    uint8_t ATT_UL1_L;
487
-    uint8_t ATT_UL2_H;
488
-    uint8_t ATT_UL2_L;
489
-    uint8_t ATT_UL3_H;
490
-    uint8_t ATT_UL3_L;
491
-    uint8_t ATT_UL4_H;
492
-    uint8_t ATT_UL4_L;
493
-    uint8_t DET_DL1_IN_H;//ADC3   5
494
-    uint8_t DET_DL1_IN_L;//ADC3   5
495
-    uint8_t DET_DL2_IN_H;//ADC3   6 
496
-    uint8_t DET_DL2_IN_L;//ADC3   6
497
-    uint8_t DET_DL3_IN_H;//ADC3   7
498
-    uint8_t DET_DL3_IN_L;//ADC3   7
499
-    uint8_t DET_DL4_IN_H;//ADC3   8   
500
-    uint8_t DET_DL4_IN_L;//ADC3   8
501
-    uint8_t DET_UL1_IN_H;//ADC1   4  
502
-    uint8_t DET_UL1_IN_L;//ADC1   4 
503
-    uint8_t DET_UL2_IN_H;//ADC1   5 
504
-    uint8_t DET_UL2_IN_L;//ADC1   5
505
-    uint8_t DET_UL3_IN_H;//ADC1   6
506
-    uint8_t DET_UL3_IN_L;//ADC1   6
507
-    uint8_t DET_UL4_IN_H;//ADC3   4
508
-    uint8_t DET_UL4_IN_L;//ADC3   4
509
-    uint8_t DET_TEMP_H;
510
-    uint8_t DET_TEMP_L;
511
-    uint8_t ATT_AGC1_ONOFF;
512
-    uint8_t ATT_ALC1_ONOFF;
513
-    uint8_t ATT_AGC2_ONOFF;
514
-    uint8_t ATT_ALC2_ONOFF;
515
-    uint8_t ATT_AGC3_ONOFF;
516
-    uint8_t ATT_ALC3_ONOFF;
517
-    uint8_t ATT_AGC4_ONOFF;
518
-    uint8_t ATT_ALC4_ONOFF;
519
-    uint8_t ATT_ALC1_MAX_H;
520
-    uint8_t ATT_ALC1_MAX_L;
521
-    uint8_t ATT_ALC2_MAX_H;
522
-    uint8_t ATT_ALC2_MAX_L;
523
-    uint8_t ATT_ALC3_MAX_H;
524
-    uint8_t ATT_ALC3_MAX_L;
525
-    uint8_t ATT_ALC4_MAX_H;
526
-    uint8_t ATT_ALC4_MAX_L;
527
-    uint8_t ATT_ALC1_MIN_H;
528
-    uint8_t ATT_ALC1_MIN_L;
529
-    uint8_t ATT_ALC2_MIN_H;
530
-    uint8_t ATT_ALC2_MIN_L;
531
-    uint8_t ATT_ALC3_MIN_H;
532
-    uint8_t ATT_ALC3_MIN_L;
533
-    uint8_t ATT_ALC4_MIN_H;
534
-    uint8_t ATT_ALC4_MIN_L;
535
-    uint8_t bluecell_User_DL1_H;  uint8_t bluecell_User_DL1_L;
536
-    uint8_t bluecell_User_DL2_H;  uint8_t bluecell_User_DL2_L;
537
-    uint8_t bluecell_User_DL3_H;  uint8_t bluecell_User_DL3_L;
538
-    uint8_t bluecell_User_DL4_H;  uint8_t bluecell_User_DL4_L;
539
-    uint8_t bluecell_User_UL1_H;  uint8_t bluecell_User_UL1_L;
540
-    uint8_t bluecell_User_UL2_H;  uint8_t bluecell_User_UL2_L;
541
-    uint8_t bluecell_User_UL3_H;  uint8_t bluecell_User_UL3_L;
542
-    uint8_t bluecell_User_UL4_H;  uint8_t bluecell_User_UL4_L;
543
-    uint8_t bluecell_User_TEMP_H;  uint8_t bluecell_User_TEMP_L;
544
-    uint8_t bluecell_crc;
545
-    uint8_t bluecell_etx;
546
-
547
-}BLUESTATUS_st;
548
-typedef struct{
549
-  uint8_t Table_0_0_dBm_H;
550
-  uint8_t Table_0_0_dBm_L; // 1
551
-  uint8_t Table_0_5_dBm_H;
552
-  uint8_t Table_0_5_dBm_L; // 3
553
-  uint8_t Table_1_0_dBm_H;
554
-  uint8_t Table_1_0_dBm_L;//4
555
-  uint8_t Table_1_5_dBm_H;
556
-  uint8_t Table_1_5_dBm_L;//5
557
-  uint8_t Table_2_0_dBm_H;
558
-  uint8_t Table_2_0_dBm_L;//6
559
-  uint8_t Table_2_5_dBm_H;
560
-  uint8_t Table_2_5_dBm_L;
561
-  uint8_t Table_3_0_dBm_H;
562
-  uint8_t Table_3_0_dBm_L;
563
-  uint8_t Table_3_5_dBm_H;
564
-  uint8_t Table_3_5_dBm_L;
565
-  uint8_t Table_4_0_dBm_H;
566
-  uint8_t Table_4_0_dBm_L;
567
-  uint8_t Table_4_5_dBm_H;
568
-  uint8_t Table_4_5_dBm_L;
569
-  uint8_t Table_5_0_dBm_H;
570
-  uint8_t Table_5_0_dBm_L;
571
-  uint8_t Table_5_5_dBm_H;
572
-  uint8_t Table_5_5_dBm_L;
573
-  uint8_t Table_6_0_dBm_H;
574
-  uint8_t Table_6_0_dBm_L;
575
-  uint8_t Table_6_5_dBm_H;
576
-  uint8_t Table_6_5_dBm_L;
577
-  uint8_t Table_7_0_dBm_H;
578
-  uint8_t Table_7_0_dBm_L;
579
-  uint8_t Table_7_5_dBm_H;
580
-  uint8_t Table_7_5_dBm_L;
581
-  uint8_t Table_8_0_dBm_H;
582
-  uint8_t Table_8_0_dBm_L;
583
-  uint8_t Table_8_5_dBm_H;
584
-  uint8_t Table_8_5_dBm_L;
585
-  uint8_t Table_9_0_dBm_H;
586
-  uint8_t Table_9_0_dBm_L;
587
-  uint8_t Table_9_5_dBm_H;
588
-  uint8_t Table_9_5_dBm_L;
589
-  uint8_t Table_10_0_dBm_H;
590
-  uint8_t Table_10_0_dBm_L;
591
-  uint8_t Table_10_5_dBm_H;
592
-  uint8_t Table_10_5_dBm_L;
593
-  uint8_t Table_11_0_dBm_H;
594
-  uint8_t Table_11_0_dBm_L;
595
-  uint8_t Table_11_5_dBm_H;
596
-  uint8_t Table_11_5_dBm_L;
597
-  uint8_t Table_12_0_dBm_H;
598
-  uint8_t Table_12_0_dBm_L;
599
-  uint8_t Table_12_5_dBm_H;
600
-  uint8_t Table_12_5_dBm_L;
601
-  uint8_t Table_13_0_dBm_H;
602
-  uint8_t Table_13_0_dBm_L;
603
-  uint8_t Table_13_5_dBm_H;
604
-  uint8_t Table_13_5_dBm_L;
605
-  uint8_t Table_14_0_dBm_H;
606
-  uint8_t Table_14_0_dBm_L;
607
-  uint8_t Table_14_5_dBm_H;
608
-  uint8_t Table_14_5_dBm_L;
609
-  uint8_t Table_15_0_dBm_H;
610
-  uint8_t Table_15_0_dBm_L;
611
-  uint8_t Table_15_5_dBm_H;
612
-  uint8_t Table_15_5_dBm_L;
613
-  uint8_t Table_16_0_dBm_H;
614
-  uint8_t Table_16_0_dBm_L;
615
-  uint8_t Table_16_5_dBm_H;
616
-  uint8_t Table_16_5_dBm_L;
617
-  uint8_t Table_17_0_dBm_H;
618
-  uint8_t Table_17_0_dBm_L;
619
-  uint8_t Table_17_5_dBm_H;
620
-  uint8_t Table_17_5_dBm_L;
621
-  uint8_t Table_18_0_dBm_H;
622
-  uint8_t Table_18_0_dBm_L;
623
-  uint8_t Table_18_5_dBm_H;
624
-  uint8_t Table_18_5_dBm_L;
625
-  uint8_t Table_19_0_dBm_H;
626
-  uint8_t Table_19_0_dBm_L;
627
-  uint8_t Table_19_5_dBm_H;
628
-  uint8_t Table_19_5_dBm_L;
629
-  uint8_t Table_20_0_dBm_H;
630
-  uint8_t Table_20_0_dBm_L;
631
-  uint8_t Table_20_5_dBm_H;
632
-  uint8_t Table_20_5_dBm_L;
633
-  uint8_t Table_21_0_dBm_H;
634
-  uint8_t Table_21_0_dBm_L;
635
-  uint8_t Table_21_5_dBm_H;
636
-  uint8_t Table_21_5_dBm_L;
637
-  uint8_t Table_22_0_dBm_H;
638
-  uint8_t Table_22_0_dBm_L;
639
-  uint8_t Table_22_5_dBm_H;
640
-  uint8_t Table_22_5_dBm_L;
641
-  uint8_t Table_23_0_dBm_H;
642
-  uint8_t Table_23_0_dBm_L;
643
-  uint8_t Table_23_5_dBm_H;
644
-  uint8_t Table_23_5_dBm_L;
645
-  uint8_t Table_24_0_dBm_H;
646
-  uint8_t Table_24_0_dBm_L;
647
-  uint8_t Table_24_5_dBm_H;
648
-  uint8_t Table_24_5_dBm_L;
649
-  uint8_t Table_25_0_dBm_H;
650
-  uint8_t Table_25_0_dBm_L;
651
-  uint8_t Table_25_5_dBm_H;
652
-  uint8_t Table_25_5_dBm_L;
653
-  uint8_t Table_26_0_dBm_H;
654
-  uint8_t Table_26_0_dBm_L;
655
-  uint8_t Table_26_5_dBm_H;
656
-  uint8_t Table_26_5_dBm_L;
657
-  uint8_t Table_27_0_dBm_H;
658
-  uint8_t Table_27_0_dBm_L;
659
-  uint8_t Table_27_5_dBm_H;
660
-  uint8_t Table_27_5_dBm_L;
661
-  uint8_t Table_28_0_dBm_H;
662
-  uint8_t Table_28_0_dBm_L;
663
-  uint8_t Table_28_5_dBm_H;
664
-  uint8_t Table_28_5_dBm_L;
665
-  uint8_t Table_29_0_dBm_H;
666
-  uint8_t Table_29_0_dBm_L;
667
-  uint8_t Table_29_5_dBm_H;
668
-  uint8_t Table_29_5_dBm_L;
669
-  uint8_t Table_30_0_dBm_H;
670
-  uint8_t Table_30_0_dBm_L;
671
-  uint8_t Table_30_5_dBm_H;
672
-  uint8_t Table_30_5_dBm_L;
673
-  uint8_t Table_31_0_dBm_H;
674
-  uint8_t Table_31_0_dBm_L;
675
-  uint8_t Table_31_5_dBm_H;
676
-  uint8_t Table_31_5_dBm_L;
677
-}ATT_TABLE_st;
678
-typedef struct{
679
-
680
-    uint8_t Table_Det5_dBm_H	;
681
-    uint8_t Table_Det5_dBm_L	;
682
-    uint8_t Table_Det4_dBm_H	;
683
-    uint8_t Table_Det4_dBm_L	;  
684
-    uint8_t Table_Det3_dBm_H	;
685
-    uint8_t Table_Det3_dBm_L	;
686
-    uint8_t Table_Det2_dBm_H	;
687
-    uint8_t Table_Det2_dBm_L	;
688
-    uint8_t Table_Det1_dBm_H	;
689
-    uint8_t Table_Det1_dBm_L	;
690
-    uint8_t Table_Det0_dBm_H	;
691
-    uint8_t Table_Det0_dBm_L	;
692
-    uint8_t Table_Det_1_dBm_H	;
693
-    uint8_t Table_Det_1_dBm_L	;
694
-    uint8_t Table_Det_2_dBm_H	;
695
-    uint8_t Table_Det_2_dBm_L	;
696
-    uint8_t Table_Det_3_dBm_H	;
697
-    uint8_t Table_Det_3_dBm_L	;
698
-    uint8_t Table_Det_4_dBm_H	;
699
-    uint8_t Table_Det_4_dBm_L	;
700
-    uint8_t Table_Det_5_dBm_H	;
701
-    uint8_t Table_Det_5_dBm_L	;  
702
-    uint8_t Table_Det_6_dBm_H	;
703
-    uint8_t Table_Det_6_dBm_L	;  
704
-    uint8_t Table_Det_7_dBm_H	;
705
-    uint8_t Table_Det_7_dBm_L	;
706
-    uint8_t Table_Det_8_dBm_H	;
707
-    uint8_t Table_Det_8_dBm_L	;
708
-    uint8_t Table_Det_9_dBm_H	;
709
-    uint8_t Table_Det_9_dBm_L	;
710
-    uint8_t Table_Det_10_dBm_H	;
711
-    uint8_t Table_Det_10_dBm_L	;  
712
-    uint8_t Table_Det_11_dBm_H	;
713
-    uint8_t Table_Det_11_dBm_L	;
714
-    uint8_t Table_Det_12_dBm_H	;
715
-    uint8_t Table_Det_12_dBm_L	;
716
-    uint8_t Table_Det_13_dBm_H	;
717
-    uint8_t Table_Det_13_dBm_L	;
718
-    uint8_t Table_Det_14_dBm_H	;
719
-    uint8_t Table_Det_14_dBm_L	;
720
-    uint8_t Table_Det_15_dBm_H	;
721
-    uint8_t Table_Det_15_dBm_L	;
722
-    uint8_t Table_Det_16_dBm_H	;
723
-    uint8_t Table_Det_16_dBm_L	;
724
-    uint8_t Table_Det_17_dBm_H	;
725
-    uint8_t Table_Det_17_dBm_L	;
726
-    uint8_t Table_Det_18_dBm_H	;
727
-    uint8_t Table_Det_18_dBm_L	;
728
-    uint8_t Table_Det_19_dBm_H	;
729
-    uint8_t Table_Det_19_dBm_L	;
730
-    uint8_t Table_Det_20_dBm_H	;
731
-    uint8_t Table_Det_20_dBm_L	;
732
-    uint8_t Table_Det_21_dBm_H	;
733
-    uint8_t Table_Det_21_dBm_L	;
734
-    uint8_t Table_Det_22_dBm_H	;
735
-    uint8_t Table_Det_22_dBm_L	;
736
-    uint8_t Table_Det_23_dBm_H	;
737
-    uint8_t Table_Det_23_dBm_L	;
738
-    uint8_t Table_Det_24_dBm_H	;
739
-    uint8_t Table_Det_24_dBm_L	;
740
-    uint8_t Table_Det_25_dBm_H	;
741
-    uint8_t Table_Det_25_dBm_L	;
742
-}DET_TABLEDL_st;
743
-typedef struct{
744
-  uint8_t Table_Det_15_dBm_H	;   uint8_t Table_Det_15_dBm_L	;
745
-  uint8_t Table_Det_16_dBm_H	;   uint8_t Table_Det_16_dBm_L	;
746
-  uint8_t Table_Det_17_dBm_H	;   uint8_t Table_Det_17_dBm_L	;
747
-  uint8_t Table_Det_18_dBm_H	;   uint8_t Table_Det_18_dBm_L	;
748
-  uint8_t Table_Det_19_dBm_H	;   uint8_t Table_Det_19_dBm_L	;
749
-  uint8_t Table_Det_20_dBm_H	;   uint8_t Table_Det_20_dBm_L	;
750
-  uint8_t Table_Det_21_dBm_H	;   uint8_t Table_Det_21_dBm_L	;
751
-  uint8_t Table_Det_22_dBm_H	;   uint8_t Table_Det_22_dBm_L	;
752
-  uint8_t Table_Det_23_dBm_H	;   uint8_t Table_Det_23_dBm_L	;
753
-  uint8_t Table_Det_24_dBm_H	;   uint8_t Table_Det_24_dBm_L	;
754
-  uint8_t Table_Det_25_dBm_H	;   uint8_t Table_Det_25_dBm_L	;
755
-  uint8_t Table_Det_26_dBm_H	;   uint8_t Table_Det_26_dBm_L	;
756
-  uint8_t Table_Det_27_dBm_H	;   uint8_t Table_Det_27_dBm_L	;
757
-  uint8_t Table_Det_28_dBm_H	;   uint8_t Table_Det_28_dBm_L	;
758
-  uint8_t Table_Det_29_dBm_H	;   uint8_t Table_Det_29_dBm_L	;
759
-  uint8_t Table_Det_30_dBm_H	;   uint8_t Table_Det_30_dBm_L	;
760
-  uint8_t Table_Det_31_dBm_H	;   uint8_t Table_Det_31_dBm_L	;
761
-  uint8_t Table_Det_32_dBm_H	;   uint8_t Table_Det_32_dBm_L	;
762
-  uint8_t Table_Det_33_dBm_H	;   uint8_t Table_Det_33_dBm_L	;
763
-  uint8_t Table_Det_34_dBm_H	;   uint8_t Table_Det_34_dBm_L	;
764
-  uint8_t Table_Det_35_dBm_H	;   uint8_t Table_Det_35_dBm_L	;
765
-  uint8_t Table_Det_36_dBm_H	;   uint8_t Table_Det_36_dBm_L	;
766
-  uint8_t Table_Det_37_dBm_H	;   uint8_t Table_Det_37_dBm_L	;
767
-  uint8_t Table_Det_38_dBm_H	;   uint8_t Table_Det_38_dBm_L	;
768
-  uint8_t Table_Det_39_dBm_H	;   uint8_t Table_Det_39_dBm_L	;
769
-  uint8_t Table_Det_40_dBm_H	;   uint8_t Table_Det_40_dBm_L	;
770
-  uint8_t Table_Det_41_dBm_H	;   uint8_t Table_Det_41_dBm_L	;
771
-  uint8_t Table_Det_42_dBm_H	;   uint8_t Table_Det_42_dBm_L	;
772
-  uint8_t Table_Det_43_dBm_H	;   uint8_t Table_Det_43_dBm_L	;
773
-  uint8_t Table_Det_44_dBm_H	;   uint8_t Table_Det_44_dBm_L	;
774
-  uint8_t Table_Det_45_dBm_H	;   uint8_t Table_Det_45_dBm_L	;
775
-  uint8_t Table_Det_46_dBm_H	;   uint8_t Table_Det_46_dBm_L	;
776
-  uint8_t Table_Det_47_dBm_H	;   uint8_t Table_Det_47_dBm_L	;
777
-  uint8_t Table_Det_48_dBm_H	;   uint8_t Table_Det_48_dBm_L	;
778
-  uint8_t Table_Det_49_dBm_H	;   uint8_t Table_Det_49_dBm_L	;
779
-  uint8_t Table_Det_50_dBm_H	;   uint8_t Table_Det_50_dBm_L	;
780
-  uint8_t Table_Det_51_dBm_H	;   uint8_t Table_Det_51_dBm_L	;
781
-  uint8_t Table_Det_52_dBm_H	;   uint8_t Table_Det_52_dBm_L	;
782
-  uint8_t Table_Det_53_dBm_H	;   uint8_t Table_Det_53_dBm_L	;
783
-  uint8_t Table_Det_54_dBm_H	;   uint8_t Table_Det_54_dBm_L	;
784
-  uint8_t Table_Det_55_dBm_H	;   uint8_t Table_Det_55_dBm_L	;
785
-  uint8_t Table_Det_56_dBm_H	;   uint8_t Table_Det_56_dBm_L	;
786
-  uint8_t Table_Det_57_dBm_H	;   uint8_t Table_Det_57_dBm_L	;
787
-  uint8_t Table_Det_58_dBm_H	;   uint8_t Table_Det_58_dBm_L	;
788
-  uint8_t Table_Det_59_dBm_H	;   uint8_t Table_Det_59_dBm_L	;
789
-  uint8_t Table_Det_60_dBm_H	;   uint8_t Table_Det_60_dBm_L	;
790
-}DET_TABLEUL_st;
791
-
792
-typedef struct{
793
-
794
-  uint8_t Table_10_Temp_H;   uint8_t Table_10_Temp_L;
795
-  uint8_t Table_15_Temp_H;   uint8_t Table_15_Temp_L;
796
-  uint8_t Table_20_Temp_H;   uint8_t Table_20_Temp_L;
797
-  uint8_t Table_25_Temp_H;   uint8_t Table_25_Temp_L;
798
-  uint8_t Table_30_Temp_H;   uint8_t Table_30_Temp_L;
799
-  uint8_t Table_35_Temp_H;   uint8_t Table_35_Temp_L;
800
-  uint8_t Table_40_Temp_H;   uint8_t Table_40_Temp_L;
801
-  uint8_t Table_45_Temp_H;   uint8_t Table_45_Temp_L;
802
-  uint8_t Table_50_Temp_H;   uint8_t Table_50_Temp_L;
803
-  uint8_t Table_55_Temp_H;   uint8_t Table_55_Temp_L;
804
-}TEMP_TABLE_st;
805
-typedef enum{
806
-  Bluecell_DET_UL1_ADC_INDEX_H = 0,
807
-  Bluecell_DET_UL1_ADC_INDEX_L,
808
-  Bluecell_DET_UL2_ADC_INDEX_H,
809
-  Bluecell_DET_UL2_ADC_INDEX_L,
810
-  Bluecell_DET_UL3_ADC_INDEX_H,
811
-  Bluecell_DET_UL3_ADC_INDEX_L,
812
-  Bluecell_RFU_TEMP_ADC_INDEX_H,
813
-  Bluecell_RFU_TEMP_ADC_INDEX_L,
814
-  Bluecell_ADC1_MaxLength,
815
-}Bluecell_ADC1_Index;
816
-typedef enum{
817
-  Bluecell_DET_UL4_ADC_INDEX_H = Bluecell_ADC1_MaxLength,
818
-  Bluecell_DET_UL4_ADC_INDEX_L,
819
-  Bluecell_DET_DL1_ADC_INDEX_H,
820
-  Bluecell_DET_DL1_ADC_INDEX_L,
821
-  Bluecell_DET_DL2_ADC_INDEX_H,
822
-  Bluecell_DET_DL2_ADC_INDEX_L,
823
-  Bluecell_DET_DL3_ADC_INDEX_H,
824
-  Bluecell_DET_DL3_ADC_INDEX_L,
825
-  Bluecell_DET_DL4_ADC_INDEX_H,
826
-  Bluecell_DET_DL4_ADC_INDEX_L,
827
-  Bluecell_ADC3_MaxLength,
828
-}Bluecell_ADC3_Index;
829
-#define ADC1_EA Bluecell_ADC1_MaxLength /2
830
-#define ADC3_EA Bluecell_ADC3_MaxLength /2
831
-
832
-
833
-extern ATT_TABLE_st Att_DL1;
834
-extern ATT_TABLE_st Att_DL2;
835
-extern ATT_TABLE_st Att_DL3;
836
-extern ATT_TABLE_st Att_DL4;
837
-extern ATT_TABLE_st Att_UL1;
838
-extern ATT_TABLE_st Att_UL2;
839
-extern ATT_TABLE_st Att_UL3;
840
-extern ATT_TABLE_st Att_UL4;
841
-
842
-extern DET_TABLEDL_st Det_DL1;
843
-extern DET_TABLEDL_st Det_DL2;
844
-extern DET_TABLEDL_st Det_DL3;
845
-extern DET_TABLEDL_st Det_DL4;
846
-
847
-extern DET_TABLEUL_st Det_UL1;
848
-extern DET_TABLEUL_st Det_UL2;
849
-extern DET_TABLEUL_st Det_UL3;
850
-extern DET_TABLEUL_st Det_UL4;
851
-
852
-extern TEMP_TABLE_st Temp_DL1;
853
-extern TEMP_TABLE_st Temp_DL2;
854
-extern TEMP_TABLE_st Temp_DL3;
855
-extern TEMP_TABLE_st Temp_DL4;
856
-
857
-extern TEMP_TABLE_st Temp_UL1;
858
-extern TEMP_TABLE_st Temp_UL2;
859
-extern TEMP_TABLE_st Temp_UL3;
860
-extern TEMP_TABLE_st Temp_UL4;
861
-
862
-extern BLUESTATUS_st bluecell_Currdatastatus;
863
-extern USER_ATTEN_st bluecell_UserData;
864
-extern volatile uint32_t ALCTimerCnt;
865
-extern volatile uint32_t AGCTimerCnt;
866
-
867
-
868
-
869
-extern void Bluecell_DataInit();
870
-extern void ALC_Function();
871
-extern void AGC_Function();
872
-
873
-
874
-#endif /* BLUECELL_OPERATE_H_ */

+ 0 - 51
Bluecell_Inc/PE43711.h

@@ -1,51 +0,0 @@
1
-/*
2
- * PE43711.h
3
- *
4
- *  Created on: 2019. 6. 28.
5
- *      Author: parkyj
6
- */
7
-
8
-#ifndef PE43711_H_
9
-#define PE43711_H_
10
-#include "main.h"
11
- void PE43711_PinInit(void);
12
- uint8_t PE43711_DataToHexConvert(double val);
13
-
14
-
15
- typedef struct{
16
-    GPIO_TypeDef * CLK_PORT;
17
-    uint16_t CLK_PIN;
18
-
19
-    GPIO_TypeDef *DATA_PORT;
20
-    uint16_t DATA_PIN;
21
-
22
-    GPIO_TypeDef *LE_PORT;
23
-    uint16_t LE_PIN;
24
- }PE43711_st;
25
- 
26
- typedef struct{
27
-   PE43711_st ATT_DL1;
28
-   uint8_t    data_DL1;
29
-   PE43711_st ATT_UL1;
30
-   uint8_t    data_UL1;
31
-   
32
-   PE43711_st ATT_DL2;
33
-   uint8_t    data_DL2;
34
-   PE43711_st ATT_UL2;
35
-   uint8_t    data_UL2;
36
-   
37
-   PE43711_st ATT_DL3;
38
-   uint8_t    data_DL3;
39
-   PE43711_st ATT_UL3;
40
-   uint8_t    data_UL3;
41
-   
42
-   PE43711_st ATT_DL4;
43
-   uint8_t    data_DL4;
44
-   PE43711_st ATT_UL4;
45
-   uint8_t    data_UL4;
46
- }ALL_PE43711_st;
47
-extern ALL_PE43711_st ALL_ATT;
48
-
49
-
50
-
51
-#endif /* PE43711_H_ */

+ 0 - 224
Bluecell_Inc/eeprom.h

@@ -1,224 +0,0 @@
1
-/*
2
- * eeprom.h
3
- *
4
- *  Created on: 2020. 4. 22.
5
- *      Author: parkyj
6
- */
7
-
8
-#ifndef EEPROM_H_
9
-#define EEPROM_H_
10
-
11
-
12
-#define EEPROM_M24C08_ID                  0xA0
13
-#define EEPROM_Block0_ADDRESS             EEPROM_M24C08_ID
14
-#define EEPROM_ATT_BASE					  0x0000
15
-
16
-#if 1 // PYJ.2020.04.25_BEGIN -- 
17
-#define EEPROM_WINDOW_STATUS_ADDRESDS	 ((EEPROM_ATT_BASE + (sizeof(BLUESTATUS_st) + 2)) & 0xFFFF) //96byte
18
-#define EEPROM_ATT_DL1_TABLE_ADDRESDS	 (( EEPROM_WINDOW_STATUS_ADDRESDS  + (sizeof(ATT_TABLE_st))  )& 0xFFFF) //128
19
-#define EEPROM_ATT_DL2_TABLE_ADDRESDS	 (( EEPROM_ATT_DL1_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  ) & 0xFFFF) 
20
-#define EEPROM_ATT_DL3_TABLE_ADDRESDS	 (( EEPROM_ATT_DL2_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  ) & 0xFFFF)
21
-#define EEPROM_ATT_DL4_TABLE_ADDRESDS	 (( EEPROM_ATT_DL3_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  ) & 0xFFFF)
22
-#define EEPROM_ATT_UL1_TABLE_ADDRESDS	 (( EEPROM_ATT_DL4_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)
23
-#define EEPROM_ATT_UL2_TABLE_ADDRESDS	 (( EEPROM_ATT_UL1_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)
24
-#define EEPROM_ATT_UL3_TABLE_ADDRESDS	 (( EEPROM_ATT_UL2_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)
25
-#define EEPROM_ATT_UL4_TABLE_ADDRESDS	 (( EEPROM_ATT_UL3_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)//128
26
-#define EEPROM_DET_DL1_TABLE_ADDRESDS	 (( EEPROM_ATT_UL4_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)+ 2))    & 0xFFFF)
27
-#define EEPROM_DET_DL2_TABLE_ADDRESDS	 (( EEPROM_DET_DL1_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)+ 2))    & 0xFFFF)
28
-#define EEPROM_DET_DL3_TABLE_ADDRESDS	 (( EEPROM_DET_DL2_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)+ 2))    & 0xFFFF)
29
-#define EEPROM_DET_DL4_TABLE_ADDRESDS	 (( EEPROM_DET_DL3_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)+ 2))    & 0xFFFF)
30
-#define EEPROM_DET_UL1_TABLE_ADDRESDS	 (( EEPROM_DET_DL4_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st) + 4))     & 0xFFFF)
31
-#define EEPROM_DET_UL2_TABLE_ADDRESDS	 (( EEPROM_DET_UL1_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st)+ 4))     & 0xFFFF)
32
-#define EEPROM_DET_UL3_TABLE_ADDRESDS	 (( EEPROM_DET_UL2_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st)+ 4))     & 0xFFFF)
33
-#define EEPROM_DET_UL4_TABLE_ADDRESDS	 (( EEPROM_DET_UL3_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st)+ 4))     & 0xFFFF)
34
-#define EEPROM_TEMP_DL1_TABLE_ADDRESDS	 (( EEPROM_DET_UL4_TABLE_ADDRESDS  + (sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
35
-#define EEPROM_TEMP_DL2_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL1_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
36
-#define EEPROM_TEMP_DL3_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL2_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
37
-#define EEPROM_TEMP_DL4_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL3_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
38
-#define EEPROM_TEMP_UL1_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL4_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
39
-#define EEPROM_TEMP_UL2_TABLE_ADDRESDS	 (( EEPROM_TEMP_UL1_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
40
-#define EEPROM_TEMP_UL3_TABLE_ADDRESDS	 (( EEPROM_TEMP_UL2_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
41
-#define EEPROM_TEMP_UL4_TABLE_ADDRESDS	 (( EEPROM_TEMP_UL3_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)+12))     & 0xFFFF)
42
-#define EEPROM_USER_ATTEN_VALUE_ADDRESDS (( EEPROM_TEMP_UL4_TABLE_ADDRESDS +( sizeof(USER_ATTEN_st)+16))     & 0xFFFF)
43
-
44
-#else
45
-#define EEPROM_WINDOW_STATUS_ADDRESDS	 ((EEPROM_ATT_BASE + (sizeof(BLUESTATUS_st))) & 0xFFFF) //96byte
46
-#define EEPROM_ATT_DL1_TABLE_ADDRESDS	 (( EEPROM_WINDOW_STATUS_ADDRESDS  + (sizeof(ATT_TABLE_st))  )& 0xFFFF) //128
47
-#define EEPROM_ATT_DL2_TABLE_ADDRESDS	 (( EEPROM_ATT_DL1_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  ) & 0xFFFF) 
48
-#define EEPROM_ATT_DL3_TABLE_ADDRESDS	 (( EEPROM_ATT_DL2_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  ) & 0xFFFF)
49
-#define EEPROM_ATT_DL4_TABLE_ADDRESDS	 (( EEPROM_ATT_DL3_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  ) & 0xFFFF)
50
-#define EEPROM_ATT_UL1_TABLE_ADDRESDS	 (( EEPROM_ATT_DL4_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)
51
-#define EEPROM_ATT_UL2_TABLE_ADDRESDS	 (( EEPROM_ATT_UL1_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)
52
-#define EEPROM_ATT_UL3_TABLE_ADDRESDS	 (( EEPROM_ATT_UL2_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)
53
-#define EEPROM_ATT_UL4_TABLE_ADDRESDS	 (( EEPROM_ATT_UL3_TABLE_ADDRESDS  + (sizeof(ATT_TABLE_st))  )    & 0xFFFF)//128
54
-#define EEPROM_DET_DL1_TABLE_ADDRESDS	 (( EEPROM_ATT_UL4_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)))    & 0xFFFF)
55
-#define EEPROM_DET_DL2_TABLE_ADDRESDS	 (( EEPROM_DET_DL1_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)))    & 0xFFFF)
56
-#define EEPROM_DET_DL3_TABLE_ADDRESDS	 (( EEPROM_DET_DL2_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)))    & 0xFFFF)
57
-#define EEPROM_DET_DL4_TABLE_ADDRESDS	 (( EEPROM_DET_DL3_TABLE_ADDRESDS  + (sizeof(DET_TABLEDL_st)))    & 0xFFFF)
58
-#define EEPROM_DET_UL1_TABLE_ADDRESDS	 (( EEPROM_DET_DL4_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st)))     & 0xFFFF)
59
-#define EEPROM_DET_UL2_TABLE_ADDRESDS	 (( EEPROM_DET_UL1_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st)))     & 0xFFFF)
60
-#define EEPROM_DET_UL3_TABLE_ADDRESDS	 (( EEPROM_DET_UL2_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st)))     & 0xFFFF)
61
-#define EEPROM_DET_UL4_TABLE_ADDRESDS	 (( EEPROM_DET_UL3_TABLE_ADDRESDS  + (sizeof(DET_TABLEUL_st)))     & 0xFFFF)
62
-#define EEPROM_TEMP_DL1_TABLE_ADDRESDS	 (( EEPROM_DET_UL4_TABLE_ADDRESDS  + (sizeof(TEMP_TABLE_st)))     & 0xFFFF)
63
-#define EEPROM_TEMP_DL2_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL1_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)))     & 0xFFFF)
64
-#define EEPROM_TEMP_DL3_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL2_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)))     & 0xFFFF)
65
-#define EEPROM_TEMP_DL4_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL3_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)))     & 0xFFFF)
66
-#define EEPROM_TEMP_UL1_TABLE_ADDRESDS	 (( EEPROM_TEMP_DL4_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)))     & 0xFFFF)
67
-#define EEPROM_TEMP_UL2_TABLE_ADDRESDS	 (( EEPROM_TEMP_UL1_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)))     & 0xFFFF)
68
-#define EEPROM_TEMP_UL3_TABLE_ADDRESDS	 (( EEPROM_TEMP_UL2_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)))     & 0xFFFF)
69
-#define EEPROM_TEMP_UL4_TABLE_ADDRESDS	 (( EEPROM_TEMP_UL3_TABLE_ADDRESDS +( sizeof(TEMP_TABLE_st)))     & 0xFFFF)
70
-
71
-#endif // PYJ.2020.04.25_END -- 
72
-
73
-
74
-
75
-#define MAKE_ADDRESS(_addr, _e2)            ((uint8_t)EEPROM_M24C08_ADDR | \
76
-                                             ((_e2) ? EEPROM_M24C08_ADDR_E2 : 0) | \
77
-                                             ((uint8_t)((_addr) >> 7) & EEPROM_M24C08_BYTE_ADDR_H))
78
-
79
-#define EEPROM_M24C08_ADDR                  0xA0        //!< M24C08 device identifier
80
-#define EEPROM_M24C08_ADDR_E2               0x08        //!< M24C08 E2 address bit
81
-
82
-
83
-
84
-
85
-#define EEPROM_M24C08_BYTE_ADDR_H           0x06
86
-
87
-HAL_StatusTypeDef EEPROM_M24C08_Read(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size);
88
-HAL_StatusTypeDef EEPROM_M24C08_write(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size);
89
-
90
-HAL_StatusTypeDef EEPROM_M24C08_ByteRead(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size);
91
-HAL_StatusTypeDef EEPROM_M24C08_Bytewrite(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size);
92
-
93
-void EEPROM_M24C08_Init(void);
94
-
95
-
96
-
97
-
98
-
99
-
100
-
101
-
102
-
103
-
104
-
105
-
106
-
107
-
108
-
109
-// Exported type definitions --------------------------------------------------
110
-/**
111
- * The possible states the EEPROM driver can be in.
112
- */
113
-typedef enum
114
-{
115
-    EE_UNINIT = 0,      //!< Driver has not been initialized
116
-    EE_IDLE,            //!< Driver has been initialized and is ready to start a transfer
117
-    EE_FINISH,          //!< Driver has finished with a transfer
118
-    EE_READ,            //!< Driver is doing a read operation
119
-    EE_WRITE_SEND,      //!< Driver is writing data
120
-    EE_WRITE_WAIT       //!< Driver is waiting for the EEPROM to finish a write cycle
121
-} EEPROM_Status;
122
-
123
-/**
124
- * The possible outcomes of an operation.
125
- */
126
-typedef enum
127
-{
128
-    EE_OK = 0,      //!< Indicates success
129
-    EE_BUSY,        //!< Indicates that the driver is currently busy doing a transfer
130
-    EE_ERROR        //!< Indicates an error condition
131
-} EEPROM_Error;
132
-
133
-/**
134
- * Contains static configuration for the board such as populated peripherals, fitted resistor values and Ethernet MAC
135
- * address, that are stored on the EEPROM.
136
- */
137
-
138
-// Macros ---------------------------------------------------------------------
139
-
140
-#ifndef LOBYTE
141
-#define LOBYTE(x)  ((uint8_t)(x & 0x00FF))
142
-#endif
143
-#ifndef HIBYTE
144
-#define HIBYTE(x)  ((uint8_t)((x & 0xFF00) >> 8))
145
-#endif
146
-#define MAKE_ADDRESS(_addr, _e2)            ((uint8_t)EEPROM_M24C08_ADDR | \
147
-                                             ((_e2) ? EEPROM_M24C08_ADDR_E2 : 0) | \
148
-                                             ((uint8_t)((_addr) >> 7) & EEPROM_M24C08_BYTE_ADDR_H))
149
-
150
-// Constants ------------------------------------------------------------------
151
-
152
-/**
153
- * @defgroup EEPROM_M24C08_ADDRESS M24C08 Address definitions
154
- * 
155
- * The address byte that is sent to an M24C08 consists of 4 parts:
156
- *  + The device identifier {@link EEPROM_M24C08_ADDR} (4 bits)
157
- *  + An address bit {@link EEPROM_M24C08_ADDR_E2} that is either set or not, depending on the value of the `E2` pin on
158
- *    the M24C08 device
159
- *  + The two most significant bits of the memory address to be read/written {@link EEPROM_M24C08_BYTE_ADDR_H}
160
- *  + The standard I2C read/write bit
161
- * @{
162
- */
163
-#define EEPROM_M24C08_ADDR                  0xA0        //!< M24C08 device identifier
164
-#define EEPROM_M24C08_ADDR_E2               0x08        //!< M24C08 E2 address bit
165
-/**
166
- * Bitmask for the M24C08 I2C Address bits that are used for the high byte of the memory address. The address bits are
167
- * either the high byte shifted left by one or the 16 bit address shifted right by 7 and then masked.
168
- */
169
-#define EEPROM_M24C08_BYTE_ADDR_H           0x06
170
-/** @} */
171
-
172
-/**
173
- * Timeout in ms for I2C communication
174
- */
175
-#define EEPROM_I2C_TIMEOUT                  0x200
176
-
177
-/**
178
- * EEPROM size in bytes
179
- */
180
-#define EEPROM_SIZE                         0x400
181
-
182
-/**
183
- * Mask for the page address, a page write can only write to addresses which have the same page address
184
- */
185
-#define EEPROM_PAGE_MASK                    0x03F0
186
-
187
-/**
188
- * Page size of the EEPROM, only one page can be written at a time
189
- */
190
-#define EEPROM_PAGE_SIZE                    0x10
191
-
192
-/**
193
- * Configuration data offset, that is the first address of the configuration data space
194
- */
195
-#define EEPROM_CONFIG_OFFSET                0
196
-
197
-/**
198
- * Size of the configuration data section in bytes
199
- */
200
-#define EEPROM_CONFIG_SIZE                  128
201
-
202
-/**
203
- * Data offset, that is the first address for arbitrary data
204
- */
205
-#define EEPROM_DATA_OFFSET                  0x80
206
-
207
-/**
208
- * Size of the data section in bytes, this is the EEPROM size minus the data offset
209
- */
210
-#define EEPROM_DATA_SIZE                    (EEPROM_SIZE - EEPROM_DATA_OFFSET)
211
-
212
-/**
213
- * Size of the settings buffer in bytes
214
- */
215
-#define EEPROM_SETTINGS_SIZE                64
216
-
217
-// Exported functions ---------------------------------------------------------
218
-
219
-
220
-
221
-// ----------------------------------------------------------------------------
222
-
223
-
224
-#endif /* EEPROM_H_ */

File diff suppressed because it is too large
+ 0 - 1935
Bluecell_Src/Bluecell_operate.c


+ 0 - 196
Bluecell_Src/PE43711.c

@@ -1,196 +0,0 @@
1
-/*
2
- * PE43711.c
3
- *
4
- *  Created on: 2019. 6. 28.
5
- *      Author: parkyj
6
- */
7
- #include "PE43711.h"
8
-#if 1 // PYJ.2019.07.26_BEGIN -- 
9
-#define ATTEN_Initial_Val 0
10
-extern void Pol_Delay_us(volatile uint32_t microseconds);
11
-void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT);
12
-
13
-void PE43711_atten_ctrl(PE43711_st ATT ,uint8_t data);
14
-
15
-
16
-ALL_PE43711_st ALL_ATT;
17
-
18
-PE43711_st ATT_DL1 ={
19
-    ATT_CLOCK1_GPIO_Port,
20
-    ATT_CLOCK1_Pin,
21
-    ATT_DATA1_GPIO_Port,
22
-    ATT_DATA1_Pin,
23
-    ATT_EN_DL1_GPIO_Port,
24
-    ATT_EN_DL1_Pin,
25
-}; 
26
-PE43711_st ATT_UL1 ={
27
-    ATT_CLOCK1_GPIO_Port,
28
-    ATT_CLOCK1_Pin,
29
-    ATT_DATA1_GPIO_Port,
30
-    ATT_DATA1_Pin,
31
-    ATT_EN_UL1_GPIO_Port,
32
-    ATT_EN_UL1_Pin,
33
-}; 
34
-PE43711_st ATT_DL2 ={
35
-    ATT_CLOCK2_GPIO_Port,
36
-    ATT_CLOCK2_Pin,
37
-    ATT_DATA2_GPIO_Port,
38
-    ATT_DATA2_Pin,
39
-    ATT_EN_DL2_GPIO_Port,
40
-    ATT_EN_DL2_Pin,
41
-}; 
42
-PE43711_st ATT_UL2 ={
43
-    ATT_CLOCK2_GPIO_Port,
44
-    ATT_CLOCK2_Pin,
45
-    ATT_DATA2_GPIO_Port,
46
-    ATT_DATA2_Pin,
47
-    ATT_EN_UL2_GPIO_Port,
48
-    ATT_EN_UL2_Pin,
49
-}; PE43711_st ATT_DL3 ={
50
-    ATT_CLOCK3_GPIO_Port,
51
-    ATT_CLOCK3_Pin,
52
-    ATT_DATA3_GPIO_Port,
53
-    ATT_DATA3_Pin,
54
-    ATT_EN_DL3_GPIO_Port,
55
-    ATT_EN_DL3_Pin,
56
-}; 
57
-PE43711_st ATT_UL3 ={
58
-    ATT_CLOCK3_GPIO_Port,
59
-    ATT_CLOCK3_Pin,
60
-    ATT_DATA3_GPIO_Port,
61
-    ATT_DATA3_Pin,
62
-    ATT_EN_UL3_GPIO_Port,
63
-    ATT_EN_UL3_Pin,
64
-}; PE43711_st ATT_DL4 ={
65
-    ATT_CLOCK4_GPIO_Port,
66
-    ATT_CLOCK4_Pin,
67
-    ATT_DATA4_GPIO_Port,
68
-    ATT_DATA4_Pin,
69
-    ATT_EN_DL4_GPIO_Port,
70
-    ATT_EN_DL4_Pin,
71
-}; 
72
-PE43711_st ATT_UL4 ={
73
-    ATT_CLOCK4_GPIO_Port,
74
-    ATT_CLOCK4_Pin,
75
-    ATT_DATA4_GPIO_Port,
76
-    ATT_DATA4_Pin,
77
-    ATT_EN_UL4_GPIO_Port,
78
-    ATT_EN_UL4_Pin,
79
-}; 
80
-
81
-
82
-void PE43711_PinInit(void){
83
-  ALL_ATT.ATT_DL1 = ATT_DL1;
84
-  ALL_ATT.ATT_UL1 = ATT_UL1;
85
-  
86
-  ALL_ATT.ATT_DL2 = ATT_DL2;
87
-  ALL_ATT.ATT_UL2 = ATT_UL2;
88
-  
89
-  ALL_ATT.ATT_DL3 = ATT_DL3;
90
-  ALL_ATT.ATT_UL3 = ATT_UL3;
91
-  
92
-  ALL_ATT.ATT_DL4 = ATT_DL4;
93
-  ALL_ATT.ATT_UL4 = ATT_UL4;
94
-  ALL_ATT.data_DL1 = ATTEN_Initial_Val;
95
-  ALL_ATT.data_UL1 = ATTEN_Initial_Val;  
96
-  ALL_ATT.data_DL2 = ATTEN_Initial_Val;
97
-  ALL_ATT.data_UL2 = ATTEN_Initial_Val;  
98
-  ALL_ATT.data_DL3 = ATTEN_Initial_Val;
99
-  ALL_ATT.data_UL3 = ATTEN_Initial_Val;  
100
-  ALL_ATT.data_DL4 = ATTEN_Initial_Val;
101
-  ALL_ATT.data_UL4 = ATTEN_Initial_Val;  
102
-//  PE43711_ALL_atten_ctrl(ALL_ATT);
103
-}
104
-#endif // PYJ.2019.07.26_END -- 
105
-void Bit_Compare(PE43711_st ATT,uint8_t data,uint8_t Shift_Index){
106
-    if(data & (0x01 << Shift_Index)){
107
-        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_SET);//DATA
108
-    }
109
-    else{
110
-        HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
111
-    }
112
-}
113
-
114
-uint8_t PE43711_DataToHexConvert(double val){
115
-	double ref = 16;
116
-	uint8_t ret = 0,shift = 0x40;
117
-
118
-//    printf("val : %f \r\n",val);
119
-    
120
-	for(int i = 0; i < 8; i++){
121
-		if(val == 0)
122
-			break;
123
-
124
-		if(val < 31.25){
125
-            if(val >= ref){
126
-    			val -= ref;
127
-                ret |= shift;
128
-//                printf("ret : %x \r\n",ret);
129
-            }
130
-            ref /= 2;
131
-		}
132
-		else{
133
-			ret =  0b01111111;
134
-            break;
135
-		}
136
-        shift >>= 1;
137
-	}
138
-//    printf("\r\nPE43711_DataToHexConvert Result : %x\r\n",ret);
139
-    
140
-	return ret;
141
-}
142
-
143
-#if 0 // PYJ.2020.04.17_BEGIN -- 
144
-void PE43711_ALL_atten_ctrl(ALL_PE43711_st ATT){
145
-    HAL_GPIO_WritePin(ATT.ATT_DL1.LE_PORT,ATT.ATT_DL1.LE_PIN,GPIO_PIN_RESET);
146
-    
147
-    Pol_Delay_us(10);
148
-//    printf("why not? \r\n");
149
-    for(uint8_t i = 0; i < 8; i++){
150
-      Bit_Compare(ATT.ATT0,ATT.data0,i);
151
-      Bit_Compare(ATT.ATT1,ATT.data1,i);
152
-      Bit_Compare(ATT.ATT2,ATT.data2,i);
153
-      Bit_Compare(ATT.ATT3,ATT.data3,i);
154
-      Bit_Compare(ATT.ATT4,ATT.data4,i);
155
-      Bit_Compare(ATT.ATT5,ATT.data5,i);
156
-  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_SET);//CLOCK
157
-  		Pol_Delay_us(10);
158
-  		HAL_GPIO_WritePin(ATT.ATT0.CLK_PORT,ATT.ATT0.CLK_PIN,GPIO_PIN_RESET);//CLOCK
159
-    }
160
-    HAL_GPIO_WritePin(GPIOB,GPIO_PIN_15,GPIO_PIN_RESET);//DATA
161
-    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_SET);//LE
162
-    Pol_Delay_us(10);
163
-    HAL_GPIO_WritePin(ATT.ATT0.LE_PORT,ATT.ATT0.LE_PIN,GPIO_PIN_RESET);
164
-}
165
-#endif // PYJ.2020.04.17_END -- 
166
-
167
-void PE43711_atten_ctrl(PE43711_st ATT ,uint8_t data){
168
-    uint8_t i = 0;
169
-    uint8_t temp = 0;
170
-    //data = 4 * data; // ATTEN ERROR 수정 
171
-    temp = (uint8_t)data;
172
-    
173
-    HAL_GPIO_WritePin(ATT.LE_PORT,ATT.LE_PIN,GPIO_PIN_RESET);
174
-    Pol_Delay_us(10);
175
-    for(i = 0; i < 8; i++){
176
-        if((uint8_t)temp & 0x01){
177
-           HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_SET);//DATA
178
-        }
179
-           else{
180
-           HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
181
-           }
182
-
183
-		HAL_GPIO_WritePin(ATT.CLK_PORT,ATT.CLK_PIN,GPIO_PIN_SET);//CLOCK
184
-		Pol_Delay_us(10);
185
-		HAL_GPIO_WritePin(ATT.CLK_PORT,ATT.CLK_PIN,GPIO_PIN_RESET);//CLOCK
186
-		Pol_Delay_us(10);
187
-		temp >>= 1;
188
-    }
189
-    
190
-	HAL_GPIO_WritePin(ATT.CLK_PORT,ATT.CLK_PIN,GPIO_PIN_RESET);//CLOCK
191
-    HAL_GPIO_WritePin(ATT.DATA_PORT,ATT.DATA_PIN,GPIO_PIN_RESET);//DATA
192
-    HAL_Delay(5);
193
-    HAL_GPIO_WritePin(ATT.LE_PORT,ATT.LE_PIN,GPIO_PIN_SET);//LE
194
-    Pol_Delay_us(10);
195
-    HAL_GPIO_WritePin(ATT.LE_PORT,ATT.LE_PIN,GPIO_PIN_RESET);
196
-}

+ 0 - 512
Bluecell_Src/eeprom.c

@@ -1,512 +0,0 @@
1
-/*
2
- * eeprom.c
3
- *
4
- *  Created on: 2020. 4. 22.
5
- *      Author: parkyj
6
- */
7
-#include "main.h"
8
-#include "eeprom.h"
9
-#include "Bluecell_operate.h"
10
-#include "stm32f1xx_hal.h"
11
-#include "stm32f1xx_hal_gpio.h"
12
-
13
-/* Includes ------------------------------------------------------------------*/   
14
-HAL_StatusTypeDef EEPROM_M24C08_ByteRead(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size);
15
-
16
-
17
-
18
-unsigned char E2promWriteByte( uint16_t addr, uint8_t data );
19
-
20
-/////////////////////////////////////////////////////////////
21
-
22
-unsigned char E2promReadByte( uint16_t addr );
23
-
24
-
25
-bool		EEPROM24XX_Save(uint16_t Address,void *data,size_t size_of_data);
26
-bool		EEPROM24XX_Load(uint16_t Address,void *data,size_t size_of_data);
27
-
28
-
29
-
30
-
31
-
32
-void EEPROM_M24C08_Init(void){
33
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_BASE,&bluecell_Currdatastatus.bluecell_header,sizeof(BLUESTATUS_st) );
34
-    
35
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_WINDOW_STATUS_ADDRESDS,&Att_DL1.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
36
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_DL1_TABLE_ADDRESDS,&Att_DL2.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
37
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_DL2_TABLE_ADDRESDS,&Att_DL3.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
38
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_DL3_TABLE_ADDRESDS,&Att_DL4.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
39
-
40
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_DL4_TABLE_ADDRESDS,&Att_UL1.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
41
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_UL1_TABLE_ADDRESDS,&Att_UL2.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
42
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_UL2_TABLE_ADDRESDS,&Att_UL3.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
43
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_UL3_TABLE_ADDRESDS,&Att_UL4.Table_0_0_dBm_H,sizeof(ATT_TABLE_st) );
44
-
45
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_UL4_TABLE_ADDRESDS,&Det_DL1.Table_Det5_dBm_H,sizeof(DET_TABLEDL_st) );
46
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_DL1_TABLE_ADDRESDS,&Det_DL2.Table_Det5_dBm_H,sizeof(DET_TABLEDL_st) );
47
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_DL2_TABLE_ADDRESDS,&Det_DL3.Table_Det5_dBm_H,sizeof(DET_TABLEDL_st) );
48
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_DL3_TABLE_ADDRESDS,&Det_DL4.Table_Det5_dBm_H,sizeof(DET_TABLEDL_st) );
49
-
50
-
51
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_DL4_TABLE_ADDRESDS,&Det_UL1.Table_Det_15_dBm_H,sizeof(DET_TABLEUL_st) );
52
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_UL1_TABLE_ADDRESDS,&Det_UL2.Table_Det_15_dBm_H,sizeof(DET_TABLEUL_st) );
53
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_UL2_TABLE_ADDRESDS,&Det_UL3.Table_Det_15_dBm_H,sizeof(DET_TABLEUL_st) );
54
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_UL3_TABLE_ADDRESDS,&Det_UL4.Table_Det_15_dBm_H,sizeof(DET_TABLEUL_st) );
55
-
56
-
57
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_DET_UL4_TABLE_ADDRESDS,&Temp_DL1.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
58
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_TEMP_DL1_TABLE_ADDRESDS,&Temp_DL2.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
59
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_TEMP_DL2_TABLE_ADDRESDS,&Temp_DL3.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
60
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_TEMP_DL3_TABLE_ADDRESDS,&Temp_DL4.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
61
-
62
-
63
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_TEMP_DL4_TABLE_ADDRESDS,&Temp_UL1.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
64
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_TEMP_UL1_TABLE_ADDRESDS,&Temp_UL2.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
65
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_TEMP_UL2_TABLE_ADDRESDS,&Temp_UL3.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
66
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_TEMP_UL3_TABLE_ADDRESDS,&Temp_UL4.Table_10_Temp_H,sizeof(TEMP_TABLE_st) );
67
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_USER_ATTEN_VALUE_ADDRESDS,&bluecell_UserData.bluecell_User_DL1_H,sizeof(USER_ATTEN_st) );
68
-
69
-
70
-
71
-    
72
-//    printf("bluecell_Currdatastatus.ATT_DL1_H : %x\r\n",bluecell_Currdatastatus.ATT_DL1_H);
73
-//    printf("bluecell_Currdatastatus.ATT_DL1_L : %x\r\n",bluecell_Currdatastatus.ATT_DL1_L);        
74
-//    
75
-    printf("EEPROM INIT COMPLETE\r\n");
76
-
77
-}
78
-
79
-
80
-
81
-
82
-
83
-
84
-
85
-
86
-
87
-
88
-#if 0 // PYJ.2020.04.23_BEGIN -- 
89
-
90
-
91
-void eepromtest(){
92
-    memset(&eepdata[0],0x33,100);
93
-    for(int i = 0; i < 100; i ++ ){
94
-        printf("data[%d] : %x \r\n",i,eepdata[i]);
95
-        EEPROM_M24C08_Bytewrite(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
96
-    }  
97
-    for(int i = 0; i < 100; i ++ ){
98
-        EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
99
-        printf("data[%d] : %x \r\n",i,eepdata[i]);
100
-    }  
101
-//    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_BASE,&eepdata[0],100);
102
-//    for(int i = 0; i < 100; i ++ ){
103
-//        printf("data[%d] : %x \r\n",i,eepdata[i]);
104
-//    }    
105
-
106
-}
107
-#endif // PYJ.2020.04.23_END -- 
108
-
109
-#define MAXEEPROM_LENG 32
110
-
111
-HAL_StatusTypeDef EEPROM_M24C08_Read(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size){
112
-   HAL_StatusTypeDef ret = HAL_ERROR;
113
-   uint16_t sizecnt = 0,sizeremain = 0; 
114
-   uint16_t addrees_inc = 0;
115
-//   ret = HAL_I2C_Mem_Read(&hi2c2, devid | ((Address & 0x0300) >> 7),((Address )),  I2C_MEMADD_SIZE_8BIT, &data[0], size, 1024);
116
-
117
-   ret = HAL_I2C_Mem_Read(&hi2c2, devid ,((Address )),  I2C_MEMADD_SIZE_16BIT, &data[0], size, 1024);
118
-//      EEPROM24XX_Load( Address,data, size);
119
-
120
-      if(ret == HAL_ERROR)
121
-            printf("Write ERR\r\n");
122
-        else
123
-        HAL_Delay(20);
124
-
125
-    return ret;   
126
-}
127
-HAL_StatusTypeDef EEPROM_M24C08_write(uint8_t devid,uint16_t Address,uint8_t* data,uint16_t size){
128
-    HAL_StatusTypeDef ret = HAL_ERROR;
129
-    uint8_t sizecnt = 0,sizeremain = 0; 
130
-    uint16_t addrees_inc = 0;
131
-    sizecnt = size /MAXEEPROM_LENG;
132
-    sizeremain = size % MAXEEPROM_LENG;
133
-    addrees_inc = 0;
134
-#if 0 // PYJ.2020.04.25_BEGIN -- 
135
-       for(int i = 0 ; i <sizecnt; i++ ){
136
-            addrees_inc = i * 16;
137
-            ret = HAL_I2C_Mem_Write(&hi2c2, devid | (((Address  + addrees_inc) & 0x0300) >> 7),((Address + addrees_inc)) ,  I2C_MEMADD_SIZE_8BIT, &data[addrees_inc], 16, 1024);
138
-            if(ret == HAL_ERROR)
139
-                printf("Write ERR\r\n");
140
-            else
141
-                HAL_Delay(20);
142
-       }
143
-       addrees_inc += 16;
144
-           ret = HAL_I2C_Mem_Write(&hi2c2, devid | (((Address  + addrees_inc) & 0x0300) >> 7),((Address + addrees_inc)) ,  I2C_MEMADD_SIZE_8BIT, &data[addrees_inc], sizeremain, 1024);
145
-            //       EEPROM24XX_Save( Address,data, size);
146
-            if(ret == HAL_ERROR)
147
-                printf("Write ERR\r\n");
148
-            else
149
-                HAL_Delay(20);
150
-#else
151
-//    printf("size : %d sizecnt = %d sizeremain : %d\r\n",size,sizecnt,sizeremain);
152
-    if(sizecnt > 0){
153
-        for(int i = 0 ; i < sizecnt; i++ ){
154
-             addrees_inc = i * MAXEEPROM_LENG;
155
-             ret = HAL_I2C_Mem_Write(&hi2c2, devid  ,((Address + addrees_inc) & 0xFFFF) ,  I2C_MEMADD_SIZE_16BIT, &data[addrees_inc], MAXEEPROM_LENG, 1024);
156
-
157
-             if(ret == HAL_ERROR)
158
-                 printf("Write ERR\r\n");
159
-             else
160
-                 HAL_Delay(20);
161
-        }
162
-        addrees_inc += MAXEEPROM_LENG;
163
-    }
164
-
165
-//    printf("Remain Data Index : %d \r\n",sizeremain);
166
-    
167
-    if(sizeremain > 0){
168
-         printf("Remain Data Write Start ");
169
-        for(int i = 0; i < sizeremain; i++){
170
-            ret = HAL_I2C_Mem_Write(&hi2c2, devid  ,((Address + addrees_inc + i)& 0xFFFF) ,  I2C_MEMADD_SIZE_16BIT, &data[addrees_inc + i], 1, 1024);
171
-         //       EEPROM24XX_Save( Address,data, size);
172
-         if(ret == HAL_ERROR)
173
-             printf("Write ERR\r\n");
174
-         else
175
-             HAL_Delay(20);
176
-        }
177
-    }
178
-
179
-#endif // PYJ.2020.04.25_END -- 
180
-    return ret;
181
-}
182
-
183
-
184
-
185
-
186
-
187
-HAL_StatusTypeDef EEPROM_M24C08_ByteRead(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size){
188
-   HAL_StatusTypeDef ret = HAL_ERROR;
189
-#if 0 // PYJ.2020.04.24_BEGIN -- 
190
-   for(int i = 0; i < size; i++){
191
-     ret = HAL_I2C_Mem_Read(&hi2c2, devid, Address + i, I2C_MEMADD_SIZE_8BIT, &data[i], 1, 1024);
192
-//     ret = HAL_I2C_Mem_Read(&hi2c2, devid|(((Address + i)&0x0700>>7)),((Address + i)&0xff),  I2C_MEMADD_SIZE_16BIT, &data[i], 1, 1024);     
193
-       if(ret == HAL_ERROR)
194
-        printf("Write ERR\r\n");
195
-//     ret = HAL_I2C_Mem_Read_IT(&hi2c2, devid, Address + i, I2C_MEMADD_SIZE_8BIT, &data[i], 1);
196
-     HAL_Delay(10);
197
-   }
198
-#endif // PYJ.2020.04.24_END -- 
199
-    return ret;   
200
-}
201
-uint8_t I2CWrite[1024];
202
-HAL_StatusTypeDef EEPROM_M24C08_Bytewrite(uint16_t devid,uint16_t Address,uint8_t* data,uint8_t size){
203
-    HAL_StatusTypeDef ret = HAL_ERROR;
204
-#if 0 // PYJ.2020.04.24_BEGIN -- 
205
-
206
-    for(int i = 0; i < size; i++){
207
-        ret = HAL_I2C_Mem_Write(&hi2c2, devid, Address + i,  I2C_MEMADD_SIZE_8BIT, &data[i], 1, 1024);
208
-//        ret = HAL_I2C_Mem_Write(&hi2c2, devid|(((Address + i)&0x0700>>7)),((Address + i)&0xff),  I2C_MEMADD_SIZE_16BIT, &data[i], 1, 1024);
209
-
210
-        if(ret == HAL_ERROR)
211
-            printf("Write ERR\r\n");
212
-        else
213
-            HAL_Delay(7);
214
-//        ret = HAL_I2C_Mem_Write_IT(&hi2c2, devid, Address + i, I2C_MEMADD_SIZE_8BIT, &data[i], 1);
215
-    }
216
-#endif // PYJ.2020.04.24_END -- 
217
-    return ret;
218
-}
219
-
220
-
221
-
222
-
223
-#define _EEPROM_SIZE_KBIT 8
224
-
225
-bool EEPROM24XX_IsConnected(void)
226
-{
227
-	#if	(_EEPROM_USE_WP_PIN==1)
228
-	#endif
229
-	if(HAL_I2C_IsDeviceReady(&hi2c2,0xa0,1,100)==HAL_OK)
230
-		return true;
231
-	else
232
-		return false;	
233
-}
234
-//##########################################################################
235
-bool		EEPROM24XX_Save(uint16_t Address,void *data,size_t size_of_data)
236
-{
237
-	#if ((_EEPROM_SIZE_KBIT==1) || (_EEPROM_SIZE_KBIT==2))
238
-	if(size_of_data > 8)
239
-		return false;
240
-	#elif ((_EEPROM_SIZE_KBIT==4) || (_EEPROM_SIZE_KBIT==8) || (_EEPROM_SIZE_KBIT==16))
241
-	if(size_of_data > 16)
242
-		return false;
243
-	#else 
244
-	if(size_of_data > 32)
245
-		return false;
246
-	#endif
247
-	
248
-	#if	(_EEPROM_USE_WP_PIN==1)
249
-	HAL_GPIO_WritePin(_EEPROM_WP_GPIO,_EEPROM_WP_PIN,GPIO_PIN_RESET);
250
-	#endif
251
-	
252
-	#if ((_EEPROM_SIZE_KBIT==1) || (_EEPROM_SIZE_KBIT==2))
253
-	if(HAL_I2C_Mem_Write(&hi2c2,0xa0,Address,I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
254
-	#elif	(_EEPROM_SIZE_KBIT==4)
255
-	if(HAL_I2C_Mem_Write(&hi2c2,0xa0|((Address&0x0100>>7)),(Address&0xff),I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
256
-	#elif	(_EEPROM_SIZE_KBIT==8)
257
-	if(HAL_I2C_Mem_Write(&hi2c2,0xa0|((Address&0x0300>>7)),(Address&0xff),I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
258
-	#elif	(_EEPROM_SIZE_KBIT==16)
259
-	if(HAL_I2C_Mem_Write(&hi2c2,0xa0|((Address&0x0700>>7)),(Address&0xff),I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)		
260
-	#else
261
-	if(HAL_I2C_Mem_Write(&hi2c2,0xa0,Address,I2C_MEMADD_SIZE_16BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
262
-	#endif
263
-	{
264
-		HAL_Delay(7);
265
-	}
266
-	else
267
-	{
268
-	}
269
-}
270
-//##########################################################################
271
-bool		EEPROM24XX_Load(uint16_t Address,void *data,size_t size_of_data)
272
-{
273
-	#if	(_EEPROM_USE_WP_PIN==1)
274
-	HAL_GPIO_WritePin(_EEPROM_WP_GPIO,_EEPROM_WP_PIN,GPIO_PIN_SET);
275
-	#endif
276
-	#if ((_EEPROM_SIZE_KBIT==1) || (_EEPROM_SIZE_KBIT==2))
277
-	if(HAL_I2C_Mem_Read(&hi2c2,0xa0,Address,I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
278
-	#elif (_EEPROM_SIZE_KBIT==4)
279
-	if(HAL_I2C_Mem_Read(&hi2c2,0xa0|((Address&0x0100>>7)),(Address&0xff),I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
280
-	#elif (_EEPROM_SIZE_KBIT==8)
281
-	if(HAL_I2C_Mem_Read(&hi2c2,0xa0|((Address&0x0300>>7)),(Address&0xff),I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
282
-	#elif (_EEPROM_SIZE_KBIT==16)
283
-	if(HAL_I2C_Mem_Read(&hi2c2,0xa0|((Address&0x0700>>7)),(Address&0xff),I2C_MEMADD_SIZE_8BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
284
-	#else
285
-	if(HAL_I2C_Mem_Read(&hi2c2,0xa0,Address,I2C_MEMADD_SIZE_16BIT,(uint8_t*)data,size_of_data,100) == HAL_OK)
286
-	#endif
287
-		return true;
288
-	else
289
-		return false;		
290
-}
291
-
292
-
293
-
294
-
295
-
296
-
297
-
298
-
299
-// EEPROM 24lcXXX 
300
-/// ST에서 제공하는 I2C 소스는 뭘 해도 안된다.. 내가 잘못한건지 뭔지 참..
301
-/// while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_MODE_SELECT)); ??????????
302
-/// 중국애들?이 제공하는 소스로 하니 바로 되버리는 이 현상은 뭘까...
303
-///////////////////////// 
304
-///// i2c gpio 직접 제어 코드..
305
-
306
-#define E2PROM_SDA EEPROM_SCL_Pin
307
-#define E2PROM_SCL EEPROM_SDA_Pin
308
-
309
-#define E2PROM_CMD_WRITE 0xA0
310
-#define E2PROM_CMD_READ 0xA1
311
-#define I2C_PageSize     16
312
-
313
-void I2CStart( void )
314
-{
315
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SDA ,GPIO_PIN_SET );
316
-  HAL_Delay(10);
317
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SCL,GPIO_PIN_SET );
318
-  HAL_Delay(10);
319
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SDA,GPIO_PIN_RESET );
320
-  HAL_Delay(10);
321
-
322
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SCL ,GPIO_PIN_RESET);
323
-}
324
-
325
-
326
-void I2CStop( void )
327
-{
328
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SDA,GPIO_PIN_RESET );
329
-  HAL_Delay(10);
330
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SCL ,GPIO_PIN_SET);
331
-  HAL_Delay(10);
332
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SDA ,GPIO_PIN_SET);
333
-  HAL_Delay(10);
334
-
335
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SCL,GPIO_PIN_RESET );
336
-}
337
-
338
-
339
-unsigned char I2CSlaveAck( void )
340
-{
341
-  GPIO_InitTypeDef GPIO_InitStruct;
342
-  unsigned int TimeOut;
343
-  unsigned char RetValue;
344
-
345
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;  /*?里一定要?成?入上拉,否?不能?出?据*/
346
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
347
-  GPIO_InitStruct.Pin = E2PROM_SDA;
348
-
349
-
350
-  
351
-  HAL_GPIO_Init( GPIOB, &GPIO_InitStruct );
352
-
353
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SCL,GPIO_PIN_SET );
354
-  TimeOut = 10000;
355
-  while( TimeOut-- > 0 )
356
-  {
357
-    if( SET == HAL_GPIO_ReadPin( GPIOB, E2PROM_SDA ) )
358
-    {
359
-      RetValue = RESET;
360
-      break;
361
-    }
362
-    else
363
-    {
364
-      RetValue = SET;
365
-    }
366
-  }
367
-  HAL_GPIO_WritePin( GPIOB, E2PROM_SCL,GPIO_PIN_RESET );
368
-  
369
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
370
-  HAL_GPIO_Init( GPIOB, &GPIO_InitStruct );
371
-  return RetValue;
372
-}
373
-
374
-void I2CWriteByte( unsigned char byte )
375
-{
376
-  unsigned char i;
377
-
378
-  for( i=0; i<8; i++ )
379
-  {
380
-    if( 0X80 & byte )
381
-      HAL_GPIO_WritePin( GPIOB, E2PROM_SDA ,GPIO_PIN_SET);
382
-    else
383
-      HAL_GPIO_WritePin( GPIOB, E2PROM_SDA,GPIO_PIN_RESET );
384
-    byte <<= 1;
385
-    HAL_Delay(10);
386
-
387
-    HAL_GPIO_WritePin( GPIOB, E2PROM_SCL ,GPIO_PIN_SET);
388
-    HAL_Delay(10);
389
-    HAL_GPIO_WritePin( GPIOB, E2PROM_SCL,GPIO_PIN_RESET );
390
-    HAL_Delay(10);
391
-  }
392
-}
393
-
394
-
395
-unsigned char I2CReadByte( void )
396
-{
397
-  unsigned char i;
398
-  unsigned char ReadValue = 0;
399
-  GPIO_InitTypeDef GPIO_InitStruct;
400
-  unsigned char bit;
401
-
402
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;  
403
-  GPIO_InitStruct.Pin = E2PROM_SDA;
404
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
405
-  HAL_GPIO_Init( GPIOB, &GPIO_InitStruct );
406
-  for( i=0; i<8; i++ )
407
-  {
408
-    HAL_GPIO_WritePin( GPIOB, E2PROM_SCL ,GPIO_PIN_SET);
409
-    HAL_Delay(10);
410
-    if( SET == HAL_GPIO_ReadPin( GPIOB, E2PROM_SDA ) )
411
-      bit = 0X01;
412
-    else
413
-      bit = 0x00;
414
-      
415
-    ReadValue = (ReadValue<<1)|bit;
416
-    HAL_GPIO_WritePin( GPIOB, E2PROM_SCL,GPIO_PIN_RESET );
417
-    HAL_Delay(10);
418
-  }
419
-
420
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
421
-  HAL_GPIO_Init( GPIOB, &GPIO_InitStruct );
422
-  return ReadValue;
423
-}
424
-
425
-
426
-unsigned char E2promWriteByte( uint16_t addr, uint8_t data )
427
-{
428
-
429
-  I2CStart();
430
-
431
-  I2CWriteByte( E2PROM_CMD_WRITE );
432
-  if( RESET == I2CSlaveAck() )
433
-  {
434
-    return RESET;
435
-  }
436
-
437
-  I2CWriteByte((unsigned char)(addr>>8));
438
-  if( RESET == I2CSlaveAck() )
439
-  {
440
-    return RESET;
441
-  }
442
-  I2CWriteByte((uint8_t)(addr));
443
-  if( RESET == I2CSlaveAck() )
444
-  {
445
-    return RESET;
446
-  }
447
-
448
-  I2CWriteByte( data );
449
-  if( RESET == I2CSlaveAck() )
450
-  {
451
-    return RESET;
452
-  }
453
-  I2CStop();
454
-  //asm("CPSIE I");  //?中?
455
-
456
-  return SET;
457
-}
458
-
459
-/////////////////////////////////////////////////////////////
460
-
461
-unsigned char E2promReadByte( uint16_t addr )
462
-{
463
-  unsigned char ReadValue;
464
-
465
-  I2CStart();
466
-
467
-  I2CWriteByte( E2PROM_CMD_WRITE );
468
-  if( RESET == I2CSlaveAck() )
469
-  {
470
-    return RESET;
471
-  }
472
-
473
-  I2CWriteByte((unsigned char)(addr>>8));
474
-  if( RESET == I2CSlaveAck() )
475
-  {
476
-    return RESET;
477
-  }
478
-  I2CWriteByte((uint8_t)(addr));
479
-  if( RESET == I2CSlaveAck() )
480
-  {
481
-    return RESET;
482
-  }
483
-
484
-  I2CStart();
485
-  I2CWriteByte( E2PROM_CMD_READ );
486
-  if( RESET == I2CSlaveAck() )
487
-  {
488
-    return RESET;
489
-  }
490
-  ReadValue = I2CReadByte();
491
-  I2CStop();
492
-
493
-  return ReadValue;  
494
-}
495
-
496
- 
497
-
498
-  
499
-
500
-
501
-
502
-
503
-
504
-
505
-
506
-
507
-
508
-
509
-
510
-
511
-
512
-

+ 0 - 114
Bluecell_Src/uart.c

@@ -1,114 +0,0 @@
1
-/*
2
- * uart.c
3
- *
4
- *  Created on: 2019. 5. 27.
5
- *      Author: parkyj
6
- */
7
-#include <stdio.h>
8
-#include "main.h"
9
-#include "uart.h"
10
-
11
-#include "string.h"
12
-#include "Bluecell_operate.h"
13
-
14
-
15
-
16
-UARTQUEUE TerminalQueue;
17
-UARTQUEUE WifiQueue;
18
-uart_hal_tx_type uart_hal_tx;
19
-extern volatile uint32_t UartRxTimerCnt;
20
-extern bool Bluecell_Operate(uint8_t* data);
21
-void InitUartQueue(pUARTQUEUE pQueue)
22
-{
23
-  setbuf(stdout, NULL);
24
-  pQueue->data = pQueue->head = pQueue->tail = 0;
25
-  uart_hal_tx.output_p = uart_hal_tx.input_p = 0;
26
-  if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
27
-  {
28
-    //_Error_Handler(__FILE__, __LINE__);
29
-  }
30
-  //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
31
-  //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
32
-}
33
-
34
-void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
35
-{
36
-    pUARTQUEUE pQueue;
37
-   // printf("Function : %s : \r\n",__func__);
38
-    UartRxTimerCnt = 0;
39
-    pQueue = &TerminalQueue;
40
-    pQueue->head++;
41
-    if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0;
42
-    pQueue->data++;
43
-    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
44
-        GetDataFromUartQueue(huart);
45
-    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
46
-   // Set_UartRcv(true);
47
-}
48
-
49
-
50
-
51
-void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data)
52
-{
53
-    pUARTQUEUE pQueue = &TerminalQueue;
54
-    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
55
-        GetDataFromUartQueue(huart);
56
-    pQueue->Buffer[pQueue->head++] = data;
57
-    if (pQueue->head == QUEUE_BUFFER_LENGTH) pQueue->head = 0;
58
-    pQueue->data++;
59
-   // HAL_UART_Receive_DMA(&hTerminal,  pQueue->Buffer + pQueue->head, 10);
60
-}
61
-
62
-volatile uint8_t uart_buf[QUEUE_BUFFER_LENGTH];
63
-void GetDataFromUartQueue(UART_HandleTypeDef *huart)
64
-{
65
-    volatile static int cnt;
66
-
67
-    
68
-//    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
69
-//    UART_HandleTypeDef *dst = &hTerminal;
70
-    pUARTQUEUE pQueue = &TerminalQueue;
71
-//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
72
-//    {
73
-//       _Error_Handler(__FILE__, __LINE__);
74
-//    }
75
-    uart_buf[cnt++] = *(pQueue->Buffer + pQueue->tail); 
76
-#ifdef DEBUG_PRINT
77
-    printf("%02x ",*(pQueue->Buffer + pQueue->tail)) ;
78
-#endif /* DEBUG_PRINT */
79
-
80
-    pQueue->tail++;
81
-    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
82
-    pQueue->data--;
83
-    
84
-    if(pQueue->data == 0){
85
-//        printf("data cnt zero !!!  \r\n");
86
-        //RF_Ctrl_Main(&uart_buf[Header]);
87
-//        HAL_UART_Transmit(dst, &temp_buf[BLUECELL_HEADER00], 11, 3000);
88
-#if 0 // PYJ.2019.07.15_BEGIN --
89
-            for(int i = 0; i < cnt; i++){
90
-                printf("%02x ",uart_buf[i]);
91
-            }
92
-            printf("CNT : %d",cnt);
93
-#endif // PYJ.2019.07.15_END --
94
-            if(uart_buf[0] == 0xbe){
95
-            	Bluecell_Operate(uart_buf);
96
-            }else{
97
-
98
-            }
99
-        memset(uart_buf,0x00,cnt);
100
-//        for(int i  = 0; i < cnt; i++)
101
-//            uart_buf[i] = 0;
102
-        cnt = 0;
103
-        HAL_Delay(1);
104
-    }
105
-
106
-}
107
-void Uart_Check(void){
108
-  while (TerminalQueue.data > 0 && UartRxTimerCnt > 100) GetDataFromUartQueue(&hTerminal);
109
-}
110
-
111
-void Uart1_Data_Send(uint8_t* data,uint8_t size){
112
-    HAL_UART_Transmit_DMA(&huart1, data,size); 
113
-}
114
-

File diff suppressed because it is too large
+ 0 - 1003
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h


+ 0 - 710
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h

@@ -1,710 +0,0 @@
1
-/**
2
-  ******************************************************************************
3
-  * @file    stm32f1xx_hal_adc_ex.h
4
-  * @author  MCD Application Team
5
-  * @brief   Header file of ADC HAL extension module.
6
-  ******************************************************************************
7
-  * @attention
8
-  *
9
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10
-  * All rights reserved.</center></h2>
11
-  *
12
-  * This software component is licensed by ST under BSD 3-Clause license,
13
-  * the "License"; You may not use this file except in compliance with the
14
-  * License. You may obtain a copy of the License at:
15
-  *                        opensource.org/licenses/BSD-3-Clause
16
-  *
17
-  ******************************************************************************
18
-  */
19
-
20
-/* Define to prevent recursive inclusion -------------------------------------*/
21
-#ifndef __STM32F1xx_HAL_ADC_EX_H
22
-#define __STM32F1xx_HAL_ADC_EX_H
23
-
24
-#ifdef __cplusplus
25
- extern "C" {
26
-#endif
27
-
28
-/* Includes ------------------------------------------------------------------*/
29
-#include "stm32f1xx_hal_def.h"  
30
-
31
-/** @addtogroup STM32F1xx_HAL_Driver
32
-  * @{
33
-  */
34
-
35
-/** @addtogroup ADCEx
36
-  * @{
37
-  */ 
38
-
39
-/* Exported types ------------------------------------------------------------*/ 
40
-/** @defgroup ADCEx_Exported_Types ADCEx Exported Types
41
-  * @{
42
-  */
43
-
44
-/** 
45
-  * @brief  ADC Configuration injected Channel structure definition
46
-  * @note   Parameters of this structure are shared within 2 scopes:
47
-  *          - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
48
-  *          - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
49
-  *            AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
50
-  * @note   The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
51
-  *         ADC state can be either:
52
-  *          - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
53
-  *          - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
54
-  */
55
-typedef struct 
56
-{
57
-  uint32_t InjectedChannel;                       /*!< Selection of ADC channel to configure
58
-                                                       This parameter can be a value of @ref ADC_channels
59
-                                                       Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
60
-                                                       Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
61
-                                                       Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
62
-                                                             It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
63
-                                                             Refer to errata sheet of these devices for more details. */
64
-  uint32_t InjectedRank;                          /*!< Rank in the injected group sequencer
65
-                                                       This parameter must be a value of @ref ADCEx_injected_rank
66
-                                                       Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
67
-  uint32_t InjectedSamplingTime;                  /*!< Sampling time value to be set for the selected channel.
68
-                                                       Unit: ADC clock cycles
69
-                                                       Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
70
-                                                       This parameter can be a value of @ref ADC_sampling_times
71
-                                                       Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
72
-                                                                If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
73
-                                                       Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
74
-                                                             sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
75
-                                                             Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
76
-  uint32_t InjectedOffset;                        /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
77
-                                                       Offset value must be a positive number.
78
-                                                       Depending of ADC resolution selected (12, 10, 8 or 6 bits),
79
-                                                       this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
80
-  uint32_t InjectedNbrOfConversion;               /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
81
-                                                       To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
82
-                                                       This parameter must be a number between Min_Data = 1 and Max_Data = 4.
83
-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
84
-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
85
-  FunctionalState InjectedDiscontinuousConvMode;  /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
86
-                                                       Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
87
-                                                       Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
88
-                                                       This parameter can be set to ENABLE or DISABLE.
89
-                                                       Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
90
-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
91
-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
92
-  FunctionalState AutoInjectedConv;               /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
93
-                                                       This parameter can be set to ENABLE or DISABLE.
94
-                                                       Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
95
-                                                       Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
96
-                                                       Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
97
-                                                             To maintain JAUTO always enabled, DMA must be configured in circular mode.
98
-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
99
-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
100
-  uint32_t ExternalTrigInjecConv;                 /*!< Selects the external event used to trigger the conversion start of injected group.
101
-                                                       If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
102
-                                                       If set to external trigger source, triggering is on event rising edge.
103
-                                                       This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
104
-                                                       Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
105
-                                                             If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
106
-                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
107
-                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
108
-}ADC_InjectionConfTypeDef;
109
-
110
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
111
-/** 
112
-  * @brief  Structure definition of ADC multimode
113
-  * @note   The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
114
-  *         State of ADCs of the common group must be: disabled.
115
-  */
116
-typedef struct
117
-{
118
-  uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode. 
119
-                                   This parameter can be a value of @ref ADCEx_Common_mode
120
-                                   Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
121
-                                   Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
122
-                                   Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
123
-                                   Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
124
-                                         The equivalences are:
125
-                                           - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
126
-                                           - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
127
-
128
-  
129
-}ADC_MultiModeTypeDef;                                                          
130
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
131
-
132
-/**
133
-  * @}
134
-  */
135
-
136
-
137
-/* Exported constants --------------------------------------------------------*/
138
-   
139
-/** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
140
-  * @{
141
-  */
142
-
143
-/** @defgroup ADCEx_injected_rank ADCEx rank into injected group
144
-  * @{
145
-  */
146
-#define ADC_INJECTED_RANK_1                           0x00000001U
147
-#define ADC_INJECTED_RANK_2                           0x00000002U
148
-#define ADC_INJECTED_RANK_3                           0x00000003U
149
-#define ADC_INJECTED_RANK_4                           0x00000004U
150
-/**
151
-  * @}
152
-  */
153
-
154
-/** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
155
-  * @{
156
-  */
157
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE           0x00000000U
158
-#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING         ((uint32_t)ADC_CR2_JEXTTRIG)
159
-/**
160
-  * @}
161
-  */
162
-    
163
-/** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
164
-  * @{
165
-  */
166
-/*!< List of external triggers with generic trigger name, independently of    */
167
-/* ADC target, sorted by trigger name:                                        */
168
-
169
-/*!< External triggers of regular group for ADC1&ADC2 only */
170
-#define ADC_EXTERNALTRIGCONV_T1_CC1         ADC1_2_EXTERNALTRIG_T1_CC1
171
-#define ADC_EXTERNALTRIGCONV_T1_CC2         ADC1_2_EXTERNALTRIG_T1_CC2
172
-#define ADC_EXTERNALTRIGCONV_T2_CC2         ADC1_2_EXTERNALTRIG_T2_CC2
173
-#define ADC_EXTERNALTRIGCONV_T3_TRGO        ADC1_2_EXTERNALTRIG_T3_TRGO
174
-#define ADC_EXTERNALTRIGCONV_T4_CC4         ADC1_2_EXTERNALTRIG_T4_CC4
175
-#define ADC_EXTERNALTRIGCONV_EXT_IT11       ADC1_2_EXTERNALTRIG_EXT_IT11
176
-
177
-#if defined (STM32F103xE) || defined (STM32F103xG)
178
-/*!< External triggers of regular group for ADC3 only */
179
-#define ADC_EXTERNALTRIGCONV_T2_CC3         ADC3_EXTERNALTRIG_T2_CC3
180
-#define ADC_EXTERNALTRIGCONV_T3_CC1         ADC3_EXTERNALTRIG_T3_CC1
181
-#define ADC_EXTERNALTRIGCONV_T5_CC1         ADC3_EXTERNALTRIG_T5_CC1
182
-#define ADC_EXTERNALTRIGCONV_T5_CC3         ADC3_EXTERNALTRIG_T5_CC3
183
-#define ADC_EXTERNALTRIGCONV_T8_CC1         ADC3_EXTERNALTRIG_T8_CC1
184
-#endif /* STM32F103xE || defined STM32F103xG */
185
-
186
-/*!< External triggers of regular group for all ADC instances */
187
-#define ADC_EXTERNALTRIGCONV_T1_CC3         ADC1_2_3_EXTERNALTRIG_T1_CC3
188
-
189
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
190
-/*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and   */
191
-/*         XL-density devices.                                                */
192
-/*         To use it on ADC or ADC2, a remap of trigger must be done from     */
193
-/*         EXTI line 11 to TIM8_TRGO with macro:                              */
194
-/*           __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE()                           */
195
-/*           __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE()                           */
196
-
197
-/* Note for internal constant value management: If TIM8_TRGO is available,    */
198
-/* its definition is set to value for ADC1&ADC2 by default and changed to     */
199
-/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
200
-#define ADC_EXTERNALTRIGCONV_T8_TRGO        ADC1_2_EXTERNALTRIG_T8_TRGO
201
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
202
-
203
-#define ADC_SOFTWARE_START                  ADC1_2_3_SWSTART
204
-/**
205
-  * @}
206
-  */
207
-
208
-/** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
209
-  * @{
210
-  */
211
-/*!< List of external triggers with generic trigger name, independently of    */
212
-/* ADC target, sorted by trigger name:                                        */
213
-
214
-/*!< External triggers of injected group for ADC1&ADC2 only */
215
-#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO        ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
216
-#define ADC_EXTERNALTRIGINJECCONV_T2_CC1         ADC1_2_EXTERNALTRIGINJEC_T2_CC1
217
-#define ADC_EXTERNALTRIGINJECCONV_T3_CC4         ADC1_2_EXTERNALTRIGINJEC_T3_CC4
218
-#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO        ADC1_2_EXTERNALTRIGINJEC_T4_TRGO 
219
-#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15       ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
220
-
221
-#if defined (STM32F103xE) || defined (STM32F103xG)
222
-/*!< External triggers of injected group for ADC3 only */
223
-#define ADC_EXTERNALTRIGINJECCONV_T4_CC3         ADC3_EXTERNALTRIGINJEC_T4_CC3
224
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC2         ADC3_EXTERNALTRIGINJEC_T8_CC2
225
-#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO        ADC3_EXTERNALTRIGINJEC_T5_TRGO
226
-#define ADC_EXTERNALTRIGINJECCONV_T5_CC4         ADC3_EXTERNALTRIGINJEC_T5_CC4
227
-#endif /* STM32F103xE || defined STM32F103xG */
228
-
229
-/*!< External triggers of injected group for all ADC instances */
230
-#define ADC_EXTERNALTRIGINJECCONV_T1_CC4         ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
231
-#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO        ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
232
-
233
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
234
-/*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and    */
235
-/*         XL-density devices.                                                */
236
-/*         To use it on ADC1 or ADC2, a remap of trigger must be done from    */
237
-/*         EXTI line 11 to TIM8_CC4 with macro:                               */
238
-/*           __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE()                           */
239
-/*           __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE()                           */
240
-
241
-/* Note for internal constant value management: If TIM8_CC4 is available,     */
242
-/* its definition is set to value for ADC1&ADC2 by default and changed to     */
243
-/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
244
-#define ADC_EXTERNALTRIGINJECCONV_T8_CC4         ADC1_2_EXTERNALTRIGINJEC_T8_CC4
245
-#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
246
-
247
-#define ADC_INJECTED_SOFTWARE_START              ADC1_2_3_JSWSTART
248
-/**
249
-  * @}
250
-  */
251
-
252
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
253
-/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
254
-  * @{
255
-  */
256
-#define ADC_MODE_INDEPENDENT                              0x00000000U                                                                     /*!< ADC dual mode disabled (ADC independent mode) */
257
-#define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)(                                                            ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
258
-#define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)(                                        ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
259
-#define ADC_DUALMODE_INJECSIMULT_INTERLFAST   ((uint32_t)(                                        ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
260
-#define ADC_DUALMODE_INJECSIMULT_INTERLSLOW   ((uint32_t)(                    ADC_CR1_DUALMOD_2                                        )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
261
-#define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(                    ADC_CR1_DUALMOD_2 |                     ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
262
-#define ADC_DUALMODE_REGSIMULT                ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
263
-#define ADC_DUALMODE_INTERLFAST               ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
264
-#define ADC_DUALMODE_INTERLSLOW               ((uint32_t)(ADC_CR1_DUALMOD_3                                                            )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
265
-#define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CR1_DUALMOD_3 |                                         ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
266
-/**
267
-  * @}
268
-  */
269
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
270
-
271
-/**
272
-  * @}
273
-  */
274
-
275
-
276
-/* Private constants ---------------------------------------------------------*/
277
-
278
-/** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
279
-  * @{
280
-  */
281
-
282
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
283
-  * @{
284
-  */
285
-/* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC    */
286
-/* instance is available on the selected device).                             */
287
-/* (used internally by HAL driver. To not use into HAL structure parameters)  */
288
-
289
-/* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
290
-#define ADC1_2_EXTERNALTRIG_T1_CC1                       0x00000000U
291
-#define ADC1_2_EXTERNALTRIG_T1_CC2           ((uint32_t)(                                      ADC_CR2_EXTSEL_0))
292
-#define ADC1_2_EXTERNALTRIG_T2_CC2           ((uint32_t)(                   ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
293
-#define ADC1_2_EXTERNALTRIG_T3_TRGO          ((uint32_t)(ADC_CR2_EXTSEL_2                                      ))
294
-#define ADC1_2_EXTERNALTRIG_T4_CC4           ((uint32_t)(ADC_CR2_EXTSEL_2 |                    ADC_CR2_EXTSEL_0))
295
-#define ADC1_2_EXTERNALTRIG_EXT_IT11         ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1                   ))
296
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
297
-/* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and     */
298
-/* XL-density devices.                                                        */
299
-#define ADC1_2_EXTERNALTRIG_T8_TRGO          ADC1_2_EXTERNALTRIG_EXT_IT11
300
-#endif
301
-
302
-#if defined (STM32F103xE) || defined (STM32F103xG)
303
-/* External triggers of regular group for ADC3 */
304
-#define ADC3_EXTERNALTRIG_T3_CC1             ADC1_2_EXTERNALTRIG_T1_CC1
305
-#define ADC3_EXTERNALTRIG_T2_CC3             ADC1_2_EXTERNALTRIG_T1_CC2
306
-#define ADC3_EXTERNALTRIG_T8_CC1             ADC1_2_EXTERNALTRIG_T2_CC2
307
-#define ADC3_EXTERNALTRIG_T8_TRGO            ADC1_2_EXTERNALTRIG_T3_TRGO
308
-#define ADC3_EXTERNALTRIG_T5_CC1             ADC1_2_EXTERNALTRIG_T4_CC4
309
-#define ADC3_EXTERNALTRIG_T5_CC3             ADC1_2_EXTERNALTRIG_EXT_IT11
310
-#endif
311
-
312
-/* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
313
-#define ADC1_2_3_EXTERNALTRIG_T1_CC3         ((uint32_t)(                   ADC_CR2_EXTSEL_1                   ))
314
-#define ADC1_2_3_SWSTART                     ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
315
-/**
316
-  * @}
317
-  */
318
-
319
-/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
320
-  * @{
321
-  */
322
-/* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC    */
323
-/* instance is available on the selected device).                             */
324
-/* (used internally by HAL driver. To not use into HAL structure parameters)  */
325
-
326
-/* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
327
-#define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO          ((uint32_t)(                    ADC_CR2_JEXTSEL_1                    ))
328
-#define ADC1_2_EXTERNALTRIGINJEC_T2_CC1           ((uint32_t)(                    ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
329
-#define ADC1_2_EXTERNALTRIGINJEC_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2                                        ))
330
-#define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_2 |                     ADC_CR2_JEXTSEL_0))
331
-#define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1                    ))
332
-#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
333
-/* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and      */
334
-/* XL-density devices.                                                        */
335
-#define ADC1_2_EXTERNALTRIGINJEC_T8_CC4           ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
336
-#endif
337
-
338
-#if defined (STM32F103xE) || defined (STM32F103xG)
339
-/* External triggers of injected group for ADC3 */
340
-#define ADC3_EXTERNALTRIGINJEC_T4_CC3             ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
341
-#define ADC3_EXTERNALTRIGINJEC_T8_CC2             ADC1_2_EXTERNALTRIGINJEC_T2_CC1
342
-#define ADC3_EXTERNALTRIGINJEC_T8_CC4             ADC1_2_EXTERNALTRIGINJEC_T3_CC4
343
-#define ADC3_EXTERNALTRIGINJEC_T5_TRGO            ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
344
-#define ADC3_EXTERNALTRIGINJEC_T5_CC4             ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
345
-#endif /* STM32F103xE || defined STM32F103xG */
346
-
347
-/* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
348
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO                    0x00000000U
349
-#define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4         ((uint32_t)(                                        ADC_CR2_JEXTSEL_0))
350
-#define ADC1_2_3_JSWSTART                         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
351
-/**
352
-  * @}
353
-  */
354
-
355
-/**
356
-  * @}
357
-  */
358
-
359
-
360
-/* Exported macro ------------------------------------------------------------*/
361
-
362
-/* Private macro -------------------------------------------------------------*/
363
-
364
-/** @defgroup ADCEx_Private_Macro ADCEx Private Macro
365
-  * @{
366
-  */
367
-/* Macro reserved for internal HAL driver usage, not intended to be used in   */
368
-/* code of final user.                                                        */
369
-
370
-    
371
-/**
372
-  * @brief For devices with 3 ADCs: Defines the external trigger source 
373
-  *        for regular group according to ADC into common group ADC1&ADC2 or 
374
-  *        ADC3 (some triggers with same source have different value to
375
-  *        be programmed into ADC EXTSEL bits of CR2 register).
376
-  *        For devices with 2 ADCs or less: this macro makes no change.
377
-  * @param __HANDLE__: ADC handle
378
-  * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
379
-  * @retval External trigger to be programmed into EXTSEL bits of CR2 register
380
-  */
381
-#if defined (STM32F103xE) || defined (STM32F103xG)
382
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
383
- (( (((__HANDLE__)->Instance) == ADC3)                                         \
384
-  )?                                                                           \
385
-   ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO                     \
386
-     )?                                                                        \
387
-      (ADC3_EXTERNALTRIG_T8_TRGO)                                              \
388
-      :                                                                        \
389
-      (__EXT_TRIG_CONV__)                                                      \
390
-   )                                                                           \
391
-   :                                                                           \
392
-   (__EXT_TRIG_CONV__)                                                         \
393
- )
394
-#else
395
-#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
396
-  (__EXT_TRIG_CONV__)
397
-#endif /* STM32F103xE || STM32F103xG */
398
-
399
-/**
400
-  * @brief For devices with 3 ADCs: Defines the external trigger source 
401
-  *        for injected group according to ADC into common group ADC1&ADC2 or 
402
-  *        ADC3 (some triggers with same source have different value to
403
-  *        be programmed into ADC JEXTSEL bits of CR2 register).
404
-  *        For devices with 2 ADCs or less: this macro makes no change.
405
-  * @param __HANDLE__: ADC handle
406
-  * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
407
-  * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
408
-  */
409
-#if defined (STM32F103xE) || defined (STM32F103xG)
410
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
411
- (( (((__HANDLE__)->Instance) == ADC3)                                         \
412
-  )?                                                                           \
413
-   ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4           \
414
-     )?                                                                        \
415
-      (ADC3_EXTERNALTRIGINJEC_T8_CC4)                                          \
416
-      :                                                                        \
417
-      (__EXT_TRIG_INJECTCONV__)                                                \
418
-   )                                                                           \
419
-   :                                                                           \
420
-   (__EXT_TRIG_INJECTCONV__)                                                   \
421
- )
422
-#else
423
-#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
424
-   (__EXT_TRIG_INJECTCONV__)
425
-#endif /* STM32F103xE || STM32F103xG */
426
-
427
-
428
-/**
429
-  * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
430
-  * @param __HANDLE__: ADC handle
431
-  * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
432
-  */
433
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
434
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
435
- (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)   \
436
-  )?                                                                           \
437
-   (ADC1->CR1 & ADC_CR1_DUALMOD)                                               \
438
-   :                                                                           \
439
-   (RESET)                                                                     \
440
- )
441
-#else
442
-#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
443
-  (RESET)
444
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
445
-
446
-/**
447
-  * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
448
-  * @param __HANDLE__: ADC handle
449
-  * @retval None
450
-  */
451
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
452
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
453
-  (( (((__HANDLE__)->Instance) == ADC2)                                        \
454
-   )?                                                                          \
455
-    ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET)                                   \
456
-    :                                                                          \
457
-    (!RESET)                                                                   \
458
-  )
459
-#else
460
-#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
461
-  (!RESET)
462
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
463
-
464
-/**
465
-  * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
466
-  * @param __HANDLE__: ADC handle
467
-  * @retval None
468
-  */
469
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
470
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
471
-  (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)  \
472
-   )?                                                                          \
473
-    (ADC1->CR1 & ADC_CR1_JAUTO)                                                \
474
-    :                                                                          \
475
-    (RESET)                                                                    \
476
-  )
477
-#else
478
-#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
479
-  (RESET)
480
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
481
-
482
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
483
-/**
484
-  * @brief Set handle of the other ADC sharing the common multimode settings
485
-  * @param __HANDLE__: ADC handle
486
-  * @param __HANDLE_OTHER_ADC__: other ADC handle
487
-  * @retval None
488
-  */
489
-#define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__)                 \
490
-  ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
491
-
492
-/**
493
-  * @brief Set handle of the ADC slave associated to the ADC master
494
-  * On STM32F1 devices, ADC slave is always ADC2 (this can be different
495
-  * on other STM32 devices)
496
-  * @param __HANDLE_MASTER__: ADC master handle
497
-  * @param __HANDLE_SLAVE__: ADC slave handle
498
-  * @retval None
499
-  */
500
-#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)                   \
501
-  ((__HANDLE_SLAVE__)->Instance = ADC2)
502
-       
503
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
504
-
505
-#define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
506
-                                       ((CHANNEL) == ADC_INJECTED_RANK_2) || \
507
-                                       ((CHANNEL) == ADC_INJECTED_RANK_3) || \
508
-                                       ((CHANNEL) == ADC_INJECTED_RANK_4))
509
-
510
-#define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)  || \
511
-                                        ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
512
-
513
-/** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
514
-  * @{
515
-  */
516
-#define IS_ADC_INJECTED_NB_CONV(LENGTH)  (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
517
-/**
518
-  * @}
519
-  */
520
-
521
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
522
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
523
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
524
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
525
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
526
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
527
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
528
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
529
-#endif
530
-#if defined (STM32F101xE)
531
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
532
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
533
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
534
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
535
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
536
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
537
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
538
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
539
-#endif
540
-#if defined (STM32F101xG)
541
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
542
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
543
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
544
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
545
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
546
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
547
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
548
-#endif
549
-#if defined (STM32F103xE) || defined (STM32F103xG)
550
-#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
551
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
552
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
553
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
554
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
555
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
556
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)    || \
557
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)    || \
558
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)    || \
559
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)    || \
560
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)    || \
561
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)    || \
562
-                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
563
-                                 ((REGTRIG) == ADC_SOFTWARE_START))
564
-#endif
565
-
566
-#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
567
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
568
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
569
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
570
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
571
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
572
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
573
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
574
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
575
-#endif
576
-#if defined (STM32F101xE)
577
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
578
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
579
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
580
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
581
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
582
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
583
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
584
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
585
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
586
-#endif
587
-#if defined (STM32F101xG)
588
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
589
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
590
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
591
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
592
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
593
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
594
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
595
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
596
-#endif
597
-#if defined (STM32F103xE) || defined (STM32F103xG)
598
-#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
599
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
600
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
601
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
602
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
603
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
604
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)   || \
605
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)   || \
606
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO)  || \
607
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
608
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
609
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
610
-                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
611
-                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
612
-#endif
613
-
614
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
615
-#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                || \
616
-                           ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)  || \
617
-                           ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)    || \
618
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
619
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
620
-                           ((MODE) == ADC_DUALMODE_INJECSIMULT)            || \
621
-                           ((MODE) == ADC_DUALMODE_REGSIMULT)              || \
622
-                           ((MODE) == ADC_DUALMODE_INTERLFAST)             || \
623
-                           ((MODE) == ADC_DUALMODE_INTERLSLOW)             || \
624
-                           ((MODE) == ADC_DUALMODE_ALTERTRIG) )
625
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
626
-
627
-/**
628
-  * @}
629
-  */      
630
-   
631
-    
632
-
633
-    
634
-    
635
-   
636
-/* Exported functions --------------------------------------------------------*/
637
-/** @addtogroup ADCEx_Exported_Functions
638
-  * @{
639
-  */
640
-
641
-/* IO operation functions  *****************************************************/
642
-/** @addtogroup ADCEx_Exported_Functions_Group1
643
-  * @{
644
-  */
645
-
646
-/* ADC calibration */
647
-HAL_StatusTypeDef       HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
648
-
649
-/* Blocking mode: Polling */
650
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
651
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
652
-HAL_StatusTypeDef       HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
653
-
654
-/* Non-blocking mode: Interruption */
655
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
656
-HAL_StatusTypeDef       HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
657
-
658
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
659
-/* ADC multimode */
660
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
661
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); 
662
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
663
-
664
-/* ADC retrieve conversion value intended to be used with polling or interruption */
665
-uint32_t                HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
666
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
667
-uint32_t                HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
668
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
669
-
670
-/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
671
-void                    HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
672
-/**
673
-  * @}
674
-  */
675
-
676
-
677
-/* Peripheral Control functions ***********************************************/
678
-/** @addtogroup ADCEx_Exported_Functions_Group2
679
-  * @{
680
-  */
681
-HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
682
-#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
683
-HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
684
-#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
685
-/**
686
-  * @}
687
-  */
688
-
689
-
690
-/**
691
-  * @}
692
-  */
693
-
694
-
695
-/**
696
-  * @}
697
-  */ 
698
-
699
-/**
700
-  * @}
701
-  */
702
-  
703
-#ifdef __cplusplus
704
-}
705
-#endif
706
-
707
-#endif /* __STM32F1xx_HAL_ADC_EX_H */
708
-
709
-
710
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0 - 184
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_crc.h

@@ -1,184 +0,0 @@
1
-/**
2
-  ******************************************************************************
3
-  * @file    stm32f1xx_hal_crc.h
4
-  * @author  MCD Application Team
5
-  * @brief   Header file of CRC HAL module.
6
-  ******************************************************************************
7
-  * @attention
8
-  *
9
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10
-  * All rights reserved.</center></h2>
11
-  *
12
-  * This software component is licensed by ST under BSD 3-Clause license,
13
-  * the "License"; You may not use this file except in compliance with the
14
-  * License. You may obtain a copy of the License at:
15
-  *                        opensource.org/licenses/BSD-3-Clause
16
-  *
17
-  ******************************************************************************
18
-  */
19
-
20
-/* Define to prevent recursive inclusion -------------------------------------*/
21
-#ifndef STM32F1xx_HAL_CRC_H
22
-#define STM32F1xx_HAL_CRC_H
23
-
24
-#ifdef __cplusplus
25
-extern "C" {
26
-#endif
27
-
28
-/* Includes ------------------------------------------------------------------*/
29
-#include "stm32f1xx_hal_def.h"
30
-
31
-/** @addtogroup STM32F1xx_HAL_Driver
32
-  * @{
33
-  */
34
-
35
-/** @addtogroup CRC
36
-  * @{
37
-  */
38
-
39
-/* Exported types ------------------------------------------------------------*/
40
-/** @defgroup CRC_Exported_Types CRC Exported Types
41
-  * @{
42
-  */
43
-
44
-/**
45
-  * @brief  CRC HAL State Structure definition
46
-  */
47
-typedef enum
48
-{
49
-  HAL_CRC_STATE_RESET     = 0x00U,  /*!< CRC not yet initialized or disabled */
50
-  HAL_CRC_STATE_READY     = 0x01U,  /*!< CRC initialized and ready for use   */
51
-  HAL_CRC_STATE_BUSY      = 0x02U,  /*!< CRC internal process is ongoing     */
52
-  HAL_CRC_STATE_TIMEOUT   = 0x03U,  /*!< CRC timeout state                   */
53
-  HAL_CRC_STATE_ERROR     = 0x04U   /*!< CRC error state                     */
54
-} HAL_CRC_StateTypeDef;
55
-
56
-
57
-/**
58
-  * @brief  CRC Handle Structure definition
59
-  */
60
-typedef struct
61
-{
62
-  CRC_TypeDef                 *Instance;   /*!< Register base address        */
63
-
64
-  HAL_LockTypeDef             Lock;        /*!< CRC Locking object           */
65
-
66
-  __IO HAL_CRC_StateTypeDef   State;       /*!< CRC communication state      */
67
-
68
-} CRC_HandleTypeDef;
69
-/**
70
-  * @}
71
-  */
72
-
73
-/* Exported constants --------------------------------------------------------*/
74
-/** @defgroup CRC_Exported_Constants CRC Exported Constants
75
-  * @{
76
-  */
77
-
78
-/**
79
-  * @}
80
-  */
81
-
82
-/* Exported macros -----------------------------------------------------------*/
83
-/** @defgroup CRC_Exported_Macros CRC Exported Macros
84
-  * @{
85
-  */
86
-
87
-/** @brief Reset CRC handle state.
88
-  * @param  __HANDLE__ CRC handle.
89
-  * @retval None
90
-  */
91
-#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
92
-
93
-/**
94
-  * @brief  Reset CRC Data Register.
95
-  * @param  __HANDLE__ CRC handle
96
-  * @retval None
97
-  */
98
-#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
99
-
100
-/**
101
-  * @brief Store data in the Independent Data (ID) register.
102
-  * @param __HANDLE__ CRC handle
103
-  * @param __VALUE__  Value to be stored in the ID register
104
-  * @note  Refer to the Reference Manual to get the authorized __VALUE__ length in bits
105
-  * @retval None
106
-  */
107
-#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
108
-
109
-/**
110
-  * @brief Return the data stored in the Independent Data (ID) register.
111
-  * @param __HANDLE__ CRC handle
112
-  * @note  Refer to the Reference Manual to get the authorized __VALUE__ length in bits
113
-  * @retval Value of the ID register
114
-  */
115
-#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
116
-/**
117
-  * @}
118
-  */
119
-
120
-
121
-/* Private macros --------------------------------------------------------*/
122
-/** @defgroup  CRC_Private_Macros CRC Private Macros
123
-  * @{
124
-  */
125
-
126
-/**
127
-  * @}
128
-  */
129
-
130
-/* Exported functions --------------------------------------------------------*/
131
-/** @defgroup CRC_Exported_Functions CRC Exported Functions
132
-  * @{
133
-  */
134
-
135
-/* Initialization and de-initialization functions  ****************************/
136
-/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
137
-  * @{
138
-  */
139
-HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
140
-HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
141
-void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
142
-void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
143
-/**
144
-  * @}
145
-  */
146
-
147
-/* Peripheral Control functions ***********************************************/
148
-/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
149
-  * @{
150
-  */
151
-uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
152
-uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
153
-/**
154
-  * @}
155
-  */
156
-
157
-/* Peripheral State and Error functions ***************************************/
158
-/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
159
-  * @{
160
-  */
161
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
162
-/**
163
-  * @}
164
-  */
165
-
166
-/**
167
-  * @}
168
-  */
169
-
170
-/**
171
-  * @}
172
-  */
173
-
174
-/**
175
-  * @}
176
-  */
177
-
178
-#ifdef __cplusplus
179
-}
180
-#endif
181
-
182
-#endif /* STM32F1xx_HAL_CRC_H */
183
-
184
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0 - 735
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h

@@ -1,735 +0,0 @@
1
-/**
2
-  ******************************************************************************
3
-  * @file    stm32f1xx_hal_i2c.h
4
-  * @author  MCD Application Team
5
-  * @brief   Header file of I2C HAL module.
6
-  ******************************************************************************
7
-  * @attention
8
-  *
9
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10
-  * All rights reserved.</center></h2>
11
-  *
12
-  * This software component is licensed by ST under BSD 3-Clause license,
13
-  * the "License"; You may not use this file except in compliance with the
14
-  * License. You may obtain a copy of the License at:
15
-  *                        opensource.org/licenses/BSD-3-Clause
16
-  *
17
-  ******************************************************************************
18
-  */
19
-
20
-/* Define to prevent recursive inclusion -------------------------------------*/
21
-#ifndef __STM32F1xx_HAL_I2C_H
22
-#define __STM32F1xx_HAL_I2C_H
23
-
24
-#ifdef __cplusplus
25
-extern "C" {
26
-#endif
27
-
28
-/* Includes ------------------------------------------------------------------*/
29
-#include "stm32f1xx_hal_def.h"
30
-
31
-/** @addtogroup STM32F1xx_HAL_Driver
32
-  * @{
33
-  */
34
-
35
-/** @addtogroup I2C
36
-  * @{
37
-  */
38
-
39
-/* Exported types ------------------------------------------------------------*/
40
-/** @defgroup I2C_Exported_Types I2C Exported Types
41
-  * @{
42
-  */
43
-
44
-/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
45
-  * @brief  I2C Configuration Structure definition
46
-  * @{
47
-  */
48
-typedef struct
49
-{
50
-  uint32_t ClockSpeed;       /*!< Specifies the clock frequency.
51
-                                  This parameter must be set to a value lower than 400kHz */
52
-
53
-  uint32_t DutyCycle;        /*!< Specifies the I2C fast mode duty cycle.
54
-                                  This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
55
-
56
-  uint32_t OwnAddress1;      /*!< Specifies the first device own address.
57
-                                  This parameter can be a 7-bit or 10-bit address. */
58
-
59
-  uint32_t AddressingMode;   /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
60
-                                  This parameter can be a value of @ref I2C_addressing_mode */
61
-
62
-  uint32_t DualAddressMode;  /*!< Specifies if dual addressing mode is selected.
63
-                                  This parameter can be a value of @ref I2C_dual_addressing_mode */
64
-
65
-  uint32_t OwnAddress2;      /*!< Specifies the second device own address if dual addressing mode is selected
66
-                                  This parameter can be a 7-bit address. */
67
-
68
-  uint32_t GeneralCallMode;  /*!< Specifies if general call mode is selected.
69
-                                  This parameter can be a value of @ref I2C_general_call_addressing_mode */
70
-
71
-  uint32_t NoStretchMode;    /*!< Specifies if nostretch mode is selected.
72
-                                  This parameter can be a value of @ref I2C_nostretch_mode */
73
-
74
-} I2C_InitTypeDef;
75
-
76
-/**
77
-  * @}
78
-  */
79
-
80
-/** @defgroup HAL_state_structure_definition HAL state structure definition
81
-  * @brief  HAL State structure definition
82
-  * @note  HAL I2C State value coding follow below described bitmap :
83
-  *          b7-b6  Error information
84
-  *             00 : No Error
85
-  *             01 : Abort (Abort user request on going)
86
-  *             10 : Timeout
87
-  *             11 : Error
88
-  *          b5     Peripheral initilisation status
89
-  *             0  : Reset (Peripheral not initialized)
90
-  *             1  : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
91
-  *          b4     (not used)
92
-  *             x  : Should be set to 0
93
-  *          b3
94
-  *             0  : Ready or Busy (No Listen mode ongoing)
95
-  *             1  : Listen (Peripheral in Address Listen Mode)
96
-  *          b2     Intrinsic process state
97
-  *             0  : Ready
98
-  *             1  : Busy (Peripheral busy with some configuration or internal operations)
99
-  *          b1     Rx state
100
-  *             0  : Ready (no Rx operation ongoing)
101
-  *             1  : Busy (Rx operation ongoing)
102
-  *          b0     Tx state
103
-  *             0  : Ready (no Tx operation ongoing)
104
-  *             1  : Busy (Tx operation ongoing)
105
-  * @{
106
-  */
107
-typedef enum
108
-{
109
-  HAL_I2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */
110
-  HAL_I2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */
111
-  HAL_I2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */
112
-  HAL_I2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */
113
-  HAL_I2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */
114
-  HAL_I2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */
115
-  HAL_I2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission
116
-                                                 process is ongoing                         */
117
-  HAL_I2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception
118
-                                                 process is ongoing                         */
119
-  HAL_I2C_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */
120
-  HAL_I2C_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state                             */
121
-  HAL_I2C_STATE_ERROR             = 0xE0U    /*!< Error                                     */
122
-
123
-} HAL_I2C_StateTypeDef;
124
-
125
-/**
126
-  * @}
127
-  */
128
-
129
-/** @defgroup HAL_mode_structure_definition HAL mode structure definition
130
-  * @brief  HAL Mode structure definition
131
-  * @note  HAL I2C Mode value coding follow below described bitmap :\n
132
-  *          b7     (not used)\n
133
-  *             x  : Should be set to 0\n
134
-  *          b6\n
135
-  *             0  : None\n
136
-  *             1  : Memory (HAL I2C communication is in Memory Mode)\n
137
-  *          b5\n
138
-  *             0  : None\n
139
-  *             1  : Slave (HAL I2C communication is in Slave Mode)\n
140
-  *          b4\n
141
-  *             0  : None\n
142
-  *             1  : Master (HAL I2C communication is in Master Mode)\n
143
-  *          b3-b2-b1-b0  (not used)\n
144
-  *             xxxx : Should be set to 0000
145
-  * @{
146
-  */
147
-typedef enum
148
-{
149
-  HAL_I2C_MODE_NONE               = 0x00U,   /*!< No I2C communication on going             */
150
-  HAL_I2C_MODE_MASTER             = 0x10U,   /*!< I2C communication is in Master Mode       */
151
-  HAL_I2C_MODE_SLAVE              = 0x20U,   /*!< I2C communication is in Slave Mode        */
152
-  HAL_I2C_MODE_MEM                = 0x40U    /*!< I2C communication is in Memory Mode       */
153
-
154
-} HAL_I2C_ModeTypeDef;
155
-
156
-/**
157
-  * @}
158
-  */
159
-
160
-/** @defgroup I2C_Error_Code_definition I2C Error Code definition
161
-  * @brief  I2C Error Code definition
162
-  * @{
163
-  */
164
-#define HAL_I2C_ERROR_NONE              0x00000000U    /*!< No error              */
165
-#define HAL_I2C_ERROR_BERR              0x00000001U    /*!< BERR error            */
166
-#define HAL_I2C_ERROR_ARLO              0x00000002U    /*!< ARLO error            */
167
-#define HAL_I2C_ERROR_AF                0x00000004U    /*!< AF error              */
168
-#define HAL_I2C_ERROR_OVR               0x00000008U    /*!< OVR error             */
169
-#define HAL_I2C_ERROR_DMA               0x00000010U    /*!< DMA transfer error    */
170
-#define HAL_I2C_ERROR_TIMEOUT           0x00000020U    /*!< Timeout Error         */
171
-#define HAL_I2C_ERROR_SIZE              0x00000040U    /*!< Size Management error */
172
-#define HAL_I2C_ERROR_DMA_PARAM         0x00000080U    /*!< DMA Parameter Error   */
173
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
174
-#define HAL_I2C_ERROR_INVALID_CALLBACK  0x00000100U    /*!< Invalid Callback error */
175
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
176
-/**
177
-  * @}
178
-  */
179
-
180
-/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
181
-  * @brief  I2C handle Structure definition
182
-  * @{
183
-  */
184
-typedef struct __I2C_HandleTypeDef
185
-{
186
-  I2C_TypeDef                *Instance;      /*!< I2C registers base address               */
187
-
188
-  I2C_InitTypeDef            Init;           /*!< I2C communication parameters             */
189
-
190
-  uint8_t                    *pBuffPtr;      /*!< Pointer to I2C transfer buffer           */
191
-
192
-  uint16_t                   XferSize;       /*!< I2C transfer size                        */
193
-
194
-  __IO uint16_t              XferCount;      /*!< I2C transfer counter                     */
195
-
196
-  __IO uint32_t              XferOptions;    /*!< I2C transfer options                     */
197
-
198
-  __IO uint32_t              PreviousState;  /*!< I2C communication Previous state and mode
199
-                                                  context for internal usage               */
200
-
201
-  DMA_HandleTypeDef          *hdmatx;        /*!< I2C Tx DMA handle parameters             */
202
-
203
-  DMA_HandleTypeDef          *hdmarx;        /*!< I2C Rx DMA handle parameters             */
204
-
205
-  HAL_LockTypeDef            Lock;           /*!< I2C locking object                       */
206
-
207
-  __IO HAL_I2C_StateTypeDef  State;          /*!< I2C communication state                  */
208
-
209
-  __IO HAL_I2C_ModeTypeDef   Mode;           /*!< I2C communication mode                   */
210
-
211
-  __IO uint32_t              ErrorCode;      /*!< I2C Error code                           */
212
-
213
-  __IO uint32_t              Devaddress;     /*!< I2C Target device address                */
214
-
215
-  __IO uint32_t              Memaddress;     /*!< I2C Target memory address                */
216
-
217
-  __IO uint32_t              MemaddSize;     /*!< I2C Target memory address  size          */
218
-
219
-  __IO uint32_t              EventCount;     /*!< I2C Event counter                        */
220
-
221
-
222
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
223
-  void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);           /*!< I2C Master Tx Transfer completed callback */
224
-  void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);           /*!< I2C Master Rx Transfer completed callback */
225
-  void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);            /*!< I2C Slave Tx Transfer completed callback  */
226
-  void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);            /*!< I2C Slave Rx Transfer completed callback  */
227
-  void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);             /*!< I2C Listen Complete callback              */
228
-  void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Memory Tx Transfer completed callback */
229
-  void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Memory Rx Transfer completed callback */
230
-  void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);                  /*!< I2C Error callback                        */
231
-  void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Abort callback                        */
232
-
233
-  void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);  /*!< I2C Slave Address Match callback */
234
-
235
-  void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);                /*!< I2C Msp Init callback                     */
236
-  void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Msp DeInit callback                   */
237
-
238
-#endif  /* USE_HAL_I2C_REGISTER_CALLBACKS */
239
-} I2C_HandleTypeDef;
240
-
241
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
242
-/**
243
-  * @brief  HAL I2C Callback ID enumeration definition
244
-  */
245
-typedef enum
246
-{
247
-  HAL_I2C_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< I2C Master Tx Transfer completed callback ID  */
248
-  HAL_I2C_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< I2C Master Rx Transfer completed callback ID  */
249
-  HAL_I2C_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< I2C Slave Tx Transfer completed callback ID   */
250
-  HAL_I2C_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< I2C Slave Rx Transfer completed callback ID   */
251
-  HAL_I2C_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< I2C Listen Complete callback ID               */
252
-  HAL_I2C_MEM_TX_COMPLETE_CB_ID         = 0x05U,    /*!< I2C Memory Tx Transfer callback ID            */
253
-  HAL_I2C_MEM_RX_COMPLETE_CB_ID         = 0x06U,    /*!< I2C Memory Rx Transfer completed callback ID  */
254
-  HAL_I2C_ERROR_CB_ID                   = 0x07U,    /*!< I2C Error callback ID                         */
255
-  HAL_I2C_ABORT_CB_ID                   = 0x08U,    /*!< I2C Abort callback ID                         */
256
-
257
-  HAL_I2C_MSPINIT_CB_ID                 = 0x09U,    /*!< I2C Msp Init callback ID                      */
258
-  HAL_I2C_MSPDEINIT_CB_ID               = 0x0AU     /*!< I2C Msp DeInit callback ID                    */
259
-
260
-} HAL_I2C_CallbackIDTypeDef;
261
-
262
-/**
263
-  * @brief  HAL I2C Callback pointer definition
264
-  */
265
-typedef  void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
266
-typedef  void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
267
-
268
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
269
-/**
270
-  * @}
271
-  */
272
-
273
-/**
274
-  * @}
275
-  */
276
-/* Exported constants --------------------------------------------------------*/
277
-
278
-/** @defgroup I2C_Exported_Constants I2C Exported Constants
279
-  * @{
280
-  */
281
-
282
-/** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
283
-  * @{
284
-  */
285
-#define I2C_DUTYCYCLE_2                 0x00000000U
286
-#define I2C_DUTYCYCLE_16_9              I2C_CCR_DUTY
287
-/**
288
-  * @}
289
-  */
290
-
291
-/** @defgroup I2C_addressing_mode I2C addressing mode
292
-  * @{
293
-  */
294
-#define I2C_ADDRESSINGMODE_7BIT         0x00004000U
295
-#define I2C_ADDRESSINGMODE_10BIT        (I2C_OAR1_ADDMODE | 0x00004000U)
296
-/**
297
-  * @}
298
-  */
299
-
300
-/** @defgroup I2C_dual_addressing_mode  I2C dual addressing mode
301
-  * @{
302
-  */
303
-#define I2C_DUALADDRESS_DISABLE        0x00000000U
304
-#define I2C_DUALADDRESS_ENABLE         I2C_OAR2_ENDUAL
305
-/**
306
-  * @}
307
-  */
308
-
309
-/** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
310
-  * @{
311
-  */
312
-#define I2C_GENERALCALL_DISABLE        0x00000000U
313
-#define I2C_GENERALCALL_ENABLE         I2C_CR1_ENGC
314
-/**
315
-  * @}
316
-  */
317
-
318
-/** @defgroup I2C_nostretch_mode I2C nostretch mode
319
-  * @{
320
-  */
321
-#define I2C_NOSTRETCH_DISABLE          0x00000000U
322
-#define I2C_NOSTRETCH_ENABLE           I2C_CR1_NOSTRETCH
323
-/**
324
-  * @}
325
-  */
326
-
327
-/** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
328
-  * @{
329
-  */
330
-#define I2C_MEMADD_SIZE_8BIT            0x00000001U
331
-#define I2C_MEMADD_SIZE_16BIT           0x00000010U
332
-/**
333
-  * @}
334
-  */
335
-
336
-/** @defgroup I2C_XferDirection_definition I2C XferDirection definition
337
-  * @{
338
-  */
339
-#define I2C_DIRECTION_RECEIVE           0x00000000U
340
-#define I2C_DIRECTION_TRANSMIT          0x00000001U
341
-/**
342
-  * @}
343
-  */
344
-
345
-/** @defgroup I2C_XferOptions_definition I2C XferOptions definition
346
-  * @{
347
-  */
348
-#define  I2C_FIRST_FRAME                0x00000001U
349
-#define  I2C_FIRST_AND_NEXT_FRAME       0x00000002U
350
-#define  I2C_NEXT_FRAME                 0x00000004U
351
-#define  I2C_FIRST_AND_LAST_FRAME       0x00000008U
352
-#define  I2C_LAST_FRAME_NO_STOP         0x00000010U
353
-#define  I2C_LAST_FRAME                 0x00000020U
354
-
355
-/* List of XferOptions in usage of :
356
- * 1- Restart condition in all use cases (direction change or not)
357
- */
358
-#define  I2C_OTHER_FRAME                (0x00AA0000U)
359
-#define  I2C_OTHER_AND_LAST_FRAME       (0xAA000000U)
360
-/**
361
-  * @}
362
-  */
363
-
364
-/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
365
-  * @brief I2C Interrupt definition
366
-  *        Elements values convention: 0xXXXXXXXX
367
-  *           - XXXXXXXX  : Interrupt control mask
368
-  * @{
369
-  */
370
-#define I2C_IT_BUF                      I2C_CR2_ITBUFEN
371
-#define I2C_IT_EVT                      I2C_CR2_ITEVTEN
372
-#define I2C_IT_ERR                      I2C_CR2_ITERREN
373
-/**
374
-  * @}
375
-  */
376
-
377
-/** @defgroup I2C_Flag_definition I2C Flag definition
378
-  * @{
379
-  */
380
-
381
-#define I2C_FLAG_OVR                    0x00010800U
382
-#define I2C_FLAG_AF                     0x00010400U
383
-#define I2C_FLAG_ARLO                   0x00010200U
384
-#define I2C_FLAG_BERR                   0x00010100U
385
-#define I2C_FLAG_TXE                    0x00010080U
386
-#define I2C_FLAG_RXNE                   0x00010040U
387
-#define I2C_FLAG_STOPF                  0x00010010U
388
-#define I2C_FLAG_ADD10                  0x00010008U
389
-#define I2C_FLAG_BTF                    0x00010004U
390
-#define I2C_FLAG_ADDR                   0x00010002U
391
-#define I2C_FLAG_SB                     0x00010001U
392
-#define I2C_FLAG_DUALF                  0x00100080U
393
-#define I2C_FLAG_GENCALL                0x00100010U
394
-#define I2C_FLAG_TRA                    0x00100004U
395
-#define I2C_FLAG_BUSY                   0x00100002U
396
-#define I2C_FLAG_MSL                    0x00100001U
397
-/**
398
-  * @}
399
-  */
400
-
401
-/**
402
-  * @}
403
-  */
404
-
405
-/* Exported macros -----------------------------------------------------------*/
406
-
407
-/** @defgroup I2C_Exported_Macros I2C Exported Macros
408
-  * @{
409
-  */
410
-
411
-/** @brief Reset I2C handle state.
412
-  * @param  __HANDLE__ specifies the I2C Handle.
413
-  * @retval None
414
-  */
415
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
416
-#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                do{                                                   \
417
-                                                                    (__HANDLE__)->State = HAL_I2C_STATE_RESET;       \
418
-                                                                    (__HANDLE__)->MspInitCallback = NULL;            \
419
-                                                                    (__HANDLE__)->MspDeInitCallback = NULL;          \
420
-                                                                  } while(0)
421
-#else
422
-#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
423
-#endif
424
-
425
-/** @brief  Enable or disable the specified I2C interrupts.
426
-  * @param  __HANDLE__ specifies the I2C Handle.
427
-  * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
428
-  *         This parameter can be one of the following values:
429
-  *            @arg I2C_IT_BUF: Buffer interrupt enable
430
-  *            @arg I2C_IT_EVT: Event interrupt enable
431
-  *            @arg I2C_IT_ERR: Error interrupt enable
432
-  * @retval None
433
-  */
434
-#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
435
-#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
436
-
437
-/** @brief  Checks if the specified I2C interrupt source is enabled or disabled.
438
-  * @param  __HANDLE__ specifies the I2C Handle.
439
-  * @param  __INTERRUPT__ specifies the I2C interrupt source to check.
440
-  *          This parameter can be one of the following values:
441
-  *            @arg I2C_IT_BUF: Buffer interrupt enable
442
-  *            @arg I2C_IT_EVT: Event interrupt enable
443
-  *            @arg I2C_IT_ERR: Error interrupt enable
444
-  * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
445
-  */
446
-#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
447
-
448
-/** @brief  Checks whether the specified I2C flag is set or not.
449
-  * @param  __HANDLE__ specifies the I2C Handle.
450
-  * @param  __FLAG__ specifies the flag to check.
451
-  *         This parameter can be one of the following values:
452
-  *            @arg I2C_FLAG_OVR: Overrun/Underrun flag
453
-  *            @arg I2C_FLAG_AF: Acknowledge failure flag
454
-  *            @arg I2C_FLAG_ARLO: Arbitration lost flag
455
-  *            @arg I2C_FLAG_BERR: Bus error flag
456
-  *            @arg I2C_FLAG_TXE: Data register empty flag
457
-  *            @arg I2C_FLAG_RXNE: Data register not empty flag
458
-  *            @arg I2C_FLAG_STOPF: Stop detection flag
459
-  *            @arg I2C_FLAG_ADD10: 10-bit header sent flag
460
-  *            @arg I2C_FLAG_BTF: Byte transfer finished flag
461
-  *            @arg I2C_FLAG_ADDR: Address sent flag
462
-  *                                Address matched flag
463
-  *            @arg I2C_FLAG_SB: Start bit flag
464
-  *            @arg I2C_FLAG_DUALF: Dual flag
465
-  *            @arg I2C_FLAG_GENCALL: General call header flag
466
-  *            @arg I2C_FLAG_TRA: Transmitter/Receiver flag
467
-  *            @arg I2C_FLAG_BUSY: Bus busy flag
468
-  *            @arg I2C_FLAG_MSL: Master/Slave flag
469
-  * @retval The new state of __FLAG__ (TRUE or FALSE).
470
-  */
471
-#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
472
-                                                  (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
473
-                                                  (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
474
-
475
-/** @brief  Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
476
-  * @param  __HANDLE__ specifies the I2C Handle.
477
-  * @param  __FLAG__ specifies the flag to clear.
478
-  *         This parameter can be any combination of the following values:
479
-  *            @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
480
-  *            @arg I2C_FLAG_AF: Acknowledge failure flag
481
-  *            @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
482
-  *            @arg I2C_FLAG_BERR: Bus error flag
483
-  * @retval None
484
-  */
485
-#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
486
-
487
-/** @brief  Clears the I2C ADDR pending flag.
488
-  * @param  __HANDLE__ specifies the I2C Handle.
489
-  *         This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
490
-  * @retval None
491
-  */
492
-#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__)    \
493
-  do{                                           \
494
-    __IO uint32_t tmpreg = 0x00U;               \
495
-    tmpreg = (__HANDLE__)->Instance->SR1;       \
496
-    tmpreg = (__HANDLE__)->Instance->SR2;       \
497
-    UNUSED(tmpreg);                             \
498
-  } while(0)
499
-
500
-/** @brief  Clears the I2C STOPF pending flag.
501
-  * @param  __HANDLE__ specifies the I2C Handle.
502
-  * @retval None
503
-  */
504
-#define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__)           \
505
-  do{                                                  \
506
-    __IO uint32_t tmpreg = 0x00U;                      \
507
-    tmpreg = (__HANDLE__)->Instance->SR1;              \
508
-    SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE);  \
509
-    UNUSED(tmpreg);                                    \
510
-  } while(0)
511
-
512
-/** @brief  Enable the specified I2C peripheral.
513
-  * @param  __HANDLE__ specifies the I2C Handle.
514
-  * @retval None
515
-  */
516
-#define __HAL_I2C_ENABLE(__HANDLE__)                  SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
517
-
518
-/** @brief  Disable the specified I2C peripheral.
519
-  * @param  __HANDLE__ specifies the I2C Handle.
520
-  * @retval None
521
-  */
522
-#define __HAL_I2C_DISABLE(__HANDLE__)                 CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
523
-
524
-/**
525
-  * @}
526
-  */
527
-
528
-/* Exported functions --------------------------------------------------------*/
529
-/** @addtogroup I2C_Exported_Functions
530
-  * @{
531
-  */
532
-
533
-/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
534
-  * @{
535
-  */
536
-/* Initialization and de-initialization functions******************************/
537
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
538
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
539
-void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
540
-void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
541
-
542
-/* Callbacks Register/UnRegister functions  ***********************************/
543
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
544
-HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
545
-HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
546
-
547
-HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
548
-HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
549
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
550
-/**
551
-  * @}
552
-  */
553
-
554
-/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
555
-  * @{
556
-  */
557
-/* IO operation functions  ****************************************************/
558
-/******* Blocking mode: Polling */
559
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
560
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
561
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
562
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
563
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
564
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
565
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
566
-
567
-/******* Non-Blocking mode: Interrupt */
568
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
569
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
570
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
571
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
572
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
573
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
574
-
575
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
576
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
577
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
578
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
579
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
580
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
581
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
582
-
583
-/******* Non-Blocking mode: DMA */
584
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
585
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
586
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
587
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
588
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
589
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
590
-
591
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
592
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
593
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
594
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
595
-/**
596
-  * @}
597
-  */
598
-
599
-/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
600
- * @{
601
- */
602
-/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
603
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
604
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
605
-void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
606
-void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
607
-void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
608
-void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
609
-void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
610
-void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
611
-void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
612
-void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
613
-void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
614
-void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
615
-/**
616
-  * @}
617
-  */
618
-
619
-/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
620
-  * @{
621
-  */
622
-/* Peripheral State, Mode and Error functions  *********************************/
623
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
624
-HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
625
-uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
626
-
627
-/**
628
-  * @}
629
-  */
630
-
631
-/**
632
-  * @}
633
-  */
634
-/* Private types -------------------------------------------------------------*/
635
-/* Private variables ---------------------------------------------------------*/
636
-/* Private constants ---------------------------------------------------------*/
637
-/** @defgroup I2C_Private_Constants I2C Private Constants
638
-  * @{
639
-  */
640
-#define I2C_FLAG_MASK                    0x0000FFFFU
641
-#define I2C_MIN_PCLK_FREQ_STANDARD       2000000U     /*!< 2 MHz                     */
642
-#define I2C_MIN_PCLK_FREQ_FAST           4000000U     /*!< 4 MHz                     */
643
-/**
644
-  * @}
645
-  */
646
-
647
-/* Private macros ------------------------------------------------------------*/
648
-/** @defgroup I2C_Private_Macros I2C Private Macros
649
-  * @{
650
-  */
651
-
652
-#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__)             (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
653
-#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__)     (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
654
-#define I2C_FREQRANGE(__PCLK__)                            ((__PCLK__)/1000000U)
655
-#define I2C_RISE_TIME(__FREQRANGE__, __SPEED__)            (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
656
-#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__)            ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
657
-#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
658
-#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__)      (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
659
-                                                                  ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
660
-                                                                  ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
661
-
662
-#define I2C_7BIT_ADD_WRITE(__ADDRESS__)                    ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
663
-#define I2C_7BIT_ADD_READ(__ADDRESS__)                     ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
664
-
665
-#define I2C_10BIT_ADDRESS(__ADDRESS__)                     ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
666
-#define I2C_10BIT_HEADER_WRITE(__ADDRESS__)                ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
667
-#define I2C_10BIT_HEADER_READ(__ADDRESS__)                 ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
668
-
669
-#define I2C_MEM_ADD_MSB(__ADDRESS__)                       ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
670
-#define I2C_MEM_ADD_LSB(__ADDRESS__)                       ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
671
-
672
-/** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
673
-  * @{
674
-  */
675
-#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
676
-                                  ((CYCLE) == I2C_DUTYCYCLE_16_9))
677
-#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
678
-                                         ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
679
-#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
680
-                                      ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
681
-#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
682
-                                   ((CALL) == I2C_GENERALCALL_ENABLE))
683
-#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
684
-                                    ((STRETCH) == I2C_NOSTRETCH_ENABLE))
685
-#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
686
-                                  ((SIZE) == I2C_MEMADD_SIZE_16BIT))
687
-#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
688
-#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
689
-#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
690
-#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST)      (((REQUEST) == I2C_FIRST_FRAME)              || \
691
-                                                       ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME)     || \
692
-                                                       ((REQUEST) == I2C_NEXT_FRAME)               || \
693
-                                                       ((REQUEST) == I2C_FIRST_AND_LAST_FRAME)     || \
694
-                                                       ((REQUEST) == I2C_LAST_FRAME)               || \
695
-                                                       ((REQUEST) == I2C_LAST_FRAME_NO_STOP)       || \
696
-                                                       IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
697
-
698
-#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME)     || \
699
-                                                        ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
700
-
701
-#define I2C_CHECK_FLAG(__ISR__, __FLAG__)         ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
702
-#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__)      ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
703
-/**
704
-  * @}
705
-  */
706
-
707
-/**
708
-  * @}
709
-  */
710
-
711
-/* Private functions ---------------------------------------------------------*/
712
-/** @defgroup I2C_Private_Functions I2C Private Functions
713
-  * @{
714
-  */
715
-
716
-/**
717
-  * @}
718
-  */
719
-
720
-/**
721
-  * @}
722
-  */
723
-
724
-/**
725
-  * @}
726
-  */
727
-
728
-#ifdef __cplusplus
729
-}
730
-#endif
731
-
732
-
733
-#endif /* __STM32F1xx_HAL_I2C_H */
734
-
735
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

File diff suppressed because it is too large
+ 0 - 2414
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c


File diff suppressed because it is too large
+ 0 - 1323
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c


+ 0 - 330
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_crc.c

@@ -1,330 +0,0 @@
1
-/**
2
-  ******************************************************************************
3
-  * @file    stm32f1xx_hal_crc.c
4
-  * @author  MCD Application Team
5
-  * @brief   CRC HAL module driver.
6
-  *          This file provides firmware functions to manage the following
7
-  *          functionalities of the Cyclic Redundancy Check (CRC) peripheral:
8
-  *           + Initialization and de-initialization functions
9
-  *           + Peripheral Control functions
10
-  *           + Peripheral State functions
11
-  *
12
-  @verbatim
13
- ===============================================================================
14
-                     ##### How to use this driver #####
15
- ===============================================================================
16
-    [..]
17
-         (+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
18
-         (+) Initialize CRC calculator
19
-             (++) specify generating polynomial (peripheral default or non-default one)
20
-             (++) specify initialization value (peripheral default or non-default one)
21
-             (++) specify input data format
22
-             (++) specify input or output data inversion mode if any
23
-         (+) Use HAL_CRC_Accumulate() function to compute the CRC value of the
24
-             input data buffer starting with the previously computed CRC as
25
-             initialization value
26
-         (+) Use HAL_CRC_Calculate() function to compute the CRC value of the
27
-             input data buffer starting with the defined initialization value
28
-             (default or non-default) to initiate CRC calculation
29
-
30
-  @endverbatim
31
-  ******************************************************************************
32
-  * @attention
33
-  *
34
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
35
-  * All rights reserved.</center></h2>
36
-  *
37
-  * This software component is licensed by ST under BSD 3-Clause license,
38
-  * the "License"; You may not use this file except in compliance with the
39
-  * License. You may obtain a copy of the License at:
40
-  *                        opensource.org/licenses/BSD-3-Clause
41
-  *
42
-  ******************************************************************************
43
-  */
44
-
45
-/* Includes ------------------------------------------------------------------*/
46
-#include "stm32f1xx_hal.h"
47
-
48
-/** @addtogroup STM32F1xx_HAL_Driver
49
-  * @{
50
-  */
51
-
52
-/** @defgroup CRC CRC
53
-  * @brief CRC HAL module driver.
54
-  * @{
55
-  */
56
-
57
-#ifdef HAL_CRC_MODULE_ENABLED
58
-
59
-/* Private typedef -----------------------------------------------------------*/
60
-/* Private define ------------------------------------------------------------*/
61
-/* Private macro -------------------------------------------------------------*/
62
-/* Private variables ---------------------------------------------------------*/
63
-/* Private function prototypes -----------------------------------------------*/
64
-
65
-/* Exported functions --------------------------------------------------------*/
66
-
67
-/** @defgroup CRC_Exported_Functions CRC Exported Functions
68
-  * @{
69
-  */
70
-
71
-/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
72
- *  @brief    Initialization and Configuration functions.
73
- *
74
-@verbatim
75
- ===============================================================================
76
-            ##### Initialization and de-initialization functions #####
77
- ===============================================================================
78
-    [..]  This section provides functions allowing to:
79
-      (+) Initialize the CRC according to the specified parameters
80
-          in the CRC_InitTypeDef and create the associated handle
81
-      (+) DeInitialize the CRC peripheral
82
-      (+) Initialize the CRC MSP (MCU Specific Package)
83
-      (+) DeInitialize the CRC MSP
84
-
85
-@endverbatim
86
-  * @{
87
-  */
88
-
89
-/**
90
-  * @brief  Initialize the CRC according to the specified
91
-  *         parameters in the CRC_InitTypeDef and create the associated handle.
92
-  * @param  hcrc CRC handle
93
-  * @retval HAL status
94
-  */
95
-HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
96
-{
97
-  /* Check the CRC handle allocation */
98
-  if (hcrc == NULL)
99
-  {
100
-    return HAL_ERROR;
101
-  }
102
-
103
-  /* Check the parameters */
104
-  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
105
-
106
-  if (hcrc->State == HAL_CRC_STATE_RESET)
107
-  {
108
-    /* Allocate lock resource and initialize it */
109
-    hcrc->Lock = HAL_UNLOCKED;
110
-    /* Init the low level hardware */
111
-    HAL_CRC_MspInit(hcrc);
112
-  }
113
-
114
-  /* Change CRC peripheral state */
115
-  hcrc->State = HAL_CRC_STATE_READY;
116
-
117
-  /* Return function status */
118
-  return HAL_OK;
119
-}
120
-
121
-/**
122
-  * @brief  DeInitialize the CRC peripheral.
123
-  * @param  hcrc CRC handle
124
-  * @retval HAL status
125
-  */
126
-HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
127
-{
128
-  /* Check the CRC handle allocation */
129
-  if (hcrc == NULL)
130
-  {
131
-    return HAL_ERROR;
132
-  }
133
-
134
-  /* Check the parameters */
135
-  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
136
-
137
-  /* Check the CRC peripheral state */
138
-  if (hcrc->State == HAL_CRC_STATE_BUSY)
139
-  {
140
-    return HAL_BUSY;
141
-  }
142
-
143
-  /* Change CRC peripheral state */
144
-  hcrc->State = HAL_CRC_STATE_BUSY;
145
-
146
-  /* Reset CRC calculation unit */
147
-  __HAL_CRC_DR_RESET(hcrc);
148
-
149
-  /* Reset IDR register content */
150
-  CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
151
-
152
-  /* DeInit the low level hardware */
153
-  HAL_CRC_MspDeInit(hcrc);
154
-
155
-  /* Change CRC peripheral state */
156
-  hcrc->State = HAL_CRC_STATE_RESET;
157
-
158
-  /* Process unlocked */
159
-  __HAL_UNLOCK(hcrc);
160
-
161
-  /* Return function status */
162
-  return HAL_OK;
163
-}
164
-
165
-/**
166
-  * @brief  Initializes the CRC MSP.
167
-  * @param  hcrc CRC handle
168
-  * @retval None
169
-  */
170
-__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
171
-{
172
-  /* Prevent unused argument(s) compilation warning */
173
-  UNUSED(hcrc);
174
-
175
-  /* NOTE : This function should not be modified, when the callback is needed,
176
-            the HAL_CRC_MspInit can be implemented in the user file
177
-   */
178
-}
179
-
180
-/**
181
-  * @brief  DeInitialize the CRC MSP.
182
-  * @param  hcrc CRC handle
183
-  * @retval None
184
-  */
185
-__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
186
-{
187
-  /* Prevent unused argument(s) compilation warning */
188
-  UNUSED(hcrc);
189
-
190
-  /* NOTE : This function should not be modified, when the callback is needed,
191
-            the HAL_CRC_MspDeInit can be implemented in the user file
192
-   */
193
-}
194
-
195
-/**
196
-  * @}
197
-  */
198
-
199
-/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
200
- *  @brief    management functions.
201
- *
202
-@verbatim
203
- ===============================================================================
204
-                      ##### Peripheral Control functions #####
205
- ===============================================================================
206
-    [..]  This section provides functions allowing to:
207
-      (+) compute the 32-bit CRC value of a 32-bit data buffer
208
-          using combination of the previous CRC value and the new one.
209
-
210
-       [..]  or
211
-
212
-      (+) compute the 32-bit CRC value of a 32-bit data buffer
213
-          independently of the previous CRC value.
214
-
215
-@endverbatim
216
-  * @{
217
-  */
218
-
219
-/**
220
-  * @brief  Compute the 32-bit CRC value of a 32-bit data buffer
221
-  *         starting with the previously computed CRC as initialization value.
222
-  * @param  hcrc CRC handle
223
-  * @param  pBuffer pointer to the input data buffer.
224
-  * @param  BufferLength input data buffer length (number of uint32_t words).
225
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
226
-  */
227
-uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
228
-{
229
-  uint32_t index;      /* CRC input data buffer index */
230
-  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
231
-
232
-  /* Change CRC peripheral state */
233
-  hcrc->State = HAL_CRC_STATE_BUSY;
234
-
235
-  /* Enter Data to the CRC calculator */
236
-  for (index = 0U; index < BufferLength; index++)
237
-  {
238
-    hcrc->Instance->DR = pBuffer[index];
239
-  }
240
-  temp = hcrc->Instance->DR;
241
-
242
-  /* Change CRC peripheral state */
243
-  hcrc->State = HAL_CRC_STATE_READY;
244
-
245
-  /* Return the CRC computed value */
246
-  return temp;
247
-}
248
-
249
-/**
250
-  * @brief  Compute the 32-bit CRC value of a 32-bit data buffer
251
-  *         starting with hcrc->Instance->INIT as initialization value.
252
-  * @param  hcrc CRC handle
253
-  * @param  pBuffer pointer to the input data buffer.
254
-  * @param  BufferLength input data buffer length (number of uint32_t words).
255
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
256
-  */
257
-uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
258
-{
259
-  uint32_t index;      /* CRC input data buffer index */
260
-  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
261
-
262
-  /* Change CRC peripheral state */
263
-  hcrc->State = HAL_CRC_STATE_BUSY;
264
-
265
-  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
266
-  *  written in hcrc->Instance->DR) */
267
-  __HAL_CRC_DR_RESET(hcrc);
268
-
269
-  /* Enter 32-bit input data to the CRC calculator */
270
-  for (index = 0U; index < BufferLength; index++)
271
-  {
272
-    hcrc->Instance->DR = pBuffer[index];
273
-  }
274
-  temp = hcrc->Instance->DR;
275
-
276
-  /* Change CRC peripheral state */
277
-  hcrc->State = HAL_CRC_STATE_READY;
278
-
279
-  /* Return the CRC computed value */
280
-  return temp;
281
-}
282
-
283
-/**
284
-  * @}
285
-  */
286
-
287
-/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
288
- *  @brief    Peripheral State functions.
289
- *
290
-@verbatim
291
- ===============================================================================
292
-                      ##### Peripheral State functions #####
293
- ===============================================================================
294
-    [..]
295
-    This subsection permits to get in run-time the status of the peripheral.
296
-
297
-@endverbatim
298
-  * @{
299
-  */
300
-
301
-/**
302
-  * @brief  Return the CRC handle state.
303
-  * @param  hcrc CRC handle
304
-  * @retval HAL state
305
-  */
306
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
307
-{
308
-  /* Return CRC handle state */
309
-  return hcrc->State;
310
-}
311
-
312
-/**
313
-  * @}
314
-  */
315
-
316
-/**
317
-  * @}
318
-  */
319
-
320
-
321
-#endif /* HAL_CRC_MODULE_ENABLED */
322
-/**
323
-  * @}
324
-  */
325
-
326
-/**
327
-  * @}
328
-  */
329
-
330
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

File diff suppressed because it is too large
+ 0 - 7187
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c


+ 78 - 0
Inc/Bootloader.h

@@ -0,0 +1,78 @@
1
+/*
2
+ * Bootloader.h
3
+ *
4
+ *  Created on: Jul 10, 2019
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef BOOTLOADER_H_
9
+#define BOOTLOADER_H_
10
+#include "main.h"
11
+
12
+extern uint8_t * UpdateFiledata;
13
+
14
+typedef struct{
15
+	uint8_t bluecell_header01;
16
+	uint8_t bluecell_header02;
17
+	uint8_t bluecell_header03;
18
+	uint8_t bluecell_header04;
19
+	uint8_t bluecell_type;
20
+	uint8_t bluecell_length_h;
21
+	uint8_t bluecell_length_l;
22
+	uint8_t bluecell_data[2048];
23
+}Blueprotocol_t;
24
+typedef enum {
25
+	BLUECELL_HEADER00 = 0,
26
+	BLUECELL_HEADER01,
27
+	BLUECELL_HEADER02,
28
+	BLUECELL_HEADER03,
29
+	BLUECELL_TYPE,
30
+	BLUECELL_LENGTH_H,
31
+	BLUECELL_LENGTH_L,
32
+	BLUECELL_UPDATACNT_H,
33
+	BLUECELL_UPDATACNT_L,
34
+	BLUECELL_DATA,
35
+}Bluenum;
36
+typedef enum {
37
+	BLUECELL_RESET = 0,
38
+	BLUECELL_START,
39
+	BLUECELL_SENDING,
40
+	BLUECELL_END,
41
+}updateseq;
42
+typedef enum updateseqok
43
+{
44
+    UpdateResetOK = 0,
45
+    UpdateStartOK,
46
+    UpdateSendingOK,
47
+    UpdateEndOK,
48
+};
49
+typedef enum{
50
+    bluecell_stx = 0,
51
+    bluecell_type = 1,
52
+    bluecell_length,
53
+	bluecell_CrcIndex,
54
+    bluecell_crc,
55
+    bluecell_ext,   
56
+}FirmwareUpdate_t;
57
+
58
+/*bluecell Header*/
59
+#define Bluecell_Header0  0x42//ASCII : B
60
+#define Bluecell_Header1  0x4C//ASCII : L
61
+#define Bluecell_Header2  0x55//ASCII : U
62
+#define Bluecell_Header3  0x45//ASCII : E
63
+/*bluecell type*/
64
+#define Bluecell_Reset  0x0A//ASCII : R
65
+#define Bluecell_Firmupdate_start     0x55//ASCII : U
66
+#define Bluecell_Firmupdate_sending   0x53//ASCII : S
67
+#define Bluecell_Firmupdate_end       0x65//ASCII : e
68
+#define Bluecell_Endbyte 0xED
69
+
70
+#define bluecell_Firmupdate_sendlength  1024
71
+
72
+#define bluecell_Firmupdate_Ackbytelength 12
73
+
74
+extern void FirmwareUpdate_Boot(void);
75
+
76
+
77
+extern void Firmware_BootStart_Signal();
78
+#endif /* BOOTLOADER_H_ */

Bluecell_Inc/CRC.h → Inc/CRC.h


+ 13 - 0
Inc/MBIC_BootLoader.h

@@ -0,0 +1,13 @@
1
+/*
2
+ * MBIC_BootLoader.h
3
+ *
4
+ *  Created on: 2020. 5. 4.
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef MBIC_BOOTLOADER_H_
9
+#define MBIC_BOOTLOADER_H_
10
+
11
+
12
+
13
+#endif /* MBIC_BOOTLOADER_H_ */

+ 25 - 0
Inc/flash.h

@@ -0,0 +1,25 @@
1
+/*
2
+ * flash.h
3
+ *
4
+ *  Created on: 2019. 7. 4.
5
+ *      Author: parkyj
6
+ */
7
+
8
+#ifndef FLASH_H_
9
+#define FLASH_H_
10
+
11
+#include "main.h"
12
+#include "CRC.h"
13
+
14
+#define FLASH_USER_START_ADDR ((uint32_t)0x08004000)
15
+#define FLASH_USER_END_ADDR     FLASH_USER_START_ADDR + ((uint32_t)0x000FFFF)   /* End @ of user Flash area */
16
+#define APPLICATION_ADDRESS     (uint32_t)0x08004000      /* Start user code address: ADDR_FLASH_PAGE_8 */
17
+
18
+
19
+#define FirmwareUpdataAck  0x11
20
+#define FirmwareUpdataNak  0x22
21
+
22
+#define FirmwareUpdateDelay 50
23
+
24
+
25
+#endif /* FLASH_H_ */

+ 1 - 111
Inc/main.h

@@ -32,7 +32,7 @@ extern "C" {
32 32
 
33 33
 /* Private includes ----------------------------------------------------------*/
34 34
 /* USER CODE BEGIN Includes */
35
-#include "Bluecell_operate.h"
35
+
36 36
 /* USER CODE END Includes */
37 37
 
38 38
 /* Exported types ------------------------------------------------------------*/
@@ -55,124 +55,14 @@ extern "C" {
55 55
 void Error_Handler(void);
56 56
 
57 57
 /* USER CODE BEGIN EFP */
58
-extern volatile uint16_t ADC1value[4];
59
-extern volatile uint16_t ADC3value[5];
60
-extern volatile uint32_t ADC1_Average_value[4];
61
-extern volatile uint32_t ADC3_Average_value[5];
62
-
63
-extern uint16_t adc1cnt;
64
-extern uint16_t adc3cnt;
65 58
 
66
-extern ADC_HandleTypeDef hadc1;
67
-extern ADC_HandleTypeDef hadc3;
68
-extern I2C_HandleTypeDef hi2c2;
69 59
 
70 60
 
71 61
 /* USER CODE END EFP */
72 62
 
73 63
 /* Private defines -----------------------------------------------------------*/
74
-#define LED_FAIL_Pin GPIO_PIN_3
75
-#define LED_FAIL_GPIO_Port GPIOE
76
-#define FAIL_MBIC_Pin GPIO_PIN_4
77
-#define FAIL_MBIC_GPIO_Port GPIOE
78 64
 #define BOOT_LED_Pin GPIO_PIN_15
79 65
 #define BOOT_LED_GPIO_Port GPIOC
80
-#define DET_UL4_OUT_Pin GPIO_PIN_6
81
-#define DET_UL4_OUT_GPIO_Port GPIOF
82
-#define DET_DL1_IN_Pin GPIO_PIN_7
83
-#define DET_DL1_IN_GPIO_Port GPIOF
84
-#define DET_DL2_IN_Pin GPIO_PIN_8
85
-#define DET_DL2_IN_GPIO_Port GPIOF
86
-#define DET_DL3_IN_Pin GPIO_PIN_9
87
-#define DET_DL3_IN_GPIO_Port GPIOF
88
-#define DET_DL4_IN_Pin GPIO_PIN_10
89
-#define DET_DL4_IN_GPIO_Port GPIOF
90
-#define RFU_TEMP_Pin GPIO_PIN_2
91
-#define RFU_TEMP_GPIO_Port GPIOC
92
-#define RFU_TX_Pin GPIO_PIN_2
93
-#define RFU_TX_GPIO_Port GPIOA
94
-#define RFU_RX_Pin GPIO_PIN_3
95
-#define RFU_RX_GPIO_Port GPIOA
96
-#define DET_UL1_OUT_Pin GPIO_PIN_4
97
-#define DET_UL1_OUT_GPIO_Port GPIOA
98
-#define DET_UL2_OUT_Pin GPIO_PIN_5
99
-#define DET_UL2_OUT_GPIO_Port GPIOA
100
-#define DET_UL3_OUT_Pin GPIO_PIN_6
101
-#define DET_UL3_OUT_GPIO_Port GPIOA
102
-#define ATT_CLOCK3_Pin GPIO_PIN_0
103
-#define ATT_CLOCK3_GPIO_Port GPIOG
104
-#define ATT_DATA3_Pin GPIO_PIN_1
105
-#define ATT_DATA3_GPIO_Port GPIOG
106
-#define ATT_CLOCK4_Pin GPIO_PIN_10
107
-#define ATT_CLOCK4_GPIO_Port GPIOE
108
-#define ATT_DATA4_Pin GPIO_PIN_11
109
-#define ATT_DATA4_GPIO_Port GPIOE
110
-#define ATT_EN_DL4_Pin GPIO_PIN_12
111
-#define ATT_EN_DL4_GPIO_Port GPIOE
112
-#define ATT_EN_UL4_Pin GPIO_PIN_13
113
-#define ATT_EN_UL4_GPIO_Port GPIOE
114
-#define PATH_EN_DL4_Pin GPIO_PIN_14
115
-#define PATH_EN_DL4_GPIO_Port GPIOE
116
-#define PATH_EN_UL4_Pin GPIO_PIN_15
117
-#define PATH_EN_UL4_GPIO_Port GPIOE
118
-#define EEPROM_SCL_Pin GPIO_PIN_10
119
-#define EEPROM_SCL_GPIO_Port GPIOB
120
-#define EEPROM_SDA_Pin GPIO_PIN_11
121
-#define EEPROM_SDA_GPIO_Port GPIOB
122
-#define ATT_EN_UL1_Pin GPIO_PIN_14
123
-#define ATT_EN_UL1_GPIO_Port GPIOB
124
-#define PATH_EN_DL1_Pin GPIO_PIN_15
125
-#define PATH_EN_DL1_GPIO_Port GPIOB
126
-#define PATH_EN_DL2_Pin GPIO_PIN_10
127
-#define PATH_EN_DL2_GPIO_Port GPIOD
128
-#define PATH_EN_UL2_Pin GPIO_PIN_11
129
-#define PATH_EN_UL2_GPIO_Port GPIOD
130
-#define LED_ACT_Pin GPIO_PIN_14
131
-#define LED_ACT_GPIO_Port GPIOD
132
-#define ATT_EN_DL3_Pin GPIO_PIN_2
133
-#define ATT_EN_DL3_GPIO_Port GPIOG
134
-#define ATT_EN_UL3_Pin GPIO_PIN_3
135
-#define ATT_EN_UL3_GPIO_Port GPIOG
136
-#define PATH_EN_DL3_Pin GPIO_PIN_4
137
-#define PATH_EN_DL3_GPIO_Port GPIOG
138
-#define PATH_EN_UL3_Pin GPIO_PIN_5
139
-#define PATH_EN_UL3_GPIO_Port GPIOG
140
-#define _PATH_SW1_Pin GPIO_PIN_8
141
-#define _PATH_SW1_GPIO_Port GPIOG
142
-#define PATH_EN_UL1_Pin GPIO_PIN_6
143
-#define PATH_EN_UL1_GPIO_Port GPIOC
144
-#define MBIC_UP_Pin GPIO_PIN_9
145
-#define MBIC_UP_GPIO_Port GPIOA
146
-#define MBIC_DOWN_Pin GPIO_PIN_10
147
-#define MBIC_DOWN_GPIO_Port GPIOA
148
-#define ATT_CLOCK2_Pin GPIO_PIN_2
149
-#define ATT_CLOCK2_GPIO_Port GPIOD
150
-#define ATT_DATA2_Pin GPIO_PIN_3
151
-#define ATT_DATA2_GPIO_Port GPIOD
152
-#define ATT_EN_DL2_Pin GPIO_PIN_4
153
-#define ATT_EN_DL2_GPIO_Port GPIOD
154
-#define ATT_EN_UL2_Pin GPIO_PIN_7
155
-#define ATT_EN_UL2_GPIO_Port GPIOD
156
-#define PATH_SW1_Pin GPIO_PIN_9
157
-#define PATH_SW1_GPIO_Port GPIOG
158
-#define _PATH_SW2_Pin GPIO_PIN_10
159
-#define _PATH_SW2_GPIO_Port GPIOG
160
-#define PATH_SW2_Pin GPIO_PIN_11
161
-#define PATH_SW2_GPIO_Port GPIOG
162
-#define _PATH_SW3_Pin GPIO_PIN_12
163
-#define _PATH_SW3_GPIO_Port GPIOG
164
-#define PATH_SW3_Pin GPIO_PIN_13
165
-#define PATH_SW3_GPIO_Port GPIOG
166
-#define _PATH_SW4_Pin GPIO_PIN_14
167
-#define _PATH_SW4_GPIO_Port GPIOG
168
-#define PATH_SW4_Pin GPIO_PIN_15
169
-#define PATH_SW4_GPIO_Port GPIOG
170
-#define ATT_CLOCK1_Pin GPIO_PIN_6
171
-#define ATT_CLOCK1_GPIO_Port GPIOB
172
-#define ATT_DATA1_Pin GPIO_PIN_7
173
-#define ATT_DATA1_GPIO_Port GPIOB
174
-#define ATT_EN_DL1_Pin GPIO_PIN_9
175
-#define ATT_EN_DL1_GPIO_Port GPIOB
176 66
 /* USER CODE BEGIN Private defines */
177 67
 
178 68
 /* USER CODE END Private defines */

+ 3 - 3
Inc/stm32f1xx_hal_conf.h

@@ -33,19 +33,19 @@
33 33
   */
34 34
   
35 35
 #define HAL_MODULE_ENABLED  
36
-  #define HAL_ADC_MODULE_ENABLED
36
+  /*#define HAL_ADC_MODULE_ENABLED   */
37 37
 /*#define HAL_CRYP_MODULE_ENABLED   */
38 38
 /*#define HAL_CAN_MODULE_ENABLED   */
39 39
 /*#define HAL_CAN_LEGACY_MODULE_ENABLED   */
40 40
 /*#define HAL_CEC_MODULE_ENABLED   */
41 41
 /*#define HAL_CORTEX_MODULE_ENABLED   */
42
-#define HAL_CRC_MODULE_ENABLED
42
+/*#define HAL_CRC_MODULE_ENABLED   */
43 43
 /*#define HAL_DAC_MODULE_ENABLED   */
44 44
 #define HAL_DMA_MODULE_ENABLED
45 45
 /*#define HAL_ETH_MODULE_ENABLED   */
46 46
 /*#define HAL_FLASH_MODULE_ENABLED   */
47 47
 #define HAL_GPIO_MODULE_ENABLED
48
-#define HAL_I2C_MODULE_ENABLED
48
+/*#define HAL_I2C_MODULE_ENABLED   */
49 49
 /*#define HAL_I2S_MODULE_ENABLED   */
50 50
 /*#define HAL_IRDA_MODULE_ENABLED   */
51 51
 /*#define HAL_IWDG_MODULE_ENABLED   */

+ 0 - 6
Inc/stm32f1xx_it.h

@@ -56,16 +56,10 @@ void SVC_Handler(void);
56 56
 void DebugMon_Handler(void);
57 57
 void PendSV_Handler(void);
58 58
 void SysTick_Handler(void);
59
-void DMA1_Channel1_IRQHandler(void);
60 59
 void DMA1_Channel4_IRQHandler(void);
61 60
 void DMA1_Channel5_IRQHandler(void);
62
-void ADC1_2_IRQHandler(void);
63
-void TIM2_IRQHandler(void);
64 61
 void USART1_IRQHandler(void);
65
-void USART2_IRQHandler(void);
66
-void ADC3_IRQHandler(void);
67 62
 void TIM6_IRQHandler(void);
68
-void DMA2_Channel4_5_IRQHandler(void);
69 63
 /* USER CODE BEGIN EFP */
70 64
 
71 65
 /* USER CODE END EFP */

Bluecell_Inc/uart.h → Inc/uart.h


File diff suppressed because it is too large
+ 42 - 42
STM32F103ZET_JDASMBIC.elf.launch


File diff suppressed because it is too large
+ 45 - 382
STM32F103ZET_JDASMBIC.ioc


+ 1 - 1
STM32F103ZE_FLASH.ld

@@ -62,7 +62,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
62 62
 MEMORY
63 63
 {
64 64
 RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 64K
65
-FLASH (rx)      : ORIGIN = 0x8004000, LENGTH = 512K - 16K
65
+FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 512K
66 66
 }
67 67
 
68 68
 /* Define output sections */

+ 46 - 0
Src/Bootloader.c

@@ -0,0 +1,46 @@
1
+/*
2
+ * Bootloader.c
3
+ *
4
+ *  Created on: Jul 10, 2019
5
+ *      Author: parkyj
6
+ */
7
+#include <Bootloader.h>
8
+#include <flash.h>
9
+//Blueprotocol_t * UpdateFiledata;
10
+uint16_t updatecnt = 0;
11
+/***
12
+ * Header Check Function
13
+ * ***/
14
+#define Bluecell_BootStart 0x0b
15
+
16
+
17
+uint8_t BootStartdata[6] = {0xbe,Bluecell_BootStart,0x03,4,0,0xeb};
18
+void Firmware_BootStart_Signal(){
19
+	BootStartdata[bluecell_crc] = STH30_CreateCrc(&BootStartdata[bluecell_type],BootStartdata[bluecell_length]);
20
+    Uart1_Data_Send(&BootStartdata[bluecell_stx],BootStartdata[bluecell_length] + 3);
21
+}
22
+
23
+    uint8_t AckData_Buf[6] = {0xbe,FirmwareUpdataAck,0x03,5,0,0xbe};
24
+void FirmwareUpdateStart(uint8_t* data){
25
+    uint8_t ret = 0,crccheck = 0;
26
+    crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]);
27
+    if(crccheck == NO_ERROR){
28
+        AckData_Buf[bluecell_type] = FirmwareUpdataAck;
29
+        if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte
30
+            ret = Flash_write(&data[0]);
31
+        if(ret == 1)
32
+            AckData_Buf[bluecell_type] = FirmwareUpdataNak;
33
+    }else{
34
+        for(uint8_t i = 0; i < data[bluecell_length] + 3; i++)
35
+            printf("%02x ",data[i]);
36
+        printf("Check Sum error \n");
37
+        AckData_Buf[bluecell_type] = FirmwareUpdataNak;
38
+    }
39
+    AckData_Buf[bluecell_crc] = STH30_CreateCrc(&AckData_Buf[bluecell_type],AckData_Buf[bluecell_length]);
40
+    if(data[bluecell_type] != 0xEE && data[bluecell_type] != Bluecell_Reset){
41
+        Uart1_Data_Send(&AckData_Buf[bluecell_stx],AckData_Buf[bluecell_length] + 3);
42
+    }
43
+    if(data[bluecell_type] == 0xEE)
44
+        printf("update Complete \n");
45
+}
46
+

+ 1 - 1
Bluecell_Src/CRC.c

@@ -9,7 +9,7 @@
9 9
 /*									CRC16	TABLE						    			 */
10 10
 /*---------------------------------------------------------------------------------------*/
11 11
 #include <CRC.h>
12
-#include "uart.h"
12
+#include <uart.h>
13 13
 const unsigned short Table_CRC16[]  = {
14 14
 	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
15 15
 	0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,

+ 8 - 0
Src/MBIC_BootLoader.c

@@ -0,0 +1,8 @@
1
+/*
2
+ * MBIC_BootLoader.c
3
+ *
4
+ *  Created on: 2020. 5. 4.
5
+ *      Author: parkyj
6
+ */
7
+
8
+

+ 106 - 0
Src/flash.c

@@ -0,0 +1,106 @@
1
+/*
2
+ * flash.c
3
+ *
4
+ *  Created on: 2019. 7. 15.
5
+ *      Author: parkyj
6
+ */
7
+#include <Bootloader.h>
8
+#include <flash.h>
9
+uint8_t flashinit = 0;
10
+uint32_t Address = FLASH_USER_START_ADDR;
11
+
12
+typedef void (*fptr)(void);
13
+fptr jump_to_app;
14
+uint32_t jump_addr;
15
+void Jump_App(void){
16
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
17
+    printf("boot loader start\n");               //硫붿꽭占�? 異쒕젰
18
+    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
19
+    jump_to_app = (fptr) jump_addr;
20
+    
21
+    /* init user app's sp */
22
+    printf("jump!\n");
23
+    __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
24
+    jump_to_app();
25
+}
26
+
27
+
28
+void FLASH_If_Init(void)
29
+{
30
+  /* Unlock the Program memory */
31
+  HAL_FLASH_Unlock();
32
+
33
+  /* Clear all FLASH flags */
34
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
35
+  /* Unlock the Program memory */
36
+  HAL_FLASH_Lock();
37
+}
38
+
39
+void Flash_InitRead(void) // ?占쏙옙湲고븿?占쏙옙
40
+{
41
+    uint32_t  Address = 0;
42
+    Address = FLASH_USER_START_ADDR;
43
+    for(uint32_t i = 0; i < 16; i++ ){
44
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
45
+        Address++;
46
+    }
47
+#if 0 // PYJ.2019.03.27_BEGIN -- 
48
+    for(uint32_t i = 0; i < 13848; i++ ){
49
+        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
50
+        Address++;
51
+    }
52
+    Address = StartAddr;
53
+    for(uint32_t i = 0; i < 13848; i++ ){
54
+        printf("%02X ",*(uint8_t*)Address);
55
+        Address++;
56
+    }
57
+#endif // PYJ.2019.03.27_END -- 
58
+
59
+}
60
+
61
+uint8_t Flash_RGB_Data_Write(uint8_t* data){
62
+    uint16_t Firmdata = 0;
63
+    uint8_t ret = 0;
64
+    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
65
+        Firmdata  = ((data[(bluecell_length + 1) + i]) & 0x00FF);
66
+        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
67
+        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
68
+            printf("HAL NOT OK \n");
69
+            ret = 1;
70
+        }
71
+        Address += 2;
72
+        //if(!(i%FirmwareUpdateDelay))
73
+      //  HAL_Delay(1);
74
+    }
75
+    return ret;
76
+}
77
+
78
+uint8_t Flash_write(uint8_t* data) // ?占쏙옙湲고븿?占쏙옙
79
+{
80
+
81
+    /*Variable used for Erase procedure*/
82
+    static FLASH_EraseInitTypeDef EraseInitStruct;
83
+    static uint32_t PAGEError = 0;
84
+    uint8_t ret = 0;
85
+    /* Fill EraseInit structure*/
86
+    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
87
+    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
88
+    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
89
+
90
+    __HAL_RCC_TIM6_CLK_DISABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙占�??占쏙옙?占쏙옙?占쏙옙
91
+    HAL_FLASH_Unlock(); // lock ??占�?
92
+    if(flashinit == 0){
93
+        flashinit= 1;
94
+        //FLASH_PageErase(StartAddr);
95
+        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
96
+            printf("Erase Failed \r\n");
97
+        }
98
+    }
99
+//    FLASH_If_Erase();
100
+    ret = Flash_RGB_Data_Write(&data[bluecell_stx]);
101
+    HAL_FLASH_Lock(); // lock ?占쏙옙洹멸린
102
+    __HAL_RCC_TIM6_CLK_ENABLE(); // 留ㅼ씤???占쏙옙癒몌옙?? ?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙?占쏙옙
103
+
104
+    return ret;
105
+
106
+}

+ 36 - 631
Src/main.c

@@ -24,10 +24,7 @@
24 24
 /* Private includes ----------------------------------------------------------*/
25 25
 /* USER CODE BEGIN Includes */
26 26
 #include <stdio.h>
27
-#include "PE43711.h"
28
-#include "uart.h"
29
-#include "Bluecell_operate.h"
30
-#include "eeprom.h"
27
+#include <uart.h>
31 28
 /* USER CODE END Includes */
32 29
 
33 30
 /* Private typedef -----------------------------------------------------------*/
@@ -37,6 +34,7 @@
37 34
 
38 35
 /* Private define ------------------------------------------------------------*/
39 36
 /* USER CODE BEGIN PD */
37
+
40 38
 /* USER CODE END PD */
41 39
 
42 40
 /* Private macro -------------------------------------------------------------*/
@@ -45,36 +43,17 @@
45 43
 /* USER CODE END PM */
46 44
 
47 45
 /* Private variables ---------------------------------------------------------*/
48
-ADC_HandleTypeDef hadc1;
49
-ADC_HandleTypeDef hadc3;
50
-DMA_HandleTypeDef hdma_adc1;
51
-DMA_HandleTypeDef hdma_adc3;
52
-
53
-CRC_HandleTypeDef hcrc;
54
-
55
-I2C_HandleTypeDef hi2c2;
56
-
57 46
 TIM_HandleTypeDef htim6;
58 47
 
59 48
 UART_HandleTypeDef huart1;
60
-UART_HandleTypeDef huart2;
61 49
 DMA_HandleTypeDef hdma_usart1_rx;
62 50
 DMA_HandleTypeDef hdma_usart1_tx;
63 51
 
64 52
 /* USER CODE BEGIN PV */
65
-volatile uint16_t ADC1value[4];
66
-volatile uint16_t ADC3value[5];
67
-volatile uint32_t ADC1_Average_value[4];
68
-volatile uint32_t ADC3_Average_value[5];
69 53
 
70
-volatile uint32_t AdcTimerCnt = 0;
71 54
 volatile uint32_t LedTimerCnt = 0;
72
-volatile uint32_t UartRxTimerCnt = 0;
73
-volatile uint32_t LDTimerCnt = 0;
74
-volatile uint32_t ALCTimerCnt = 0;
75
-volatile uint32_t AGCTimerCnt = 0;
76
-
77
-
55
+volatile uint32_t FirmwareTimerCnt = 0;
56
+volatile uint32_t UartTimerCnt = 0;
78 57
 /* USER CODE END PV */
79 58
 
80 59
 /* Private function prototypes -----------------------------------------------*/
@@ -82,12 +61,7 @@ void SystemClock_Config(void);
82 61
 static void MX_GPIO_Init(void);
83 62
 static void MX_DMA_Init(void);
84 63
 static void MX_USART1_UART_Init(void);
85
-static void MX_ADC1_Init(void);
86
-static void MX_ADC3_Init(void);
87
-static void MX_USART2_UART_Init(void);
88 64
 static void MX_TIM6_Init(void);
89
-static void MX_CRC_Init(void);
90
-static void MX_I2C2_Init(void);
91 65
 static void MX_NVIC_Init(void);
92 66
 /* USER CODE BEGIN PFP */
93 67
 
@@ -95,211 +69,21 @@ static void MX_NVIC_Init(void);
95 69
 
96 70
 /* Private user code ---------------------------------------------------------*/
97 71
 /* USER CODE BEGIN 0 */
98
-void Pol_Delay_us(volatile uint32_t microseconds)
99
-{
100
-  /* Go to number of cycles for system */
101
-  microseconds *= (SystemCoreClock / 1000000);
102
- 
103
-  /* Delay till end */
104
-  while (microseconds--);
105
-}
106
-
107
-
108
-int _write (int file, uint8_t *ptr, uint16_t len)
72
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
109 73
 {
110
-    HAL_UART_Transmit(&huart1, ptr, len,10);
111
-    return len;
112
-}
113
-uint16_t adc1cnt = 0 ;
114
-uint16_t adc3cnt = 0 ;
115
-
116 74
 
117
-void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
118
-{
119
-//?��?��?�� 코드 ?��?��
120
-//만약 ?��?�� adc?���??? �????��?�� ?�� ?��?���??? ?��?���??? ?��?��?? 같이 조건�??? ?��?��
121
-
122
-    if(hadc->Instance == hadc1.Instance)
123
-    {
124
-        if(adc1cnt < 500){
125
-            for(int i = 0; i < 4; i++){
126
-                ADC1_Average_value[i] += ADC1value[i]  ;
127
-            }
128
-            adc1cnt++;
129
-        }
130
-    }
131
-    if(hadc->Instance == hadc3.Instance)
132
-    {
133
-        if(adc3cnt < 500){
134
-            for(int i = 0; i < 5; i++){
135
-                ADC3_Average_value[i] += ADC3value[i]  ;
136
-            }
137
-            adc3cnt++;
138
-        }
75
+    if(htim->Instance == TIM6){
76
+        UartTimerCnt++;
77
+        LedTimerCnt++;
78
+        FirmwareTimerCnt++;
139 79
     }
140
-
141 80
 }
142
-#if 0 // PYJ.2020.04.24_BEGIN -- 
143
-void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
81
+int _write (int file, uint8_t *ptr, uint16_t len)
144 82
 {
145
-
146
-  GPIO_InitTypeDef GPIO_InitStruct;
147
-  if(i2cHandle->Instance==I2C1)
148
-  {
149
-  /* USER CODE BEGIN I2C1_MspInit 0 */
150
-	__HAL_RCC_I2C1_CLK_ENABLE();
151
-  /* USER CODE END I2C1_MspInit 0 */
152
-  
153
-    /**I2C1 GPIO Configuration    
154
-    PB6     ------> I2C1_SCL
155
-    PB7     ------> I2C1_SDA 
156
-    */
157
-    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
158
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
159
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
160
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
161
-
162
-    /* Peripheral clock enable */
163
-    __HAL_RCC_I2C1_CLK_ENABLE();
164
-  /* USER CODE BEGIN I2C1_MspInit 1 */
165
-
166
-  /* USER CODE END I2C1_MspInit 1 */
167
-  }
168
-  else if(i2cHandle->Instance==I2C2)
169
-  {
170
-  /* USER CODE BEGIN I2C2_MspInit 0 */
171
-	__HAL_RCC_I2C2_CLK_ENABLE();
172
-  /* USER CODE END I2C2_MspInit 0 */
173
-  
174
-    /**I2C2 GPIO Configuration    
175
-    PB10     ------> I2C2_SCL
176
-    PB11     ------> I2C2_SDA 
177
-    */
178
-    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
179
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
180
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
181
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
182
-
183
-    /* Peripheral clock enable */
184
-    __HAL_RCC_I2C2_CLK_ENABLE();
185
-  /* USER CODE BEGIN I2C2_MspInit 1 */
186
-
187
-  /* USER CODE END I2C2_MspInit 1 */
188
-  }
189
-#endif // PYJ.2020.04.24_END -- 
190
-
191
-#if 0 // PYJ.2020.04.23_BEGIN -- 
192
-uint8_t eepdata[100];
193
-void eepromtest(){
194
-    memset(&eepdata[0],0x33,100);
195
-    for(int i = 0; i < 100; i ++ ){
196
-        printf("data[%d] : %x \r\n",i,eepdata[i]);
197
-        EEPROM_M24C08_Bytewrite(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
198
-    }  
199
-    for(int i = 0; i < 100; i ++ ){
200
-        EEPROM_M24C08_ByteRead(EEPROM_M24C08_ID,EEPROM_ATT_BASE + i,&eepdata[i],1);
201
-        printf("data[%d] : %x \r\n",i,eepdata[i]);
202
-    }  
203
-//    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_BASE,&eepdata[0],100);
204
-//    for(int i = 0; i < 100; i ++ ){
205
-//        printf("data[%d] : %x \r\n",i,eepdata[i]);
206
-//    }    
207
-
208
-}
209
-uint8_t i2ctest[10] = {22,};
210
-uint8_t i2cTestData[1] = {44};
211
-#endif // PYJ.2020.04.23_END -- 
212
-uint8_t eepromtestarray[1024 * 3];
213
-uint8_t eepromtestReadarray[1024 * 3];
214
-uint8_t eepromtestarray1[EEPROM_WINDOW_STATUS_ADDRESDS];
215
-uint8_t eepromtestReadarray1[EEPROM_WINDOW_STATUS_ADDRESDS];
216
-#define TESTINDEX  sizeof(TEMP_TABLE_st) 
217
-void EEPROMTEST_J(){
218
-#if 0 // PYJ.2020.04.25_BEGIN -- 
219
-      for(int i = 0; i< TESTINDEX; i++)
220
-          eepromtestarray[i] = i;
221
-      printf("Value %x\r\n",eepromtestarray[1]);
222
-    
223
-//        EEPROM_M24C08_write(EEPROM_M24C08_ID ,(EEPROM_TEMP_DL2_TABLE_ADDRESDS),&eepromtestarray[0],TESTINDEX);   
224
-          EEPROM_M24C08_write(EEPROM_M24C08_ID ,(EEPROM_TEMP_DL4_TABLE_ADDRESDS),&eepromtestarray[0],sizeof(TEMP_TABLE_st));                            
225
-          EEPROM_M24C08_Read(EEPROM_M24C08_ID ,(EEPROM_TEMP_DL4_TABLE_ADDRESDS),&eepromtestReadarray[0],sizeof(TEMP_TABLE_st));                                    
226
-
227
-//        EEPROM_M24C08_Read(EEPROM_M24C08_ID ,(EEPROM_TEMP_DL2_TABLE_ADDRESDS),&eepromtestReadarray[0],TESTINDEX);   
228
-    
229
-        for(int i = 0; i< TESTINDEX; i++)
230
-            printf("%d ",eepromtestReadarray[i]);
231
-               printf("\r\n");
232
-#else        
233
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID,EEPROM_ATT_BASE,&eepromtestReadarray[0],sizeof(BLUESTATUS_st) );
234
-    for(int i = 0; i< sizeof(BLUESTATUS_st); i++)
235
-               printf("%d ",eepromtestReadarray[i]);
236
-
237
-#endif // PYJ.2020.04.25_END -- 
238
-
239
-
240
-}
241
-#if 1 // PYJ.2020.04.23_BEGIN -- 
242
-void eepromtest_j1(){
243
-uint8_t ret  = 0;
244
-  for(int i = 0; i < 128; i++)
245
-      eepromtestarray[i] = i;
246
-  printf("Value %x\r\n",eepromtestarray[1]);
247
-  printf("Address Start %x\r\n",EEPROM_WINDOW_STATUS_ADDRESDS);
248
-
249
-#if 0 // PYJ.2020.04.25_BEGIN -- 
250
-  EEPROM_M24C08_write(EEPROM_M24C08_ID ,
251
-                      (EEPROM_ATT_BASE),
252
-                      &eepromtestarray[0],
253
-                      TESTINDEX);
254
-
255
-                      
256
-//  EEPROM_M24C08_write(EEPROM_M24C08_ID ,
257
-//                     (EEPROM_ATT_DL1_TABLE_ADDRESDS),
258
-//                     &eepromtestarray[sizeof(ATT_TABLE_st)],
259
-//                      sizeof(ATT_TABLE_st));
260
-
261
-   EEPROM_M24C08_Read(EEPROM_M24C08_ID ,
262
-                      EEPROM_ATT_BASE             ,
263
-                      &eepromtestReadarray[0],
264
-                      TESTINDEX);
265
-#endif // PYJ.2020.04.25_END -- 
266
-//    EEPROM_M24C08_write(EEPROM_M24C08_ID ,(EEPROM_DET_UL4_TABLE_ADDRESDS),&eepromtestarray[0],sizeof(TEMP_TABLE_st));                    
267
-    //    EEPROM_M24C08_Read(EEPROM_M24C08_ID ,(EEPROM_DET_UL4_TABLE_ADDRESDS),&eepromtestReadarray[0],sizeof(TEMP_TABLE_st) );           
268
-#if 0 // PYJ.2020.04.25_BEGIN -- 
269
-    EEPROM_M24C08_write(EEPROM_M24C08_ID ,(EEPROM_WINDOW_STATUS_ADDRESDS),&eepromtestarray[0],sizeof(ATT_TABLE_st) );
270
-
271
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID ,(EEPROM_WINDOW_STATUS_ADDRESDS),&eepromtestReadarray[0],sizeof(ATT_TABLE_st) );
272
-#else
273
-    EEPROM_M24C08_write(EEPROM_M24C08_ID ,(EEPROM_WINDOW_STATUS_ADDRESDS & 0xFFFF),eepromtestarray,128 );
274
-
275
-    EEPROM_M24C08_Read(EEPROM_M24C08_ID ,(EEPROM_WINDOW_STATUS_ADDRESDS & 0xFFFF),eepromtestReadarray,128 );
276
-
277
-#endif // PYJ.2020.04.25_END -- 
278
-
279
-    for(int i = 0; i< 128 ; i++)
280
-        printf("%x ",eepromtestReadarray[i]);
281
-           printf("\r\n");
282
-
283
-}
284
-#endif // PYJ.2020.04.23_END -- 
285
-#if 0 // PYJ.2020.04.23_BEGIN -- 
286
-void eepromtest_j1(){
287
-  for(int i = 0; i< 128; i++)
288
-        eepromtestarray[i] = i;
289
-
290
-  HAL_I2C_Mem_Write(&hi2c2,0xa0|((0x01&0x0300>>7)),(0x01&0xff),I2C_MEMADD_SIZE_16BIT,eepromtestarray,128,100);
291
-  HAL_Delay(10);
292
-  HAL_I2C_Mem_Read(&hi2c2,0xa0|((0x01&0x0300>>7)),(0x01&0xff),I2C_MEMADD_SIZE_16BIT,eepromtestReadarray,128,100);
293
-    for(int i = 0; i< 128; i++)
294
-        printf("%d ",eepromtestReadarray[i]);
295
-       printf("\r\n");
296
-
297
-
83
+    HAL_UART_Transmit (&huart1, ptr, len, 10);
84
+    return len;
298 85
 }
299
-#endif // PYJ.2020.04.23_END -- 
300
-
301
-extern void ALC_Function();
302
-
86
+extern UARTQUEUE TerminalQueue;
303 87
 /* USER CODE END 0 */
304 88
 
305 89
 /**
@@ -309,7 +93,7 @@ extern void ALC_Function();
309 93
 int main(void)
310 94
 {
311 95
   /* USER CODE BEGIN 1 */
312
-
96
+	uint8_t tempdata[] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
313 97
   /* USER CODE END 1 */
314 98
 
315 99
   /* MCU Configuration--------------------------------------------------------*/
@@ -332,55 +116,29 @@ int main(void)
332 116
   MX_GPIO_Init();
333 117
   MX_DMA_Init();
334 118
   MX_USART1_UART_Init();
335
-  MX_ADC1_Init();
336
-  MX_ADC3_Init();
337
-  MX_USART2_UART_Init();
338 119
   MX_TIM6_Init();
339
-  MX_CRC_Init();
340
-  MX_I2C2_Init();
341 120
 
342 121
   /* Initialize interrupts */
343 122
   MX_NVIC_Init();
344 123
   /* USER CODE BEGIN 2 */
345
-  while(!(HAL_ADCEx_Calibration_Start(&hadc3)==HAL_OK));
346
-  while(!(HAL_ADCEx_Calibration_Start(&hadc1)==HAL_OK));
347
-  HAL_ADC_Start_DMA(&hadc3, (uint16_t*)ADC3value, 5);
348
-  HAL_ADC_Start_DMA(&hadc1, (uint16_t*)ADC1value, 4);
349
-  InitUartQueue(&TerminalQueue);
124
+  HAL_TIM_Base_Start_IT(&htim6);
350 125
   setbuf(stdout, NULL);
351
-  PE43711_PinInit();
352
-  EEPROM_M24C08_Init();
353
-  Bluecell_DataInit();
354
-#if 0 // PYJ.2020.04.22_BEGIN -- 
355
-  EEPROM_M24C08_write(0xA0,0,i2cTestData,1);
356
-  printf("i2c Test Data1 %d\r\n",i2ctest[0]);
357
-  EEPROM_M24C08_Read(0xA0,0x00,i2ctest,2);
358
-  printf("i2c Test Data2 %d\r\n",i2ctest[0]);
359
-  printf("i2c Test Data2 %d\r\n",i2ctest[1]);
360
-#endif // PYJ.2020.04.22_END -- 
126
+  /*printf("Uart Start \r\n");
127
+  printf("Crc generate %x \r\n",CRC16_Generate(tempdata,11));*/
128
+  Firmware_BootStart_Signal();
129
+  InitUartQueue(&TerminalQueue);
361 130
   /* USER CODE END 2 */
362 131
 
363 132
   /* Infinite loop */
364 133
   /* USER CODE BEGIN WHILE */
365
-//    uint16_t ret = 0;
366
-//    EEPROMTEST_J();
367
-//    eepromtest_j1();
368
-//        eepromtest_j1();
369
-
370
-
371
-    
372
-    
373
-
374
-
375
-  printf("Project Start\r\n");
376 134
   while (1)
377 135
   {
378
-//	  HAL_GPIO_TogglePin(GPIOG,GPIO_PIN_14);
379
-    Boot_LED_Toggle();
380
-    Uart_Check();
381
-    ADC_Check();
382
-    ALC_Function();
383
-    AGC_Function();
136
+	 // printf("Uart Start \r\n");
137
+      if(LedTimerCnt > 500){HAL_GPIO_TogglePin(BOOT_LED_GPIO_Port,BOOT_LED_Pin);LedTimerCnt = 0;}
138
+      while (TerminalQueue.data > 0 && UartTimerCnt > 30) GetDataFromUartQueue(&hTerminal);
139
+      while(FirmwareTimerCnt > 3000)  Jump_App();
140
+
141
+	  //HAL_Delay(500);
384 142
     /* USER CODE END WHILE */
385 143
 
386 144
     /* USER CODE BEGIN 3 */
@@ -396,7 +154,6 @@ void SystemClock_Config(void)
396 154
 {
397 155
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
398 156
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
399
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
400 157
 
401 158
   /** Initializes the CPU, AHB and APB busses clocks 
402 159
   */
@@ -405,7 +162,7 @@ void SystemClock_Config(void)
405 162
   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
406 163
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
407 164
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
408
-  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
165
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL15;
409 166
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
410 167
   {
411 168
     Error_Handler();
@@ -423,12 +180,6 @@ void SystemClock_Config(void)
423 180
   {
424 181
     Error_Handler();
425 182
   }
426
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
427
-  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
428
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
429
-  {
430
-    Error_Handler();
431
-  }
432 183
 }
433 184
 
434 185
 /**
@@ -437,236 +188,15 @@ void SystemClock_Config(void)
437 188
   */
438 189
 static void MX_NVIC_Init(void)
439 190
 {
440
-  /* DMA1_Channel1_IRQn interrupt configuration */
441
-  HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
442
-  HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
443 191
   /* DMA1_Channel4_IRQn interrupt configuration */
444 192
   HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
445 193
   HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
446
-  /* DMA1_Channel5_IRQn interrupt configuration */
447
-  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
448
-  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
449 194
   /* USART1_IRQn interrupt configuration */
450 195
   HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
451 196
   HAL_NVIC_EnableIRQ(USART1_IRQn);
452
-  /* USART2_IRQn interrupt configuration */
453
-  HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
454
-  HAL_NVIC_EnableIRQ(USART2_IRQn);
455
-  /* DMA2_Channel4_5_IRQn interrupt configuration */
456
-  HAL_NVIC_SetPriority(DMA2_Channel4_5_IRQn, 0, 0);
457
-  HAL_NVIC_EnableIRQ(DMA2_Channel4_5_IRQn);
458
-  /* TIM6_IRQn interrupt configuration */
459
-  HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
460
-  HAL_NVIC_EnableIRQ(TIM6_IRQn);
461
-  /* ADC3_IRQn interrupt configuration */
462
-  HAL_NVIC_SetPriority(ADC3_IRQn, 0, 0);
463
-  HAL_NVIC_EnableIRQ(ADC3_IRQn);
464
-}
465
-
466
-/**
467
-  * @brief ADC1 Initialization Function
468
-  * @param None
469
-  * @retval None
470
-  */
471
-static void MX_ADC1_Init(void)
472
-{
473
-
474
-  /* USER CODE BEGIN ADC1_Init 0 */
475
-
476
-  /* USER CODE END ADC1_Init 0 */
477
-
478
-  ADC_ChannelConfTypeDef sConfig = {0};
479
-
480
-  /* USER CODE BEGIN ADC1_Init 1 */
481
-
482
-  /* USER CODE END ADC1_Init 1 */
483
-  /** Common config 
484
-  */
485
-  hadc1.Instance = ADC1;
486
-  hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
487
-  hadc1.Init.ContinuousConvMode = ENABLE;
488
-  hadc1.Init.DiscontinuousConvMode = DISABLE;
489
-  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
490
-  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
491
-  hadc1.Init.NbrOfConversion = 4;
492
-  if (HAL_ADC_Init(&hadc1) != HAL_OK)
493
-  {
494
-    Error_Handler();
495
-  }
496
-  /** Configure Regular Channel 
497
-  */
498
-  sConfig.Channel = ADC_CHANNEL_4;
499
-  sConfig.Rank = ADC_REGULAR_RANK_1;
500
-  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
501
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
502
-  {
503
-    Error_Handler();
504
-  }
505
-  /** Configure Regular Channel 
506
-  */
507
-  sConfig.Channel = ADC_CHANNEL_5;
508
-  sConfig.Rank = ADC_REGULAR_RANK_2;
509
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
510
-  {
511
-    Error_Handler();
512
-  }
513
-  /** Configure Regular Channel 
514
-  */
515
-  sConfig.Channel = ADC_CHANNEL_6;
516
-  sConfig.Rank = ADC_REGULAR_RANK_3;
517
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
518
-  {
519
-    Error_Handler();
520
-  }
521
-  /** Configure Regular Channel 
522
-  */
523
-  sConfig.Channel = ADC_CHANNEL_12;
524
-  sConfig.Rank = ADC_REGULAR_RANK_4;
525
-  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
526
-  {
527
-    Error_Handler();
528
-  }
529
-  /* USER CODE BEGIN ADC1_Init 2 */
530
-
531
-  /* USER CODE END ADC1_Init 2 */
532
-
533
-}
534
-
535
-/**
536
-  * @brief ADC3 Initialization Function
537
-  * @param None
538
-  * @retval None
539
-  */
540
-static void MX_ADC3_Init(void)
541
-{
542
-
543
-  /* USER CODE BEGIN ADC3_Init 0 */
544
-
545
-  /* USER CODE END ADC3_Init 0 */
546
-
547
-  ADC_ChannelConfTypeDef sConfig = {0};
548
-
549
-  /* USER CODE BEGIN ADC3_Init 1 */
550
-
551
-  /* USER CODE END ADC3_Init 1 */
552
-  /** Common config 
553
-  */
554
-  hadc3.Instance = ADC3;
555
-  hadc3.Init.ScanConvMode = ADC_SCAN_ENABLE;
556
-  hadc3.Init.ContinuousConvMode = ENABLE;
557
-  hadc3.Init.DiscontinuousConvMode = DISABLE;
558
-  hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
559
-  hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
560
-  hadc3.Init.NbrOfConversion = 5;
561
-  if (HAL_ADC_Init(&hadc3) != HAL_OK)
562
-  {
563
-    Error_Handler();
564
-  }
565
-  /** Configure Regular Channel 
566
-  */
567
-  sConfig.Channel = ADC_CHANNEL_4;
568
-  sConfig.Rank = ADC_REGULAR_RANK_1;
569
-  sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5;
570
-  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
571
-  {
572
-    Error_Handler();
573
-  }
574
-  /** Configure Regular Channel 
575
-  */
576
-  sConfig.Channel = ADC_CHANNEL_5;
577
-  sConfig.Rank = ADC_REGULAR_RANK_2;
578
-  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
579
-  {
580
-    Error_Handler();
581
-  }
582
-  /** Configure Regular Channel 
583
-  */
584
-  sConfig.Channel = ADC_CHANNEL_6;
585
-  sConfig.Rank = ADC_REGULAR_RANK_3;
586
-  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
587
-  {
588
-    Error_Handler();
589
-  }
590
-  /** Configure Regular Channel 
591
-  */
592
-  sConfig.Channel = ADC_CHANNEL_7;
593
-  sConfig.Rank = ADC_REGULAR_RANK_4;
594
-  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
595
-  {
596
-    Error_Handler();
597
-  }
598
-  /** Configure Regular Channel 
599
-  */
600
-  sConfig.Channel = ADC_CHANNEL_8;
601
-  sConfig.Rank = ADC_REGULAR_RANK_5;
602
-  if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
603
-  {
604
-    Error_Handler();
605
-  }
606
-  /* USER CODE BEGIN ADC3_Init 2 */
607
-
608
-  /* USER CODE END ADC3_Init 2 */
609
-
610
-}
611
-
612
-/**
613
-  * @brief CRC Initialization Function
614
-  * @param None
615
-  * @retval None
616
-  */
617
-static void MX_CRC_Init(void)
618
-{
619
-
620
-  /* USER CODE BEGIN CRC_Init 0 */
621
-
622
-  /* USER CODE END CRC_Init 0 */
623
-
624
-  /* USER CODE BEGIN CRC_Init 1 */
625
-
626
-  /* USER CODE END CRC_Init 1 */
627
-  hcrc.Instance = CRC;
628
-  if (HAL_CRC_Init(&hcrc) != HAL_OK)
629
-  {
630
-    Error_Handler();
631
-  }
632
-  /* USER CODE BEGIN CRC_Init 2 */
633
-
634
-  /* USER CODE END CRC_Init 2 */
635
-
636
-}
637
-
638
-/**
639
-  * @brief I2C2 Initialization Function
640
-  * @param None
641
-  * @retval None
642
-  */
643
-static void MX_I2C2_Init(void)
644
-{
645
-
646
-  /* USER CODE BEGIN I2C2_Init 0 */
647
-
648
-  /* USER CODE END I2C2_Init 0 */
649
-
650
-  /* USER CODE BEGIN I2C2_Init 1 */
651
-
652
-  /* USER CODE END I2C2_Init 1 */
653
-  hi2c2.Instance = I2C2;
654
-  hi2c2.Init.ClockSpeed = 400000;
655
-  hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
656
-  hi2c2.Init.OwnAddress1 = 0;
657
-  hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
658
-  hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
659
-  hi2c2.Init.OwnAddress2 = 0;
660
-  hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
661
-  hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
662
-  if (HAL_I2C_Init(&hi2c2) != HAL_OK)
663
-  {
664
-    Error_Handler();
665
-  }
666
-  /* USER CODE BEGIN I2C2_Init 2 */
667
-
668
-  /* USER CODE END I2C2_Init 2 */
669
-
197
+  /* DMA1_Channel5_IRQn interrupt configuration */
198
+  HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
199
+  HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
670 200
 }
671 201
 
672 202
 /**
@@ -687,9 +217,9 @@ static void MX_TIM6_Init(void)
687 217
 
688 218
   /* USER CODE END TIM6_Init 1 */
689 219
   htim6.Instance = TIM6;
690
-  htim6.Init.Prescaler = 5600 - 1;
220
+  htim6.Init.Prescaler = 6000 - 1;
691 221
   htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
692
-  htim6.Init.Period = 10;
222
+  htim6.Init.Period = 10 - 1;
693 223
   htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
694 224
   if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
695 225
   {
@@ -723,7 +253,7 @@ static void MX_USART1_UART_Init(void)
723 253
 
724 254
   /* USER CODE END USART1_Init 1 */
725 255
   huart1.Instance = USART1;
726
-  huart1.Init.BaudRate = 115200;
256
+  huart1.Init.BaudRate = 921600;
727 257
   huart1.Init.WordLength = UART_WORDLENGTH_8B;
728 258
   huart1.Init.StopBits = UART_STOPBITS_1;
729 259
   huart1.Init.Parity = UART_PARITY_NONE;
@@ -740,39 +270,6 @@ static void MX_USART1_UART_Init(void)
740 270
 
741 271
 }
742 272
 
743
-/**
744
-  * @brief USART2 Initialization Function
745
-  * @param None
746
-  * @retval None
747
-  */
748
-static void MX_USART2_UART_Init(void)
749
-{
750
-
751
-  /* USER CODE BEGIN USART2_Init 0 */
752
-
753
-  /* USER CODE END USART2_Init 0 */
754
-
755
-  /* USER CODE BEGIN USART2_Init 1 */
756
-
757
-  /* USER CODE END USART2_Init 1 */
758
-  huart2.Instance = USART2;
759
-  huart2.Init.BaudRate = 115200;
760
-  huart2.Init.WordLength = UART_WORDLENGTH_8B;
761
-  huart2.Init.StopBits = UART_STOPBITS_1;
762
-  huart2.Init.Parity = UART_PARITY_NONE;
763
-  huart2.Init.Mode = UART_MODE_TX_RX;
764
-  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
765
-  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
766
-  if (HAL_UART_Init(&huart2) != HAL_OK)
767
-  {
768
-    Error_Handler();
769
-  }
770
-  /* USER CODE BEGIN USART2_Init 2 */
771
-
772
-  /* USER CODE END USART2_Init 2 */
773
-
774
-}
775
-
776 273
 /** 
777 274
   * Enable DMA controller clock
778 275
   */
@@ -781,7 +278,6 @@ static void MX_DMA_Init(void)
781 278
 
782 279
   /* DMA controller clock enable */
783 280
   __HAL_RCC_DMA1_CLK_ENABLE();
784
-  __HAL_RCC_DMA2_CLK_ENABLE();
785 281
 
786 282
 }
787 283
 
@@ -795,81 +291,18 @@ static void MX_GPIO_Init(void)
795 291
   GPIO_InitTypeDef GPIO_InitStruct = {0};
796 292
 
797 293
   /* GPIO Ports Clock Enable */
798
-  __HAL_RCC_GPIOE_CLK_ENABLE();
799 294
   __HAL_RCC_GPIOC_CLK_ENABLE();
800
-  __HAL_RCC_GPIOF_CLK_ENABLE();
801 295
   __HAL_RCC_GPIOA_CLK_ENABLE();
802
-  __HAL_RCC_GPIOG_CLK_ENABLE();
803
-  __HAL_RCC_GPIOB_CLK_ENABLE();
804
-  __HAL_RCC_GPIOD_CLK_ENABLE();
805 296
 
806 297
   /*Configure GPIO pin Output Level */
807
-  HAL_GPIO_WritePin(GPIOE, LED_FAIL_Pin|FAIL_MBIC_Pin|ATT_CLOCK4_Pin|ATT_DATA4_Pin 
808
-                          |ATT_EN_DL4_Pin|ATT_EN_UL4_Pin|PATH_EN_DL4_Pin|PATH_EN_UL4_Pin, GPIO_PIN_RESET);
298
+  HAL_GPIO_WritePin(BOOT_LED_GPIO_Port, BOOT_LED_Pin, GPIO_PIN_RESET);
809 299
 
810
-  /*Configure GPIO pin Output Level */
811
-  HAL_GPIO_WritePin(GPIOC, BOOT_LED_Pin|PATH_EN_UL1_Pin, GPIO_PIN_RESET);
812
-
813
-  /*Configure GPIO pin Output Level */
814
-  HAL_GPIO_WritePin(GPIOG, ATT_CLOCK3_Pin|ATT_DATA3_Pin|ATT_EN_DL3_Pin|ATT_EN_UL3_Pin 
815
-                          |PATH_EN_DL3_Pin|PATH_EN_UL3_Pin|_PATH_SW1_Pin|PATH_SW1_Pin 
816
-                          |_PATH_SW2_Pin|PATH_SW2_Pin|_PATH_SW3_Pin|PATH_SW3_Pin 
817
-                          |_PATH_SW4_Pin|PATH_SW4_Pin, GPIO_PIN_RESET);
818
-
819
-  /*Configure GPIO pin Output Level */
820
-  HAL_GPIO_WritePin(GPIOB, ATT_EN_UL1_Pin|PATH_EN_DL1_Pin|ATT_CLOCK1_Pin|ATT_DATA1_Pin 
821
-                          |ATT_EN_DL1_Pin, GPIO_PIN_RESET);
822
-
823
-  /*Configure GPIO pin Output Level */
824
-  HAL_GPIO_WritePin(GPIOD, PATH_EN_DL2_Pin|PATH_EN_UL2_Pin|LED_ACT_Pin|GPIO_PIN_15 
825
-                          |ATT_CLOCK2_Pin|ATT_DATA2_Pin|ATT_EN_DL2_Pin|ATT_EN_UL2_Pin, GPIO_PIN_RESET);
826
-
827
-  /*Configure GPIO pins : LED_FAIL_Pin FAIL_MBIC_Pin ATT_CLOCK4_Pin ATT_DATA4_Pin 
828
-                           ATT_EN_DL4_Pin ATT_EN_UL4_Pin PATH_EN_DL4_Pin PATH_EN_UL4_Pin */
829
-  GPIO_InitStruct.Pin = LED_FAIL_Pin|FAIL_MBIC_Pin|ATT_CLOCK4_Pin|ATT_DATA4_Pin 
830
-                          |ATT_EN_DL4_Pin|ATT_EN_UL4_Pin|PATH_EN_DL4_Pin|PATH_EN_UL4_Pin;
300
+  /*Configure GPIO pin : BOOT_LED_Pin */
301
+  GPIO_InitStruct.Pin = BOOT_LED_Pin;
831 302
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
832 303
   GPIO_InitStruct.Pull = GPIO_NOPULL;
833 304
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
834
-  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
835
-
836
-  /*Configure GPIO pins : BOOT_LED_Pin PATH_EN_UL1_Pin */
837
-  GPIO_InitStruct.Pin = BOOT_LED_Pin|PATH_EN_UL1_Pin;
838
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
839
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
840
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
841
-  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
842
-
843
-  /*Configure GPIO pins : ATT_CLOCK3_Pin ATT_DATA3_Pin ATT_EN_DL3_Pin ATT_EN_UL3_Pin 
844
-                           PATH_EN_DL3_Pin PATH_EN_UL3_Pin _PATH_SW1_Pin PATH_SW1_Pin 
845
-                           _PATH_SW2_Pin PATH_SW2_Pin _PATH_SW3_Pin PATH_SW3_Pin 
846
-                           _PATH_SW4_Pin PATH_SW4_Pin */
847
-  GPIO_InitStruct.Pin = ATT_CLOCK3_Pin|ATT_DATA3_Pin|ATT_EN_DL3_Pin|ATT_EN_UL3_Pin 
848
-                          |PATH_EN_DL3_Pin|PATH_EN_UL3_Pin|_PATH_SW1_Pin|PATH_SW1_Pin 
849
-                          |_PATH_SW2_Pin|PATH_SW2_Pin|_PATH_SW3_Pin|PATH_SW3_Pin 
850
-                          |_PATH_SW4_Pin|PATH_SW4_Pin;
851
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
852
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
853
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
854
-  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
855
-
856
-  /*Configure GPIO pins : ATT_EN_UL1_Pin PATH_EN_DL1_Pin ATT_CLOCK1_Pin ATT_DATA1_Pin 
857
-                           ATT_EN_DL1_Pin */
858
-  GPIO_InitStruct.Pin = ATT_EN_UL1_Pin|PATH_EN_DL1_Pin|ATT_CLOCK1_Pin|ATT_DATA1_Pin 
859
-                          |ATT_EN_DL1_Pin;
860
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
861
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
862
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
863
-  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
864
-
865
-  /*Configure GPIO pins : PATH_EN_DL2_Pin PATH_EN_UL2_Pin LED_ACT_Pin PD15 
866
-                           ATT_CLOCK2_Pin ATT_DATA2_Pin ATT_EN_DL2_Pin ATT_EN_UL2_Pin */
867
-  GPIO_InitStruct.Pin = PATH_EN_DL2_Pin|PATH_EN_UL2_Pin|LED_ACT_Pin|GPIO_PIN_15 
868
-                          |ATT_CLOCK2_Pin|ATT_DATA2_Pin|ATT_EN_DL2_Pin|ATT_EN_UL2_Pin;
869
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
870
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
871
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
872
-  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
305
+  HAL_GPIO_Init(BOOT_LED_GPIO_Port, &GPIO_InitStruct);
873 306
 
874 307
 }
875 308
 
@@ -877,34 +310,6 @@ static void MX_GPIO_Init(void)
877 310
 
878 311
 /* USER CODE END 4 */
879 312
 
880
- /**
881
-  * @brief  Period elapsed callback in non blocking mode
882
-  * @note   This function is called  when TIM2 interrupt took place, inside
883
-  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
884
-  * a global variable "uwTick" used as application time base.
885
-  * @param  htim : TIM handle
886
-  * @retval None
887
-  */
888
-void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
889
-{
890
-  /* USER CODE BEGIN Callback 0 */
891
-
892
-  /* USER CODE END Callback 0 */
893
-  if (htim->Instance == TIM2) {
894
-    HAL_IncTick();
895
-  }
896
-  /* USER CODE BEGIN Callback 1 */
897
-  if(htim->Instance == TIM6){
898
-      UartRxTimerCnt++;
899
-      LedTimerCnt++;
900
-      AdcTimerCnt++;
901
-      LDTimerCnt++;
902
-      ALCTimerCnt++;
903
-      AGCTimerCnt++;
904
-  }
905
-  /* USER CODE END Callback 1 */
906
-}
907
-
908 313
 /**
909 314
   * @brief  This function is executed in case of error occurrence.
910 315
   * @retval None

+ 8 - 330
Src/stm32f1xx_hal_msp.c

@@ -24,10 +24,6 @@
24 24
 /* USER CODE BEGIN Includes */
25 25
 
26 26
 /* USER CODE END Includes */
27
-extern DMA_HandleTypeDef hdma_adc1;
28
-
29
-extern DMA_HandleTypeDef hdma_adc3;
30
-
31 27
 extern DMA_HandleTypeDef hdma_usart1_rx;
32 28
 
33 29
 extern DMA_HandleTypeDef hdma_usart1_tx;
@@ -88,280 +84,6 @@ void HAL_MspInit(void)
88 84
   /* USER CODE END MspInit 1 */
89 85
 }
90 86
 
91
-/**
92
-* @brief ADC MSP Initialization
93
-* This function configures the hardware resources used in this example
94
-* @param hadc: ADC handle pointer
95
-* @retval None
96
-*/
97
-void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
98
-{
99
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
100
-  if(hadc->Instance==ADC1)
101
-  {
102
-  /* USER CODE BEGIN ADC1_MspInit 0 */
103
-
104
-  /* USER CODE END ADC1_MspInit 0 */
105
-    /* Peripheral clock enable */
106
-    __HAL_RCC_ADC1_CLK_ENABLE();
107
-  
108
-    __HAL_RCC_GPIOC_CLK_ENABLE();
109
-    __HAL_RCC_GPIOA_CLK_ENABLE();
110
-    /**ADC1 GPIO Configuration    
111
-    PC2     ------> ADC1_IN12
112
-    PA4     ------> ADC1_IN4
113
-    PA5     ------> ADC1_IN5
114
-    PA6     ------> ADC1_IN6 
115
-    */
116
-    GPIO_InitStruct.Pin = RFU_TEMP_Pin;
117
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
118
-    HAL_GPIO_Init(RFU_TEMP_GPIO_Port, &GPIO_InitStruct);
119
-
120
-    GPIO_InitStruct.Pin = DET_UL1_OUT_Pin|DET_UL2_OUT_Pin|DET_UL3_OUT_Pin;
121
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
122
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
123
-
124
-    /* ADC1 DMA Init */
125
-    /* ADC1 Init */
126
-    hdma_adc1.Instance = DMA1_Channel1;
127
-    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
128
-    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
129
-    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
130
-    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
131
-    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
132
-    hdma_adc1.Init.Mode = DMA_CIRCULAR;
133
-    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
134
-    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
135
-    {
136
-      Error_Handler();
137
-    }
138
-
139
-    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
140
-
141
-    /* ADC1 interrupt Init */
142
-    HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
143
-    HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
144
-  /* USER CODE BEGIN ADC1_MspInit 1 */
145
-
146
-  /* USER CODE END ADC1_MspInit 1 */
147
-  }
148
-  else if(hadc->Instance==ADC3)
149
-  {
150
-  /* USER CODE BEGIN ADC3_MspInit 0 */
151
-
152
-  /* USER CODE END ADC3_MspInit 0 */
153
-    /* Peripheral clock enable */
154
-    __HAL_RCC_ADC3_CLK_ENABLE();
155
-  
156
-    __HAL_RCC_GPIOF_CLK_ENABLE();
157
-    /**ADC3 GPIO Configuration    
158
-    PF6     ------> ADC3_IN4
159
-    PF7     ------> ADC3_IN5
160
-    PF8     ------> ADC3_IN6
161
-    PF9     ------> ADC3_IN7
162
-    PF10     ------> ADC3_IN8 
163
-    */
164
-    GPIO_InitStruct.Pin = DET_UL4_OUT_Pin|DET_DL1_IN_Pin|DET_DL2_IN_Pin|DET_DL3_IN_Pin 
165
-                          |DET_DL4_IN_Pin;
166
-    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
167
-    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
168
-
169
-    /* ADC3 DMA Init */
170
-    /* ADC3 Init */
171
-    hdma_adc3.Instance = DMA2_Channel5;
172
-    hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY;
173
-    hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE;
174
-    hdma_adc3.Init.MemInc = DMA_MINC_ENABLE;
175
-    hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
176
-    hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
177
-    hdma_adc3.Init.Mode = DMA_CIRCULAR;
178
-    hdma_adc3.Init.Priority = DMA_PRIORITY_LOW;
179
-    if (HAL_DMA_Init(&hdma_adc3) != HAL_OK)
180
-    {
181
-      Error_Handler();
182
-    }
183
-
184
-    __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc3);
185
-
186
-  /* USER CODE BEGIN ADC3_MspInit 1 */
187
-
188
-  /* USER CODE END ADC3_MspInit 1 */
189
-  }
190
-
191
-}
192
-
193
-/**
194
-* @brief ADC MSP De-Initialization
195
-* This function freeze the hardware resources used in this example
196
-* @param hadc: ADC handle pointer
197
-* @retval None
198
-*/
199
-void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
200
-{
201
-  if(hadc->Instance==ADC1)
202
-  {
203
-  /* USER CODE BEGIN ADC1_MspDeInit 0 */
204
-
205
-  /* USER CODE END ADC1_MspDeInit 0 */
206
-    /* Peripheral clock disable */
207
-    __HAL_RCC_ADC1_CLK_DISABLE();
208
-  
209
-    /**ADC1 GPIO Configuration    
210
-    PC2     ------> ADC1_IN12
211
-    PA4     ------> ADC1_IN4
212
-    PA5     ------> ADC1_IN5
213
-    PA6     ------> ADC1_IN6 
214
-    */
215
-    HAL_GPIO_DeInit(RFU_TEMP_GPIO_Port, RFU_TEMP_Pin);
216
-
217
-    HAL_GPIO_DeInit(GPIOA, DET_UL1_OUT_Pin|DET_UL2_OUT_Pin|DET_UL3_OUT_Pin);
218
-
219
-    /* ADC1 DMA DeInit */
220
-    HAL_DMA_DeInit(hadc->DMA_Handle);
221
-
222
-    /* ADC1 interrupt DeInit */
223
-    HAL_NVIC_DisableIRQ(ADC1_2_IRQn);
224
-  /* USER CODE BEGIN ADC1_MspDeInit 1 */
225
-
226
-  /* USER CODE END ADC1_MspDeInit 1 */
227
-  }
228
-  else if(hadc->Instance==ADC3)
229
-  {
230
-  /* USER CODE BEGIN ADC3_MspDeInit 0 */
231
-
232
-  /* USER CODE END ADC3_MspDeInit 0 */
233
-    /* Peripheral clock disable */
234
-    __HAL_RCC_ADC3_CLK_DISABLE();
235
-  
236
-    /**ADC3 GPIO Configuration    
237
-    PF6     ------> ADC3_IN4
238
-    PF7     ------> ADC3_IN5
239
-    PF8     ------> ADC3_IN6
240
-    PF9     ------> ADC3_IN7
241
-    PF10     ------> ADC3_IN8 
242
-    */
243
-    HAL_GPIO_DeInit(GPIOF, DET_UL4_OUT_Pin|DET_DL1_IN_Pin|DET_DL2_IN_Pin|DET_DL3_IN_Pin 
244
-                          |DET_DL4_IN_Pin);
245
-
246
-    /* ADC3 DMA DeInit */
247
-    HAL_DMA_DeInit(hadc->DMA_Handle);
248
-
249
-    /* ADC3 interrupt DeInit */
250
-    HAL_NVIC_DisableIRQ(ADC3_IRQn);
251
-  /* USER CODE BEGIN ADC3_MspDeInit 1 */
252
-
253
-  /* USER CODE END ADC3_MspDeInit 1 */
254
-  }
255
-
256
-}
257
-
258
-/**
259
-* @brief CRC MSP Initialization
260
-* This function configures the hardware resources used in this example
261
-* @param hcrc: CRC handle pointer
262
-* @retval None
263
-*/
264
-void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
265
-{
266
-  if(hcrc->Instance==CRC)
267
-  {
268
-  /* USER CODE BEGIN CRC_MspInit 0 */
269
-
270
-  /* USER CODE END CRC_MspInit 0 */
271
-    /* Peripheral clock enable */
272
-    __HAL_RCC_CRC_CLK_ENABLE();
273
-  /* USER CODE BEGIN CRC_MspInit 1 */
274
-
275
-  /* USER CODE END CRC_MspInit 1 */
276
-  }
277
-
278
-}
279
-
280
-/**
281
-* @brief CRC MSP De-Initialization
282
-* This function freeze the hardware resources used in this example
283
-* @param hcrc: CRC handle pointer
284
-* @retval None
285
-*/
286
-void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
287
-{
288
-  if(hcrc->Instance==CRC)
289
-  {
290
-  /* USER CODE BEGIN CRC_MspDeInit 0 */
291
-
292
-  /* USER CODE END CRC_MspDeInit 0 */
293
-    /* Peripheral clock disable */
294
-    __HAL_RCC_CRC_CLK_DISABLE();
295
-  /* USER CODE BEGIN CRC_MspDeInit 1 */
296
-
297
-  /* USER CODE END CRC_MspDeInit 1 */
298
-  }
299
-
300
-}
301
-
302
-/**
303
-* @brief I2C MSP Initialization
304
-* This function configures the hardware resources used in this example
305
-* @param hi2c: I2C handle pointer
306
-* @retval None
307
-*/
308
-void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
309
-{
310
-  GPIO_InitTypeDef GPIO_InitStruct = {0};
311
-  if(hi2c->Instance==I2C2)
312
-  {
313
-  /* USER CODE BEGIN I2C2_MspInit 0 */
314
-
315
-  /* USER CODE END I2C2_MspInit 0 */
316
-  
317
-    __HAL_RCC_GPIOB_CLK_ENABLE();
318
-    /**I2C2 GPIO Configuration    
319
-    PB10     ------> I2C2_SCL
320
-    PB11     ------> I2C2_SDA 
321
-    */
322
-    GPIO_InitStruct.Pin = EEPROM_SCL_Pin|EEPROM_SDA_Pin;
323
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
324
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
325
-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
326
-
327
-    /* Peripheral clock enable */
328
-    __HAL_RCC_I2C2_CLK_ENABLE();
329
-  /* USER CODE BEGIN I2C2_MspInit 1 */
330
-
331
-  /* USER CODE END I2C2_MspInit 1 */
332
-  }
333
-
334
-}
335
-
336
-/**
337
-* @brief I2C MSP De-Initialization
338
-* This function freeze the hardware resources used in this example
339
-* @param hi2c: I2C handle pointer
340
-* @retval None
341
-*/
342
-void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
343
-{
344
-  if(hi2c->Instance==I2C2)
345
-  {
346
-  /* USER CODE BEGIN I2C2_MspDeInit 0 */
347
-
348
-  /* USER CODE END I2C2_MspDeInit 0 */
349
-    /* Peripheral clock disable */
350
-    __HAL_RCC_I2C2_CLK_DISABLE();
351
-  
352
-    /**I2C2 GPIO Configuration    
353
-    PB10     ------> I2C2_SCL
354
-    PB11     ------> I2C2_SDA 
355
-    */
356
-    HAL_GPIO_DeInit(GPIOB, EEPROM_SCL_Pin|EEPROM_SDA_Pin);
357
-
358
-  /* USER CODE BEGIN I2C2_MspDeInit 1 */
359
-
360
-  /* USER CODE END I2C2_MspDeInit 1 */
361
-  }
362
-
363
-}
364
-
365 87
 /**
366 88
 * @brief TIM_Base MSP Initialization
367 89
 * This function configures the hardware resources used in this example
@@ -377,6 +99,9 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
377 99
   /* USER CODE END TIM6_MspInit 0 */
378 100
     /* Peripheral clock enable */
379 101
     __HAL_RCC_TIM6_CLK_ENABLE();
102
+    /* TIM6 interrupt Init */
103
+    HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0);
104
+    HAL_NVIC_EnableIRQ(TIM6_IRQn);
380 105
   /* USER CODE BEGIN TIM6_MspInit 1 */
381 106
 
382 107
   /* USER CODE END TIM6_MspInit 1 */
@@ -431,15 +156,15 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
431 156
     PA9     ------> USART1_TX
432 157
     PA10     ------> USART1_RX 
433 158
     */
434
-    GPIO_InitStruct.Pin = MBIC_UP_Pin;
159
+    GPIO_InitStruct.Pin = GPIO_PIN_9;
435 160
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
436 161
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
437
-    HAL_GPIO_Init(MBIC_UP_GPIO_Port, &GPIO_InitStruct);
162
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
438 163
 
439
-    GPIO_InitStruct.Pin = MBIC_DOWN_Pin;
164
+    GPIO_InitStruct.Pin = GPIO_PIN_10;
440 165
     GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
441 166
     GPIO_InitStruct.Pull = GPIO_NOPULL;
442
-    HAL_GPIO_Init(MBIC_DOWN_GPIO_Port, &GPIO_InitStruct);
167
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
443 168
 
444 169
     /* USART1 DMA Init */
445 170
     /* USART1_RX Init */
@@ -478,33 +203,6 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
478 203
 
479 204
   /* USER CODE END USART1_MspInit 1 */
480 205
   }
481
-  else if(huart->Instance==USART2)
482
-  {
483
-  /* USER CODE BEGIN USART2_MspInit 0 */
484
-
485
-  /* USER CODE END USART2_MspInit 0 */
486
-    /* Peripheral clock enable */
487
-    __HAL_RCC_USART2_CLK_ENABLE();
488
-  
489
-    __HAL_RCC_GPIOA_CLK_ENABLE();
490
-    /**USART2 GPIO Configuration    
491
-    PA2     ------> USART2_TX
492
-    PA3     ------> USART2_RX 
493
-    */
494
-    GPIO_InitStruct.Pin = RFU_TX_Pin;
495
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
496
-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
497
-    HAL_GPIO_Init(RFU_TX_GPIO_Port, &GPIO_InitStruct);
498
-
499
-    GPIO_InitStruct.Pin = RFU_RX_Pin;
500
-    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
501
-    GPIO_InitStruct.Pull = GPIO_NOPULL;
502
-    HAL_GPIO_Init(RFU_RX_GPIO_Port, &GPIO_InitStruct);
503
-
504
-  /* USER CODE BEGIN USART2_MspInit 1 */
505
-
506
-  /* USER CODE END USART2_MspInit 1 */
507
-  }
508 206
 
509 207
 }
510 208
 
@@ -528,7 +226,7 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
528 226
     PA9     ------> USART1_TX
529 227
     PA10     ------> USART1_RX 
530 228
     */
531
-    HAL_GPIO_DeInit(GPIOA, MBIC_UP_Pin|MBIC_DOWN_Pin);
229
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
532 230
 
533 231
     /* USART1 DMA DeInit */
534 232
     HAL_DMA_DeInit(huart->hdmarx);
@@ -540,26 +238,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
540 238
 
541 239
   /* USER CODE END USART1_MspDeInit 1 */
542 240
   }
543
-  else if(huart->Instance==USART2)
544
-  {
545
-  /* USER CODE BEGIN USART2_MspDeInit 0 */
546
-
547
-  /* USER CODE END USART2_MspDeInit 0 */
548
-    /* Peripheral clock disable */
549
-    __HAL_RCC_USART2_CLK_DISABLE();
550
-  
551
-    /**USART2 GPIO Configuration    
552
-    PA2     ------> USART2_TX
553
-    PA3     ------> USART2_RX 
554
-    */
555
-    HAL_GPIO_DeInit(GPIOA, RFU_TX_Pin|RFU_RX_Pin);
556
-
557
-    /* USART2 interrupt DeInit */
558
-    HAL_NVIC_DisableIRQ(USART2_IRQn);
559
-  /* USER CODE BEGIN USART2_MspDeInit 1 */
560
-
561
-  /* USER CODE END USART2_MspDeInit 1 */
562
-  }
563 241
 
564 242
 }
565 243
 

+ 0 - 114
Src/stm32f1xx_hal_timebase_tim.c

@@ -1,114 +0,0 @@
1
-/* USER CODE BEGIN Header */
2
-/**
3
-  ******************************************************************************
4
-  * @file    stm32f1xx_hal_timebase_TIM.c 
5
-  * @brief   HAL time base based on the hardware TIM.
6
-  ******************************************************************************
7
-  * @attention
8
-  *
9
-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
10
-  * All rights reserved.</center></h2>
11
-  *
12
-  * This software component is licensed by ST under BSD 3-Clause license,
13
-  * the "License"; You may not use this file except in compliance with the
14
-  * License. You may obtain a copy of the License at:
15
-  *                        opensource.org/licenses/BSD-3-Clause
16
-  *
17
-  ******************************************************************************
18
-  */
19
-/* USER CODE END Header */
20
-
21
-/* Includes ------------------------------------------------------------------*/
22
-#include "stm32f1xx_hal.h"
23
-#include "stm32f1xx_hal_tim.h"
24
- 
25
-/* Private typedef -----------------------------------------------------------*/
26
-/* Private define ------------------------------------------------------------*/
27
-/* Private macro -------------------------------------------------------------*/
28
-/* Private variables ---------------------------------------------------------*/
29
-TIM_HandleTypeDef        htim2; 
30
-/* Private function prototypes -----------------------------------------------*/
31
-/* Private functions ---------------------------------------------------------*/
32
-
33
-/**
34
-  * @brief  This function configures the TIM2 as a time base source. 
35
-  *         The time source is configured  to have 1ms time base with a dedicated 
36
-  *         Tick interrupt priority. 
37
-  * @note   This function is called  automatically at the beginning of program after
38
-  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 
39
-  * @param  TickPriority: Tick interrupt priority.
40
-  * @retval HAL status
41
-  */
42
-HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
43
-{
44
-  RCC_ClkInitTypeDef    clkconfig;
45
-  uint32_t              uwTimclock = 0;
46
-  uint32_t              uwPrescalerValue = 0;
47
-  uint32_t              pFLatency;
48
-  
49
-  /*Configure the TIM2 IRQ priority */
50
-  HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority ,0); 
51
-  
52
-  /* Enable the TIM2 global Interrupt */
53
-  HAL_NVIC_EnableIRQ(TIM2_IRQn); 
54
-  
55
-  /* Enable TIM2 clock */
56
-  __HAL_RCC_TIM2_CLK_ENABLE();
57
-  
58
-  /* Get clock configuration */
59
-  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
60
-  
61
-  /* Compute TIM2 clock */
62
-  uwTimclock = 2*HAL_RCC_GetPCLK1Freq();
63
-   
64
-  /* Compute the prescaler value to have TIM2 counter clock equal to 1MHz */
65
-  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1);
66
-  
67
-  /* Initialize TIM2 */
68
-  htim2.Instance = TIM2;
69
-  
70
-  /* Initialize TIMx peripheral as follow:
71
-  + Period = [(TIM2CLK/1000) - 1]. to have a (1/1000) s time base.
72
-  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
73
-  + ClockDivision = 0
74
-  + Counter direction = Up
75
-  */
76
-  htim2.Init.Period = (1000000 / 1000) - 1;
77
-  htim2.Init.Prescaler = uwPrescalerValue;
78
-  htim2.Init.ClockDivision = 0;
79
-  htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
80
-  if(HAL_TIM_Base_Init(&htim2) == HAL_OK)
81
-  {
82
-    /* Start the TIM time Base generation in interrupt mode */
83
-    return HAL_TIM_Base_Start_IT(&htim2);
84
-  }
85
-  
86
-  /* Return function status */
87
-  return HAL_ERROR;
88
-}
89
-
90
-/**
91
-  * @brief  Suspend Tick increment.
92
-  * @note   Disable the tick increment by disabling TIM2 update interrupt.
93
-  * @param  None
94
-  * @retval None
95
-  */
96
-void HAL_SuspendTick(void)
97
-{
98
-  /* Disable TIM2 update Interrupt */
99
-  __HAL_TIM_DISABLE_IT(&htim2, TIM_IT_UPDATE);                                                  
100
-}
101
-
102
-/**
103
-  * @brief  Resume Tick increment.
104
-  * @note   Enable the tick increment by Enabling TIM2 update interrupt.
105
-  * @param  None
106
-  * @retval None
107
-  */
108
-void HAL_ResumeTick(void)
109
-{
110
-  /* Enable TIM2 Update interrupt */
111
-  __HAL_TIM_ENABLE_IT(&htim2, TIM_IT_UPDATE);
112
-}
113
-
114
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 1 - 92
Src/stm32f1xx_it.c

@@ -56,17 +56,10 @@
56 56
 /* USER CODE END 0 */
57 57
 
58 58
 /* External variables --------------------------------------------------------*/
59
-extern DMA_HandleTypeDef hdma_adc1;
60
-extern DMA_HandleTypeDef hdma_adc3;
61
-extern ADC_HandleTypeDef hadc1;
62
-extern ADC_HandleTypeDef hadc3;
63 59
 extern TIM_HandleTypeDef htim6;
64 60
 extern DMA_HandleTypeDef hdma_usart1_rx;
65 61
 extern DMA_HandleTypeDef hdma_usart1_tx;
66 62
 extern UART_HandleTypeDef huart1;
67
-extern UART_HandleTypeDef huart2;
68
-extern TIM_HandleTypeDef htim2;
69
-
70 63
 /* USER CODE BEGIN EV */
71 64
 
72 65
 /* USER CODE END EV */
@@ -194,7 +187,7 @@ void SysTick_Handler(void)
194 187
   /* USER CODE BEGIN SysTick_IRQn 0 */
195 188
 
196 189
   /* USER CODE END SysTick_IRQn 0 */
197
-  
190
+  HAL_IncTick();
198 191
   /* USER CODE BEGIN SysTick_IRQn 1 */
199 192
 
200 193
   /* USER CODE END SysTick_IRQn 1 */
@@ -207,20 +200,6 @@ void SysTick_Handler(void)
207 200
 /* please refer to the startup file (startup_stm32f1xx.s).                    */
208 201
 /******************************************************************************/
209 202
 
210
-/**
211
-  * @brief This function handles DMA1 channel1 global interrupt.
212
-  */
213
-void DMA1_Channel1_IRQHandler(void)
214
-{
215
-  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
216
-
217
-  /* USER CODE END DMA1_Channel1_IRQn 0 */
218
-  HAL_DMA_IRQHandler(&hdma_adc1);
219
-  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
220
-
221
-  /* USER CODE END DMA1_Channel1_IRQn 1 */
222
-}
223
-
224 203
 /**
225 204
   * @brief This function handles DMA1 channel4 global interrupt.
226 205
   */
@@ -249,34 +228,6 @@ void DMA1_Channel5_IRQHandler(void)
249 228
   /* USER CODE END DMA1_Channel5_IRQn 1 */
250 229
 }
251 230
 
252
-/**
253
-  * @brief This function handles ADC1 and ADC2 global interrupts.
254
-  */
255
-void ADC1_2_IRQHandler(void)
256
-{
257
-  /* USER CODE BEGIN ADC1_2_IRQn 0 */
258
-
259
-  /* USER CODE END ADC1_2_IRQn 0 */
260
-  HAL_ADC_IRQHandler(&hadc1);
261
-  /* USER CODE BEGIN ADC1_2_IRQn 1 */
262
-
263
-  /* USER CODE END ADC1_2_IRQn 1 */
264
-}
265
-
266
-/**
267
-  * @brief This function handles TIM2 global interrupt.
268
-  */
269
-void TIM2_IRQHandler(void)
270
-{
271
-  /* USER CODE BEGIN TIM2_IRQn 0 */
272
-
273
-  /* USER CODE END TIM2_IRQn 0 */
274
-  HAL_TIM_IRQHandler(&htim2);
275
-  /* USER CODE BEGIN TIM2_IRQn 1 */
276
-
277
-  /* USER CODE END TIM2_IRQn 1 */
278
-}
279
-
280 231
 /**
281 232
   * @brief This function handles USART1 global interrupt.
282 233
   */
@@ -291,34 +242,6 @@ void USART1_IRQHandler(void)
291 242
   /* USER CODE END USART1_IRQn 1 */
292 243
 }
293 244
 
294
-/**
295
-  * @brief This function handles USART2 global interrupt.
296
-  */
297
-void USART2_IRQHandler(void)
298
-{
299
-  /* USER CODE BEGIN USART2_IRQn 0 */
300
-
301
-  /* USER CODE END USART2_IRQn 0 */
302
-  HAL_UART_IRQHandler(&huart2);
303
-  /* USER CODE BEGIN USART2_IRQn 1 */
304
-
305
-  /* USER CODE END USART2_IRQn 1 */
306
-}
307
-
308
-/**
309
-  * @brief This function handles ADC3 global interrupt.
310
-  */
311
-void ADC3_IRQHandler(void)
312
-{
313
-  /* USER CODE BEGIN ADC3_IRQn 0 */
314
-
315
-  /* USER CODE END ADC3_IRQn 0 */
316
-  HAL_ADC_IRQHandler(&hadc3);
317
-  /* USER CODE BEGIN ADC3_IRQn 1 */
318
-
319
-  /* USER CODE END ADC3_IRQn 1 */
320
-}
321
-
322 245
 /**
323 246
   * @brief This function handles TIM6 global interrupt.
324 247
   */
@@ -333,20 +256,6 @@ void TIM6_IRQHandler(void)
333 256
   /* USER CODE END TIM6_IRQn 1 */
334 257
 }
335 258
 
336
-/**
337
-  * @brief This function handles DMA2 channel4 and channel5 global interrupts.
338
-  */
339
-void DMA2_Channel4_5_IRQHandler(void)
340
-{
341
-  /* USER CODE BEGIN DMA2_Channel4_5_IRQn 0 */
342
-
343
-  /* USER CODE END DMA2_Channel4_5_IRQn 0 */
344
-  HAL_DMA_IRQHandler(&hdma_adc3);
345
-  /* USER CODE BEGIN DMA2_Channel4_5_IRQn 1 */
346
-
347
-  /* USER CODE END DMA2_Channel4_5_IRQn 1 */
348
-}
349
-
350 259
 /* USER CODE BEGIN 1 */
351 260
 
352 261
 /* USER CODE END 1 */

+ 1 - 1
Src/system_stm32f1xx.c

@@ -92,7 +92,7 @@
92 92
 /*!< Uncomment the following line if you need to relocate your vector Table in
93 93
      Internal SRAM. */ 
94 94
 /* #define VECT_TAB_SRAM */
95
-#define VECT_TAB_OFFSET  0x4000 /* Original Value : 0x00000000U*/ /*!< Vector Table base offset field.
95
+#define VECT_TAB_OFFSET  0x0000 /* Original Value : 0x00000000U*/ /*!< Vector Table base offset field.
96 96
                                   This value must be a multiple of 0x200. */
97 97
 
98 98
 

+ 94 - 0
Src/uart.c

@@ -0,0 +1,94 @@
1
+/*
2
+ * uart.c
3
+ *
4
+ *  Created on: 2019. 5. 27.
5
+ *      Author: parkyj
6
+ */
7
+#include <stdio.h>
8
+#include <uart.h>
9
+#include "main.h"
10
+#include "string.h"
11
+
12
+UARTQUEUE TerminalQueue;
13
+UARTQUEUE WifiQueue;
14
+extern volatile uint32_t FirmwareTimerCnt;
15
+extern volatile uint32_t UartTimerCnt ;
16
+void InitUartQueue(pUARTQUEUE pQueue)
17
+{
18
+    pQueue->data = pQueue->head = pQueue->tail = 0;
19
+
20
+    if (HAL_UART_Receive_DMA(&hTerminal, TerminalQueue.Buffer, 1) != HAL_OK)
21
+    {
22
+      //_Error_Handler(__FILE__, __LINE__);
23
+    }
24
+    //HAL_UART_Receive_DMA(&hTerminal,  TerminalQueue.Buffer, 1);
25
+    //HAL_UART_Receive_IT(hTerminal, pQueue->Buffer + pQueue->head, 1);
26
+}
27
+
28
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
29
+{
30
+    pUARTQUEUE pQueue;
31
+//    printf("Function : %s : \r\n",__func__);
32
+    UartTimerCnt = 0;
33
+    pQueue = &TerminalQueue;
34
+    pQueue->head++;
35
+    if (pQueue->head >= QUEUE_BUFFER_LENGTH) pQueue->head = 0;
36
+    pQueue->data++;
37
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
38
+        GetDataFromUartQueue(huart);
39
+    HAL_UART_Receive_DMA(&hTerminal, pQueue->Buffer + pQueue->head, 1);
40
+   // Set_UartRcv(true);
41
+}
42
+void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data)
43
+{
44
+    pUARTQUEUE pQueue = &TerminalQueue;
45
+    if (pQueue->data >= QUEUE_BUFFER_LENGTH)
46
+        GetDataFromUartQueue(huart);
47
+    pQueue->Buffer[pQueue->head++] = data;
48
+    if (pQueue->head == QUEUE_BUFFER_LENGTH) pQueue->head = 0;
49
+    pQueue->data++;
50
+   // HAL_UART_Receive_DMA(&hTerminal,  pQueue->Buffer + pQueue->head, 10);
51
+}
52
+
53
+void GetDataFromUartQueue(UART_HandleTypeDef *huart)
54
+{
55
+    volatile static uint8_t update_data_buf[1024];
56
+    volatile static int cnt;
57
+    uint8_t temp_buf[11];
58
+    
59
+//    UART_HandleTypeDef *dst = (huart->Instance == USART2 ? &hWifi:&hTerminal);
60
+    UART_HandleTypeDef *dst = &hTerminal;
61
+    pUARTQUEUE pQueue = &TerminalQueue;
62
+//    if (HAL_UART_Transmit(dst, pQueue->Buffer + pQueue->tail, 1, 3000) != HAL_OK)
63
+//    {
64
+//       _Error_Handler(__FILE__, __LINE__);
65
+//    }
66
+    update_data_buf[cnt++] = *(pQueue->Buffer + pQueue->tail);        
67
+
68
+    pQueue->tail++;
69
+    if (pQueue->tail >= QUEUE_BUFFER_LENGTH) pQueue->tail = 0;
70
+    pQueue->data--;
71
+    
72
+    if(pQueue->data == 0){
73
+        //HAL_UART_Transmit_DMA(dst, &temp_buf[BLUECELL_HEADER00], 11);
74
+#if 0 // PYJ.2019.07.15_BEGIN -- 
75
+//            for(int i = 0; i < cnt; i++){
76
+//                printf("%02x",update_data_buf[i]);
77
+//            }
78
+#endif // PYJ.2019.07.15_END -- 
79
+        cnt = 0;
80
+        FirmwareUpdateStart(&update_data_buf[0]);
81
+        
82
+        for(int i  = 0; i < 1024; i++)
83
+            update_data_buf[i] = 0;
84
+        
85
+        FirmwareTimerCnt = 0;
86
+       // HAL_Delay(1);
87
+    }
88
+
89
+}
90
+
91
+void Uart1_Data_Send(uint8_t* data,uint8_t size){
92
+	HAL_UART_Transmit_DMA(&huart1, data,size);
93
+}
94
+