CRC ERROR CODE

.settings/language.settings.xml

@@ -4,7 +4,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.atollic.truestudio.mbs.GCCSpecsDetectorAtollicArm" console="false" env-hash="1395387303521902045" id="com.atollic.truestudio.mbs.provider" keep-relative-paths="false" name="Atollic ARM Tools Language Settings" parameter="${COMMAND} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.atollic.truestudio.mbs.GCCSpecsDetectorAtollicArm" console="false" env-hash="-190117911751186495" id="com.atollic.truestudio.mbs.provider" keep-relative-paths="false" name="Atollic ARM Tools Language Settings" parameter="${COMMAND} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -14,7 +14,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="com.atollic.truestudio.mbs.GCCSpecsDetectorAtollicArm" console="false" env-hash="1395387303521902045" id="com.atollic.truestudio.mbs.provider" keep-relative-paths="false" name="Atollic ARM Tools Language Settings" parameter="${COMMAND} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.atollic.truestudio.mbs.GCCSpecsDetectorAtollicArm" console="false" env-hash="-190117911751186495" id="com.atollic.truestudio.mbs.provider" keep-relative-paths="false" name="Atollic ARM Tools Language Settings" parameter="${COMMAND} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>

Bluecell_Inc/Bluecell_operate.h

@@ -202,7 +202,7 @@ typedef enum{
     Serial_Number,
     Manufacture,
     Manufacture_Date,
-    ENVIRONMENT_INVENTORY_NULL0,
+    Temp_Shutdown_Path_ON_OFF,
     Freq_ID,
     Carrier_ID,
     Carrier_ON_OFF,
@@ -1042,7 +1042,9 @@ typedef struct{
     int8_t MBIC_TEMP_UL_P3_Level_Table_Length;
     int8_t MBIC_TEMP_UL_P4_Level_Table_Length;
     uint8_t DL_Det_ALL_Offset;
-    int8_t UL_Det_Path_Offset[4];
+    uint8_t MBIC_Download_Auto_Restart_Set;    
+    uint8_t Path_TempSave_Bit;/*DL1 / DL 2 /DL3 /DL4 /UL1/UL2/UL3/UL4*/
+    int8_t UL_Det_Path_Offset[2];
     uint8_t bluecell_crc_H;
     uint8_t bluecell_crc_L;
     uint8_t bluecell_etx;

Bluecell_Src/MBIC_Bootloader.c

@@ -250,7 +250,9 @@ void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){
             data[MBIC_PAYLOADSTART + index++] = data[MBIC_PAYLOADSTART + 3];        
             /*DOWNLOAD OPTION*/        
             data[MBIC_PAYLOADSTART + index++] = 1;
-            Download_Option = data[MBIC_PAYLOADSTART + 4];
+            bluecell_Currdatastatus.MBIC_Download_Auto_Restart_Set 
+                = Download_Option 
+                = data[MBIC_PAYLOADSTART + 4];
             /*DOWNLOAD DELAY REQUEST*/
             data[MBIC_PAYLOADSTART + index++] = 3;
             /*DOWNLOAD Reserve*/
@@ -466,6 +468,16 @@ void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){
             bluecell_Currdatastatus.CPU_Bank2_Image_Version1 = Bank2data[MBIC_BOOT_VERSION + 0];
             bluecell_Currdatastatus.CPU_Bank2_Image_Version2 = Bank2data[MBIC_BOOT_VERSION + 1];
             bluecell_Currdatastatus.CPU_Bank2_Image_Version3 = Bank2data[MBIC_BOOT_VERSION + 2];
+            if(bluecell_Currdatastatus.MBIC_Download_Auto_Restart_Set == true){
+                printf("MBIC_Download_Auto_Restart_Set == true\r\n");
+                if(bluecell_Currdatastatus.CPU_Current_Bank == HFR_BANK1_SEL){
+                    bluecell_Currdatastatus.CPU_Bank_Select = HFR_BANK2_SEL;
+                    printf("Download Bank sel = Bank 2 \r\n");
+                }else{
+                    bluecell_Currdatastatus.CPU_Bank_Select = HFR_BANK1_SEL;
+                    printf("Download Bank sel = Bank 1 \r\n");            
+                }
+            }
 
 
 //          if(BankNum == HFR_BANK1){
@@ -513,5 +525,11 @@ void MBIC_Bootloader_FirmwareUpdate(uint8_t* data){
     
     
     Uart1_Data_Send(MBIC_Resp ,22 + 3 + index);
+    if( cmd == MBIC_Complete_Notice_RSP
+        &&bluecell_Currdatastatus.MBIC_Download_Auto_Restart_Set == true){
+        HAL_Delay(100);
+        NVIC_SystemReset();
+    }
+
     MBIC_DataErase_Func(BankNum);
 }

Bluecell_Src/flash.c

@@ -350,10 +350,10 @@ void Flash_InitRead() // ?占쏙옙湲고븿?占쏙옙
    
    
     }
-printf("========================================\r\n");
-printf("Bank Sel : %d  CurrBank : %d \r\n",bluecell_Currdatastatus.CPU_Bank_Select,bluecell_Currdatastatus.CPU_Current_Bank);
+    printf("========================================\r\n");
+    printf("Bank Sel : %d  CurrBank : %d \r\n",bluecell_Currdatastatus.CPU_Bank_Select,bluecell_Currdatastatus.CPU_Current_Bank);
 
-        
+            
     
 //           pdata = & bluecell_Currdatastatus.CPU_Bank2_Image_Version1;
 //            for(int i = 0; i < 41; i++)

Inc/main.h

@@ -58,8 +58,8 @@ void Error_Handler(void);
 extern volatile uint16_t ADC1value[4];
 extern volatile uint16_t ADC3value[5];
 
-extern uint16_t adc1cnt;
-extern uint16_t adc3cnt;
+extern uint32_t adc1cnt;
+extern uint32_t adc3cnt;
 
 extern ADC_HandleTypeDef hadc1;
 extern ADC_HandleTypeDef hadc3;

Release/.gitignore

@@ -0,0 +1 @@
+/Bluecell_Src/

Release/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.su

@@ -0,0 +1,2 @@
+stm32f1xx_hal_iwdg.c:146:19:HAL_IWDG_Init	16	static
+stm32f1xx_hal_iwdg.c:214:19:HAL_IWDG_Refresh	0	static

Release/Src/main.su

@@ -1,11 +1,12 @@
-main.c:171:10:ShutdownCnt_Get	0	static
-main.c:174:6:ShutdownCnt_Set	0	static
-main.c:178:6:Pol_Delay_us	8	static
-main.c:188:5:_write	8	static
-main.c:200:6:HAL_ADC_ConvCpltCallback	20	static
-main.c:406:6:SystemClock_Config	96	static
-main.c:241:5:main	104	static
-main.c:869:6:DL_Shutdown_Timer	0	static
-main.c:894:6:UL_Shutdown_Timer	0	static
-main.c:930:6:HAL_TIM_PeriodElapsedCallback	8	static
-main.c:1440:6:Error_Handler	0	static
+main.c:173:10:ShutdownCnt_Get	0	static
+main.c:176:6:ShutdownCnt_Set	0	static
+main.c:180:6:Pol_Delay_us	8	static
+main.c:190:5:_write	8	static
+main.c:202:6:HAL_ADC_ConvCpltCallback	20	static
+main.c:356:6:SystemClock_Config	96	static
+main.c:259:5:main	104	static
+main.c:856:6:DL_Shutdown_Timer	0	static
+main.c:881:6:UL_Shutdown_Timer	0	static
+main.c:907:6:UL_SelfTestTimer	0	static
+main.c:925:6:HAL_TIM_PeriodElapsedCallback	8	static
+main.c:1444:6:Error_Handler	0	static

Release/Src/stm32f1xx_hal_msp.su

@@ -1,9 +1,9 @@
-stm32f1xx_hal_msp.c:75:6:HAL_MspInit	8	static
-stm32f1xx_hal_msp.c:101:6:HAL_ADC_MspInit	56	static
-stm32f1xx_hal_msp.c:203:6:HAL_ADC_MspDeInit	8	static
-stm32f1xx_hal_msp.c:268:6:HAL_I2C_MspInit	32	static
-stm32f1xx_hal_msp.c:302:6:HAL_I2C_MspDeInit	0	static
-stm32f1xx_hal_msp.c:331:6:HAL_TIM_Base_MspInit	8	static
-stm32f1xx_hal_msp.c:353:6:HAL_TIM_Base_MspDeInit	0	static
-stm32f1xx_hal_msp.c:378:6:HAL_UART_MspInit	48	static
-stm32f1xx_hal_msp.c:510:6:HAL_UART_MspDeInit	8	static
+stm32f1xx_hal_msp.c:73:6:HAL_MspInit	8	static
+stm32f1xx_hal_msp.c:99:6:HAL_ADC_MspInit	56	static
+stm32f1xx_hal_msp.c:201:6:HAL_ADC_MspDeInit	8	static
+stm32f1xx_hal_msp.c:266:6:HAL_I2C_MspInit	32	static
+stm32f1xx_hal_msp.c:300:6:HAL_I2C_MspDeInit	0	static
+stm32f1xx_hal_msp.c:329:6:HAL_TIM_Base_MspInit	8	static
+stm32f1xx_hal_msp.c:351:6:HAL_TIM_Base_MspDeInit	0	static
+stm32f1xx_hal_msp.c:376:6:HAL_UART_MspInit	56	static
+stm32f1xx_hal_msp.c:492:6:HAL_UART_MspDeInit	8	static

Release/Src/stm32f1xx_it.su

@@ -1,21 +1,20 @@
-stm32f1xx_it.c:82:6:NMI_Handler	0	static
-stm32f1xx_it.c:95:6:HardFault_Handler	0	static
-stm32f1xx_it.c:110:6:MemManage_Handler	0	static
-stm32f1xx_it.c:125:6:BusFault_Handler	0	static
-stm32f1xx_it.c:140:6:UsageFault_Handler	0	static
-stm32f1xx_it.c:155:6:SVC_Handler	0	static
-stm32f1xx_it.c:168:6:DebugMon_Handler	0	static
-stm32f1xx_it.c:181:6:PendSV_Handler	0	static
-stm32f1xx_it.c:194:6:SysTick_Handler	0	static
-stm32f1xx_it.c:215:6:DMA1_Channel1_IRQHandler	0	static
-stm32f1xx_it.c:229:6:DMA1_Channel4_IRQHandler	0	static
-stm32f1xx_it.c:243:6:DMA1_Channel5_IRQHandler	0	static
-stm32f1xx_it.c:257:6:DMA1_Channel6_IRQHandler	0	static
-stm32f1xx_it.c:271:6:DMA1_Channel7_IRQHandler	0	static
-stm32f1xx_it.c:285:6:ADC1_2_IRQHandler	0	static
-stm32f1xx_it.c:299:6:TIM2_IRQHandler	0	static
-stm32f1xx_it.c:313:6:USART1_IRQHandler	0	static
-stm32f1xx_it.c:327:6:USART2_IRQHandler	0	static
-stm32f1xx_it.c:341:6:ADC3_IRQHandler	0	static
-stm32f1xx_it.c:355:6:TIM6_IRQHandler	0	static
-stm32f1xx_it.c:369:6:DMA2_Channel4_5_IRQHandler	0	static
+stm32f1xx_it.c:81:6:NMI_Handler	0	static
+stm32f1xx_it.c:94:6:HardFault_Handler	0	static
+stm32f1xx_it.c:109:6:MemManage_Handler	0	static
+stm32f1xx_it.c:124:6:BusFault_Handler	0	static
+stm32f1xx_it.c:139:6:UsageFault_Handler	0	static
+stm32f1xx_it.c:154:6:SVC_Handler	0	static
+stm32f1xx_it.c:167:6:DebugMon_Handler	0	static
+stm32f1xx_it.c:180:6:PendSV_Handler	0	static
+stm32f1xx_it.c:193:6:SysTick_Handler	0	static
+stm32f1xx_it.c:214:6:DMA1_Channel1_IRQHandler	0	static
+stm32f1xx_it.c:228:6:DMA1_Channel4_IRQHandler	0	static
+stm32f1xx_it.c:242:6:DMA1_Channel5_IRQHandler	0	static
+stm32f1xx_it.c:256:6:DMA1_Channel7_IRQHandler	0	static
+stm32f1xx_it.c:270:6:ADC1_2_IRQHandler	0	static
+stm32f1xx_it.c:284:6:TIM2_IRQHandler	0	static
+stm32f1xx_it.c:298:6:USART1_IRQHandler	0	static
+stm32f1xx_it.c:312:6:USART2_IRQHandler	0	static
+stm32f1xx_it.c:326:6:ADC3_IRQHandler	0	static
+stm32f1xx_it.c:340:6:TIM6_IRQHandler	0	static
+stm32f1xx_it.c:354:6:DMA2_Channel4_5_IRQHandler	0	static

STM32F103ZET_JDASMBIC.ioc

@@ -181,9 +181,9 @@ NVIC.ADC1_2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
 NVIC.ADC3_IRQn=true\:0\:0\:false\:true\:true\:6\:true\:true
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:true\:true\:1\:false\:true
-NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:true\:true\:9\:false\:true
-NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:true\:true\:10\:false\:true
-NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:true\:true\:8\:false\:true
+NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:true\:true\:8\:false\:true
+NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:true\:true\:9\:false\:true
+NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:true\:true\:7\:false\:true
 NVIC.DMA2_Channel4_5_IRQn=true\:0\:0\:false\:true\:true\:4\:false\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.ForceEnableDMAVector=true
@@ -461,7 +461,7 @@ ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=TrueSTUDIO
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_ADC3_Init-ADC3-false-HAL-true,7-MX_USART2_UART_Init-USART2-false-HAL-true,8-MX_TIM6_Init-TIM6-false-HAL-true,9-MX_I2C2_Init-I2C2-false-HAL-true,10-MX_IWDG_Init-IWDG-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_ADC3_Init-ADC3-false-HAL-true,7-MX_USART2_UART_Init-USART2-false-HAL-true,8-MX_TIM6_Init-TIM6-false-HAL-true,9-MX_I2C2_Init-I2C2-false-HAL-true,10-MX_IWDG_Init-IWDG-false-HAL-true,11-MX_TIM7_Init-TIM7-false-HAL-true
 RCC.ADCFreqValue=14000000
 RCC.ADCPresc=RCC_ADCPCLK2_DIV4
 RCC.AHBFreq_Value=56000000

Src/main.c

@@ -119,9 +119,9 @@ volatile uint32_t Alarm_DL_Level_TimerOnCnt = 0;
 volatile uint32_t Alarm_UL_Level_TimerOffCnt = 0;
 volatile uint32_t Alarm_UL_Level_TimerOnCnt = 0;
 
-
 volatile uint32_t SelfTestLifeCnt[4] = {0,};
 
+volatile uint32_t ADC_100ms_Cnt = 0;
 
 
 
@@ -197,10 +197,11 @@ int _write (int file, uint8_t *ptr, uint16_t len)
 
     return len;
 }
-uint16_t adc1cnt = 0 ;
-uint16_t adc3cnt = 0 ;
+uint32_t adc1cnt = 0 ;
+uint32_t adc3cnt = 0 ;
 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
 {
+#if 0 // PYJ.2020.08.07_BEGIN -- 
     if(hadc->Instance == hadc1.Instance)
     {
         if(adc1cnt < ADC_AVERAGECNT){
@@ -219,6 +220,24 @@ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
             adc3cnt++;
         }
     }
+#else
+    if(hadc->Instance == hadc1.Instance)
+    {
+        for(int i = 0; i < 4; i++){
+            ADC1valuearray[i][adc1cnt] = ADC1value[i];
+        }
+        adc1cnt++;
+    }
+
+    if(hadc->Instance == hadc3.Instance)
+    {
+        for(int i = 0; i < 5; i++){
+            ADC3valuearray[i][adc3cnt] = ADC3value[i];
+        }
+        adc3cnt++;
+    }    
+
+#endif // PYJ.2020.08.07_END -- 
 }
 
 extern void DET_LevelAlarmCheck();
@@ -227,6 +246,8 @@ extern void DET_LevelAlarmCheck();
 extern void ALC_Function();
 extern void Boot_LED_Toggle(void);
 extern void ADC_Check(void);
+extern void ADC_Sampling_Func();
+
 uint8_t MBICTest_Firmdata[8]  = {1,2,3,4,5,6,7,8};
 
 /* USER CODE END 0 */
@@ -605,7 +626,6 @@ static void MX_IWDG_Init(void)
   hiwdg.Instance = IWDG;
   hiwdg.Init.Prescaler = IWDG_PRESCALER_128;
   hiwdg.Init.Reload = 4095;
-
   if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
   {
     Error_Handler();
@@ -918,6 +938,8 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
       LDTimerCnt++;
       ALCTimerCnt++;
       AGCTimerCnt++;
+      ADC_Sampling_Func();
+      ADC_100ms_Cnt++;
 //    pdata = &bluecell_Currdatastatus.ATT_UL1_PATH;
     UL_Shutdown_Timer(DET_Alarm_UL1_Shutdown_Index);
 //    pdata = &bluecell_Currdatastatus.ATT_UL2_PATH;