- 와치독 기능 구현

- Uart Data 받을 때 마다 와치독 Refresh 하도록 수정
- Bluecell protocol / MBIC protocol 두개의 통신 할 때 와치독 Init 하도록 수정
- 와치독 드라이버 추가
- 기능 13초에서 ~15초 사이에 리셋 한다.
- 하드웨어 와치독 IC 추가 취소로 인해 할당 된 핀제거

Bluecell_Inc/Bluecell_operate.h

@@ -1595,6 +1595,7 @@ extern BLUESTATUS_st bluecell_Currdatastatus;
 extern volatile uint32_t ALCTimerCnt;
 extern volatile uint32_t AGCTimerCnt;
 
+extern IWDG_HandleTypeDef hiwdg;
 
 
 extern void Bluecell_DataInit();

Bluecell_Inc/uart.h

@@ -29,7 +29,7 @@ typedef struct  {
 
 extern UART_HandleTypeDef huart1;
 extern UART_HandleTypeDef huart2;
-
+extern IWDG_HandleTypeDef hiwdg;
 
 extern UARTQUEUE TerminalQueue;
 void PutDataToUartQueue(UART_HandleTypeDef *huart, uint8_t data);

Bluecell_Src/Bluecell_operate.c

@@ -2398,9 +2398,14 @@ bool Bluecell_Operate(uint8_t* data){
     case Bluecell_StatusReq:
         if(Initialize == false){
 //            printf("Atten Init \r\n");
+
             Bluecell_DataInit();
             HAL_Delay(10);
             Bluecell_AttenInitialize();
+              if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
+              {
+                Error_Handler();
+              }            
             Initialize = true;
         }
         DataStatusSet();
@@ -4570,6 +4575,10 @@ bool MBIC_Operate(uint8_t* data){
             Bluecell_DataInit();
             Bluecell_AttenInitialize();
             Initialize = true;
+          if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
+          {
+            Error_Handler();
+          }
         }
         HFR_TypeInit();        
         data[MBIC_CMD_0] = 0x80;//MBIC_ERRRESPONSE;

Bluecell_Src/uart.c

@@ -18,6 +18,7 @@ UARTQUEUE TerminalQueue;
 UARTQUEUE WifiQueue;
 uart_hal_tx_type uart_hal_tx;
 extern volatile uint32_t UartRxTimerCnt;
+
 extern bool Bluecell_Operate(uint8_t* data);
 extern void MBIC_Operate(uint8_t * data);
 
@@ -97,6 +98,7 @@ void GetDataFromUartQueue(UART_HandleTypeDef *huart)
     pQueue->data--;
     
     if(pQueue->data == 0){
+	HAL_IWDG_Refresh(&hiwdg);
 //        printf("data cnt zero !!!  \r\n");
         //RF_Ctrl_Main(&uart_buf[Header]);
 //        HAL_UART_Transmit(dst, &temp_buf[BLUECELL_HEADER00], 11, 3000);

Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h

@@ -0,0 +1,222 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_iwdg.h
+  * @author  MCD Application Team
+  * @brief   Header file of IWDG HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F1xx_HAL_IWDG_H
+#define STM32F1xx_HAL_IWDG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup IWDG
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Types IWDG Exported Types
+  * @{
+  */
+
+/**
+  * @brief  IWDG Init structure definition
+  */
+typedef struct
+{
+  uint32_t Prescaler;  /*!< Select the prescaler of the IWDG.
+                            This parameter can be a value of @ref IWDG_Prescaler */
+
+  uint32_t Reload;     /*!< Specifies the IWDG down-counter reload value.
+                            This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
+
+} IWDG_InitTypeDef;
+
+/**
+  * @brief  IWDG Handle Structure definition
+  */
+typedef struct
+{
+  IWDG_TypeDef                 *Instance;  /*!< Register base address    */
+
+  IWDG_InitTypeDef             Init;       /*!< IWDG required parameters */
+
+} IWDG_HandleTypeDef;
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
+  * @{
+  */
+
+/** @defgroup IWDG_Prescaler IWDG Prescaler
+  * @{
+  */
+#define IWDG_PRESCALER_4                0x00000000U                   /*!< IWDG prescaler set to 4   */
+#define IWDG_PRESCALER_8                IWDG_PR_PR_0                  /*!< IWDG prescaler set to 8   */
+#define IWDG_PRESCALER_16               IWDG_PR_PR_1                  /*!< IWDG prescaler set to 16  */
+#define IWDG_PRESCALER_32               (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32  */
+#define IWDG_PRESCALER_64               IWDG_PR_PR_2                  /*!< IWDG prescaler set to 64  */
+#define IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
+#define IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
+  * @{
+  */
+
+/**
+  * @brief  Enable the IWDG peripheral.
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define __HAL_IWDG_START(__HANDLE__)                WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
+
+/**
+  * @brief  Reload IWDG counter with value defined in the reload register
+  *         (write access to IWDG_PR & IWDG_RLR registers disabled).
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__)       WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup IWDG_Exported_Functions  IWDG Exported Functions
+  * @{
+  */
+
+/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
+  * @{
+  */
+/* Initialization/Start functions  ********************************************/
+HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
+/**
+  * @}
+  */
+
+/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
+  * @{
+  */
+/* I/O operation functions ****************************************************/
+HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup IWDG_Private_Constants IWDG Private Constants
+  * @{
+  */
+
+/**
+  * @brief  IWDG Key Register BitMask
+  */
+#define IWDG_KEY_RELOAD                 0x0000AAAAU  /*!< IWDG Reload Counter Enable   */
+#define IWDG_KEY_ENABLE                 0x0000CCCCU  /*!< IWDG Peripheral Enable       */
+#define IWDG_KEY_WRITE_ACCESS_ENABLE    0x00005555U  /*!< IWDG KR Write Access Enable  */
+#define IWDG_KEY_WRITE_ACCESS_DISABLE   0x00000000U  /*!< IWDG KR Write Access Disable */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup IWDG_Private_Macros IWDG Private Macros
+  * @{
+  */
+
+/**
+  * @brief  Enable write access to IWDG_PR and IWDG_RLR registers.
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__)  WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
+
+/**
+  * @brief  Disable write access to IWDG_PR and IWDG_RLR registers.
+  * @param  __HANDLE__  IWDG handle
+  * @retval None
+  */
+#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
+
+/**
+  * @brief  Check IWDG prescaler value.
+  * @param  __PRESCALER__  IWDG prescaler value
+  * @retval None
+  */
+#define IS_IWDG_PRESCALER(__PRESCALER__)      (((__PRESCALER__) == IWDG_PRESCALER_4)  || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_8)  || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_16) || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_32) || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_64) || \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
+                                               ((__PRESCALER__) == IWDG_PRESCALER_256))
+
+/**
+  * @brief  Check IWDG reload value.
+  * @param  __RELOAD__  IWDG reload value
+  * @retval None
+  */
+#define IS_IWDG_RELOAD(__RELOAD__)            ((__RELOAD__) <= IWDG_RLR_RL)
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32F1xx_HAL_IWDG_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c

@@ -0,0 +1,240 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_hal_iwdg.c
+  * @author  MCD Application Team
+  * @brief   IWDG HAL module driver.
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the Independent Watchdog (IWDG) peripheral:
+  *           + Initialization and Start functions
+  *           + IO operation functions
+  *
+  @verbatim
+  ==============================================================================
+                    ##### IWDG Generic features #####
+  ==============================================================================
+  [..]
+    (+) The IWDG can be started by either software or hardware (configurable
+        through option byte).
+
+    (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
+        if the main clock fails.
+
+    (+) Once the IWDG is started, the LSI is forced ON and both can not be
+        disabled. The counter starts counting down from the reset value (0xFFF).
+        When it reaches the end of count value (0x000) a reset signal is
+        generated (IWDG reset).
+
+    (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
+        the IWDG_RLR value is reloaded in the counter and the watchdog reset is
+        prevented.
+
+    (+) The IWDG is implemented in the VDD voltage domain that is still functional
+        in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
+        IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
+        reset occurs.
+
+    (+) Debug mode : When the microcontroller enters debug mode (core halted),
+        the IWDG counter either continues to work normally or stops, depending
+        on DBG_IWDG_STOP configuration bit in DBG module, accessible through
+        __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
+
+    [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
+         The IWDG timeout may vary due to LSI frequency dispersion. STM32F1xx
+         devices provide the capability to measure the LSI frequency (LSI clock
+         connected internally to TIM5 CH4 input capture). The measured value
+         can be used to have an IWDG timeout with an acceptable accuracy.
+
+                     ##### How to use this driver #####
+  ==============================================================================
+  [..]
+    (#) Use IWDG using HAL_IWDG_Init() function to :
+      (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
+           clock is forced ON and IWDG counter starts downcounting.
+      (++) Enable write access to configuration register: IWDG_PR & IWDG_RLR.
+      (++) Configure the IWDG prescaler and counter reload value. This reload
+           value will be loaded in the IWDG counter each time the watchdog is
+           reloaded, then the IWDG will start counting down from this value.
+      (++) wait for status flags to be reset"
+
+    (#) Then the application program must refresh the IWDG counter at regular
+        intervals during normal operation to prevent an MCU reset, using
+        HAL_IWDG_Refresh() function.
+
+     *** IWDG HAL driver macros list ***
+     ====================================
+     [..]
+       Below the list of most used macros in IWDG HAL driver:
+      (+) __HAL_IWDG_START: Enable the IWDG peripheral
+      (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
+          the reload register
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+  * @{
+  */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+/** @defgroup IWDG IWDG
+  * @brief IWDG HAL module driver.
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/** @defgroup IWDG_Private_Defines IWDG Private Defines
+  * @{
+  */
+/* Status register need 5 RC LSI divided by prescaler clock to be updated. With
+   higher prescaler (256), and according to HSI variation, we need to wait at
+   least 6 cycles so 48 ms. */
+#define HAL_IWDG_DEFAULT_TIMEOUT            48U
+/**
+  * @}
+  */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup IWDG_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup IWDG_Exported_Functions_Group1
+  *  @brief    Initialization and Start functions.
+  *
+@verbatim
+ ===============================================================================
+          ##### Initialization and Start functions #####
+ ===============================================================================
+ [..]  This section provides functions allowing to:
+      (+) Initialize the IWDG according to the specified parameters in the
+          IWDG_InitTypeDef of associated handle.
+      (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
+          is reloaded in order to exit function with correct time base.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Initialize the IWDG according to the specified parameters in the
+  *         IWDG_InitTypeDef and start watchdog. Before exiting function,
+  *         watchdog is refreshed in order to have correct time base.
+  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
+  *                the configuration information for the specified IWDG module.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
+{
+  uint32_t tickstart;
+
+  /* Check the IWDG handle allocation */
+  if (hiwdg == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameters */
+  assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
+  assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
+  assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
+
+  /* Enable IWDG. LSI is turned on automaticaly */
+  __HAL_IWDG_START(hiwdg);
+
+  /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */
+  IWDG_ENABLE_WRITE_ACCESS(hiwdg);
+
+  /* Write to IWDG registers the Prescaler & Reload values to work with */
+  hiwdg->Instance->PR = hiwdg->Init.Prescaler;
+  hiwdg->Instance->RLR = hiwdg->Init.Reload;
+
+  /* Check pending flag, if previous update not done, return timeout */
+  tickstart = HAL_GetTick();
+
+  /* Wait for register to be updated */
+  while (hiwdg->Instance->SR != RESET)
+  {
+    if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
+    {
+      return HAL_TIMEOUT;
+    }
+  }
+
+  /* Reload IWDG counter with value defined in the reload register */
+  __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @}
+  */
+
+/** @addtogroup IWDG_Exported_Functions_Group2
+  *  @brief   IO operation functions
+  *
+@verbatim
+ ===============================================================================
+                      ##### IO operation functions #####
+ ===============================================================================
+ [..]  This section provides functions allowing to:
+      (+) Refresh the IWDG.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Refresh the IWDG.
+  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
+  *                the configuration information for the specified IWDG module.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
+{
+  /* Reload IWDG counter with value defined in the reload register */
+  __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* HAL_IWDG_MODULE_ENABLED */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Inc/stm32f1xx_hal_conf.h

@@ -48,7 +48,7 @@
 #define HAL_I2C_MODULE_ENABLED
 /*#define HAL_I2S_MODULE_ENABLED   */
 /*#define HAL_IRDA_MODULE_ENABLED   */
-/*#define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_IWDG_MODULE_ENABLED
 /*#define HAL_NOR_MODULE_ENABLED   */
 /*#define HAL_NAND_MODULE_ENABLED   */
 /*#define HAL_PCCARD_MODULE_ENABLED   */

STM32F103ZET_JDASMBIC.ioc

@@ -91,19 +91,23 @@ File.Version=6
 GPIO.groupedBy=Group By Peripherals
 I2C2.I2C_Mode=I2C_Standard
 I2C2.IPParameters=I2C_Mode
+IWDG.IPParameters=Reload,Prescaler
+IWDG.Prescaler=IWDG_PRESCALER_128
+IWDG.Reload=4095
 KeepUserPlacement=false
 Mcu.Family=STM32F1
 Mcu.IP0=ADC1
 Mcu.IP1=ADC3
+Mcu.IP10=USART2
 Mcu.IP2=DMA
 Mcu.IP3=I2C2
-Mcu.IP4=NVIC
-Mcu.IP5=RCC
-Mcu.IP6=SYS
-Mcu.IP7=TIM6
-Mcu.IP8=USART1
-Mcu.IP9=USART2
-Mcu.IPNb=10
+Mcu.IP4=IWDG
+Mcu.IP5=NVIC
+Mcu.IP6=RCC
+Mcu.IP7=SYS
+Mcu.IP8=TIM6
+Mcu.IP9=USART1
+Mcu.IPNb=11
 Mcu.Name=STM32F103Z(C-D-E)Tx
 Mcu.Package=LQFP144
 Mcu.Pin0=PE3
@@ -160,13 +164,14 @@ Mcu.Pin54=PG15
 Mcu.Pin55=PB6
 Mcu.Pin56=PB7
 Mcu.Pin57=PB9
-Mcu.Pin58=VP_SYS_VS_tim2
-Mcu.Pin59=VP_TIM6_VS_ClockSourceINT
+Mcu.Pin58=VP_IWDG_VS_IWDG
+Mcu.Pin59=VP_SYS_VS_tim2
 Mcu.Pin6=PF9
+Mcu.Pin60=VP_TIM6_VS_ClockSourceINT
 Mcu.Pin7=PF10
 Mcu.Pin8=PC2
 Mcu.Pin9=PA2
-Mcu.PinsNb=60
+Mcu.PinsNb=61
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F103ZETx
@@ -456,7 +461,7 @@ ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=TrueSTUDIO
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_ADC3_Init-ADC3-false-HAL-true,7-MX_USART2_UART_Init-USART2-false-HAL-true,8-MX_TIM6_Init-TIM6-false-HAL-true,9-MX_I2C2_Init-I2C2-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_ADC3_Init-ADC3-false-HAL-true,7-MX_USART2_UART_Init-USART2-false-HAL-true,8-MX_TIM6_Init-TIM6-false-HAL-true,9-MX_I2C2_Init-I2C2-false-HAL-true,10-MX_IWDG_Init-IWDG-false-HAL-true
 RCC.ADCFreqValue=14000000
 RCC.ADCPresc=RCC_ADCPCLK2_DIV4
 RCC.AHBFreq_Value=56000000
@@ -500,6 +505,8 @@ USART1.VirtualMode=VM_ASYNC
 USART2.BaudRate=115200
 USART2.IPParameters=VirtualMode,BaudRate
 USART2.VirtualMode=VM_ASYNC
+VP_IWDG_VS_IWDG.Mode=IWDG_Activate
+VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
 VP_SYS_VS_tim2.Mode=TIM2
 VP_SYS_VS_tim2.Signal=SYS_VS_tim2
 VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer

Src/main.c

@@ -53,6 +53,8 @@ DMA_HandleTypeDef hdma_adc3;
 
 I2C_HandleTypeDef hi2c2;
 
+IWDG_HandleTypeDef hiwdg;
+
 TIM_HandleTypeDef htim6;
 
 UART_HandleTypeDef huart1;
@@ -157,6 +159,7 @@ static void MX_ADC3_Init(void);
 static void MX_USART2_UART_Init(void);
 static void MX_TIM6_Init(void);
 static void MX_I2C2_Init(void);
+static void MX_IWDG_Init(void);
 static void MX_NVIC_Init(void);
 /* USER CODE BEGIN PFP */
 extern void Booting_LedInit(void);
@@ -264,6 +267,7 @@ int main(void)
   MX_USART2_UART_Init();
   MX_TIM6_Init();
   MX_I2C2_Init();
+  MX_IWDG_Init();
 
   /* Initialize interrupts */
   MX_NVIC_Init();
@@ -296,7 +300,16 @@ int main(void)
     printf("Copyright (c) 2020. BLUECELL\r\n");
     printf("****************************************\r\n");
 #endif // PYJ.2020.05.06_END --  
-  
+    /* whachdog Reset Operated? */
+  //   if(__HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST) == SET)
+  // {
+  //   __HAL_RCC_CLEAR_RESET_FLAGS();
+  // }
+
+  /* USER CODE END 2 */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
   while (1)
   {
     Boot_LED_Toggle(); /*LED Check*/
@@ -326,9 +339,10 @@ void SystemClock_Config(void)
 
   /** Initializes the CPU, AHB and APB busses clocks 
   */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL14;
@@ -572,6 +586,35 @@ static void MX_I2C2_Init(void)
 
 }
 
+/**
+  * @brief IWDG Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_IWDG_Init(void)
+{
+
+  /* USER CODE BEGIN IWDG_Init 0 */
+
+  /* USER CODE END IWDG_Init 0 */
+
+  /* USER CODE BEGIN IWDG_Init 1 */
+
+  /* USER CODE END IWDG_Init 1 */
+  hiwdg.Instance = IWDG;
+  hiwdg.Init.Prescaler = IWDG_PRESCALER_128;
+  hiwdg.Init.Reload = 4095;
+#if 1  
+//  if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
+//  {
+//    Error_Handler();
+//  }
+  /* USER CODE BEGIN IWDG_Init 2 */
+#endif
+  /* USER CODE END IWDG_Init 2 */
+
+}
+
 /**
   * @brief TIM6 Initialization Function
   * @param None
@@ -874,7 +917,6 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
       LDTimerCnt++;
       ALCTimerCnt++;
       AGCTimerCnt++;
-      
 //    pdata = &bluecell_Currdatastatus.ATT_UL1_PATH;
     UL_Shutdown_Timer(DET_Alarm_UL1_Shutdown_Index);
 //    pdata = &bluecell_Currdatastatus.ATT_UL2_PATH;