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@@ -56,47 +56,37 @@ Dma.ADC3.1.Priority=DMA_PRIORITY_LOW
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Dma.ADC3.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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Dma.Request0=ADC1
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Dma.Request1=ADC3
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-Dma.Request2=USART2_RX
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-Dma.Request3=USART2_TX
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-Dma.Request4=USART1_RX
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-Dma.Request5=USART1_TX
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-Dma.RequestsNb=6
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-Dma.USART1_RX.4.Direction=DMA_PERIPH_TO_MEMORY
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-Dma.USART1_RX.4.Instance=DMA1_Channel5
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-Dma.USART1_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
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-Dma.USART1_RX.4.MemInc=DMA_MINC_ENABLE
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-Dma.USART1_RX.4.Mode=DMA_NORMAL
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-Dma.USART1_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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-Dma.USART1_RX.4.PeriphInc=DMA_PINC_DISABLE
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-Dma.USART1_RX.4.Priority=DMA_PRIORITY_LOW
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-Dma.USART1_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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-Dma.USART1_TX.5.Direction=DMA_MEMORY_TO_PERIPH
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-Dma.USART1_TX.5.Instance=DMA1_Channel4
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-Dma.USART1_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
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-Dma.USART1_TX.5.MemInc=DMA_MINC_ENABLE
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-Dma.USART1_TX.5.Mode=DMA_NORMAL
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-Dma.USART1_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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-Dma.USART1_TX.5.PeriphInc=DMA_PINC_DISABLE
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-Dma.USART1_TX.5.Priority=DMA_PRIORITY_LOW
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-Dma.USART1_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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-Dma.USART2_RX.2.Direction=DMA_PERIPH_TO_MEMORY
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-Dma.USART2_RX.2.Instance=DMA1_Channel6
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-Dma.USART2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
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-Dma.USART2_RX.2.MemInc=DMA_MINC_ENABLE
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-Dma.USART2_RX.2.Mode=DMA_NORMAL
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-Dma.USART2_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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-Dma.USART2_RX.2.PeriphInc=DMA_PINC_DISABLE
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-Dma.USART2_RX.2.Priority=DMA_PRIORITY_LOW
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-Dma.USART2_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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-Dma.USART2_TX.3.Direction=DMA_MEMORY_TO_PERIPH
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-Dma.USART2_TX.3.Instance=DMA1_Channel7
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-Dma.USART2_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
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-Dma.USART2_TX.3.MemInc=DMA_MINC_ENABLE
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-Dma.USART2_TX.3.Mode=DMA_NORMAL
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-Dma.USART2_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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-Dma.USART2_TX.3.PeriphInc=DMA_PINC_DISABLE
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-Dma.USART2_TX.3.Priority=DMA_PRIORITY_LOW
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-Dma.USART2_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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+Dma.Request2=USART2_TX
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+Dma.Request3=USART1_RX
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+Dma.Request4=USART1_TX
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+Dma.RequestsNb=5
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+Dma.USART1_RX.3.Direction=DMA_PERIPH_TO_MEMORY
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+Dma.USART1_RX.3.Instance=DMA1_Channel5
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+Dma.USART1_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
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+Dma.USART1_RX.3.MemInc=DMA_MINC_ENABLE
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+Dma.USART1_RX.3.Mode=DMA_NORMAL
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+Dma.USART1_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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+Dma.USART1_RX.3.PeriphInc=DMA_PINC_DISABLE
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+Dma.USART1_RX.3.Priority=DMA_PRIORITY_LOW
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+Dma.USART1_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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+Dma.USART1_TX.4.Direction=DMA_MEMORY_TO_PERIPH
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+Dma.USART1_TX.4.Instance=DMA1_Channel4
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+Dma.USART1_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
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+Dma.USART1_TX.4.MemInc=DMA_MINC_ENABLE
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+Dma.USART1_TX.4.Mode=DMA_NORMAL
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+Dma.USART1_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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+Dma.USART1_TX.4.PeriphInc=DMA_PINC_DISABLE
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+Dma.USART1_TX.4.Priority=DMA_PRIORITY_LOW
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+Dma.USART1_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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+Dma.USART2_TX.2.Direction=DMA_MEMORY_TO_PERIPH
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+Dma.USART2_TX.2.Instance=DMA1_Channel7
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+Dma.USART2_TX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
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+Dma.USART2_TX.2.MemInc=DMA_MINC_ENABLE
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+Dma.USART2_TX.2.Mode=DMA_NORMAL
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+Dma.USART2_TX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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+Dma.USART2_TX.2.PeriphInc=DMA_PINC_DISABLE
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+Dma.USART2_TX.2.Priority=DMA_PRIORITY_LOW
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+Dma.USART2_TX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
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File.Version=6
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GPIO.groupedBy=Group By Peripherals
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I2C2.I2C_Mode=I2C_Fast
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@@ -188,7 +178,6 @@ NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:true\:true\:1\:false\:true
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NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:true\:true\:9\:false\:true
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NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:true\:true\:10\:false\:true
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-NVIC.DMA1_Channel6_IRQn=true\:0\:0\:false\:true\:true\:7\:false\:true
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NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:true\:true\:8\:false\:true
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NVIC.DMA2_Channel4_5_IRQn=true\:0\:0\:false\:true\:true\:4\:false\:true
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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