|
@@ -1462,10 +1462,16 @@ uint8_t* MBIC_HeaderDataSetting(uint8_t* data){
|
1462
|
1462
|
ResultData[MBIC_LENGTH_0] = MBIC_ERRRESPONSE;
|
1463
|
1463
|
ResultData[MBIC_LENGTH_1] = MBIC_ERRRESPONSE;
|
1464
|
1464
|
|
1465
|
|
- ResultData[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ResultData,MBIC_HEADER_SIZE - 1,);
|
|
1465
|
+ ResultData[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ResultData,MBIC_HEADER_SIZE - 1);
|
1466
|
1466
|
|
1467
|
1467
|
return ResultData;
|
1468
|
1468
|
}
|
|
1469
|
+void ALARM_Value_Get(uint8_t datatype,uint8_t* ret){
|
|
1470
|
+ switch(datatype){
|
|
1471
|
+
|
|
1472
|
+ }
|
|
1473
|
+
|
|
1474
|
+}
|
1469
|
1475
|
|
1470
|
1476
|
typedef enum{
|
1471
|
1477
|
MBIC_GET = 0,
|
|
@@ -1486,10 +1492,10 @@ bool MBIC_Operate(uint8_t* data){
|
1486
|
1492
|
if(cmd == MBIC_GET){
|
1487
|
1493
|
switch(datatype){
|
1488
|
1494
|
case Alarm_Bit_List :
|
1489
|
|
-//
|
|
1495
|
+ ALARM_Value_Get(datatype,&ResultData[MBIC_PAYLOADSTART]);
|
1490
|
1496
|
break;
|
1491
|
1497
|
case Alarm_Mask :
|
1492
|
|
-
|
|
1498
|
+ /*Question!!?*/
|
1493
|
1499
|
break;
|
1494
|
1500
|
case Alarm_Test_Mode :
|
1495
|
1501
|
|
|
@@ -1519,150 +1525,427 @@ bool MBIC_Operate(uint8_t* data){
|
1519
|
1525
|
case CPU_Bank2_Image_Name :break;
|
1520
|
1526
|
case SW_Reset :break;
|
1521
|
1527
|
case Factory_Set_Initialization :break;
|
1522
|
|
- case Temperature :break;
|
1523
|
|
- case Temperature_Offset :break;
|
|
1528
|
+ case Temperature :
|
|
1529
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.DET_TEMP_H
|
|
1530
|
+ break;
|
|
1531
|
+ case Temperature_Offset :
|
|
1532
|
+
|
|
1533
|
+ break;
|
1524
|
1534
|
case Temp_High_Threshold :
|
1525
|
1535
|
ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.Temp_High_Threshold;
|
1526
|
1536
|
break;
|
1527
|
1537
|
case Temp_High_Threshold_Default :
|
1528
|
1538
|
ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.Temp_High_Threshold_Default;
|
1529
|
1539
|
break;
|
1530
|
|
- case Temp_High_Alarm :break;
|
1531
|
|
- case LED_TEST :break;
|
1532
|
|
- case Node :break;
|
1533
|
|
- case Type :break;
|
1534
|
|
- case PCB_Version :break;
|
1535
|
|
- case Serial_Number :break;
|
1536
|
|
- case Manufacture :break;
|
1537
|
|
- case Manufacture_Date :break;
|
1538
|
|
- case ENVIRONMENT_INVENTORY_NULL0 :break;
|
1539
|
|
- case Freq_ID :break;
|
1540
|
|
- case Carrier_ID :break;
|
1541
|
|
- case Carrier_ON_OFF :break;
|
1542
|
|
- case DLI_P1_Level :break;
|
1543
|
|
- case DLI_P2_Level :break;
|
1544
|
|
- case DLI_P3_Level :break;
|
1545
|
|
- case DLI_P4_Level :break;
|
1546
|
|
- case ULO_P1_Level :break;
|
1547
|
|
- case ULO_P2_Level :break;
|
1548
|
|
- case ULO_P3_Level :break;
|
1549
|
|
- case ULO_P4_Level :break;
|
1550
|
|
- case DLI_RF_Path1_ON_OFF :break;
|
1551
|
|
- case DLI_RF_Path2_ON_OFF :break;
|
1552
|
|
- case DLI_RF_Path3_ON_OFF :break;
|
1553
|
|
- case DLI_RF_Path4_ON_OFF :break;
|
1554
|
|
- case DLI_Gain_Atten1 :break;
|
1555
|
|
- case DLI_Gain_Atten2 :break;
|
1556
|
|
- case DLI_Gain_Atten3 :break;
|
1557
|
|
- case DLI_Gain_Atten4 :break;
|
1558
|
|
- case DLI_Gain_Atten_Offset1 :break;
|
1559
|
|
- case DLI_Gain_Atten_Offset2 :break;
|
1560
|
|
- case DLI_Gain_Atten_Offset3 :break;
|
1561
|
|
- case DLI_Gain_Atten_Offset4 :break;
|
1562
|
|
- case DLI_Level_High_Threshold :break;
|
1563
|
|
- case DLI_Level_Low_Threshold :break;
|
1564
|
|
- case DLI_Level_High_Low_Threshold_default :break;
|
1565
|
|
- case DLI_Level :break;
|
1566
|
|
- case DLI_Level_High_Alarm1 :break;
|
1567
|
|
- case DLI_Level_High_Alarm2 :break;
|
1568
|
|
- case DLI_Level_High_Alarm3 :break;
|
1569
|
|
- case DLI_Level_High_Alarm4 :break;
|
1570
|
|
- case DLI_Level_Low_Alarm1 :break;
|
1571
|
|
- case DLI_Level_Low_Alarm2 :break;
|
1572
|
|
- case DLI_Level_Low_Alarm3 :break;
|
1573
|
|
- case DLI_Level_Low_Alarm4 :break;
|
1574
|
|
- case DLI_AGC_ON_OFF :break;
|
1575
|
|
- case DLI_AGC_Threshold :break;
|
1576
|
|
- case DLI_AGC_Threshold_Default :break;
|
1577
|
|
- case DLI_Shutdown_ON_OFF :break;
|
1578
|
|
- case DLI_Shutdown_Threshold :break;
|
1579
|
|
- case DLI_Shutdown_Threshold_Default :break;
|
1580
|
|
- case DLI_Shutdown_Count :break;
|
1581
|
|
- case DLI_AGC_Alarm1 :break;
|
1582
|
|
- case DLI_AGC_Alarm2 :break;
|
1583
|
|
- case DLI_AGC_Alarm3 :break;
|
1584
|
|
- case DLI_AGC_Alarm4 :break;
|
1585
|
|
- case DLI_Shutdown_Alarm1 :break;
|
1586
|
|
- case DLI_Shutdown_Alarm2 :break;
|
1587
|
|
- case DLI_Shutdown_Alarm3 :break;
|
1588
|
|
- case DLI_Shutdown_Alarm4 :break;
|
1589
|
|
- case ULO_RF_Path1_ON_OFF1 :break;
|
1590
|
|
- case ULO_RF_Path2_ON_OFF2 :break;
|
1591
|
|
- case ULO_RF_Path3_ON_OFF3 :break;
|
1592
|
|
- case ULO_RF_Path4_ON_OFF4 :break;
|
1593
|
|
- case ULO_Gain_Atten1 :break;
|
1594
|
|
- case ULO_Gain_Atten2 :break;
|
1595
|
|
- case ULO_Gain_Atten3 :break;
|
1596
|
|
- case ULO_Gain_Atten4 :break;
|
1597
|
|
- case ULO_Gain_Atten_Offset1 :break;
|
1598
|
|
- case ULO_Gain_Atten_Offset2 :break;
|
1599
|
|
- case ULO_Gain_Atten_Offset3 :break;
|
1600
|
|
- case ULO_Gain_Atten_Offset4 :break;
|
1601
|
|
- case ULO_Level_High_Threshold :break;
|
1602
|
|
- case SERIAL_UL_NULL0 :break;
|
1603
|
|
- case ULO_Level_High_Threshold_default :break;
|
1604
|
|
- case ULO_Level :break;
|
1605
|
|
- case ULO_Level_High_Alarm1 :break;
|
1606
|
|
- case ULO_Level_High_Alarm2 :break;
|
1607
|
|
- case ULO_Level_High_Alarm3 :break;
|
1608
|
|
- case ULO_Level_High_Alarm4 :break;
|
1609
|
|
- case SERIAL_UL_NULL1 :break;
|
1610
|
|
- case ULO_ALC_ON_OFF :break;
|
1611
|
|
- case ULO_ALC_Threshold :break;
|
1612
|
|
- case ULO_ALC_Threshold_Default :break;
|
1613
|
|
- case ULO_Shutdown_ON_OFF :break;
|
1614
|
|
- case ULO_Shutdown_Threshold :break;
|
1615
|
|
- case ULO_Shutdown_Threshold_Default :break;
|
1616
|
|
- case ULO_Shutdown_Retry_Count :break;
|
1617
|
|
- case ULO_ALC_Alarm1 :break;
|
1618
|
|
- case ULO_ALC_Alarm2 :break;
|
1619
|
|
- case ULO_ALC_Alarm3 :break;
|
1620
|
|
- case ULO_ALC_Alarm4 :break;
|
1621
|
|
- case ULO_Shutdown_Alarm1 :break;
|
1622
|
|
- case ULO_Shutdown_Alarm2 :break;
|
1623
|
|
- case ULO_Shutdown_Alarm3 :break;
|
1624
|
|
- case ULO_Shutdown_Alarm4 :break;
|
|
1540
|
+ case Temp_High_Alarm :
|
|
1541
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ALARM_TEMP_HIGH;
|
|
1542
|
+ break;
|
|
1543
|
+ case LED_TEST :
|
|
1544
|
+
|
|
1545
|
+ break;
|
|
1546
|
+ case Node :
|
|
1547
|
+ ResultData[MBIC_PAYLOADSTART] = MBIC_NODE_MU;
|
|
1548
|
+ break;
|
|
1549
|
+ case Type :
|
|
1550
|
+
|
|
1551
|
+ break;
|
|
1552
|
+ case PCB_Version :
|
|
1553
|
+
|
|
1554
|
+ break;
|
|
1555
|
+ case Serial_Number :
|
|
1556
|
+
|
|
1557
|
+ break;
|
|
1558
|
+ case Manufacture :
|
|
1559
|
+
|
|
1560
|
+ break;
|
|
1561
|
+ case Manufacture_Date :
|
|
1562
|
+
|
|
1563
|
+ break;
|
|
1564
|
+ case ENVIRONMENT_INVENTORY_NULL0 :
|
|
1565
|
+ /*NOP*/
|
|
1566
|
+ break;
|
|
1567
|
+ case Freq_ID :
|
|
1568
|
+
|
|
1569
|
+ break;
|
|
1570
|
+ case Carrier_ID :
|
|
1571
|
+
|
|
1572
|
+ break;
|
|
1573
|
+ case Carrier_ON_OFF :
|
|
1574
|
+
|
|
1575
|
+ break;
|
|
1576
|
+ case DLI_P1_Level :
|
|
1577
|
+
|
|
1578
|
+ break;
|
|
1579
|
+ case DLI_P2_Level :
|
|
1580
|
+
|
|
1581
|
+ break;
|
|
1582
|
+ case DLI_P3_Level :
|
|
1583
|
+
|
|
1584
|
+ break;
|
|
1585
|
+ case DLI_P4_Level :
|
|
1586
|
+
|
|
1587
|
+ break;
|
|
1588
|
+ case ULO_P1_Level :
|
|
1589
|
+
|
|
1590
|
+ break;
|
|
1591
|
+ case ULO_P2_Level :
|
|
1592
|
+
|
|
1593
|
+ break;
|
|
1594
|
+ case ULO_P3_Level :
|
|
1595
|
+
|
|
1596
|
+ break;
|
|
1597
|
+ case ULO_P4_Level :
|
|
1598
|
+
|
|
1599
|
+ break;
|
|
1600
|
+ case DLI_RF_Path1_ON_OFF :
|
|
1601
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL1_PATH;
|
|
1602
|
+ break;
|
|
1603
|
+ case DLI_RF_Path2_ON_OFF :
|
|
1604
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL2_PATH;
|
|
1605
|
+ break;
|
|
1606
|
+ case DLI_RF_Path3_ON_OFF :
|
|
1607
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL3_PATH;
|
|
1608
|
+ break;
|
|
1609
|
+ case DLI_RF_Path4_ON_OFF :
|
|
1610
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL4_PATH;
|
|
1611
|
+ break;
|
|
1612
|
+ case DLI_Gain_Atten1 :
|
|
1613
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL1_H;
|
|
1614
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.ATT_DL1_L;
|
|
1615
|
+ break;
|
|
1616
|
+ case DLI_Gain_Atten2 :
|
|
1617
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL2_H;
|
|
1618
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.ATT_DL2_L;
|
|
1619
|
+ break;
|
|
1620
|
+ case DLI_Gain_Atten3 :
|
|
1621
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL3_H;
|
|
1622
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.ATT_DL3_L;
|
|
1623
|
+ break;
|
|
1624
|
+ case DLI_Gain_Atten4 :
|
|
1625
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_DL4_H;
|
|
1626
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.ATT_DL4_L;
|
|
1627
|
+ break;
|
|
1628
|
+ case DLI_Gain_Atten_Offset1 :
|
|
1629
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.bluecell_User_DL1_H;
|
|
1630
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.bluecell_User_DL1_L;
|
|
1631
|
+
|
|
1632
|
+ break;
|
|
1633
|
+ case DLI_Gain_Atten_Offset2 :
|
|
1634
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.bluecell_User_DL2_H;
|
|
1635
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.bluecell_User_DL2_L;
|
|
1636
|
+ break;
|
|
1637
|
+ case DLI_Gain_Atten_Offset3 :
|
|
1638
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.bluecell_User_DL3_H;
|
|
1639
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.bluecell_User_DL3_L;
|
|
1640
|
+ break;
|
|
1641
|
+ case DLI_Gain_Atten_Offset4 :
|
|
1642
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.bluecell_User_DL4_H;
|
|
1643
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.bluecell_User_DL4_L;
|
|
1644
|
+ break;
|
|
1645
|
+ case DLI_Level_High_Threshold :
|
|
1646
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.DLI_Level_High_Threshold_H;
|
|
1647
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.DLI_Level_High_Threshold_L;
|
|
1648
|
+ break;
|
|
1649
|
+ case DLI_Level_Low_Threshold :
|
|
1650
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.DLI_Level_Low_Threshold_H;
|
|
1651
|
+ ResultData[MBIC_PAYLOADSTART + 1] = bluecell_Currdatastatus.DLI_Level_Low_Threshold_L;
|
|
1652
|
+ break;
|
|
1653
|
+ case DLI_Level_High_Low_Threshold_default :
|
|
1654
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.DLI_Level_High_Low_Threshold_default;
|
|
1655
|
+ break;
|
|
1656
|
+ case DLI_Level :
|
|
1657
|
+
|
|
1658
|
+ break;
|
|
1659
|
+ case DLI_Level_High_Alarm1 :
|
|
1660
|
+
|
|
1661
|
+ break;
|
|
1662
|
+ case DLI_Level_High_Alarm2 :
|
|
1663
|
+
|
|
1664
|
+ break;
|
|
1665
|
+ case DLI_Level_High_Alarm3 :
|
|
1666
|
+
|
|
1667
|
+ break;
|
|
1668
|
+ case DLI_Level_High_Alarm4 :
|
|
1669
|
+
|
|
1670
|
+ break;
|
|
1671
|
+ case DLI_Level_Low_Alarm1 :
|
|
1672
|
+
|
|
1673
|
+ break;
|
|
1674
|
+ case DLI_Level_Low_Alarm2 :
|
|
1675
|
+
|
|
1676
|
+ break;
|
|
1677
|
+ case DLI_Level_Low_Alarm3 :
|
|
1678
|
+
|
|
1679
|
+ break;
|
|
1680
|
+ case DLI_Level_Low_Alarm4 :
|
|
1681
|
+
|
|
1682
|
+ break;
|
|
1683
|
+ case DLI_AGC_ON_OFF :
|
|
1684
|
+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.ATT_AGC1_ONOFF;
|
|
1685
|
+ break;
|
|
1686
|
+ case DLI_AGC_Threshold :
|
|
1687
|
+
|
|
1688
|
+ break;
|
|
1689
|
+ case DLI_AGC_Threshold_Default :
|
|
1690
|
+
|
|
1691
|
+ break;
|
|
1692
|
+ case DLI_Shutdown_ON_OFF :
|
|
1693
|
+
|
|
1694
|
+ break;
|
|
1695
|
+ case DLI_Shutdown_Threshold :
|
|
1696
|
+
|
|
1697
|
+ break;
|
|
1698
|
+ case DLI_Shutdown_Threshold_Default :
|
|
1699
|
+
|
|
1700
|
+ break;
|
|
1701
|
+ case DLI_Shutdown_Count :
|
|
1702
|
+
|
|
1703
|
+ break;
|
|
1704
|
+ case DLI_AGC_Alarm1 :
|
|
1705
|
+
|
|
1706
|
+ break;
|
|
1707
|
+ case DLI_AGC_Alarm2 :
|
|
1708
|
+
|
|
1709
|
+ break;
|
|
1710
|
+ case DLI_AGC_Alarm3 :
|
|
1711
|
+
|
|
1712
|
+ break;
|
|
1713
|
+ case DLI_AGC_Alarm4 :
|
|
1714
|
+
|
|
1715
|
+ break;
|
|
1716
|
+ case DLI_Shutdown_Alarm1 :
|
|
1717
|
+
|
|
1718
|
+ break;
|
|
1719
|
+ case DLI_Shutdown_Alarm2 :
|
|
1720
|
+
|
|
1721
|
+ break;
|
|
1722
|
+ case DLI_Shutdown_Alarm3 :
|
|
1723
|
+
|
|
1724
|
+ break;
|
|
1725
|
+ case DLI_Shutdown_Alarm4 :
|
|
1726
|
+
|
|
1727
|
+ break;
|
|
1728
|
+ case ULO_RF_Path1_ON_OFF1 :
|
|
1729
|
+
|
|
1730
|
+ break;
|
|
1731
|
+ case ULO_RF_Path2_ON_OFF2 :
|
|
1732
|
+
|
|
1733
|
+ break;
|
|
1734
|
+ case ULO_RF_Path3_ON_OFF3 :
|
|
1735
|
+
|
|
1736
|
+ break;
|
|
1737
|
+ case ULO_RF_Path4_ON_OFF4 :
|
|
1738
|
+
|
|
1739
|
+ break;
|
|
1740
|
+ case ULO_Gain_Atten1 :
|
|
1741
|
+
|
|
1742
|
+ break;
|
|
1743
|
+ case ULO_Gain_Atten2 :
|
|
1744
|
+
|
|
1745
|
+ break;
|
|
1746
|
+ case ULO_Gain_Atten3 :
|
|
1747
|
+
|
|
1748
|
+ break;
|
|
1749
|
+ case ULO_Gain_Atten4 :
|
|
1750
|
+
|
|
1751
|
+ break;
|
|
1752
|
+ case ULO_Gain_Atten_Offset1 :
|
|
1753
|
+
|
|
1754
|
+ break;
|
|
1755
|
+ case ULO_Gain_Atten_Offset2 :
|
|
1756
|
+
|
|
1757
|
+ break;
|
|
1758
|
+ case ULO_Gain_Atten_Offset3 :
|
|
1759
|
+
|
|
1760
|
+ break;
|
|
1761
|
+ case ULO_Gain_Atten_Offset4 :
|
|
1762
|
+
|
|
1763
|
+ break;
|
|
1764
|
+ case ULO_Level_High_Threshold :
|
|
1765
|
+
|
|
1766
|
+ break;
|
|
1767
|
+ case SERIAL_UL_NULL0 :
|
|
1768
|
+
|
|
1769
|
+ break;
|
|
1770
|
+ case ULO_Level_High_Threshold_default :
|
|
1771
|
+
|
|
1772
|
+ break;
|
|
1773
|
+ case ULO_Level :
|
|
1774
|
+
|
|
1775
|
+ break;
|
|
1776
|
+ case ULO_Level_High_Alarm1 :
|
|
1777
|
+
|
|
1778
|
+ break;
|
|
1779
|
+ case ULO_Level_High_Alarm2 :
|
|
1780
|
+
|
|
1781
|
+ break;
|
|
1782
|
+ case ULO_Level_High_Alarm3 :
|
|
1783
|
+
|
|
1784
|
+ break;
|
|
1785
|
+ case ULO_Level_High_Alarm4 :
|
|
1786
|
+
|
|
1787
|
+ break;
|
|
1788
|
+ case SERIAL_UL_NULL1 :
|
|
1789
|
+
|
|
1790
|
+ break;
|
|
1791
|
+ case ULO_ALC_ON_OFF :
|
|
1792
|
+
|
|
1793
|
+ break;
|
|
1794
|
+ case ULO_ALC_Threshold :
|
|
1795
|
+
|
|
1796
|
+ break;
|
|
1797
|
+ case ULO_ALC_Threshold_Default :
|
|
1798
|
+
|
|
1799
|
+ break;
|
|
1800
|
+ case ULO_Shutdown_ON_OFF :
|
|
1801
|
+
|
|
1802
|
+ break;
|
|
1803
|
+ case ULO_Shutdown_Threshold :
|
|
1804
|
+
|
|
1805
|
+ break;
|
|
1806
|
+ case ULO_Shutdown_Threshold_Default :
|
|
1807
|
+
|
|
1808
|
+ break;
|
|
1809
|
+ case ULO_Shutdown_Retry_Count :
|
|
1810
|
+
|
|
1811
|
+ break;
|
|
1812
|
+ case ULO_ALC_Alarm1 :
|
|
1813
|
+
|
|
1814
|
+ break;
|
|
1815
|
+ case ULO_ALC_Alarm2 :
|
|
1816
|
+
|
|
1817
|
+ break;
|
|
1818
|
+ case ULO_ALC_Alarm3 :
|
|
1819
|
+
|
|
1820
|
+ break;
|
|
1821
|
+ case ULO_ALC_Alarm4 :
|
|
1822
|
+
|
|
1823
|
+ break;
|
|
1824
|
+ case ULO_Shutdown_Alarm1 :
|
|
1825
|
+
|
|
1826
|
+ break;
|
|
1827
|
+ case ULO_Shutdown_Alarm2 :
|
|
1828
|
+
|
|
1829
|
+ break;
|
|
1830
|
+ case ULO_Shutdown_Alarm3 :
|
|
1831
|
+
|
|
1832
|
+ break;
|
|
1833
|
+ case ULO_Shutdown_Alarm4 :
|
|
1834
|
+
|
|
1835
|
+ break;
|
1625
|
1836
|
|
1626
|
1837
|
}
|
1627
|
1838
|
}
|
1628
|
1839
|
else if(cmd == MBIC_SET){
|
1629
|
1840
|
switch(datatype){
|
1630
|
|
- case Alarm_Bit_List :break;
|
1631
|
|
- case Alarm_Mask :break;
|
1632
|
|
- case Alarm_Test_Mode :break;
|
1633
|
|
- case Alarm_Test_Dummy :break;
|
1634
|
|
- case CPU_Version :break;
|
1635
|
|
- case ModuleINFORMATION_null1 :break;
|
1636
|
|
- case CPU_Current_Bank :break;
|
1637
|
|
- case CPU_Bank_Select_Reboot_by :break;
|
1638
|
|
- case CPU_Bank1_Image_Version :break;
|
1639
|
|
- case CPU_Bank1_Image_BuildTime :break;
|
1640
|
|
- case CPU_Bank1_Image_Name :break;
|
1641
|
|
- case CPU_Bank2_Image_Version :break;
|
1642
|
|
- case CPU_Bank2_Image_BuildTime :break;
|
1643
|
|
- case CPU_Bank2_Image_Name :break;
|
1644
|
|
- case SW_Reset :break;
|
1645
|
|
- case Factory_Set_Initialization :break;
|
1646
|
|
- case Temperature :break;
|
1647
|
|
- case Temperature_Offset :break;
|
1648
|
|
- case Temp_High_Threshold :break;
|
1649
|
|
- case Temp_High_Threshold_Default :break;
|
1650
|
|
- case Temp_High_Alarm :break;
|
1651
|
|
- case LED_TEST :break;
|
1652
|
|
- case Node :break;
|
1653
|
|
- case Type :break;
|
1654
|
|
- case PCB_Version :break;
|
1655
|
|
- case Serial_Number :break;
|
1656
|
|
- case Manufacture :break;
|
1657
|
|
- case Manufacture_Date :break;
|
1658
|
|
- case ENVIRONMENT_INVENTORY_NULL0 :break;
|
1659
|
|
- case Freq_ID :break;
|
1660
|
|
- case Carrier_ID :break;
|
1661
|
|
- case Carrier_ON_OFF :break;
|
1662
|
|
- case DLI_P1_Level :break;
|
1663
|
|
- case DLI_P2_Level :break;
|
1664
|
|
- case DLI_P3_Level :break;
|
1665
|
|
- case DLI_P4_Level :break;
|
|
1841
|
+ case Alarm_Bit_List :
|
|
1842
|
+
|
|
1843
|
+ break;
|
|
1844
|
+ case Alarm_Mask :
|
|
1845
|
+
|
|
1846
|
+ break;
|
|
1847
|
+ case Alarm_Test_Mode :
|
|
1848
|
+
|
|
1849
|
+ break;
|
|
1850
|
+ case Alarm_Test_Dummy :
|
|
1851
|
+
|
|
1852
|
+ break;
|
|
1853
|
+ case CPU_Version :
|
|
1854
|
+
|
|
1855
|
+ break;
|
|
1856
|
+ case ModuleINFORMATION_null1 :
|
|
1857
|
+
|
|
1858
|
+ break;
|
|
1859
|
+ case CPU_Current_Bank :
|
|
1860
|
+
|
|
1861
|
+ break;
|
|
1862
|
+ case CPU_Bank_Select_Reboot_by :
|
|
1863
|
+
|
|
1864
|
+ break;
|
|
1865
|
+ case CPU_Bank1_Image_Version :
|
|
1866
|
+
|
|
1867
|
+ break;
|
|
1868
|
+ case CPU_Bank1_Image_BuildTime :
|
|
1869
|
+
|
|
1870
|
+ break;
|
|
1871
|
+ case CPU_Bank1_Image_Name :
|
|
1872
|
+
|
|
1873
|
+ break;
|
|
1874
|
+ case CPU_Bank2_Image_Version :
|
|
1875
|
+
|
|
1876
|
+ break;
|
|
1877
|
+ case CPU_Bank2_Image_BuildTime :
|
|
1878
|
+
|
|
1879
|
+ break;
|
|
1880
|
+ case CPU_Bank2_Image_Name :
|
|
1881
|
+
|
|
1882
|
+ break;
|
|
1883
|
+ case SW_Reset :
|
|
1884
|
+
|
|
1885
|
+ break;
|
|
1886
|
+ case Factory_Set_Initialization :
|
|
1887
|
+
|
|
1888
|
+ break;
|
|
1889
|
+ case Temperature :
|
|
1890
|
+
|
|
1891
|
+ break;
|
|
1892
|
+ case Temperature_Offset :
|
|
1893
|
+
|
|
1894
|
+ break;
|
|
1895
|
+ case Temp_High_Threshold :
|
|
1896
|
+
|
|
1897
|
+ break;
|
|
1898
|
+ case Temp_High_Threshold_Default :
|
|
1899
|
+
|
|
1900
|
+ break;
|
|
1901
|
+ case Temp_High_Alarm :
|
|
1902
|
+
|
|
1903
|
+ break;
|
|
1904
|
+ case LED_TEST :
|
|
1905
|
+
|
|
1906
|
+ break;
|
|
1907
|
+ case Node :
|
|
1908
|
+
|
|
1909
|
+ break;
|
|
1910
|
+ case Type :
|
|
1911
|
+
|
|
1912
|
+ break;
|
|
1913
|
+ case PCB_Version :
|
|
1914
|
+
|
|
1915
|
+ break;
|
|
1916
|
+ case Serial_Number :
|
|
1917
|
+
|
|
1918
|
+ break;
|
|
1919
|
+ case Manufacture :
|
|
1920
|
+
|
|
1921
|
+ break;
|
|
1922
|
+ case Manufacture_Date :
|
|
1923
|
+
|
|
1924
|
+ break;
|
|
1925
|
+ case ENVIRONMENT_INVENTORY_NULL0 :
|
|
1926
|
+
|
|
1927
|
+ break;
|
|
1928
|
+ case Freq_ID :
|
|
1929
|
+
|
|
1930
|
+ break;
|
|
1931
|
+ case Carrier_ID :
|
|
1932
|
+
|
|
1933
|
+ break;
|
|
1934
|
+ case Carrier_ON_OFF :
|
|
1935
|
+
|
|
1936
|
+ break;
|
|
1937
|
+ case DLI_P1_Level :
|
|
1938
|
+
|
|
1939
|
+ break;
|
|
1940
|
+ case DLI_P2_Level :
|
|
1941
|
+
|
|
1942
|
+ break;
|
|
1943
|
+ case DLI_P3_Level :
|
|
1944
|
+
|
|
1945
|
+ break;
|
|
1946
|
+ case DLI_P4_Level :
|
|
1947
|
+
|
|
1948
|
+ break;
|
1666
|
1949
|
case ULO_P1_Level :break;
|
1667
|
1950
|
case ULO_P2_Level :break;
|
1668
|
1951
|
case ULO_P3_Level :break;
|