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MBIC 프리앰블 체크 / MBIC 함수 추가

PYJ лет назад: 5
Родитель
Сommit
29db2bcfbf
3 измененных файлов с 265 добавлено и 197 удалено
  1. 108 119
      Bluecell_Inc/Bluecell_operate.h
  2. 151 75
      Bluecell_Src/Bluecell_operate.c
  3. 6 3
      Bluecell_Src/uart.c

+ 108 - 119
Bluecell_Inc/Bluecell_operate.h

@@ -105,129 +105,118 @@ typedef enum{
105 105
 	CPU_Bank2_Image_Name,
106 106
 	SW_Reset,
107 107
 	Factory_Set_Initialization,
108
-}ModuleINFORMATION;
109
-
110
-typedef enum{
111
-	Temperature = 0xE010,
112
-	Temperature_Offset,
113
-	Temp_High_Threshold,
114
-	Temp_High_Threshold_Default,
115
-	Temp_High_Alarm,
116
-	LED_TEST,
117
-	Node,
118
-	Type,
119
-	PCB_Version,
120
-	Serial_Number,
121
-	Manufacture,
122
-	Manufacture_Date,
123
-	ENVIRONMENT_INVENTORY_null1,
124
-	Freq_ID,
125
-	Carrier_ID,
126
-	Carrier_ON_OFF,
127
-}ENVIRONMENT_INVENTORY;
128
-
129
-
108
+}SERIAL_ModuleINFORMATION;
130 109
 typedef enum{
131
-	DLI_P1_Level= 0xE020,
132
-	DLI_P2_Level,
133
-	DLI_P3_Level,
134
-	DLI_P4_Level,
135
-	ULO_P1_Level,
136
-	ULO_P2_Level,
137
-	ULO_P3_Level,
138
-	ULO_P4_Level,
139
-}Current_Volt;
110
+    Temperature = 0xE010,
111
+    Temperature_Offset,
112
+    Temp_High_Threshold,
113
+    Temp_High_Threshold_Default,
114
+    Temp_High_Alarm,
115
+    LED_TEST,
116
+    Node,
117
+    Type,
118
+    PCB_Version,
119
+    Serial_Number,
120
+    Manufacture,
121
+    Manufacture_Date,
122
+    ENVIRONMENT_INVENTORY_NULL0,
123
+    Freq_ID,
124
+    Carrier_ID,
125
+    Carrier_ON_OFF,
126
+}SERIAL_ENVIRONMENT_INVENTORY_t;
140 127
 typedef enum{
141
-	DLI_RF_Path1_ON_OFF= 0xE030,
142
-	DLI_RF_Path2_ON_OFF,
143
-	DLI_RF_Path3_ON_OFF,
144
-	DLI_RF_Path4_ON_OFF,
145
-	DLI_Gain_Atten1,
146
-	DLI_Gain_Atten2,
147
-	DLI_Gain_Atten3,
148
-	DLI_Gain_Atten4,
149
-	DLI_Gain_Atten_Offset1,
150
-	DLI_Gain_Atten_Offset2,
151
-	DLI_Gain_Atten_Offset3,
152
-	DLI_Gain_Atten_Offset4,
153
-	DLI_Level_High_Threshold,
154
-	DLI_Level_Low_Threshold,
155
-	DLI_Level_High_Low_Threshold_default,
156
-	DLI_Level,
157
-}DL_Ctrl1;
128
+    DLI_P1_Level = 0xE020,
129
+    DLI_P2_Level,
130
+    DLI_P3_Level,
131
+    DLI_P4_Level,
132
+    ULO_P1_Level,
133
+    ULO_P2_Level,
134
+    ULO_P3_Level,
135
+    ULO_P4_Level,
136
+
137
+}SERIAL_Current_Volt_t;
158 138
 typedef enum{
159
-	DLI_Level_High_Alarm1= 0xE040,
160
-	DLI_Level_High_Alarm2,
161
-	DLI_Level_High_Alarm3,
162
-	DLI_Level_High_Alarm4,
163
-	DLI_Level_Low_Alarm1,
164
-	DLI_Level_Low_Alarm2,
165
-	DLI_Level_Low_Alarm3,
166
-	DLI_Level_Low_Alarm4,
167
-}DL_Ctrl2;
139
+DLI_RF_Path1_ON_OFF = 0xE030,
140
+DLI_RF_Path2_ON_OFF,
141
+DLI_RF_Path3_ON_OFF,
142
+DLI_RF_Path4_ON_OFF,
143
+DLI_Gain_Atten1,
144
+DLI_Gain_Atten2,
145
+DLI_Gain_Atten3,
146
+DLI_Gain_Atten4,
147
+DLI_Gain_Atten_Offset1,
148
+DLI_Gain_Atten_Offset2,
149
+DLI_Gain_Atten_Offset3,
150
+DLI_Gain_Atten_Offset4,
151
+DLI_Level_High_Threshold,
152
+DLI_Level_Low_Threshold,
153
+DLI_Level_High_Low_Threshold_default,
154
+DLI_Level,
155
+DLI_Level_High_Alarm1=0xE040,
156
+DLI_Level_High_Alarm2,
157
+DLI_Level_High_Alarm3,
158
+DLI_Level_High_Alarm4,
159
+DLI_Level_Low_Alarm1,
160
+DLI_Level_Low_Alarm2,
161
+DLI_Level_Low_Alarm3,
162
+DLI_Level_Low_Alarm4,
163
+DLI_AGC_ON_OFF=0xE050,
164
+DLI_AGC_Threshold,
165
+DLI_AGC_Threshold_Default,
166
+DLI_Shutdown_ON_OFF,
167
+DLI_Shutdown_Threshold,
168
+DLI_Shutdown_Threshold_Default,
169
+DLI_Shutdown_Count,
170
+DLI_AGC_Alarm1,
171
+DLI_AGC_Alarm2,
172
+DLI_AGC_Alarm3,
173
+DLI_AGC_Alarm4,
174
+DLI_Shutdown_Alarm1,
175
+DLI_Shutdown_Alarm2,
176
+DLI_Shutdown_Alarm3,
177
+DLI_Shutdown_Alarm4,
178
+
179
+
180
+}SERIAL_DL_t;
168 181
 typedef enum{
169
-	DLI_AGC_ON_OFF= 0xE050,
170
-	DLI_AGC_Threshold,
171
-	DLI_AGC_Threshold_Default,
172
-	DLI_Shutdown_ON_OFF,
173
-	DLI_Shutdown_Threshold,
174
-	DLI_Shutdown_Threshold_Default,
175
-	DLI_Shutdown_Count,
176
-	DLI_AGC_Alarm1,
177
-	DLI_AGC_Alarm2,
178
-	DLI_AGC_Alarm3,
179
-	DLI_AGC_Alarm4,
180
-	DLI_Shutdown_Alarm1,
181
-	DLI_Shutdown_Alarm2,
182
-	DLI_Shutdown_Alarm3,
183
-	DLI_Shutdown_Alarm4,
184
-}DL_Ctrl3;
185
-
186
-
187
-typedef enum{
188
-	ULO_RF_Path1_ON_OFF= 0xE060,
189
-	ULO_RF_Path2_ON_OFF,
190
-	ULO_RF_Path3_ON_OFF,
191
-	ULO_RF_Path4_ON_OFF,
192
-	ULO_Gain_Atten1,
193
-	ULO_Gain_Atten2,
194
-	ULO_Gain_Atten3,
195
-	ULO_Gain_Atten4,
196
-	ULO_Gain_Atten_Offset1,
197
-	ULO_Gain_Atten_Offset2,
198
-	ULO_Gain_Atten_Offset3,
199
-	ULO_Gain_Atten_Offset4,
200
-	ULO_Level_High_Threshold,
201
-	UL_Ctrl1_null1,
202
-	ULO_Level_High_Threshold_default,
203
-	ULO_Level,
204
-
205
-}UL_Ctrl1;
206
-typedef enum{
207
-	ULO_Level_High_Alarm1= 0xE070,
208
-	ULO_Level_High_Alarm2,
209
-	ULO_Level_High_Alarm3,
210
-	ULO_Level_High_Alarm4,
211
-
212
-}UL_Ctrl2;
213
-typedef enum{
214
-	ULO_ALC_ON_OFF= 0xE080,
215
-	ULO_ALC_Threshold,
216
-	ULO_ALC_Threshold_Default,
217
-	ULO_Shutdown_ON_OFF,
218
-	ULO_Shutdown_Threshold,
219
-	ULO_Shutdown_Threshold_Default,
220
-	ULO_Shutdown_Retry_Count,
221
-	ULO_ALC_Alarm1,
222
-	ULO_ALC_Alarm2,
223
-	ULO_ALC_Alarm3,
224
-	ULO_ALC_Alarm4,
225
-	ULO_Shutdown_Alarm1,
226
-	ULO_Shutdown_Alarm2,
227
-	ULO_Shutdown_Alarm3,
228
-	ULO_Shutdown_Alarm4,
229
-}UL_Ctrl3;
230
-
182
+ULO_RF_Path1_ON_OFF1 = 0xE060,
183
+ULO_RF_Path2_ON_OFF2,
184
+ULO_RF_Path3_ON_OFF3,
185
+ULO_RF_Path4_ON_OFF4,
186
+ULO_Gain_Atten1,
187
+ULO_Gain_Atten2,
188
+ULO_Gain_Atten3,
189
+ULO_Gain_Atten4,
190
+ULO_Gain_Atten_Offset1,
191
+ULO_Gain_Atten_Offset2,
192
+ULO_Gain_Atten_Offset3,
193
+ULO_Gain_Atten_Offset4,
194
+ULO_Level_High_Threshold,
195
+SERIAL_UL_NULL0,
196
+ULO_Level_High_Threshold_default,
197
+ULO_Level,
198
+ULO_Level_High_Alarm1=0xE070,
199
+ULO_Level_High_Alarm2,
200
+ULO_Level_High_Alarm3,
201
+ULO_Level_High_Alarm4,
202
+SERIAL_UL_NULL1,
203
+ULO_ALC_ON_OFF=0xE080,
204
+ULO_ALC_Threshold,
205
+ULO_ALC_Threshold_Default,
206
+ULO_Shutdown_ON_OFF,
207
+ULO_Shutdown_Threshold,
208
+ULO_Shutdown_Threshold_Default,
209
+ULO_Shutdown_Retry_Count,
210
+ULO_ALC_Alarm1,
211
+ULO_ALC_Alarm2,
212
+ULO_ALC_Alarm3,
213
+ULO_ALC_Alarm4,
214
+ULO_Shutdown_Alarm1,
215
+ULO_Shutdown_Alarm2,
216
+ULO_Shutdown_Alarm3,
217
+ULO_Shutdown_Alarm4,
218
+
219
+}SERIAL_UL_t;
231 220
 
232 221
 
233 222
 

+ 151 - 75
Bluecell_Src/Bluecell_operate.c

@@ -1442,87 +1442,163 @@ void DataStatusSet(void){
1442 1442
 //    Txdata[Txdata[BLUECELL_LENGTH] + 1] = STH30_CreateCrc(&Txdata[BLUECELL_TYPE], Txdata[BLUECELL_LENGTH]);    
1443 1443
 //    Uart1_Data_Send(&Txdata[0], sizeof(BLUESTATUS_st));
1444 1444
 }
1445
-bool MBIC_Operate(uint8_t* data){
1446
-	uint16_t datatype = 0;
1447
-
1448
-	switch(datatype){
1449
-		case Alarm_Bit_List:
1450
-			Uart1_Data_Send(&Alarm_Status[0],MAX_ALARM_Len);
1451
-		break;
1452
-		case Alarm_Mask:
1453
-
1454
-		break;
1455
-		case Alarm_Test_Mode:
1456
-
1457
-		break;
1458
-		case Alarm_Test_Dummy:
1459
-
1460
-		break;
1461
-		case CPU_Version:
1462
-
1463
-		break;
1464
-		case ModuleINFORMATION_null1:
1445
+uint8_t MBIC_TxDataArray[256] = {0,};
1446
+typedef enum{
1447
+    MBIC_PROT_PREAMBLE0_INDEX,
1448
+    MBIC_PROT_PREAMBLE1_INDEX,
1449
+    MBIC_PROT_PREAMBLE2_INDEX,
1450
+    MBIC_PROT_PREAMBLE3_INDEX,    
1451
+    MBIC_PROT_SUB_UID0_INDEX,        
1452
+    MBIC_PROT_SUB_UID1_INDEX,            
1453
+    MBIC_PROT_R_CODE_INDEX,                
1454
+    MBIC_PROT_TR_ID0_INDEX,                    
1455
+    MBIC_PROT_TR_ID1_INDEX,                        
1456
+    MBIC_PROT_SEQ_NUM_INDEX,                            
1457
+    MBIC_PROT_TTL_INDEX,                                
1458
+    MBIC_PROT_TIME0_INDEX,                                    
1459
+    MBIC_PROT_TIME1_INDEX,                                    
1460
+    MBIC_PROT_TIME2_INDEX,                                    
1461
+    MBIC_PROT_TIME3_INDEX,                                    
1462
+    MBIC_PROT_TIME4_INDEX,                                    
1463
+    MBIC_PROT_TIME5_INDEX,  
1464
+    MBIC_PROT_ERR_RESP_INDEX,      
1465
+    MBIC_PROT_CMD_INDEX,          
1466
+    MBIC_PROT_LENGTH_INDEX,              
1467
+    MBIC_PROT_HEADERCHECKSUM_INDEX,  
1468
+    MBIC_PROT_SUB_DATA_INDEX,      
1469
+
1470
+    MBIC_PROT_INDEX_MAX,
1465 1471
 
1466
-		break;
1467
-		case CPU_Current_Bank:
1472
+};
1473
+uint8_t* MBIC_Alarm_Bit_List_Func(uint8_t* data){
1474
+    
1468 1475
 
1469
-		break;
1470
-		case CPU_Bank_Select_Reboot_by:
1471
-		break;
1472
-		case CPU_Bank1_Image_Version:
1473
-		break;
1474
-		case CPU_Bank1_Image_BuildTime:
1475
-		break;
1476
-		case CPU_Bank1_Image_Name:
1477
-		break;
1478
-		case CPU_Bank2_Image_Version:
1479
-		break;
1480
-		case CPU_Bank2_Image_BuildTime:
1481
-		break;
1482
-		case CPU_Bank2_Image_Name:
1483
-		break;
1484
-		case SW_Reset:
1485
-		break;
1486
-		case Factory_Set_Initialization:
1487
-		break;
1488
-		case Temperature:
1476
+}
1489 1477
 
1490
-		break;
1491
-		case Temperature_Offset:
1492
-			break;
1493
-		case Temp_High_Threshold:
1494
-			break;
1495
-		case Temp_High_Threshold_Default:
1496
-			break;
1497
-		case Temp_High_Alarm:
1498
-			break;
1499
-		case LED_TEST:
1500
-		break;
1501
-		case Node:
1502
-			break;
1503
-		case Type:
1504
-			break;
1505
-		case PCB_Version:
1506
-			break;
1507
-		case Serial_Number:
1508
-			break;
1509
-		case Manufacture:
1510
-			break;
1511
-		case Manufacture_Date:
1512
-			break;
1513
-		case ENVIRONMENT_INVENTORY_null1:
1514
-//			printf("Function : %s .... Line : %d\r\n",__func__,__LINE__);
1515
-			break;
1516
-		case Freq_ID:
1517
-			break;
1518
-		case Carrier_ID:
1519
-			break;
1520
-		case Carrier_ON_OFF:
1521
-			break;
1478
+bool MBIC_Operate(uint8_t* data){
1479
+	uint16_t datatype = 0;
1480
+    datatype = ((data[MBIC_PROT_SUB_DATA_INDEX] << 8) & 0xFF00)  // 2byte Data
1481
+              |((data[MBIC_PROT_SUB_DATA_INDEX + 1] << 8) & 0x00FF) ;
1482
+    
1483
+	switch(datatype){
1484
+        case  Alarm_Bit_List                          :break;
1485
+        case  Alarm_Mask                              :break;
1486
+        case  Alarm_Test_Mode                         :break;
1487
+        case  Alarm_Test_Dummy                        :break;
1488
+        case  CPU_Version                             :break;
1489
+        case  ModuleINFORMATION_null1                 :break;
1490
+        case  CPU_Current_Bank                        :break;
1491
+        case  CPU_Bank_Select_Reboot_by               :break;
1492
+        case  CPU_Bank1_Image_Version                 :break;
1493
+        case  CPU_Bank1_Image_BuildTime               :break;
1494
+        case  CPU_Bank1_Image_Name                    :break;
1495
+        case  CPU_Bank2_Image_Version                 :break;
1496
+        case  CPU_Bank2_Image_BuildTime               :break;
1497
+        case  CPU_Bank2_Image_Name                    :break;
1498
+        case  SW_Reset                                :break;
1499
+        case  Factory_Set_Initialization              :break;
1500
+        case  Temperature                     :break;
1501
+        case  Temperature_Offset                      :break;
1502
+        case  Temp_High_Threshold                     :break;
1503
+        case  Temp_High_Threshold_Default             :break;
1504
+        case  Temp_High_Alarm                         :break;
1505
+        case  LED_TEST                                :break;
1506
+        case  Node                                    :break;
1507
+        case  Type                                    :break;
1508
+        case  PCB_Version                             :break;
1509
+        case  Serial_Number                           :break;
1510
+        case  Manufacture                             :break;
1511
+        case  Manufacture_Date                        :break;
1512
+        case  ENVIRONMENT_INVENTORY_NULL0             :break;
1513
+        case  Freq_ID                                 :break;
1514
+        case  Carrier_ID                              :break;
1515
+        case  Carrier_ON_OFF                          :break;
1516
+        case  DLI_P1_Level                    :break;
1517
+        case  DLI_P2_Level                            :break;
1518
+        case  DLI_P3_Level                            :break;
1519
+        case  DLI_P4_Level                            :break;
1520
+        case  ULO_P1_Level                            :break;
1521
+        case  ULO_P2_Level                            :break;
1522
+        case  ULO_P3_Level                            :break;
1523
+        case  ULO_P4_Level                            :break;
1524
+        case  DLI_RF_Path1_ON_OFF             :break;
1525
+        case  DLI_RF_Path2_ON_OFF                     :break;
1526
+        case  DLI_RF_Path3_ON_OFF                     :break;
1527
+        case  DLI_RF_Path4_ON_OFF                     :break;
1528
+        case  DLI_Gain_Atten1                         :break;
1529
+        case  DLI_Gain_Atten2                         :break;
1530
+        case  DLI_Gain_Atten3                         :break;
1531
+        case  DLI_Gain_Atten4                         :break;
1532
+        case  DLI_Gain_Atten_Offset1                  :break;
1533
+        case  DLI_Gain_Atten_Offset2                  :break;
1534
+        case  DLI_Gain_Atten_Offset3                  :break;
1535
+        case  DLI_Gain_Atten_Offset4                  :break;
1536
+        case  DLI_Level_High_Threshold                :break;
1537
+        case  DLI_Level_Low_Threshold                 :break;
1538
+        case  DLI_Level_High_Low_Threshold_default    :break;
1539
+        case  DLI_Level                               :break;
1540
+        case  DLI_Level_High_Alarm1            :break;
1541
+        case  DLI_Level_High_Alarm2                   :break;
1542
+        case  DLI_Level_High_Alarm3                   :break;
1543
+        case  DLI_Level_High_Alarm4                   :break;
1544
+        case  DLI_Level_Low_Alarm1                    :break;
1545
+        case  DLI_Level_Low_Alarm2                    :break;
1546
+        case  DLI_Level_Low_Alarm3                    :break;
1547
+        case  DLI_Level_Low_Alarm4                    :break;
1548
+        case  DLI_AGC_ON_OFF                   :break;
1549
+        case  DLI_AGC_Threshold                       :break;
1550
+        case  DLI_AGC_Threshold_Default               :break;
1551
+        case  DLI_Shutdown_ON_OFF                     :break;
1552
+        case  DLI_Shutdown_Threshold                  :break;
1553
+        case  DLI_Shutdown_Threshold_Default          :break;
1554
+        case  DLI_Shutdown_Count                      :break;
1555
+        case  DLI_AGC_Alarm1                          :break;
1556
+        case  DLI_AGC_Alarm2                          :break;
1557
+        case  DLI_AGC_Alarm3                          :break;
1558
+        case  DLI_AGC_Alarm4                          :break;
1559
+        case  DLI_Shutdown_Alarm1                     :break;
1560
+        case  DLI_Shutdown_Alarm2                     :break;
1561
+        case  DLI_Shutdown_Alarm3                     :break;
1562
+        case  DLI_Shutdown_Alarm4                     :break;
1563
+        case  ULO_RF_Path1_ON_OFF1            :break;
1564
+        case  ULO_RF_Path2_ON_OFF2                    :break;
1565
+        case  ULO_RF_Path3_ON_OFF3                    :break;
1566
+        case  ULO_RF_Path4_ON_OFF4                    :break;
1567
+        case  ULO_Gain_Atten1                         :break;
1568
+        case  ULO_Gain_Atten2                         :break;
1569
+        case  ULO_Gain_Atten3                         :break;
1570
+        case  ULO_Gain_Atten4                         :break;
1571
+        case  ULO_Gain_Atten_Offset1                  :break;
1572
+        case  ULO_Gain_Atten_Offset2                  :break;
1573
+        case  ULO_Gain_Atten_Offset3                  :break;
1574
+        case  ULO_Gain_Atten_Offset4                  :break;
1575
+        case  ULO_Level_High_Threshold                :break;
1576
+        case  SERIAL_UL_NULL0                         :break;
1577
+        case  ULO_Level_High_Threshold_default        :break;
1578
+        case  ULO_Level                               :break;
1579
+        case  ULO_Level_High_Alarm1             :break;
1580
+        case  ULO_Level_High_Alarm2                   :break;
1581
+        case  ULO_Level_High_Alarm3                  :break;
1582
+        case  ULO_Level_High_Alarm4                  :break;
1583
+        case  SERIAL_UL_NULL1                         :break;
1584
+        case  ULO_ALC_ON_OFF                   :break;
1585
+        case  ULO_ALC_Threshold                       :break;
1586
+        case  ULO_ALC_Threshold_Default               :break;
1587
+        case  ULO_Shutdown_ON_OFF                     :break;
1588
+        case  ULO_Shutdown_Threshold                  :break;
1589
+        case  ULO_Shutdown_Threshold_Default          :break;
1590
+        case  ULO_Shutdown_Retry_Count                :break;
1591
+        case  ULO_ALC_Alarm1                          :break;
1592
+        case  ULO_ALC_Alarm2                          :break;
1593
+        case  ULO_ALC_Alarm3                          :break;
1594
+        case  ULO_ALC_Alarm4                          :break;
1595
+        case  ULO_Shutdown_Alarm1                     :break;
1596
+        case  ULO_Shutdown_Alarm2                     :break;
1597
+        case  ULO_Shutdown_Alarm3                     :break;
1598
+        case  ULO_Shutdown_Alarm4                     :break;
1522 1599
 
1523 1600
 	}
1524 1601
 	return true;
1525
-
1526 1602
 }
1527 1603
 
1528 1604
 

+ 6 - 3
Bluecell_Src/uart.c

@@ -93,14 +93,17 @@ void GetDataFromUartQueue(UART_HandleTypeDef *huart)
93 93
 #endif // PYJ.2019.07.15_END --
94 94
             if(uart_buf[0] == 0xbe){
95 95
             	Bluecell_Operate(uart_buf);
96
-            }else{
97
-
96
+            }else if(uart_buf[0] == MBIC_PREAMBLE0
97
+                   &&uart_buf[1] == MBIC_PREAMBLE1
98
+                   &&uart_buf[2] == MBIC_PREAMBLE2
99
+                   &&uart_buf[3] == MBIC_PREAMBLE3){
100
+                MBIC_Operate(uart_buf);
98 101
             }
99 102
         memset(uart_buf,0x00,cnt);
100 103
 //        for(int i  = 0; i < cnt; i++)
101 104
 //            uart_buf[i] = 0;
102 105
         cnt = 0;
103
-        HAL_Delay(1);
106
+//        HAL_Delay(1);
104 107
     }
105 108
 
106 109
 }