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@@ -1455,142 +1455,299 @@ uint8_t* MBIC_HeaderDataSetting(uint8_t* data){
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1455
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1455
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ResultData[MBIC_TIME_4] = data[MBIC_TIME_4];
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1456
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1456
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ResultData[MBIC_TIME_5] = data[MBIC_TIME_5];
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1457
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1457
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1458
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+ ResultData[MBIC_ERRRESPONSE_0] = MBIC_ERRRESPONSE;
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1459
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+
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1460
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+ ResultData[MBIC_CMD_0] = MBIC_ERRRESPONSE;
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1461
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+
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1462
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+ ResultData[MBIC_LENGTH_0] = MBIC_ERRRESPONSE;
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1463
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+ ResultData[MBIC_LENGTH_1] = MBIC_ERRRESPONSE;
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1464
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+
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1465
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+ ResultData[MBIC_HEADERCHECKSUM_0] = Chksum_Create(ResultData,MBIC_HEADER_SIZE - 1,);
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1466
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+
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1458
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1467
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return ResultData;
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1459
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1468
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}
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1460
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1469
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1461
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-
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1470
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+typedef enum{
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1471
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+ MBIC_GET = 0,
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1472
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+ MBIC_SET,
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1473
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+}BMBM_CMD;
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1462
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1474
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1463
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1475
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bool MBIC_Operate(uint8_t* data){
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1464
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- uint16_t datatype = 0;
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1465
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- uint8_t Length = 0;
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1476
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+ uint16_t datatype = (((data[MBIC_PROT_SUB_DATA_INDEX] << 8) & 0xFF00) // 2byte Data
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1477
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+ |((data[MBIC_PROT_SUB_DATA_INDEX + 1] << 8) & 0x00FF) );
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1478
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+ uint8_t Length = (data[MBIC_PROT_SUB_DATA_INDEX + 2]);
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1479
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+ uint8_t cmd = 0;
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1466
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1480
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uint8_t SubData[256] = {0,};
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1467
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1481
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/*AID*/
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1468
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- datatype = ((data[MBIC_PROT_SUB_DATA_INDEX] << 8) & 0xFF00) // 2byte Data
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1469
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- |((data[MBIC_PROT_SUB_DATA_INDEX + 1] << 8) & 0x00FF) ;
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1470
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- Length = (data[MBIC_PROT_SUB_DATA_INDEX + 2]);
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1471
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1482
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for(int i = 0; i < Length; i++){
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1472
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1483
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SubData[i] = (data[MBIC_PROT_SUB_DATA_INDEX + 3 + i]);
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1473
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1484
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}
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1474
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1485
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// SubData 임시 데이터 변수 선언 Subdata로 데이터 전송
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1475
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-
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1476
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- switch(datatype){
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1477
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- case Alarm_Bit_List :break;
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1478
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- case Alarm_Mask :break;
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1479
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- case Alarm_Test_Mode :break;
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1480
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- case Alarm_Test_Dummy :break;
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1481
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- case CPU_Version :break;
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1482
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- case ModuleINFORMATION_null1 :break;
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1483
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- case CPU_Current_Bank :break;
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1484
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- case CPU_Bank_Select_Reboot_by :break;
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1485
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- case CPU_Bank1_Image_Version :break;
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1486
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- case CPU_Bank1_Image_BuildTime :break;
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1487
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- case CPU_Bank1_Image_Name :break;
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1488
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- case CPU_Bank2_Image_Version :break;
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1489
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- case CPU_Bank2_Image_BuildTime :break;
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1490
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- case CPU_Bank2_Image_Name :break;
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1491
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- case SW_Reset :break;
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1492
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- case Factory_Set_Initialization :break;
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1493
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- case Temperature :break;
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1494
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- case Temperature_Offset :break;
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1495
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- case Temp_High_Threshold :break;
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1496
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- case Temp_High_Threshold_Default :break;
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1497
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- case Temp_High_Alarm :break;
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1498
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- case LED_TEST :break;
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1499
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- case Node :break;
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1500
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- case Type :break;
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1501
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- case PCB_Version :break;
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1502
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- case Serial_Number :break;
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1503
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- case Manufacture :break;
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1504
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- case Manufacture_Date :break;
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1505
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- case ENVIRONMENT_INVENTORY_NULL0 :break;
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1506
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- case Freq_ID :break;
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1507
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- case Carrier_ID :break;
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1508
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- case Carrier_ON_OFF :break;
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1509
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- case DLI_P1_Level :break;
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1510
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- case DLI_P2_Level :break;
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1511
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- case DLI_P3_Level :break;
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1512
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- case DLI_P4_Level :break;
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1513
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- case ULO_P1_Level :break;
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1514
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- case ULO_P2_Level :break;
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1515
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- case ULO_P3_Level :break;
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1516
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- case ULO_P4_Level :break;
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1517
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- case DLI_RF_Path1_ON_OFF :break;
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1518
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- case DLI_RF_Path2_ON_OFF :break;
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1519
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- case DLI_RF_Path3_ON_OFF :break;
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1520
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- case DLI_RF_Path4_ON_OFF :break;
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1521
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- case DLI_Gain_Atten1 :break;
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1522
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- case DLI_Gain_Atten2 :break;
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1523
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- case DLI_Gain_Atten3 :break;
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1524
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- case DLI_Gain_Atten4 :break;
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1525
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- case DLI_Gain_Atten_Offset1 :break;
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1526
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- case DLI_Gain_Atten_Offset2 :break;
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1527
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- case DLI_Gain_Atten_Offset3 :break;
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1528
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- case DLI_Gain_Atten_Offset4 :break;
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1529
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- case DLI_Level_High_Threshold :break;
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1530
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- case DLI_Level_Low_Threshold :break;
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1531
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- case DLI_Level_High_Low_Threshold_default :break;
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1532
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- case DLI_Level :break;
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1533
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- case DLI_Level_High_Alarm1 :break;
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1534
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- case DLI_Level_High_Alarm2 :break;
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1535
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- case DLI_Level_High_Alarm3 :break;
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1536
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- case DLI_Level_High_Alarm4 :break;
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1537
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- case DLI_Level_Low_Alarm1 :break;
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1538
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- case DLI_Level_Low_Alarm2 :break;
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1539
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- case DLI_Level_Low_Alarm3 :break;
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1540
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- case DLI_Level_Low_Alarm4 :break;
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1541
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- case DLI_AGC_ON_OFF :break;
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1542
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- case DLI_AGC_Threshold :break;
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1543
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- case DLI_AGC_Threshold_Default :break;
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1544
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- case DLI_Shutdown_ON_OFF :break;
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1545
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- case DLI_Shutdown_Threshold :break;
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1546
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- case DLI_Shutdown_Threshold_Default :break;
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1547
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- case DLI_Shutdown_Count :break;
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1548
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- case DLI_AGC_Alarm1 :break;
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1549
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- case DLI_AGC_Alarm2 :break;
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1550
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- case DLI_AGC_Alarm3 :break;
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1551
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- case DLI_AGC_Alarm4 :break;
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1552
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- case DLI_Shutdown_Alarm1 :break;
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1553
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- case DLI_Shutdown_Alarm2 :break;
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1554
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- case DLI_Shutdown_Alarm3 :break;
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1555
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- case DLI_Shutdown_Alarm4 :break;
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1556
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- case ULO_RF_Path1_ON_OFF1 :break;
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1557
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- case ULO_RF_Path2_ON_OFF2 :break;
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1558
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- case ULO_RF_Path3_ON_OFF3 :break;
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1559
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- case ULO_RF_Path4_ON_OFF4 :break;
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1560
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- case ULO_Gain_Atten1 :break;
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1561
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- case ULO_Gain_Atten2 :break;
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1562
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- case ULO_Gain_Atten3 :break;
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1563
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- case ULO_Gain_Atten4 :break;
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1564
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- case ULO_Gain_Atten_Offset1 :break;
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1565
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- case ULO_Gain_Atten_Offset2 :break;
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1566
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- case ULO_Gain_Atten_Offset3 :break;
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1567
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- case ULO_Gain_Atten_Offset4 :break;
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1568
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- case ULO_Level_High_Threshold :break;
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1569
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- case SERIAL_UL_NULL0 :break;
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1570
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- case ULO_Level_High_Threshold_default :break;
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1571
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- case ULO_Level :break;
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1572
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- case ULO_Level_High_Alarm1 :break;
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1573
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- case ULO_Level_High_Alarm2 :break;
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1574
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- case ULO_Level_High_Alarm3 :break;
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1575
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- case ULO_Level_High_Alarm4 :break;
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1576
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- case SERIAL_UL_NULL1 :break;
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1577
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- case ULO_ALC_ON_OFF :break;
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1578
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- case ULO_ALC_Threshold :break;
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1579
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- case ULO_ALC_Threshold_Default :break;
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1580
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- case ULO_Shutdown_ON_OFF :break;
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1581
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- case ULO_Shutdown_Threshold :break;
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1582
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- case ULO_Shutdown_Threshold_Default :break;
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1583
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- case ULO_Shutdown_Retry_Count :break;
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1584
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- case ULO_ALC_Alarm1 :break;
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1585
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- case ULO_ALC_Alarm2 :break;
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1586
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- case ULO_ALC_Alarm3 :break;
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1587
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- case ULO_ALC_Alarm4 :break;
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1588
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- case ULO_Shutdown_Alarm1 :break;
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1589
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- case ULO_Shutdown_Alarm2 :break;
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1590
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- case ULO_Shutdown_Alarm3 :break;
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1591
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- case ULO_Shutdown_Alarm4 :break;
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1592
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-
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1593
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- }
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1486
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+ if(cmd == MBIC_GET){
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1487
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+ switch(datatype){
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1488
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+ case Alarm_Bit_List :
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1489
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+//
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1490
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+ break;
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1491
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+ case Alarm_Mask :
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1492
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+
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1493
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+ break;
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1494
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+ case Alarm_Test_Mode :
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1495
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+
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1496
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+ break;
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1497
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+ case Alarm_Test_Dummy :
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1498
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+
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1499
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+ break;
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1500
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+ case CPU_Version :
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1501
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+
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1502
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+ break;
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1503
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+ case ModuleINFORMATION_null1 :
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1504
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+
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1505
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+ break;
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1506
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+ case CPU_Current_Bank :
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1507
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+
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1508
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+ break;
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1509
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+ case CPU_Bank_Select_Reboot_by :
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1510
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+
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1511
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+ break;
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1512
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+ case CPU_Bank1_Image_Version :
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1513
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+
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1514
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+ break;
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1515
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+ case CPU_Bank1_Image_BuildTime :break;
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1516
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+ case CPU_Bank1_Image_Name :break;
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1517
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+ case CPU_Bank2_Image_Version :break;
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1518
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+ case CPU_Bank2_Image_BuildTime :break;
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1519
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+ case CPU_Bank2_Image_Name :break;
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1520
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+ case SW_Reset :break;
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1521
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+ case Factory_Set_Initialization :break;
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1522
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+ case Temperature :break;
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1523
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+ case Temperature_Offset :break;
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1524
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+ case Temp_High_Threshold :
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1525
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+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.Temp_High_Threshold;
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1526
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+ break;
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1527
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+ case Temp_High_Threshold_Default :
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1528
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+ ResultData[MBIC_PAYLOADSTART] = bluecell_Currdatastatus.Temp_High_Threshold_Default;
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1529
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+ break;
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1530
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+ case Temp_High_Alarm :break;
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1531
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+ case LED_TEST :break;
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1532
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+ case Node :break;
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1533
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+ case Type :break;
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1534
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+ case PCB_Version :break;
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1535
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+ case Serial_Number :break;
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1536
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+ case Manufacture :break;
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1537
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+ case Manufacture_Date :break;
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1538
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+ case ENVIRONMENT_INVENTORY_NULL0 :break;
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1539
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+ case Freq_ID :break;
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1540
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+ case Carrier_ID :break;
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1541
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+ case Carrier_ON_OFF :break;
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1542
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+ case DLI_P1_Level :break;
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1543
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+ case DLI_P2_Level :break;
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1544
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+ case DLI_P3_Level :break;
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1545
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+ case DLI_P4_Level :break;
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1546
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+ case ULO_P1_Level :break;
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1547
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+ case ULO_P2_Level :break;
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1548
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+ case ULO_P3_Level :break;
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1549
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+ case ULO_P4_Level :break;
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1550
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+ case DLI_RF_Path1_ON_OFF :break;
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1551
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+ case DLI_RF_Path2_ON_OFF :break;
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1552
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+ case DLI_RF_Path3_ON_OFF :break;
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1553
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+ case DLI_RF_Path4_ON_OFF :break;
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1554
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+ case DLI_Gain_Atten1 :break;
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1555
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+ case DLI_Gain_Atten2 :break;
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1556
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+ case DLI_Gain_Atten3 :break;
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1557
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+ case DLI_Gain_Atten4 :break;
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1558
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+ case DLI_Gain_Atten_Offset1 :break;
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1559
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+ case DLI_Gain_Atten_Offset2 :break;
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1560
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+ case DLI_Gain_Atten_Offset3 :break;
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1561
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+ case DLI_Gain_Atten_Offset4 :break;
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1562
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+ case DLI_Level_High_Threshold :break;
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1563
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+ case DLI_Level_Low_Threshold :break;
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1564
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+ case DLI_Level_High_Low_Threshold_default :break;
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1565
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+ case DLI_Level :break;
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1566
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+ case DLI_Level_High_Alarm1 :break;
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1567
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+ case DLI_Level_High_Alarm2 :break;
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|
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1568
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+ case DLI_Level_High_Alarm3 :break;
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|
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1569
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+ case DLI_Level_High_Alarm4 :break;
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1570
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+ case DLI_Level_Low_Alarm1 :break;
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1571
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+ case DLI_Level_Low_Alarm2 :break;
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1572
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+ case DLI_Level_Low_Alarm3 :break;
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1573
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+ case DLI_Level_Low_Alarm4 :break;
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1574
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+ case DLI_AGC_ON_OFF :break;
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1575
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+ case DLI_AGC_Threshold :break;
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1576
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+ case DLI_AGC_Threshold_Default :break;
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1577
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+ case DLI_Shutdown_ON_OFF :break;
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1578
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+ case DLI_Shutdown_Threshold :break;
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1579
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+ case DLI_Shutdown_Threshold_Default :break;
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1580
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+ case DLI_Shutdown_Count :break;
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1581
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+ case DLI_AGC_Alarm1 :break;
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1582
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+ case DLI_AGC_Alarm2 :break;
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1583
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+ case DLI_AGC_Alarm3 :break;
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1584
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+ case DLI_AGC_Alarm4 :break;
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1585
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+ case DLI_Shutdown_Alarm1 :break;
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1586
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+ case DLI_Shutdown_Alarm2 :break;
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1587
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+ case DLI_Shutdown_Alarm3 :break;
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1588
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+ case DLI_Shutdown_Alarm4 :break;
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|
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1589
|
+ case ULO_RF_Path1_ON_OFF1 :break;
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|
|
1590
|
+ case ULO_RF_Path2_ON_OFF2 :break;
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|
|
1591
|
+ case ULO_RF_Path3_ON_OFF3 :break;
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|
|
1592
|
+ case ULO_RF_Path4_ON_OFF4 :break;
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1593
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+ case ULO_Gain_Atten1 :break;
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1594
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+ case ULO_Gain_Atten2 :break;
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1595
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+ case ULO_Gain_Atten3 :break;
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1596
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+ case ULO_Gain_Atten4 :break;
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1597
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+ case ULO_Gain_Atten_Offset1 :break;
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1598
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+ case ULO_Gain_Atten_Offset2 :break;
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1599
|
+ case ULO_Gain_Atten_Offset3 :break;
|
|
|
1600
|
+ case ULO_Gain_Atten_Offset4 :break;
|
|
|
1601
|
+ case ULO_Level_High_Threshold :break;
|
|
|
1602
|
+ case SERIAL_UL_NULL0 :break;
|
|
|
1603
|
+ case ULO_Level_High_Threshold_default :break;
|
|
|
1604
|
+ case ULO_Level :break;
|
|
|
1605
|
+ case ULO_Level_High_Alarm1 :break;
|
|
|
1606
|
+ case ULO_Level_High_Alarm2 :break;
|
|
|
1607
|
+ case ULO_Level_High_Alarm3 :break;
|
|
|
1608
|
+ case ULO_Level_High_Alarm4 :break;
|
|
|
1609
|
+ case SERIAL_UL_NULL1 :break;
|
|
|
1610
|
+ case ULO_ALC_ON_OFF :break;
|
|
|
1611
|
+ case ULO_ALC_Threshold :break;
|
|
|
1612
|
+ case ULO_ALC_Threshold_Default :break;
|
|
|
1613
|
+ case ULO_Shutdown_ON_OFF :break;
|
|
|
1614
|
+ case ULO_Shutdown_Threshold :break;
|
|
|
1615
|
+ case ULO_Shutdown_Threshold_Default :break;
|
|
|
1616
|
+ case ULO_Shutdown_Retry_Count :break;
|
|
|
1617
|
+ case ULO_ALC_Alarm1 :break;
|
|
|
1618
|
+ case ULO_ALC_Alarm2 :break;
|
|
|
1619
|
+ case ULO_ALC_Alarm3 :break;
|
|
|
1620
|
+ case ULO_ALC_Alarm4 :break;
|
|
|
1621
|
+ case ULO_Shutdown_Alarm1 :break;
|
|
|
1622
|
+ case ULO_Shutdown_Alarm2 :break;
|
|
|
1623
|
+ case ULO_Shutdown_Alarm3 :break;
|
|
|
1624
|
+ case ULO_Shutdown_Alarm4 :break;
|
|
|
1625
|
+
|
|
|
1626
|
+ }
|
|
|
1627
|
+ }
|
|
|
1628
|
+ else if(cmd == MBIC_SET){
|
|
|
1629
|
+ switch(datatype){
|
|
|
1630
|
+ case Alarm_Bit_List :break;
|
|
|
1631
|
+ case Alarm_Mask :break;
|
|
|
1632
|
+ case Alarm_Test_Mode :break;
|
|
|
1633
|
+ case Alarm_Test_Dummy :break;
|
|
|
1634
|
+ case CPU_Version :break;
|
|
|
1635
|
+ case ModuleINFORMATION_null1 :break;
|
|
|
1636
|
+ case CPU_Current_Bank :break;
|
|
|
1637
|
+ case CPU_Bank_Select_Reboot_by :break;
|
|
|
1638
|
+ case CPU_Bank1_Image_Version :break;
|
|
|
1639
|
+ case CPU_Bank1_Image_BuildTime :break;
|
|
|
1640
|
+ case CPU_Bank1_Image_Name :break;
|
|
|
1641
|
+ case CPU_Bank2_Image_Version :break;
|
|
|
1642
|
+ case CPU_Bank2_Image_BuildTime :break;
|
|
|
1643
|
+ case CPU_Bank2_Image_Name :break;
|
|
|
1644
|
+ case SW_Reset :break;
|
|
|
1645
|
+ case Factory_Set_Initialization :break;
|
|
|
1646
|
+ case Temperature :break;
|
|
|
1647
|
+ case Temperature_Offset :break;
|
|
|
1648
|
+ case Temp_High_Threshold :break;
|
|
|
1649
|
+ case Temp_High_Threshold_Default :break;
|
|
|
1650
|
+ case Temp_High_Alarm :break;
|
|
|
1651
|
+ case LED_TEST :break;
|
|
|
1652
|
+ case Node :break;
|
|
|
1653
|
+ case Type :break;
|
|
|
1654
|
+ case PCB_Version :break;
|
|
|
1655
|
+ case Serial_Number :break;
|
|
|
1656
|
+ case Manufacture :break;
|
|
|
1657
|
+ case Manufacture_Date :break;
|
|
|
1658
|
+ case ENVIRONMENT_INVENTORY_NULL0 :break;
|
|
|
1659
|
+ case Freq_ID :break;
|
|
|
1660
|
+ case Carrier_ID :break;
|
|
|
1661
|
+ case Carrier_ON_OFF :break;
|
|
|
1662
|
+ case DLI_P1_Level :break;
|
|
|
1663
|
+ case DLI_P2_Level :break;
|
|
|
1664
|
+ case DLI_P3_Level :break;
|
|
|
1665
|
+ case DLI_P4_Level :break;
|
|
|
1666
|
+ case ULO_P1_Level :break;
|
|
|
1667
|
+ case ULO_P2_Level :break;
|
|
|
1668
|
+ case ULO_P3_Level :break;
|
|
|
1669
|
+ case ULO_P4_Level :break;
|
|
|
1670
|
+ case DLI_RF_Path1_ON_OFF :break;
|
|
|
1671
|
+ case DLI_RF_Path2_ON_OFF :break;
|
|
|
1672
|
+ case DLI_RF_Path3_ON_OFF :break;
|
|
|
1673
|
+ case DLI_RF_Path4_ON_OFF :break;
|
|
|
1674
|
+ case DLI_Gain_Atten1 :break;
|
|
|
1675
|
+ case DLI_Gain_Atten2 :break;
|
|
|
1676
|
+ case DLI_Gain_Atten3 :break;
|
|
|
1677
|
+ case DLI_Gain_Atten4 :break;
|
|
|
1678
|
+ case DLI_Gain_Atten_Offset1 :break;
|
|
|
1679
|
+ case DLI_Gain_Atten_Offset2 :break;
|
|
|
1680
|
+ case DLI_Gain_Atten_Offset3 :break;
|
|
|
1681
|
+ case DLI_Gain_Atten_Offset4 :break;
|
|
|
1682
|
+ case DLI_Level_High_Threshold :break;
|
|
|
1683
|
+ case DLI_Level_Low_Threshold :break;
|
|
|
1684
|
+ case DLI_Level_High_Low_Threshold_default :break;
|
|
|
1685
|
+ case DLI_Level :break;
|
|
|
1686
|
+ case DLI_Level_High_Alarm1 :break;
|
|
|
1687
|
+ case DLI_Level_High_Alarm2 :break;
|
|
|
1688
|
+ case DLI_Level_High_Alarm3 :break;
|
|
|
1689
|
+ case DLI_Level_High_Alarm4 :break;
|
|
|
1690
|
+ case DLI_Level_Low_Alarm1 :break;
|
|
|
1691
|
+ case DLI_Level_Low_Alarm2 :break;
|
|
|
1692
|
+ case DLI_Level_Low_Alarm3 :break;
|
|
|
1693
|
+ case DLI_Level_Low_Alarm4 :break;
|
|
|
1694
|
+ case DLI_AGC_ON_OFF :break;
|
|
|
1695
|
+ case DLI_AGC_Threshold :break;
|
|
|
1696
|
+ case DLI_AGC_Threshold_Default :break;
|
|
|
1697
|
+ case DLI_Shutdown_ON_OFF :break;
|
|
|
1698
|
+ case DLI_Shutdown_Threshold :break;
|
|
|
1699
|
+ case DLI_Shutdown_Threshold_Default :break;
|
|
|
1700
|
+ case DLI_Shutdown_Count :break;
|
|
|
1701
|
+ case DLI_AGC_Alarm1 :break;
|
|
|
1702
|
+ case DLI_AGC_Alarm2 :break;
|
|
|
1703
|
+ case DLI_AGC_Alarm3 :break;
|
|
|
1704
|
+ case DLI_AGC_Alarm4 :break;
|
|
|
1705
|
+ case DLI_Shutdown_Alarm1 :break;
|
|
|
1706
|
+ case DLI_Shutdown_Alarm2 :break;
|
|
|
1707
|
+ case DLI_Shutdown_Alarm3 :break;
|
|
|
1708
|
+ case DLI_Shutdown_Alarm4 :break;
|
|
|
1709
|
+ case ULO_RF_Path1_ON_OFF1 :break;
|
|
|
1710
|
+ case ULO_RF_Path2_ON_OFF2 :break;
|
|
|
1711
|
+ case ULO_RF_Path3_ON_OFF3 :break;
|
|
|
1712
|
+ case ULO_RF_Path4_ON_OFF4 :break;
|
|
|
1713
|
+ case ULO_Gain_Atten1 :break;
|
|
|
1714
|
+ case ULO_Gain_Atten2 :break;
|
|
|
1715
|
+ case ULO_Gain_Atten3 :break;
|
|
|
1716
|
+ case ULO_Gain_Atten4 :break;
|
|
|
1717
|
+ case ULO_Gain_Atten_Offset1 :break;
|
|
|
1718
|
+ case ULO_Gain_Atten_Offset2 :break;
|
|
|
1719
|
+ case ULO_Gain_Atten_Offset3 :break;
|
|
|
1720
|
+ case ULO_Gain_Atten_Offset4 :break;
|
|
|
1721
|
+ case ULO_Level_High_Threshold :break;
|
|
|
1722
|
+ case SERIAL_UL_NULL0 :break;
|
|
|
1723
|
+ case ULO_Level_High_Threshold_default :break;
|
|
|
1724
|
+ case ULO_Level :break;
|
|
|
1725
|
+ case ULO_Level_High_Alarm1 :break;
|
|
|
1726
|
+ case ULO_Level_High_Alarm2 :break;
|
|
|
1727
|
+ case ULO_Level_High_Alarm3 :break;
|
|
|
1728
|
+ case ULO_Level_High_Alarm4 :break;
|
|
|
1729
|
+ case SERIAL_UL_NULL1 :break;
|
|
|
1730
|
+ case ULO_ALC_ON_OFF :break;
|
|
|
1731
|
+ case ULO_ALC_Threshold :break;
|
|
|
1732
|
+ case ULO_ALC_Threshold_Default :break;
|
|
|
1733
|
+ case ULO_Shutdown_ON_OFF :break;
|
|
|
1734
|
+ case ULO_Shutdown_Threshold :break;
|
|
|
1735
|
+ case ULO_Shutdown_Threshold_Default :break;
|
|
|
1736
|
+ case ULO_Shutdown_Retry_Count :break;
|
|
|
1737
|
+ case ULO_ALC_Alarm1 :break;
|
|
|
1738
|
+ case ULO_ALC_Alarm2 :break;
|
|
|
1739
|
+ case ULO_ALC_Alarm3 :break;
|
|
|
1740
|
+ case ULO_ALC_Alarm4 :break;
|
|
|
1741
|
+ case ULO_Shutdown_Alarm1 :break;
|
|
|
1742
|
+ case ULO_Shutdown_Alarm2 :break;
|
|
|
1743
|
+ case ULO_Shutdown_Alarm3 :break;
|
|
|
1744
|
+ case ULO_Shutdown_Alarm4 :break;
|
|
|
1745
|
+ }
|
|
|
1746
|
+ }
|
|
|
1747
|
+ else{
|
|
|
1748
|
+ /*NOP*/
|
|
|
1749
|
+ printf("DATA ERR\r\n");
|
|
|
1750
|
+ }
|
|
1594
|
1751
|
return true;
|
|
1595
|
1752
|
}
|
|
1596
|
1753
|
|
PYJ