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@@ -13,9 +13,9 @@
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#define EEPROM_Block0_ADDRESS EEPROM_M24C08_ID
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#define EEPROM_ATT_BASE 0x0000 + 96
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-#if 0 // PYJ.2020.04.25_BEGIN --
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+#if 1 // PYJ.2020.04.25_BEGIN --
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-#define EEPROM_ATT_DL1_TABLE_ADDRESDS (( EEPROM_ATT_BASE +(sizeof(ATT_TABLE_st)) ) & 0xFFFF) //128
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+#define EEPROM_ATT_DL1_TABLE_ADDRESDS (( EEPROM_ATT_BASE + (sizeof(ATT_TABLE_st)) ) & 0xFFFF) //128
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#define EEPROM_ATT_DL2_TABLE_ADDRESDS (( EEPROM_ATT_DL1_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)) ) & 0xFFFF)
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#define EEPROM_ATT_DL3_TABLE_ADDRESDS (( EEPROM_ATT_DL2_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)) ) & 0xFFFF)
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#define EEPROM_ATT_DL4_TABLE_ADDRESDS (( EEPROM_ATT_DL3_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)) ) & 0xFFFF)
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@@ -42,7 +42,7 @@
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#define EEPROM_USER_ATTEN_VALUE_ADDRESDS (( EEPROM_TEMP_UL4_TABLE_ADDRESDS +( sizeof(USER_ATTEN_st)+16)) & 0xFFFF)
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#define EEPROM_WINDOW_STATUS_ADDRESDS ((EEPROM_USER_ATTEN_VALUE_ADDRESDS + (sizeof(BLUESTATUS_st))) & 0xFFFF) //96byte
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-
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+#else
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#define EEPROM_WINDOW_STATUS_ADDRESDS ((EEPROM_ATT_BASE + (sizeof(BLUESTATUS_st))) & 0xFFFF) //96byte
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#define EEPROM_ATT_DL1_TABLE_ADDRESDS (( EEPROM_WINDOW_STATUS_ADDRESDS + (sizeof(ATT_TABLE_st)) )& 0xFFFF) //128
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#define EEPROM_ATT_DL2_TABLE_ADDRESDS (( EEPROM_ATT_DL1_TABLE_ADDRESDS + (sizeof(ATT_TABLE_st)) ) & 0xFFFF)
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@@ -95,127 +95,503 @@ HAL_StatusTypeDef EEPROM_M24C08_Zerowrite(uint8_t devid,uint16_t Address);
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void EEPROM_M24C08_Init(void);
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+typedef struct{
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+ uint8_t bluecell_User_DL1_H; uint8_t bluecell_User_DL1_L;
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+ uint8_t bluecell_User_DL2_H; uint8_t bluecell_User_DL2_L;
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+ uint8_t bluecell_User_DL3_H; uint8_t bluecell_User_DL3_L;
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+ uint8_t bluecell_User_DL4_H; uint8_t bluecell_User_DL4_L;
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+ uint8_t bluecell_User_UL1_H; uint8_t bluecell_User_UL1_L;
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+ uint8_t bluecell_User_UL2_H; uint8_t bluecell_User_UL2_L;
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+ uint8_t bluecell_User_UL3_H; uint8_t bluecell_User_UL3_L;
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+ uint8_t bluecell_User_UL4_H; uint8_t bluecell_User_UL4_L;
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+}USER_ATTEN_st;
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+
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+
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+
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+typedef struct{
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+
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+ uint8_t Table_10_Temp_H; uint8_t Table_10_Temp_L;
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+ uint8_t Table_15_Temp_H; uint8_t Table_15_Temp_L;
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+ uint8_t Table_20_Temp_H; uint8_t Table_20_Temp_L;
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+ uint8_t Table_25_Temp_H; uint8_t Table_25_Temp_L;
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+ uint8_t Table_30_Temp_H; uint8_t Table_30_Temp_L;
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+ uint8_t Table_35_Temp_H; uint8_t Table_35_Temp_L;
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+ uint8_t Table_40_Temp_H; uint8_t Table_40_Temp_L;
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+ uint8_t Table_45_Temp_H; uint8_t Table_45_Temp_L;
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+ uint8_t Table_50_Temp_H; uint8_t Table_50_Temp_L;
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+ uint8_t Table_55_Temp_H; uint8_t Table_55_Temp_L;
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+}TEMP_TABLE_st;
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+
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+
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+
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+typedef struct{
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+ uint8_t Table_0_0_dBm;
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+ uint8_t Table_0_5_dBm;
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+ uint8_t Table_1_0_dBm;
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+ uint8_t Table_1_5_dBm;
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+ uint8_t Table_2_0_dBm;
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+ uint8_t Table_2_5_dBm;
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+ uint8_t Table_3_0_dBm;
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+ uint8_t Table_3_5_dBm;
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+ uint8_t Table_4_0_dBm;
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+ uint8_t Table_4_5_dBm;
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+ uint8_t Table_5_0_dBm;
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+ uint8_t Table_5_5_dBm;
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+ uint8_t Table_6_0_dBm;
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+ uint8_t Table_6_5_dBm;
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+ uint8_t Table_7_0_dBm;
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+ uint8_t Table_7_5_dBm;
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+ uint8_t Table_8_0_dBm;
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+ uint8_t Table_8_5_dBm;
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+ uint8_t Table_9_0_dBm;
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+ uint8_t Table_9_5_dBm;
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+ uint8_t Table_10_0_dBm;
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+ uint8_t Table_10_5_dBm;
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+ uint8_t Table_11_0_dBm;
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+ uint8_t Table_11_5_dBm;
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+ uint8_t Table_12_0_dBm;
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+ uint8_t Table_12_5_dBm;
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+ uint8_t Table_13_0_dBm;
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+ uint8_t Table_13_5_dBm;
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+ uint8_t Table_14_0_dBm;
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+ uint8_t Table_14_5_dBm;
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+ uint8_t Table_15_0_dBm;
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+ uint8_t Table_15_5_dBm;
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+ uint8_t Table_16_0_dBm;
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+ uint8_t Table_16_5_dBm;
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+ uint8_t Table_17_0_dBm;
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+ uint8_t Table_17_5_dBm;
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+ uint8_t Table_18_0_dBm;
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+ uint8_t Table_18_5_dBm;
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+ uint8_t Table_19_0_dBm;
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+ uint8_t Table_19_5_dBm;
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+ uint8_t Table_20_0_dBm;
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+ uint8_t Table_20_5_dBm;
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+ uint8_t Table_21_0_dBm;
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+ uint8_t Table_21_5_dBm;
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+ uint8_t Table_22_0_dBm;
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+ uint8_t Table_22_5_dBm;
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+ uint8_t Table_23_0_dBm;
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+ uint8_t Table_23_5_dBm;
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+ uint8_t Table_24_0_dBm;
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+ uint8_t Table_24_5_dBm;
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+ uint8_t Table_25_0_dBm;
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+ uint8_t Table_25_5_dBm;
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+ uint8_t Table_26_0_dBm;
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+ uint8_t Table_26_5_dBm;
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+ uint8_t Table_27_0_dBm;
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+ uint8_t Table_27_5_dBm;
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+ uint8_t Table_28_0_dBm;
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+ uint8_t Table_28_5_dBm;
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+ uint8_t Table_29_0_dBm;
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+ uint8_t Table_29_5_dBm;
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+ uint8_t Table_30_0_dBm;
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+ uint8_t Table_30_5_dBm;
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+ uint8_t Table_31_0_dBm;
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+ uint8_t Table_31_5_dBm;
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+}ATT_TABLE_st;
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+typedef struct{
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+
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+ uint8_t Table_Det5_dBm_H ;
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+ uint8_t Table_Det5_dBm_L ;
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+ uint8_t Table_Det4_dBm_H ;
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+ uint8_t Table_Det4_dBm_L ;
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+ uint8_t Table_Det3_dBm_H ;
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+ uint8_t Table_Det3_dBm_L ;
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+ uint8_t Table_Det2_dBm_H ;
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+ uint8_t Table_Det2_dBm_L ;
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+ uint8_t Table_Det1_dBm_H ;
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+ uint8_t Table_Det1_dBm_L ;
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+ uint8_t Table_Det0_dBm_H ;
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+ uint8_t Table_Det0_dBm_L ;
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+ uint8_t Table_Det_1_dBm_H ;
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+ uint8_t Table_Det_1_dBm_L ;
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+ uint8_t Table_Det_2_dBm_H ;
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+ uint8_t Table_Det_2_dBm_L ;
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+ uint8_t Table_Det_3_dBm_H ;
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+ uint8_t Table_Det_3_dBm_L ;
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+ uint8_t Table_Det_4_dBm_H ;
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+ uint8_t Table_Det_4_dBm_L ;
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+ uint8_t Table_Det_5_dBm_H ;
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+ uint8_t Table_Det_5_dBm_L ;
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+ uint8_t Table_Det_6_dBm_H ;
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+ uint8_t Table_Det_6_dBm_L ;
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+ uint8_t Table_Det_7_dBm_H ;
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+ uint8_t Table_Det_7_dBm_L ;
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+ uint8_t Table_Det_8_dBm_H ;
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+ uint8_t Table_Det_8_dBm_L ;
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+ uint8_t Table_Det_9_dBm_H ;
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+ uint8_t Table_Det_9_dBm_L ;
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+ uint8_t Table_Det_10_dBm_H ;
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+ uint8_t Table_Det_10_dBm_L ;
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+ uint8_t Table_Det_11_dBm_H ;
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+ uint8_t Table_Det_11_dBm_L ;
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+ uint8_t Table_Det_12_dBm_H ;
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+ uint8_t Table_Det_12_dBm_L ;
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+ uint8_t Table_Det_13_dBm_H ;
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+ uint8_t Table_Det_13_dBm_L ;
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+ uint8_t Table_Det_14_dBm_H ;
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+ uint8_t Table_Det_14_dBm_L ;
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+ uint8_t Table_Det_15_dBm_H ;
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+ uint8_t Table_Det_15_dBm_L ;
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+ uint8_t Table_Det_16_dBm_H ;
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+ uint8_t Table_Det_16_dBm_L ;
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+ uint8_t Table_Det_17_dBm_H ;
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+ uint8_t Table_Det_17_dBm_L ;
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+ uint8_t Table_Det_18_dBm_H ;
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+ uint8_t Table_Det_18_dBm_L ;
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+ uint8_t Table_Det_19_dBm_H ;
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+ uint8_t Table_Det_19_dBm_L ;
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+ uint8_t Table_Det_20_dBm_H ;
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+ uint8_t Table_Det_20_dBm_L ;
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+ uint8_t Table_Det_21_dBm_H ;
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+ uint8_t Table_Det_21_dBm_L ;
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+ uint8_t Table_Det_22_dBm_H ;
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+ uint8_t Table_Det_22_dBm_L ;
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+ uint8_t Table_Det_23_dBm_H ;
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+ uint8_t Table_Det_23_dBm_L ;
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+ uint8_t Table_Det_24_dBm_H ;
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+ uint8_t Table_Det_24_dBm_L ;
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+ uint8_t Table_Det_25_dBm_H ;
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+ uint8_t Table_Det_25_dBm_L ;
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+}DET_TABLEDL_st;
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+typedef struct{
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+ uint8_t Table_Det_15_dBm_H ;
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+ uint8_t Table_Det_15_dBm_L ;
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+ uint8_t Table_Det_16_dBm_H ;
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+ uint8_t Table_Det_16_dBm_L ;
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+ uint8_t Table_Det_17_dBm_H ;
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+ uint8_t Table_Det_17_dBm_L ;
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+ uint8_t Table_Det_18_dBm_H ;
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+ uint8_t Table_Det_18_dBm_L ;
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+ uint8_t Table_Det_19_dBm_H ;
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+ uint8_t Table_Det_19_dBm_L ;
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+ uint8_t Table_Det_20_dBm_H ;//1.8
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+ uint8_t Table_Det_20_dBm_L ;//1.6
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+ uint8_t Table_Det_21_dBm_H ;//1.4
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+ uint8_t Table_Det_21_dBm_L ;
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+ uint8_t Table_Det_22_dBm_H ;
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+ uint8_t Table_Det_22_dBm_L ;
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+ uint8_t Table_Det_23_dBm_H ;
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+ uint8_t Table_Det_23_dBm_L ;
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+ uint8_t Table_Det_24_dBm_H ;
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+ uint8_t Table_Det_24_dBm_L ;
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+ uint8_t Table_Det_25_dBm_H ;
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+ uint8_t Table_Det_25_dBm_L ;
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+ uint8_t Table_Det_26_dBm_H ;
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+ uint8_t Table_Det_26_dBm_L ;
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+ uint8_t Table_Det_27_dBm_H ;
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+ uint8_t Table_Det_27_dBm_L ;
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+ uint8_t Table_Det_28_dBm_H ;
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+ uint8_t Table_Det_28_dBm_L ;
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+ uint8_t Table_Det_29_dBm_H ;
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+ uint8_t Table_Det_29_dBm_L ;
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+ uint8_t Table_Det_30_dBm_H ;
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+ uint8_t Table_Det_30_dBm_L ;
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+ uint8_t Table_Det_31_dBm_H ;
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+ uint8_t Table_Det_31_dBm_L ;
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293
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+ uint8_t Table_Det_32_dBm_H ;
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+ uint8_t Table_Det_32_dBm_L ;
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+ uint8_t Table_Det_33_dBm_H ;
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+ uint8_t Table_Det_33_dBm_L ;
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+ uint8_t Table_Det_34_dBm_H ;
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+ uint8_t Table_Det_34_dBm_L ;
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+ uint8_t Table_Det_35_dBm_H ;
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+ uint8_t Table_Det_35_dBm_L ;
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+ uint8_t Table_Det_36_dBm_H ;
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+ uint8_t Table_Det_36_dBm_L ;
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+ uint8_t Table_Det_37_dBm_H ;
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+ uint8_t Table_Det_37_dBm_L ;
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+ uint8_t Table_Det_38_dBm_H ;
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+ uint8_t Table_Det_38_dBm_L ;
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+ uint8_t Table_Det_39_dBm_H ;
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+ uint8_t Table_Det_39_dBm_L ;
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+ uint8_t Table_Det_40_dBm_H ;
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+ uint8_t Table_Det_40_dBm_L ;
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+ uint8_t Table_Det_41_dBm_H ;
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+ uint8_t Table_Det_41_dBm_L ;
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+ uint8_t Table_Det_42_dBm_H ;
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314
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+ uint8_t Table_Det_42_dBm_L ;
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315
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+ uint8_t Table_Det_43_dBm_H ;
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+ uint8_t Table_Det_43_dBm_L ;
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317
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+ uint8_t Table_Det_44_dBm_H ;
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318
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+ uint8_t Table_Det_44_dBm_L ;
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319
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+ uint8_t Table_Det_45_dBm_H ;
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320
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+ uint8_t Table_Det_45_dBm_L ;
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321
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+ uint8_t Table_Det_46_dBm_H ;
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+ uint8_t Table_Det_46_dBm_L ;
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323
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+ uint8_t Table_Det_47_dBm_H ;
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+ uint8_t Table_Det_47_dBm_L ;
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+ uint8_t Table_Det_48_dBm_H ;
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+ uint8_t Table_Det_48_dBm_L ;
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327
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+ uint8_t Table_Det_49_dBm_H ;
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328
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+ uint8_t Table_Det_49_dBm_L ;
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+ uint8_t Table_Det_50_dBm_H ;
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+ uint8_t Table_Det_50_dBm_L ;
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+ uint8_t Table_Det_51_dBm_H ;
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+ uint8_t Table_Det_51_dBm_L ;
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+ uint8_t Table_Det_52_dBm_H ;
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334
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+ uint8_t Table_Det_52_dBm_L ;
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335
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+ uint8_t Table_Det_53_dBm_H ;
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336
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+ uint8_t Table_Det_53_dBm_L ;
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337
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+ uint8_t Table_Det_54_dBm_H ;
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338
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+ uint8_t Table_Det_54_dBm_L ;
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339
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+ uint8_t Table_Det_55_dBm_H ;
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340
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+ uint8_t Table_Det_55_dBm_L ;
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341
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+ uint8_t Table_Det_56_dBm_H ;
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342
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+ uint8_t Table_Det_56_dBm_L ;
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343
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+ uint8_t Table_Det_57_dBm_H ;
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|
344
|
+ uint8_t Table_Det_57_dBm_L ;
|
|
345
|
+ uint8_t Table_Det_58_dBm_H ;
|
|
346
|
+ uint8_t Table_Det_58_dBm_L ;
|
|
347
|
+ uint8_t Table_Det_59_dBm_H ;
|
|
348
|
+ uint8_t Table_Det_59_dBm_L ;
|
|
349
|
+ uint8_t Table_Det_60_dBm_H ;
|
|
350
|
+ uint8_t Table_Det_60_dBm_L ;
|
|
351
|
+}DET_TABLEUL_st;
|
|
352
|
+
|
|
353
|
+
|
|
354
|
+typedef struct{
|
|
355
|
+ uint8_t bluecell_header;
|
|
356
|
+ uint8_t bluecell_type;
|
|
357
|
+ uint8_t bluecell_length;
|
|
358
|
+ uint8_t bluecell_crcindex;
|
|
359
|
+ uint8_t Selftest1;
|
|
360
|
+ uint8_t Selftest2;
|
|
361
|
+ uint8_t Selftest3;
|
|
362
|
+ uint8_t Selftest4;
|
|
363
|
+ uint8_t ATT_DL1_PATH;
|
|
364
|
+ uint8_t ATT_DL2_PATH;
|
|
365
|
+ uint8_t ATT_DL3_PATH;
|
|
366
|
+ uint8_t ATT_DL4_PATH;
|
|
367
|
+ uint8_t ATT_UL1_PATH;
|
|
368
|
+ uint8_t ATT_UL2_PATH;
|
|
369
|
+ uint8_t ATT_UL3_PATH;
|
|
370
|
+ uint8_t ATT_UL4_PATH;
|
|
371
|
+ uint8_t ATT_DL1_H;
|
|
372
|
+ uint8_t ATT_DL1_L;
|
|
373
|
+ uint8_t ATT_DL2_H;
|
|
374
|
+ uint8_t ATT_DL2_L;
|
|
375
|
+ uint8_t ATT_DL3_H;
|
|
376
|
+ uint8_t ATT_DL3_L;
|
|
377
|
+ uint8_t ATT_DL4_H;
|
|
378
|
+ uint8_t ATT_DL4_L;
|
|
379
|
+ uint8_t ATT_UL1_H;
|
|
380
|
+ uint8_t ATT_UL1_L;
|
|
381
|
+ uint8_t ATT_UL2_H;
|
|
382
|
+ uint8_t ATT_UL2_L;
|
|
383
|
+ uint8_t ATT_UL3_H;
|
|
384
|
+ uint8_t ATT_UL3_L;
|
|
385
|
+ uint8_t ATT_UL4_H;
|
|
386
|
+ uint8_t ATT_UL4_L;
|
|
387
|
+ uint8_t ULO_P1_Level1_H;
|
|
388
|
+ uint8_t ULO_P1_Level1_L;
|
|
389
|
+ uint8_t ULO_P2_Level2_H;
|
|
390
|
+ uint8_t ULO_P2_Level2_L;
|
|
391
|
+ uint8_t ULO_P3_Level3_H;
|
|
392
|
+ uint8_t ULO_P3_Level3_L;
|
|
393
|
+ uint8_t ULO_P4_Level4_H;
|
|
394
|
+ uint8_t ULO_P4_Level4_L;
|
|
395
|
+ uint8_t DLI_P1_Level1_H;
|
|
396
|
+ uint8_t DLI_P1_Level1_L;
|
|
397
|
+ uint8_t DLI_P2_Level2_H;
|
|
398
|
+ uint8_t DLI_P2_Level2_L;
|
|
399
|
+ uint8_t DLI_P3_Level3_H;
|
|
400
|
+ uint8_t DLI_P3_Level3_L;
|
|
401
|
+ uint8_t DLI_P4_Level4_H;
|
|
402
|
+ uint8_t DLI_P4_Level4_L;
|
|
403
|
+ uint8_t DET_TEMP;
|
|
404
|
+ uint8_t DLI_AGC_ON_OFF;
|
|
405
|
+ uint8_t ULO_ALC_ON_OFF;
|
|
406
|
+ uint8_t ULO_Level1_H;
|
|
407
|
+ uint8_t ULO_Level1_L;
|
|
408
|
+ uint8_t ULO_Level2_H;
|
|
409
|
+ uint8_t ULO_Level2_L;
|
|
410
|
+ uint8_t ULO_Level3_H;
|
|
411
|
+ uint8_t ULO_Level3_L;
|
|
412
|
+ uint8_t ULO_Level4_H;
|
|
413
|
+ uint8_t ULO_Level4_L;
|
|
414
|
+ uint8_t DLI_Level1_H;
|
|
415
|
+ uint8_t DLI_Level1_L;
|
|
416
|
+ uint8_t DLI_Level2_H;
|
|
417
|
+ uint8_t DLI_Level2_L;
|
|
418
|
+ uint8_t DLI_Level3_H;
|
|
419
|
+ uint8_t DLI_Level3_L;
|
|
420
|
+ uint8_t DLI_Level4_H;
|
|
421
|
+ uint8_t DLI_Level4_L;
|
|
422
|
+ uint8_t ULO_ALC_Threshold_H;
|
|
423
|
+ uint8_t ULO_ALC_Threshold_L;
|
|
424
|
+ uint8_t BLUECELL_RESERVE17;
|
|
425
|
+ uint8_t BLUECELL_RESERVE18;
|
|
426
|
+ uint8_t BLUECELL_RESERVE19;
|
|
427
|
+ uint8_t BLUECELL_RESERVE20;
|
|
428
|
+ uint8_t BLUECELL_RESERVE21;
|
|
429
|
+ uint8_t bluecell_User_DL1_H;
|
|
430
|
+ uint8_t bluecell_User_DL1_L;
|
|
431
|
+ uint8_t bluecell_User_DL2_H;
|
|
432
|
+ uint8_t bluecell_User_DL2_L;
|
|
433
|
+ uint8_t bluecell_User_DL3_H;
|
|
434
|
+ uint8_t bluecell_User_DL3_L;
|
|
435
|
+ uint8_t bluecell_User_DL4_H;
|
|
436
|
+ uint8_t bluecell_User_DL4_L;
|
|
437
|
+ uint8_t bluecell_User_UL1_H;
|
|
438
|
+ uint8_t bluecell_User_UL1_L;
|
|
439
|
+ uint8_t bluecell_User_UL2_H;
|
|
440
|
+ uint8_t bluecell_User_UL2_L;
|
|
441
|
+ uint8_t bluecell_User_UL3_H;
|
|
442
|
+ uint8_t bluecell_User_UL3_L;
|
|
443
|
+ uint8_t bluecell_User_UL4_H;
|
|
444
|
+ uint8_t bluecell_User_UL4_L;
|
|
445
|
+ uint8_t bluecell_User_TEMP_H;
|
|
446
|
+ uint8_t bluecell_User_TEMP_L;
|
|
447
|
+ int8_t bluecell_User_TEMP_OFFSET;
|
|
448
|
+ int8_t Temp_High_Threshold;
|
|
449
|
+ int8_t Temp_High_Threshold_Default;
|
|
450
|
+ uint8_t DLI_Level_High_Threshold_H;
|
|
451
|
+ uint8_t DLI_Level_High_Threshold_L;
|
|
452
|
+ uint8_t DLI_Level_Low_Threshold_H;
|
|
453
|
+ uint8_t DLI_Level_Low_Threshold_L;
|
|
454
|
+ uint8_t DLI_Level_High_Low_Threshold_default;
|
|
455
|
+ uint8_t ALARM_TEMP_HIGH; //bit
|
|
456
|
+ uint8_t ALARM_DLI_Level;
|
|
457
|
+ uint8_t ALARM_DLI_SHTUTDOWN;
|
|
458
|
+ uint8_t ALARM_DLI_AGC_Alarm;
|
|
459
|
+ uint8_t ALARM_ULO_ALC_Alarm;
|
|
460
|
+ uint8_t ALARM_ULO_Level;
|
|
461
|
+ uint8_t ALARM_ULO_SHTUTDOWN;
|
|
462
|
+ uint8_t ALARM_MASK1;
|
|
463
|
+ uint8_t ALARM_MASK2;
|
|
464
|
+ uint8_t ALARM_MASK3;
|
|
465
|
+ uint8_t ALARM_MASK4;
|
|
466
|
+ uint8_t ALARM_MASK5;
|
|
467
|
+ uint8_t ALARM_TESTMODE;
|
|
468
|
+ uint8_t ALARM_Test_Dummy1;
|
|
469
|
+ uint8_t ALARM_Test_Dummy2;
|
|
470
|
+ uint8_t ALARM_Test_Dummy3;
|
|
471
|
+ uint8_t ALARM_Test_Dummy4;
|
|
472
|
+ uint8_t ALARM_Test_Dummy5;
|
|
473
|
+ uint8_t CPUVERSION1;
|
|
474
|
+ uint8_t CPUVERSION2;
|
|
475
|
+ uint8_t CPUVERSION3;
|
|
476
|
+ uint8_t CPU_Current_Bank;
|
|
477
|
+ uint8_t CPU_Bank_Select;//Reboot_by;
|
|
478
|
+ uint8_t CPU_Bank1_Image_Version1;
|
|
479
|
+ uint8_t CPU_Bank1_Image_Version2;
|
|
480
|
+ uint8_t CPU_Bank1_Image_Version3;
|
|
481
|
+ uint8_t CPU_Bank1_Image_BuildTime1;
|
|
482
|
+ uint8_t CPU_Bank1_Image_BuildTime2;
|
|
483
|
+ uint8_t CPU_Bank1_Image_BuildTime3;
|
|
484
|
+ uint8_t CPU_Bank1_Image_BuildTime4;
|
|
485
|
+ uint8_t CPU_Bank1_Image_BuildTime5;
|
|
486
|
+ uint8_t CPU_Bank1_Image_BuildTime6;
|
|
487
|
+ uint8_t CPU_Bank1_Image_Name[32];
|
|
488
|
+ uint8_t CPU_Bank2_Image_Version1;
|
|
489
|
+ uint8_t CPU_Bank2_Image_Version2;
|
|
490
|
+ uint8_t CPU_Bank2_Image_Version3;
|
|
491
|
+ uint8_t CPU_Bank2_Image_BuildTime1;
|
|
492
|
+ uint8_t CPU_Bank2_Image_BuildTime2;
|
|
493
|
+ uint8_t CPU_Bank2_Image_BuildTime3;
|
|
494
|
+ uint8_t CPU_Bank2_Image_BuildTime4;
|
|
495
|
+ uint8_t CPU_Bank2_Image_BuildTime5;
|
|
496
|
+ uint8_t CPU_Bank2_Image_BuildTime6;
|
|
497
|
+ uint8_t CPU_Bank2_Image_Name[32];
|
|
498
|
+ uint8_t S_W_Reset;
|
|
499
|
+ uint8_t Factory_Set_Initialization;
|
|
500
|
+ uint8_t Temp_High_Alarm;
|
|
501
|
+ uint8_t LED_TEST;
|
|
502
|
+ uint8_t NODE;
|
|
503
|
+ uint8_t Type;
|
|
504
|
+ uint8_t PCB_Version[2];
|
|
505
|
+ uint8_t Serial_Number[20]; // INDEX : 20
|
|
506
|
+ uint8_t Manufacture;
|
|
507
|
+ uint8_t Manufacture_Date[3];
|
|
508
|
+ uint8_t Freq_ID;
|
|
509
|
+ uint8_t Carrier_ID;
|
|
510
|
+ uint8_t Carrier_ON_OFF;
|
|
511
|
+ uint8_t DLI_Level_High_Alarm1;
|
|
512
|
+ uint8_t DLI_Level_High_Alarm2;
|
|
513
|
+ uint8_t DLI_Level_High_Alarm3;
|
|
514
|
+ uint8_t DLI_Level_High_Alarm4;
|
|
515
|
+ uint8_t DLI_Level_Low_Alarm1;
|
|
516
|
+ uint8_t DLI_Level_Low_Alarm2;
|
|
517
|
+ uint8_t DLI_Level_Low_Alarm3;
|
|
518
|
+ uint8_t DLI_Level_Low_Alarm4;
|
|
519
|
+ uint8_t DLI_FRBT_Atten1_H;
|
|
520
|
+ uint8_t DLI_FRBT_Atten1_L;
|
|
521
|
+ uint8_t DLI_FRBT_Atten2_H;
|
|
522
|
+ uint8_t DLI_FRBT_Atten2_L;
|
|
523
|
+ uint8_t DLI_FRBT_Atten3_H;
|
|
524
|
+ uint8_t DLI_FRBT_Atten3_L;
|
|
525
|
+ uint8_t DLI_FRBT_Atten4_H;
|
|
526
|
+ uint8_t DLI_FRBT_Atten4_L;
|
|
527
|
+ uint8_t DLI_FRBT_D_Day;
|
|
528
|
+ uint8_t DLI_FRBT_Status;
|
|
529
|
+ uint8_t DLI_AGC_Threshold_H;
|
|
530
|
+ uint8_t DLI_AGC_Threshold_L;
|
|
531
|
+ uint8_t DLI_AGC_Threshold_default;
|
|
532
|
+ uint8_t DLI_Shutdown_ON_OFF;
|
|
533
|
+ uint8_t DLI_Shutdown_Threshold_H;
|
|
534
|
+ uint8_t DLI_Shutdown_Threshold_L;
|
|
535
|
+ uint8_t DLI_Shutdown_Threshold_Default;
|
|
536
|
+ uint8_t DLI_Shutdown_Retry_Count1;
|
|
537
|
+ uint8_t DLI_Shutdown_Retry_Count2;
|
|
538
|
+ uint8_t DLI_Shutdown_Retry_Count3;
|
|
539
|
+ uint8_t DLI_Shutdown_Retry_Count4;
|
|
540
|
+ uint8_t DLI_AGC_Alarm1;
|
|
541
|
+ uint8_t DLI_AGC_Alarm2;
|
|
542
|
+ uint8_t DLI_AGC_Alarm3;
|
|
543
|
+ uint8_t DLI_AGC_Alarm4;
|
|
544
|
+ uint8_t DLI_Shutdown_Alarm1;
|
|
545
|
+ uint8_t DLI_Shutdown_Alarm2;
|
|
546
|
+ uint8_t DLI_Shutdown_Alarm3;
|
|
547
|
+ uint8_t DLI_Shutdown_Alarm4;
|
|
548
|
+ uint8_t ULO_Level_High_Threshold_H;
|
|
549
|
+ uint8_t ULO_Level_High_Threshold_L;
|
|
550
|
+ uint8_t ULO_Level_High_Threshold_default;
|
|
551
|
+ uint8_t BLUECELL_RESERVE28;//ADC3 8
|
|
552
|
+ uint8_t BLUECELL_RESERVE29;//ADC3 8
|
|
553
|
+ uint8_t BLUECELL_RESERVE30;//ADC1 4
|
|
554
|
+ uint8_t BLUECELL_RESERVE31;//ADC1 4
|
|
555
|
+ uint8_t BLUECELL_RESERVE32;//ADC1 5
|
|
556
|
+ uint8_t BLUECELL_RESERVE33;//ADC1 5
|
|
557
|
+ uint8_t BLUECELL_RESERVE34;//ADC1 6
|
|
558
|
+ uint8_t BLUECELL_RESERVE35;//ADC1 6
|
|
559
|
+ uint8_t BLUECELL_RESERVE36;//ADC3 4
|
|
560
|
+ uint8_t BLUECELL_RESERVE37;//ADC3 4
|
|
561
|
+ uint8_t ULO_Level_High_Alarm1;
|
|
562
|
+ uint8_t ULO_Level_High_Alarm2;
|
|
563
|
+ uint8_t ULO_Level_High_Alarm3;
|
|
564
|
+ uint8_t ULO_Level_High_Alarm4;
|
|
565
|
+ uint8_t ULO_ALC_Threshold_Default;
|
|
566
|
+ uint8_t ULO_Shutdown_ON_OFF;
|
|
567
|
+ uint8_t ULO_Shutdown_Threshold_H;
|
|
568
|
+ uint8_t ULO_Shutdown_Threshold_L;
|
|
569
|
+ uint8_t ULO_Shutdown_Threshold_Default;
|
|
570
|
+ uint8_t ULO_Shutdown_Retry_Count1;
|
|
571
|
+ uint8_t ULO_Shutdown_Retry_Count2;
|
|
572
|
+ uint8_t ULO_Shutdown_Retry_Count3;
|
|
573
|
+ uint8_t ULO_Shutdown_Retry_Count4;
|
|
574
|
+ uint8_t ULO_ALC_Alarm1;
|
|
575
|
+ uint8_t ULO_ALC_Alarm2;
|
|
576
|
+ uint8_t ULO_ALC_Alarm3;
|
|
577
|
+ uint8_t ULO_ALC_Alarm4;
|
|
578
|
+ uint8_t ULO_Shutdown_Alarm1;
|
|
579
|
+ uint8_t ULO_Shutdown_Alarm2;
|
|
580
|
+ uint8_t ULO_Shutdown_Alarm3;
|
|
581
|
+ uint8_t ULO_Shutdown_Alarm4;
|
|
582
|
+ uint8_t Reserve0;
|
|
583
|
+ uint8_t Reserve1;
|
|
584
|
+ uint8_t Reserve2;
|
|
585
|
+ uint8_t Reserve3;
|
|
586
|
+ uint8_t Reserve4;
|
|
587
|
+ uint8_t Reserve5;
|
|
588
|
+ uint8_t bluecell_crc_H;
|
|
589
|
+ uint8_t bluecell_crc_L;
|
|
590
|
+ uint8_t bluecell_etx;
|
|
591
|
+
|
|
592
|
+}BLUESTATUS_st;
|
98
|
593
|
|
99
|
594
|
|
100
|
|
-
|
101
|
|
-
|
102
|
|
-
|
103
|
|
-
|
104
|
|
-
|
105
|
|
-
|
106
|
|
-
|
107
|
|
-
|
108
|
|
-
|
109
|
|
-
|
110
|
|
-
|
111
|
|
-// Exported type definitions --------------------------------------------------
|
112
|
|
-/**
|
113
|
|
- * The possible states the EEPROM driver can be in.
|
114
|
|
- */
|
115
|
|
-typedef enum
|
116
|
|
-{
|
117
|
|
- EE_UNINIT = 0, //!< Driver has not been initialized
|
118
|
|
- EE_IDLE, //!< Driver has been initialized and is ready to start a transfer
|
119
|
|
- EE_FINISH, //!< Driver has finished with a transfer
|
120
|
|
- EE_READ, //!< Driver is doing a read operation
|
121
|
|
- EE_WRITE_SEND, //!< Driver is writing data
|
122
|
|
- EE_WRITE_WAIT //!< Driver is waiting for the EEPROM to finish a write cycle
|
123
|
|
-} EEPROM_Status;
|
124
|
|
-
|
125
|
|
-/**
|
126
|
|
- * The possible outcomes of an operation.
|
127
|
|
- */
|
128
|
|
-typedef enum
|
129
|
|
-{
|
130
|
|
- EE_OK = 0, //!< Indicates success
|
131
|
|
- EE_BUSY, //!< Indicates that the driver is currently busy doing a transfer
|
132
|
|
- EE_ERROR //!< Indicates an error condition
|
133
|
|
-} EEPROM_Error;
|
134
|
|
-
|
135
|
|
-/**
|
136
|
|
- * Contains static configuration for the board such as populated peripherals, fitted resistor values and Ethernet MAC
|
137
|
|
- * address, that are stored on the EEPROM.
|
138
|
|
- */
|
139
|
|
-
|
140
|
|
-// Macros ---------------------------------------------------------------------
|
141
|
|
-
|
142
|
|
-#ifndef LOBYTE
|
143
|
|
-#define LOBYTE(x) ((uint8_t)(x & 0x00FF))
|
144
|
|
-#endif
|
145
|
|
-#ifndef HIBYTE
|
146
|
|
-#define HIBYTE(x) ((uint8_t)((x & 0xFF00) >> 8))
|
147
|
|
-#endif
|
148
|
|
-#define MAKE_ADDRESS(_addr, _e2) ((uint8_t)EEPROM_M24C08_ADDR | \
|
149
|
|
- ((_e2) ? EEPROM_M24C08_ADDR_E2 : 0) | \
|
150
|
|
- ((uint8_t)((_addr) >> 7) & EEPROM_M24C08_BYTE_ADDR_H))
|
151
|
|
-
|
152
|
|
-// Constants ------------------------------------------------------------------
|
153
|
|
-
|
154
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|
-/**
|
155
|
|
- * @defgroup EEPROM_M24C08_ADDRESS M24C08 Address definitions
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156
|
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- *
|
157
|
|
- * The address byte that is sent to an M24C08 consists of 4 parts:
|
158
|
|
- * + The device identifier {@link EEPROM_M24C08_ADDR} (4 bits)
|
159
|
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- * + An address bit {@link EEPROM_M24C08_ADDR_E2} that is either set or not, depending on the value of the `E2` pin on
|
160
|
|
- * the M24C08 device
|
161
|
|
- * + The two most significant bits of the memory address to be read/written {@link EEPROM_M24C08_BYTE_ADDR_H}
|
162
|
|
- * + The standard I2C read/write bit
|
163
|
|
- * @{
|
164
|
|
- */
|
165
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-#define EEPROM_M24C08_ADDR 0xA0 //!< M24C08 device identifier
|
166
|
|
-#define EEPROM_M24C08_ADDR_E2 0x08 //!< M24C08 E2 address bit
|
167
|
|
-/**
|
168
|
|
- * Bitmask for the M24C08 I2C Address bits that are used for the high byte of the memory address. The address bits are
|
169
|
|
- * either the high byte shifted left by one or the 16 bit address shifted right by 7 and then masked.
|
170
|
|
- */
|
171
|
|
-#define EEPROM_M24C08_BYTE_ADDR_H 0x06
|
172
|
|
-/** @} */
|
173
|
|
-
|
174
|
|
-/**
|
175
|
|
- * Timeout in ms for I2C communication
|
176
|
|
- */
|
177
|
|
-#define EEPROM_I2C_TIMEOUT 0x200
|
178
|
|
-
|
179
|
|
-/**
|
180
|
|
- * EEPROM size in bytes
|
181
|
|
- */
|
182
|
|
-#define EEPROM_SIZE 0x400
|
183
|
|
-
|
184
|
|
-/**
|
185
|
|
- * Mask for the page address, a page write can only write to addresses which have the same page address
|
186
|
|
- */
|
187
|
|
-#define EEPROM_PAGE_MASK 0x03F0
|
188
|
|
-
|
189
|
|
-/**
|
190
|
|
- * Page size of the EEPROM, only one page can be written at a time
|
191
|
|
- */
|
192
|
|
-#define EEPROM_PAGE_SIZE 0x10
|
193
|
|
-
|
194
|
|
-/**
|
195
|
|
- * Configuration data offset, that is the first address of the configuration data space
|
196
|
|
- */
|
197
|
|
-#define EEPROM_CONFIG_OFFSET 0
|
198
|
|
-
|
199
|
|
-/**
|
200
|
|
- * Size of the configuration data section in bytes
|
201
|
|
- */
|
202
|
|
-#define EEPROM_CONFIG_SIZE 128
|
203
|
|
-
|
204
|
|
-/**
|
205
|
|
- * Data offset, that is the first address for arbitrary data
|
206
|
|
- */
|
207
|
|
-#define EEPROM_DATA_OFFSET 0x80
|
208
|
|
-
|
209
|
|
-/**
|
210
|
|
- * Size of the data section in bytes, this is the EEPROM size minus the data offset
|
211
|
|
- */
|
212
|
|
-#define EEPROM_DATA_SIZE (EEPROM_SIZE - EEPROM_DATA_OFFSET)
|
213
|
|
-
|
214
|
|
-/**
|
215
|
|
- * Size of the settings buffer in bytes
|
216
|
|
- */
|
217
|
|
-#define EEPROM_SETTINGS_SIZE 64
|
218
|
|
-
|
219
|
595
|
// Exported functions ---------------------------------------------------------
|
220
|
596
|
|
221
|
597
|
|