STM32F100_RGB_SensorBootloader/Debug/STM32F100_LoraTestBootloader.list

STM32F100_LoraTestBootloader.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   000001d0  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00002c3c  080001d0  080001d0  000101d0  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       000001c0  08002e0c  08002e0c  00012e0c  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .init_array   00000004  08002fcc  08002fcc  00012fcc  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  4 .fini_array   00000004  08002fd0  08002fd0  00012fd0  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .data         00000074  20000000  08002fd4  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  6 .bss          00000214  20000078  08003048  00020078  2**3
                  ALLOC
  7 ._user_heap_stack 00000600  2000028c  08003048  0002028c  2**0
                  ALLOC
  8 .ARM.attributes 00000029  00000000  00000000  00020074  2**0
                  CONTENTS, READONLY
  9 .debug_info   0001566c  00000000  00000000  0002009d  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_abbrev 00002eb9  00000000  00000000  00035709  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    00007297  00000000  00000000  000385c2  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_aranges 00000a00  00000000  00000000  0003f860  2**3
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_ranges 00000d50  00000000  00000000  00040260  2**3
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_line   0000600b  00000000  00000000  00040fb0  2**0
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_str    00003e5c  00000000  00000000  00046fbb  2**0
                  CONTENTS, READONLY, DEBUGGING
 16 .comment      0000007c  00000000  00000000  0004ae17  2**0
                  CONTENTS, READONLY
 17 .debug_frame  00002500  00000000  00000000  0004ae94  2**2
                  CONTENTS, READONLY, DEBUGGING
 18 .stab         00000084  00000000  00000000  0004d394  2**2
                  CONTENTS, READONLY, DEBUGGING
 19 .stabstr      00000117  00000000  00000000  0004d418  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

080001d0 <__do_global_dtors_aux>:
 80001d0:	b510      	push	{r4, lr}
 80001d2:	4c05      	ldr	r4, [pc, #20]	; (80001e8 <__do_global_dtors_aux+0x18>)
 80001d4:	7823      	ldrb	r3, [r4, #0]
 80001d6:	b933      	cbnz	r3, 80001e6 <__do_global_dtors_aux+0x16>
 80001d8:	4b04      	ldr	r3, [pc, #16]	; (80001ec <__do_global_dtors_aux+0x1c>)
 80001da:	b113      	cbz	r3, 80001e2 <__do_global_dtors_aux+0x12>
 80001dc:	4804      	ldr	r0, [pc, #16]	; (80001f0 <__do_global_dtors_aux+0x20>)
 80001de:	f3af 8000 	nop.w
 80001e2:	2301      	movs	r3, #1
 80001e4:	7023      	strb	r3, [r4, #0]
 80001e6:	bd10      	pop	{r4, pc}
 80001e8:	20000078 	.word	0x20000078
 80001ec:	00000000 	.word	0x00000000
 80001f0:	08002df4 	.word	0x08002df4

080001f4 <frame_dummy>:
 80001f4:	b508      	push	{r3, lr}
 80001f6:	4b03      	ldr	r3, [pc, #12]	; (8000204 <frame_dummy+0x10>)
 80001f8:	b11b      	cbz	r3, 8000202 <frame_dummy+0xe>
 80001fa:	4903      	ldr	r1, [pc, #12]	; (8000208 <frame_dummy+0x14>)
 80001fc:	4803      	ldr	r0, [pc, #12]	; (800020c <frame_dummy+0x18>)
 80001fe:	f3af 8000 	nop.w
 8000202:	bd08      	pop	{r3, pc}
 8000204:	00000000 	.word	0x00000000
 8000208:	2000007c 	.word	0x2000007c
 800020c:	08002df4 	.word	0x08002df4

08000210 <__aeabi_llsr>:
 8000210:	40d0      	lsrs	r0, r2
 8000212:	1c0b      	adds	r3, r1, #0
 8000214:	40d1      	lsrs	r1, r2
 8000216:	469c      	mov	ip, r3
 8000218:	3a20      	subs	r2, #32
 800021a:	40d3      	lsrs	r3, r2
 800021c:	4318      	orrs	r0, r3
 800021e:	4252      	negs	r2, r2
 8000220:	4663      	mov	r3, ip
 8000222:	4093      	lsls	r3, r2
 8000224:	4318      	orrs	r0, r3
 8000226:	4770      	bx	lr

08000228 <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8000228:	b538      	push	{r3, r4, r5, lr}
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800022a:	4b0e      	ldr	r3, [pc, #56]	; (8000264 <HAL_InitTick+0x3c>)
{
 800022c:	4605      	mov	r5, r0
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 800022e:	7818      	ldrb	r0, [r3, #0]
 8000230:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8000234:	fbb3 f3f0 	udiv	r3, r3, r0
 8000238:	4a0b      	ldr	r2, [pc, #44]	; (8000268 <HAL_InitTick+0x40>)
 800023a:	6810      	ldr	r0, [r2, #0]
 800023c:	fbb0 f0f3 	udiv	r0, r0, r3
 8000240:	f000 f898 	bl	8000374 <HAL_SYSTICK_Config>
 8000244:	4604      	mov	r4, r0
 8000246:	b958      	cbnz	r0, 8000260 <HAL_InitTick+0x38>
  {
    return HAL_ERROR;
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 8000248:	2d0f      	cmp	r5, #15
 800024a:	d809      	bhi.n	8000260 <HAL_InitTick+0x38>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 800024c:	4602      	mov	r2, r0
 800024e:	4629      	mov	r1, r5
 8000250:	f04f 30ff 	mov.w	r0, #4294967295
 8000254:	f000 f84e 	bl	80002f4 <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 8000258:	4b04      	ldr	r3, [pc, #16]	; (800026c <HAL_InitTick+0x44>)
 800025a:	4620      	mov	r0, r4
 800025c:	601d      	str	r5, [r3, #0]
 800025e:	bd38      	pop	{r3, r4, r5, pc}
    return HAL_ERROR;
 8000260:	2001      	movs	r0, #1
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
}
 8000262:	bd38      	pop	{r3, r4, r5, pc}
 8000264:	20000000 	.word	0x20000000
 8000268:	2000000c 	.word	0x2000000c
 800026c:	20000004 	.word	0x20000004

08000270 <HAL_Init>:
{
 8000270:	b508      	push	{r3, lr}
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8000272:	2003      	movs	r0, #3
 8000274:	f000 f82c 	bl	80002d0 <HAL_NVIC_SetPriorityGrouping>
  HAL_InitTick(TICK_INT_PRIORITY);
 8000278:	2000      	movs	r0, #0
 800027a:	f7ff ffd5 	bl	8000228 <HAL_InitTick>
  HAL_MspInit();
 800027e:	f001 fc5b 	bl	8001b38 <HAL_MspInit>
}
 8000282:	2000      	movs	r0, #0
 8000284:	bd08      	pop	{r3, pc}
	...

08000288 <HAL_IncTick>:
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
  uwTick += uwTickFreq;
 8000288:	4a03      	ldr	r2, [pc, #12]	; (8000298 <HAL_IncTick+0x10>)
 800028a:	4b04      	ldr	r3, [pc, #16]	; (800029c <HAL_IncTick+0x14>)
 800028c:	6811      	ldr	r1, [r2, #0]
 800028e:	781b      	ldrb	r3, [r3, #0]
 8000290:	440b      	add	r3, r1
 8000292:	6013      	str	r3, [r2, #0]
 8000294:	4770      	bx	lr
 8000296:	bf00      	nop
 8000298:	200000d0 	.word	0x200000d0
 800029c:	20000000 	.word	0x20000000

080002a0 <HAL_GetTick>:
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
  return uwTick;
 80002a0:	4b01      	ldr	r3, [pc, #4]	; (80002a8 <HAL_GetTick+0x8>)
 80002a2:	6818      	ldr	r0, [r3, #0]
}
 80002a4:	4770      	bx	lr
 80002a6:	bf00      	nop
 80002a8:	200000d0 	.word	0x200000d0

080002ac <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80002ac:	b538      	push	{r3, r4, r5, lr}
 80002ae:	4604      	mov	r4, r0
  uint32_t tickstart = HAL_GetTick();
 80002b0:	f7ff fff6 	bl	80002a0 <HAL_GetTick>
 80002b4:	4605      	mov	r5, r0
  uint32_t wait = Delay;

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80002b6:	1c63      	adds	r3, r4, #1
  {
    wait += (uint32_t)(uwTickFreq);
 80002b8:	bf1e      	ittt	ne
 80002ba:	4b04      	ldrne	r3, [pc, #16]	; (80002cc <HAL_Delay+0x20>)
 80002bc:	781b      	ldrbne	r3, [r3, #0]
 80002be:	18e4      	addne	r4, r4, r3
  }

  while ((HAL_GetTick() - tickstart) < wait)
 80002c0:	f7ff ffee 	bl	80002a0 <HAL_GetTick>
 80002c4:	1b40      	subs	r0, r0, r5
 80002c6:	4284      	cmp	r4, r0
 80002c8:	d8fa      	bhi.n	80002c0 <HAL_Delay+0x14>
  {
  }
}
 80002ca:	bd38      	pop	{r3, r4, r5, pc}
 80002cc:	20000000 	.word	0x20000000

080002d0 <HAL_NVIC_SetPriorityGrouping>:
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002d0:	4a07      	ldr	r2, [pc, #28]	; (80002f0 <HAL_NVIC_SetPriorityGrouping+0x20>)
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002d2:	0200      	lsls	r0, r0, #8
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 80002d4:	68d3      	ldr	r3, [r2, #12]
                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
 80002d6:	f400 60e0 	and.w	r0, r0, #1792	; 0x700
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 80002da:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 80002de:	041b      	lsls	r3, r3, #16
 80002e0:	0c1b      	lsrs	r3, r3, #16
 80002e2:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 80002e6:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
  reg_value  =  (reg_value                                   |
 80002ea:	4303      	orrs	r3, r0
  SCB->AIRCR =  reg_value;
 80002ec:	60d3      	str	r3, [r2, #12]
 80002ee:	4770      	bx	lr
 80002f0:	e000ed00 	.word	0xe000ed00

080002f4 <HAL_NVIC_SetPriority>:
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
{
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 80002f4:	4b17      	ldr	r3, [pc, #92]	; (8000354 <HAL_NVIC_SetPriority+0x60>)
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 80002f6:	b530      	push	{r4, r5, lr}
 80002f8:	68dc      	ldr	r4, [r3, #12]
 80002fa:	f3c4 2402 	ubfx	r4, r4, #8, #3
{
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 80002fe:	f1c4 0307 	rsb	r3, r4, #7
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000302:	1d25      	adds	r5, r4, #4
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8000304:	2b04      	cmp	r3, #4
 8000306:	bf28      	it	cs
 8000308:	2304      	movcs	r3, #4
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800030a:	2d06      	cmp	r5, #6

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800030c:	f04f 0501 	mov.w	r5, #1
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8000310:	bf98      	it	ls
 8000312:	2400      	movls	r4, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000314:	fa05 f303 	lsl.w	r3, r5, r3
 8000318:	f103 33ff 	add.w	r3, r3, #4294967295
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800031c:	bf88      	it	hi
 800031e:	3c03      	subhi	r4, #3
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8000320:	4019      	ands	r1, r3
 8000322:	40a1      	lsls	r1, r4
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8000324:	fa05 f404 	lsl.w	r4, r5, r4
 8000328:	3c01      	subs	r4, #1
 800032a:	4022      	ands	r2, r4
  if ((int32_t)(IRQn) < 0)
 800032c:	2800      	cmp	r0, #0
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 800032e:	ea42 0201 	orr.w	r2, r2, r1
 8000332:	ea4f 1202 	mov.w	r2, r2, lsl #4
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000336:	bfaf      	iteee	ge
 8000338:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800033c:	4b06      	ldrlt	r3, [pc, #24]	; (8000358 <HAL_NVIC_SetPriority+0x64>)
 800033e:	f000 000f 	andlt.w	r0, r0, #15
 8000342:	b2d2      	uxtblt	r2, r2
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000344:	bfa5      	ittet	ge
 8000346:	b2d2      	uxtbge	r2, r2
 8000348:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800034c:	541a      	strblt	r2, [r3, r0]
    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800034e:	f880 2300 	strbge.w	r2, [r0, #768]	; 0x300
 8000352:	bd30      	pop	{r4, r5, pc}
 8000354:	e000ed00 	.word	0xe000ed00
 8000358:	e000ed14 	.word	0xe000ed14

0800035c <HAL_NVIC_EnableIRQ>:
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
 800035c:	2301      	movs	r3, #1
 800035e:	0942      	lsrs	r2, r0, #5
 8000360:	f000 001f 	and.w	r0, r0, #31
 8000364:	fa03 f000 	lsl.w	r0, r3, r0
 8000368:	4b01      	ldr	r3, [pc, #4]	; (8000370 <HAL_NVIC_EnableIRQ+0x14>)
 800036a:	f843 0022 	str.w	r0, [r3, r2, lsl #2]
 800036e:	4770      	bx	lr
 8000370:	e000e100 	.word	0xe000e100

08000374 <HAL_SYSTICK_Config>:
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 8000374:	3801      	subs	r0, #1
 8000376:	f1b0 7f80 	cmp.w	r0, #16777216	; 0x1000000
 800037a:	d20a      	bcs.n	8000392 <HAL_SYSTICK_Config+0x1e>
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 800037c:	21f0      	movs	r1, #240	; 0xf0
  {
    return (1UL);                                                   /* Reload value impossible */
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800037e:	4b06      	ldr	r3, [pc, #24]	; (8000398 <HAL_SYSTICK_Config+0x24>)
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000380:	4a06      	ldr	r2, [pc, #24]	; (800039c <HAL_SYSTICK_Config+0x28>)
  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 8000382:	6058      	str	r0, [r3, #4]
    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8000384:	f882 1023 	strb.w	r1, [r2, #35]	; 0x23
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 8000388:	2000      	movs	r0, #0
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 800038a:	2207      	movs	r2, #7
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 800038c:	6098      	str	r0, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 800038e:	601a      	str	r2, [r3, #0]
 8000390:	4770      	bx	lr
    return (1UL);                                                   /* Reload value impossible */
 8000392:	2001      	movs	r0, #1
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
   return SysTick_Config(TicksNumb);
}
 8000394:	4770      	bx	lr
 8000396:	bf00      	nop
 8000398:	e000e010 	.word	0xe000e010
 800039c:	e000ed00 	.word	0xe000ed00

080003a0 <HAL_DMA_Abort_IT>:
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{  
  HAL_StatusTypeDef status = HAL_OK;
  
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003a0:	f890 3021 	ldrb.w	r3, [r0, #33]	; 0x21
{  
 80003a4:	b510      	push	{r4, lr}
  if(HAL_DMA_STATE_BUSY != hdma->State)
 80003a6:	2b02      	cmp	r3, #2
 80003a8:	d003      	beq.n	80003b2 <HAL_DMA_Abort_IT+0x12>
  {
    /* no transfer ongoing */
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 80003aa:	2304      	movs	r3, #4
 80003ac:	6383      	str	r3, [r0, #56]	; 0x38
        
    status = HAL_ERROR;
 80003ae:	2001      	movs	r0, #1
 80003b0:	bd10      	pop	{r4, pc}
  }
  else
  { 
    /* Disable DMA IT */
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 80003b2:	6803      	ldr	r3, [r0, #0]
 80003b4:	681a      	ldr	r2, [r3, #0]
 80003b6:	f022 020e 	bic.w	r2, r2, #14
 80003ba:	601a      	str	r2, [r3, #0]

    /* Disable the channel */
    __HAL_DMA_DISABLE(hdma);
 80003bc:	681a      	ldr	r2, [r3, #0]
 80003be:	f022 0201 	bic.w	r2, r2, #1
 80003c2:	601a      	str	r2, [r3, #0]

    /* Clear all flags */
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 80003c4:	4a18      	ldr	r2, [pc, #96]	; (8000428 <HAL_DMA_Abort_IT+0x88>)
 80003c6:	4293      	cmp	r3, r2
 80003c8:	d01f      	beq.n	800040a <HAL_DMA_Abort_IT+0x6a>
 80003ca:	3214      	adds	r2, #20
 80003cc:	4293      	cmp	r3, r2
 80003ce:	d01e      	beq.n	800040e <HAL_DMA_Abort_IT+0x6e>
 80003d0:	3214      	adds	r2, #20
 80003d2:	4293      	cmp	r3, r2
 80003d4:	d01d      	beq.n	8000412 <HAL_DMA_Abort_IT+0x72>
 80003d6:	3214      	adds	r2, #20
 80003d8:	4293      	cmp	r3, r2
 80003da:	d01d      	beq.n	8000418 <HAL_DMA_Abort_IT+0x78>
 80003dc:	3214      	adds	r2, #20
 80003de:	4293      	cmp	r3, r2
 80003e0:	d01d      	beq.n	800041e <HAL_DMA_Abort_IT+0x7e>
 80003e2:	3214      	adds	r2, #20
 80003e4:	4293      	cmp	r3, r2
 80003e6:	bf0c      	ite	eq
 80003e8:	f44f 1380 	moveq.w	r3, #1048576	; 0x100000
 80003ec:	f04f 7380 	movne.w	r3, #16777216	; 0x1000000
 80003f0:	4a0e      	ldr	r2, [pc, #56]	; (800042c <HAL_DMA_Abort_IT+0x8c>)

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 80003f2:	2400      	movs	r4, #0
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 80003f4:	6053      	str	r3, [r2, #4]
    hdma->State = HAL_DMA_STATE_READY;
 80003f6:	2301      	movs	r3, #1
 80003f8:	f880 3021 	strb.w	r3, [r0, #33]	; 0x21

    /* Call User Abort callback */
    if(hdma->XferAbortCallback != NULL)
 80003fc:	6b43      	ldr	r3, [r0, #52]	; 0x34
    __HAL_UNLOCK(hdma);
 80003fe:	f880 4020 	strb.w	r4, [r0, #32]
    if(hdma->XferAbortCallback != NULL)
 8000402:	b17b      	cbz	r3, 8000424 <HAL_DMA_Abort_IT+0x84>
    {
      hdma->XferAbortCallback(hdma);
 8000404:	4798      	blx	r3
  HAL_StatusTypeDef status = HAL_OK;
 8000406:	4620      	mov	r0, r4
 8000408:	bd10      	pop	{r4, pc}
    __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
 800040a:	2301      	movs	r3, #1
 800040c:	e7f0      	b.n	80003f0 <HAL_DMA_Abort_IT+0x50>
 800040e:	2310      	movs	r3, #16
 8000410:	e7ee      	b.n	80003f0 <HAL_DMA_Abort_IT+0x50>
 8000412:	f44f 7380 	mov.w	r3, #256	; 0x100
 8000416:	e7eb      	b.n	80003f0 <HAL_DMA_Abort_IT+0x50>
 8000418:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 800041c:	e7e8      	b.n	80003f0 <HAL_DMA_Abort_IT+0x50>
 800041e:	f44f 3380 	mov.w	r3, #65536	; 0x10000
 8000422:	e7e5      	b.n	80003f0 <HAL_DMA_Abort_IT+0x50>
  HAL_StatusTypeDef status = HAL_OK;
 8000424:	4618      	mov	r0, r3
    } 
  }
  return status;
}
 8000426:	bd10      	pop	{r4, pc}
 8000428:	40020008 	.word	0x40020008
 800042c:	40020000 	.word	0x40020000

08000430 <FLASH_SetErrorCode>:
  uint32_t flags = 0U;
  
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
 8000430:	4a11      	ldr	r2, [pc, #68]	; (8000478 <FLASH_SetErrorCode+0x48>)
 8000432:	68d3      	ldr	r3, [r2, #12]
 8000434:	f013 0310 	ands.w	r3, r3, #16
 8000438:	d005      	beq.n	8000446 <FLASH_SetErrorCode+0x16>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
 800043a:	4910      	ldr	r1, [pc, #64]	; (800047c <FLASH_SetErrorCode+0x4c>)
 800043c:	69cb      	ldr	r3, [r1, #28]
 800043e:	f043 0302 	orr.w	r3, r3, #2
 8000442:	61cb      	str	r3, [r1, #28]
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
    flags |= FLASH_FLAG_WRPERR;
 8000444:	2310      	movs	r3, #16
#endif /* FLASH_BANK2_END */
  }
#if defined(FLASH_BANK2_END)
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 8000446:	68d2      	ldr	r2, [r2, #12]
 8000448:	0750      	lsls	r0, r2, #29
 800044a:	d506      	bpl.n	800045a <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 800044c:	490b      	ldr	r1, [pc, #44]	; (800047c <FLASH_SetErrorCode+0x4c>)
#if defined(FLASH_BANK2_END)
    flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
    flags |= FLASH_FLAG_PGERR;
 800044e:	f043 0304 	orr.w	r3, r3, #4
    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
 8000452:	69ca      	ldr	r2, [r1, #28]
 8000454:	f042 0201 	orr.w	r2, r2, #1
 8000458:	61ca      	str	r2, [r1, #28]
#endif /* FLASH_BANK2_END */
  }
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
 800045a:	4a07      	ldr	r2, [pc, #28]	; (8000478 <FLASH_SetErrorCode+0x48>)
 800045c:	69d1      	ldr	r1, [r2, #28]
 800045e:	07c9      	lsls	r1, r1, #31
 8000460:	d508      	bpl.n	8000474 <FLASH_SetErrorCode+0x44>
  {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
 8000462:	4806      	ldr	r0, [pc, #24]	; (800047c <FLASH_SetErrorCode+0x4c>)
 8000464:	69c1      	ldr	r1, [r0, #28]
 8000466:	f041 0104 	orr.w	r1, r1, #4
 800046a:	61c1      	str	r1, [r0, #28]
  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
 800046c:	69d1      	ldr	r1, [r2, #28]
 800046e:	f021 0101 	bic.w	r1, r1, #1
 8000472:	61d1      	str	r1, [r2, #28]
  }

  /* Clear FLASH error pending bits */
  __HAL_FLASH_CLEAR_FLAG(flags);
 8000474:	60d3      	str	r3, [r2, #12]
 8000476:	4770      	bx	lr
 8000478:	40022000 	.word	0x40022000
 800047c:	200000d8 	.word	0x200000d8

08000480 <HAL_FLASH_Unlock>:
  if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8000480:	4b06      	ldr	r3, [pc, #24]	; (800049c <HAL_FLASH_Unlock+0x1c>)
 8000482:	6918      	ldr	r0, [r3, #16]
 8000484:	f010 0080 	ands.w	r0, r0, #128	; 0x80
 8000488:	d007      	beq.n	800049a <HAL_FLASH_Unlock+0x1a>
    WRITE_REG(FLASH->KEYR, FLASH_KEY1);
 800048a:	4a05      	ldr	r2, [pc, #20]	; (80004a0 <HAL_FLASH_Unlock+0x20>)
 800048c:	605a      	str	r2, [r3, #4]
    WRITE_REG(FLASH->KEYR, FLASH_KEY2);
 800048e:	f102 3288 	add.w	r2, r2, #2290649224	; 0x88888888
 8000492:	605a      	str	r2, [r3, #4]
    if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
 8000494:	6918      	ldr	r0, [r3, #16]
  HAL_StatusTypeDef status = HAL_OK;
 8000496:	f3c0 10c0 	ubfx	r0, r0, #7, #1
}
 800049a:	4770      	bx	lr
 800049c:	40022000 	.word	0x40022000
 80004a0:	45670123 	.word	0x45670123

080004a4 <HAL_FLASH_Lock>:
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 80004a4:	4a03      	ldr	r2, [pc, #12]	; (80004b4 <HAL_FLASH_Lock+0x10>)
}
 80004a6:	2000      	movs	r0, #0
  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
 80004a8:	6913      	ldr	r3, [r2, #16]
 80004aa:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80004ae:	6113      	str	r3, [r2, #16]
}
 80004b0:	4770      	bx	lr
 80004b2:	bf00      	nop
 80004b4:	40022000 	.word	0x40022000

080004b8 <FLASH_WaitForLastOperation>:
{
 80004b8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 80004ba:	4606      	mov	r6, r0
  uint32_t tickstart = HAL_GetTick();
 80004bc:	f7ff fef0 	bl	80002a0 <HAL_GetTick>
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 80004c0:	4c11      	ldr	r4, [pc, #68]	; (8000508 <FLASH_WaitForLastOperation+0x50>)
  uint32_t tickstart = HAL_GetTick();
 80004c2:	4607      	mov	r7, r0
 80004c4:	4625      	mov	r5, r4
  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
 80004c6:	68e3      	ldr	r3, [r4, #12]
 80004c8:	07d8      	lsls	r0, r3, #31
 80004ca:	d412      	bmi.n	80004f2 <FLASH_WaitForLastOperation+0x3a>
  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
 80004cc:	68e3      	ldr	r3, [r4, #12]
 80004ce:	0699      	lsls	r1, r3, #26
    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
 80004d0:	bf44      	itt	mi
 80004d2:	2320      	movmi	r3, #32
 80004d4:	60e3      	strmi	r3, [r4, #12]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 80004d6:	68eb      	ldr	r3, [r5, #12]
 80004d8:	06da      	lsls	r2, r3, #27
 80004da:	d406      	bmi.n	80004ea <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 80004dc:	69eb      	ldr	r3, [r5, #28]
  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
 80004de:	07db      	lsls	r3, r3, #31
 80004e0:	d403      	bmi.n	80004ea <FLASH_WaitForLastOperation+0x32>
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
 80004e2:	68e8      	ldr	r0, [r5, #12]
     __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 
 80004e4:	f010 0004 	ands.w	r0, r0, #4
 80004e8:	d002      	beq.n	80004f0 <FLASH_WaitForLastOperation+0x38>
    FLASH_SetErrorCode();
 80004ea:	f7ff ffa1 	bl	8000430 <FLASH_SetErrorCode>
    return HAL_ERROR;
 80004ee:	2001      	movs	r0, #1
}
 80004f0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if (Timeout != HAL_MAX_DELAY)
 80004f2:	1c73      	adds	r3, r6, #1
 80004f4:	d0e7      	beq.n	80004c6 <FLASH_WaitForLastOperation+0xe>
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 80004f6:	b90e      	cbnz	r6, 80004fc <FLASH_WaitForLastOperation+0x44>
        return HAL_TIMEOUT;
 80004f8:	2003      	movs	r0, #3
 80004fa:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
 80004fc:	f7ff fed0 	bl	80002a0 <HAL_GetTick>
 8000500:	1bc0      	subs	r0, r0, r7
 8000502:	4286      	cmp	r6, r0
 8000504:	d2df      	bcs.n	80004c6 <FLASH_WaitForLastOperation+0xe>
 8000506:	e7f7      	b.n	80004f8 <FLASH_WaitForLastOperation+0x40>
 8000508:	40022000 	.word	0x40022000

0800050c <HAL_FLASH_Program>:
{
 800050c:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  __HAL_LOCK(&pFlash);
 8000510:	4c1f      	ldr	r4, [pc, #124]	; (8000590 <HAL_FLASH_Program+0x84>)
{
 8000512:	4699      	mov	r9, r3
  __HAL_LOCK(&pFlash);
 8000514:	7e23      	ldrb	r3, [r4, #24]
{
 8000516:	4605      	mov	r5, r0
  __HAL_LOCK(&pFlash);
 8000518:	2b01      	cmp	r3, #1
{
 800051a:	460f      	mov	r7, r1
 800051c:	4690      	mov	r8, r2
  __HAL_LOCK(&pFlash);
 800051e:	d033      	beq.n	8000588 <HAL_FLASH_Program+0x7c>
 8000520:	2301      	movs	r3, #1
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8000522:	f24c 3050 	movw	r0, #50000	; 0xc350
  __HAL_LOCK(&pFlash);
 8000526:	7623      	strb	r3, [r4, #24]
    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8000528:	f7ff ffc6 	bl	80004b8 <FLASH_WaitForLastOperation>
  if(status == HAL_OK)
 800052c:	bb40      	cbnz	r0, 8000580 <HAL_FLASH_Program+0x74>
    if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
 800052e:	2d01      	cmp	r5, #1
 8000530:	d003      	beq.n	800053a <HAL_FLASH_Program+0x2e>
      nbiterations = 4U;
 8000532:	2d02      	cmp	r5, #2
 8000534:	bf0c      	ite	eq
 8000536:	2502      	moveq	r5, #2
 8000538:	2504      	movne	r5, #4
 800053a:	2600      	movs	r6, #0
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 800053c:	46b2      	mov	sl, r6
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 800053e:	f8df b054 	ldr.w	fp, [pc, #84]	; 8000594 <HAL_FLASH_Program+0x88>
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 8000542:	0132      	lsls	r2, r6, #4
 8000544:	4640      	mov	r0, r8
 8000546:	4649      	mov	r1, r9
 8000548:	f7ff fe62 	bl	8000210 <__aeabi_llsr>
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 800054c:	f8c4 a01c 	str.w	sl, [r4, #28]
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8000550:	f8db 3010 	ldr.w	r3, [fp, #16]
      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
 8000554:	b280      	uxth	r0, r0
    SET_BIT(FLASH->CR, FLASH_CR_PG);
 8000556:	f043 0301 	orr.w	r3, r3, #1
 800055a:	f8cb 3010 	str.w	r3, [fp, #16]
  *(__IO uint16_t*)Address = Data;
 800055e:	f827 0016 	strh.w	r0, [r7, r6, lsl #1]
        status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
 8000562:	f24c 3050 	movw	r0, #50000	; 0xc350
 8000566:	f7ff ffa7 	bl	80004b8 <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
 800056a:	f8db 3010 	ldr.w	r3, [fp, #16]
 800056e:	f023 0301 	bic.w	r3, r3, #1
 8000572:	f8cb 3010 	str.w	r3, [fp, #16]
      if (status != HAL_OK)
 8000576:	b918      	cbnz	r0, 8000580 <HAL_FLASH_Program+0x74>
 8000578:	3601      	adds	r6, #1
    for (index = 0U; index < nbiterations; index++)
 800057a:	b2f3      	uxtb	r3, r6
 800057c:	429d      	cmp	r5, r3
 800057e:	d8e0      	bhi.n	8000542 <HAL_FLASH_Program+0x36>
  __HAL_UNLOCK(&pFlash);
 8000580:	2300      	movs	r3, #0
 8000582:	7623      	strb	r3, [r4, #24]
  return status;
 8000584:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
  __HAL_LOCK(&pFlash);
 8000588:	2002      	movs	r0, #2
}
 800058a:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800058e:	bf00      	nop
 8000590:	200000d8 	.word	0x200000d8
 8000594:	40022000 	.word	0x40022000

08000598 <FLASH_MassErase.isra.0>:
{
  /* Check the parameters */
  assert_param(IS_FLASH_BANK(Banks));

  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 8000598:	2200      	movs	r2, #0
 800059a:	4b06      	ldr	r3, [pc, #24]	; (80005b4 <FLASH_MassErase.isra.0+0x1c>)
 800059c:	61da      	str	r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
  /* Prevent unused argument(s) compilation warning */
  UNUSED(Banks);
#endif /* FLASH_BANK2_END */  
    /* Only bank1 will be erased*/
    SET_BIT(FLASH->CR, FLASH_CR_MER);
 800059e:	4b06      	ldr	r3, [pc, #24]	; (80005b8 <FLASH_MassErase.isra.0+0x20>)
 80005a0:	691a      	ldr	r2, [r3, #16]
 80005a2:	f042 0204 	orr.w	r2, r2, #4
 80005a6:	611a      	str	r2, [r3, #16]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 80005a8:	691a      	ldr	r2, [r3, #16]
 80005aa:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 80005ae:	611a      	str	r2, [r3, #16]
 80005b0:	4770      	bx	lr
 80005b2:	bf00      	nop
 80005b4:	200000d8 	.word	0x200000d8
 80005b8:	40022000 	.word	0x40022000

080005bc <FLASH_PageErase>:
  * @retval None
  */
void FLASH_PageErase(uint32_t PageAddress)
{
  /* Clean the error context */
  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
 80005bc:	2200      	movs	r2, #0
 80005be:	4b06      	ldr	r3, [pc, #24]	; (80005d8 <FLASH_PageErase+0x1c>)
 80005c0:	61da      	str	r2, [r3, #28]
  }
  else
  {
#endif /* FLASH_BANK2_END */
    /* Proceed to erase the page */
    SET_BIT(FLASH->CR, FLASH_CR_PER);
 80005c2:	4b06      	ldr	r3, [pc, #24]	; (80005dc <FLASH_PageErase+0x20>)
 80005c4:	691a      	ldr	r2, [r3, #16]
 80005c6:	f042 0202 	orr.w	r2, r2, #2
 80005ca:	611a      	str	r2, [r3, #16]
    WRITE_REG(FLASH->AR, PageAddress);
 80005cc:	6158      	str	r0, [r3, #20]
    SET_BIT(FLASH->CR, FLASH_CR_STRT);
 80005ce:	691a      	ldr	r2, [r3, #16]
 80005d0:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 80005d4:	611a      	str	r2, [r3, #16]
 80005d6:	4770      	bx	lr
 80005d8:	200000d8 	.word	0x200000d8
 80005dc:	40022000 	.word	0x40022000

080005e0 <HAL_FLASHEx_Erase>:
{
 80005e0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
  __HAL_LOCK(&pFlash);
 80005e4:	4d23      	ldr	r5, [pc, #140]	; (8000674 <HAL_FLASHEx_Erase+0x94>)
{
 80005e6:	4607      	mov	r7, r0
  __HAL_LOCK(&pFlash);
 80005e8:	7e2b      	ldrb	r3, [r5, #24]
{
 80005ea:	4688      	mov	r8, r1
  __HAL_LOCK(&pFlash);
 80005ec:	2b01      	cmp	r3, #1
 80005ee:	d03d      	beq.n	800066c <HAL_FLASHEx_Erase+0x8c>
 80005f0:	2401      	movs	r4, #1
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 80005f2:	6803      	ldr	r3, [r0, #0]
  __HAL_LOCK(&pFlash);
 80005f4:	762c      	strb	r4, [r5, #24]
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 80005f6:	2b02      	cmp	r3, #2
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 80005f8:	f24c 3050 	movw	r0, #50000	; 0xc350
  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
 80005fc:	d113      	bne.n	8000626 <HAL_FLASHEx_Erase+0x46>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 80005fe:	f7ff ff5b 	bl	80004b8 <FLASH_WaitForLastOperation>
 8000602:	b120      	cbz	r0, 800060e <HAL_FLASHEx_Erase+0x2e>
  HAL_StatusTypeDef status = HAL_ERROR;
 8000604:	2001      	movs	r0, #1
  __HAL_UNLOCK(&pFlash);
 8000606:	2300      	movs	r3, #0
 8000608:	762b      	strb	r3, [r5, #24]
  return status;
 800060a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        FLASH_MassErase(FLASH_BANK_1);
 800060e:	f7ff ffc3 	bl	8000598 <FLASH_MassErase.isra.0>
        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 8000612:	f24c 3050 	movw	r0, #50000	; 0xc350
 8000616:	f7ff ff4f 	bl	80004b8 <FLASH_WaitForLastOperation>
        CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
 800061a:	4a17      	ldr	r2, [pc, #92]	; (8000678 <HAL_FLASHEx_Erase+0x98>)
 800061c:	6913      	ldr	r3, [r2, #16]
 800061e:	f023 0304 	bic.w	r3, r3, #4
 8000622:	6113      	str	r3, [r2, #16]
 8000624:	e7ef      	b.n	8000606 <HAL_FLASHEx_Erase+0x26>
      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
 8000626:	f7ff ff47 	bl	80004b8 <FLASH_WaitForLastOperation>
 800062a:	2800      	cmp	r0, #0
 800062c:	d1ea      	bne.n	8000604 <HAL_FLASHEx_Erase+0x24>
        *PageError = 0xFFFFFFFFU;
 800062e:	f04f 33ff 	mov.w	r3, #4294967295
 8000632:	f8c8 3000 	str.w	r3, [r8]
  HAL_StatusTypeDef status = HAL_ERROR;
 8000636:	4620      	mov	r0, r4
        for(address = pEraseInit->PageAddress;
 8000638:	68be      	ldr	r6, [r7, #8]
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 800063a:	4c0f      	ldr	r4, [pc, #60]	; (8000678 <HAL_FLASHEx_Erase+0x98>)
            address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
 800063c:	68fa      	ldr	r2, [r7, #12]
 800063e:	68bb      	ldr	r3, [r7, #8]
 8000640:	eb03 2382 	add.w	r3, r3, r2, lsl #10
        for(address = pEraseInit->PageAddress;
 8000644:	429e      	cmp	r6, r3
 8000646:	d2de      	bcs.n	8000606 <HAL_FLASHEx_Erase+0x26>
          FLASH_PageErase(address);
 8000648:	4630      	mov	r0, r6
 800064a:	f7ff ffb7 	bl	80005bc <FLASH_PageErase>
          status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
 800064e:	f24c 3050 	movw	r0, #50000	; 0xc350
 8000652:	f7ff ff31 	bl	80004b8 <FLASH_WaitForLastOperation>
          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
 8000656:	6923      	ldr	r3, [r4, #16]
 8000658:	f023 0302 	bic.w	r3, r3, #2
 800065c:	6123      	str	r3, [r4, #16]
          if (status != HAL_OK)
 800065e:	b110      	cbz	r0, 8000666 <HAL_FLASHEx_Erase+0x86>
            *PageError = address;
 8000660:	f8c8 6000 	str.w	r6, [r8]
            break;
 8000664:	e7cf      	b.n	8000606 <HAL_FLASHEx_Erase+0x26>
            address += FLASH_PAGE_SIZE)
 8000666:	f506 6680 	add.w	r6, r6, #1024	; 0x400
 800066a:	e7e7      	b.n	800063c <HAL_FLASHEx_Erase+0x5c>
  __HAL_LOCK(&pFlash);
 800066c:	2002      	movs	r0, #2
}
 800066e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8000672:	bf00      	nop
 8000674:	200000d8 	.word	0x200000d8
 8000678:	40022000 	.word	0x40022000

0800067c <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 800067c:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  uint32_t position;
  uint32_t ioposition = 0x00U;
  uint32_t iocurrent = 0x00U;
  uint32_t temp = 0x00U;
  uint32_t config = 0x00U;
 8000680:	2200      	movs	r2, #0
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  for (position = 0U; position < GPIO_NUMBER; position++)
 8000682:	4616      	mov	r6, r2
 8000684:	4b65      	ldr	r3, [pc, #404]	; (800081c <HAL_GPIO_Init+0x1a0>)
    {
      /* Check the Alternate function parameters */
      assert_param(IS_GPIO_AF_INSTANCE(GPIOx));

      /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
      switch (GPIO_Init->Mode)
 8000686:	f8df e1a4 	ldr.w	lr, [pc, #420]	; 800082c <HAL_GPIO_Init+0x1b0>
 800068a:	f8df c1a4 	ldr.w	ip, [pc, #420]	; 8000830 <HAL_GPIO_Init+0x1b4>
    ioposition = (0x01U << position);
 800068e:	f04f 0801 	mov.w	r8, #1
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000692:	680c      	ldr	r4, [r1, #0]
    ioposition = (0x01U << position);
 8000694:	fa08 f806 	lsl.w	r8, r8, r6
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8000698:	ea08 0404 	and.w	r4, r8, r4
    if (iocurrent == ioposition)
 800069c:	45a0      	cmp	r8, r4
 800069e:	d17f      	bne.n	80007a0 <HAL_GPIO_Init+0x124>
      switch (GPIO_Init->Mode)
 80006a0:	684d      	ldr	r5, [r1, #4]
 80006a2:	2d12      	cmp	r5, #18
 80006a4:	f000 80af 	beq.w	8000806 <HAL_GPIO_Init+0x18a>
 80006a8:	f200 8088 	bhi.w	80007bc <HAL_GPIO_Init+0x140>
 80006ac:	2d02      	cmp	r5, #2
 80006ae:	f000 80a7 	beq.w	8000800 <HAL_GPIO_Init+0x184>
 80006b2:	d87c      	bhi.n	80007ae <HAL_GPIO_Init+0x132>
 80006b4:	2d00      	cmp	r5, #0
 80006b6:	f000 808e 	beq.w	80007d6 <HAL_GPIO_Init+0x15a>
 80006ba:	2d01      	cmp	r5, #1
 80006bc:	f000 809e 	beq.w	80007fc <HAL_GPIO_Init+0x180>
       in order to address CRH or CRL register*/
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
      registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2U) : ((position - 8U) << 2U);

      /* Apply the new configuration of the pin to the register */
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80006c0:	f04f 090f 	mov.w	r9, #15
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 80006c4:	2cff      	cmp	r4, #255	; 0xff
 80006c6:	bf93      	iteet	ls
 80006c8:	4682      	movls	sl, r0
 80006ca:	f106 4580 	addhi.w	r5, r6, #1073741824	; 0x40000000
 80006ce:	3d08      	subhi	r5, #8
 80006d0:	f8d0 b000 	ldrls.w	fp, [r0]
 80006d4:	bf92      	itee	ls
 80006d6:	00b5      	lslls	r5, r6, #2
 80006d8:	f8d0 b004 	ldrhi.w	fp, [r0, #4]
 80006dc:	00ad      	lslhi	r5, r5, #2
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80006de:	fa09 f805 	lsl.w	r8, r9, r5
 80006e2:	ea2b 0808 	bic.w	r8, fp, r8
 80006e6:	fa02 f505 	lsl.w	r5, r2, r5
      configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
 80006ea:	bf88      	it	hi
 80006ec:	f100 0a04 	addhi.w	sl, r0, #4
      MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
 80006f0:	ea48 0505 	orr.w	r5, r8, r5
 80006f4:	f8ca 5000 	str.w	r5, [sl]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 80006f8:	f8d1 a004 	ldr.w	sl, [r1, #4]
 80006fc:	f01a 5f80 	tst.w	sl, #268435456	; 0x10000000
 8000700:	d04e      	beq.n	80007a0 <HAL_GPIO_Init+0x124>
      {
        /* Enable AFIO Clock */
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000702:	4d47      	ldr	r5, [pc, #284]	; (8000820 <HAL_GPIO_Init+0x1a4>)
 8000704:	4f46      	ldr	r7, [pc, #280]	; (8000820 <HAL_GPIO_Init+0x1a4>)
 8000706:	69ad      	ldr	r5, [r5, #24]
 8000708:	f026 0803 	bic.w	r8, r6, #3
 800070c:	f045 0501 	orr.w	r5, r5, #1
 8000710:	61bd      	str	r5, [r7, #24]
 8000712:	69bd      	ldr	r5, [r7, #24]
 8000714:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
 8000718:	f005 0501 	and.w	r5, r5, #1
 800071c:	9501      	str	r5, [sp, #4]
 800071e:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
        temp = AFIO->EXTICR[position >> 2U];
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8000722:	f006 0b03 	and.w	fp, r6, #3
        __HAL_RCC_AFIO_CLK_ENABLE();
 8000726:	9d01      	ldr	r5, [sp, #4]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8000728:	ea4f 0b8b 	mov.w	fp, fp, lsl #2
        temp = AFIO->EXTICR[position >> 2U];
 800072c:	f8d8 5008 	ldr.w	r5, [r8, #8]
        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
 8000730:	fa09 f90b 	lsl.w	r9, r9, fp
 8000734:	ea25 0909 	bic.w	r9, r5, r9
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000738:	4d3a      	ldr	r5, [pc, #232]	; (8000824 <HAL_GPIO_Init+0x1a8>)
 800073a:	42a8      	cmp	r0, r5
 800073c:	d068      	beq.n	8000810 <HAL_GPIO_Init+0x194>
 800073e:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000742:	42a8      	cmp	r0, r5
 8000744:	d066      	beq.n	8000814 <HAL_GPIO_Init+0x198>
 8000746:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 800074a:	42a8      	cmp	r0, r5
 800074c:	d064      	beq.n	8000818 <HAL_GPIO_Init+0x19c>
 800074e:	f505 6580 	add.w	r5, r5, #1024	; 0x400
 8000752:	42a8      	cmp	r0, r5
 8000754:	bf0c      	ite	eq
 8000756:	2503      	moveq	r5, #3
 8000758:	2504      	movne	r5, #4
 800075a:	fa05 f50b 	lsl.w	r5, r5, fp
 800075e:	ea45 0509 	orr.w	r5, r5, r9
        AFIO->EXTICR[position >> 2U] = temp;
 8000762:	f8c8 5008 	str.w	r5, [r8, #8]


        /* Configure the interrupt mask */
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
        {
          SET_BIT(EXTI->IMR, iocurrent);
 8000766:	681d      	ldr	r5, [r3, #0]
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 8000768:	f41a 3f80 	tst.w	sl, #65536	; 0x10000
          SET_BIT(EXTI->IMR, iocurrent);
 800076c:	bf14      	ite	ne
 800076e:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->IMR, iocurrent);
 8000770:	43a5      	biceq	r5, r4
 8000772:	601d      	str	r5, [r3, #0]
        }

        /* Configure the event mask */
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
        {
          SET_BIT(EXTI->EMR, iocurrent);
 8000774:	685d      	ldr	r5, [r3, #4]
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 8000776:	f41a 3f00 	tst.w	sl, #131072	; 0x20000
          SET_BIT(EXTI->EMR, iocurrent);
 800077a:	bf14      	ite	ne
 800077c:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->EMR, iocurrent);
 800077e:	43a5      	biceq	r5, r4
 8000780:	605d      	str	r5, [r3, #4]
        }

        /* Enable or disable the rising trigger */
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
        {
          SET_BIT(EXTI->RTSR, iocurrent);
 8000782:	689d      	ldr	r5, [r3, #8]
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 8000784:	f41a 1f80 	tst.w	sl, #1048576	; 0x100000
          SET_BIT(EXTI->RTSR, iocurrent);
 8000788:	bf14      	ite	ne
 800078a:	4325      	orrne	r5, r4
        }
        else
        {
          CLEAR_BIT(EXTI->RTSR, iocurrent);
 800078c:	43a5      	biceq	r5, r4
 800078e:	609d      	str	r5, [r3, #8]
        }

        /* Enable or disable the falling trigger */
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
        {
          SET_BIT(EXTI->FTSR, iocurrent);
 8000790:	68dd      	ldr	r5, [r3, #12]
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 8000792:	f41a 1f00 	tst.w	sl, #2097152	; 0x200000
          SET_BIT(EXTI->FTSR, iocurrent);
 8000796:	bf14      	ite	ne
 8000798:	432c      	orrne	r4, r5
        }
        else
        {
          CLEAR_BIT(EXTI->FTSR, iocurrent);
 800079a:	ea25 0404 	biceq.w	r4, r5, r4
 800079e:	60dc      	str	r4, [r3, #12]
  for (position = 0U; position < GPIO_NUMBER; position++)
 80007a0:	3601      	adds	r6, #1
 80007a2:	2e10      	cmp	r6, #16
 80007a4:	f47f af73 	bne.w	800068e <HAL_GPIO_Init+0x12>
        }
      }
    }
  }
}
 80007a8:	b003      	add	sp, #12
 80007aa:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
      switch (GPIO_Init->Mode)
 80007ae:	2d03      	cmp	r5, #3
 80007b0:	d022      	beq.n	80007f8 <HAL_GPIO_Init+0x17c>
 80007b2:	2d11      	cmp	r5, #17
 80007b4:	d184      	bne.n	80006c0 <HAL_GPIO_Init+0x44>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
 80007b6:	68ca      	ldr	r2, [r1, #12]
 80007b8:	3204      	adds	r2, #4
          break;
 80007ba:	e781      	b.n	80006c0 <HAL_GPIO_Init+0x44>
      switch (GPIO_Init->Mode)
 80007bc:	4f1a      	ldr	r7, [pc, #104]	; (8000828 <HAL_GPIO_Init+0x1ac>)
 80007be:	42bd      	cmp	r5, r7
 80007c0:	d009      	beq.n	80007d6 <HAL_GPIO_Init+0x15a>
 80007c2:	d812      	bhi.n	80007ea <HAL_GPIO_Init+0x16e>
 80007c4:	f8df 906c 	ldr.w	r9, [pc, #108]	; 8000834 <HAL_GPIO_Init+0x1b8>
 80007c8:	454d      	cmp	r5, r9
 80007ca:	d004      	beq.n	80007d6 <HAL_GPIO_Init+0x15a>
 80007cc:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
 80007d0:	454d      	cmp	r5, r9
 80007d2:	f47f af75 	bne.w	80006c0 <HAL_GPIO_Init+0x44>
          if (GPIO_Init->Pull == GPIO_NOPULL)
 80007d6:	688a      	ldr	r2, [r1, #8]
 80007d8:	b1c2      	cbz	r2, 800080c <HAL_GPIO_Init+0x190>
          else if (GPIO_Init->Pull == GPIO_PULLUP)
 80007da:	2a01      	cmp	r2, #1
            GPIOx->BSRR = ioposition;
 80007dc:	bf0c      	ite	eq
 80007de:	f8c0 8010 	streq.w	r8, [r0, #16]
            GPIOx->BRR = ioposition;
 80007e2:	f8c0 8014 	strne.w	r8, [r0, #20]
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
 80007e6:	2208      	movs	r2, #8
 80007e8:	e76a      	b.n	80006c0 <HAL_GPIO_Init+0x44>
      switch (GPIO_Init->Mode)
 80007ea:	4575      	cmp	r5, lr
 80007ec:	d0f3      	beq.n	80007d6 <HAL_GPIO_Init+0x15a>
 80007ee:	4565      	cmp	r5, ip
 80007f0:	d0f1      	beq.n	80007d6 <HAL_GPIO_Init+0x15a>
 80007f2:	f8df 9044 	ldr.w	r9, [pc, #68]	; 8000838 <HAL_GPIO_Init+0x1bc>
 80007f6:	e7eb      	b.n	80007d0 <HAL_GPIO_Init+0x154>
          config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
 80007f8:	2200      	movs	r2, #0
 80007fa:	e761      	b.n	80006c0 <HAL_GPIO_Init+0x44>
          config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
 80007fc:	68ca      	ldr	r2, [r1, #12]
          break;
 80007fe:	e75f      	b.n	80006c0 <HAL_GPIO_Init+0x44>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
 8000800:	68ca      	ldr	r2, [r1, #12]
 8000802:	3208      	adds	r2, #8
          break;
 8000804:	e75c      	b.n	80006c0 <HAL_GPIO_Init+0x44>
          config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
 8000806:	68ca      	ldr	r2, [r1, #12]
 8000808:	320c      	adds	r2, #12
          break;
 800080a:	e759      	b.n	80006c0 <HAL_GPIO_Init+0x44>
            config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
 800080c:	2204      	movs	r2, #4
 800080e:	e757      	b.n	80006c0 <HAL_GPIO_Init+0x44>
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 8000810:	2500      	movs	r5, #0
 8000812:	e7a2      	b.n	800075a <HAL_GPIO_Init+0xde>
 8000814:	2501      	movs	r5, #1
 8000816:	e7a0      	b.n	800075a <HAL_GPIO_Init+0xde>
 8000818:	2502      	movs	r5, #2
 800081a:	e79e      	b.n	800075a <HAL_GPIO_Init+0xde>
 800081c:	40010400 	.word	0x40010400
 8000820:	40021000 	.word	0x40021000
 8000824:	40010800 	.word	0x40010800
 8000828:	10210000 	.word	0x10210000
 800082c:	10310000 	.word	0x10310000
 8000830:	10320000 	.word	0x10320000
 8000834:	10110000 	.word	0x10110000
 8000838:	10220000 	.word	0x10220000

0800083c <HAL_GPIO_WritePin>:
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 800083c:	b10a      	cbz	r2, 8000842 <HAL_GPIO_WritePin+0x6>
  {
    GPIOx->BSRR = GPIO_Pin;
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 800083e:	6101      	str	r1, [r0, #16]
 8000840:	4770      	bx	lr
 8000842:	0409      	lsls	r1, r1, #16
 8000844:	e7fb      	b.n	800083e <HAL_GPIO_WritePin+0x2>

08000846 <HAL_GPIO_TogglePin>:
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  GPIOx->ODR ^= GPIO_Pin;
 8000846:	68c3      	ldr	r3, [r0, #12]
 8000848:	4059      	eors	r1, r3
 800084a:	60c1      	str	r1, [r0, #12]
 800084c:	4770      	bx	lr
	...

08000850 <HAL_RCC_OscConfig>:
  /* Check the parameters */
  assert_param(RCC_OscInitStruct != NULL);
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000850:	6803      	ldr	r3, [r0, #0]
{
 8000852:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8000856:	07db      	lsls	r3, r3, #31
{
 8000858:	4605      	mov	r5, r0
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 800085a:	d410      	bmi.n	800087e <HAL_RCC_OscConfig+0x2e>
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 800085c:	682b      	ldr	r3, [r5, #0]
 800085e:	079f      	lsls	r7, r3, #30
 8000860:	d45e      	bmi.n	8000920 <HAL_RCC_OscConfig+0xd0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8000862:	682b      	ldr	r3, [r5, #0]
 8000864:	0719      	lsls	r1, r3, #28
 8000866:	f100 8095 	bmi.w	8000994 <HAL_RCC_OscConfig+0x144>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/ 
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 800086a:	682b      	ldr	r3, [r5, #0]
 800086c:	075a      	lsls	r2, r3, #29
 800086e:	f100 80bf 	bmi.w	80009f0 <HAL_RCC_OscConfig+0x1a0>

#endif /* RCC_CR_PLL2ON */
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 8000872:	69ea      	ldr	r2, [r5, #28]
 8000874:	2a00      	cmp	r2, #0
 8000876:	f040 812d 	bne.w	8000ad4 <HAL_RCC_OscConfig+0x284>
    {
      return HAL_ERROR;
    }
  }
  
  return HAL_OK;
 800087a:	2000      	movs	r0, #0
 800087c:	e014      	b.n	80008a8 <HAL_RCC_OscConfig+0x58>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 800087e:	4c90      	ldr	r4, [pc, #576]	; (8000ac0 <HAL_RCC_OscConfig+0x270>)
 8000880:	6863      	ldr	r3, [r4, #4]
 8000882:	f003 030c 	and.w	r3, r3, #12
 8000886:	2b04      	cmp	r3, #4
 8000888:	d007      	beq.n	800089a <HAL_RCC_OscConfig+0x4a>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
 800088a:	6863      	ldr	r3, [r4, #4]
 800088c:	f003 030c 	and.w	r3, r3, #12
 8000890:	2b08      	cmp	r3, #8
 8000892:	d10c      	bne.n	80008ae <HAL_RCC_OscConfig+0x5e>
 8000894:	6863      	ldr	r3, [r4, #4]
 8000896:	03de      	lsls	r6, r3, #15
 8000898:	d509      	bpl.n	80008ae <HAL_RCC_OscConfig+0x5e>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800089a:	6823      	ldr	r3, [r4, #0]
 800089c:	039c      	lsls	r4, r3, #14
 800089e:	d5dd      	bpl.n	800085c <HAL_RCC_OscConfig+0xc>
 80008a0:	686b      	ldr	r3, [r5, #4]
 80008a2:	2b00      	cmp	r3, #0
 80008a4:	d1da      	bne.n	800085c <HAL_RCC_OscConfig+0xc>
        return HAL_ERROR;
 80008a6:	2001      	movs	r0, #1
}
 80008a8:	b002      	add	sp, #8
 80008aa:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80008ae:	686b      	ldr	r3, [r5, #4]
 80008b0:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 80008b4:	d110      	bne.n	80008d8 <HAL_RCC_OscConfig+0x88>
 80008b6:	6823      	ldr	r3, [r4, #0]
 80008b8:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 80008bc:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 80008be:	f7ff fcef 	bl	80002a0 <HAL_GetTick>
 80008c2:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 80008c4:	6823      	ldr	r3, [r4, #0]
 80008c6:	0398      	lsls	r0, r3, #14
 80008c8:	d4c8      	bmi.n	800085c <HAL_RCC_OscConfig+0xc>
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 80008ca:	f7ff fce9 	bl	80002a0 <HAL_GetTick>
 80008ce:	1b80      	subs	r0, r0, r6
 80008d0:	2864      	cmp	r0, #100	; 0x64
 80008d2:	d9f7      	bls.n	80008c4 <HAL_RCC_OscConfig+0x74>
            return HAL_TIMEOUT;
 80008d4:	2003      	movs	r0, #3
 80008d6:	e7e7      	b.n	80008a8 <HAL_RCC_OscConfig+0x58>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80008d8:	b99b      	cbnz	r3, 8000902 <HAL_RCC_OscConfig+0xb2>
 80008da:	6823      	ldr	r3, [r4, #0]
 80008dc:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 80008e0:	6023      	str	r3, [r4, #0]
 80008e2:	6823      	ldr	r3, [r4, #0]
 80008e4:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 80008e8:	6023      	str	r3, [r4, #0]
        tickstart = HAL_GetTick();
 80008ea:	f7ff fcd9 	bl	80002a0 <HAL_GetTick>
 80008ee:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 80008f0:	6823      	ldr	r3, [r4, #0]
 80008f2:	0399      	lsls	r1, r3, #14
 80008f4:	d5b2      	bpl.n	800085c <HAL_RCC_OscConfig+0xc>
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 80008f6:	f7ff fcd3 	bl	80002a0 <HAL_GetTick>
 80008fa:	1b80      	subs	r0, r0, r6
 80008fc:	2864      	cmp	r0, #100	; 0x64
 80008fe:	d9f7      	bls.n	80008f0 <HAL_RCC_OscConfig+0xa0>
 8000900:	e7e8      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 8000902:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 8000906:	6823      	ldr	r3, [r4, #0]
 8000908:	d103      	bne.n	8000912 <HAL_RCC_OscConfig+0xc2>
 800090a:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 800090e:	6023      	str	r3, [r4, #0]
 8000910:	e7d1      	b.n	80008b6 <HAL_RCC_OscConfig+0x66>
 8000912:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8000916:	6023      	str	r3, [r4, #0]
 8000918:	6823      	ldr	r3, [r4, #0]
 800091a:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 800091e:	e7cd      	b.n	80008bc <HAL_RCC_OscConfig+0x6c>
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 8000920:	4c67      	ldr	r4, [pc, #412]	; (8000ac0 <HAL_RCC_OscConfig+0x270>)
 8000922:	6863      	ldr	r3, [r4, #4]
 8000924:	f013 0f0c 	tst.w	r3, #12
 8000928:	d007      	beq.n	800093a <HAL_RCC_OscConfig+0xea>
       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
 800092a:	6863      	ldr	r3, [r4, #4]
 800092c:	f003 030c 	and.w	r3, r3, #12
 8000930:	2b08      	cmp	r3, #8
 8000932:	d110      	bne.n	8000956 <HAL_RCC_OscConfig+0x106>
 8000934:	6863      	ldr	r3, [r4, #4]
 8000936:	03da      	lsls	r2, r3, #15
 8000938:	d40d      	bmi.n	8000956 <HAL_RCC_OscConfig+0x106>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 800093a:	6823      	ldr	r3, [r4, #0]
 800093c:	079b      	lsls	r3, r3, #30
 800093e:	d502      	bpl.n	8000946 <HAL_RCC_OscConfig+0xf6>
 8000940:	692b      	ldr	r3, [r5, #16]
 8000942:	2b01      	cmp	r3, #1
 8000944:	d1af      	bne.n	80008a6 <HAL_RCC_OscConfig+0x56>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8000946:	6823      	ldr	r3, [r4, #0]
 8000948:	696a      	ldr	r2, [r5, #20]
 800094a:	f023 03f8 	bic.w	r3, r3, #248	; 0xf8
 800094e:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000952:	6023      	str	r3, [r4, #0]
 8000954:	e785      	b.n	8000862 <HAL_RCC_OscConfig+0x12>
      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 8000956:	692a      	ldr	r2, [r5, #16]
 8000958:	4b5a      	ldr	r3, [pc, #360]	; (8000ac4 <HAL_RCC_OscConfig+0x274>)
 800095a:	b16a      	cbz	r2, 8000978 <HAL_RCC_OscConfig+0x128>
        __HAL_RCC_HSI_ENABLE();
 800095c:	2201      	movs	r2, #1
 800095e:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 8000960:	f7ff fc9e 	bl	80002a0 <HAL_GetTick>
 8000964:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000966:	6823      	ldr	r3, [r4, #0]
 8000968:	079f      	lsls	r7, r3, #30
 800096a:	d4ec      	bmi.n	8000946 <HAL_RCC_OscConfig+0xf6>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 800096c:	f7ff fc98 	bl	80002a0 <HAL_GetTick>
 8000970:	1b80      	subs	r0, r0, r6
 8000972:	2802      	cmp	r0, #2
 8000974:	d9f7      	bls.n	8000966 <HAL_RCC_OscConfig+0x116>
 8000976:	e7ad      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
        __HAL_RCC_HSI_DISABLE();
 8000978:	601a      	str	r2, [r3, #0]
        tickstart = HAL_GetTick();
 800097a:	f7ff fc91 	bl	80002a0 <HAL_GetTick>
 800097e:	4606      	mov	r6, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8000980:	6823      	ldr	r3, [r4, #0]
 8000982:	0798      	lsls	r0, r3, #30
 8000984:	f57f af6d 	bpl.w	8000862 <HAL_RCC_OscConfig+0x12>
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8000988:	f7ff fc8a 	bl	80002a0 <HAL_GetTick>
 800098c:	1b80      	subs	r0, r0, r6
 800098e:	2802      	cmp	r0, #2
 8000990:	d9f6      	bls.n	8000980 <HAL_RCC_OscConfig+0x130>
 8000992:	e79f      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 8000994:	69aa      	ldr	r2, [r5, #24]
 8000996:	4c4a      	ldr	r4, [pc, #296]	; (8000ac0 <HAL_RCC_OscConfig+0x270>)
 8000998:	4b4b      	ldr	r3, [pc, #300]	; (8000ac8 <HAL_RCC_OscConfig+0x278>)
 800099a:	b1da      	cbz	r2, 80009d4 <HAL_RCC_OscConfig+0x184>
      __HAL_RCC_LSI_ENABLE();
 800099c:	2201      	movs	r2, #1
 800099e:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 80009a0:	f7ff fc7e 	bl	80002a0 <HAL_GetTick>
 80009a4:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 80009a6:	6a63      	ldr	r3, [r4, #36]	; 0x24
 80009a8:	079b      	lsls	r3, r3, #30
 80009aa:	d50d      	bpl.n	80009c8 <HAL_RCC_OscConfig+0x178>
  * @param  mdelay: specifies the delay time length, in milliseconds.
  * @retval None
  */
static void RCC_Delay(uint32_t mdelay)
{
  __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
 80009ac:	f44f 52fa 	mov.w	r2, #8000	; 0x1f40
 80009b0:	4b46      	ldr	r3, [pc, #280]	; (8000acc <HAL_RCC_OscConfig+0x27c>)
 80009b2:	681b      	ldr	r3, [r3, #0]
 80009b4:	fbb3 f3f2 	udiv	r3, r3, r2
 80009b8:	9301      	str	r3, [sp, #4]
  \brief   No Operation
  \details No Operation does nothing. This instruction can be used for code alignment purposes.
 */
__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
{
  __ASM volatile ("nop");
 80009ba:	bf00      	nop
  do 
  {
    __NOP();
  } 
  while (Delay --);
 80009bc:	9b01      	ldr	r3, [sp, #4]
 80009be:	1e5a      	subs	r2, r3, #1
 80009c0:	9201      	str	r2, [sp, #4]
 80009c2:	2b00      	cmp	r3, #0
 80009c4:	d1f9      	bne.n	80009ba <HAL_RCC_OscConfig+0x16a>
 80009c6:	e750      	b.n	800086a <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 80009c8:	f7ff fc6a 	bl	80002a0 <HAL_GetTick>
 80009cc:	1b80      	subs	r0, r0, r6
 80009ce:	2802      	cmp	r0, #2
 80009d0:	d9e9      	bls.n	80009a6 <HAL_RCC_OscConfig+0x156>
 80009d2:	e77f      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
      __HAL_RCC_LSI_DISABLE();
 80009d4:	601a      	str	r2, [r3, #0]
      tickstart = HAL_GetTick();
 80009d6:	f7ff fc63 	bl	80002a0 <HAL_GetTick>
 80009da:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 80009dc:	6a63      	ldr	r3, [r4, #36]	; 0x24
 80009de:	079f      	lsls	r7, r3, #30
 80009e0:	f57f af43 	bpl.w	800086a <HAL_RCC_OscConfig+0x1a>
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 80009e4:	f7ff fc5c 	bl	80002a0 <HAL_GetTick>
 80009e8:	1b80      	subs	r0, r0, r6
 80009ea:	2802      	cmp	r0, #2
 80009ec:	d9f6      	bls.n	80009dc <HAL_RCC_OscConfig+0x18c>
 80009ee:	e771      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 80009f0:	4c33      	ldr	r4, [pc, #204]	; (8000ac0 <HAL_RCC_OscConfig+0x270>)
 80009f2:	69e3      	ldr	r3, [r4, #28]
 80009f4:	00d8      	lsls	r0, r3, #3
 80009f6:	d424      	bmi.n	8000a42 <HAL_RCC_OscConfig+0x1f2>
      pwrclkchanged = SET;
 80009f8:	2701      	movs	r7, #1
      __HAL_RCC_PWR_CLK_ENABLE();
 80009fa:	69e3      	ldr	r3, [r4, #28]
 80009fc:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8000a00:	61e3      	str	r3, [r4, #28]
 8000a02:	69e3      	ldr	r3, [r4, #28]
 8000a04:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8000a08:	9300      	str	r3, [sp, #0]
 8000a0a:	9b00      	ldr	r3, [sp, #0]
    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000a0c:	4e30      	ldr	r6, [pc, #192]	; (8000ad0 <HAL_RCC_OscConfig+0x280>)
 8000a0e:	6833      	ldr	r3, [r6, #0]
 8000a10:	05d9      	lsls	r1, r3, #23
 8000a12:	d518      	bpl.n	8000a46 <HAL_RCC_OscConfig+0x1f6>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a14:	68eb      	ldr	r3, [r5, #12]
 8000a16:	2b01      	cmp	r3, #1
 8000a18:	d126      	bne.n	8000a68 <HAL_RCC_OscConfig+0x218>
 8000a1a:	6a23      	ldr	r3, [r4, #32]
 8000a1c:	f043 0301 	orr.w	r3, r3, #1
 8000a20:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000a22:	f7ff fc3d 	bl	80002a0 <HAL_GetTick>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000a26:	f241 3688 	movw	r6, #5000	; 0x1388
      tickstart = HAL_GetTick();
 8000a2a:	4680      	mov	r8, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 8000a2c:	6a23      	ldr	r3, [r4, #32]
 8000a2e:	079b      	lsls	r3, r3, #30
 8000a30:	d53f      	bpl.n	8000ab2 <HAL_RCC_OscConfig+0x262>
    if(pwrclkchanged == SET)
 8000a32:	2f00      	cmp	r7, #0
 8000a34:	f43f af1d 	beq.w	8000872 <HAL_RCC_OscConfig+0x22>
      __HAL_RCC_PWR_CLK_DISABLE();
 8000a38:	69e3      	ldr	r3, [r4, #28]
 8000a3a:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 8000a3e:	61e3      	str	r3, [r4, #28]
 8000a40:	e717      	b.n	8000872 <HAL_RCC_OscConfig+0x22>
    FlagStatus       pwrclkchanged = RESET;
 8000a42:	2700      	movs	r7, #0
 8000a44:	e7e2      	b.n	8000a0c <HAL_RCC_OscConfig+0x1bc>
      SET_BIT(PWR->CR, PWR_CR_DBP);
 8000a46:	6833      	ldr	r3, [r6, #0]
 8000a48:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8000a4c:	6033      	str	r3, [r6, #0]
      tickstart = HAL_GetTick();
 8000a4e:	f7ff fc27 	bl	80002a0 <HAL_GetTick>
 8000a52:	4680      	mov	r8, r0
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8000a54:	6833      	ldr	r3, [r6, #0]
 8000a56:	05da      	lsls	r2, r3, #23
 8000a58:	d4dc      	bmi.n	8000a14 <HAL_RCC_OscConfig+0x1c4>
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8000a5a:	f7ff fc21 	bl	80002a0 <HAL_GetTick>
 8000a5e:	eba0 0008 	sub.w	r0, r0, r8
 8000a62:	2864      	cmp	r0, #100	; 0x64
 8000a64:	d9f6      	bls.n	8000a54 <HAL_RCC_OscConfig+0x204>
 8000a66:	e735      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a68:	b9ab      	cbnz	r3, 8000a96 <HAL_RCC_OscConfig+0x246>
 8000a6a:	6a23      	ldr	r3, [r4, #32]
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000a6c:	f241 3888 	movw	r8, #5000	; 0x1388
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a70:	f023 0301 	bic.w	r3, r3, #1
 8000a74:	6223      	str	r3, [r4, #32]
 8000a76:	6a23      	ldr	r3, [r4, #32]
 8000a78:	f023 0304 	bic.w	r3, r3, #4
 8000a7c:	6223      	str	r3, [r4, #32]
      tickstart = HAL_GetTick();
 8000a7e:	f7ff fc0f 	bl	80002a0 <HAL_GetTick>
 8000a82:	4606      	mov	r6, r0
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 8000a84:	6a23      	ldr	r3, [r4, #32]
 8000a86:	0798      	lsls	r0, r3, #30
 8000a88:	d5d3      	bpl.n	8000a32 <HAL_RCC_OscConfig+0x1e2>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000a8a:	f7ff fc09 	bl	80002a0 <HAL_GetTick>
 8000a8e:	1b80      	subs	r0, r0, r6
 8000a90:	4540      	cmp	r0, r8
 8000a92:	d9f7      	bls.n	8000a84 <HAL_RCC_OscConfig+0x234>
 8000a94:	e71e      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 8000a96:	2b05      	cmp	r3, #5
 8000a98:	6a23      	ldr	r3, [r4, #32]
 8000a9a:	d103      	bne.n	8000aa4 <HAL_RCC_OscConfig+0x254>
 8000a9c:	f043 0304 	orr.w	r3, r3, #4
 8000aa0:	6223      	str	r3, [r4, #32]
 8000aa2:	e7ba      	b.n	8000a1a <HAL_RCC_OscConfig+0x1ca>
 8000aa4:	f023 0301 	bic.w	r3, r3, #1
 8000aa8:	6223      	str	r3, [r4, #32]
 8000aaa:	6a23      	ldr	r3, [r4, #32]
 8000aac:	f023 0304 	bic.w	r3, r3, #4
 8000ab0:	e7b6      	b.n	8000a20 <HAL_RCC_OscConfig+0x1d0>
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 8000ab2:	f7ff fbf5 	bl	80002a0 <HAL_GetTick>
 8000ab6:	eba0 0008 	sub.w	r0, r0, r8
 8000aba:	42b0      	cmp	r0, r6
 8000abc:	d9b6      	bls.n	8000a2c <HAL_RCC_OscConfig+0x1dc>
 8000abe:	e709      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
 8000ac0:	40021000 	.word	0x40021000
 8000ac4:	42420000 	.word	0x42420000
 8000ac8:	42420480 	.word	0x42420480
 8000acc:	2000000c 	.word	0x2000000c
 8000ad0:	40007000 	.word	0x40007000
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000ad4:	4c22      	ldr	r4, [pc, #136]	; (8000b60 <HAL_RCC_OscConfig+0x310>)
 8000ad6:	6863      	ldr	r3, [r4, #4]
 8000ad8:	f003 030c 	and.w	r3, r3, #12
 8000adc:	2b08      	cmp	r3, #8
 8000ade:	f43f aee2 	beq.w	80008a6 <HAL_RCC_OscConfig+0x56>
 8000ae2:	2300      	movs	r3, #0
 8000ae4:	4e1f      	ldr	r6, [pc, #124]	; (8000b64 <HAL_RCC_OscConfig+0x314>)
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000ae6:	2a02      	cmp	r2, #2
        __HAL_RCC_PLL_DISABLE();
 8000ae8:	6033      	str	r3, [r6, #0]
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8000aea:	d12b      	bne.n	8000b44 <HAL_RCC_OscConfig+0x2f4>
        tickstart = HAL_GetTick();
 8000aec:	f7ff fbd8 	bl	80002a0 <HAL_GetTick>
 8000af0:	4607      	mov	r7, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000af2:	6823      	ldr	r3, [r4, #0]
 8000af4:	0199      	lsls	r1, r3, #6
 8000af6:	d41f      	bmi.n	8000b38 <HAL_RCC_OscConfig+0x2e8>
        if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 8000af8:	6a2b      	ldr	r3, [r5, #32]
 8000afa:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 8000afe:	d105      	bne.n	8000b0c <HAL_RCC_OscConfig+0x2bc>
          __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 8000b00:	6ae2      	ldr	r2, [r4, #44]	; 0x2c
 8000b02:	68a9      	ldr	r1, [r5, #8]
 8000b04:	f022 020f 	bic.w	r2, r2, #15
 8000b08:	430a      	orrs	r2, r1
 8000b0a:	62e2      	str	r2, [r4, #44]	; 0x2c
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 8000b0c:	6a69      	ldr	r1, [r5, #36]	; 0x24
 8000b0e:	6862      	ldr	r2, [r4, #4]
 8000b10:	430b      	orrs	r3, r1
 8000b12:	f422 1274 	bic.w	r2, r2, #3997696	; 0x3d0000
 8000b16:	4313      	orrs	r3, r2
 8000b18:	6063      	str	r3, [r4, #4]
        __HAL_RCC_PLL_ENABLE();
 8000b1a:	2301      	movs	r3, #1
 8000b1c:	6033      	str	r3, [r6, #0]
        tickstart = HAL_GetTick();
 8000b1e:	f7ff fbbf 	bl	80002a0 <HAL_GetTick>
 8000b22:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 8000b24:	6823      	ldr	r3, [r4, #0]
 8000b26:	019a      	lsls	r2, r3, #6
 8000b28:	f53f aea7 	bmi.w	800087a <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000b2c:	f7ff fbb8 	bl	80002a0 <HAL_GetTick>
 8000b30:	1b40      	subs	r0, r0, r5
 8000b32:	2802      	cmp	r0, #2
 8000b34:	d9f6      	bls.n	8000b24 <HAL_RCC_OscConfig+0x2d4>
 8000b36:	e6cd      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000b38:	f7ff fbb2 	bl	80002a0 <HAL_GetTick>
 8000b3c:	1bc0      	subs	r0, r0, r7
 8000b3e:	2802      	cmp	r0, #2
 8000b40:	d9d7      	bls.n	8000af2 <HAL_RCC_OscConfig+0x2a2>
 8000b42:	e6c7      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
        tickstart = HAL_GetTick();
 8000b44:	f7ff fbac 	bl	80002a0 <HAL_GetTick>
 8000b48:	4605      	mov	r5, r0
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 8000b4a:	6823      	ldr	r3, [r4, #0]
 8000b4c:	019b      	lsls	r3, r3, #6
 8000b4e:	f57f ae94 	bpl.w	800087a <HAL_RCC_OscConfig+0x2a>
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8000b52:	f7ff fba5 	bl	80002a0 <HAL_GetTick>
 8000b56:	1b40      	subs	r0, r0, r5
 8000b58:	2802      	cmp	r0, #2
 8000b5a:	d9f6      	bls.n	8000b4a <HAL_RCC_OscConfig+0x2fa>
 8000b5c:	e6ba      	b.n	80008d4 <HAL_RCC_OscConfig+0x84>
 8000b5e:	bf00      	nop
 8000b60:	40021000 	.word	0x40021000
 8000b64:	42420060 	.word	0x42420060

08000b68 <HAL_RCC_GetSysClockFreq>:
{
 8000b68:	b530      	push	{r4, r5, lr}
 8000b6a:	b089      	sub	sp, #36	; 0x24
  const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
 8000b6c:	466c      	mov	r4, sp
 8000b6e:	4b1b      	ldr	r3, [pc, #108]	; (8000bdc <HAL_RCC_GetSysClockFreq+0x74>)
 8000b70:	f103 0510 	add.w	r5, r3, #16
 8000b74:	4622      	mov	r2, r4
 8000b76:	6818      	ldr	r0, [r3, #0]
 8000b78:	6859      	ldr	r1, [r3, #4]
 8000b7a:	3308      	adds	r3, #8
 8000b7c:	c203      	stmia	r2!, {r0, r1}
 8000b7e:	42ab      	cmp	r3, r5
 8000b80:	4614      	mov	r4, r2
 8000b82:	d1f7      	bne.n	8000b74 <HAL_RCC_GetSysClockFreq+0xc>
  const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
 8000b84:	4b16      	ldr	r3, [pc, #88]	; (8000be0 <HAL_RCC_GetSysClockFreq+0x78>)
 8000b86:	ac04      	add	r4, sp, #16
 8000b88:	f103 0510 	add.w	r5, r3, #16
 8000b8c:	4622      	mov	r2, r4
 8000b8e:	6818      	ldr	r0, [r3, #0]
 8000b90:	6859      	ldr	r1, [r3, #4]
 8000b92:	3308      	adds	r3, #8
 8000b94:	c203      	stmia	r2!, {r0, r1}
 8000b96:	42ab      	cmp	r3, r5
 8000b98:	4614      	mov	r4, r2
 8000b9a:	d1f7      	bne.n	8000b8c <HAL_RCC_GetSysClockFreq+0x24>
  tmpreg = RCC->CFGR;
 8000b9c:	4911      	ldr	r1, [pc, #68]	; (8000be4 <HAL_RCC_GetSysClockFreq+0x7c>)
 8000b9e:	684b      	ldr	r3, [r1, #4]
  switch (tmpreg & RCC_CFGR_SWS)
 8000ba0:	f003 020c 	and.w	r2, r3, #12
 8000ba4:	2a08      	cmp	r2, #8
 8000ba6:	d117      	bne.n	8000bd8 <HAL_RCC_GetSysClockFreq+0x70>
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000ba8:	f3c3 4283 	ubfx	r2, r3, #18, #4
 8000bac:	a808      	add	r0, sp, #32
 8000bae:	4402      	add	r2, r0
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000bb0:	03db      	lsls	r3, r3, #15
      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
 8000bb2:	f812 2c20 	ldrb.w	r2, [r2, #-32]
      if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 8000bb6:	d50c      	bpl.n	8000bd2 <HAL_RCC_GetSysClockFreq+0x6a>
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
 8000bb8:	6acb      	ldr	r3, [r1, #44]	; 0x2c
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000bba:	480b      	ldr	r0, [pc, #44]	; (8000be8 <HAL_RCC_GetSysClockFreq+0x80>)
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
 8000bbc:	f003 030f 	and.w	r3, r3, #15
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000bc0:	4350      	muls	r0, r2
        prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
 8000bc2:	aa08      	add	r2, sp, #32
 8000bc4:	4413      	add	r3, r2
 8000bc6:	f813 3c10 	ldrb.w	r3, [r3, #-16]
        pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
 8000bca:	fbb0 f0f3 	udiv	r0, r0, r3
}
 8000bce:	b009      	add	sp, #36	; 0x24
 8000bd0:	bd30      	pop	{r4, r5, pc}
        pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
 8000bd2:	4806      	ldr	r0, [pc, #24]	; (8000bec <HAL_RCC_GetSysClockFreq+0x84>)
 8000bd4:	4350      	muls	r0, r2
 8000bd6:	e7fa      	b.n	8000bce <HAL_RCC_GetSysClockFreq+0x66>
      sysclockfreq = HSE_VALUE;
 8000bd8:	4803      	ldr	r0, [pc, #12]	; (8000be8 <HAL_RCC_GetSysClockFreq+0x80>)
  return sysclockfreq;
 8000bda:	e7f8      	b.n	8000bce <HAL_RCC_GetSysClockFreq+0x66>
 8000bdc:	08002e0c 	.word	0x08002e0c
 8000be0:	08002e1c 	.word	0x08002e1c
 8000be4:	40021000 	.word	0x40021000
 8000be8:	007a1200 	.word	0x007a1200
 8000bec:	003d0900 	.word	0x003d0900

08000bf0 <HAL_RCC_ClockConfig>:
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8000bf0:	6802      	ldr	r2, [r0, #0]
{
 8000bf2:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8000bf4:	f012 0f02 	tst.w	r2, #2
{
 8000bf8:	4605      	mov	r5, r0
 8000bfa:	4c3c      	ldr	r4, [pc, #240]	; (8000cec <HAL_RCC_ClockConfig+0xfc>)
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8000bfc:	d011      	beq.n	8000c22 <HAL_RCC_ClockConfig+0x32>
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000bfe:	0757      	lsls	r7, r2, #29
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8000c00:	bf42      	ittt	mi
 8000c02:	6863      	ldrmi	r3, [r4, #4]
 8000c04:	f443 63e0 	orrmi.w	r3, r3, #1792	; 0x700
 8000c08:	6063      	strmi	r3, [r4, #4]
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000c0a:	0716      	lsls	r6, r2, #28
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8000c0c:	bf42      	ittt	mi
 8000c0e:	6863      	ldrmi	r3, [r4, #4]
 8000c10:	f443 5360 	orrmi.w	r3, r3, #14336	; 0x3800
 8000c14:	6063      	strmi	r3, [r4, #4]
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8000c16:	6863      	ldr	r3, [r4, #4]
 8000c18:	6881      	ldr	r1, [r0, #8]
 8000c1a:	f023 03f0 	bic.w	r3, r3, #240	; 0xf0
 8000c1e:	430b      	orrs	r3, r1
 8000c20:	6063      	str	r3, [r4, #4]
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8000c22:	07d0      	lsls	r0, r2, #31
 8000c24:	d41a      	bmi.n	8000c5c <HAL_RCC_ClockConfig+0x6c>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8000c26:	682a      	ldr	r2, [r5, #0]
 8000c28:	0751      	lsls	r1, r2, #29
 8000c2a:	d456      	bmi.n	8000cda <HAL_RCC_ClockConfig+0xea>
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8000c2c:	0713      	lsls	r3, r2, #28
 8000c2e:	d506      	bpl.n	8000c3e <HAL_RCC_ClockConfig+0x4e>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 8000c30:	6863      	ldr	r3, [r4, #4]
 8000c32:	692a      	ldr	r2, [r5, #16]
 8000c34:	f423 5360 	bic.w	r3, r3, #14336	; 0x3800
 8000c38:	ea43 03c2 	orr.w	r3, r3, r2, lsl #3
 8000c3c:	6063      	str	r3, [r4, #4]
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 8000c3e:	f7ff ff93 	bl	8000b68 <HAL_RCC_GetSysClockFreq>
 8000c42:	6863      	ldr	r3, [r4, #4]
 8000c44:	4a2a      	ldr	r2, [pc, #168]	; (8000cf0 <HAL_RCC_ClockConfig+0x100>)
 8000c46:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8000c4a:	5cd3      	ldrb	r3, [r2, r3]
 8000c4c:	40d8      	lsrs	r0, r3
 8000c4e:	4b29      	ldr	r3, [pc, #164]	; (8000cf4 <HAL_RCC_ClockConfig+0x104>)
 8000c50:	6018      	str	r0, [r3, #0]
  HAL_InitTick (TICK_INT_PRIORITY);
 8000c52:	2000      	movs	r0, #0
 8000c54:	f7ff fae8 	bl	8000228 <HAL_InitTick>
  return HAL_OK;
 8000c58:	2000      	movs	r0, #0
 8000c5a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c5c:	6868      	ldr	r0, [r5, #4]
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000c5e:	6823      	ldr	r3, [r4, #0]
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c60:	2801      	cmp	r0, #1
 8000c62:	d102      	bne.n	8000c6a <HAL_RCC_ClockConfig+0x7a>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8000c64:	039a      	lsls	r2, r3, #14
 8000c66:	d405      	bmi.n	8000c74 <HAL_RCC_ClockConfig+0x84>
 8000c68:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000c6a:	2802      	cmp	r0, #2
 8000c6c:	d11b      	bne.n	8000ca6 <HAL_RCC_ClockConfig+0xb6>
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8000c6e:	f013 7f00 	tst.w	r3, #33554432	; 0x2000000
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000c72:	d039      	beq.n	8000ce8 <HAL_RCC_ClockConfig+0xf8>
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000c74:	6863      	ldr	r3, [r4, #4]
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000c76:	f241 3788 	movw	r7, #5000	; 0x1388
    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8000c7a:	f023 0303 	bic.w	r3, r3, #3
 8000c7e:	4318      	orrs	r0, r3
 8000c80:	6060      	str	r0, [r4, #4]
    tickstart = HAL_GetTick();
 8000c82:	f7ff fb0d 	bl	80002a0 <HAL_GetTick>
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c86:	686b      	ldr	r3, [r5, #4]
    tickstart = HAL_GetTick();
 8000c88:	4606      	mov	r6, r0
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8000c8a:	2b01      	cmp	r3, #1
 8000c8c:	d10e      	bne.n	8000cac <HAL_RCC_ClockConfig+0xbc>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
 8000c8e:	6863      	ldr	r3, [r4, #4]
 8000c90:	f003 030c 	and.w	r3, r3, #12
 8000c94:	2b04      	cmp	r3, #4
 8000c96:	d0c6      	beq.n	8000c26 <HAL_RCC_ClockConfig+0x36>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000c98:	f7ff fb02 	bl	80002a0 <HAL_GetTick>
 8000c9c:	1b80      	subs	r0, r0, r6
 8000c9e:	42b8      	cmp	r0, r7
 8000ca0:	d9f5      	bls.n	8000c8e <HAL_RCC_ClockConfig+0x9e>
          return HAL_TIMEOUT;
 8000ca2:	2003      	movs	r0, #3
 8000ca4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8000ca6:	f013 0f02 	tst.w	r3, #2
 8000caa:	e7e2      	b.n	8000c72 <HAL_RCC_ClockConfig+0x82>
    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 8000cac:	2b02      	cmp	r3, #2
 8000cae:	d10f      	bne.n	8000cd0 <HAL_RCC_ClockConfig+0xe0>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 8000cb0:	6863      	ldr	r3, [r4, #4]
 8000cb2:	f003 030c 	and.w	r3, r3, #12
 8000cb6:	2b08      	cmp	r3, #8
 8000cb8:	d0b5      	beq.n	8000c26 <HAL_RCC_ClockConfig+0x36>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000cba:	f7ff faf1 	bl	80002a0 <HAL_GetTick>
 8000cbe:	1b80      	subs	r0, r0, r6
 8000cc0:	42b8      	cmp	r0, r7
 8000cc2:	d9f5      	bls.n	8000cb0 <HAL_RCC_ClockConfig+0xc0>
 8000cc4:	e7ed      	b.n	8000ca2 <HAL_RCC_ClockConfig+0xb2>
        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 8000cc6:	f7ff faeb 	bl	80002a0 <HAL_GetTick>
 8000cca:	1b80      	subs	r0, r0, r6
 8000ccc:	42b8      	cmp	r0, r7
 8000cce:	d8e8      	bhi.n	8000ca2 <HAL_RCC_ClockConfig+0xb2>
      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
 8000cd0:	6863      	ldr	r3, [r4, #4]
 8000cd2:	f013 0f0c 	tst.w	r3, #12
 8000cd6:	d1f6      	bne.n	8000cc6 <HAL_RCC_ClockConfig+0xd6>
 8000cd8:	e7a5      	b.n	8000c26 <HAL_RCC_ClockConfig+0x36>
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8000cda:	6863      	ldr	r3, [r4, #4]
 8000cdc:	68e9      	ldr	r1, [r5, #12]
 8000cde:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8000ce2:	430b      	orrs	r3, r1
 8000ce4:	6063      	str	r3, [r4, #4]
 8000ce6:	e7a1      	b.n	8000c2c <HAL_RCC_ClockConfig+0x3c>
        return HAL_ERROR;
 8000ce8:	2001      	movs	r0, #1
}
 8000cea:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8000cec:	40021000 	.word	0x40021000
 8000cf0:	08002f1a 	.word	0x08002f1a
 8000cf4:	2000000c 	.word	0x2000000c

08000cf8 <HAL_RCC_GetPCLK1Freq>:
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 8000cf8:	4b04      	ldr	r3, [pc, #16]	; (8000d0c <HAL_RCC_GetPCLK1Freq+0x14>)
 8000cfa:	4a05      	ldr	r2, [pc, #20]	; (8000d10 <HAL_RCC_GetPCLK1Freq+0x18>)
 8000cfc:	685b      	ldr	r3, [r3, #4]
 8000cfe:	f3c3 2302 	ubfx	r3, r3, #8, #3
 8000d02:	5cd3      	ldrb	r3, [r2, r3]
 8000d04:	4a03      	ldr	r2, [pc, #12]	; (8000d14 <HAL_RCC_GetPCLK1Freq+0x1c>)
 8000d06:	6810      	ldr	r0, [r2, #0]
}    
 8000d08:	40d8      	lsrs	r0, r3
 8000d0a:	4770      	bx	lr
 8000d0c:	40021000 	.word	0x40021000
 8000d10:	08002f2a 	.word	0x08002f2a
 8000d14:	2000000c 	.word	0x2000000c

08000d18 <HAL_RCC_GetPCLK2Freq>:
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 8000d18:	4b04      	ldr	r3, [pc, #16]	; (8000d2c <HAL_RCC_GetPCLK2Freq+0x14>)
 8000d1a:	4a05      	ldr	r2, [pc, #20]	; (8000d30 <HAL_RCC_GetPCLK2Freq+0x18>)
 8000d1c:	685b      	ldr	r3, [r3, #4]
 8000d1e:	f3c3 23c2 	ubfx	r3, r3, #11, #3
 8000d22:	5cd3      	ldrb	r3, [r2, r3]
 8000d24:	4a03      	ldr	r2, [pc, #12]	; (8000d34 <HAL_RCC_GetPCLK2Freq+0x1c>)
 8000d26:	6810      	ldr	r0, [r2, #0]
} 
 8000d28:	40d8      	lsrs	r0, r3
 8000d2a:	4770      	bx	lr
 8000d2c:	40021000 	.word	0x40021000
 8000d30:	08002f2a 	.word	0x08002f2a
 8000d34:	2000000c 	.word	0x2000000c

08000d38 <HAL_TIM_Base_Start_IT>:
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

   /* Enable the TIM Update interrupt */
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000d38:	6803      	ldr	r3, [r0, #0]
   /* Enable the Peripheral */
  __HAL_TIM_ENABLE(htim);

  /* Return function status */
  return HAL_OK;
}
 8000d3a:	2000      	movs	r0, #0
   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 8000d3c:	68da      	ldr	r2, [r3, #12]
 8000d3e:	f042 0201 	orr.w	r2, r2, #1
 8000d42:	60da      	str	r2, [r3, #12]
  __HAL_TIM_ENABLE(htim);
 8000d44:	681a      	ldr	r2, [r3, #0]
 8000d46:	f042 0201 	orr.w	r2, r2, #1
 8000d4a:	601a      	str	r2, [r3, #0]
}
 8000d4c:	4770      	bx	lr

08000d4e <HAL_TIM_OC_DelayElapsedCallback>:
 8000d4e:	4770      	bx	lr

08000d50 <HAL_TIM_IC_CaptureCallback>:
 8000d50:	4770      	bx	lr

08000d52 <HAL_TIM_PWM_PulseFinishedCallback>:
 8000d52:	4770      	bx	lr

08000d54 <HAL_TIM_TriggerCallback>:
 8000d54:	4770      	bx	lr

08000d56 <HAL_TIM_IRQHandler>:
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
  /* Capture compare 1 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000d56:	6803      	ldr	r3, [r0, #0]
{
 8000d58:	b510      	push	{r4, lr}
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000d5a:	691a      	ldr	r2, [r3, #16]
{
 8000d5c:	4604      	mov	r4, r0
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
 8000d5e:	0791      	lsls	r1, r2, #30
 8000d60:	d50e      	bpl.n	8000d80 <HAL_TIM_IRQHandler+0x2a>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
 8000d62:	68da      	ldr	r2, [r3, #12]
 8000d64:	0792      	lsls	r2, r2, #30
 8000d66:	d50b      	bpl.n	8000d80 <HAL_TIM_IRQHandler+0x2a>
    {
      {
        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
 8000d68:	f06f 0202 	mvn.w	r2, #2
 8000d6c:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000d6e:	2201      	movs	r2, #1

        /* Input capture event */
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000d70:	699b      	ldr	r3, [r3, #24]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 8000d72:	7702      	strb	r2, [r0, #28]
        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 8000d74:	079b      	lsls	r3, r3, #30
 8000d76:	d077      	beq.n	8000e68 <HAL_TIM_IRQHandler+0x112>
        {
          HAL_TIM_IC_CaptureCallback(htim);
 8000d78:	f7ff ffea 	bl	8000d50 <HAL_TIM_IC_CaptureCallback>
        else
        {
          HAL_TIM_OC_DelayElapsedCallback(htim);
          HAL_TIM_PWM_PulseFinishedCallback(htim);
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000d7c:	2300      	movs	r3, #0
 8000d7e:	7723      	strb	r3, [r4, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
 8000d80:	6823      	ldr	r3, [r4, #0]
 8000d82:	691a      	ldr	r2, [r3, #16]
 8000d84:	0750      	lsls	r0, r2, #29
 8000d86:	d510      	bpl.n	8000daa <HAL_TIM_IRQHandler+0x54>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
 8000d88:	68da      	ldr	r2, [r3, #12]
 8000d8a:	0751      	lsls	r1, r2, #29
 8000d8c:	d50d      	bpl.n	8000daa <HAL_TIM_IRQHandler+0x54>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
 8000d8e:	f06f 0204 	mvn.w	r2, #4
 8000d92:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000d94:	2202      	movs	r2, #2
      /* Input capture event */
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000d96:	699b      	ldr	r3, [r3, #24]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 8000d98:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000d9a:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000d9e:	4620      	mov	r0, r4
      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 8000da0:	d068      	beq.n	8000e74 <HAL_TIM_IRQHandler+0x11e>
        HAL_TIM_IC_CaptureCallback(htim);
 8000da2:	f7ff ffd5 	bl	8000d50 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000da6:	2300      	movs	r3, #0
 8000da8:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 3 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
 8000daa:	6823      	ldr	r3, [r4, #0]
 8000dac:	691a      	ldr	r2, [r3, #16]
 8000dae:	0712      	lsls	r2, r2, #28
 8000db0:	d50f      	bpl.n	8000dd2 <HAL_TIM_IRQHandler+0x7c>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
 8000db2:	68da      	ldr	r2, [r3, #12]
 8000db4:	0710      	lsls	r0, r2, #28
 8000db6:	d50c      	bpl.n	8000dd2 <HAL_TIM_IRQHandler+0x7c>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
 8000db8:	f06f 0208 	mvn.w	r2, #8
 8000dbc:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000dbe:	2204      	movs	r2, #4
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000dc0:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 8000dc2:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000dc4:	0799      	lsls	r1, r3, #30
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000dc6:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 8000dc8:	d05a      	beq.n	8000e80 <HAL_TIM_IRQHandler+0x12a>
        HAL_TIM_IC_CaptureCallback(htim);
 8000dca:	f7ff ffc1 	bl	8000d50 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000dce:	2300      	movs	r3, #0
 8000dd0:	7723      	strb	r3, [r4, #28]
    }
  }
  /* Capture compare 4 event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
 8000dd2:	6823      	ldr	r3, [r4, #0]
 8000dd4:	691a      	ldr	r2, [r3, #16]
 8000dd6:	06d2      	lsls	r2, r2, #27
 8000dd8:	d510      	bpl.n	8000dfc <HAL_TIM_IRQHandler+0xa6>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
 8000dda:	68da      	ldr	r2, [r3, #12]
 8000ddc:	06d0      	lsls	r0, r2, #27
 8000dde:	d50d      	bpl.n	8000dfc <HAL_TIM_IRQHandler+0xa6>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
 8000de0:	f06f 0210 	mvn.w	r2, #16
 8000de4:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000de6:	2208      	movs	r2, #8
      /* Input capture event */
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000de8:	69db      	ldr	r3, [r3, #28]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 8000dea:	7722      	strb	r2, [r4, #28]
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000dec:	f413 7f40 	tst.w	r3, #768	; 0x300
      {
        HAL_TIM_IC_CaptureCallback(htim);
 8000df0:	4620      	mov	r0, r4
      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 8000df2:	d04b      	beq.n	8000e8c <HAL_TIM_IRQHandler+0x136>
        HAL_TIM_IC_CaptureCallback(htim);
 8000df4:	f7ff ffac 	bl	8000d50 <HAL_TIM_IC_CaptureCallback>
      else
      {
        HAL_TIM_OC_DelayElapsedCallback(htim);
        HAL_TIM_PWM_PulseFinishedCallback(htim);
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 8000df8:	2300      	movs	r3, #0
 8000dfa:	7723      	strb	r3, [r4, #28]
    }
  }
  /* TIM Update event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
 8000dfc:	6823      	ldr	r3, [r4, #0]
 8000dfe:	691a      	ldr	r2, [r3, #16]
 8000e00:	07d1      	lsls	r1, r2, #31
 8000e02:	d508      	bpl.n	8000e16 <HAL_TIM_IRQHandler+0xc0>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
 8000e04:	68da      	ldr	r2, [r3, #12]
 8000e06:	07d2      	lsls	r2, r2, #31
 8000e08:	d505      	bpl.n	8000e16 <HAL_TIM_IRQHandler+0xc0>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000e0a:	f06f 0201 	mvn.w	r2, #1
      HAL_TIM_PeriodElapsedCallback(htim);
 8000e0e:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
 8000e10:	611a      	str	r2, [r3, #16]
      HAL_TIM_PeriodElapsedCallback(htim);
 8000e12:	f000 fbf1 	bl	80015f8 <HAL_TIM_PeriodElapsedCallback>
    }
  }
  /* TIM Break input event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
 8000e16:	6823      	ldr	r3, [r4, #0]
 8000e18:	691a      	ldr	r2, [r3, #16]
 8000e1a:	0610      	lsls	r0, r2, #24
 8000e1c:	d508      	bpl.n	8000e30 <HAL_TIM_IRQHandler+0xda>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
 8000e1e:	68da      	ldr	r2, [r3, #12]
 8000e20:	0611      	lsls	r1, r2, #24
 8000e22:	d505      	bpl.n	8000e30 <HAL_TIM_IRQHandler+0xda>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000e24:	f06f 0280 	mvn.w	r2, #128	; 0x80
      HAL_TIMEx_BreakCallback(htim);
 8000e28:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
 8000e2a:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_BreakCallback(htim);
 8000e2c:	f000 f8c5 	bl	8000fba <HAL_TIMEx_BreakCallback>
    }
  }
  /* TIM Trigger detection event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
 8000e30:	6823      	ldr	r3, [r4, #0]
 8000e32:	691a      	ldr	r2, [r3, #16]
 8000e34:	0652      	lsls	r2, r2, #25
 8000e36:	d508      	bpl.n	8000e4a <HAL_TIM_IRQHandler+0xf4>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
 8000e38:	68da      	ldr	r2, [r3, #12]
 8000e3a:	0650      	lsls	r0, r2, #25
 8000e3c:	d505      	bpl.n	8000e4a <HAL_TIM_IRQHandler+0xf4>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000e3e:	f06f 0240 	mvn.w	r2, #64	; 0x40
      HAL_TIM_TriggerCallback(htim);
 8000e42:	4620      	mov	r0, r4
      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
 8000e44:	611a      	str	r2, [r3, #16]
      HAL_TIM_TriggerCallback(htim);
 8000e46:	f7ff ff85 	bl	8000d54 <HAL_TIM_TriggerCallback>
    }
  }
  /* TIM commutation event */
  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
 8000e4a:	6823      	ldr	r3, [r4, #0]
 8000e4c:	691a      	ldr	r2, [r3, #16]
 8000e4e:	0691      	lsls	r1, r2, #26
 8000e50:	d522      	bpl.n	8000e98 <HAL_TIM_IRQHandler+0x142>
  {
    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
 8000e52:	68da      	ldr	r2, [r3, #12]
 8000e54:	0692      	lsls	r2, r2, #26
 8000e56:	d51f      	bpl.n	8000e98 <HAL_TIM_IRQHandler+0x142>
    {
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000e58:	f06f 0220 	mvn.w	r2, #32
      HAL_TIMEx_CommutationCallback(htim);
 8000e5c:	4620      	mov	r0, r4
    }
  }
}
 8000e5e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
 8000e62:	611a      	str	r2, [r3, #16]
      HAL_TIMEx_CommutationCallback(htim);
 8000e64:	f000 b8a8 	b.w	8000fb8 <HAL_TIMEx_CommutationCallback>
          HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e68:	f7ff ff71 	bl	8000d4e <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e6c:	4620      	mov	r0, r4
 8000e6e:	f7ff ff70 	bl	8000d52 <HAL_TIM_PWM_PulseFinishedCallback>
 8000e72:	e783      	b.n	8000d7c <HAL_TIM_IRQHandler+0x26>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e74:	f7ff ff6b 	bl	8000d4e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e78:	4620      	mov	r0, r4
 8000e7a:	f7ff ff6a 	bl	8000d52 <HAL_TIM_PWM_PulseFinishedCallback>
 8000e7e:	e792      	b.n	8000da6 <HAL_TIM_IRQHandler+0x50>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e80:	f7ff ff65 	bl	8000d4e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e84:	4620      	mov	r0, r4
 8000e86:	f7ff ff64 	bl	8000d52 <HAL_TIM_PWM_PulseFinishedCallback>
 8000e8a:	e7a0      	b.n	8000dce <HAL_TIM_IRQHandler+0x78>
        HAL_TIM_OC_DelayElapsedCallback(htim);
 8000e8c:	f7ff ff5f 	bl	8000d4e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 8000e90:	4620      	mov	r0, r4
 8000e92:	f7ff ff5e 	bl	8000d52 <HAL_TIM_PWM_PulseFinishedCallback>
 8000e96:	e7af      	b.n	8000df8 <HAL_TIM_IRQHandler+0xa2>
 8000e98:	bd10      	pop	{r4, pc}
	...

08000e9c <TIM_Base_SetConfig>:
{
  uint32_t tmpcr1 = 0U;
  tmpcr1 = TIMx->CR1;

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000e9c:	4a26      	ldr	r2, [pc, #152]	; (8000f38 <TIM_Base_SetConfig+0x9c>)
  tmpcr1 = TIMx->CR1;
 8000e9e:	6803      	ldr	r3, [r0, #0]
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 8000ea0:	4290      	cmp	r0, r2
 8000ea2:	d00a      	beq.n	8000eba <TIM_Base_SetConfig+0x1e>
 8000ea4:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000ea8:	d007      	beq.n	8000eba <TIM_Base_SetConfig+0x1e>
 8000eaa:	f5a2 3294 	sub.w	r2, r2, #75776	; 0x12800
 8000eae:	4290      	cmp	r0, r2
 8000eb0:	d003      	beq.n	8000eba <TIM_Base_SetConfig+0x1e>
 8000eb2:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000eb6:	4290      	cmp	r0, r2
 8000eb8:	d111      	bne.n	8000ede <TIM_Base_SetConfig+0x42>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
    tmpcr1 |= Structure->CounterMode;
 8000eba:	684a      	ldr	r2, [r1, #4]
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 8000ebc:	f023 0370 	bic.w	r3, r3, #112	; 0x70
    tmpcr1 |= Structure->CounterMode;
 8000ec0:	4313      	orrs	r3, r2
  }

  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 8000ec2:	4a1d      	ldr	r2, [pc, #116]	; (8000f38 <TIM_Base_SetConfig+0x9c>)
 8000ec4:	4290      	cmp	r0, r2
 8000ec6:	d015      	beq.n	8000ef4 <TIM_Base_SetConfig+0x58>
 8000ec8:	f1b0 4f80 	cmp.w	r0, #1073741824	; 0x40000000
 8000ecc:	d012      	beq.n	8000ef4 <TIM_Base_SetConfig+0x58>
 8000ece:	f5a2 3294 	sub.w	r2, r2, #75776	; 0x12800
 8000ed2:	4290      	cmp	r0, r2
 8000ed4:	d00e      	beq.n	8000ef4 <TIM_Base_SetConfig+0x58>
 8000ed6:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000eda:	4290      	cmp	r0, r2
 8000edc:	d00a      	beq.n	8000ef4 <TIM_Base_SetConfig+0x58>
 8000ede:	4a17      	ldr	r2, [pc, #92]	; (8000f3c <TIM_Base_SetConfig+0xa0>)
 8000ee0:	4290      	cmp	r0, r2
 8000ee2:	d007      	beq.n	8000ef4 <TIM_Base_SetConfig+0x58>
 8000ee4:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000ee8:	4290      	cmp	r0, r2
 8000eea:	d003      	beq.n	8000ef4 <TIM_Base_SetConfig+0x58>
 8000eec:	f502 6280 	add.w	r2, r2, #1024	; 0x400
 8000ef0:	4290      	cmp	r0, r2
 8000ef2:	d103      	bne.n	8000efc <TIM_Base_SetConfig+0x60>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000ef4:	68ca      	ldr	r2, [r1, #12]
    tmpcr1 &= ~TIM_CR1_CKD;
 8000ef6:	f423 7340 	bic.w	r3, r3, #768	; 0x300
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 8000efa:	4313      	orrs	r3, r2
  }

  /* Set the auto-reload preload */
  tmpcr1 &= ~TIM_CR1_ARPE;
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000efc:	694a      	ldr	r2, [r1, #20]
  tmpcr1 &= ~TIM_CR1_ARPE;
 8000efe:	f023 0380 	bic.w	r3, r3, #128	; 0x80
  tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
 8000f02:	4313      	orrs	r3, r2

  TIMx->CR1 = tmpcr1;
 8000f04:	6003      	str	r3, [r0, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 8000f06:	688b      	ldr	r3, [r1, #8]
 8000f08:	62c3      	str	r3, [r0, #44]	; 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = (uint32_t)Structure->Prescaler;
 8000f0a:	680b      	ldr	r3, [r1, #0]
 8000f0c:	6283      	str	r3, [r0, #40]	; 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 8000f0e:	4b0a      	ldr	r3, [pc, #40]	; (8000f38 <TIM_Base_SetConfig+0x9c>)
 8000f10:	4298      	cmp	r0, r3
 8000f12:	d00b      	beq.n	8000f2c <TIM_Base_SetConfig+0x90>
 8000f14:	f503 53a0 	add.w	r3, r3, #5120	; 0x1400
 8000f18:	4298      	cmp	r0, r3
 8000f1a:	d007      	beq.n	8000f2c <TIM_Base_SetConfig+0x90>
 8000f1c:	f503 6380 	add.w	r3, r3, #1024	; 0x400
 8000f20:	4298      	cmp	r0, r3
 8000f22:	d003      	beq.n	8000f2c <TIM_Base_SetConfig+0x90>
 8000f24:	f503 6380 	add.w	r3, r3, #1024	; 0x400
 8000f28:	4298      	cmp	r0, r3
 8000f2a:	d101      	bne.n	8000f30 <TIM_Base_SetConfig+0x94>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 8000f2c:	690b      	ldr	r3, [r1, #16]
 8000f2e:	6303      	str	r3, [r0, #48]	; 0x30
  }

  /* Generate an update event to reload the Prescaler 
     and the repetition counter(only for TIM1 and TIM8) value immediatly */
  TIMx->EGR = TIM_EGR_UG;
 8000f30:	2301      	movs	r3, #1
 8000f32:	6143      	str	r3, [r0, #20]
 8000f34:	4770      	bx	lr
 8000f36:	bf00      	nop
 8000f38:	40012c00 	.word	0x40012c00
 8000f3c:	40014000 	.word	0x40014000

08000f40 <HAL_TIM_Base_Init>:
{
 8000f40:	b510      	push	{r4, lr}
  if(htim == NULL)
 8000f42:	4604      	mov	r4, r0
 8000f44:	b1a0      	cbz	r0, 8000f70 <HAL_TIM_Base_Init+0x30>
  if(htim->State == HAL_TIM_STATE_RESET)
 8000f46:	f890 303d 	ldrb.w	r3, [r0, #61]	; 0x3d
 8000f4a:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 8000f4e:	b91b      	cbnz	r3, 8000f58 <HAL_TIM_Base_Init+0x18>
    htim->Lock = HAL_UNLOCKED;
 8000f50:	f880 203c 	strb.w	r2, [r0, #60]	; 0x3c
    HAL_TIM_Base_MspInit(htim);
 8000f54:	f000 fe12 	bl	8001b7c <HAL_TIM_Base_MspInit>
  htim->State= HAL_TIM_STATE_BUSY;
 8000f58:	2302      	movs	r3, #2
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8000f5a:	6820      	ldr	r0, [r4, #0]
  htim->State= HAL_TIM_STATE_BUSY;
 8000f5c:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 8000f60:	1d21      	adds	r1, r4, #4
 8000f62:	f7ff ff9b 	bl	8000e9c <TIM_Base_SetConfig>
  htim->State= HAL_TIM_STATE_READY;
 8000f66:	2301      	movs	r3, #1
  return HAL_OK;
 8000f68:	2000      	movs	r0, #0
  htim->State= HAL_TIM_STATE_READY;
 8000f6a:	f884 303d 	strb.w	r3, [r4, #61]	; 0x3d
  return HAL_OK;
 8000f6e:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 8000f70:	2001      	movs	r0, #1
}
 8000f72:	bd10      	pop	{r4, pc}

08000f74 <HAL_TIMEx_MasterConfigSynchronization>:
  /* Check the parameters */
  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));

  __HAL_LOCK(htim);
 8000f74:	f890 303c 	ldrb.w	r3, [r0, #60]	; 0x3c
{
 8000f78:	b510      	push	{r4, lr}
  __HAL_LOCK(htim);
 8000f7a:	2b01      	cmp	r3, #1
 8000f7c:	f04f 0302 	mov.w	r3, #2
 8000f80:	d018      	beq.n	8000fb4 <HAL_TIMEx_MasterConfigSynchronization+0x40>

  htim->State = HAL_TIM_STATE_BUSY;
 8000f82:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  /* Reset the MMS Bits */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000f86:	6803      	ldr	r3, [r0, #0]
  /* Select the TRGO source */
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8000f88:	680c      	ldr	r4, [r1, #0]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000f8a:	685a      	ldr	r2, [r3, #4]

  /* Reset the MSM Bit */
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  /* Set or Reset the MSM Bit */
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8000f8c:	6849      	ldr	r1, [r1, #4]
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
 8000f8e:	f022 0270 	bic.w	r2, r2, #112	; 0x70
 8000f92:	605a      	str	r2, [r3, #4]
  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
 8000f94:	685a      	ldr	r2, [r3, #4]
 8000f96:	4322      	orrs	r2, r4
 8000f98:	605a      	str	r2, [r3, #4]
  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
 8000f9a:	689a      	ldr	r2, [r3, #8]
 8000f9c:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8000fa0:	609a      	str	r2, [r3, #8]
  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
 8000fa2:	689a      	ldr	r2, [r3, #8]
 8000fa4:	430a      	orrs	r2, r1
 8000fa6:	609a      	str	r2, [r3, #8]

  htim->State = HAL_TIM_STATE_READY;
 8000fa8:	2301      	movs	r3, #1
 8000faa:	f880 303d 	strb.w	r3, [r0, #61]	; 0x3d

  __HAL_UNLOCK(htim);
 8000fae:	2300      	movs	r3, #0
 8000fb0:	f880 303c 	strb.w	r3, [r0, #60]	; 0x3c
  __HAL_LOCK(htim);
 8000fb4:	4618      	mov	r0, r3

  return HAL_OK;
}
 8000fb6:	bd10      	pop	{r4, pc}

08000fb8 <HAL_TIMEx_CommutationCallback>:
 8000fb8:	4770      	bx	lr

08000fba <HAL_TIMEx_BreakCallback>:
  * @brief  Hall Break detection callback in non blocking mode
  * @param  htim : TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 8000fba:	4770      	bx	lr

08000fbc <UART_EndRxTransfer>:
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
 8000fbc:	6803      	ldr	r3, [r0, #0]
 8000fbe:	68da      	ldr	r2, [r3, #12]
 8000fc0:	f422 7290 	bic.w	r2, r2, #288	; 0x120
 8000fc4:	60da      	str	r2, [r3, #12]
  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8000fc6:	695a      	ldr	r2, [r3, #20]
 8000fc8:	f022 0201 	bic.w	r2, r2, #1
 8000fcc:	615a      	str	r2, [r3, #20]

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 8000fce:	2320      	movs	r3, #32
 8000fd0:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
 8000fd4:	4770      	bx	lr
	...

08000fd8 <UART_SetConfig>:
  * @param  huart: pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 8000fd8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8000fdc:	4681      	mov	r9, r0
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according 
   * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8000fde:	6805      	ldr	r5, [r0, #0]
 8000fe0:	68c2      	ldr	r2, [r0, #12]
 8000fe2:	692b      	ldr	r3, [r5, #16]
     Set PCE and PS bits according to huart->Init.Parity value
     Set TE and RE bits according to huart->Init.Mode value
     Set OVER8 bit according to huart->Init.OverSampling value */

#if defined(USART_CR1_OVER8)
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 8000fe4:	69c1      	ldr	r1, [r0, #28]
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 8000fe6:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8000fea:	4313      	orrs	r3, r2
 8000fec:	612b      	str	r3, [r5, #16]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 8000fee:	6883      	ldr	r3, [r0, #8]
 8000ff0:	6900      	ldr	r0, [r0, #16]
  MODIFY_REG(huart->Instance->CR1, 
 8000ff2:	68ea      	ldr	r2, [r5, #12]
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 8000ff4:	4303      	orrs	r3, r0
 8000ff6:	f8d9 0014 	ldr.w	r0, [r9, #20]
  MODIFY_REG(huart->Instance->CR1, 
 8000ffa:	f422 4216 	bic.w	r2, r2, #38400	; 0x9600
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 8000ffe:	4303      	orrs	r3, r0
  MODIFY_REG(huart->Instance->CR1, 
 8001000:	f022 020c 	bic.w	r2, r2, #12
  tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 8001004:	430b      	orrs	r3, r1
  MODIFY_REG(huart->Instance->CR1, 
 8001006:	4313      	orrs	r3, r2
 8001008:	60eb      	str	r3, [r5, #12]
             tmpreg);
#endif /* USART_CR1_OVER8 */

  /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 800100a:	696b      	ldr	r3, [r5, #20]
 800100c:	f8d9 2018 	ldr.w	r2, [r9, #24]
 8001010:	f423 7340 	bic.w	r3, r3, #768	; 0x300
 8001014:	4313      	orrs	r3, r2

#if defined(USART_CR1_OVER8)
  /* Check the Over Sampling */
  if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
 8001016:	f5b1 4f00 	cmp.w	r1, #32768	; 0x8000
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 800101a:	616b      	str	r3, [r5, #20]
 800101c:	4b7e      	ldr	r3, [pc, #504]	; (8001218 <UART_SetConfig+0x240>)
  if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
 800101e:	d17f      	bne.n	8001120 <UART_SetConfig+0x148>
  {
    /*-------------------------- USART BRR Configuration ---------------------*/
    if(huart->Instance == USART1)
 8001020:	429d      	cmp	r5, r3
 8001022:	f04f 0419 	mov.w	r4, #25
 8001026:	d147      	bne.n	80010b8 <UART_SetConfig+0xe0>
    {
      huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 8001028:	f7ff fe76 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 800102c:	fb04 f300 	mul.w	r3, r4, r0
 8001030:	f8d9 7004 	ldr.w	r7, [r9, #4]
 8001034:	f04f 0864 	mov.w	r8, #100	; 0x64
 8001038:	007f      	lsls	r7, r7, #1
 800103a:	fbb3 f3f7 	udiv	r3, r3, r7
 800103e:	fbb3 f3f8 	udiv	r3, r3, r8
 8001042:	011f      	lsls	r7, r3, #4
 8001044:	f7ff fe68 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 8001048:	4360      	muls	r0, r4
 800104a:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800104e:	005b      	lsls	r3, r3, #1
 8001050:	fbb0 f6f3 	udiv	r6, r0, r3
 8001054:	f7ff fe60 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 8001058:	4360      	muls	r0, r4
 800105a:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800105e:	005b      	lsls	r3, r3, #1
 8001060:	fbb0 f3f3 	udiv	r3, r0, r3
 8001064:	fbb3 f3f8 	udiv	r3, r3, r8
 8001068:	fb08 6313 	mls	r3, r8, r3, r6
 800106c:	00db      	lsls	r3, r3, #3
 800106e:	3332      	adds	r3, #50	; 0x32
 8001070:	fbb3 f3f8 	udiv	r3, r3, r8
 8001074:	005b      	lsls	r3, r3, #1
 8001076:	f403 76f8 	and.w	r6, r3, #496	; 0x1f0
 800107a:	f7ff fe4d 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 800107e:	4360      	muls	r0, r4
 8001080:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8001084:	0052      	lsls	r2, r2, #1
 8001086:	fbb0 faf2 	udiv	sl, r0, r2
 800108a:	f7ff fe45 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
    }
    else
    {
      huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 800108e:	4360      	muls	r0, r4
 8001090:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001094:	005b      	lsls	r3, r3, #1
 8001096:	fbb0 f3f3 	udiv	r3, r0, r3
 800109a:	fbb3 f3f8 	udiv	r3, r3, r8
 800109e:	fb08 a313 	mls	r3, r8, r3, sl
 80010a2:	00db      	lsls	r3, r3, #3
 80010a4:	3332      	adds	r3, #50	; 0x32
 80010a6:	fbb3 f3f8 	udiv	r3, r3, r8
 80010aa:	f003 0307 	and.w	r3, r3, #7
 80010ae:	443b      	add	r3, r7
    {
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
    }
    else
    {
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 80010b0:	4433      	add	r3, r6
 80010b2:	60ab      	str	r3, [r5, #8]
 80010b4:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
      huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 80010b8:	f7ff fe1e 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 80010bc:	fb04 f300 	mul.w	r3, r4, r0
 80010c0:	f8d9 7004 	ldr.w	r7, [r9, #4]
 80010c4:	f04f 0864 	mov.w	r8, #100	; 0x64
 80010c8:	007f      	lsls	r7, r7, #1
 80010ca:	fbb3 f3f7 	udiv	r3, r3, r7
 80010ce:	fbb3 f3f8 	udiv	r3, r3, r8
 80010d2:	011f      	lsls	r7, r3, #4
 80010d4:	f7ff fe10 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 80010d8:	4360      	muls	r0, r4
 80010da:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80010de:	005b      	lsls	r3, r3, #1
 80010e0:	fbb0 f6f3 	udiv	r6, r0, r3
 80010e4:	f7ff fe08 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 80010e8:	4360      	muls	r0, r4
 80010ea:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80010ee:	005b      	lsls	r3, r3, #1
 80010f0:	fbb0 f3f3 	udiv	r3, r0, r3
 80010f4:	fbb3 f3f8 	udiv	r3, r3, r8
 80010f8:	fb08 6313 	mls	r3, r8, r3, r6
 80010fc:	00db      	lsls	r3, r3, #3
 80010fe:	3332      	adds	r3, #50	; 0x32
 8001100:	fbb3 f3f8 	udiv	r3, r3, r8
 8001104:	005b      	lsls	r3, r3, #1
 8001106:	f403 76f8 	and.w	r6, r3, #496	; 0x1f0
 800110a:	f7ff fdf5 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 800110e:	4360      	muls	r0, r4
 8001110:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8001114:	0052      	lsls	r2, r2, #1
 8001116:	fbb0 faf2 	udiv	sl, r0, r2
 800111a:	f7ff fded 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 800111e:	e7b6      	b.n	800108e <UART_SetConfig+0xb6>
    if(huart->Instance == USART1)
 8001120:	429d      	cmp	r5, r3
 8001122:	f04f 0419 	mov.w	r4, #25
 8001126:	d143      	bne.n	80011b0 <UART_SetConfig+0x1d8>
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
 8001128:	f7ff fdf6 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 800112c:	fb04 f300 	mul.w	r3, r4, r0
 8001130:	f8d9 6004 	ldr.w	r6, [r9, #4]
 8001134:	f04f 0864 	mov.w	r8, #100	; 0x64
 8001138:	00b6      	lsls	r6, r6, #2
 800113a:	fbb3 f3f6 	udiv	r3, r3, r6
 800113e:	fbb3 f3f8 	udiv	r3, r3, r8
 8001142:	011e      	lsls	r6, r3, #4
 8001144:	f7ff fde8 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 8001148:	4360      	muls	r0, r4
 800114a:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800114e:	009b      	lsls	r3, r3, #2
 8001150:	fbb0 f7f3 	udiv	r7, r0, r3
 8001154:	f7ff fde0 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 8001158:	4360      	muls	r0, r4
 800115a:	f8d9 3004 	ldr.w	r3, [r9, #4]
 800115e:	009b      	lsls	r3, r3, #2
 8001160:	fbb0 f3f3 	udiv	r3, r0, r3
 8001164:	fbb3 f3f8 	udiv	r3, r3, r8
 8001168:	fb08 7313 	mls	r3, r8, r3, r7
 800116c:	011b      	lsls	r3, r3, #4
 800116e:	3332      	adds	r3, #50	; 0x32
 8001170:	fbb3 f3f8 	udiv	r3, r3, r8
 8001174:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8001178:	f7ff fdce 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
 800117c:	4360      	muls	r0, r4
 800117e:	f8d9 2004 	ldr.w	r2, [r9, #4]
 8001182:	0092      	lsls	r2, r2, #2
 8001184:	fbb0 faf2 	udiv	sl, r0, r2
 8001188:	f7ff fdc6 	bl	8000d18 <HAL_RCC_GetPCLK2Freq>
      huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
 800118c:	4360      	muls	r0, r4
 800118e:	f8d9 3004 	ldr.w	r3, [r9, #4]
 8001192:	009b      	lsls	r3, r3, #2
 8001194:	fbb0 f3f3 	udiv	r3, r0, r3
 8001198:	fbb3 f3f8 	udiv	r3, r3, r8
 800119c:	fb08 a313 	mls	r3, r8, r3, sl
 80011a0:	011b      	lsls	r3, r3, #4
 80011a2:	3332      	adds	r3, #50	; 0x32
 80011a4:	fbb3 f3f8 	udiv	r3, r3, r8
 80011a8:	f003 030f 	and.w	r3, r3, #15
 80011ac:	433b      	orrs	r3, r7
 80011ae:	e77f      	b.n	80010b0 <UART_SetConfig+0xd8>
 80011b0:	f7ff fda2 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 80011b4:	fb04 f300 	mul.w	r3, r4, r0
 80011b8:	f8d9 6004 	ldr.w	r6, [r9, #4]
 80011bc:	f04f 0864 	mov.w	r8, #100	; 0x64
 80011c0:	00b6      	lsls	r6, r6, #2
 80011c2:	fbb3 f3f6 	udiv	r3, r3, r6
 80011c6:	fbb3 f3f8 	udiv	r3, r3, r8
 80011ca:	011e      	lsls	r6, r3, #4
 80011cc:	f7ff fd94 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 80011d0:	4360      	muls	r0, r4
 80011d2:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80011d6:	009b      	lsls	r3, r3, #2
 80011d8:	fbb0 f7f3 	udiv	r7, r0, r3
 80011dc:	f7ff fd8c 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 80011e0:	4360      	muls	r0, r4
 80011e2:	f8d9 3004 	ldr.w	r3, [r9, #4]
 80011e6:	009b      	lsls	r3, r3, #2
 80011e8:	fbb0 f3f3 	udiv	r3, r0, r3
 80011ec:	fbb3 f3f8 	udiv	r3, r3, r8
 80011f0:	fb08 7313 	mls	r3, r8, r3, r7
 80011f4:	011b      	lsls	r3, r3, #4
 80011f6:	3332      	adds	r3, #50	; 0x32
 80011f8:	fbb3 f3f8 	udiv	r3, r3, r8
 80011fc:	f003 07f0 	and.w	r7, r3, #240	; 0xf0
 8001200:	f7ff fd7a 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 8001204:	4360      	muls	r0, r4
 8001206:	f8d9 2004 	ldr.w	r2, [r9, #4]
 800120a:	0092      	lsls	r2, r2, #2
 800120c:	fbb0 faf2 	udiv	sl, r0, r2
 8001210:	f7ff fd72 	bl	8000cf8 <HAL_RCC_GetPCLK1Freq>
 8001214:	e7ba      	b.n	800118c <UART_SetConfig+0x1b4>
 8001216:	bf00      	nop
 8001218:	40013800 	.word	0x40013800

0800121c <UART_WaitOnFlagUntilTimeout.constprop.3>:
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 800121c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800121e:	4604      	mov	r4, r0
 8001220:	460e      	mov	r6, r1
 8001222:	4617      	mov	r7, r2
 8001224:	461d      	mov	r5, r3
  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 
 8001226:	6821      	ldr	r1, [r4, #0]
 8001228:	680b      	ldr	r3, [r1, #0]
 800122a:	ea36 0303 	bics.w	r3, r6, r3
 800122e:	d101      	bne.n	8001234 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  return HAL_OK;
 8001230:	2000      	movs	r0, #0
}
 8001232:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    if(Timeout != HAL_MAX_DELAY)
 8001234:	1c6b      	adds	r3, r5, #1
 8001236:	d0f7      	beq.n	8001228 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8001238:	b995      	cbnz	r5, 8001260 <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 800123a:	6823      	ldr	r3, [r4, #0]
        __HAL_UNLOCK(huart);
 800123c:	2003      	movs	r0, #3
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 800123e:	68da      	ldr	r2, [r3, #12]
 8001240:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 8001244:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8001246:	695a      	ldr	r2, [r3, #20]
 8001248:	f022 0201 	bic.w	r2, r2, #1
 800124c:	615a      	str	r2, [r3, #20]
        huart->gState  = HAL_UART_STATE_READY;
 800124e:	2320      	movs	r3, #32
 8001250:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8001254:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
        __HAL_UNLOCK(huart);
 8001258:	2300      	movs	r3, #0
 800125a:	f884 3038 	strb.w	r3, [r4, #56]	; 0x38
 800125e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
 8001260:	f7ff f81e 	bl	80002a0 <HAL_GetTick>
 8001264:	1bc0      	subs	r0, r0, r7
 8001266:	4285      	cmp	r5, r0
 8001268:	d2dd      	bcs.n	8001226 <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
 800126a:	e7e6      	b.n	800123a <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>

0800126c <HAL_UART_Init>:
{
 800126c:	b510      	push	{r4, lr}
  if(huart == NULL)
 800126e:	4604      	mov	r4, r0
 8001270:	b340      	cbz	r0, 80012c4 <HAL_UART_Init+0x58>
  if(huart->gState == HAL_UART_STATE_RESET)
 8001272:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
 8001276:	f003 02ff 	and.w	r2, r3, #255	; 0xff
 800127a:	b91b      	cbnz	r3, 8001284 <HAL_UART_Init+0x18>
    huart->Lock = HAL_UNLOCKED;
 800127c:	f880 2038 	strb.w	r2, [r0, #56]	; 0x38
    HAL_UART_MspInit(huart);
 8001280:	f000 fc90 	bl	8001ba4 <HAL_UART_MspInit>
  huart->gState = HAL_UART_STATE_BUSY;
 8001284:	2324      	movs	r3, #36	; 0x24
  __HAL_UART_DISABLE(huart);
 8001286:	6822      	ldr	r2, [r4, #0]
  huart->gState = HAL_UART_STATE_BUSY;
 8001288:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  __HAL_UART_DISABLE(huart);
 800128c:	68d3      	ldr	r3, [r2, #12]
  UART_SetConfig(huart);
 800128e:	4620      	mov	r0, r4
  __HAL_UART_DISABLE(huart);
 8001290:	f423 5300 	bic.w	r3, r3, #8192	; 0x2000
 8001294:	60d3      	str	r3, [r2, #12]
  UART_SetConfig(huart);
 8001296:	f7ff fe9f 	bl	8000fd8 <UART_SetConfig>
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800129a:	6823      	ldr	r3, [r4, #0]
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800129c:	2000      	movs	r0, #0
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800129e:	691a      	ldr	r2, [r3, #16]
 80012a0:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 80012a4:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 80012a6:	695a      	ldr	r2, [r3, #20]
 80012a8:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 80012ac:	615a      	str	r2, [r3, #20]
  __HAL_UART_ENABLE(huart);
 80012ae:	68da      	ldr	r2, [r3, #12]
 80012b0:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 80012b4:	60da      	str	r2, [r3, #12]
  huart->gState= HAL_UART_STATE_READY;
 80012b6:	2320      	movs	r3, #32
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 80012b8:	63e0      	str	r0, [r4, #60]	; 0x3c
  huart->gState= HAL_UART_STATE_READY;
 80012ba:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  huart->RxState= HAL_UART_STATE_READY;
 80012be:	f884 303a 	strb.w	r3, [r4, #58]	; 0x3a
  return HAL_OK;
 80012c2:	bd10      	pop	{r4, pc}
    return HAL_ERROR;
 80012c4:	2001      	movs	r0, #1
}
 80012c6:	bd10      	pop	{r4, pc}

080012c8 <HAL_UART_Transmit>:
{
 80012c8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 80012cc:	461f      	mov	r7, r3
  if(huart->gState == HAL_UART_STATE_READY)
 80012ce:	f890 3039 	ldrb.w	r3, [r0, #57]	; 0x39
{
 80012d2:	4604      	mov	r4, r0
  if(huart->gState == HAL_UART_STATE_READY)
 80012d4:	2b20      	cmp	r3, #32
{
 80012d6:	460d      	mov	r5, r1
 80012d8:	4690      	mov	r8, r2
  if(huart->gState == HAL_UART_STATE_READY)
 80012da:	d14e      	bne.n	800137a <HAL_UART_Transmit+0xb2>
    if((pData == NULL) || (Size == 0U))
 80012dc:	2900      	cmp	r1, #0
 80012de:	d049      	beq.n	8001374 <HAL_UART_Transmit+0xac>
 80012e0:	2a00      	cmp	r2, #0
 80012e2:	d047      	beq.n	8001374 <HAL_UART_Transmit+0xac>
    __HAL_LOCK(huart);
 80012e4:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 80012e8:	2b01      	cmp	r3, #1
 80012ea:	d046      	beq.n	800137a <HAL_UART_Transmit+0xb2>
 80012ec:	2301      	movs	r3, #1
 80012ee:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80012f2:	2300      	movs	r3, #0
 80012f4:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 80012f6:	2321      	movs	r3, #33	; 0x21
 80012f8:	f880 3039 	strb.w	r3, [r0, #57]	; 0x39
    tickstart = HAL_GetTick();
 80012fc:	f7fe ffd0 	bl	80002a0 <HAL_GetTick>
 8001300:	4606      	mov	r6, r0
    huart->TxXferSize = Size;
 8001302:	f8a4 8024 	strh.w	r8, [r4, #36]	; 0x24
    huart->TxXferCount = Size;
 8001306:	f8a4 8026 	strh.w	r8, [r4, #38]	; 0x26
    while(huart->TxXferCount > 0U)
 800130a:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
 800130c:	b29b      	uxth	r3, r3
 800130e:	b96b      	cbnz	r3, 800132c <HAL_UART_Transmit+0x64>
    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8001310:	463b      	mov	r3, r7
 8001312:	4632      	mov	r2, r6
 8001314:	2140      	movs	r1, #64	; 0x40
 8001316:	4620      	mov	r0, r4
 8001318:	f7ff ff80 	bl	800121c <UART_WaitOnFlagUntilTimeout.constprop.3>
 800131c:	b9a8      	cbnz	r0, 800134a <HAL_UART_Transmit+0x82>
    huart->gState = HAL_UART_STATE_READY;
 800131e:	2320      	movs	r3, #32
    __HAL_UNLOCK(huart);
 8001320:	f884 0038 	strb.w	r0, [r4, #56]	; 0x38
    huart->gState = HAL_UART_STATE_READY;
 8001324:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
    return HAL_OK;
 8001328:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
      huart->TxXferCount--;
 800132c:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800132e:	4632      	mov	r2, r6
      huart->TxXferCount--;
 8001330:	3b01      	subs	r3, #1
 8001332:	b29b      	uxth	r3, r3
 8001334:	84e3      	strh	r3, [r4, #38]	; 0x26
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001336:	68a3      	ldr	r3, [r4, #8]
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001338:	2180      	movs	r1, #128	; 0x80
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800133a:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800133e:	4620      	mov	r0, r4
 8001340:	463b      	mov	r3, r7
      if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 8001342:	d10e      	bne.n	8001362 <HAL_UART_Transmit+0x9a>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001344:	f7ff ff6a 	bl	800121c <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001348:	b110      	cbz	r0, 8001350 <HAL_UART_Transmit+0x88>
          return HAL_TIMEOUT;
 800134a:	2003      	movs	r0, #3
 800134c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8001350:	882b      	ldrh	r3, [r5, #0]
 8001352:	6822      	ldr	r2, [r4, #0]
 8001354:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8001358:	6053      	str	r3, [r2, #4]
        if(huart->Init.Parity == UART_PARITY_NONE)
 800135a:	6923      	ldr	r3, [r4, #16]
 800135c:	b943      	cbnz	r3, 8001370 <HAL_UART_Transmit+0xa8>
          pData +=2U;
 800135e:	3502      	adds	r5, #2
 8001360:	e7d3      	b.n	800130a <HAL_UART_Transmit+0x42>
        if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8001362:	f7ff ff5b 	bl	800121c <UART_WaitOnFlagUntilTimeout.constprop.3>
 8001366:	2800      	cmp	r0, #0
 8001368:	d1ef      	bne.n	800134a <HAL_UART_Transmit+0x82>
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 800136a:	6823      	ldr	r3, [r4, #0]
 800136c:	782a      	ldrb	r2, [r5, #0]
 800136e:	605a      	str	r2, [r3, #4]
 8001370:	3501      	adds	r5, #1
 8001372:	e7ca      	b.n	800130a <HAL_UART_Transmit+0x42>
      return  HAL_ERROR;
 8001374:	2001      	movs	r0, #1
 8001376:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    return HAL_BUSY;
 800137a:	2002      	movs	r0, #2
}
 800137c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

08001380 <HAL_UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_READY)
 8001380:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
 8001384:	2b20      	cmp	r3, #32
 8001386:	d120      	bne.n	80013ca <HAL_UART_Receive_IT+0x4a>
    if((pData == NULL) || (Size == 0U))
 8001388:	b1e9      	cbz	r1, 80013c6 <HAL_UART_Receive_IT+0x46>
 800138a:	b1e2      	cbz	r2, 80013c6 <HAL_UART_Receive_IT+0x46>
    __HAL_LOCK(huart);
 800138c:	f890 3038 	ldrb.w	r3, [r0, #56]	; 0x38
 8001390:	2b01      	cmp	r3, #1
 8001392:	d01a      	beq.n	80013ca <HAL_UART_Receive_IT+0x4a>
    huart->RxXferCount = Size;
 8001394:	85c2      	strh	r2, [r0, #46]	; 0x2e
    huart->RxXferSize = Size;
 8001396:	8582      	strh	r2, [r0, #44]	; 0x2c
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001398:	2300      	movs	r3, #0
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 800139a:	2222      	movs	r2, #34	; 0x22
    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800139c:	63c3      	str	r3, [r0, #60]	; 0x3c
    huart->RxState = HAL_UART_STATE_BUSY_RX;
 800139e:	f880 203a 	strb.w	r2, [r0, #58]	; 0x3a
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 80013a2:	6802      	ldr	r2, [r0, #0]
    huart->pRxBuffPtr = pData;
 80013a4:	6281      	str	r1, [r0, #40]	; 0x28
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 80013a6:	68d1      	ldr	r1, [r2, #12]
    __HAL_UNLOCK(huart);
 80013a8:	f880 3038 	strb.w	r3, [r0, #56]	; 0x38
    __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
 80013ac:	f441 7180 	orr.w	r1, r1, #256	; 0x100
 80013b0:	60d1      	str	r1, [r2, #12]
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 80013b2:	6951      	ldr	r1, [r2, #20]
    return HAL_OK;
 80013b4:	4618      	mov	r0, r3
    __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
 80013b6:	f041 0101 	orr.w	r1, r1, #1
 80013ba:	6151      	str	r1, [r2, #20]
    __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
 80013bc:	68d1      	ldr	r1, [r2, #12]
 80013be:	f041 0120 	orr.w	r1, r1, #32
 80013c2:	60d1      	str	r1, [r2, #12]
    return HAL_OK;
 80013c4:	4770      	bx	lr
      return HAL_ERROR;
 80013c6:	2001      	movs	r0, #1
 80013c8:	4770      	bx	lr
    return HAL_BUSY;
 80013ca:	2002      	movs	r0, #2
}
 80013cc:	4770      	bx	lr

080013ce <HAL_UART_TxCpltCallback>:
 80013ce:	4770      	bx	lr

080013d0 <UART_Receive_IT>:
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80013d0:	f890 303a 	ldrb.w	r3, [r0, #58]	; 0x3a
{
 80013d4:	b510      	push	{r4, lr}
  if(huart->RxState == HAL_UART_STATE_BUSY_RX) 
 80013d6:	2b22      	cmp	r3, #34	; 0x22
 80013d8:	d136      	bne.n	8001448 <UART_Receive_IT+0x78>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 80013da:	6883      	ldr	r3, [r0, #8]
 80013dc:	6901      	ldr	r1, [r0, #16]
 80013de:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 80013e2:	6802      	ldr	r2, [r0, #0]
 80013e4:	6a83      	ldr	r3, [r0, #40]	; 0x28
 80013e6:	d123      	bne.n	8001430 <UART_Receive_IT+0x60>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80013e8:	6852      	ldr	r2, [r2, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 80013ea:	b9e9      	cbnz	r1, 8001428 <UART_Receive_IT+0x58>
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
 80013ec:	f3c2 0208 	ubfx	r2, r2, #0, #9
 80013f0:	f823 2b02 	strh.w	r2, [r3], #2
        huart->pRxBuffPtr += 1U;
 80013f4:	6283      	str	r3, [r0, #40]	; 0x28
    if(--huart->RxXferCount == 0U)
 80013f6:	8dc4      	ldrh	r4, [r0, #46]	; 0x2e
 80013f8:	3c01      	subs	r4, #1
 80013fa:	b2a4      	uxth	r4, r4
 80013fc:	85c4      	strh	r4, [r0, #46]	; 0x2e
 80013fe:	b98c      	cbnz	r4, 8001424 <UART_Receive_IT+0x54>
      __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
 8001400:	6803      	ldr	r3, [r0, #0]
 8001402:	68da      	ldr	r2, [r3, #12]
 8001404:	f022 0220 	bic.w	r2, r2, #32
 8001408:	60da      	str	r2, [r3, #12]
      __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
 800140a:	68da      	ldr	r2, [r3, #12]
 800140c:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 8001410:	60da      	str	r2, [r3, #12]
        __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
 8001412:	695a      	ldr	r2, [r3, #20]
 8001414:	f022 0201 	bic.w	r2, r2, #1
 8001418:	615a      	str	r2, [r3, #20]
      huart->RxState = HAL_UART_STATE_READY;
 800141a:	2320      	movs	r3, #32
 800141c:	f880 303a 	strb.w	r3, [r0, #58]	; 0x3a
      HAL_UART_RxCpltCallback(huart);
 8001420:	f000 f8ca 	bl	80015b8 <HAL_UART_RxCpltCallback>
    if(--huart->RxXferCount == 0U)
 8001424:	2000      	movs	r0, #0
}
 8001426:	bd10      	pop	{r4, pc}
        *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
 8001428:	b2d2      	uxtb	r2, r2
 800142a:	f823 2b01 	strh.w	r2, [r3], #1
 800142e:	e7e1      	b.n	80013f4 <UART_Receive_IT+0x24>
      if(huart->Init.Parity == UART_PARITY_NONE)
 8001430:	b921      	cbnz	r1, 800143c <UART_Receive_IT+0x6c>
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
 8001432:	1c59      	adds	r1, r3, #1
 8001434:	6852      	ldr	r2, [r2, #4]
 8001436:	6281      	str	r1, [r0, #40]	; 0x28
        *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
 8001438:	701a      	strb	r2, [r3, #0]
 800143a:	e7dc      	b.n	80013f6 <UART_Receive_IT+0x26>
 800143c:	6852      	ldr	r2, [r2, #4]
 800143e:	1c59      	adds	r1, r3, #1
 8001440:	6281      	str	r1, [r0, #40]	; 0x28
 8001442:	f002 027f 	and.w	r2, r2, #127	; 0x7f
 8001446:	e7f7      	b.n	8001438 <UART_Receive_IT+0x68>
    return HAL_BUSY;
 8001448:	2002      	movs	r0, #2
 800144a:	bd10      	pop	{r4, pc}

0800144c <HAL_UART_ErrorCallback>:
 800144c:	4770      	bx	lr
	...

08001450 <HAL_UART_IRQHandler>:
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8001450:	6803      	ldr	r3, [r0, #0]
{
 8001452:	b570      	push	{r4, r5, r6, lr}
   uint32_t isrflags   = READ_REG(huart->Instance->SR);
 8001454:	681a      	ldr	r2, [r3, #0]
{
 8001456:	4604      	mov	r4, r0
  if(errorflags == RESET)
 8001458:	0716      	lsls	r6, r2, #28
   uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 800145a:	68d9      	ldr	r1, [r3, #12]
   uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 800145c:	695d      	ldr	r5, [r3, #20]
  if(errorflags == RESET)
 800145e:	d107      	bne.n	8001470 <HAL_UART_IRQHandler+0x20>
    if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 8001460:	0696      	lsls	r6, r2, #26
 8001462:	d55a      	bpl.n	800151a <HAL_UART_IRQHandler+0xca>
 8001464:	068d      	lsls	r5, r1, #26
 8001466:	d558      	bpl.n	800151a <HAL_UART_IRQHandler+0xca>
}
 8001468:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
      UART_Receive_IT(huart);
 800146c:	f7ff bfb0 	b.w	80013d0 <UART_Receive_IT>
  if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
 8001470:	f015 0501 	ands.w	r5, r5, #1
 8001474:	d102      	bne.n	800147c <HAL_UART_IRQHandler+0x2c>
 8001476:	f411 7f90 	tst.w	r1, #288	; 0x120
 800147a:	d04e      	beq.n	800151a <HAL_UART_IRQHandler+0xca>
    if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
 800147c:	07d3      	lsls	r3, r2, #31
 800147e:	d505      	bpl.n	800148c <HAL_UART_IRQHandler+0x3c>
 8001480:	05ce      	lsls	r6, r1, #23
      huart->ErrorCode |= HAL_UART_ERROR_PE;
 8001482:	bf42      	ittt	mi
 8001484:	6be3      	ldrmi	r3, [r4, #60]	; 0x3c
 8001486:	f043 0301 	orrmi.w	r3, r3, #1
 800148a:	63e3      	strmi	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 800148c:	0750      	lsls	r0, r2, #29
 800148e:	d504      	bpl.n	800149a <HAL_UART_IRQHandler+0x4a>
 8001490:	b11d      	cbz	r5, 800149a <HAL_UART_IRQHandler+0x4a>
      huart->ErrorCode |= HAL_UART_ERROR_NE;
 8001492:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 8001494:	f043 0302 	orr.w	r3, r3, #2
 8001498:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 800149a:	0793      	lsls	r3, r2, #30
 800149c:	d504      	bpl.n	80014a8 <HAL_UART_IRQHandler+0x58>
 800149e:	b11d      	cbz	r5, 80014a8 <HAL_UART_IRQHandler+0x58>
      huart->ErrorCode |= HAL_UART_ERROR_FE;
 80014a0:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80014a2:	f043 0304 	orr.w	r3, r3, #4
 80014a6:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
 80014a8:	0716      	lsls	r6, r2, #28
 80014aa:	d504      	bpl.n	80014b6 <HAL_UART_IRQHandler+0x66>
 80014ac:	b11d      	cbz	r5, 80014b6 <HAL_UART_IRQHandler+0x66>
      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 80014ae:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80014b0:	f043 0308 	orr.w	r3, r3, #8
 80014b4:	63e3      	str	r3, [r4, #60]	; 0x3c
    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
 80014b6:	6be3      	ldr	r3, [r4, #60]	; 0x3c
 80014b8:	2b00      	cmp	r3, #0
 80014ba:	d066      	beq.n	800158a <HAL_UART_IRQHandler+0x13a>
      if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
 80014bc:	0695      	lsls	r5, r2, #26
 80014be:	d504      	bpl.n	80014ca <HAL_UART_IRQHandler+0x7a>
 80014c0:	0688      	lsls	r0, r1, #26
 80014c2:	d502      	bpl.n	80014ca <HAL_UART_IRQHandler+0x7a>
        UART_Receive_IT(huart);
 80014c4:	4620      	mov	r0, r4
 80014c6:	f7ff ff83 	bl	80013d0 <UART_Receive_IT>
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80014ca:	6823      	ldr	r3, [r4, #0]
        UART_EndRxTransfer(huart);
 80014cc:	4620      	mov	r0, r4
      dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
 80014ce:	695d      	ldr	r5, [r3, #20]
      if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
 80014d0:	6be2      	ldr	r2, [r4, #60]	; 0x3c
 80014d2:	0711      	lsls	r1, r2, #28
 80014d4:	d402      	bmi.n	80014dc <HAL_UART_IRQHandler+0x8c>
 80014d6:	f015 0540 	ands.w	r5, r5, #64	; 0x40
 80014da:	d01a      	beq.n	8001512 <HAL_UART_IRQHandler+0xc2>
        UART_EndRxTransfer(huart);
 80014dc:	f7ff fd6e 	bl	8000fbc <UART_EndRxTransfer>
        if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 80014e0:	6823      	ldr	r3, [r4, #0]
 80014e2:	695a      	ldr	r2, [r3, #20]
 80014e4:	0652      	lsls	r2, r2, #25
 80014e6:	d510      	bpl.n	800150a <HAL_UART_IRQHandler+0xba>
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80014e8:	695a      	ldr	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80014ea:	6b60      	ldr	r0, [r4, #52]	; 0x34
          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 80014ec:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 80014f0:	615a      	str	r2, [r3, #20]
          if(huart->hdmarx != NULL)
 80014f2:	b150      	cbz	r0, 800150a <HAL_UART_IRQHandler+0xba>
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 80014f4:	4b25      	ldr	r3, [pc, #148]	; (800158c <HAL_UART_IRQHandler+0x13c>)
 80014f6:	6343      	str	r3, [r0, #52]	; 0x34
            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 80014f8:	f7fe ff52 	bl	80003a0 <HAL_DMA_Abort_IT>
 80014fc:	2800      	cmp	r0, #0
 80014fe:	d044      	beq.n	800158a <HAL_UART_IRQHandler+0x13a>
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8001500:	6b60      	ldr	r0, [r4, #52]	; 0x34
}
 8001502:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 8001506:	6b43      	ldr	r3, [r0, #52]	; 0x34
 8001508:	4718      	bx	r3
            HAL_UART_ErrorCallback(huart);
 800150a:	4620      	mov	r0, r4
 800150c:	f7ff ff9e 	bl	800144c <HAL_UART_ErrorCallback>
 8001510:	bd70      	pop	{r4, r5, r6, pc}
        HAL_UART_ErrorCallback(huart);
 8001512:	f7ff ff9b 	bl	800144c <HAL_UART_ErrorCallback>
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 8001516:	63e5      	str	r5, [r4, #60]	; 0x3c
 8001518:	bd70      	pop	{r4, r5, r6, pc}
  if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
 800151a:	0616      	lsls	r6, r2, #24
 800151c:	d527      	bpl.n	800156e <HAL_UART_IRQHandler+0x11e>
 800151e:	060d      	lsls	r5, r1, #24
 8001520:	d525      	bpl.n	800156e <HAL_UART_IRQHandler+0x11e>
  if(huart->gState == HAL_UART_STATE_BUSY_TX)
 8001522:	f894 2039 	ldrb.w	r2, [r4, #57]	; 0x39
 8001526:	2a21      	cmp	r2, #33	; 0x21
 8001528:	d12f      	bne.n	800158a <HAL_UART_IRQHandler+0x13a>
    if(huart->Init.WordLength == UART_WORDLENGTH_9B)
 800152a:	68a2      	ldr	r2, [r4, #8]
 800152c:	f5b2 5f80 	cmp.w	r2, #4096	; 0x1000
 8001530:	6a22      	ldr	r2, [r4, #32]
 8001532:	d117      	bne.n	8001564 <HAL_UART_IRQHandler+0x114>
      huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
 8001534:	8811      	ldrh	r1, [r2, #0]
 8001536:	f3c1 0108 	ubfx	r1, r1, #0, #9
 800153a:	6059      	str	r1, [r3, #4]
      if(huart->Init.Parity == UART_PARITY_NONE)
 800153c:	6921      	ldr	r1, [r4, #16]
 800153e:	b979      	cbnz	r1, 8001560 <HAL_UART_IRQHandler+0x110>
        huart->pTxBuffPtr += 2U;
 8001540:	3202      	adds	r2, #2
        huart->pTxBuffPtr += 1U;
 8001542:	6222      	str	r2, [r4, #32]
    if(--huart->TxXferCount == 0U)
 8001544:	8ce2      	ldrh	r2, [r4, #38]	; 0x26
 8001546:	3a01      	subs	r2, #1
 8001548:	b292      	uxth	r2, r2
 800154a:	84e2      	strh	r2, [r4, #38]	; 0x26
 800154c:	b9ea      	cbnz	r2, 800158a <HAL_UART_IRQHandler+0x13a>
      __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
 800154e:	68da      	ldr	r2, [r3, #12]
 8001550:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8001554:	60da      	str	r2, [r3, #12]
      __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
 8001556:	68da      	ldr	r2, [r3, #12]
 8001558:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 800155c:	60da      	str	r2, [r3, #12]
 800155e:	bd70      	pop	{r4, r5, r6, pc}
        huart->pTxBuffPtr += 1U;
 8001560:	3201      	adds	r2, #1
 8001562:	e7ee      	b.n	8001542 <HAL_UART_IRQHandler+0xf2>
      huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
 8001564:	1c51      	adds	r1, r2, #1
 8001566:	6221      	str	r1, [r4, #32]
 8001568:	7812      	ldrb	r2, [r2, #0]
 800156a:	605a      	str	r2, [r3, #4]
 800156c:	e7ea      	b.n	8001544 <HAL_UART_IRQHandler+0xf4>
  if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
 800156e:	0650      	lsls	r0, r2, #25
 8001570:	d50b      	bpl.n	800158a <HAL_UART_IRQHandler+0x13a>
 8001572:	064a      	lsls	r2, r1, #25
 8001574:	d509      	bpl.n	800158a <HAL_UART_IRQHandler+0x13a>
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 8001576:	68da      	ldr	r2, [r3, #12]
  HAL_UART_TxCpltCallback(huart);
 8001578:	4620      	mov	r0, r4
  __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
 800157a:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 800157e:	60da      	str	r2, [r3, #12]
  huart->gState = HAL_UART_STATE_READY;
 8001580:	2320      	movs	r3, #32
 8001582:	f884 3039 	strb.w	r3, [r4, #57]	; 0x39
  HAL_UART_TxCpltCallback(huart);
 8001586:	f7ff ff22 	bl	80013ce <HAL_UART_TxCpltCallback>
 800158a:	bd70      	pop	{r4, r5, r6, pc}
 800158c:	08001591 	.word	0x08001591

08001590 <UART_DMAAbortOnError>:
{
 8001590:	b508      	push	{r3, lr}
  huart->RxXferCount = 0x00U;
 8001592:	2300      	movs	r3, #0
  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 8001594:	6a40      	ldr	r0, [r0, #36]	; 0x24
  huart->RxXferCount = 0x00U;
 8001596:	85c3      	strh	r3, [r0, #46]	; 0x2e
  huart->TxXferCount = 0x00U;
 8001598:	84c3      	strh	r3, [r0, #38]	; 0x26
  HAL_UART_ErrorCallback(huart);
 800159a:	f7ff ff57 	bl	800144c <HAL_UART_ErrorCallback>
 800159e:	bd08      	pop	{r3, pc}

080015a0 <FLASH_If_Init>:
  * @brief  Unlocks Flash for write access
  * @param  None
  * @retval None
  */
void FLASH_If_Init(void)
{
 80015a0:	b508      	push	{r3, lr}
  /* Unlock the Program memory */
  HAL_FLASH_Unlock();
 80015a2:	f7fe ff6d 	bl	8000480 <HAL_FLASH_Unlock>

  /* Clear all FLASH flags */
  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPERR);
 80015a6:	2234      	movs	r2, #52	; 0x34
 80015a8:	4b02      	ldr	r3, [pc, #8]	; (80015b4 <FLASH_If_Init+0x14>)
 80015aa:	60da      	str	r2, [r3, #12]
  /* Unlock the Program memory */
  HAL_FLASH_Lock();
}
 80015ac:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
  HAL_FLASH_Lock();
 80015b0:	f7fe bf78 	b.w	80004a4 <HAL_FLASH_Lock>
 80015b4:	40022000 	.word	0x40022000

080015b8 <HAL_UART_RxCpltCallback>:



void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
    if(huart->Instance == USART1)//RGB Comunication 
 80015b8:	6802      	ldr	r2, [r0, #0]
 80015ba:	4b0a      	ldr	r3, [pc, #40]	; (80015e4 <HAL_UART_RxCpltCallback+0x2c>)
 80015bc:	429a      	cmp	r2, r3
 80015be:	d10f      	bne.n	80015e0 <HAL_UART_RxCpltCallback+0x28>
    {
        ring_buffer[ring_header] = rx3_data[0];
 80015c0:	4a09      	ldr	r2, [pc, #36]	; (80015e8 <HAL_UART_RxCpltCallback+0x30>)
 80015c2:	490a      	ldr	r1, [pc, #40]	; (80015ec <HAL_UART_RxCpltCallback+0x34>)
 80015c4:	6813      	ldr	r3, [r2, #0]
 80015c6:	7808      	ldrb	r0, [r1, #0]
 80015c8:	4909      	ldr	r1, [pc, #36]	; (80015f0 <HAL_UART_RxCpltCallback+0x38>)
 80015ca:	54c8      	strb	r0, [r1, r3]
        if(++ring_header>=100){ ring_header = 0; }
 80015cc:	3301      	adds	r3, #1
 80015ce:	2b63      	cmp	r3, #99	; 0x63
 80015d0:	bf88      	it	hi
 80015d2:	2300      	movhi	r3, #0

        HAL_UART_Receive_IT(&huart1,&rx3_data[0],1);
 80015d4:	4905      	ldr	r1, [pc, #20]	; (80015ec <HAL_UART_RxCpltCallback+0x34>)
        if(++ring_header>=100){ ring_header = 0; }
 80015d6:	6013      	str	r3, [r2, #0]
        HAL_UART_Receive_IT(&huart1,&rx3_data[0],1);
 80015d8:	4806      	ldr	r0, [pc, #24]	; (80015f4 <HAL_UART_RxCpltCallback+0x3c>)
 80015da:	2201      	movs	r2, #1
 80015dc:	f7ff bed0 	b.w	8001380 <HAL_UART_Receive_IT>
 80015e0:	4770      	bx	lr
 80015e2:	bf00      	nop
 80015e4:	40013800 	.word	0x40013800
 80015e8:	200000b8 	.word	0x200000b8
 80015ec:	200000c0 	.word	0x200000c0
 80015f0:	20000188 	.word	0x20000188
 80015f4:	200000fc 	.word	0x200000fc

080015f8 <HAL_TIM_PeriodElapsedCallback>:
    
}
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{

    if(htim->Instance == TIM7){
 80015f8:	6802      	ldr	r2, [r0, #0]
 80015fa:	4b08      	ldr	r3, [pc, #32]	; (800161c <HAL_TIM_PeriodElapsedCallback+0x24>)
 80015fc:	429a      	cmp	r2, r3
 80015fe:	d10b      	bne.n	8001618 <HAL_TIM_PeriodElapsedCallback+0x20>
        UartTimerCnt++;
 8001600:	4a07      	ldr	r2, [pc, #28]	; (8001620 <HAL_TIM_PeriodElapsedCallback+0x28>)
 8001602:	6813      	ldr	r3, [r2, #0]
 8001604:	3301      	adds	r3, #1
 8001606:	6013      	str	r3, [r2, #0]
        LedTimerCnt++;
 8001608:	4a06      	ldr	r2, [pc, #24]	; (8001624 <HAL_TIM_PeriodElapsedCallback+0x2c>)
 800160a:	6813      	ldr	r3, [r2, #0]
 800160c:	3301      	adds	r3, #1
 800160e:	6013      	str	r3, [r2, #0]
        FirmwareTimerCnt++;
 8001610:	4a05      	ldr	r2, [pc, #20]	; (8001628 <HAL_TIM_PeriodElapsedCallback+0x30>)
 8001612:	6813      	ldr	r3, [r2, #0]
 8001614:	3301      	adds	r3, #1
 8001616:	6013      	str	r3, [r2, #0]
 8001618:	4770      	bx	lr
 800161a:	bf00      	nop
 800161c:	40001400 	.word	0x40001400
 8001620:	200000b0 	.word	0x200000b0
 8001624:	200000a8 	.word	0x200000a8
 8001628:	200000a4 	.word	0x200000a4

0800162c <Uart1_Data_Send>:
    }
}


void Uart1_Data_Send(uint8_t* data,uint8_t size){
    HAL_UART_Transmit(&huart1, data,size, 10);
 800162c:	460a      	mov	r2, r1
 800162e:	230a      	movs	r3, #10
 8001630:	4601      	mov	r1, r0
 8001632:	4801      	ldr	r0, [pc, #4]	; (8001638 <Uart1_Data_Send+0xc>)
 8001634:	f7ff be48 	b.w	80012c8 <HAL_UART_Transmit>
 8001638:	200000fc 	.word	0x200000fc

0800163c <_write>:
}

int _write (int file, uint8_t *ptr, uint16_t len) 
{
 800163c:	b510      	push	{r4, lr}
 800163e:	4614      	mov	r4, r2
    HAL_UART_Transmit (&huart1, ptr, len, 10);
 8001640:	230a      	movs	r3, #10
 8001642:	4802      	ldr	r0, [pc, #8]	; (800164c <_write+0x10>)
 8001644:	f7ff fe40 	bl	80012c8 <HAL_UART_Transmit>
    return len;
}
 8001648:	4620      	mov	r0, r4
 800164a:	bd10      	pop	{r4, pc}
 800164c:	200000fc 	.word	0x200000fc

08001650 <Flash_RGB_Data_Write>:

#define FLASH_USER_START_ADDR   StartAddr   /* Start @ of user Flash area */
#define FLASH_USER_END_ADDR     StartAddr + ((uint32_t)0x000FFFF)   /* End @ of user Flash area */
uint32_t Address = StartAddr;

uint8_t Flash_RGB_Data_Write(uint8_t* data){
 8001650:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    uint16_t Firmdata = 0;
    uint8_t ret = 0;
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 8001654:	2400      	movs	r4, #0
uint8_t Flash_RGB_Data_Write(uint8_t* data){
 8001656:	4607      	mov	r7, r0
    uint8_t ret = 0;
 8001658:	4626      	mov	r6, r4
        Firmdata  = ((data[(bluecell_length + 1) + i]) & 0x00FF);
        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
 800165a:	4d10      	ldr	r5, [pc, #64]	; (800169c <Flash_RGB_Data_Write+0x4c>)
            printf("HAL NOT OK \n");
 800165c:	f8df 8040 	ldr.w	r8, [pc, #64]	; 80016a0 <Flash_RGB_Data_Write+0x50>
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 8001660:	78bb      	ldrb	r3, [r7, #2]
 8001662:	3b02      	subs	r3, #2
 8001664:	429c      	cmp	r4, r3
 8001666:	db02      	blt.n	800166e <Flash_RGB_Data_Write+0x1e>
            ret = 1;
        }
        Address += 2;
    }
    return ret;
}
 8001668:	4630      	mov	r0, r6
 800166a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        Firmdata  = ((data[(bluecell_length + 1) + i]) & 0x00FF);
 800166e:	193b      	adds	r3, r7, r4
 8001670:	78da      	ldrb	r2, [r3, #3]
        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
 8001672:	791b      	ldrb	r3, [r3, #4]
        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
 8001674:	6829      	ldr	r1, [r5, #0]
        Firmdata  += ((data[(bluecell_length + 1) + (i + 1)] << 8) & 0xFF00);
 8001676:	eb02 2203 	add.w	r2, r2, r3, lsl #8
        if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,Address ,   (uint16_t)Firmdata) != HAL_OK){
 800167a:	b292      	uxth	r2, r2
 800167c:	2300      	movs	r3, #0
 800167e:	2001      	movs	r0, #1
 8001680:	f7fe ff44 	bl	800050c <HAL_FLASH_Program>
 8001684:	b118      	cbz	r0, 800168e <Flash_RGB_Data_Write+0x3e>
            printf("HAL NOT OK \n");
 8001686:	4640      	mov	r0, r8
 8001688:	f000 fbcc 	bl	8001e24 <puts>
            ret = 1;
 800168c:	2601      	movs	r6, #1
        Address += 2;
 800168e:	682b      	ldr	r3, [r5, #0]
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 8001690:	3402      	adds	r4, #2
        Address += 2;
 8001692:	3302      	adds	r3, #2
 8001694:	602b      	str	r3, [r5, #0]
    for(uint8_t i = 0; i < data[bluecell_length] - 2; i+=2){
 8001696:	b2e4      	uxtb	r4, r4
 8001698:	e7e2      	b.n	8001660 <Flash_RGB_Data_Write+0x10>
 800169a:	bf00      	nop
 800169c:	20000008 	.word	0x20000008
 80016a0:	08002e6c 	.word	0x08002e6c

080016a4 <Flash_write>:
    /*Variable used for Erase procedure*/
    static FLASH_EraseInitTypeDef EraseInitStruct;
    static uint32_t PAGEError = 0;
    uint8_t ret = 0;
    /* Fill EraseInit structure*/
    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
 80016a4:	2300      	movs	r3, #0
{
 80016a6:	b573      	push	{r0, r1, r4, r5, r6, lr}
    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
 80016a8:	4d16      	ldr	r5, [pc, #88]	; (8001704 <Flash_write+0x60>)
    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;

    __HAL_RCC_TIM7_CLK_DISABLE(); // e」�i?↑????▲e：↑e?? ???i」???�?????�
 80016aa:	4c17      	ldr	r4, [pc, #92]	; (8001708 <Flash_write+0x64>)
    EraseInitStruct.TypeErase   = FLASH_TYPEERASE_PAGES;
 80016ac:	602b      	str	r3, [r5, #0]
    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
 80016ae:	4b17      	ldr	r3, [pc, #92]	; (800170c <Flash_write+0x68>)
{
 80016b0:	4606      	mov	r6, r0
    EraseInitStruct.PageAddress = FLASH_USER_START_ADDR;
 80016b2:	60ab      	str	r3, [r5, #8]
    EraseInitStruct.NbPages     = (FLASH_USER_END_ADDR - FLASH_USER_START_ADDR) / FLASH_PAGE_SIZE;
 80016b4:	233f      	movs	r3, #63	; 0x3f
 80016b6:	60eb      	str	r3, [r5, #12]
    __HAL_RCC_TIM7_CLK_DISABLE(); // e」�i?↑????▲e：↑e?? ???i」???�?????�
 80016b8:	69e3      	ldr	r3, [r4, #28]
 80016ba:	f023 0320 	bic.w	r3, r3, #32
 80016be:	61e3      	str	r3, [r4, #28]
    HAL_FLASH_Unlock(); // lock ??e↑?
 80016c0:	f7fe fede 	bl	8000480 <HAL_FLASH_Unlock>
    if(flashinit == 0){
 80016c4:	4b12      	ldr	r3, [pc, #72]	; (8001710 <Flash_write+0x6c>)
 80016c6:	781a      	ldrb	r2, [r3, #0]
 80016c8:	b94a      	cbnz	r2, 80016de <Flash_write+0x3a>
        flashinit= 1;
 80016ca:	2201      	movs	r2, #1
        //FLASH_PageErase(StartAddr);
        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
 80016cc:	4911      	ldr	r1, [pc, #68]	; (8001714 <Flash_write+0x70>)
 80016ce:	4628      	mov	r0, r5
        flashinit= 1;
 80016d0:	701a      	strb	r2, [r3, #0]
        if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK){
 80016d2:	f7fe ff85 	bl	80005e0 <HAL_FLASHEx_Erase>
 80016d6:	b110      	cbz	r0, 80016de <Flash_write+0x3a>
            printf("Erase Failed \r\n");
 80016d8:	480f      	ldr	r0, [pc, #60]	; (8001718 <Flash_write+0x74>)
 80016da:	f000 fba3 	bl	8001e24 <puts>
        }
    }
    ret = Flash_RGB_Data_Write(&data[bluecell_stx]);
 80016de:	4630      	mov	r0, r6
 80016e0:	f7ff ffb6 	bl	8001650 <Flash_RGB_Data_Write>
 80016e4:	4605      	mov	r5, r0
    HAL_FLASH_Lock(); // lock ???e，↑e↑‘
 80016e6:	f7fe fedd 	bl	80004a4 <HAL_FLASH_Lock>
    __HAL_RCC_TIM7_CLK_ENABLE(); // e」�i?↑????▲e：↑e?? ??◇??�??｀??�?????�
    return ret;

}
 80016ea:	4628      	mov	r0, r5
    __HAL_RCC_TIM7_CLK_ENABLE(); // e」�i?↑????▲e：↑e?? ??◇??�??｀??�?????�
 80016ec:	69e3      	ldr	r3, [r4, #28]
 80016ee:	f043 0320 	orr.w	r3, r3, #32
 80016f2:	61e3      	str	r3, [r4, #28]
 80016f4:	69e3      	ldr	r3, [r4, #28]
 80016f6:	f003 0320 	and.w	r3, r3, #32
 80016fa:	9301      	str	r3, [sp, #4]
 80016fc:	9b01      	ldr	r3, [sp, #4]
}
 80016fe:	b002      	add	sp, #8
 8001700:	bd70      	pop	{r4, r5, r6, pc}
 8001702:	bf00      	nop
 8001704:	20000094 	.word	0x20000094
 8001708:	40021000 	.word	0x40021000
 800170c:	08004000 	.word	0x08004000
 8001710:	200000b4 	.word	0x200000b4
 8001714:	200000ac 	.word	0x200000ac
 8001718:	08002e78 	.word	0x08002e78

0800171c <Flash_InitRead>:
void Flash_InitRead(void) // ?＾‘e↑‘i?：???
{
 800171c:	b570      	push	{r4, r5, r6, lr}
    uint32_t  Address = 0;
    Address = StartAddr;
 800171e:	4c06      	ldr	r4, [pc, #24]	; (8001738 <Flash_InitRead+0x1c>)
    for(uint32_t i = 0; i < 16; i++ ){
        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
 8001720:	4e06      	ldr	r6, [pc, #24]	; (800173c <Flash_InitRead+0x20>)
    for(uint32_t i = 0; i < 16; i++ ){
 8001722:	4d07      	ldr	r5, [pc, #28]	; (8001740 <Flash_InitRead+0x24>)
        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
 8001724:	7822      	ldrb	r2, [r4, #0]
 8001726:	4621      	mov	r1, r4
 8001728:	4630      	mov	r0, r6
        Address++;
 800172a:	3401      	adds	r4, #1
        printf("%08x : %02X \n",Address ,*(uint8_t*)Address);
 800172c:	f000 fb06 	bl	8001d3c <iprintf>
    for(uint32_t i = 0; i < 16; i++ ){
 8001730:	42ac      	cmp	r4, r5
 8001732:	d1f7      	bne.n	8001724 <Flash_InitRead+0x8>
    }
}
 8001734:	bd70      	pop	{r4, r5, r6, pc}
 8001736:	bf00      	nop
 8001738:	08004000 	.word	0x08004000
 800173c:	08002e5e 	.word	0x08002e5e
 8001740:	08004010 	.word	0x08004010

08001744 <Jump_App>:
typedef void (*fptr)(void);
fptr jump_to_app;
uint32_t jump_addr;
void Jump_App(void){
 8001744:	b5b0      	push	{r4, r5, r7, lr}
    __HAL_RCC_TIM7_CLK_DISABLE(); // e」�i?↑????▲e：↑e?? ???i」???�?????�
 8001746:	4a0d      	ldr	r2, [pc, #52]	; (800177c <Jump_App+0x38>)
void Jump_App(void){
 8001748:	af00      	add	r7, sp, #0
    __HAL_RCC_TIM7_CLK_DISABLE(); // e」�i?↑????▲e：↑e?? ???i」???�?????�
 800174a:	69d3      	ldr	r3, [r2, #28]
    printf("boot loader start\n");               //e�￣i?↑i」∽ i��e?〕
 800174c:	480c      	ldr	r0, [pc, #48]	; (8001780 <Jump_App+0x3c>)
    __HAL_RCC_TIM7_CLK_DISABLE(); // e」�i?↑????▲e：↑e?? ???i」???�?????�
 800174e:	f023 0320 	bic.w	r3, r3, #32
 8001752:	61d3      	str	r3, [r2, #28]
    printf("boot loader start\n");               //e�￣i?↑i」∽ i��e?〕
 8001754:	f000 fb66 	bl	8001e24 <puts>
    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
 8001758:	4b0a      	ldr	r3, [pc, #40]	; (8001784 <Jump_App+0x40>)
 800175a:	4a0b      	ldr	r2, [pc, #44]	; (8001788 <Jump_App+0x44>)
 800175c:	681b      	ldr	r3, [r3, #0]
    jump_to_app = (fptr) jump_addr;
 800175e:	4c0b      	ldr	r4, [pc, #44]	; (800178c <Jump_App+0x48>)
    
    /* init user app's sp */
    printf("jump!\n");
 8001760:	480b      	ldr	r0, [pc, #44]	; (8001790 <Jump_App+0x4c>)
    jump_addr = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
 8001762:	6013      	str	r3, [r2, #0]
    jump_to_app = (fptr) jump_addr;
 8001764:	6023      	str	r3, [r4, #0]
    printf("jump!\n");
 8001766:	f000 fb5d 	bl	8001e24 <puts>
    __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
 800176a:	4b0a      	ldr	r3, [pc, #40]	; (8001794 <Jump_App+0x50>)
 800176c:	681b      	ldr	r3, [r3, #0]
  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
 800176e:	f383 8808 	msr	MSP, r3
    jump_to_app();
 8001772:	6823      	ldr	r3, [r4, #0]
}
 8001774:	46bd      	mov	sp, r7
 8001776:	e8bd 40b0 	ldmia.w	sp!, {r4, r5, r7, lr}
    jump_to_app();
 800177a:	4718      	bx	r3
 800177c:	40021000 	.word	0x40021000
 8001780:	08002e87 	.word	0x08002e87
 8001784:	08004004 	.word	0x08004004
 8001788:	2000013c 	.word	0x2000013c
 800178c:	20000184 	.word	0x20000184
 8001790:	08002e99 	.word	0x08002e99
 8001794:	08004000 	.word	0x08004000

08001798 <FirmwareUpdateStart>:
void FirmwareUpdateStart(uint8_t* data){
 8001798:	b573      	push	{r0, r1, r4, r5, r6, lr}
 800179a:	4604      	mov	r4, r0
    uint8_t ret = 0,crccheck = 0;
    uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe};
 800179c:	4b25      	ldr	r3, [pc, #148]	; (8001834 <FirmwareUpdateStart+0x9c>)
    crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]);
 800179e:	78a1      	ldrb	r1, [r4, #2]
    uint8_t tempdata[5] = {0xbe,FirmwareUpdataAck,0x02,0,0xbe};
 80017a0:	6818      	ldr	r0, [r3, #0]
 80017a2:	791b      	ldrb	r3, [r3, #4]
 80017a4:	9000      	str	r0, [sp, #0]
 80017a6:	f88d 3004 	strb.w	r3, [sp, #4]
    crccheck = STH30_CheckCrc(&data[bluecell_type],data[bluecell_length],data[data[bluecell_length] + 1]);
 80017aa:	1863      	adds	r3, r4, r1
 80017ac:	785a      	ldrb	r2, [r3, #1]
 80017ae:	1c60      	adds	r0, r4, #1
 80017b0:	f000 f9a5 	bl	8001afe <STH30_CheckCrc>
    if(crccheck == NO_ERROR){
 80017b4:	2801      	cmp	r0, #1
 80017b6:	d00b      	beq.n	80017d0 <FirmwareUpdateStart+0x38>
 80017b8:	2300      	movs	r3, #0
            ret = Flash_write(&data[0]);
        if(ret == 1)
            tempdata[bluecell_type] = FirmwareUpdataNak;
    }else{
        for(uint8_t i = 0; i < data[bluecell_length] + 3; i++)
            printf("%02x ",data[i]);
 80017ba:	4e1f      	ldr	r6, [pc, #124]	; (8001838 <FirmwareUpdateStart+0xa0>)
        for(uint8_t i = 0; i < data[bluecell_length] + 3; i++)
 80017bc:	78a2      	ldrb	r2, [r4, #2]
 80017be:	1c5d      	adds	r5, r3, #1
 80017c0:	3202      	adds	r2, #2
 80017c2:	b2db      	uxtb	r3, r3
 80017c4:	429a      	cmp	r2, r3
 80017c6:	da2f      	bge.n	8001828 <FirmwareUpdateStart+0x90>
        printf("Check Sum error \n");
 80017c8:	481c      	ldr	r0, [pc, #112]	; (800183c <FirmwareUpdateStart+0xa4>)
 80017ca:	f000 fb2b 	bl	8001e24 <puts>
 80017ce:	e00c      	b.n	80017ea <FirmwareUpdateStart+0x52>
        tempdata[bluecell_type] = FirmwareUpdataAck;
 80017d0:	2311      	movs	r3, #17
 80017d2:	f88d 3001 	strb.w	r3, [sp, #1]
        if(data[bluecell_type] == 0xDD || data[bluecell_type] == 0xEE)//Start Firmware byte
 80017d6:	7863      	ldrb	r3, [r4, #1]
 80017d8:	2bdd      	cmp	r3, #221	; 0xdd
 80017da:	d001      	beq.n	80017e0 <FirmwareUpdateStart+0x48>
 80017dc:	2bee      	cmp	r3, #238	; 0xee
 80017de:	d107      	bne.n	80017f0 <FirmwareUpdateStart+0x58>
            ret = Flash_write(&data[0]);
 80017e0:	4620      	mov	r0, r4
 80017e2:	f7ff ff5f 	bl	80016a4 <Flash_write>
        if(ret == 1)
 80017e6:	2801      	cmp	r0, #1
 80017e8:	d102      	bne.n	80017f0 <FirmwareUpdateStart+0x58>
        tempdata[bluecell_type] = FirmwareUpdataNak;
 80017ea:	2322      	movs	r3, #34	; 0x22
 80017ec:	f88d 3001 	strb.w	r3, [sp, #1]
    }
    tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]);
 80017f0:	f89d 1002 	ldrb.w	r1, [sp, #2]
 80017f4:	f10d 0001 	add.w	r0, sp, #1
 80017f8:	f000 f966 	bl	8001ac8 <STH30_CreateCrc>
    if(data[bluecell_type] != 0xEE && data[bluecell_type] != RGB_Reset){
 80017fc:	7863      	ldrb	r3, [r4, #1]
    tempdata[bluecell_crc] = STH30_CreateCrc(&tempdata[bluecell_type],tempdata[bluecell_length]);
 80017fe:	f88d 0003 	strb.w	r0, [sp, #3]
    if(data[bluecell_type] != 0xEE && data[bluecell_type] != RGB_Reset){
 8001802:	2bee      	cmp	r3, #238	; 0xee
 8001804:	d008      	beq.n	8001818 <FirmwareUpdateStart+0x80>
 8001806:	2b0a      	cmp	r3, #10
 8001808:	d006      	beq.n	8001818 <FirmwareUpdateStart+0x80>
        Uart1_Data_Send(&tempdata[bluecell_stx],tempdata[bluecell_length] + 3); 
 800180a:	f89d 1002 	ldrb.w	r1, [sp, #2]
 800180e:	4668      	mov	r0, sp
 8001810:	3103      	adds	r1, #3
 8001812:	b2c9      	uxtb	r1, r1
 8001814:	f7ff ff0a 	bl	800162c <Uart1_Data_Send>
    }
    if(data[bluecell_type] == 0xEE)
 8001818:	7863      	ldrb	r3, [r4, #1]
 800181a:	2bee      	cmp	r3, #238	; 0xee
 800181c:	d102      	bne.n	8001824 <FirmwareUpdateStart+0x8c>
        printf("update Complete \n");
 800181e:	4808      	ldr	r0, [pc, #32]	; (8001840 <FirmwareUpdateStart+0xa8>)
 8001820:	f000 fb00 	bl	8001e24 <puts>
}
 8001824:	b002      	add	sp, #8
 8001826:	bd70      	pop	{r4, r5, r6, pc}
            printf("%02x ",data[i]);
 8001828:	5ce1      	ldrb	r1, [r4, r3]
 800182a:	4630      	mov	r0, r6
 800182c:	f000 fa86 	bl	8001d3c <iprintf>
 8001830:	462b      	mov	r3, r5
 8001832:	e7c3      	b.n	80017bc <FirmwareUpdateStart+0x24>
 8001834:	08002e2c 	.word	0x08002e2c
 8001838:	08002e36 	.word	0x08002e36
 800183c:	08002e3c 	.word	0x08002e3c
 8001840:	08002e4d 	.word	0x08002e4d

08001844 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001844:	b510      	push	{r4, lr}
 8001846:	b090      	sub	sp, #64	; 0x40
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001848:	2228      	movs	r2, #40	; 0x28
 800184a:	2100      	movs	r1, #0
 800184c:	a806      	add	r0, sp, #24
 800184e:	f000 fa6d 	bl	8001d2c <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001852:	2214      	movs	r2, #20
 8001854:	2100      	movs	r1, #0
 8001856:	a801      	add	r0, sp, #4
 8001858:	f000 fa68 	bl	8001d2c <memset>

  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 800185c:	2301      	movs	r3, #1
 800185e:	930a      	str	r3, [sp, #40]	; 0x28
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8001860:	2310      	movs	r3, #16
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8001862:	2402      	movs	r4, #2
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8001864:	930b      	str	r3, [sp, #44]	; 0x2c
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
 8001866:	f44f 2300 	mov.w	r3, #524288	; 0x80000
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 800186a:	a806      	add	r0, sp, #24
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
 800186c:	930f      	str	r3, [sp, #60]	; 0x3c
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 800186e:	9406      	str	r4, [sp, #24]
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001870:	940d      	str	r4, [sp, #52]	; 0x34
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001872:	f7fe ffed 	bl	8000850 <HAL_RCC_OscConfig>
  {
    Error_Handler();
  }
  /**Initializes the CPU, AHB and APB busses clocks 
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001876:	230f      	movs	r3, #15
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8001878:	2100      	movs	r1, #0
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 800187a:	9301      	str	r3, [sp, #4]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 800187c:	f44f 6380 	mov.w	r3, #1024	; 0x400
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 8001880:	a801      	add	r0, sp, #4
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001882:	9402      	str	r4, [sp, #8]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8001884:	9103      	str	r1, [sp, #12]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8001886:	9304      	str	r3, [sp, #16]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 8001888:	9105      	str	r1, [sp, #20]
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
 800188a:	f7ff f9b1 	bl	8000bf0 <HAL_RCC_ClockConfig>
  {
    Error_Handler();
  }
}
 800188e:	b010      	add	sp, #64	; 0x40
 8001890:	bd10      	pop	{r4, pc}
	...

08001894 <main>:
{
 8001894:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8001898:	b0c8      	sub	sp, #288	; 0x120
  uint8_t data[255] = {0,};
 800189a:	af08      	add	r7, sp, #32
 800189c:	22ff      	movs	r2, #255	; 0xff
 800189e:	2100      	movs	r1, #0
 80018a0:	4638      	mov	r0, r7
 80018a2:	f000 fa43 	bl	8001d2c <memset>
  uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb};
 80018a6:	4b73      	ldr	r3, [pc, #460]	; (8001a74 <main+0x1e0>)
  HAL_GPIO_WritePin(Boot_LD_GPIO_Port, Boot_LD_Pin, GPIO_PIN_RESET);

  /*Configure GPIO pin : Boot_LD_Pin */
  GPIO_InitStruct.Pin = Boot_LD_Pin;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 80018a8:	2400      	movs	r4, #0
  uint8_t bootdata[5] = {0xbe,RGB_BootStart,0x02,0,0xeb};
 80018aa:	6818      	ldr	r0, [r3, #0]
 80018ac:	791b      	ldrb	r3, [r3, #4]
 80018ae:	9002      	str	r0, [sp, #8]
 80018b0:	f88d 300c 	strb.w	r3, [sp, #12]
  HAL_Init();
 80018b4:	f7fe fcdc 	bl	8000270 <HAL_Init>
  SystemClock_Config();
 80018b8:	f7ff ffc4 	bl	8001844 <SystemClock_Config>
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80018bc:	2210      	movs	r2, #16
 80018be:	2100      	movs	r1, #0
 80018c0:	eb0d 0002 	add.w	r0, sp, r2
 80018c4:	f000 fa32 	bl	8001d2c <memset>
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018c8:	4b6b      	ldr	r3, [pc, #428]	; (8001a78 <main+0x1e4>)
  HAL_GPIO_WritePin(Boot_LD_GPIO_Port, Boot_LD_Pin, GPIO_PIN_RESET);
 80018ca:	f44f 4100 	mov.w	r1, #32768	; 0x8000
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018ce:	699a      	ldr	r2, [r3, #24]
  HAL_GPIO_WritePin(Boot_LD_GPIO_Port, Boot_LD_Pin, GPIO_PIN_RESET);
 80018d0:	486a      	ldr	r0, [pc, #424]	; (8001a7c <main+0x1e8>)
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018d2:	f042 0210 	orr.w	r2, r2, #16
 80018d6:	619a      	str	r2, [r3, #24]
 80018d8:	699a      	ldr	r2, [r3, #24]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 80018da:	f04f 0801 	mov.w	r8, #1
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80018de:	f002 0210 	and.w	r2, r2, #16
 80018e2:	9200      	str	r2, [sp, #0]
 80018e4:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80018e6:	699a      	ldr	r2, [r3, #24]
  huart1.Instance = USART1;
 80018e8:	4d65      	ldr	r5, [pc, #404]	; (8001a80 <main+0x1ec>)
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80018ea:	f042 0204 	orr.w	r2, r2, #4
 80018ee:	619a      	str	r2, [r3, #24]
 80018f0:	699b      	ldr	r3, [r3, #24]
  HAL_GPIO_WritePin(Boot_LD_GPIO_Port, Boot_LD_Pin, GPIO_PIN_RESET);
 80018f2:	2200      	movs	r2, #0
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80018f4:	f003 0304 	and.w	r3, r3, #4
 80018f8:	9301      	str	r3, [sp, #4]
 80018fa:	9b01      	ldr	r3, [sp, #4]
  HAL_GPIO_WritePin(Boot_LD_GPIO_Port, Boot_LD_Pin, GPIO_PIN_RESET);
 80018fc:	f7fe ff9e 	bl	800083c <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = Boot_LD_Pin;
 8001900:	f44f 4300 	mov.w	r3, #32768	; 0x8000
 8001904:	9304      	str	r3, [sp, #16]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001906:	2302      	movs	r3, #2
  HAL_GPIO_Init(Boot_LD_GPIO_Port, &GPIO_InitStruct);
 8001908:	a904      	add	r1, sp, #16
 800190a:	485c      	ldr	r0, [pc, #368]	; (8001a7c <main+0x1e8>)
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800190c:	f8cd 8014 	str.w	r8, [sp, #20]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8001910:	9307      	str	r3, [sp, #28]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001912:	9406      	str	r4, [sp, #24]
  HAL_GPIO_Init(Boot_LD_GPIO_Port, &GPIO_InitStruct);
 8001914:	f7fe feb2 	bl	800067c <HAL_GPIO_Init>
  huart1.Init.BaudRate = 115200;
 8001918:	f44f 33e1 	mov.w	r3, #115200	; 0x1c200
 800191c:	4a59      	ldr	r2, [pc, #356]	; (8001a84 <main+0x1f0>)
  if (HAL_UART_Init(&huart1) != HAL_OK)
 800191e:	4628      	mov	r0, r5
  huart1.Init.BaudRate = 115200;
 8001920:	e885 000c 	stmia.w	r5, {r2, r3}
  huart1.Init.Mode = UART_MODE_TX_RX;
 8001924:	230c      	movs	r3, #12
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 8001926:	60ac      	str	r4, [r5, #8]
  huart1.Init.Mode = UART_MODE_TX_RX;
 8001928:	616b      	str	r3, [r5, #20]
  huart1.Init.StopBits = UART_STOPBITS_1;
 800192a:	60ec      	str	r4, [r5, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 800192c:	612c      	str	r4, [r5, #16]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 800192e:	61ac      	str	r4, [r5, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8001930:	61ec      	str	r4, [r5, #28]
  if (HAL_UART_Init(&huart1) != HAL_OK)
 8001932:	f7ff fc9b 	bl	800126c <HAL_UART_Init>
  htim7.Init.Prescaler = 1600-1;
 8001936:	f240 633f 	movw	r3, #1599	; 0x63f
  htim7.Instance = TIM7;
 800193a:	4e53      	ldr	r6, [pc, #332]	; (8001a88 <main+0x1f4>)
  htim7.Init.Prescaler = 1600-1;
 800193c:	4953      	ldr	r1, [pc, #332]	; (8001a8c <main+0x1f8>)
  if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
 800193e:	4630      	mov	r0, r6
  htim7.Init.Prescaler = 1600-1;
 8001940:	e886 000a 	stmia.w	r6, {r1, r3}
  htim7.Init.Period = 10-1;
 8001944:	2309      	movs	r3, #9
  htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
 8001946:	60b4      	str	r4, [r6, #8]
  htim7.Init.Period = 10-1;
 8001948:	60f3      	str	r3, [r6, #12]
  htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 800194a:	61b4      	str	r4, [r6, #24]
  TIM_MasterConfigTypeDef sMasterConfig = {0};
 800194c:	9404      	str	r4, [sp, #16]
 800194e:	9405      	str	r4, [sp, #20]
  if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
 8001950:	f7ff faf6 	bl	8000f40 <HAL_TIM_Base_Init>
  if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
 8001954:	a904      	add	r1, sp, #16
 8001956:	4630      	mov	r0, r6
  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 8001958:	9404      	str	r4, [sp, #16]
  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 800195a:	9405      	str	r4, [sp, #20]
  if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
 800195c:	f7ff fb0a 	bl	8000f74 <HAL_TIMEx_MasterConfigSynchronization>
  HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 8001960:	4622      	mov	r2, r4
 8001962:	4621      	mov	r1, r4
 8001964:	2025      	movs	r0, #37	; 0x25
 8001966:	f7fe fcc5 	bl	80002f4 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(USART1_IRQn);
 800196a:	2025      	movs	r0, #37	; 0x25
 800196c:	f7fe fcf6 	bl	800035c <HAL_NVIC_EnableIRQ>
  HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
 8001970:	4622      	mov	r2, r4
 8001972:	4621      	mov	r1, r4
 8001974:	2037      	movs	r0, #55	; 0x37
 8001976:	f7fe fcbd 	bl	80002f4 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(TIM7_IRQn);
 800197a:	2037      	movs	r0, #55	; 0x37
 800197c:	f7fe fcee 	bl	800035c <HAL_NVIC_EnableIRQ>
  HAL_TIM_Base_Start_IT(&htim7);
 8001980:	4630      	mov	r0, r6
 8001982:	f7ff f9d9 	bl	8000d38 <HAL_TIM_Base_Start_IT>
  HAL_UART_Receive_IT(&huart1, &rx3_data[0],1);
 8001986:	4642      	mov	r2, r8
 8001988:	4941      	ldr	r1, [pc, #260]	; (8001a90 <main+0x1fc>)
 800198a:	4628      	mov	r0, r5
 800198c:	f7ff fcf8 	bl	8001380 <HAL_UART_Receive_IT>
  setbuf(stdout, NULL); // \n ?i��i��?i��i��?i��i��, printf i�???????i��i��?i��i��i�?????? ?i��i��?i��i��?i��i��  
 8001990:	4b40      	ldr	r3, [pc, #256]	; (8001a94 <main+0x200>)
 8001992:	4621      	mov	r1, r4
 8001994:	681b      	ldr	r3, [r3, #0]
      if(FirmwareTimerCnt > 3000){
 8001996:	4e40      	ldr	r6, [pc, #256]	; (8001a98 <main+0x204>)
  setbuf(stdout, NULL); // \n ?i��i��?i��i��?i��i��, printf i�???????i��i��?i��i��i�?????? ?i��i��?i��i��?i��i��  
 8001998:	6898      	ldr	r0, [r3, #8]
 800199a:	f000 fa4b 	bl	8001e34 <setbuf>
  printf("****************************************\r\n");
 800199e:	483f      	ldr	r0, [pc, #252]	; (8001a9c <main+0x208>)
 80019a0:	f000 fa40 	bl	8001e24 <puts>
  printf("RGB Project\r\n");
 80019a4:	483e      	ldr	r0, [pc, #248]	; (8001aa0 <main+0x20c>)
 80019a6:	f000 fa3d 	bl	8001e24 <puts>
  printf("Build at %s %s\r\n", __DATE__, __TIME__);
 80019aa:	4a3e      	ldr	r2, [pc, #248]	; (8001aa4 <main+0x210>)
 80019ac:	493e      	ldr	r1, [pc, #248]	; (8001aa8 <main+0x214>)
 80019ae:	483f      	ldr	r0, [pc, #252]	; (8001aac <main+0x218>)
 80019b0:	f000 f9c4 	bl	8001d3c <iprintf>
  printf("Copyright (c) 2019. BLUECELL\r\n");
 80019b4:	483e      	ldr	r0, [pc, #248]	; (8001ab0 <main+0x21c>)
 80019b6:	f000 fa35 	bl	8001e24 <puts>
  printf("****************************************\r\n");
 80019ba:	4838      	ldr	r0, [pc, #224]	; (8001a9c <main+0x208>)
 80019bc:	f000 fa32 	bl	8001e24 <puts>
  FLASH_If_Init();
 80019c0:	f7ff fdee 	bl	80015a0 <FLASH_If_Init>
  Flash_InitRead();
 80019c4:	f7ff feaa 	bl	800171c <Flash_InitRead>
  bootdata[bluecell_crc] = STH30_CreateCrc(&bootdata[bluecell_type],bootdata[bluecell_length]);
 80019c8:	f89d 100a 	ldrb.w	r1, [sp, #10]
 80019cc:	f10d 0009 	add.w	r0, sp, #9
 80019d0:	f000 f87a 	bl	8001ac8 <STH30_CreateCrc>
 80019d4:	f88d 000b 	strb.w	r0, [sp, #11]
  HAL_Delay(100);
 80019d8:	2064      	movs	r0, #100	; 0x64
 80019da:	f7fe fc67 	bl	80002ac <HAL_Delay>
  Uart1_Data_Send(&bootdata[bluecell_stx],bootdata[bluecell_length] + 3); 
 80019de:	f89d 100a 	ldrb.w	r1, [sp, #10]
 80019e2:	a802      	add	r0, sp, #8
 80019e4:	3103      	adds	r1, #3
 80019e6:	b2c9      	uxtb	r1, r1
 80019e8:	f7ff fe20 	bl	800162c <Uart1_Data_Send>
  uint8_t cnt = 0;
 80019ec:	4625      	mov	r5, r4
 80019ee:	46b1      	mov	r9, r6
        HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 80019f0:	f8df 8088 	ldr.w	r8, [pc, #136]	; 8001a7c <main+0x1e8>
      if(FirmwareTimerCnt > 3000){
 80019f4:	f640 33b8 	movw	r3, #3000	; 0xbb8
 80019f8:	6832      	ldr	r2, [r6, #0]
 80019fa:	429a      	cmp	r2, r3
 80019fc:	d901      	bls.n	8001a02 <main+0x16e>
          Jump_App();
 80019fe:	f7ff fea1 	bl	8001744 <Jump_App>
     if(ring_tail != ring_header){ // <------- 
 8001a02:	4a2c      	ldr	r2, [pc, #176]	; (8001ab4 <main+0x220>)
 8001a04:	4b2c      	ldr	r3, [pc, #176]	; (8001ab8 <main+0x224>)
 8001a06:	6811      	ldr	r1, [r2, #0]
 8001a08:	681b      	ldr	r3, [r3, #0]
 8001a0a:	4299      	cmp	r1, r3
 8001a0c:	d01e      	beq.n	8001a4c <main+0x1b8>
        data[cnt++] = ring_buffer[ring_tail++];
 8001a0e:	4c2b      	ldr	r4, [pc, #172]	; (8001abc <main+0x228>)
 8001a10:	1c48      	adds	r0, r1, #1
 8001a12:	5c61      	ldrb	r1, [r4, r1]
 8001a14:	1c6b      	adds	r3, r5, #1
 8001a16:	5579      	strb	r1, [r7, r5]
 8001a18:	2100      	movs	r1, #0
 8001a1a:	b2db      	uxtb	r3, r3
 8001a1c:	461d      	mov	r5, r3
        if(ring_tail >= 100){ ring_tail = 0; }
 8001a1e:	2863      	cmp	r0, #99	; 0x63
        data[cnt++] = ring_buffer[ring_tail++];
 8001a20:	6010      	str	r0, [r2, #0]
        if(ring_tail >= 100){ ring_tail = 0; }
 8001a22:	bf88      	it	hi
 8001a24:	6011      	strhi	r1, [r2, #0]
        UartTimerCnt = 0;
 8001a26:	4a26      	ldr	r2, [pc, #152]	; (8001ac0 <main+0x22c>)
 8001a28:	6011      	str	r1, [r2, #0]
    if(uartrecv == 1 && UartTimerCnt > 100){
 8001a2a:	4b25      	ldr	r3, [pc, #148]	; (8001ac0 <main+0x22c>)
 8001a2c:	681b      	ldr	r3, [r3, #0]
 8001a2e:	2b64      	cmp	r3, #100	; 0x64
 8001a30:	d91e      	bls.n	8001a70 <main+0x1dc>
        FirmwareTimerCnt = 0;
 8001a32:	2500      	movs	r5, #0
        FirmwareUpdateStart(&data[0]);
 8001a34:	4638      	mov	r0, r7
 8001a36:	f7ff feaf 	bl	8001798 <FirmwareUpdateStart>
        memset(&data[0],0,100);
 8001a3a:	2264      	movs	r2, #100	; 0x64
 8001a3c:	2100      	movs	r1, #0
 8001a3e:	4638      	mov	r0, r7
 8001a40:	f000 f974 	bl	8001d2c <memset>
        cnt = 0;
 8001a44:	462c      	mov	r4, r5
        FirmwareTimerCnt = 0;
 8001a46:	f8c9 5000 	str.w	r5, [r9]
 8001a4a:	e001      	b.n	8001a50 <main+0x1bc>
    if(uartrecv == 1 && UartTimerCnt > 100){
 8001a4c:	2c00      	cmp	r4, #0
 8001a4e:	d1ec      	bne.n	8001a2a <main+0x196>
    if(LedTimerCnt > 500){
 8001a50:	f8df a070 	ldr.w	sl, [pc, #112]	; 8001ac4 <main+0x230>
 8001a54:	f8da 3000 	ldr.w	r3, [sl]
 8001a58:	f5b3 7ffa 	cmp.w	r3, #500	; 0x1f4
 8001a5c:	d9ca      	bls.n	80019f4 <main+0x160>
        HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
 8001a5e:	f44f 4100 	mov.w	r1, #32768	; 0x8000
 8001a62:	4640      	mov	r0, r8
 8001a64:	f7fe feef 	bl	8000846 <HAL_GPIO_TogglePin>
        LedTimerCnt = 0;
 8001a68:	2300      	movs	r3, #0
 8001a6a:	f8ca 3000 	str.w	r3, [sl]
 8001a6e:	e7c1      	b.n	80019f4 <main+0x160>
 8001a70:	2401      	movs	r4, #1
 8001a72:	e7ed      	b.n	8001a50 <main+0x1bc>
 8001a74:	08002e31 	.word	0x08002e31
 8001a78:	40021000 	.word	0x40021000
 8001a7c:	40011000 	.word	0x40011000
 8001a80:	200000fc 	.word	0x200000fc
 8001a84:	40013800 	.word	0x40013800
 8001a88:	20000144 	.word	0x20000144
 8001a8c:	40001400 	.word	0x40001400
 8001a90:	200000c0 	.word	0x200000c0
 8001a94:	20000010 	.word	0x20000010
 8001a98:	200000a4 	.word	0x200000a4
 8001a9c:	08002e9f 	.word	0x08002e9f
 8001aa0:	08002ec9 	.word	0x08002ec9
 8001aa4:	08002ed6 	.word	0x08002ed6
 8001aa8:	08002edf 	.word	0x08002edf
 8001aac:	08002eeb 	.word	0x08002eeb
 8001ab0:	08002efc 	.word	0x08002efc
 8001ab4:	200000bc 	.word	0x200000bc
 8001ab8:	200000b8 	.word	0x200000b8
 8001abc:	20000188 	.word	0x20000188
 8001ac0:	200000b0 	.word	0x200000b0
 8001ac4:	200000a8 	.word	0x200000a8

08001ac8 <STH30_CreateCrc>:
	0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
	0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};

uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
{
 8001ac8:	b510      	push	{r4, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001aca:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001acc:	4604      	mov	r4, r0
 8001ace:	1a22      	subs	r2, r4, r0
 8001ad0:	b2d2      	uxtb	r2, r2
 8001ad2:	4291      	cmp	r1, r2
 8001ad4:	d801      	bhi.n	8001ada <STH30_CreateCrc+0x12>
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
      else           crc = (crc << 1);
    }
  }
  return crc;
}
 8001ad6:	4618      	mov	r0, r3
 8001ad8:	bd10      	pop	{r4, pc}
    crc ^= (data[byteCtr]);
 8001ada:	f814 2b01 	ldrb.w	r2, [r4], #1
 8001ade:	4053      	eors	r3, r2
 8001ae0:	2208      	movs	r2, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001ae2:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001ae6:	f102 32ff 	add.w	r2, r2, #4294967295
 8001aea:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001aee:	bf18      	it	ne
 8001af0:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001af4:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
      else           crc = (crc << 1);
 8001af8:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001afa:	d1f2      	bne.n	8001ae2 <STH30_CreateCrc+0x1a>
 8001afc:	e7e7      	b.n	8001ace <STH30_CreateCrc+0x6>

08001afe <STH30_CheckCrc>:
etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
{
 8001afe:	b530      	push	{r4, r5, lr}
  uint8_t bit;        // bit mask
  uint8_t crc = 0xFF; // calculated checksum
 8001b00:	23ff      	movs	r3, #255	; 0xff
  uint8_t byteCtr;    // byte counter

  // calculates 8-Bit checksum with given polynomial
  for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
 8001b02:	4605      	mov	r5, r0
 8001b04:	1a2c      	subs	r4, r5, r0
 8001b06:	b2e4      	uxtb	r4, r4
 8001b08:	42a1      	cmp	r1, r4
 8001b0a:	d803      	bhi.n	8001b14 <STH30_CheckCrc+0x16>
      else           crc = (crc << 1);
    }
  }
  if(crc != checksum) return CHECKSUM_ERROR;
  else                return NO_ERROR;
}
 8001b0c:	1a9b      	subs	r3, r3, r2
 8001b0e:	4258      	negs	r0, r3
 8001b10:	4158      	adcs	r0, r3
 8001b12:	bd30      	pop	{r4, r5, pc}
    crc ^= (data[byteCtr]);
 8001b14:	f815 4b01 	ldrb.w	r4, [r5], #1
 8001b18:	4063      	eors	r3, r4
 8001b1a:	2408      	movs	r4, #8
      if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
 8001b1c:	f013 0f80 	tst.w	r3, #128	; 0x80
 8001b20:	f104 34ff 	add.w	r4, r4, #4294967295
 8001b24:	ea4f 0343 	mov.w	r3, r3, lsl #1
 8001b28:	bf18      	it	ne
 8001b2a:	f083 0331 	eorne.w	r3, r3, #49	; 0x31
    for(bit = 8; bit > 0; --bit)
 8001b2e:	f014 04ff 	ands.w	r4, r4, #255	; 0xff
      else           crc = (crc << 1);
 8001b32:	b2db      	uxtb	r3, r3
    for(bit = 8; bit > 0; --bit)
 8001b34:	d1f2      	bne.n	8001b1c <STH30_CheckCrc+0x1e>
 8001b36:	e7e5      	b.n	8001b04 <STH30_CheckCrc+0x6>

08001b38 <HAL_MspInit>:
{
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_AFIO_CLK_ENABLE();
 8001b38:	4b0e      	ldr	r3, [pc, #56]	; (8001b74 <HAL_MspInit+0x3c>)
{
 8001b3a:	b082      	sub	sp, #8
  __HAL_RCC_AFIO_CLK_ENABLE();
 8001b3c:	699a      	ldr	r2, [r3, #24]
 8001b3e:	f042 0201 	orr.w	r2, r2, #1
 8001b42:	619a      	str	r2, [r3, #24]
 8001b44:	699a      	ldr	r2, [r3, #24]
 8001b46:	f002 0201 	and.w	r2, r2, #1
 8001b4a:	9200      	str	r2, [sp, #0]
 8001b4c:	9a00      	ldr	r2, [sp, #0]
  __HAL_RCC_PWR_CLK_ENABLE();
 8001b4e:	69da      	ldr	r2, [r3, #28]
 8001b50:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
 8001b54:	61da      	str	r2, [r3, #28]
 8001b56:	69db      	ldr	r3, [r3, #28]

  /* System interrupt init*/

  /**DISABLE: JTAG-DP Disabled and SW-DP Disabled 
  */
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8001b58:	4a07      	ldr	r2, [pc, #28]	; (8001b78 <HAL_MspInit+0x40>)
  __HAL_RCC_PWR_CLK_ENABLE();
 8001b5a:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001b5e:	9301      	str	r3, [sp, #4]
 8001b60:	9b01      	ldr	r3, [sp, #4]
  __HAL_AFIO_REMAP_SWJ_DISABLE();
 8001b62:	6853      	ldr	r3, [r2, #4]
 8001b64:	f023 63e0 	bic.w	r3, r3, #117440512	; 0x7000000
 8001b68:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
 8001b6c:	6053      	str	r3, [r2, #4]

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8001b6e:	b002      	add	sp, #8
 8001b70:	4770      	bx	lr
 8001b72:	bf00      	nop
 8001b74:	40021000 	.word	0x40021000
 8001b78:	40010000 	.word	0x40010000

08001b7c <HAL_TIM_Base_MspInit>:
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{

  if(htim_base->Instance==TIM7)
 8001b7c:	6802      	ldr	r2, [r0, #0]
 8001b7e:	4b08      	ldr	r3, [pc, #32]	; (8001ba0 <HAL_TIM_Base_MspInit+0x24>)
{
 8001b80:	b082      	sub	sp, #8
  if(htim_base->Instance==TIM7)
 8001b82:	429a      	cmp	r2, r3
 8001b84:	d10a      	bne.n	8001b9c <HAL_TIM_Base_MspInit+0x20>
  {
  /* USER CODE BEGIN TIM7_MspInit 0 */

  /* USER CODE END TIM7_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_TIM7_CLK_ENABLE();
 8001b86:	f503 33fe 	add.w	r3, r3, #130048	; 0x1fc00
 8001b8a:	69da      	ldr	r2, [r3, #28]
 8001b8c:	f042 0220 	orr.w	r2, r2, #32
 8001b90:	61da      	str	r2, [r3, #28]
 8001b92:	69db      	ldr	r3, [r3, #28]
 8001b94:	f003 0320 	and.w	r3, r3, #32
 8001b98:	9301      	str	r3, [sp, #4]
 8001b9a:	9b01      	ldr	r3, [sp, #4]
  /* USER CODE BEGIN TIM7_MspInit 1 */

  /* USER CODE END TIM7_MspInit 1 */
  }

}
 8001b9c:	b002      	add	sp, #8
 8001b9e:	4770      	bx	lr
 8001ba0:	40001400 	.word	0x40001400

08001ba4 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8001ba4:	b510      	push	{r4, lr}
 8001ba6:	4604      	mov	r4, r0
 8001ba8:	b086      	sub	sp, #24

  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001baa:	2210      	movs	r2, #16
 8001bac:	2100      	movs	r1, #0
 8001bae:	a802      	add	r0, sp, #8
 8001bb0:	f000 f8bc 	bl	8001d2c <memset>
  if(huart->Instance==USART1)
 8001bb4:	6822      	ldr	r2, [r4, #0]
 8001bb6:	4b17      	ldr	r3, [pc, #92]	; (8001c14 <HAL_UART_MspInit+0x70>)
 8001bb8:	429a      	cmp	r2, r3
 8001bba:	d128      	bne.n	8001c0e <HAL_UART_MspInit+0x6a>
  {
  /* USER CODE BEGIN USART1_MspInit 0 */

  /* USER CODE END USART1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART1_CLK_ENABLE();
 8001bbc:	f503 4358 	add.w	r3, r3, #55296	; 0xd800
 8001bc0:	699a      	ldr	r2, [r3, #24]
    PA10     ------> USART1_RX 
    */
    GPIO_InitStruct.Pin = GPIO_PIN_9;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001bc2:	a902      	add	r1, sp, #8
    __HAL_RCC_USART1_CLK_ENABLE();
 8001bc4:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8001bc8:	619a      	str	r2, [r3, #24]
 8001bca:	699a      	ldr	r2, [r3, #24]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001bcc:	4812      	ldr	r0, [pc, #72]	; (8001c18 <HAL_UART_MspInit+0x74>)
    __HAL_RCC_USART1_CLK_ENABLE();
 8001bce:	f402 4280 	and.w	r2, r2, #16384	; 0x4000
 8001bd2:	9200      	str	r2, [sp, #0]
 8001bd4:	9a00      	ldr	r2, [sp, #0]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8001bd6:	699a      	ldr	r2, [r3, #24]
 8001bd8:	f042 0204 	orr.w	r2, r2, #4
 8001bdc:	619a      	str	r2, [r3, #24]
 8001bde:	699b      	ldr	r3, [r3, #24]
 8001be0:	f003 0304 	and.w	r3, r3, #4
 8001be4:	9301      	str	r3, [sp, #4]
 8001be6:	9b01      	ldr	r3, [sp, #4]
    GPIO_InitStruct.Pin = GPIO_PIN_9;
 8001be8:	f44f 7300 	mov.w	r3, #512	; 0x200
 8001bec:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8001bee:	2302      	movs	r3, #2
 8001bf0:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8001bf2:	2303      	movs	r3, #3
 8001bf4:	9305      	str	r3, [sp, #20]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001bf6:	f7fe fd41 	bl	800067c <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8001bfa:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8001bfe:	9302      	str	r3, [sp, #8]
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001c00:	2300      	movs	r3, #0
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001c02:	a902      	add	r1, sp, #8
 8001c04:	4804      	ldr	r0, [pc, #16]	; (8001c18 <HAL_UART_MspInit+0x74>)
    GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8001c06:	9303      	str	r3, [sp, #12]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001c08:	9304      	str	r3, [sp, #16]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8001c0a:	f7fe fd37 	bl	800067c <HAL_GPIO_Init>
  /* USER CODE BEGIN USART1_MspInit 1 */

  /* USER CODE END USART1_MspInit 1 */
  }

}
 8001c0e:	b006      	add	sp, #24
 8001c10:	bd10      	pop	{r4, pc}
 8001c12:	bf00      	nop
 8001c14:	40013800 	.word	0x40013800
 8001c18:	40010800 	.word	0x40010800

08001c1c <NMI_Handler>:
 8001c1c:	4770      	bx	lr

08001c1e <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8001c1e:	e7fe      	b.n	8001c1e <HardFault_Handler>

08001c20 <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 8001c20:	e7fe      	b.n	8001c20 <MemManage_Handler>

08001c22 <BusFault_Handler>:

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8001c22:	e7fe      	b.n	8001c22 <BusFault_Handler>

08001c24 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8001c24:	e7fe      	b.n	8001c24 <UsageFault_Handler>

08001c26 <SVC_Handler>:
 8001c26:	4770      	bx	lr

08001c28 <DebugMon_Handler>:
 8001c28:	4770      	bx	lr

08001c2a <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 8001c2a:	4770      	bx	lr

08001c2c <SysTick_Handler>:
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 8001c2c:	f7fe bb2c 	b.w	8000288 <HAL_IncTick>

08001c30 <USART1_IRQHandler>:
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8001c30:	4801      	ldr	r0, [pc, #4]	; (8001c38 <USART1_IRQHandler+0x8>)
 8001c32:	f7ff bc0d 	b.w	8001450 <HAL_UART_IRQHandler>
 8001c36:	bf00      	nop
 8001c38:	200000fc 	.word	0x200000fc

08001c3c <TIM7_IRQHandler>:
void TIM7_IRQHandler(void)
{
  /* USER CODE BEGIN TIM7_IRQn 0 */

  /* USER CODE END TIM7_IRQn 0 */
  HAL_TIM_IRQHandler(&htim7);
 8001c3c:	4801      	ldr	r0, [pc, #4]	; (8001c44 <TIM7_IRQHandler+0x8>)
 8001c3e:	f7ff b88a 	b.w	8000d56 <HAL_TIM_IRQHandler>
 8001c42:	bf00      	nop
 8001c44:	20000144 	.word	0x20000144

08001c48 <SystemInit>:
  */
void SystemInit (void)
{
  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  /* Set HSION bit */
  RCC->CR |= 0x00000001U;
 8001c48:	4b10      	ldr	r3, [pc, #64]	; (8001c8c <SystemInit+0x44>)
 8001c4a:	681a      	ldr	r2, [r3, #0]
 8001c4c:	f042 0201 	orr.w	r2, r2, #1
 8001c50:	601a      	str	r2, [r3, #0]

  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
  RCC->CFGR &= 0xF8FF0000U;
 8001c52:	6859      	ldr	r1, [r3, #4]
 8001c54:	4a0e      	ldr	r2, [pc, #56]	; (8001c90 <SystemInit+0x48>)
 8001c56:	400a      	ands	r2, r1
 8001c58:	605a      	str	r2, [r3, #4]
#else
  RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */   
  
  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= 0xFEF6FFFFU;
 8001c5a:	681a      	ldr	r2, [r3, #0]
 8001c5c:	f022 7284 	bic.w	r2, r2, #17301504	; 0x1080000
 8001c60:	f422 3280 	bic.w	r2, r2, #65536	; 0x10000
 8001c64:	601a      	str	r2, [r3, #0]

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8001c66:	681a      	ldr	r2, [r3, #0]
 8001c68:	f422 2280 	bic.w	r2, r2, #262144	; 0x40000
 8001c6c:	601a      	str	r2, [r3, #0]

  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  RCC->CFGR &= 0xFF80FFFFU;
 8001c6e:	685a      	ldr	r2, [r3, #4]
 8001c70:	f422 02fe 	bic.w	r2, r2, #8323072	; 0x7f0000
 8001c74:	605a      	str	r2, [r3, #4]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
  /* Disable all interrupts and clear pending bits  */
  RCC->CIR = 0x009F0000U;
 8001c76:	f44f 021f 	mov.w	r2, #10420224	; 0x9f0000
 8001c7a:	609a      	str	r2, [r3, #8]

  /* Reset CFGR2 register */
  RCC->CFGR2 = 0x00000000U;      
 8001c7c:	2200      	movs	r2, #0
 8001c7e:	62da      	str	r2, [r3, #44]	; 0x2c
#endif 

#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
 8001c80:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
 8001c84:	4b03      	ldr	r3, [pc, #12]	; (8001c94 <SystemInit+0x4c>)
 8001c86:	609a      	str	r2, [r3, #8]
 8001c88:	4770      	bx	lr
 8001c8a:	bf00      	nop
 8001c8c:	40021000 	.word	0x40021000
 8001c90:	f8ff0000 	.word	0xf8ff0000
 8001c94:	e000ed00 	.word	0xe000ed00

08001c98 <Reset_Handler>:
  .weak Reset_Handler
  .type Reset_Handler, %function
Reset_Handler:

/* Copy the data segment initializers from flash to SRAM */
  movs r1, #0
 8001c98:	2100      	movs	r1, #0
  b LoopCopyDataInit
 8001c9a:	e003      	b.n	8001ca4 <LoopCopyDataInit>

08001c9c <CopyDataInit>:

CopyDataInit:
  ldr r3, =_sidata
 8001c9c:	4b0b      	ldr	r3, [pc, #44]	; (8001ccc <LoopFillZerobss+0x14>)
  ldr r3, [r3, r1]
 8001c9e:	585b      	ldr	r3, [r3, r1]
  str r3, [r0, r1]
 8001ca0:	5043      	str	r3, [r0, r1]
  adds r1, r1, #4
 8001ca2:	3104      	adds	r1, #4

08001ca4 <LoopCopyDataInit>:

LoopCopyDataInit:
  ldr r0, =_sdata
 8001ca4:	480a      	ldr	r0, [pc, #40]	; (8001cd0 <LoopFillZerobss+0x18>)
  ldr r3, =_edata
 8001ca6:	4b0b      	ldr	r3, [pc, #44]	; (8001cd4 <LoopFillZerobss+0x1c>)
  adds r2, r0, r1
 8001ca8:	1842      	adds	r2, r0, r1
  cmp r2, r3
 8001caa:	429a      	cmp	r2, r3
  bcc CopyDataInit
 8001cac:	d3f6      	bcc.n	8001c9c <CopyDataInit>
  ldr r2, =_sbss
 8001cae:	4a0a      	ldr	r2, [pc, #40]	; (8001cd8 <LoopFillZerobss+0x20>)
  b LoopFillZerobss
 8001cb0:	e002      	b.n	8001cb8 <LoopFillZerobss>

08001cb2 <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
  movs r3, #0
 8001cb2:	2300      	movs	r3, #0
  str r3, [r2], #4
 8001cb4:	f842 3b04 	str.w	r3, [r2], #4

08001cb8 <LoopFillZerobss>:

LoopFillZerobss:
  ldr r3, = _ebss
 8001cb8:	4b08      	ldr	r3, [pc, #32]	; (8001cdc <LoopFillZerobss+0x24>)
  cmp r2, r3
 8001cba:	429a      	cmp	r2, r3
  bcc FillZerobss
 8001cbc:	d3f9      	bcc.n	8001cb2 <FillZerobss>

/* Call the clock system intitialization function.*/
    bl  SystemInit
 8001cbe:	f7ff ffc3 	bl	8001c48 <SystemInit>
/* Call static constructors */
    bl __libc_init_array
 8001cc2:	f000 f80f 	bl	8001ce4 <__libc_init_array>
/* Call the application's entry point.*/
  bl main
 8001cc6:	f7ff fde5 	bl	8001894 <main>
  bx lr
 8001cca:	4770      	bx	lr
  ldr r3, =_sidata
 8001ccc:	08002fd4 	.word	0x08002fd4
  ldr r0, =_sdata
 8001cd0:	20000000 	.word	0x20000000
  ldr r3, =_edata
 8001cd4:	20000074 	.word	0x20000074
  ldr r2, =_sbss
 8001cd8:	20000078 	.word	0x20000078
  ldr r3, = _ebss
 8001cdc:	2000028c 	.word	0x2000028c

08001ce0 <ADC1_IRQHandler>:
 * @retval : None
*/
    .section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b Infinite_Loop
 8001ce0:	e7fe      	b.n	8001ce0 <ADC1_IRQHandler>
	...

08001ce4 <__libc_init_array>:
 8001ce4:	b570      	push	{r4, r5, r6, lr}
 8001ce6:	2500      	movs	r5, #0
 8001ce8:	4e0c      	ldr	r6, [pc, #48]	; (8001d1c <__libc_init_array+0x38>)
 8001cea:	4c0d      	ldr	r4, [pc, #52]	; (8001d20 <__libc_init_array+0x3c>)
 8001cec:	1ba4      	subs	r4, r4, r6
 8001cee:	10a4      	asrs	r4, r4, #2
 8001cf0:	42a5      	cmp	r5, r4
 8001cf2:	d109      	bne.n	8001d08 <__libc_init_array+0x24>
 8001cf4:	f001 f87e 	bl	8002df4 <_init>
 8001cf8:	2500      	movs	r5, #0
 8001cfa:	4e0a      	ldr	r6, [pc, #40]	; (8001d24 <__libc_init_array+0x40>)
 8001cfc:	4c0a      	ldr	r4, [pc, #40]	; (8001d28 <__libc_init_array+0x44>)
 8001cfe:	1ba4      	subs	r4, r4, r6
 8001d00:	10a4      	asrs	r4, r4, #2
 8001d02:	42a5      	cmp	r5, r4
 8001d04:	d105      	bne.n	8001d12 <__libc_init_array+0x2e>
 8001d06:	bd70      	pop	{r4, r5, r6, pc}
 8001d08:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8001d0c:	4798      	blx	r3
 8001d0e:	3501      	adds	r5, #1
 8001d10:	e7ee      	b.n	8001cf0 <__libc_init_array+0xc>
 8001d12:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8001d16:	4798      	blx	r3
 8001d18:	3501      	adds	r5, #1
 8001d1a:	e7f2      	b.n	8001d02 <__libc_init_array+0x1e>
 8001d1c:	08002fcc 	.word	0x08002fcc
 8001d20:	08002fcc 	.word	0x08002fcc
 8001d24:	08002fcc 	.word	0x08002fcc
 8001d28:	08002fd0 	.word	0x08002fd0

08001d2c <memset>:
 8001d2c:	4603      	mov	r3, r0
 8001d2e:	4402      	add	r2, r0
 8001d30:	4293      	cmp	r3, r2
 8001d32:	d100      	bne.n	8001d36 <memset+0xa>
 8001d34:	4770      	bx	lr
 8001d36:	f803 1b01 	strb.w	r1, [r3], #1
 8001d3a:	e7f9      	b.n	8001d30 <memset+0x4>

08001d3c <iprintf>:
 8001d3c:	b40f      	push	{r0, r1, r2, r3}
 8001d3e:	4b0a      	ldr	r3, [pc, #40]	; (8001d68 <iprintf+0x2c>)
 8001d40:	b513      	push	{r0, r1, r4, lr}
 8001d42:	681c      	ldr	r4, [r3, #0]
 8001d44:	b124      	cbz	r4, 8001d50 <iprintf+0x14>
 8001d46:	69a3      	ldr	r3, [r4, #24]
 8001d48:	b913      	cbnz	r3, 8001d50 <iprintf+0x14>
 8001d4a:	4620      	mov	r0, r4
 8001d4c:	f000 fada 	bl	8002304 <__sinit>
 8001d50:	ab05      	add	r3, sp, #20
 8001d52:	9a04      	ldr	r2, [sp, #16]
 8001d54:	68a1      	ldr	r1, [r4, #8]
 8001d56:	4620      	mov	r0, r4
 8001d58:	9301      	str	r3, [sp, #4]
 8001d5a:	f000 fc9b 	bl	8002694 <_vfiprintf_r>
 8001d5e:	b002      	add	sp, #8
 8001d60:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 8001d64:	b004      	add	sp, #16
 8001d66:	4770      	bx	lr
 8001d68:	20000010 	.word	0x20000010

08001d6c <_puts_r>:
 8001d6c:	b570      	push	{r4, r5, r6, lr}
 8001d6e:	460e      	mov	r6, r1
 8001d70:	4605      	mov	r5, r0
 8001d72:	b118      	cbz	r0, 8001d7c <_puts_r+0x10>
 8001d74:	6983      	ldr	r3, [r0, #24]
 8001d76:	b90b      	cbnz	r3, 8001d7c <_puts_r+0x10>
 8001d78:	f000 fac4 	bl	8002304 <__sinit>
 8001d7c:	69ab      	ldr	r3, [r5, #24]
 8001d7e:	68ac      	ldr	r4, [r5, #8]
 8001d80:	b913      	cbnz	r3, 8001d88 <_puts_r+0x1c>
 8001d82:	4628      	mov	r0, r5
 8001d84:	f000 fabe 	bl	8002304 <__sinit>
 8001d88:	4b23      	ldr	r3, [pc, #140]	; (8001e18 <_puts_r+0xac>)
 8001d8a:	429c      	cmp	r4, r3
 8001d8c:	d117      	bne.n	8001dbe <_puts_r+0x52>
 8001d8e:	686c      	ldr	r4, [r5, #4]
 8001d90:	89a3      	ldrh	r3, [r4, #12]
 8001d92:	071b      	lsls	r3, r3, #28
 8001d94:	d51d      	bpl.n	8001dd2 <_puts_r+0x66>
 8001d96:	6923      	ldr	r3, [r4, #16]
 8001d98:	b1db      	cbz	r3, 8001dd2 <_puts_r+0x66>
 8001d9a:	3e01      	subs	r6, #1
 8001d9c:	68a3      	ldr	r3, [r4, #8]
 8001d9e:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 8001da2:	3b01      	subs	r3, #1
 8001da4:	60a3      	str	r3, [r4, #8]
 8001da6:	b9e9      	cbnz	r1, 8001de4 <_puts_r+0x78>
 8001da8:	2b00      	cmp	r3, #0
 8001daa:	da2e      	bge.n	8001e0a <_puts_r+0x9e>
 8001dac:	4622      	mov	r2, r4
 8001dae:	210a      	movs	r1, #10
 8001db0:	4628      	mov	r0, r5
 8001db2:	f000 f8f5 	bl	8001fa0 <__swbuf_r>
 8001db6:	3001      	adds	r0, #1
 8001db8:	d011      	beq.n	8001dde <_puts_r+0x72>
 8001dba:	200a      	movs	r0, #10
 8001dbc:	bd70      	pop	{r4, r5, r6, pc}
 8001dbe:	4b17      	ldr	r3, [pc, #92]	; (8001e1c <_puts_r+0xb0>)
 8001dc0:	429c      	cmp	r4, r3
 8001dc2:	d101      	bne.n	8001dc8 <_puts_r+0x5c>
 8001dc4:	68ac      	ldr	r4, [r5, #8]
 8001dc6:	e7e3      	b.n	8001d90 <_puts_r+0x24>
 8001dc8:	4b15      	ldr	r3, [pc, #84]	; (8001e20 <_puts_r+0xb4>)
 8001dca:	429c      	cmp	r4, r3
 8001dcc:	bf08      	it	eq
 8001dce:	68ec      	ldreq	r4, [r5, #12]
 8001dd0:	e7de      	b.n	8001d90 <_puts_r+0x24>
 8001dd2:	4621      	mov	r1, r4
 8001dd4:	4628      	mov	r0, r5
 8001dd6:	f000 f935 	bl	8002044 <__swsetup_r>
 8001dda:	2800      	cmp	r0, #0
 8001ddc:	d0dd      	beq.n	8001d9a <_puts_r+0x2e>
 8001dde:	f04f 30ff 	mov.w	r0, #4294967295
 8001de2:	bd70      	pop	{r4, r5, r6, pc}
 8001de4:	2b00      	cmp	r3, #0
 8001de6:	da04      	bge.n	8001df2 <_puts_r+0x86>
 8001de8:	69a2      	ldr	r2, [r4, #24]
 8001dea:	4293      	cmp	r3, r2
 8001dec:	db06      	blt.n	8001dfc <_puts_r+0x90>
 8001dee:	290a      	cmp	r1, #10
 8001df0:	d004      	beq.n	8001dfc <_puts_r+0x90>
 8001df2:	6823      	ldr	r3, [r4, #0]
 8001df4:	1c5a      	adds	r2, r3, #1
 8001df6:	6022      	str	r2, [r4, #0]
 8001df8:	7019      	strb	r1, [r3, #0]
 8001dfa:	e7cf      	b.n	8001d9c <_puts_r+0x30>
 8001dfc:	4622      	mov	r2, r4
 8001dfe:	4628      	mov	r0, r5
 8001e00:	f000 f8ce 	bl	8001fa0 <__swbuf_r>
 8001e04:	3001      	adds	r0, #1
 8001e06:	d1c9      	bne.n	8001d9c <_puts_r+0x30>
 8001e08:	e7e9      	b.n	8001dde <_puts_r+0x72>
 8001e0a:	200a      	movs	r0, #10
 8001e0c:	6823      	ldr	r3, [r4, #0]
 8001e0e:	1c5a      	adds	r2, r3, #1
 8001e10:	6022      	str	r2, [r4, #0]
 8001e12:	7018      	strb	r0, [r3, #0]
 8001e14:	bd70      	pop	{r4, r5, r6, pc}
 8001e16:	bf00      	nop
 8001e18:	08002f58 	.word	0x08002f58
 8001e1c:	08002f78 	.word	0x08002f78
 8001e20:	08002f38 	.word	0x08002f38

08001e24 <puts>:
 8001e24:	4b02      	ldr	r3, [pc, #8]	; (8001e30 <puts+0xc>)
 8001e26:	4601      	mov	r1, r0
 8001e28:	6818      	ldr	r0, [r3, #0]
 8001e2a:	f7ff bf9f 	b.w	8001d6c <_puts_r>
 8001e2e:	bf00      	nop
 8001e30:	20000010 	.word	0x20000010

08001e34 <setbuf>:
 8001e34:	2900      	cmp	r1, #0
 8001e36:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8001e3a:	bf0c      	ite	eq
 8001e3c:	2202      	moveq	r2, #2
 8001e3e:	2200      	movne	r2, #0
 8001e40:	f000 b800 	b.w	8001e44 <setvbuf>

08001e44 <setvbuf>:
 8001e44:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 8001e48:	461d      	mov	r5, r3
 8001e4a:	4b51      	ldr	r3, [pc, #324]	; (8001f90 <setvbuf+0x14c>)
 8001e4c:	4604      	mov	r4, r0
 8001e4e:	681e      	ldr	r6, [r3, #0]
 8001e50:	460f      	mov	r7, r1
 8001e52:	4690      	mov	r8, r2
 8001e54:	b126      	cbz	r6, 8001e60 <setvbuf+0x1c>
 8001e56:	69b3      	ldr	r3, [r6, #24]
 8001e58:	b913      	cbnz	r3, 8001e60 <setvbuf+0x1c>
 8001e5a:	4630      	mov	r0, r6
 8001e5c:	f000 fa52 	bl	8002304 <__sinit>
 8001e60:	4b4c      	ldr	r3, [pc, #304]	; (8001f94 <setvbuf+0x150>)
 8001e62:	429c      	cmp	r4, r3
 8001e64:	d152      	bne.n	8001f0c <setvbuf+0xc8>
 8001e66:	6874      	ldr	r4, [r6, #4]
 8001e68:	f1b8 0f02 	cmp.w	r8, #2
 8001e6c:	d006      	beq.n	8001e7c <setvbuf+0x38>
 8001e6e:	f1b8 0f01 	cmp.w	r8, #1
 8001e72:	f200 8089 	bhi.w	8001f88 <setvbuf+0x144>
 8001e76:	2d00      	cmp	r5, #0
 8001e78:	f2c0 8086 	blt.w	8001f88 <setvbuf+0x144>
 8001e7c:	4621      	mov	r1, r4
 8001e7e:	4630      	mov	r0, r6
 8001e80:	f000 f9d6 	bl	8002230 <_fflush_r>
 8001e84:	6b61      	ldr	r1, [r4, #52]	; 0x34
 8001e86:	b141      	cbz	r1, 8001e9a <setvbuf+0x56>
 8001e88:	f104 0344 	add.w	r3, r4, #68	; 0x44
 8001e8c:	4299      	cmp	r1, r3
 8001e8e:	d002      	beq.n	8001e96 <setvbuf+0x52>
 8001e90:	4630      	mov	r0, r6
 8001e92:	f000 fb2d 	bl	80024f0 <_free_r>
 8001e96:	2300      	movs	r3, #0
 8001e98:	6363      	str	r3, [r4, #52]	; 0x34
 8001e9a:	2300      	movs	r3, #0
 8001e9c:	61a3      	str	r3, [r4, #24]
 8001e9e:	6063      	str	r3, [r4, #4]
 8001ea0:	89a3      	ldrh	r3, [r4, #12]
 8001ea2:	061b      	lsls	r3, r3, #24
 8001ea4:	d503      	bpl.n	8001eae <setvbuf+0x6a>
 8001ea6:	6921      	ldr	r1, [r4, #16]
 8001ea8:	4630      	mov	r0, r6
 8001eaa:	f000 fb21 	bl	80024f0 <_free_r>
 8001eae:	89a3      	ldrh	r3, [r4, #12]
 8001eb0:	f1b8 0f02 	cmp.w	r8, #2
 8001eb4:	f423 634a 	bic.w	r3, r3, #3232	; 0xca0
 8001eb8:	f023 0303 	bic.w	r3, r3, #3
 8001ebc:	81a3      	strh	r3, [r4, #12]
 8001ebe:	d05d      	beq.n	8001f7c <setvbuf+0x138>
 8001ec0:	ab01      	add	r3, sp, #4
 8001ec2:	466a      	mov	r2, sp
 8001ec4:	4621      	mov	r1, r4
 8001ec6:	4630      	mov	r0, r6
 8001ec8:	f000 faa6 	bl	8002418 <__swhatbuf_r>
 8001ecc:	89a3      	ldrh	r3, [r4, #12]
 8001ece:	4318      	orrs	r0, r3
 8001ed0:	81a0      	strh	r0, [r4, #12]
 8001ed2:	bb2d      	cbnz	r5, 8001f20 <setvbuf+0xdc>
 8001ed4:	9d00      	ldr	r5, [sp, #0]
 8001ed6:	4628      	mov	r0, r5
 8001ed8:	f000 fb02 	bl	80024e0 <malloc>
 8001edc:	4607      	mov	r7, r0
 8001ede:	2800      	cmp	r0, #0
 8001ee0:	d14e      	bne.n	8001f80 <setvbuf+0x13c>
 8001ee2:	f8dd 9000 	ldr.w	r9, [sp]
 8001ee6:	45a9      	cmp	r9, r5
 8001ee8:	d13c      	bne.n	8001f64 <setvbuf+0x120>
 8001eea:	f04f 30ff 	mov.w	r0, #4294967295
 8001eee:	89a3      	ldrh	r3, [r4, #12]
 8001ef0:	f043 0302 	orr.w	r3, r3, #2
 8001ef4:	81a3      	strh	r3, [r4, #12]
 8001ef6:	2300      	movs	r3, #0
 8001ef8:	60a3      	str	r3, [r4, #8]
 8001efa:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8001efe:	6023      	str	r3, [r4, #0]
 8001f00:	6123      	str	r3, [r4, #16]
 8001f02:	2301      	movs	r3, #1
 8001f04:	6163      	str	r3, [r4, #20]
 8001f06:	b003      	add	sp, #12
 8001f08:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8001f0c:	4b22      	ldr	r3, [pc, #136]	; (8001f98 <setvbuf+0x154>)
 8001f0e:	429c      	cmp	r4, r3
 8001f10:	d101      	bne.n	8001f16 <setvbuf+0xd2>
 8001f12:	68b4      	ldr	r4, [r6, #8]
 8001f14:	e7a8      	b.n	8001e68 <setvbuf+0x24>
 8001f16:	4b21      	ldr	r3, [pc, #132]	; (8001f9c <setvbuf+0x158>)
 8001f18:	429c      	cmp	r4, r3
 8001f1a:	bf08      	it	eq
 8001f1c:	68f4      	ldreq	r4, [r6, #12]
 8001f1e:	e7a3      	b.n	8001e68 <setvbuf+0x24>
 8001f20:	2f00      	cmp	r7, #0
 8001f22:	d0d8      	beq.n	8001ed6 <setvbuf+0x92>
 8001f24:	69b3      	ldr	r3, [r6, #24]
 8001f26:	b913      	cbnz	r3, 8001f2e <setvbuf+0xea>
 8001f28:	4630      	mov	r0, r6
 8001f2a:	f000 f9eb 	bl	8002304 <__sinit>
 8001f2e:	f1b8 0f01 	cmp.w	r8, #1
 8001f32:	bf08      	it	eq
 8001f34:	89a3      	ldrheq	r3, [r4, #12]
 8001f36:	6027      	str	r7, [r4, #0]
 8001f38:	bf04      	itt	eq
 8001f3a:	f043 0301 	orreq.w	r3, r3, #1
 8001f3e:	81a3      	strheq	r3, [r4, #12]
 8001f40:	89a3      	ldrh	r3, [r4, #12]
 8001f42:	6127      	str	r7, [r4, #16]
 8001f44:	f013 0008 	ands.w	r0, r3, #8
 8001f48:	6165      	str	r5, [r4, #20]
 8001f4a:	d01b      	beq.n	8001f84 <setvbuf+0x140>
 8001f4c:	f013 0001 	ands.w	r0, r3, #1
 8001f50:	f04f 0300 	mov.w	r3, #0
 8001f54:	bf1f      	itttt	ne
 8001f56:	426d      	negne	r5, r5
 8001f58:	60a3      	strne	r3, [r4, #8]
 8001f5a:	61a5      	strne	r5, [r4, #24]
 8001f5c:	4618      	movne	r0, r3
 8001f5e:	bf08      	it	eq
 8001f60:	60a5      	streq	r5, [r4, #8]
 8001f62:	e7d0      	b.n	8001f06 <setvbuf+0xc2>
 8001f64:	4648      	mov	r0, r9
 8001f66:	f000 fabb 	bl	80024e0 <malloc>
 8001f6a:	4607      	mov	r7, r0
 8001f6c:	2800      	cmp	r0, #0
 8001f6e:	d0bc      	beq.n	8001eea <setvbuf+0xa6>
 8001f70:	89a3      	ldrh	r3, [r4, #12]
 8001f72:	464d      	mov	r5, r9
 8001f74:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 8001f78:	81a3      	strh	r3, [r4, #12]
 8001f7a:	e7d3      	b.n	8001f24 <setvbuf+0xe0>
 8001f7c:	2000      	movs	r0, #0
 8001f7e:	e7b6      	b.n	8001eee <setvbuf+0xaa>
 8001f80:	46a9      	mov	r9, r5
 8001f82:	e7f5      	b.n	8001f70 <setvbuf+0x12c>
 8001f84:	60a0      	str	r0, [r4, #8]
 8001f86:	e7be      	b.n	8001f06 <setvbuf+0xc2>
 8001f88:	f04f 30ff 	mov.w	r0, #4294967295
 8001f8c:	e7bb      	b.n	8001f06 <setvbuf+0xc2>
 8001f8e:	bf00      	nop
 8001f90:	20000010 	.word	0x20000010
 8001f94:	08002f58 	.word	0x08002f58
 8001f98:	08002f78 	.word	0x08002f78
 8001f9c:	08002f38 	.word	0x08002f38

08001fa0 <__swbuf_r>:
 8001fa0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8001fa2:	460e      	mov	r6, r1
 8001fa4:	4614      	mov	r4, r2
 8001fa6:	4605      	mov	r5, r0
 8001fa8:	b118      	cbz	r0, 8001fb2 <__swbuf_r+0x12>
 8001faa:	6983      	ldr	r3, [r0, #24]
 8001fac:	b90b      	cbnz	r3, 8001fb2 <__swbuf_r+0x12>
 8001fae:	f000 f9a9 	bl	8002304 <__sinit>
 8001fb2:	4b21      	ldr	r3, [pc, #132]	; (8002038 <__swbuf_r+0x98>)
 8001fb4:	429c      	cmp	r4, r3
 8001fb6:	d12a      	bne.n	800200e <__swbuf_r+0x6e>
 8001fb8:	686c      	ldr	r4, [r5, #4]
 8001fba:	69a3      	ldr	r3, [r4, #24]
 8001fbc:	60a3      	str	r3, [r4, #8]
 8001fbe:	89a3      	ldrh	r3, [r4, #12]
 8001fc0:	071a      	lsls	r2, r3, #28
 8001fc2:	d52e      	bpl.n	8002022 <__swbuf_r+0x82>
 8001fc4:	6923      	ldr	r3, [r4, #16]
 8001fc6:	b363      	cbz	r3, 8002022 <__swbuf_r+0x82>
 8001fc8:	6923      	ldr	r3, [r4, #16]
 8001fca:	6820      	ldr	r0, [r4, #0]
 8001fcc:	b2f6      	uxtb	r6, r6
 8001fce:	1ac0      	subs	r0, r0, r3
 8001fd0:	6963      	ldr	r3, [r4, #20]
 8001fd2:	4637      	mov	r7, r6
 8001fd4:	4298      	cmp	r0, r3
 8001fd6:	db04      	blt.n	8001fe2 <__swbuf_r+0x42>
 8001fd8:	4621      	mov	r1, r4
 8001fda:	4628      	mov	r0, r5
 8001fdc:	f000 f928 	bl	8002230 <_fflush_r>
 8001fe0:	bb28      	cbnz	r0, 800202e <__swbuf_r+0x8e>
 8001fe2:	68a3      	ldr	r3, [r4, #8]
 8001fe4:	3001      	adds	r0, #1
 8001fe6:	3b01      	subs	r3, #1
 8001fe8:	60a3      	str	r3, [r4, #8]
 8001fea:	6823      	ldr	r3, [r4, #0]
 8001fec:	1c5a      	adds	r2, r3, #1
 8001fee:	6022      	str	r2, [r4, #0]
 8001ff0:	701e      	strb	r6, [r3, #0]
 8001ff2:	6963      	ldr	r3, [r4, #20]
 8001ff4:	4298      	cmp	r0, r3
 8001ff6:	d004      	beq.n	8002002 <__swbuf_r+0x62>
 8001ff8:	89a3      	ldrh	r3, [r4, #12]
 8001ffa:	07db      	lsls	r3, r3, #31
 8001ffc:	d519      	bpl.n	8002032 <__swbuf_r+0x92>
 8001ffe:	2e0a      	cmp	r6, #10
 8002000:	d117      	bne.n	8002032 <__swbuf_r+0x92>
 8002002:	4621      	mov	r1, r4
 8002004:	4628      	mov	r0, r5
 8002006:	f000 f913 	bl	8002230 <_fflush_r>
 800200a:	b190      	cbz	r0, 8002032 <__swbuf_r+0x92>
 800200c:	e00f      	b.n	800202e <__swbuf_r+0x8e>
 800200e:	4b0b      	ldr	r3, [pc, #44]	; (800203c <__swbuf_r+0x9c>)
 8002010:	429c      	cmp	r4, r3
 8002012:	d101      	bne.n	8002018 <__swbuf_r+0x78>
 8002014:	68ac      	ldr	r4, [r5, #8]
 8002016:	e7d0      	b.n	8001fba <__swbuf_r+0x1a>
 8002018:	4b09      	ldr	r3, [pc, #36]	; (8002040 <__swbuf_r+0xa0>)
 800201a:	429c      	cmp	r4, r3
 800201c:	bf08      	it	eq
 800201e:	68ec      	ldreq	r4, [r5, #12]
 8002020:	e7cb      	b.n	8001fba <__swbuf_r+0x1a>
 8002022:	4621      	mov	r1, r4
 8002024:	4628      	mov	r0, r5
 8002026:	f000 f80d 	bl	8002044 <__swsetup_r>
 800202a:	2800      	cmp	r0, #0
 800202c:	d0cc      	beq.n	8001fc8 <__swbuf_r+0x28>
 800202e:	f04f 37ff 	mov.w	r7, #4294967295
 8002032:	4638      	mov	r0, r7
 8002034:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 8002036:	bf00      	nop
 8002038:	08002f58 	.word	0x08002f58
 800203c:	08002f78 	.word	0x08002f78
 8002040:	08002f38 	.word	0x08002f38

08002044 <__swsetup_r>:
 8002044:	4b32      	ldr	r3, [pc, #200]	; (8002110 <__swsetup_r+0xcc>)
 8002046:	b570      	push	{r4, r5, r6, lr}
 8002048:	681d      	ldr	r5, [r3, #0]
 800204a:	4606      	mov	r6, r0
 800204c:	460c      	mov	r4, r1
 800204e:	b125      	cbz	r5, 800205a <__swsetup_r+0x16>
 8002050:	69ab      	ldr	r3, [r5, #24]
 8002052:	b913      	cbnz	r3, 800205a <__swsetup_r+0x16>
 8002054:	4628      	mov	r0, r5
 8002056:	f000 f955 	bl	8002304 <__sinit>
 800205a:	4b2e      	ldr	r3, [pc, #184]	; (8002114 <__swsetup_r+0xd0>)
 800205c:	429c      	cmp	r4, r3
 800205e:	d10f      	bne.n	8002080 <__swsetup_r+0x3c>
 8002060:	686c      	ldr	r4, [r5, #4]
 8002062:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002066:	b29a      	uxth	r2, r3
 8002068:	0715      	lsls	r5, r2, #28
 800206a:	d42c      	bmi.n	80020c6 <__swsetup_r+0x82>
 800206c:	06d0      	lsls	r0, r2, #27
 800206e:	d411      	bmi.n	8002094 <__swsetup_r+0x50>
 8002070:	2209      	movs	r2, #9
 8002072:	6032      	str	r2, [r6, #0]
 8002074:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8002078:	81a3      	strh	r3, [r4, #12]
 800207a:	f04f 30ff 	mov.w	r0, #4294967295
 800207e:	bd70      	pop	{r4, r5, r6, pc}
 8002080:	4b25      	ldr	r3, [pc, #148]	; (8002118 <__swsetup_r+0xd4>)
 8002082:	429c      	cmp	r4, r3
 8002084:	d101      	bne.n	800208a <__swsetup_r+0x46>
 8002086:	68ac      	ldr	r4, [r5, #8]
 8002088:	e7eb      	b.n	8002062 <__swsetup_r+0x1e>
 800208a:	4b24      	ldr	r3, [pc, #144]	; (800211c <__swsetup_r+0xd8>)
 800208c:	429c      	cmp	r4, r3
 800208e:	bf08      	it	eq
 8002090:	68ec      	ldreq	r4, [r5, #12]
 8002092:	e7e6      	b.n	8002062 <__swsetup_r+0x1e>
 8002094:	0751      	lsls	r1, r2, #29
 8002096:	d512      	bpl.n	80020be <__swsetup_r+0x7a>
 8002098:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800209a:	b141      	cbz	r1, 80020ae <__swsetup_r+0x6a>
 800209c:	f104 0344 	add.w	r3, r4, #68	; 0x44
 80020a0:	4299      	cmp	r1, r3
 80020a2:	d002      	beq.n	80020aa <__swsetup_r+0x66>
 80020a4:	4630      	mov	r0, r6
 80020a6:	f000 fa23 	bl	80024f0 <_free_r>
 80020aa:	2300      	movs	r3, #0
 80020ac:	6363      	str	r3, [r4, #52]	; 0x34
 80020ae:	89a3      	ldrh	r3, [r4, #12]
 80020b0:	f023 0324 	bic.w	r3, r3, #36	; 0x24
 80020b4:	81a3      	strh	r3, [r4, #12]
 80020b6:	2300      	movs	r3, #0
 80020b8:	6063      	str	r3, [r4, #4]
 80020ba:	6923      	ldr	r3, [r4, #16]
 80020bc:	6023      	str	r3, [r4, #0]
 80020be:	89a3      	ldrh	r3, [r4, #12]
 80020c0:	f043 0308 	orr.w	r3, r3, #8
 80020c4:	81a3      	strh	r3, [r4, #12]
 80020c6:	6923      	ldr	r3, [r4, #16]
 80020c8:	b94b      	cbnz	r3, 80020de <__swsetup_r+0x9a>
 80020ca:	89a3      	ldrh	r3, [r4, #12]
 80020cc:	f403 7320 	and.w	r3, r3, #640	; 0x280
 80020d0:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 80020d4:	d003      	beq.n	80020de <__swsetup_r+0x9a>
 80020d6:	4621      	mov	r1, r4
 80020d8:	4630      	mov	r0, r6
 80020da:	f000 f9c1 	bl	8002460 <__smakebuf_r>
 80020de:	89a2      	ldrh	r2, [r4, #12]
 80020e0:	f012 0301 	ands.w	r3, r2, #1
 80020e4:	d00c      	beq.n	8002100 <__swsetup_r+0xbc>
 80020e6:	2300      	movs	r3, #0
 80020e8:	60a3      	str	r3, [r4, #8]
 80020ea:	6963      	ldr	r3, [r4, #20]
 80020ec:	425b      	negs	r3, r3
 80020ee:	61a3      	str	r3, [r4, #24]
 80020f0:	6923      	ldr	r3, [r4, #16]
 80020f2:	b953      	cbnz	r3, 800210a <__swsetup_r+0xc6>
 80020f4:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 80020f8:	f013 0080 	ands.w	r0, r3, #128	; 0x80
 80020fc:	d1ba      	bne.n	8002074 <__swsetup_r+0x30>
 80020fe:	bd70      	pop	{r4, r5, r6, pc}
 8002100:	0792      	lsls	r2, r2, #30
 8002102:	bf58      	it	pl
 8002104:	6963      	ldrpl	r3, [r4, #20]
 8002106:	60a3      	str	r3, [r4, #8]
 8002108:	e7f2      	b.n	80020f0 <__swsetup_r+0xac>
 800210a:	2000      	movs	r0, #0
 800210c:	e7f7      	b.n	80020fe <__swsetup_r+0xba>
 800210e:	bf00      	nop
 8002110:	20000010 	.word	0x20000010
 8002114:	08002f58 	.word	0x08002f58
 8002118:	08002f78 	.word	0x08002f78
 800211c:	08002f38 	.word	0x08002f38

08002120 <__sflush_r>:
 8002120:	898a      	ldrh	r2, [r1, #12]
 8002122:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8002126:	4605      	mov	r5, r0
 8002128:	0710      	lsls	r0, r2, #28
 800212a:	460c      	mov	r4, r1
 800212c:	d45a      	bmi.n	80021e4 <__sflush_r+0xc4>
 800212e:	684b      	ldr	r3, [r1, #4]
 8002130:	2b00      	cmp	r3, #0
 8002132:	dc05      	bgt.n	8002140 <__sflush_r+0x20>
 8002134:	6c0b      	ldr	r3, [r1, #64]	; 0x40
 8002136:	2b00      	cmp	r3, #0
 8002138:	dc02      	bgt.n	8002140 <__sflush_r+0x20>
 800213a:	2000      	movs	r0, #0
 800213c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8002140:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 8002142:	2e00      	cmp	r6, #0
 8002144:	d0f9      	beq.n	800213a <__sflush_r+0x1a>
 8002146:	2300      	movs	r3, #0
 8002148:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
 800214c:	682f      	ldr	r7, [r5, #0]
 800214e:	602b      	str	r3, [r5, #0]
 8002150:	d033      	beq.n	80021ba <__sflush_r+0x9a>
 8002152:	6d60      	ldr	r0, [r4, #84]	; 0x54
 8002154:	89a3      	ldrh	r3, [r4, #12]
 8002156:	075a      	lsls	r2, r3, #29
 8002158:	d505      	bpl.n	8002166 <__sflush_r+0x46>
 800215a:	6863      	ldr	r3, [r4, #4]
 800215c:	1ac0      	subs	r0, r0, r3
 800215e:	6b63      	ldr	r3, [r4, #52]	; 0x34
 8002160:	b10b      	cbz	r3, 8002166 <__sflush_r+0x46>
 8002162:	6c23      	ldr	r3, [r4, #64]	; 0x40
 8002164:	1ac0      	subs	r0, r0, r3
 8002166:	2300      	movs	r3, #0
 8002168:	4602      	mov	r2, r0
 800216a:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
 800216c:	6a21      	ldr	r1, [r4, #32]
 800216e:	4628      	mov	r0, r5
 8002170:	47b0      	blx	r6
 8002172:	1c43      	adds	r3, r0, #1
 8002174:	89a3      	ldrh	r3, [r4, #12]
 8002176:	d106      	bne.n	8002186 <__sflush_r+0x66>
 8002178:	6829      	ldr	r1, [r5, #0]
 800217a:	291d      	cmp	r1, #29
 800217c:	d84b      	bhi.n	8002216 <__sflush_r+0xf6>
 800217e:	4a2b      	ldr	r2, [pc, #172]	; (800222c <__sflush_r+0x10c>)
 8002180:	40ca      	lsrs	r2, r1
 8002182:	07d6      	lsls	r6, r2, #31
 8002184:	d547      	bpl.n	8002216 <__sflush_r+0xf6>
 8002186:	2200      	movs	r2, #0
 8002188:	6062      	str	r2, [r4, #4]
 800218a:	6922      	ldr	r2, [r4, #16]
 800218c:	04d9      	lsls	r1, r3, #19
 800218e:	6022      	str	r2, [r4, #0]
 8002190:	d504      	bpl.n	800219c <__sflush_r+0x7c>
 8002192:	1c42      	adds	r2, r0, #1
 8002194:	d101      	bne.n	800219a <__sflush_r+0x7a>
 8002196:	682b      	ldr	r3, [r5, #0]
 8002198:	b903      	cbnz	r3, 800219c <__sflush_r+0x7c>
 800219a:	6560      	str	r0, [r4, #84]	; 0x54
 800219c:	6b61      	ldr	r1, [r4, #52]	; 0x34
 800219e:	602f      	str	r7, [r5, #0]
 80021a0:	2900      	cmp	r1, #0
 80021a2:	d0ca      	beq.n	800213a <__sflush_r+0x1a>
 80021a4:	f104 0344 	add.w	r3, r4, #68	; 0x44
 80021a8:	4299      	cmp	r1, r3
 80021aa:	d002      	beq.n	80021b2 <__sflush_r+0x92>
 80021ac:	4628      	mov	r0, r5
 80021ae:	f000 f99f 	bl	80024f0 <_free_r>
 80021b2:	2000      	movs	r0, #0
 80021b4:	6360      	str	r0, [r4, #52]	; 0x34
 80021b6:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80021ba:	6a21      	ldr	r1, [r4, #32]
 80021bc:	2301      	movs	r3, #1
 80021be:	4628      	mov	r0, r5
 80021c0:	47b0      	blx	r6
 80021c2:	1c41      	adds	r1, r0, #1
 80021c4:	d1c6      	bne.n	8002154 <__sflush_r+0x34>
 80021c6:	682b      	ldr	r3, [r5, #0]
 80021c8:	2b00      	cmp	r3, #0
 80021ca:	d0c3      	beq.n	8002154 <__sflush_r+0x34>
 80021cc:	2b1d      	cmp	r3, #29
 80021ce:	d001      	beq.n	80021d4 <__sflush_r+0xb4>
 80021d0:	2b16      	cmp	r3, #22
 80021d2:	d101      	bne.n	80021d8 <__sflush_r+0xb8>
 80021d4:	602f      	str	r7, [r5, #0]
 80021d6:	e7b0      	b.n	800213a <__sflush_r+0x1a>
 80021d8:	89a3      	ldrh	r3, [r4, #12]
 80021da:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 80021de:	81a3      	strh	r3, [r4, #12]
 80021e0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80021e4:	690f      	ldr	r7, [r1, #16]
 80021e6:	2f00      	cmp	r7, #0
 80021e8:	d0a7      	beq.n	800213a <__sflush_r+0x1a>
 80021ea:	0793      	lsls	r3, r2, #30
 80021ec:	bf18      	it	ne
 80021ee:	2300      	movne	r3, #0
 80021f0:	680e      	ldr	r6, [r1, #0]
 80021f2:	bf08      	it	eq
 80021f4:	694b      	ldreq	r3, [r1, #20]
 80021f6:	eba6 0807 	sub.w	r8, r6, r7
 80021fa:	600f      	str	r7, [r1, #0]
 80021fc:	608b      	str	r3, [r1, #8]
 80021fe:	f1b8 0f00 	cmp.w	r8, #0
 8002202:	dd9a      	ble.n	800213a <__sflush_r+0x1a>
 8002204:	4643      	mov	r3, r8
 8002206:	463a      	mov	r2, r7
 8002208:	6a21      	ldr	r1, [r4, #32]
 800220a:	4628      	mov	r0, r5
 800220c:	6aa6      	ldr	r6, [r4, #40]	; 0x28
 800220e:	47b0      	blx	r6
 8002210:	2800      	cmp	r0, #0
 8002212:	dc07      	bgt.n	8002224 <__sflush_r+0x104>
 8002214:	89a3      	ldrh	r3, [r4, #12]
 8002216:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 800221a:	81a3      	strh	r3, [r4, #12]
 800221c:	f04f 30ff 	mov.w	r0, #4294967295
 8002220:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 8002224:	4407      	add	r7, r0
 8002226:	eba8 0800 	sub.w	r8, r8, r0
 800222a:	e7e8      	b.n	80021fe <__sflush_r+0xde>
 800222c:	20400001 	.word	0x20400001

08002230 <_fflush_r>:
 8002230:	b538      	push	{r3, r4, r5, lr}
 8002232:	690b      	ldr	r3, [r1, #16]
 8002234:	4605      	mov	r5, r0
 8002236:	460c      	mov	r4, r1
 8002238:	b1db      	cbz	r3, 8002272 <_fflush_r+0x42>
 800223a:	b118      	cbz	r0, 8002244 <_fflush_r+0x14>
 800223c:	6983      	ldr	r3, [r0, #24]
 800223e:	b90b      	cbnz	r3, 8002244 <_fflush_r+0x14>
 8002240:	f000 f860 	bl	8002304 <__sinit>
 8002244:	4b0c      	ldr	r3, [pc, #48]	; (8002278 <_fflush_r+0x48>)
 8002246:	429c      	cmp	r4, r3
 8002248:	d109      	bne.n	800225e <_fflush_r+0x2e>
 800224a:	686c      	ldr	r4, [r5, #4]
 800224c:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002250:	b17b      	cbz	r3, 8002272 <_fflush_r+0x42>
 8002252:	4621      	mov	r1, r4
 8002254:	4628      	mov	r0, r5
 8002256:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800225a:	f7ff bf61 	b.w	8002120 <__sflush_r>
 800225e:	4b07      	ldr	r3, [pc, #28]	; (800227c <_fflush_r+0x4c>)
 8002260:	429c      	cmp	r4, r3
 8002262:	d101      	bne.n	8002268 <_fflush_r+0x38>
 8002264:	68ac      	ldr	r4, [r5, #8]
 8002266:	e7f1      	b.n	800224c <_fflush_r+0x1c>
 8002268:	4b05      	ldr	r3, [pc, #20]	; (8002280 <_fflush_r+0x50>)
 800226a:	429c      	cmp	r4, r3
 800226c:	bf08      	it	eq
 800226e:	68ec      	ldreq	r4, [r5, #12]
 8002270:	e7ec      	b.n	800224c <_fflush_r+0x1c>
 8002272:	2000      	movs	r0, #0
 8002274:	bd38      	pop	{r3, r4, r5, pc}
 8002276:	bf00      	nop
 8002278:	08002f58 	.word	0x08002f58
 800227c:	08002f78 	.word	0x08002f78
 8002280:	08002f38 	.word	0x08002f38

08002284 <_cleanup_r>:
 8002284:	4901      	ldr	r1, [pc, #4]	; (800228c <_cleanup_r+0x8>)
 8002286:	f000 b8a9 	b.w	80023dc <_fwalk_reent>
 800228a:	bf00      	nop
 800228c:	08002231 	.word	0x08002231

08002290 <std.isra.0>:
 8002290:	2300      	movs	r3, #0
 8002292:	b510      	push	{r4, lr}
 8002294:	4604      	mov	r4, r0
 8002296:	6003      	str	r3, [r0, #0]
 8002298:	6043      	str	r3, [r0, #4]
 800229a:	6083      	str	r3, [r0, #8]
 800229c:	8181      	strh	r1, [r0, #12]
 800229e:	6643      	str	r3, [r0, #100]	; 0x64
 80022a0:	81c2      	strh	r2, [r0, #14]
 80022a2:	6103      	str	r3, [r0, #16]
 80022a4:	6143      	str	r3, [r0, #20]
 80022a6:	6183      	str	r3, [r0, #24]
 80022a8:	4619      	mov	r1, r3
 80022aa:	2208      	movs	r2, #8
 80022ac:	305c      	adds	r0, #92	; 0x5c
 80022ae:	f7ff fd3d 	bl	8001d2c <memset>
 80022b2:	4b05      	ldr	r3, [pc, #20]	; (80022c8 <std.isra.0+0x38>)
 80022b4:	6224      	str	r4, [r4, #32]
 80022b6:	6263      	str	r3, [r4, #36]	; 0x24
 80022b8:	4b04      	ldr	r3, [pc, #16]	; (80022cc <std.isra.0+0x3c>)
 80022ba:	62a3      	str	r3, [r4, #40]	; 0x28
 80022bc:	4b04      	ldr	r3, [pc, #16]	; (80022d0 <std.isra.0+0x40>)
 80022be:	62e3      	str	r3, [r4, #44]	; 0x2c
 80022c0:	4b04      	ldr	r3, [pc, #16]	; (80022d4 <std.isra.0+0x44>)
 80022c2:	6323      	str	r3, [r4, #48]	; 0x30
 80022c4:	bd10      	pop	{r4, pc}
 80022c6:	bf00      	nop
 80022c8:	08002c11 	.word	0x08002c11
 80022cc:	08002c33 	.word	0x08002c33
 80022d0:	08002c6b 	.word	0x08002c6b
 80022d4:	08002c8f 	.word	0x08002c8f

080022d8 <__sfmoreglue>:
 80022d8:	b570      	push	{r4, r5, r6, lr}
 80022da:	2568      	movs	r5, #104	; 0x68
 80022dc:	1e4a      	subs	r2, r1, #1
 80022de:	4355      	muls	r5, r2
 80022e0:	460e      	mov	r6, r1
 80022e2:	f105 0174 	add.w	r1, r5, #116	; 0x74
 80022e6:	f000 f94f 	bl	8002588 <_malloc_r>
 80022ea:	4604      	mov	r4, r0
 80022ec:	b140      	cbz	r0, 8002300 <__sfmoreglue+0x28>
 80022ee:	2100      	movs	r1, #0
 80022f0:	e880 0042 	stmia.w	r0, {r1, r6}
 80022f4:	300c      	adds	r0, #12
 80022f6:	60a0      	str	r0, [r4, #8]
 80022f8:	f105 0268 	add.w	r2, r5, #104	; 0x68
 80022fc:	f7ff fd16 	bl	8001d2c <memset>
 8002300:	4620      	mov	r0, r4
 8002302:	bd70      	pop	{r4, r5, r6, pc}

08002304 <__sinit>:
 8002304:	6983      	ldr	r3, [r0, #24]
 8002306:	b510      	push	{r4, lr}
 8002308:	4604      	mov	r4, r0
 800230a:	bb33      	cbnz	r3, 800235a <__sinit+0x56>
 800230c:	6483      	str	r3, [r0, #72]	; 0x48
 800230e:	64c3      	str	r3, [r0, #76]	; 0x4c
 8002310:	6503      	str	r3, [r0, #80]	; 0x50
 8002312:	4b12      	ldr	r3, [pc, #72]	; (800235c <__sinit+0x58>)
 8002314:	4a12      	ldr	r2, [pc, #72]	; (8002360 <__sinit+0x5c>)
 8002316:	681b      	ldr	r3, [r3, #0]
 8002318:	6282      	str	r2, [r0, #40]	; 0x28
 800231a:	4298      	cmp	r0, r3
 800231c:	bf04      	itt	eq
 800231e:	2301      	moveq	r3, #1
 8002320:	6183      	streq	r3, [r0, #24]
 8002322:	f000 f81f 	bl	8002364 <__sfp>
 8002326:	6060      	str	r0, [r4, #4]
 8002328:	4620      	mov	r0, r4
 800232a:	f000 f81b 	bl	8002364 <__sfp>
 800232e:	60a0      	str	r0, [r4, #8]
 8002330:	4620      	mov	r0, r4
 8002332:	f000 f817 	bl	8002364 <__sfp>
 8002336:	2200      	movs	r2, #0
 8002338:	60e0      	str	r0, [r4, #12]
 800233a:	2104      	movs	r1, #4
 800233c:	6860      	ldr	r0, [r4, #4]
 800233e:	f7ff ffa7 	bl	8002290 <std.isra.0>
 8002342:	2201      	movs	r2, #1
 8002344:	2109      	movs	r1, #9
 8002346:	68a0      	ldr	r0, [r4, #8]
 8002348:	f7ff ffa2 	bl	8002290 <std.isra.0>
 800234c:	2202      	movs	r2, #2
 800234e:	2112      	movs	r1, #18
 8002350:	68e0      	ldr	r0, [r4, #12]
 8002352:	f7ff ff9d 	bl	8002290 <std.isra.0>
 8002356:	2301      	movs	r3, #1
 8002358:	61a3      	str	r3, [r4, #24]
 800235a:	bd10      	pop	{r4, pc}
 800235c:	08002f34 	.word	0x08002f34
 8002360:	08002285 	.word	0x08002285

08002364 <__sfp>:
 8002364:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002366:	4b1c      	ldr	r3, [pc, #112]	; (80023d8 <__sfp+0x74>)
 8002368:	4607      	mov	r7, r0
 800236a:	681e      	ldr	r6, [r3, #0]
 800236c:	69b3      	ldr	r3, [r6, #24]
 800236e:	b913      	cbnz	r3, 8002376 <__sfp+0x12>
 8002370:	4630      	mov	r0, r6
 8002372:	f7ff ffc7 	bl	8002304 <__sinit>
 8002376:	3648      	adds	r6, #72	; 0x48
 8002378:	68b4      	ldr	r4, [r6, #8]
 800237a:	6873      	ldr	r3, [r6, #4]
 800237c:	3b01      	subs	r3, #1
 800237e:	d503      	bpl.n	8002388 <__sfp+0x24>
 8002380:	6833      	ldr	r3, [r6, #0]
 8002382:	b133      	cbz	r3, 8002392 <__sfp+0x2e>
 8002384:	6836      	ldr	r6, [r6, #0]
 8002386:	e7f7      	b.n	8002378 <__sfp+0x14>
 8002388:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
 800238c:	b16d      	cbz	r5, 80023aa <__sfp+0x46>
 800238e:	3468      	adds	r4, #104	; 0x68
 8002390:	e7f4      	b.n	800237c <__sfp+0x18>
 8002392:	2104      	movs	r1, #4
 8002394:	4638      	mov	r0, r7
 8002396:	f7ff ff9f 	bl	80022d8 <__sfmoreglue>
 800239a:	6030      	str	r0, [r6, #0]
 800239c:	2800      	cmp	r0, #0
 800239e:	d1f1      	bne.n	8002384 <__sfp+0x20>
 80023a0:	230c      	movs	r3, #12
 80023a2:	4604      	mov	r4, r0
 80023a4:	603b      	str	r3, [r7, #0]
 80023a6:	4620      	mov	r0, r4
 80023a8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 80023aa:	f64f 73ff 	movw	r3, #65535	; 0xffff
 80023ae:	81e3      	strh	r3, [r4, #14]
 80023b0:	2301      	movs	r3, #1
 80023b2:	6665      	str	r5, [r4, #100]	; 0x64
 80023b4:	81a3      	strh	r3, [r4, #12]
 80023b6:	6025      	str	r5, [r4, #0]
 80023b8:	60a5      	str	r5, [r4, #8]
 80023ba:	6065      	str	r5, [r4, #4]
 80023bc:	6125      	str	r5, [r4, #16]
 80023be:	6165      	str	r5, [r4, #20]
 80023c0:	61a5      	str	r5, [r4, #24]
 80023c2:	2208      	movs	r2, #8
 80023c4:	4629      	mov	r1, r5
 80023c6:	f104 005c 	add.w	r0, r4, #92	; 0x5c
 80023ca:	f7ff fcaf 	bl	8001d2c <memset>
 80023ce:	6365      	str	r5, [r4, #52]	; 0x34
 80023d0:	63a5      	str	r5, [r4, #56]	; 0x38
 80023d2:	64a5      	str	r5, [r4, #72]	; 0x48
 80023d4:	64e5      	str	r5, [r4, #76]	; 0x4c
 80023d6:	e7e6      	b.n	80023a6 <__sfp+0x42>
 80023d8:	08002f34 	.word	0x08002f34

080023dc <_fwalk_reent>:
 80023dc:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 80023e0:	4680      	mov	r8, r0
 80023e2:	4689      	mov	r9, r1
 80023e4:	2600      	movs	r6, #0
 80023e6:	f100 0448 	add.w	r4, r0, #72	; 0x48
 80023ea:	b914      	cbnz	r4, 80023f2 <_fwalk_reent+0x16>
 80023ec:	4630      	mov	r0, r6
 80023ee:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 80023f2:	68a5      	ldr	r5, [r4, #8]
 80023f4:	6867      	ldr	r7, [r4, #4]
 80023f6:	3f01      	subs	r7, #1
 80023f8:	d501      	bpl.n	80023fe <_fwalk_reent+0x22>
 80023fa:	6824      	ldr	r4, [r4, #0]
 80023fc:	e7f5      	b.n	80023ea <_fwalk_reent+0xe>
 80023fe:	89ab      	ldrh	r3, [r5, #12]
 8002400:	2b01      	cmp	r3, #1
 8002402:	d907      	bls.n	8002414 <_fwalk_reent+0x38>
 8002404:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 8002408:	3301      	adds	r3, #1
 800240a:	d003      	beq.n	8002414 <_fwalk_reent+0x38>
 800240c:	4629      	mov	r1, r5
 800240e:	4640      	mov	r0, r8
 8002410:	47c8      	blx	r9
 8002412:	4306      	orrs	r6, r0
 8002414:	3568      	adds	r5, #104	; 0x68
 8002416:	e7ee      	b.n	80023f6 <_fwalk_reent+0x1a>

08002418 <__swhatbuf_r>:
 8002418:	b570      	push	{r4, r5, r6, lr}
 800241a:	460e      	mov	r6, r1
 800241c:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002420:	b090      	sub	sp, #64	; 0x40
 8002422:	2900      	cmp	r1, #0
 8002424:	4614      	mov	r4, r2
 8002426:	461d      	mov	r5, r3
 8002428:	da07      	bge.n	800243a <__swhatbuf_r+0x22>
 800242a:	2300      	movs	r3, #0
 800242c:	602b      	str	r3, [r5, #0]
 800242e:	89b3      	ldrh	r3, [r6, #12]
 8002430:	061a      	lsls	r2, r3, #24
 8002432:	d410      	bmi.n	8002456 <__swhatbuf_r+0x3e>
 8002434:	f44f 6380 	mov.w	r3, #1024	; 0x400
 8002438:	e00e      	b.n	8002458 <__swhatbuf_r+0x40>
 800243a:	aa01      	add	r2, sp, #4
 800243c:	f000 fc4e 	bl	8002cdc <_fstat_r>
 8002440:	2800      	cmp	r0, #0
 8002442:	dbf2      	blt.n	800242a <__swhatbuf_r+0x12>
 8002444:	9a02      	ldr	r2, [sp, #8]
 8002446:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
 800244a:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
 800244e:	425a      	negs	r2, r3
 8002450:	415a      	adcs	r2, r3
 8002452:	602a      	str	r2, [r5, #0]
 8002454:	e7ee      	b.n	8002434 <__swhatbuf_r+0x1c>
 8002456:	2340      	movs	r3, #64	; 0x40
 8002458:	2000      	movs	r0, #0
 800245a:	6023      	str	r3, [r4, #0]
 800245c:	b010      	add	sp, #64	; 0x40
 800245e:	bd70      	pop	{r4, r5, r6, pc}

08002460 <__smakebuf_r>:
 8002460:	898b      	ldrh	r3, [r1, #12]
 8002462:	b573      	push	{r0, r1, r4, r5, r6, lr}
 8002464:	079d      	lsls	r5, r3, #30
 8002466:	4606      	mov	r6, r0
 8002468:	460c      	mov	r4, r1
 800246a:	d507      	bpl.n	800247c <__smakebuf_r+0x1c>
 800246c:	f104 0347 	add.w	r3, r4, #71	; 0x47
 8002470:	6023      	str	r3, [r4, #0]
 8002472:	6123      	str	r3, [r4, #16]
 8002474:	2301      	movs	r3, #1
 8002476:	6163      	str	r3, [r4, #20]
 8002478:	b002      	add	sp, #8
 800247a:	bd70      	pop	{r4, r5, r6, pc}
 800247c:	ab01      	add	r3, sp, #4
 800247e:	466a      	mov	r2, sp
 8002480:	f7ff ffca 	bl	8002418 <__swhatbuf_r>
 8002484:	9900      	ldr	r1, [sp, #0]
 8002486:	4605      	mov	r5, r0
 8002488:	4630      	mov	r0, r6
 800248a:	f000 f87d 	bl	8002588 <_malloc_r>
 800248e:	b948      	cbnz	r0, 80024a4 <__smakebuf_r+0x44>
 8002490:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 8002494:	059a      	lsls	r2, r3, #22
 8002496:	d4ef      	bmi.n	8002478 <__smakebuf_r+0x18>
 8002498:	f023 0303 	bic.w	r3, r3, #3
 800249c:	f043 0302 	orr.w	r3, r3, #2
 80024a0:	81a3      	strh	r3, [r4, #12]
 80024a2:	e7e3      	b.n	800246c <__smakebuf_r+0xc>
 80024a4:	4b0d      	ldr	r3, [pc, #52]	; (80024dc <__smakebuf_r+0x7c>)
 80024a6:	62b3      	str	r3, [r6, #40]	; 0x28
 80024a8:	89a3      	ldrh	r3, [r4, #12]
 80024aa:	6020      	str	r0, [r4, #0]
 80024ac:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80024b0:	81a3      	strh	r3, [r4, #12]
 80024b2:	9b00      	ldr	r3, [sp, #0]
 80024b4:	6120      	str	r0, [r4, #16]
 80024b6:	6163      	str	r3, [r4, #20]
 80024b8:	9b01      	ldr	r3, [sp, #4]
 80024ba:	b15b      	cbz	r3, 80024d4 <__smakebuf_r+0x74>
 80024bc:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 80024c0:	4630      	mov	r0, r6
 80024c2:	f000 fc1d 	bl	8002d00 <_isatty_r>
 80024c6:	b128      	cbz	r0, 80024d4 <__smakebuf_r+0x74>
 80024c8:	89a3      	ldrh	r3, [r4, #12]
 80024ca:	f023 0303 	bic.w	r3, r3, #3
 80024ce:	f043 0301 	orr.w	r3, r3, #1
 80024d2:	81a3      	strh	r3, [r4, #12]
 80024d4:	89a3      	ldrh	r3, [r4, #12]
 80024d6:	431d      	orrs	r5, r3
 80024d8:	81a5      	strh	r5, [r4, #12]
 80024da:	e7cd      	b.n	8002478 <__smakebuf_r+0x18>
 80024dc:	08002285 	.word	0x08002285

080024e0 <malloc>:
 80024e0:	4b02      	ldr	r3, [pc, #8]	; (80024ec <malloc+0xc>)
 80024e2:	4601      	mov	r1, r0
 80024e4:	6818      	ldr	r0, [r3, #0]
 80024e6:	f000 b84f 	b.w	8002588 <_malloc_r>
 80024ea:	bf00      	nop
 80024ec:	20000010 	.word	0x20000010

080024f0 <_free_r>:
 80024f0:	b538      	push	{r3, r4, r5, lr}
 80024f2:	4605      	mov	r5, r0
 80024f4:	2900      	cmp	r1, #0
 80024f6:	d043      	beq.n	8002580 <_free_r+0x90>
 80024f8:	f851 3c04 	ldr.w	r3, [r1, #-4]
 80024fc:	1f0c      	subs	r4, r1, #4
 80024fe:	2b00      	cmp	r3, #0
 8002500:	bfb8      	it	lt
 8002502:	18e4      	addlt	r4, r4, r3
 8002504:	f000 fc2c 	bl	8002d60 <__malloc_lock>
 8002508:	4a1e      	ldr	r2, [pc, #120]	; (8002584 <_free_r+0x94>)
 800250a:	6813      	ldr	r3, [r2, #0]
 800250c:	4610      	mov	r0, r2
 800250e:	b933      	cbnz	r3, 800251e <_free_r+0x2e>
 8002510:	6063      	str	r3, [r4, #4]
 8002512:	6014      	str	r4, [r2, #0]
 8002514:	4628      	mov	r0, r5
 8002516:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 800251a:	f000 bc22 	b.w	8002d62 <__malloc_unlock>
 800251e:	42a3      	cmp	r3, r4
 8002520:	d90b      	bls.n	800253a <_free_r+0x4a>
 8002522:	6821      	ldr	r1, [r4, #0]
 8002524:	1862      	adds	r2, r4, r1
 8002526:	4293      	cmp	r3, r2
 8002528:	bf01      	itttt	eq
 800252a:	681a      	ldreq	r2, [r3, #0]
 800252c:	685b      	ldreq	r3, [r3, #4]
 800252e:	1852      	addeq	r2, r2, r1
 8002530:	6022      	streq	r2, [r4, #0]
 8002532:	6063      	str	r3, [r4, #4]
 8002534:	6004      	str	r4, [r0, #0]
 8002536:	e7ed      	b.n	8002514 <_free_r+0x24>
 8002538:	4613      	mov	r3, r2
 800253a:	685a      	ldr	r2, [r3, #4]
 800253c:	b10a      	cbz	r2, 8002542 <_free_r+0x52>
 800253e:	42a2      	cmp	r2, r4
 8002540:	d9fa      	bls.n	8002538 <_free_r+0x48>
 8002542:	6819      	ldr	r1, [r3, #0]
 8002544:	1858      	adds	r0, r3, r1
 8002546:	42a0      	cmp	r0, r4
 8002548:	d10b      	bne.n	8002562 <_free_r+0x72>
 800254a:	6820      	ldr	r0, [r4, #0]
 800254c:	4401      	add	r1, r0
 800254e:	1858      	adds	r0, r3, r1
 8002550:	4282      	cmp	r2, r0
 8002552:	6019      	str	r1, [r3, #0]
 8002554:	d1de      	bne.n	8002514 <_free_r+0x24>
 8002556:	6810      	ldr	r0, [r2, #0]
 8002558:	6852      	ldr	r2, [r2, #4]
 800255a:	4401      	add	r1, r0
 800255c:	6019      	str	r1, [r3, #0]
 800255e:	605a      	str	r2, [r3, #4]
 8002560:	e7d8      	b.n	8002514 <_free_r+0x24>
 8002562:	d902      	bls.n	800256a <_free_r+0x7a>
 8002564:	230c      	movs	r3, #12
 8002566:	602b      	str	r3, [r5, #0]
 8002568:	e7d4      	b.n	8002514 <_free_r+0x24>
 800256a:	6820      	ldr	r0, [r4, #0]
 800256c:	1821      	adds	r1, r4, r0
 800256e:	428a      	cmp	r2, r1
 8002570:	bf01      	itttt	eq
 8002572:	6811      	ldreq	r1, [r2, #0]
 8002574:	6852      	ldreq	r2, [r2, #4]
 8002576:	1809      	addeq	r1, r1, r0
 8002578:	6021      	streq	r1, [r4, #0]
 800257a:	6062      	str	r2, [r4, #4]
 800257c:	605c      	str	r4, [r3, #4]
 800257e:	e7c9      	b.n	8002514 <_free_r+0x24>
 8002580:	bd38      	pop	{r3, r4, r5, pc}
 8002582:	bf00      	nop
 8002584:	200000c4 	.word	0x200000c4

08002588 <_malloc_r>:
 8002588:	b570      	push	{r4, r5, r6, lr}
 800258a:	1ccd      	adds	r5, r1, #3
 800258c:	f025 0503 	bic.w	r5, r5, #3
 8002590:	3508      	adds	r5, #8
 8002592:	2d0c      	cmp	r5, #12
 8002594:	bf38      	it	cc
 8002596:	250c      	movcc	r5, #12
 8002598:	2d00      	cmp	r5, #0
 800259a:	4606      	mov	r6, r0
 800259c:	db01      	blt.n	80025a2 <_malloc_r+0x1a>
 800259e:	42a9      	cmp	r1, r5
 80025a0:	d903      	bls.n	80025aa <_malloc_r+0x22>
 80025a2:	230c      	movs	r3, #12
 80025a4:	6033      	str	r3, [r6, #0]
 80025a6:	2000      	movs	r0, #0
 80025a8:	bd70      	pop	{r4, r5, r6, pc}
 80025aa:	f000 fbd9 	bl	8002d60 <__malloc_lock>
 80025ae:	4a23      	ldr	r2, [pc, #140]	; (800263c <_malloc_r+0xb4>)
 80025b0:	6814      	ldr	r4, [r2, #0]
 80025b2:	4621      	mov	r1, r4
 80025b4:	b991      	cbnz	r1, 80025dc <_malloc_r+0x54>
 80025b6:	4c22      	ldr	r4, [pc, #136]	; (8002640 <_malloc_r+0xb8>)
 80025b8:	6823      	ldr	r3, [r4, #0]
 80025ba:	b91b      	cbnz	r3, 80025c4 <_malloc_r+0x3c>
 80025bc:	4630      	mov	r0, r6
 80025be:	f000 fb17 	bl	8002bf0 <_sbrk_r>
 80025c2:	6020      	str	r0, [r4, #0]
 80025c4:	4629      	mov	r1, r5
 80025c6:	4630      	mov	r0, r6
 80025c8:	f000 fb12 	bl	8002bf0 <_sbrk_r>
 80025cc:	1c43      	adds	r3, r0, #1
 80025ce:	d126      	bne.n	800261e <_malloc_r+0x96>
 80025d0:	230c      	movs	r3, #12
 80025d2:	4630      	mov	r0, r6
 80025d4:	6033      	str	r3, [r6, #0]
 80025d6:	f000 fbc4 	bl	8002d62 <__malloc_unlock>
 80025da:	e7e4      	b.n	80025a6 <_malloc_r+0x1e>
 80025dc:	680b      	ldr	r3, [r1, #0]
 80025de:	1b5b      	subs	r3, r3, r5
 80025e0:	d41a      	bmi.n	8002618 <_malloc_r+0x90>
 80025e2:	2b0b      	cmp	r3, #11
 80025e4:	d90f      	bls.n	8002606 <_malloc_r+0x7e>
 80025e6:	600b      	str	r3, [r1, #0]
 80025e8:	18cc      	adds	r4, r1, r3
 80025ea:	50cd      	str	r5, [r1, r3]
 80025ec:	4630      	mov	r0, r6
 80025ee:	f000 fbb8 	bl	8002d62 <__malloc_unlock>
 80025f2:	f104 000b 	add.w	r0, r4, #11
 80025f6:	1d23      	adds	r3, r4, #4
 80025f8:	f020 0007 	bic.w	r0, r0, #7
 80025fc:	1ac3      	subs	r3, r0, r3
 80025fe:	d01b      	beq.n	8002638 <_malloc_r+0xb0>
 8002600:	425a      	negs	r2, r3
 8002602:	50e2      	str	r2, [r4, r3]
 8002604:	bd70      	pop	{r4, r5, r6, pc}
 8002606:	428c      	cmp	r4, r1
 8002608:	bf0b      	itete	eq
 800260a:	6863      	ldreq	r3, [r4, #4]
 800260c:	684b      	ldrne	r3, [r1, #4]
 800260e:	6013      	streq	r3, [r2, #0]
 8002610:	6063      	strne	r3, [r4, #4]
 8002612:	bf18      	it	ne
 8002614:	460c      	movne	r4, r1
 8002616:	e7e9      	b.n	80025ec <_malloc_r+0x64>
 8002618:	460c      	mov	r4, r1
 800261a:	6849      	ldr	r1, [r1, #4]
 800261c:	e7ca      	b.n	80025b4 <_malloc_r+0x2c>
 800261e:	1cc4      	adds	r4, r0, #3
 8002620:	f024 0403 	bic.w	r4, r4, #3
 8002624:	42a0      	cmp	r0, r4
 8002626:	d005      	beq.n	8002634 <_malloc_r+0xac>
 8002628:	1a21      	subs	r1, r4, r0
 800262a:	4630      	mov	r0, r6
 800262c:	f000 fae0 	bl	8002bf0 <_sbrk_r>
 8002630:	3001      	adds	r0, #1
 8002632:	d0cd      	beq.n	80025d0 <_malloc_r+0x48>
 8002634:	6025      	str	r5, [r4, #0]
 8002636:	e7d9      	b.n	80025ec <_malloc_r+0x64>
 8002638:	bd70      	pop	{r4, r5, r6, pc}
 800263a:	bf00      	nop
 800263c:	200000c4 	.word	0x200000c4
 8002640:	200000c8 	.word	0x200000c8

08002644 <__sfputc_r>:
 8002644:	6893      	ldr	r3, [r2, #8]
 8002646:	b410      	push	{r4}
 8002648:	3b01      	subs	r3, #1
 800264a:	2b00      	cmp	r3, #0
 800264c:	6093      	str	r3, [r2, #8]
 800264e:	da08      	bge.n	8002662 <__sfputc_r+0x1e>
 8002650:	6994      	ldr	r4, [r2, #24]
 8002652:	42a3      	cmp	r3, r4
 8002654:	db02      	blt.n	800265c <__sfputc_r+0x18>
 8002656:	b2cb      	uxtb	r3, r1
 8002658:	2b0a      	cmp	r3, #10
 800265a:	d102      	bne.n	8002662 <__sfputc_r+0x1e>
 800265c:	bc10      	pop	{r4}
 800265e:	f7ff bc9f 	b.w	8001fa0 <__swbuf_r>
 8002662:	6813      	ldr	r3, [r2, #0]
 8002664:	1c58      	adds	r0, r3, #1
 8002666:	6010      	str	r0, [r2, #0]
 8002668:	7019      	strb	r1, [r3, #0]
 800266a:	b2c8      	uxtb	r0, r1
 800266c:	bc10      	pop	{r4}
 800266e:	4770      	bx	lr

08002670 <__sfputs_r>:
 8002670:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002672:	4606      	mov	r6, r0
 8002674:	460f      	mov	r7, r1
 8002676:	4614      	mov	r4, r2
 8002678:	18d5      	adds	r5, r2, r3
 800267a:	42ac      	cmp	r4, r5
 800267c:	d101      	bne.n	8002682 <__sfputs_r+0x12>
 800267e:	2000      	movs	r0, #0
 8002680:	e007      	b.n	8002692 <__sfputs_r+0x22>
 8002682:	463a      	mov	r2, r7
 8002684:	f814 1b01 	ldrb.w	r1, [r4], #1
 8002688:	4630      	mov	r0, r6
 800268a:	f7ff ffdb 	bl	8002644 <__sfputc_r>
 800268e:	1c43      	adds	r3, r0, #1
 8002690:	d1f3      	bne.n	800267a <__sfputs_r+0xa>
 8002692:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

08002694 <_vfiprintf_r>:
 8002694:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8002698:	b09d      	sub	sp, #116	; 0x74
 800269a:	460c      	mov	r4, r1
 800269c:	4617      	mov	r7, r2
 800269e:	9303      	str	r3, [sp, #12]
 80026a0:	4606      	mov	r6, r0
 80026a2:	b118      	cbz	r0, 80026ac <_vfiprintf_r+0x18>
 80026a4:	6983      	ldr	r3, [r0, #24]
 80026a6:	b90b      	cbnz	r3, 80026ac <_vfiprintf_r+0x18>
 80026a8:	f7ff fe2c 	bl	8002304 <__sinit>
 80026ac:	4b7c      	ldr	r3, [pc, #496]	; (80028a0 <_vfiprintf_r+0x20c>)
 80026ae:	429c      	cmp	r4, r3
 80026b0:	d157      	bne.n	8002762 <_vfiprintf_r+0xce>
 80026b2:	6874      	ldr	r4, [r6, #4]
 80026b4:	89a3      	ldrh	r3, [r4, #12]
 80026b6:	0718      	lsls	r0, r3, #28
 80026b8:	d55d      	bpl.n	8002776 <_vfiprintf_r+0xe2>
 80026ba:	6923      	ldr	r3, [r4, #16]
 80026bc:	2b00      	cmp	r3, #0
 80026be:	d05a      	beq.n	8002776 <_vfiprintf_r+0xe2>
 80026c0:	2300      	movs	r3, #0
 80026c2:	9309      	str	r3, [sp, #36]	; 0x24
 80026c4:	2320      	movs	r3, #32
 80026c6:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
 80026ca:	2330      	movs	r3, #48	; 0x30
 80026cc:	f04f 0b01 	mov.w	fp, #1
 80026d0:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
 80026d4:	46b8      	mov	r8, r7
 80026d6:	4645      	mov	r5, r8
 80026d8:	f815 3b01 	ldrb.w	r3, [r5], #1
 80026dc:	2b00      	cmp	r3, #0
 80026de:	d155      	bne.n	800278c <_vfiprintf_r+0xf8>
 80026e0:	ebb8 0a07 	subs.w	sl, r8, r7
 80026e4:	d00b      	beq.n	80026fe <_vfiprintf_r+0x6a>
 80026e6:	4653      	mov	r3, sl
 80026e8:	463a      	mov	r2, r7
 80026ea:	4621      	mov	r1, r4
 80026ec:	4630      	mov	r0, r6
 80026ee:	f7ff ffbf 	bl	8002670 <__sfputs_r>
 80026f2:	3001      	adds	r0, #1
 80026f4:	f000 80c4 	beq.w	8002880 <_vfiprintf_r+0x1ec>
 80026f8:	9b09      	ldr	r3, [sp, #36]	; 0x24
 80026fa:	4453      	add	r3, sl
 80026fc:	9309      	str	r3, [sp, #36]	; 0x24
 80026fe:	f898 3000 	ldrb.w	r3, [r8]
 8002702:	2b00      	cmp	r3, #0
 8002704:	f000 80bc 	beq.w	8002880 <_vfiprintf_r+0x1ec>
 8002708:	2300      	movs	r3, #0
 800270a:	f04f 32ff 	mov.w	r2, #4294967295
 800270e:	9304      	str	r3, [sp, #16]
 8002710:	9307      	str	r3, [sp, #28]
 8002712:	9205      	str	r2, [sp, #20]
 8002714:	9306      	str	r3, [sp, #24]
 8002716:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
 800271a:	931a      	str	r3, [sp, #104]	; 0x68
 800271c:	2205      	movs	r2, #5
 800271e:	7829      	ldrb	r1, [r5, #0]
 8002720:	4860      	ldr	r0, [pc, #384]	; (80028a4 <_vfiprintf_r+0x210>)
 8002722:	f000 fb0f 	bl	8002d44 <memchr>
 8002726:	f105 0801 	add.w	r8, r5, #1
 800272a:	9b04      	ldr	r3, [sp, #16]
 800272c:	2800      	cmp	r0, #0
 800272e:	d131      	bne.n	8002794 <_vfiprintf_r+0x100>
 8002730:	06d9      	lsls	r1, r3, #27
 8002732:	bf44      	itt	mi
 8002734:	2220      	movmi	r2, #32
 8002736:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 800273a:	071a      	lsls	r2, r3, #28
 800273c:	bf44      	itt	mi
 800273e:	222b      	movmi	r2, #43	; 0x2b
 8002740:	f88d 2053 	strbmi.w	r2, [sp, #83]	; 0x53
 8002744:	782a      	ldrb	r2, [r5, #0]
 8002746:	2a2a      	cmp	r2, #42	; 0x2a
 8002748:	d02c      	beq.n	80027a4 <_vfiprintf_r+0x110>
 800274a:	2100      	movs	r1, #0
 800274c:	200a      	movs	r0, #10
 800274e:	9a07      	ldr	r2, [sp, #28]
 8002750:	46a8      	mov	r8, r5
 8002752:	f898 3000 	ldrb.w	r3, [r8]
 8002756:	3501      	adds	r5, #1
 8002758:	3b30      	subs	r3, #48	; 0x30
 800275a:	2b09      	cmp	r3, #9
 800275c:	d96d      	bls.n	800283a <_vfiprintf_r+0x1a6>
 800275e:	b371      	cbz	r1, 80027be <_vfiprintf_r+0x12a>
 8002760:	e026      	b.n	80027b0 <_vfiprintf_r+0x11c>
 8002762:	4b51      	ldr	r3, [pc, #324]	; (80028a8 <_vfiprintf_r+0x214>)
 8002764:	429c      	cmp	r4, r3
 8002766:	d101      	bne.n	800276c <_vfiprintf_r+0xd8>
 8002768:	68b4      	ldr	r4, [r6, #8]
 800276a:	e7a3      	b.n	80026b4 <_vfiprintf_r+0x20>
 800276c:	4b4f      	ldr	r3, [pc, #316]	; (80028ac <_vfiprintf_r+0x218>)
 800276e:	429c      	cmp	r4, r3
 8002770:	bf08      	it	eq
 8002772:	68f4      	ldreq	r4, [r6, #12]
 8002774:	e79e      	b.n	80026b4 <_vfiprintf_r+0x20>
 8002776:	4621      	mov	r1, r4
 8002778:	4630      	mov	r0, r6
 800277a:	f7ff fc63 	bl	8002044 <__swsetup_r>
 800277e:	2800      	cmp	r0, #0
 8002780:	d09e      	beq.n	80026c0 <_vfiprintf_r+0x2c>
 8002782:	f04f 30ff 	mov.w	r0, #4294967295
 8002786:	b01d      	add	sp, #116	; 0x74
 8002788:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 800278c:	2b25      	cmp	r3, #37	; 0x25
 800278e:	d0a7      	beq.n	80026e0 <_vfiprintf_r+0x4c>
 8002790:	46a8      	mov	r8, r5
 8002792:	e7a0      	b.n	80026d6 <_vfiprintf_r+0x42>
 8002794:	4a43      	ldr	r2, [pc, #268]	; (80028a4 <_vfiprintf_r+0x210>)
 8002796:	4645      	mov	r5, r8
 8002798:	1a80      	subs	r0, r0, r2
 800279a:	fa0b f000 	lsl.w	r0, fp, r0
 800279e:	4318      	orrs	r0, r3
 80027a0:	9004      	str	r0, [sp, #16]
 80027a2:	e7bb      	b.n	800271c <_vfiprintf_r+0x88>
 80027a4:	9a03      	ldr	r2, [sp, #12]
 80027a6:	1d11      	adds	r1, r2, #4
 80027a8:	6812      	ldr	r2, [r2, #0]
 80027aa:	9103      	str	r1, [sp, #12]
 80027ac:	2a00      	cmp	r2, #0
 80027ae:	db01      	blt.n	80027b4 <_vfiprintf_r+0x120>
 80027b0:	9207      	str	r2, [sp, #28]
 80027b2:	e004      	b.n	80027be <_vfiprintf_r+0x12a>
 80027b4:	4252      	negs	r2, r2
 80027b6:	f043 0302 	orr.w	r3, r3, #2
 80027ba:	9207      	str	r2, [sp, #28]
 80027bc:	9304      	str	r3, [sp, #16]
 80027be:	f898 3000 	ldrb.w	r3, [r8]
 80027c2:	2b2e      	cmp	r3, #46	; 0x2e
 80027c4:	d110      	bne.n	80027e8 <_vfiprintf_r+0x154>
 80027c6:	f898 3001 	ldrb.w	r3, [r8, #1]
 80027ca:	f108 0101 	add.w	r1, r8, #1
 80027ce:	2b2a      	cmp	r3, #42	; 0x2a
 80027d0:	d137      	bne.n	8002842 <_vfiprintf_r+0x1ae>
 80027d2:	9b03      	ldr	r3, [sp, #12]
 80027d4:	f108 0802 	add.w	r8, r8, #2
 80027d8:	1d1a      	adds	r2, r3, #4
 80027da:	681b      	ldr	r3, [r3, #0]
 80027dc:	9203      	str	r2, [sp, #12]
 80027de:	2b00      	cmp	r3, #0
 80027e0:	bfb8      	it	lt
 80027e2:	f04f 33ff 	movlt.w	r3, #4294967295
 80027e6:	9305      	str	r3, [sp, #20]
 80027e8:	4d31      	ldr	r5, [pc, #196]	; (80028b0 <_vfiprintf_r+0x21c>)
 80027ea:	2203      	movs	r2, #3
 80027ec:	f898 1000 	ldrb.w	r1, [r8]
 80027f0:	4628      	mov	r0, r5
 80027f2:	f000 faa7 	bl	8002d44 <memchr>
 80027f6:	b140      	cbz	r0, 800280a <_vfiprintf_r+0x176>
 80027f8:	2340      	movs	r3, #64	; 0x40
 80027fa:	1b40      	subs	r0, r0, r5
 80027fc:	fa03 f000 	lsl.w	r0, r3, r0
 8002800:	9b04      	ldr	r3, [sp, #16]
 8002802:	f108 0801 	add.w	r8, r8, #1
 8002806:	4303      	orrs	r3, r0
 8002808:	9304      	str	r3, [sp, #16]
 800280a:	f898 1000 	ldrb.w	r1, [r8]
 800280e:	2206      	movs	r2, #6
 8002810:	4828      	ldr	r0, [pc, #160]	; (80028b4 <_vfiprintf_r+0x220>)
 8002812:	f108 0701 	add.w	r7, r8, #1
 8002816:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
 800281a:	f000 fa93 	bl	8002d44 <memchr>
 800281e:	2800      	cmp	r0, #0
 8002820:	d034      	beq.n	800288c <_vfiprintf_r+0x1f8>
 8002822:	4b25      	ldr	r3, [pc, #148]	; (80028b8 <_vfiprintf_r+0x224>)
 8002824:	bb03      	cbnz	r3, 8002868 <_vfiprintf_r+0x1d4>
 8002826:	9b03      	ldr	r3, [sp, #12]
 8002828:	3307      	adds	r3, #7
 800282a:	f023 0307 	bic.w	r3, r3, #7
 800282e:	3308      	adds	r3, #8
 8002830:	9303      	str	r3, [sp, #12]
 8002832:	9b09      	ldr	r3, [sp, #36]	; 0x24
 8002834:	444b      	add	r3, r9
 8002836:	9309      	str	r3, [sp, #36]	; 0x24
 8002838:	e74c      	b.n	80026d4 <_vfiprintf_r+0x40>
 800283a:	fb00 3202 	mla	r2, r0, r2, r3
 800283e:	2101      	movs	r1, #1
 8002840:	e786      	b.n	8002750 <_vfiprintf_r+0xbc>
 8002842:	2300      	movs	r3, #0
 8002844:	250a      	movs	r5, #10
 8002846:	4618      	mov	r0, r3
 8002848:	9305      	str	r3, [sp, #20]
 800284a:	4688      	mov	r8, r1
 800284c:	f898 2000 	ldrb.w	r2, [r8]
 8002850:	3101      	adds	r1, #1
 8002852:	3a30      	subs	r2, #48	; 0x30
 8002854:	2a09      	cmp	r2, #9
 8002856:	d903      	bls.n	8002860 <_vfiprintf_r+0x1cc>
 8002858:	2b00      	cmp	r3, #0
 800285a:	d0c5      	beq.n	80027e8 <_vfiprintf_r+0x154>
 800285c:	9005      	str	r0, [sp, #20]
 800285e:	e7c3      	b.n	80027e8 <_vfiprintf_r+0x154>
 8002860:	fb05 2000 	mla	r0, r5, r0, r2
 8002864:	2301      	movs	r3, #1
 8002866:	e7f0      	b.n	800284a <_vfiprintf_r+0x1b6>
 8002868:	ab03      	add	r3, sp, #12
 800286a:	9300      	str	r3, [sp, #0]
 800286c:	4622      	mov	r2, r4
 800286e:	4b13      	ldr	r3, [pc, #76]	; (80028bc <_vfiprintf_r+0x228>)
 8002870:	a904      	add	r1, sp, #16
 8002872:	4630      	mov	r0, r6
 8002874:	f3af 8000 	nop.w
 8002878:	f1b0 3fff 	cmp.w	r0, #4294967295
 800287c:	4681      	mov	r9, r0
 800287e:	d1d8      	bne.n	8002832 <_vfiprintf_r+0x19e>
 8002880:	89a3      	ldrh	r3, [r4, #12]
 8002882:	065b      	lsls	r3, r3, #25
 8002884:	f53f af7d 	bmi.w	8002782 <_vfiprintf_r+0xee>
 8002888:	9809      	ldr	r0, [sp, #36]	; 0x24
 800288a:	e77c      	b.n	8002786 <_vfiprintf_r+0xf2>
 800288c:	ab03      	add	r3, sp, #12
 800288e:	9300      	str	r3, [sp, #0]
 8002890:	4622      	mov	r2, r4
 8002892:	4b0a      	ldr	r3, [pc, #40]	; (80028bc <_vfiprintf_r+0x228>)
 8002894:	a904      	add	r1, sp, #16
 8002896:	4630      	mov	r0, r6
 8002898:	f000 f88a 	bl	80029b0 <_printf_i>
 800289c:	e7ec      	b.n	8002878 <_vfiprintf_r+0x1e4>
 800289e:	bf00      	nop
 80028a0:	08002f58 	.word	0x08002f58
 80028a4:	08002f98 	.word	0x08002f98
 80028a8:	08002f78 	.word	0x08002f78
 80028ac:	08002f38 	.word	0x08002f38
 80028b0:	08002f9e 	.word	0x08002f9e
 80028b4:	08002fa2 	.word	0x08002fa2
 80028b8:	00000000 	.word	0x00000000
 80028bc:	08002671 	.word	0x08002671

080028c0 <_printf_common>:
 80028c0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80028c4:	4691      	mov	r9, r2
 80028c6:	461f      	mov	r7, r3
 80028c8:	688a      	ldr	r2, [r1, #8]
 80028ca:	690b      	ldr	r3, [r1, #16]
 80028cc:	4606      	mov	r6, r0
 80028ce:	4293      	cmp	r3, r2
 80028d0:	bfb8      	it	lt
 80028d2:	4613      	movlt	r3, r2
 80028d4:	f8c9 3000 	str.w	r3, [r9]
 80028d8:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
 80028dc:	460c      	mov	r4, r1
 80028de:	f8dd 8020 	ldr.w	r8, [sp, #32]
 80028e2:	b112      	cbz	r2, 80028ea <_printf_common+0x2a>
 80028e4:	3301      	adds	r3, #1
 80028e6:	f8c9 3000 	str.w	r3, [r9]
 80028ea:	6823      	ldr	r3, [r4, #0]
 80028ec:	0699      	lsls	r1, r3, #26
 80028ee:	bf42      	ittt	mi
 80028f0:	f8d9 3000 	ldrmi.w	r3, [r9]
 80028f4:	3302      	addmi	r3, #2
 80028f6:	f8c9 3000 	strmi.w	r3, [r9]
 80028fa:	6825      	ldr	r5, [r4, #0]
 80028fc:	f015 0506 	ands.w	r5, r5, #6
 8002900:	d107      	bne.n	8002912 <_printf_common+0x52>
 8002902:	f104 0a19 	add.w	sl, r4, #25
 8002906:	68e3      	ldr	r3, [r4, #12]
 8002908:	f8d9 2000 	ldr.w	r2, [r9]
 800290c:	1a9b      	subs	r3, r3, r2
 800290e:	429d      	cmp	r5, r3
 8002910:	db2a      	blt.n	8002968 <_printf_common+0xa8>
 8002912:	f894 3043 	ldrb.w	r3, [r4, #67]	; 0x43
 8002916:	6822      	ldr	r2, [r4, #0]
 8002918:	3300      	adds	r3, #0
 800291a:	bf18      	it	ne
 800291c:	2301      	movne	r3, #1
 800291e:	0692      	lsls	r2, r2, #26
 8002920:	d42f      	bmi.n	8002982 <_printf_common+0xc2>
 8002922:	f104 0243 	add.w	r2, r4, #67	; 0x43
 8002926:	4639      	mov	r1, r7
 8002928:	4630      	mov	r0, r6
 800292a:	47c0      	blx	r8
 800292c:	3001      	adds	r0, #1
 800292e:	d022      	beq.n	8002976 <_printf_common+0xb6>
 8002930:	6823      	ldr	r3, [r4, #0]
 8002932:	68e5      	ldr	r5, [r4, #12]
 8002934:	f003 0306 	and.w	r3, r3, #6
 8002938:	2b04      	cmp	r3, #4
 800293a:	bf18      	it	ne
 800293c:	2500      	movne	r5, #0
 800293e:	f8d9 2000 	ldr.w	r2, [r9]
 8002942:	f04f 0900 	mov.w	r9, #0
 8002946:	bf08      	it	eq
 8002948:	1aad      	subeq	r5, r5, r2
 800294a:	68a3      	ldr	r3, [r4, #8]
 800294c:	6922      	ldr	r2, [r4, #16]
 800294e:	bf08      	it	eq
 8002950:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 8002954:	4293      	cmp	r3, r2
 8002956:	bfc4      	itt	gt
 8002958:	1a9b      	subgt	r3, r3, r2
 800295a:	18ed      	addgt	r5, r5, r3
 800295c:	341a      	adds	r4, #26
 800295e:	454d      	cmp	r5, r9
 8002960:	d11b      	bne.n	800299a <_printf_common+0xda>
 8002962:	2000      	movs	r0, #0
 8002964:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8002968:	2301      	movs	r3, #1
 800296a:	4652      	mov	r2, sl
 800296c:	4639      	mov	r1, r7
 800296e:	4630      	mov	r0, r6
 8002970:	47c0      	blx	r8
 8002972:	3001      	adds	r0, #1
 8002974:	d103      	bne.n	800297e <_printf_common+0xbe>
 8002976:	f04f 30ff 	mov.w	r0, #4294967295
 800297a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 800297e:	3501      	adds	r5, #1
 8002980:	e7c1      	b.n	8002906 <_printf_common+0x46>
 8002982:	2030      	movs	r0, #48	; 0x30
 8002984:	18e1      	adds	r1, r4, r3
 8002986:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
 800298a:	1c5a      	adds	r2, r3, #1
 800298c:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
 8002990:	4422      	add	r2, r4
 8002992:	3302      	adds	r3, #2
 8002994:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
 8002998:	e7c3      	b.n	8002922 <_printf_common+0x62>
 800299a:	2301      	movs	r3, #1
 800299c:	4622      	mov	r2, r4
 800299e:	4639      	mov	r1, r7
 80029a0:	4630      	mov	r0, r6
 80029a2:	47c0      	blx	r8
 80029a4:	3001      	adds	r0, #1
 80029a6:	d0e6      	beq.n	8002976 <_printf_common+0xb6>
 80029a8:	f109 0901 	add.w	r9, r9, #1
 80029ac:	e7d7      	b.n	800295e <_printf_common+0x9e>
	...

080029b0 <_printf_i>:
 80029b0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 80029b4:	4617      	mov	r7, r2
 80029b6:	7e0a      	ldrb	r2, [r1, #24]
 80029b8:	b085      	sub	sp, #20
 80029ba:	2a6e      	cmp	r2, #110	; 0x6e
 80029bc:	4698      	mov	r8, r3
 80029be:	4606      	mov	r6, r0
 80029c0:	460c      	mov	r4, r1
 80029c2:	9b0c      	ldr	r3, [sp, #48]	; 0x30
 80029c4:	f101 0e43 	add.w	lr, r1, #67	; 0x43
 80029c8:	f000 80bc 	beq.w	8002b44 <_printf_i+0x194>
 80029cc:	d81a      	bhi.n	8002a04 <_printf_i+0x54>
 80029ce:	2a63      	cmp	r2, #99	; 0x63
 80029d0:	d02e      	beq.n	8002a30 <_printf_i+0x80>
 80029d2:	d80a      	bhi.n	80029ea <_printf_i+0x3a>
 80029d4:	2a00      	cmp	r2, #0
 80029d6:	f000 80c8 	beq.w	8002b6a <_printf_i+0x1ba>
 80029da:	2a58      	cmp	r2, #88	; 0x58
 80029dc:	f000 808a 	beq.w	8002af4 <_printf_i+0x144>
 80029e0:	f104 0542 	add.w	r5, r4, #66	; 0x42
 80029e4:	f884 2042 	strb.w	r2, [r4, #66]	; 0x42
 80029e8:	e02a      	b.n	8002a40 <_printf_i+0x90>
 80029ea:	2a64      	cmp	r2, #100	; 0x64
 80029ec:	d001      	beq.n	80029f2 <_printf_i+0x42>
 80029ee:	2a69      	cmp	r2, #105	; 0x69
 80029f0:	d1f6      	bne.n	80029e0 <_printf_i+0x30>
 80029f2:	6821      	ldr	r1, [r4, #0]
 80029f4:	681a      	ldr	r2, [r3, #0]
 80029f6:	f011 0f80 	tst.w	r1, #128	; 0x80
 80029fa:	d023      	beq.n	8002a44 <_printf_i+0x94>
 80029fc:	1d11      	adds	r1, r2, #4
 80029fe:	6019      	str	r1, [r3, #0]
 8002a00:	6813      	ldr	r3, [r2, #0]
 8002a02:	e027      	b.n	8002a54 <_printf_i+0xa4>
 8002a04:	2a73      	cmp	r2, #115	; 0x73
 8002a06:	f000 80b4 	beq.w	8002b72 <_printf_i+0x1c2>
 8002a0a:	d808      	bhi.n	8002a1e <_printf_i+0x6e>
 8002a0c:	2a6f      	cmp	r2, #111	; 0x6f
 8002a0e:	d02a      	beq.n	8002a66 <_printf_i+0xb6>
 8002a10:	2a70      	cmp	r2, #112	; 0x70
 8002a12:	d1e5      	bne.n	80029e0 <_printf_i+0x30>
 8002a14:	680a      	ldr	r2, [r1, #0]
 8002a16:	f042 0220 	orr.w	r2, r2, #32
 8002a1a:	600a      	str	r2, [r1, #0]
 8002a1c:	e003      	b.n	8002a26 <_printf_i+0x76>
 8002a1e:	2a75      	cmp	r2, #117	; 0x75
 8002a20:	d021      	beq.n	8002a66 <_printf_i+0xb6>
 8002a22:	2a78      	cmp	r2, #120	; 0x78
 8002a24:	d1dc      	bne.n	80029e0 <_printf_i+0x30>
 8002a26:	2278      	movs	r2, #120	; 0x78
 8002a28:	496f      	ldr	r1, [pc, #444]	; (8002be8 <_printf_i+0x238>)
 8002a2a:	f884 2045 	strb.w	r2, [r4, #69]	; 0x45
 8002a2e:	e064      	b.n	8002afa <_printf_i+0x14a>
 8002a30:	681a      	ldr	r2, [r3, #0]
 8002a32:	f101 0542 	add.w	r5, r1, #66	; 0x42
 8002a36:	1d11      	adds	r1, r2, #4
 8002a38:	6019      	str	r1, [r3, #0]
 8002a3a:	6813      	ldr	r3, [r2, #0]
 8002a3c:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8002a40:	2301      	movs	r3, #1
 8002a42:	e0a3      	b.n	8002b8c <_printf_i+0x1dc>
 8002a44:	f011 0f40 	tst.w	r1, #64	; 0x40
 8002a48:	f102 0104 	add.w	r1, r2, #4
 8002a4c:	6019      	str	r1, [r3, #0]
 8002a4e:	d0d7      	beq.n	8002a00 <_printf_i+0x50>
 8002a50:	f9b2 3000 	ldrsh.w	r3, [r2]
 8002a54:	2b00      	cmp	r3, #0
 8002a56:	da03      	bge.n	8002a60 <_printf_i+0xb0>
 8002a58:	222d      	movs	r2, #45	; 0x2d
 8002a5a:	425b      	negs	r3, r3
 8002a5c:	f884 2043 	strb.w	r2, [r4, #67]	; 0x43
 8002a60:	4962      	ldr	r1, [pc, #392]	; (8002bec <_printf_i+0x23c>)
 8002a62:	220a      	movs	r2, #10
 8002a64:	e017      	b.n	8002a96 <_printf_i+0xe6>
 8002a66:	6820      	ldr	r0, [r4, #0]
 8002a68:	6819      	ldr	r1, [r3, #0]
 8002a6a:	f010 0f80 	tst.w	r0, #128	; 0x80
 8002a6e:	d003      	beq.n	8002a78 <_printf_i+0xc8>
 8002a70:	1d08      	adds	r0, r1, #4
 8002a72:	6018      	str	r0, [r3, #0]
 8002a74:	680b      	ldr	r3, [r1, #0]
 8002a76:	e006      	b.n	8002a86 <_printf_i+0xd6>
 8002a78:	f010 0f40 	tst.w	r0, #64	; 0x40
 8002a7c:	f101 0004 	add.w	r0, r1, #4
 8002a80:	6018      	str	r0, [r3, #0]
 8002a82:	d0f7      	beq.n	8002a74 <_printf_i+0xc4>
 8002a84:	880b      	ldrh	r3, [r1, #0]
 8002a86:	2a6f      	cmp	r2, #111	; 0x6f
 8002a88:	bf14      	ite	ne
 8002a8a:	220a      	movne	r2, #10
 8002a8c:	2208      	moveq	r2, #8
 8002a8e:	4957      	ldr	r1, [pc, #348]	; (8002bec <_printf_i+0x23c>)
 8002a90:	2000      	movs	r0, #0
 8002a92:	f884 0043 	strb.w	r0, [r4, #67]	; 0x43
 8002a96:	6865      	ldr	r5, [r4, #4]
 8002a98:	2d00      	cmp	r5, #0
 8002a9a:	60a5      	str	r5, [r4, #8]
 8002a9c:	f2c0 809c 	blt.w	8002bd8 <_printf_i+0x228>
 8002aa0:	6820      	ldr	r0, [r4, #0]
 8002aa2:	f020 0004 	bic.w	r0, r0, #4
 8002aa6:	6020      	str	r0, [r4, #0]
 8002aa8:	2b00      	cmp	r3, #0
 8002aaa:	d13f      	bne.n	8002b2c <_printf_i+0x17c>
 8002aac:	2d00      	cmp	r5, #0
 8002aae:	f040 8095 	bne.w	8002bdc <_printf_i+0x22c>
 8002ab2:	4675      	mov	r5, lr
 8002ab4:	2a08      	cmp	r2, #8
 8002ab6:	d10b      	bne.n	8002ad0 <_printf_i+0x120>
 8002ab8:	6823      	ldr	r3, [r4, #0]
 8002aba:	07da      	lsls	r2, r3, #31
 8002abc:	d508      	bpl.n	8002ad0 <_printf_i+0x120>
 8002abe:	6923      	ldr	r3, [r4, #16]
 8002ac0:	6862      	ldr	r2, [r4, #4]
 8002ac2:	429a      	cmp	r2, r3
 8002ac4:	bfde      	ittt	le
 8002ac6:	2330      	movle	r3, #48	; 0x30
 8002ac8:	f805 3c01 	strble.w	r3, [r5, #-1]
 8002acc:	f105 35ff 	addle.w	r5, r5, #4294967295
 8002ad0:	ebae 0305 	sub.w	r3, lr, r5
 8002ad4:	6123      	str	r3, [r4, #16]
 8002ad6:	f8cd 8000 	str.w	r8, [sp]
 8002ada:	463b      	mov	r3, r7
 8002adc:	aa03      	add	r2, sp, #12
 8002ade:	4621      	mov	r1, r4
 8002ae0:	4630      	mov	r0, r6
 8002ae2:	f7ff feed 	bl	80028c0 <_printf_common>
 8002ae6:	3001      	adds	r0, #1
 8002ae8:	d155      	bne.n	8002b96 <_printf_i+0x1e6>
 8002aea:	f04f 30ff 	mov.w	r0, #4294967295
 8002aee:	b005      	add	sp, #20
 8002af0:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 8002af4:	f881 2045 	strb.w	r2, [r1, #69]	; 0x45
 8002af8:	493c      	ldr	r1, [pc, #240]	; (8002bec <_printf_i+0x23c>)
 8002afa:	6822      	ldr	r2, [r4, #0]
 8002afc:	6818      	ldr	r0, [r3, #0]
 8002afe:	f012 0f80 	tst.w	r2, #128	; 0x80
 8002b02:	f100 0504 	add.w	r5, r0, #4
 8002b06:	601d      	str	r5, [r3, #0]
 8002b08:	d001      	beq.n	8002b0e <_printf_i+0x15e>
 8002b0a:	6803      	ldr	r3, [r0, #0]
 8002b0c:	e002      	b.n	8002b14 <_printf_i+0x164>
 8002b0e:	0655      	lsls	r5, r2, #25
 8002b10:	d5fb      	bpl.n	8002b0a <_printf_i+0x15a>
 8002b12:	8803      	ldrh	r3, [r0, #0]
 8002b14:	07d0      	lsls	r0, r2, #31
 8002b16:	bf44      	itt	mi
 8002b18:	f042 0220 	orrmi.w	r2, r2, #32
 8002b1c:	6022      	strmi	r2, [r4, #0]
 8002b1e:	b91b      	cbnz	r3, 8002b28 <_printf_i+0x178>
 8002b20:	6822      	ldr	r2, [r4, #0]
 8002b22:	f022 0220 	bic.w	r2, r2, #32
 8002b26:	6022      	str	r2, [r4, #0]
 8002b28:	2210      	movs	r2, #16
 8002b2a:	e7b1      	b.n	8002a90 <_printf_i+0xe0>
 8002b2c:	4675      	mov	r5, lr
 8002b2e:	fbb3 f0f2 	udiv	r0, r3, r2
 8002b32:	fb02 3310 	mls	r3, r2, r0, r3
 8002b36:	5ccb      	ldrb	r3, [r1, r3]
 8002b38:	f805 3d01 	strb.w	r3, [r5, #-1]!
 8002b3c:	4603      	mov	r3, r0
 8002b3e:	2800      	cmp	r0, #0
 8002b40:	d1f5      	bne.n	8002b2e <_printf_i+0x17e>
 8002b42:	e7b7      	b.n	8002ab4 <_printf_i+0x104>
 8002b44:	6808      	ldr	r0, [r1, #0]
 8002b46:	681a      	ldr	r2, [r3, #0]
 8002b48:	f010 0f80 	tst.w	r0, #128	; 0x80
 8002b4c:	6949      	ldr	r1, [r1, #20]
 8002b4e:	d004      	beq.n	8002b5a <_printf_i+0x1aa>
 8002b50:	1d10      	adds	r0, r2, #4
 8002b52:	6018      	str	r0, [r3, #0]
 8002b54:	6813      	ldr	r3, [r2, #0]
 8002b56:	6019      	str	r1, [r3, #0]
 8002b58:	e007      	b.n	8002b6a <_printf_i+0x1ba>
 8002b5a:	f010 0f40 	tst.w	r0, #64	; 0x40
 8002b5e:	f102 0004 	add.w	r0, r2, #4
 8002b62:	6018      	str	r0, [r3, #0]
 8002b64:	6813      	ldr	r3, [r2, #0]
 8002b66:	d0f6      	beq.n	8002b56 <_printf_i+0x1a6>
 8002b68:	8019      	strh	r1, [r3, #0]
 8002b6a:	2300      	movs	r3, #0
 8002b6c:	4675      	mov	r5, lr
 8002b6e:	6123      	str	r3, [r4, #16]
 8002b70:	e7b1      	b.n	8002ad6 <_printf_i+0x126>
 8002b72:	681a      	ldr	r2, [r3, #0]
 8002b74:	1d11      	adds	r1, r2, #4
 8002b76:	6019      	str	r1, [r3, #0]
 8002b78:	6815      	ldr	r5, [r2, #0]
 8002b7a:	2100      	movs	r1, #0
 8002b7c:	6862      	ldr	r2, [r4, #4]
 8002b7e:	4628      	mov	r0, r5
 8002b80:	f000 f8e0 	bl	8002d44 <memchr>
 8002b84:	b108      	cbz	r0, 8002b8a <_printf_i+0x1da>
 8002b86:	1b40      	subs	r0, r0, r5
 8002b88:	6060      	str	r0, [r4, #4]
 8002b8a:	6863      	ldr	r3, [r4, #4]
 8002b8c:	6123      	str	r3, [r4, #16]
 8002b8e:	2300      	movs	r3, #0
 8002b90:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
 8002b94:	e79f      	b.n	8002ad6 <_printf_i+0x126>
 8002b96:	6923      	ldr	r3, [r4, #16]
 8002b98:	462a      	mov	r2, r5
 8002b9a:	4639      	mov	r1, r7
 8002b9c:	4630      	mov	r0, r6
 8002b9e:	47c0      	blx	r8
 8002ba0:	3001      	adds	r0, #1
 8002ba2:	d0a2      	beq.n	8002aea <_printf_i+0x13a>
 8002ba4:	6823      	ldr	r3, [r4, #0]
 8002ba6:	079b      	lsls	r3, r3, #30
 8002ba8:	d507      	bpl.n	8002bba <_printf_i+0x20a>
 8002baa:	2500      	movs	r5, #0
 8002bac:	f104 0919 	add.w	r9, r4, #25
 8002bb0:	68e3      	ldr	r3, [r4, #12]
 8002bb2:	9a03      	ldr	r2, [sp, #12]
 8002bb4:	1a9b      	subs	r3, r3, r2
 8002bb6:	429d      	cmp	r5, r3
 8002bb8:	db05      	blt.n	8002bc6 <_printf_i+0x216>
 8002bba:	68e0      	ldr	r0, [r4, #12]
 8002bbc:	9b03      	ldr	r3, [sp, #12]
 8002bbe:	4298      	cmp	r0, r3
 8002bc0:	bfb8      	it	lt
 8002bc2:	4618      	movlt	r0, r3
 8002bc4:	e793      	b.n	8002aee <_printf_i+0x13e>
 8002bc6:	2301      	movs	r3, #1
 8002bc8:	464a      	mov	r2, r9
 8002bca:	4639      	mov	r1, r7
 8002bcc:	4630      	mov	r0, r6
 8002bce:	47c0      	blx	r8
 8002bd0:	3001      	adds	r0, #1
 8002bd2:	d08a      	beq.n	8002aea <_printf_i+0x13a>
 8002bd4:	3501      	adds	r5, #1
 8002bd6:	e7eb      	b.n	8002bb0 <_printf_i+0x200>
 8002bd8:	2b00      	cmp	r3, #0
 8002bda:	d1a7      	bne.n	8002b2c <_printf_i+0x17c>
 8002bdc:	780b      	ldrb	r3, [r1, #0]
 8002bde:	f104 0542 	add.w	r5, r4, #66	; 0x42
 8002be2:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
 8002be6:	e765      	b.n	8002ab4 <_printf_i+0x104>
 8002be8:	08002fba 	.word	0x08002fba
 8002bec:	08002fa9 	.word	0x08002fa9

08002bf0 <_sbrk_r>:
 8002bf0:	b538      	push	{r3, r4, r5, lr}
 8002bf2:	2300      	movs	r3, #0
 8002bf4:	4c05      	ldr	r4, [pc, #20]	; (8002c0c <_sbrk_r+0x1c>)
 8002bf6:	4605      	mov	r5, r0
 8002bf8:	4608      	mov	r0, r1
 8002bfa:	6023      	str	r3, [r4, #0]
 8002bfc:	f000 f8ec 	bl	8002dd8 <_sbrk>
 8002c00:	1c43      	adds	r3, r0, #1
 8002c02:	d102      	bne.n	8002c0a <_sbrk_r+0x1a>
 8002c04:	6823      	ldr	r3, [r4, #0]
 8002c06:	b103      	cbz	r3, 8002c0a <_sbrk_r+0x1a>
 8002c08:	602b      	str	r3, [r5, #0]
 8002c0a:	bd38      	pop	{r3, r4, r5, pc}
 8002c0c:	20000288 	.word	0x20000288

08002c10 <__sread>:
 8002c10:	b510      	push	{r4, lr}
 8002c12:	460c      	mov	r4, r1
 8002c14:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002c18:	f000 f8a4 	bl	8002d64 <_read_r>
 8002c1c:	2800      	cmp	r0, #0
 8002c1e:	bfab      	itete	ge
 8002c20:	6d63      	ldrge	r3, [r4, #84]	; 0x54
 8002c22:	89a3      	ldrhlt	r3, [r4, #12]
 8002c24:	181b      	addge	r3, r3, r0
 8002c26:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
 8002c2a:	bfac      	ite	ge
 8002c2c:	6563      	strge	r3, [r4, #84]	; 0x54
 8002c2e:	81a3      	strhlt	r3, [r4, #12]
 8002c30:	bd10      	pop	{r4, pc}

08002c32 <__swrite>:
 8002c32:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8002c36:	461f      	mov	r7, r3
 8002c38:	898b      	ldrh	r3, [r1, #12]
 8002c3a:	4605      	mov	r5, r0
 8002c3c:	05db      	lsls	r3, r3, #23
 8002c3e:	460c      	mov	r4, r1
 8002c40:	4616      	mov	r6, r2
 8002c42:	d505      	bpl.n	8002c50 <__swrite+0x1e>
 8002c44:	2302      	movs	r3, #2
 8002c46:	2200      	movs	r2, #0
 8002c48:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002c4c:	f000 f868 	bl	8002d20 <_lseek_r>
 8002c50:	89a3      	ldrh	r3, [r4, #12]
 8002c52:	4632      	mov	r2, r6
 8002c54:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
 8002c58:	81a3      	strh	r3, [r4, #12]
 8002c5a:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 8002c5e:	463b      	mov	r3, r7
 8002c60:	4628      	mov	r0, r5
 8002c62:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 8002c66:	f000 b817 	b.w	8002c98 <_write_r>

08002c6a <__sseek>:
 8002c6a:	b510      	push	{r4, lr}
 8002c6c:	460c      	mov	r4, r1
 8002c6e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002c72:	f000 f855 	bl	8002d20 <_lseek_r>
 8002c76:	1c43      	adds	r3, r0, #1
 8002c78:	89a3      	ldrh	r3, [r4, #12]
 8002c7a:	bf15      	itete	ne
 8002c7c:	6560      	strne	r0, [r4, #84]	; 0x54
 8002c7e:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
 8002c82:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
 8002c86:	81a3      	strheq	r3, [r4, #12]
 8002c88:	bf18      	it	ne
 8002c8a:	81a3      	strhne	r3, [r4, #12]
 8002c8c:	bd10      	pop	{r4, pc}

08002c8e <__sclose>:
 8002c8e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 8002c92:	f000 b813 	b.w	8002cbc <_close_r>
	...

08002c98 <_write_r>:
 8002c98:	b538      	push	{r3, r4, r5, lr}
 8002c9a:	4605      	mov	r5, r0
 8002c9c:	4608      	mov	r0, r1
 8002c9e:	4611      	mov	r1, r2
 8002ca0:	2200      	movs	r2, #0
 8002ca2:	4c05      	ldr	r4, [pc, #20]	; (8002cb8 <_write_r+0x20>)
 8002ca4:	6022      	str	r2, [r4, #0]
 8002ca6:	461a      	mov	r2, r3
 8002ca8:	f7fe fcc8 	bl	800163c <_write>
 8002cac:	1c43      	adds	r3, r0, #1
 8002cae:	d102      	bne.n	8002cb6 <_write_r+0x1e>
 8002cb0:	6823      	ldr	r3, [r4, #0]
 8002cb2:	b103      	cbz	r3, 8002cb6 <_write_r+0x1e>
 8002cb4:	602b      	str	r3, [r5, #0]
 8002cb6:	bd38      	pop	{r3, r4, r5, pc}
 8002cb8:	20000288 	.word	0x20000288

08002cbc <_close_r>:
 8002cbc:	b538      	push	{r3, r4, r5, lr}
 8002cbe:	2300      	movs	r3, #0
 8002cc0:	4c05      	ldr	r4, [pc, #20]	; (8002cd8 <_close_r+0x1c>)
 8002cc2:	4605      	mov	r5, r0
 8002cc4:	4608      	mov	r0, r1
 8002cc6:	6023      	str	r3, [r4, #0]
 8002cc8:	f000 f85e 	bl	8002d88 <_close>
 8002ccc:	1c43      	adds	r3, r0, #1
 8002cce:	d102      	bne.n	8002cd6 <_close_r+0x1a>
 8002cd0:	6823      	ldr	r3, [r4, #0]
 8002cd2:	b103      	cbz	r3, 8002cd6 <_close_r+0x1a>
 8002cd4:	602b      	str	r3, [r5, #0]
 8002cd6:	bd38      	pop	{r3, r4, r5, pc}
 8002cd8:	20000288 	.word	0x20000288

08002cdc <_fstat_r>:
 8002cdc:	b538      	push	{r3, r4, r5, lr}
 8002cde:	2300      	movs	r3, #0
 8002ce0:	4c06      	ldr	r4, [pc, #24]	; (8002cfc <_fstat_r+0x20>)
 8002ce2:	4605      	mov	r5, r0
 8002ce4:	4608      	mov	r0, r1
 8002ce6:	4611      	mov	r1, r2
 8002ce8:	6023      	str	r3, [r4, #0]
 8002cea:	f000 f855 	bl	8002d98 <_fstat>
 8002cee:	1c43      	adds	r3, r0, #1
 8002cf0:	d102      	bne.n	8002cf8 <_fstat_r+0x1c>
 8002cf2:	6823      	ldr	r3, [r4, #0]
 8002cf4:	b103      	cbz	r3, 8002cf8 <_fstat_r+0x1c>
 8002cf6:	602b      	str	r3, [r5, #0]
 8002cf8:	bd38      	pop	{r3, r4, r5, pc}
 8002cfa:	bf00      	nop
 8002cfc:	20000288 	.word	0x20000288

08002d00 <_isatty_r>:
 8002d00:	b538      	push	{r3, r4, r5, lr}
 8002d02:	2300      	movs	r3, #0
 8002d04:	4c05      	ldr	r4, [pc, #20]	; (8002d1c <_isatty_r+0x1c>)
 8002d06:	4605      	mov	r5, r0
 8002d08:	4608      	mov	r0, r1
 8002d0a:	6023      	str	r3, [r4, #0]
 8002d0c:	f000 f84c 	bl	8002da8 <_isatty>
 8002d10:	1c43      	adds	r3, r0, #1
 8002d12:	d102      	bne.n	8002d1a <_isatty_r+0x1a>
 8002d14:	6823      	ldr	r3, [r4, #0]
 8002d16:	b103      	cbz	r3, 8002d1a <_isatty_r+0x1a>
 8002d18:	602b      	str	r3, [r5, #0]
 8002d1a:	bd38      	pop	{r3, r4, r5, pc}
 8002d1c:	20000288 	.word	0x20000288

08002d20 <_lseek_r>:
 8002d20:	b538      	push	{r3, r4, r5, lr}
 8002d22:	4605      	mov	r5, r0
 8002d24:	4608      	mov	r0, r1
 8002d26:	4611      	mov	r1, r2
 8002d28:	2200      	movs	r2, #0
 8002d2a:	4c05      	ldr	r4, [pc, #20]	; (8002d40 <_lseek_r+0x20>)
 8002d2c:	6022      	str	r2, [r4, #0]
 8002d2e:	461a      	mov	r2, r3
 8002d30:	f000 f842 	bl	8002db8 <_lseek>
 8002d34:	1c43      	adds	r3, r0, #1
 8002d36:	d102      	bne.n	8002d3e <_lseek_r+0x1e>
 8002d38:	6823      	ldr	r3, [r4, #0]
 8002d3a:	b103      	cbz	r3, 8002d3e <_lseek_r+0x1e>
 8002d3c:	602b      	str	r3, [r5, #0]
 8002d3e:	bd38      	pop	{r3, r4, r5, pc}
 8002d40:	20000288 	.word	0x20000288

08002d44 <memchr>:
 8002d44:	b510      	push	{r4, lr}
 8002d46:	b2c9      	uxtb	r1, r1
 8002d48:	4402      	add	r2, r0
 8002d4a:	4290      	cmp	r0, r2
 8002d4c:	4603      	mov	r3, r0
 8002d4e:	d101      	bne.n	8002d54 <memchr+0x10>
 8002d50:	2000      	movs	r0, #0
 8002d52:	bd10      	pop	{r4, pc}
 8002d54:	781c      	ldrb	r4, [r3, #0]
 8002d56:	3001      	adds	r0, #1
 8002d58:	428c      	cmp	r4, r1
 8002d5a:	d1f6      	bne.n	8002d4a <memchr+0x6>
 8002d5c:	4618      	mov	r0, r3
 8002d5e:	bd10      	pop	{r4, pc}

08002d60 <__malloc_lock>:
 8002d60:	4770      	bx	lr

08002d62 <__malloc_unlock>:
 8002d62:	4770      	bx	lr

08002d64 <_read_r>:
 8002d64:	b538      	push	{r3, r4, r5, lr}
 8002d66:	4605      	mov	r5, r0
 8002d68:	4608      	mov	r0, r1
 8002d6a:	4611      	mov	r1, r2
 8002d6c:	2200      	movs	r2, #0
 8002d6e:	4c05      	ldr	r4, [pc, #20]	; (8002d84 <_read_r+0x20>)
 8002d70:	6022      	str	r2, [r4, #0]
 8002d72:	461a      	mov	r2, r3
 8002d74:	f000 f828 	bl	8002dc8 <_read>
 8002d78:	1c43      	adds	r3, r0, #1
 8002d7a:	d102      	bne.n	8002d82 <_read_r+0x1e>
 8002d7c:	6823      	ldr	r3, [r4, #0]
 8002d7e:	b103      	cbz	r3, 8002d82 <_read_r+0x1e>
 8002d80:	602b      	str	r3, [r5, #0]
 8002d82:	bd38      	pop	{r3, r4, r5, pc}
 8002d84:	20000288 	.word	0x20000288

08002d88 <_close>:
 8002d88:	2258      	movs	r2, #88	; 0x58
 8002d8a:	4b02      	ldr	r3, [pc, #8]	; (8002d94 <_close+0xc>)
 8002d8c:	f04f 30ff 	mov.w	r0, #4294967295
 8002d90:	601a      	str	r2, [r3, #0]
 8002d92:	4770      	bx	lr
 8002d94:	20000288 	.word	0x20000288

08002d98 <_fstat>:
 8002d98:	2258      	movs	r2, #88	; 0x58
 8002d9a:	4b02      	ldr	r3, [pc, #8]	; (8002da4 <_fstat+0xc>)
 8002d9c:	f04f 30ff 	mov.w	r0, #4294967295
 8002da0:	601a      	str	r2, [r3, #0]
 8002da2:	4770      	bx	lr
 8002da4:	20000288 	.word	0x20000288

08002da8 <_isatty>:
 8002da8:	2258      	movs	r2, #88	; 0x58
 8002daa:	4b02      	ldr	r3, [pc, #8]	; (8002db4 <_isatty+0xc>)
 8002dac:	2000      	movs	r0, #0
 8002dae:	601a      	str	r2, [r3, #0]
 8002db0:	4770      	bx	lr
 8002db2:	bf00      	nop
 8002db4:	20000288 	.word	0x20000288

08002db8 <_lseek>:
 8002db8:	2258      	movs	r2, #88	; 0x58
 8002dba:	4b02      	ldr	r3, [pc, #8]	; (8002dc4 <_lseek+0xc>)
 8002dbc:	f04f 30ff 	mov.w	r0, #4294967295
 8002dc0:	601a      	str	r2, [r3, #0]
 8002dc2:	4770      	bx	lr
 8002dc4:	20000288 	.word	0x20000288

08002dc8 <_read>:
 8002dc8:	2258      	movs	r2, #88	; 0x58
 8002dca:	4b02      	ldr	r3, [pc, #8]	; (8002dd4 <_read+0xc>)
 8002dcc:	f04f 30ff 	mov.w	r0, #4294967295
 8002dd0:	601a      	str	r2, [r3, #0]
 8002dd2:	4770      	bx	lr
 8002dd4:	20000288 	.word	0x20000288

08002dd8 <_sbrk>:
 8002dd8:	4b04      	ldr	r3, [pc, #16]	; (8002dec <_sbrk+0x14>)
 8002dda:	4602      	mov	r2, r0
 8002ddc:	6819      	ldr	r1, [r3, #0]
 8002dde:	b909      	cbnz	r1, 8002de4 <_sbrk+0xc>
 8002de0:	4903      	ldr	r1, [pc, #12]	; (8002df0 <_sbrk+0x18>)
 8002de2:	6019      	str	r1, [r3, #0]
 8002de4:	6818      	ldr	r0, [r3, #0]
 8002de6:	4402      	add	r2, r0
 8002de8:	601a      	str	r2, [r3, #0]
 8002dea:	4770      	bx	lr
 8002dec:	200000cc 	.word	0x200000cc
 8002df0:	2000028c 	.word	0x2000028c

08002df4 <_init>:
 8002df4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002df6:	bf00      	nop
 8002df8:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8002dfa:	bc08      	pop	{r3}
 8002dfc:	469e      	mov	lr, r3
 8002dfe:	4770      	bx	lr

08002e00 <_fini>:
 8002e00:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8002e02:	bf00      	nop
 8002e04:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8002e06:	bc08      	pop	{r3}
 8002e08:	469e      	mov	lr, r3
 8002e0a:	4770      	bx	lr