STM32F100_RGB_Sensor.list 413 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561856285638564856585668567856885698570857185728573857485758576857785788579858085818582858385848585858685878588858985908591859285938594859585968597859885998600860186028603860486058606860786088609861086118612861386148615861686178618861986208621862286238624862586268627862886298630863186328633863486358636863786388639864086418642864386448645864686478648864986508651865286538654865586568657865886598660866186628663866486658666866786688669867086718672867386748675867686778678867986808681868286838684868586868687868886898690869186928693869486958696869786988699870087018702870387048705870687078708870987108711871287138714871587168717871887198720872187228723872487258726872787288729873087318732873387348735873687378738873987408741874287438744874587468747874887498750875187528753875487558756875787588759876087618762876387648765876687678768876987708771877287738774877587768777877887798780878187828783878487858786878787888789879087918792879387948795879687978798879988008801880288038804880588068807880888098810881188128813881488158816881788188819882088218822882388248825882688278828882988308831883288338834883588368837883888398840884188428843884488458846884788488849885088518852885388548855885688578858885988608861886288638864886588668867886888698870887188728873887488758876887788788879888088818882888388848885888688878888888988908891889288938894889588968897889888998900890189028903890489058906890789088909891089118912891389148915891689178918891989208921892289238924892589268927892889298930893189328933893489358936893789388939894089418942894389448945894689478948894989508951895289538954895589568957895889598960896189628963896489658966896789688969897089718972897389748975897689778978897989808981898289838984898589868987898889898990899189928993899489958996899789988999900090019002900390049005900690079008900990109011901290139014901590169017901890199020902190229023902490259026902790289029903090319032903390349035903690379038903990409041904290439044904590469047904890499050905190529053905490559056905790589059906090619062906390649065906690679068906990709071907290739074907590769077907890799080908190829083908490859086908790889089909090919092909390949095909690979098909991009101910291039104910591069107910891099110911191129113911491159116911791189119912091219122912391249125912691279128912991309131913291339134913591369137913891399140914191429143914491459146914791489149915091519152915391549155915691579158915991609161916291639164916591669167916891699170917191729173917491759176917791789179918091819182918391849185918691879188918991909191919291939194919591969197919891999200920192029203920492059206920792089209921092119212921392149215921692179218921992209221922292239224922592269227922892299230923192329233923492359236923792389239924092419242924392449245924692479248924992509251925292539254925592569257925892599260926192629263926492659266926792689269927092719272927392749275927692779278927992809281928292839284928592869287928892899290929192929293929492959296929792989299930093019302930393049305930693079308930993109311931293139314931593169317931893199320932193229323932493259326932793289329933093319332933393349335933693379338933993409341934293439344934593469347934893499350935193529353935493559356935793589359936093619362936393649365936693679368936993709371937293739374937593769377937893799380938193829383938493859386938793889389939093919392939393949395939693979398939994009401940294039404940594069407940894099410941194129413941494159416941794189419942094219422942394249425942694279428942994309431943294339434943594369437943894399440944194429443944494459446944794489449945094519452945394549455945694579458945994609461946294639464946594669467946894699470947194729473947494759476947794789479948094819482948394849485948694879488948994909491949294939494949594969497949894999500950195029503950495059506950795089509951095119512951395149515951695179518951995209521952295239524952595269527952895299530953195329533953495359536953795389539954095419542954395449545954695479548954995509551955295539554955595569557955895599560956195629563956495659566956795689569957095719572957395749575957695779578957995809581958295839584958595869587958895899590959195929593959495959596959795989599960096019602960396049605960696079608960996109611961296139614961596169617961896199620962196229623962496259626962796289629963096319632963396349635963696379638963996409641964296439644964596469647964896499650965196529653965496559656965796589659966096619662966396649665966696679668966996709671967296739674967596769677967896799680968196829683968496859686968796889689969096919692969396949695969696979698969997009701970297039704970597069707970897099710971197129713971497159716971797189719972097219722972397249725972697279728972997309731973297339734973597369737973897399740974197429743974497459746974797489749975097519752975397549755975697579758975997609761976297639764976597669767976897699770977197729773977497759776977797789779978097819782978397849785978697879788978997909791979297939794979597969797979897999800980198029803980498059806980798089809981098119812981398149815981698179818981998209821982298239824982598269827982898299830983198329833983498359836983798389839984098419842984398449845984698479848984998509851985298539854985598569857985898599860986198629863986498659866986798689869987098719872987398749875987698779878987998809881988298839884988598869887988898899890989198929893989498959896989798989899990099019902990399049905990699079908990999109911991299139914991599169917991899199920992199229923992499259926992799289929993099319932993399349935993699379938993999409941994299439944994599469947994899499950995199529953995499559956995799589959996099619962996399649965996699679968996999709971997299739974997599769977997899799980998199829983998499859986998799889989999099919992999399949995999699979998999910000100011000210003100041000510006100071000810009100101001110012100131001410015100161001710018100191002010021100221002310024100251002610027100281002910030100311003210033100341003510036100371003810039100401004110042100431004410045100461004710048100491005010051100521005310054100551005610057100581005910060100611006210063100641006510066100671006810069100701007110072100731007410075100761007710078100791008010081100821008310084100851008610087100881008910090100911009210093100941009510096100971009810099101001010110102101031010410105101061010710108101091011010111101121011310114101151011610117101181011910120101211012210123101241012510126101271012810129101301013110132101331013410135101361013710138101391014010141101421014310144101451014610147101481014910150101511015210153101541015510156101571015810159101601016110162101631016410165101661016710168101691017010171101721017310174101751017610177101781017910180101811018210183101841018510186101871018810189101901019110192
  1. STM32F100_RGB_Sensor.elf: file format elf32-littlearm
  2. Sections:
  3. Idx Name Size VMA LMA File off Algn
  4. 0 .isr_vector 000001d0 08000000 08000000 00010000 2**0
  5. CONTENTS, ALLOC, LOAD, READONLY, DATA
  6. 1 .text 000041f8 080001d0 080001d0 000101d0 2**2
  7. CONTENTS, ALLOC, LOAD, READONLY, CODE
  8. 2 .rodata 00000214 080043c8 080043c8 000143c8 2**2
  9. CONTENTS, ALLOC, LOAD, READONLY, DATA
  10. 3 .init_array 00000004 080045dc 080045dc 000145dc 2**2
  11. CONTENTS, ALLOC, LOAD, DATA
  12. 4 .fini_array 00000004 080045e0 080045e0 000145e0 2**2
  13. CONTENTS, ALLOC, LOAD, DATA
  14. 5 .data 00000070 20000000 080045e4 00020000 2**2
  15. CONTENTS, ALLOC, LOAD, DATA
  16. 6 .bss 00000260 20000070 08004654 00020070 2**2
  17. ALLOC
  18. 7 ._user_heap_stack 00000600 200002d0 08004654 000202d0 2**0
  19. ALLOC
  20. 8 .ARM.attributes 00000029 00000000 00000000 00020070 2**0
  21. CONTENTS, READONLY
  22. 9 .debug_info 0001bdb6 00000000 00000000 00020099 2**0
  23. CONTENTS, READONLY, DEBUGGING
  24. 10 .debug_abbrev 00003581 00000000 00000000 0003be4f 2**0
  25. CONTENTS, READONLY, DEBUGGING
  26. 11 .debug_loc 0000add8 00000000 00000000 0003f3d0 2**0
  27. CONTENTS, READONLY, DEBUGGING
  28. 12 .debug_aranges 00000c60 00000000 00000000 0004a1a8 2**3
  29. CONTENTS, READONLY, DEBUGGING
  30. 13 .debug_ranges 000012d8 00000000 00000000 0004ae08 2**3
  31. CONTENTS, READONLY, DEBUGGING
  32. 14 .debug_line 00008499 00000000 00000000 0004c0e0 2**0
  33. CONTENTS, READONLY, DEBUGGING
  34. 15 .debug_str 00004c24 00000000 00000000 00054579 2**0
  35. CONTENTS, READONLY, DEBUGGING
  36. 16 .comment 0000007c 00000000 00000000 0005919d 2**0
  37. CONTENTS, READONLY
  38. 17 .debug_frame 00002e30 00000000 00000000 0005921c 2**2
  39. CONTENTS, READONLY, DEBUGGING
  40. 18 .stab 00000084 00000000 00000000 0005c04c 2**2
  41. CONTENTS, READONLY, DEBUGGING
  42. 19 .stabstr 00000117 00000000 00000000 0005c0d0 2**0
  43. CONTENTS, READONLY, DEBUGGING
  44. Disassembly of section .text:
  45. 080001d0 <__do_global_dtors_aux>:
  46. 80001d0: b510 push {r4, lr}
  47. 80001d2: 4c05 ldr r4, [pc, #20] ; (80001e8 <__do_global_dtors_aux+0x18>)
  48. 80001d4: 7823 ldrb r3, [r4, #0]
  49. 80001d6: b933 cbnz r3, 80001e6 <__do_global_dtors_aux+0x16>
  50. 80001d8: 4b04 ldr r3, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x1c>)
  51. 80001da: b113 cbz r3, 80001e2 <__do_global_dtors_aux+0x12>
  52. 80001dc: 4804 ldr r0, [pc, #16] ; (80001f0 <__do_global_dtors_aux+0x20>)
  53. 80001de: f3af 8000 nop.w
  54. 80001e2: 2301 movs r3, #1
  55. 80001e4: 7023 strb r3, [r4, #0]
  56. 80001e6: bd10 pop {r4, pc}
  57. 80001e8: 20000070 .word 0x20000070
  58. 80001ec: 00000000 .word 0x00000000
  59. 80001f0: 080043b0 .word 0x080043b0
  60. 080001f4 <frame_dummy>:
  61. 80001f4: b508 push {r3, lr}
  62. 80001f6: 4b03 ldr r3, [pc, #12] ; (8000204 <frame_dummy+0x10>)
  63. 80001f8: b11b cbz r3, 8000202 <frame_dummy+0xe>
  64. 80001fa: 4903 ldr r1, [pc, #12] ; (8000208 <frame_dummy+0x14>)
  65. 80001fc: 4803 ldr r0, [pc, #12] ; (800020c <frame_dummy+0x18>)
  66. 80001fe: f3af 8000 nop.w
  67. 8000202: bd08 pop {r3, pc}
  68. 8000204: 00000000 .word 0x00000000
  69. 8000208: 20000074 .word 0x20000074
  70. 800020c: 080043b0 .word 0x080043b0
  71. 08000210 <HAL_InitTick>:
  72. * implementation in user file.
  73. * @param TickPriority Tick interrupt priority.
  74. * @retval HAL status
  75. */
  76. __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
  77. {
  78. 8000210: b538 push {r3, r4, r5, lr}
  79. /* Configure the SysTick to have interrupt in 1ms time basis*/
  80. if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
  81. 8000212: 4b0e ldr r3, [pc, #56] ; (800024c <HAL_InitTick+0x3c>)
  82. {
  83. 8000214: 4605 mov r5, r0
  84. if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
  85. 8000216: 7818 ldrb r0, [r3, #0]
  86. 8000218: f44f 737a mov.w r3, #1000 ; 0x3e8
  87. 800021c: fbb3 f3f0 udiv r3, r3, r0
  88. 8000220: 4a0b ldr r2, [pc, #44] ; (8000250 <HAL_InitTick+0x40>)
  89. 8000222: 6810 ldr r0, [r2, #0]
  90. 8000224: fbb0 f0f3 udiv r0, r0, r3
  91. 8000228: f000 f9be bl 80005a8 <HAL_SYSTICK_Config>
  92. 800022c: 4604 mov r4, r0
  93. 800022e: b958 cbnz r0, 8000248 <HAL_InitTick+0x38>
  94. {
  95. return HAL_ERROR;
  96. }
  97. /* Configure the SysTick IRQ priority */
  98. if (TickPriority < (1UL << __NVIC_PRIO_BITS))
  99. 8000230: 2d0f cmp r5, #15
  100. 8000232: d809 bhi.n 8000248 <HAL_InitTick+0x38>
  101. {
  102. HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
  103. 8000234: 4602 mov r2, r0
  104. 8000236: 4629 mov r1, r5
  105. 8000238: f04f 30ff mov.w r0, #4294967295
  106. 800023c: f000 f974 bl 8000528 <HAL_NVIC_SetPriority>
  107. uwTickPrio = TickPriority;
  108. 8000240: 4b04 ldr r3, [pc, #16] ; (8000254 <HAL_InitTick+0x44>)
  109. 8000242: 4620 mov r0, r4
  110. 8000244: 601d str r5, [r3, #0]
  111. 8000246: bd38 pop {r3, r4, r5, pc}
  112. return HAL_ERROR;
  113. 8000248: 2001 movs r0, #1
  114. return HAL_ERROR;
  115. }
  116. /* Return function status */
  117. return HAL_OK;
  118. }
  119. 800024a: bd38 pop {r3, r4, r5, pc}
  120. 800024c: 20000000 .word 0x20000000
  121. 8000250: 20000008 .word 0x20000008
  122. 8000254: 20000004 .word 0x20000004
  123. 08000258 <HAL_Init>:
  124. {
  125. 8000258: b508 push {r3, lr}
  126. HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
  127. 800025a: 2003 movs r0, #3
  128. 800025c: f000 f952 bl 8000504 <HAL_NVIC_SetPriorityGrouping>
  129. HAL_InitTick(TICK_INT_PRIORITY);
  130. 8000260: 2000 movs r0, #0
  131. 8000262: f7ff ffd5 bl 8000210 <HAL_InitTick>
  132. HAL_MspInit();
  133. 8000266: f002 feab bl 8002fc0 <HAL_MspInit>
  134. }
  135. 800026a: 2000 movs r0, #0
  136. 800026c: bd08 pop {r3, pc}
  137. ...
  138. 08000270 <HAL_IncTick>:
  139. * implementations in user file.
  140. * @retval None
  141. */
  142. __weak void HAL_IncTick(void)
  143. {
  144. uwTick += uwTickFreq;
  145. 8000270: 4a03 ldr r2, [pc, #12] ; (8000280 <HAL_IncTick+0x10>)
  146. 8000272: 4b04 ldr r3, [pc, #16] ; (8000284 <HAL_IncTick+0x14>)
  147. 8000274: 6811 ldr r1, [r2, #0]
  148. 8000276: 781b ldrb r3, [r3, #0]
  149. 8000278: 440b add r3, r1
  150. 800027a: 6013 str r3, [r2, #0]
  151. 800027c: 4770 bx lr
  152. 800027e: bf00 nop
  153. 8000280: 20000144 .word 0x20000144
  154. 8000284: 20000000 .word 0x20000000
  155. 08000288 <HAL_GetTick>:
  156. * implementations in user file.
  157. * @retval tick value
  158. */
  159. __weak uint32_t HAL_GetTick(void)
  160. {
  161. return uwTick;
  162. 8000288: 4b01 ldr r3, [pc, #4] ; (8000290 <HAL_GetTick+0x8>)
  163. 800028a: 6818 ldr r0, [r3, #0]
  164. }
  165. 800028c: 4770 bx lr
  166. 800028e: bf00 nop
  167. 8000290: 20000144 .word 0x20000144
  168. 08000294 <HAL_Delay>:
  169. * implementations in user file.
  170. * @param Delay specifies the delay time length, in milliseconds.
  171. * @retval None
  172. */
  173. __weak void HAL_Delay(uint32_t Delay)
  174. {
  175. 8000294: b538 push {r3, r4, r5, lr}
  176. 8000296: 4604 mov r4, r0
  177. uint32_t tickstart = HAL_GetTick();
  178. 8000298: f7ff fff6 bl 8000288 <HAL_GetTick>
  179. 800029c: 4605 mov r5, r0
  180. uint32_t wait = Delay;
  181. /* Add a freq to guarantee minimum wait */
  182. if (wait < HAL_MAX_DELAY)
  183. 800029e: 1c63 adds r3, r4, #1
  184. {
  185. wait += (uint32_t)(uwTickFreq);
  186. 80002a0: bf1e ittt ne
  187. 80002a2: 4b04 ldrne r3, [pc, #16] ; (80002b4 <HAL_Delay+0x20>)
  188. 80002a4: 781b ldrbne r3, [r3, #0]
  189. 80002a6: 18e4 addne r4, r4, r3
  190. }
  191. while ((HAL_GetTick() - tickstart) < wait)
  192. 80002a8: f7ff ffee bl 8000288 <HAL_GetTick>
  193. 80002ac: 1b40 subs r0, r0, r5
  194. 80002ae: 4284 cmp r4, r0
  195. 80002b0: d8fa bhi.n 80002a8 <HAL_Delay+0x14>
  196. {
  197. }
  198. }
  199. 80002b2: bd38 pop {r3, r4, r5, pc}
  200. 80002b4: 20000000 .word 0x20000000
  201. 080002b8 <HAL_ADC_ConfigChannel>:
  202. * @retval HAL status
  203. */
  204. HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
  205. {
  206. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  207. __IO uint32_t wait_loop_index = 0U;
  208. 80002b8: 2300 movs r3, #0
  209. {
  210. 80002ba: b573 push {r0, r1, r4, r5, r6, lr}
  211. __IO uint32_t wait_loop_index = 0U;
  212. 80002bc: 9301 str r3, [sp, #4]
  213. assert_param(IS_ADC_CHANNEL(sConfig->Channel));
  214. assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
  215. assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
  216. /* Process locked */
  217. __HAL_LOCK(hadc);
  218. 80002be: f890 3024 ldrb.w r3, [r0, #36] ; 0x24
  219. 80002c2: 2b01 cmp r3, #1
  220. 80002c4: d074 beq.n 80003b0 <HAL_ADC_ConfigChannel+0xf8>
  221. 80002c6: 2301 movs r3, #1
  222. /* Regular sequence configuration */
  223. /* For Rank 1 to 6 */
  224. if (sConfig->Rank < 7U)
  225. 80002c8: 684d ldr r5, [r1, #4]
  226. __HAL_LOCK(hadc);
  227. 80002ca: f880 3024 strb.w r3, [r0, #36] ; 0x24
  228. if (sConfig->Rank < 7U)
  229. 80002ce: 2d06 cmp r5, #6
  230. 80002d0: 6802 ldr r2, [r0, #0]
  231. 80002d2: ea4f 0385 mov.w r3, r5, lsl #2
  232. 80002d6: 680c ldr r4, [r1, #0]
  233. 80002d8: d825 bhi.n 8000326 <HAL_ADC_ConfigChannel+0x6e>
  234. {
  235. MODIFY_REG(hadc->Instance->SQR3 ,
  236. 80002da: 442b add r3, r5
  237. 80002dc: 251f movs r5, #31
  238. 80002de: 6b56 ldr r6, [r2, #52] ; 0x34
  239. 80002e0: 3b05 subs r3, #5
  240. 80002e2: 409d lsls r5, r3
  241. 80002e4: ea26 0505 bic.w r5, r6, r5
  242. 80002e8: fa04 f303 lsl.w r3, r4, r3
  243. 80002ec: 432b orrs r3, r5
  244. 80002ee: 6353 str r3, [r2, #52] ; 0x34
  245. }
  246. /* Channel sampling time configuration */
  247. /* For channels 10 to 17 */
  248. if (sConfig->Channel >= ADC_CHANNEL_10)
  249. 80002f0: 2c09 cmp r4, #9
  250. 80002f2: ea4f 0344 mov.w r3, r4, lsl #1
  251. 80002f6: 688d ldr r5, [r1, #8]
  252. 80002f8: d92f bls.n 800035a <HAL_ADC_ConfigChannel+0xa2>
  253. {
  254. MODIFY_REG(hadc->Instance->SMPR1 ,
  255. 80002fa: 2607 movs r6, #7
  256. 80002fc: 4423 add r3, r4
  257. 80002fe: 68d1 ldr r1, [r2, #12]
  258. 8000300: 3b1e subs r3, #30
  259. 8000302: 409e lsls r6, r3
  260. 8000304: ea21 0106 bic.w r1, r1, r6
  261. 8000308: fa05 f303 lsl.w r3, r5, r3
  262. 800030c: 430b orrs r3, r1
  263. 800030e: 60d3 str r3, [r2, #12]
  264. ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
  265. }
  266. /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
  267. /* and VREFINT measurement path. */
  268. if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
  269. 8000310: f1a4 0310 sub.w r3, r4, #16
  270. 8000314: 2b01 cmp r3, #1
  271. 8000316: d92b bls.n 8000370 <HAL_ADC_ConfigChannel+0xb8>
  272. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  273. 8000318: 2300 movs r3, #0
  274. tmp_hal_status = HAL_ERROR;
  275. }
  276. }
  277. /* Process unlocked */
  278. __HAL_UNLOCK(hadc);
  279. 800031a: 2200 movs r2, #0
  280. 800031c: f880 2024 strb.w r2, [r0, #36] ; 0x24
  281. /* Return function status */
  282. return tmp_hal_status;
  283. }
  284. 8000320: 4618 mov r0, r3
  285. 8000322: b002 add sp, #8
  286. 8000324: bd70 pop {r4, r5, r6, pc}
  287. else if (sConfig->Rank < 13U)
  288. 8000326: 2d0c cmp r5, #12
  289. 8000328: d80b bhi.n 8000342 <HAL_ADC_ConfigChannel+0x8a>
  290. MODIFY_REG(hadc->Instance->SQR2 ,
  291. 800032a: 442b add r3, r5
  292. 800032c: 251f movs r5, #31
  293. 800032e: 6b16 ldr r6, [r2, #48] ; 0x30
  294. 8000330: 3b23 subs r3, #35 ; 0x23
  295. 8000332: 409d lsls r5, r3
  296. 8000334: ea26 0505 bic.w r5, r6, r5
  297. 8000338: fa04 f303 lsl.w r3, r4, r3
  298. 800033c: 432b orrs r3, r5
  299. 800033e: 6313 str r3, [r2, #48] ; 0x30
  300. 8000340: e7d6 b.n 80002f0 <HAL_ADC_ConfigChannel+0x38>
  301. MODIFY_REG(hadc->Instance->SQR1 ,
  302. 8000342: 442b add r3, r5
  303. 8000344: 251f movs r5, #31
  304. 8000346: 6ad6 ldr r6, [r2, #44] ; 0x2c
  305. 8000348: 3b41 subs r3, #65 ; 0x41
  306. 800034a: 409d lsls r5, r3
  307. 800034c: ea26 0505 bic.w r5, r6, r5
  308. 8000350: fa04 f303 lsl.w r3, r4, r3
  309. 8000354: 432b orrs r3, r5
  310. 8000356: 62d3 str r3, [r2, #44] ; 0x2c
  311. 8000358: e7ca b.n 80002f0 <HAL_ADC_ConfigChannel+0x38>
  312. MODIFY_REG(hadc->Instance->SMPR2 ,
  313. 800035a: 2607 movs r6, #7
  314. 800035c: 6911 ldr r1, [r2, #16]
  315. 800035e: 4423 add r3, r4
  316. 8000360: 409e lsls r6, r3
  317. 8000362: ea21 0106 bic.w r1, r1, r6
  318. 8000366: fa05 f303 lsl.w r3, r5, r3
  319. 800036a: 430b orrs r3, r1
  320. 800036c: 6113 str r3, [r2, #16]
  321. 800036e: e7cf b.n 8000310 <HAL_ADC_ConfigChannel+0x58>
  322. if (hadc->Instance == ADC1)
  323. 8000370: 4b10 ldr r3, [pc, #64] ; (80003b4 <HAL_ADC_ConfigChannel+0xfc>)
  324. 8000372: 429a cmp r2, r3
  325. 8000374: d116 bne.n 80003a4 <HAL_ADC_ConfigChannel+0xec>
  326. if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
  327. 8000376: 6893 ldr r3, [r2, #8]
  328. 8000378: 021b lsls r3, r3, #8
  329. 800037a: d4cd bmi.n 8000318 <HAL_ADC_ConfigChannel+0x60>
  330. SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
  331. 800037c: 6893 ldr r3, [r2, #8]
  332. if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
  333. 800037e: 2c10 cmp r4, #16
  334. SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
  335. 8000380: f443 0300 orr.w r3, r3, #8388608 ; 0x800000
  336. 8000384: 6093 str r3, [r2, #8]
  337. if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
  338. 8000386: d1c7 bne.n 8000318 <HAL_ADC_ConfigChannel+0x60>
  339. wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
  340. 8000388: 4b0b ldr r3, [pc, #44] ; (80003b8 <HAL_ADC_ConfigChannel+0x100>)
  341. 800038a: 4a0c ldr r2, [pc, #48] ; (80003bc <HAL_ADC_ConfigChannel+0x104>)
  342. 800038c: 681b ldr r3, [r3, #0]
  343. 800038e: fbb3 f2f2 udiv r2, r3, r2
  344. 8000392: 230a movs r3, #10
  345. 8000394: 4353 muls r3, r2
  346. wait_loop_index--;
  347. 8000396: 9301 str r3, [sp, #4]
  348. while(wait_loop_index != 0U)
  349. 8000398: 9b01 ldr r3, [sp, #4]
  350. 800039a: 2b00 cmp r3, #0
  351. 800039c: d0bc beq.n 8000318 <HAL_ADC_ConfigChannel+0x60>
  352. wait_loop_index--;
  353. 800039e: 9b01 ldr r3, [sp, #4]
  354. 80003a0: 3b01 subs r3, #1
  355. 80003a2: e7f8 b.n 8000396 <HAL_ADC_ConfigChannel+0xde>
  356. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  357. 80003a4: 6a83 ldr r3, [r0, #40] ; 0x28
  358. 80003a6: f043 0320 orr.w r3, r3, #32
  359. 80003aa: 6283 str r3, [r0, #40] ; 0x28
  360. tmp_hal_status = HAL_ERROR;
  361. 80003ac: 2301 movs r3, #1
  362. 80003ae: e7b4 b.n 800031a <HAL_ADC_ConfigChannel+0x62>
  363. __HAL_LOCK(hadc);
  364. 80003b0: 2302 movs r3, #2
  365. 80003b2: e7b5 b.n 8000320 <HAL_ADC_ConfigChannel+0x68>
  366. 80003b4: 40012400 .word 0x40012400
  367. 80003b8: 20000008 .word 0x20000008
  368. 80003bc: 000f4240 .word 0x000f4240
  369. 080003c0 <ADC_ConversionStop_Disable>:
  370. * stopped to disable the ADC.
  371. * @param hadc: ADC handle
  372. * @retval HAL status.
  373. */
  374. HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
  375. {
  376. 80003c0: b538 push {r3, r4, r5, lr}
  377. uint32_t tickstart = 0U;
  378. /* Verification if ADC is not already disabled */
  379. if (ADC_IS_ENABLE(hadc) != RESET)
  380. 80003c2: 6803 ldr r3, [r0, #0]
  381. {
  382. 80003c4: 4604 mov r4, r0
  383. if (ADC_IS_ENABLE(hadc) != RESET)
  384. 80003c6: 689a ldr r2, [r3, #8]
  385. 80003c8: 07d2 lsls r2, r2, #31
  386. 80003ca: d401 bmi.n 80003d0 <ADC_ConversionStop_Disable+0x10>
  387. }
  388. }
  389. }
  390. /* Return HAL status */
  391. return HAL_OK;
  392. 80003cc: 2000 movs r0, #0
  393. 80003ce: bd38 pop {r3, r4, r5, pc}
  394. __HAL_ADC_DISABLE(hadc);
  395. 80003d0: 689a ldr r2, [r3, #8]
  396. 80003d2: f022 0201 bic.w r2, r2, #1
  397. 80003d6: 609a str r2, [r3, #8]
  398. tickstart = HAL_GetTick();
  399. 80003d8: f7ff ff56 bl 8000288 <HAL_GetTick>
  400. 80003dc: 4605 mov r5, r0
  401. while(ADC_IS_ENABLE(hadc) != RESET)
  402. 80003de: 6823 ldr r3, [r4, #0]
  403. 80003e0: 689b ldr r3, [r3, #8]
  404. 80003e2: 07db lsls r3, r3, #31
  405. 80003e4: d5f2 bpl.n 80003cc <ADC_ConversionStop_Disable+0xc>
  406. if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
  407. 80003e6: f7ff ff4f bl 8000288 <HAL_GetTick>
  408. 80003ea: 1b40 subs r0, r0, r5
  409. 80003ec: 2802 cmp r0, #2
  410. 80003ee: d9f6 bls.n 80003de <ADC_ConversionStop_Disable+0x1e>
  411. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  412. 80003f0: 6aa3 ldr r3, [r4, #40] ; 0x28
  413. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  414. 80003f2: 2001 movs r0, #1
  415. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  416. 80003f4: f043 0310 orr.w r3, r3, #16
  417. 80003f8: 62a3 str r3, [r4, #40] ; 0x28
  418. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  419. 80003fa: 6ae3 ldr r3, [r4, #44] ; 0x2c
  420. 80003fc: f043 0301 orr.w r3, r3, #1
  421. 8000400: 62e3 str r3, [r4, #44] ; 0x2c
  422. 8000402: bd38 pop {r3, r4, r5, pc}
  423. 08000404 <HAL_ADC_Init>:
  424. {
  425. 8000404: b570 push {r4, r5, r6, lr}
  426. if(hadc == NULL)
  427. 8000406: 4604 mov r4, r0
  428. 8000408: 2800 cmp r0, #0
  429. 800040a: d071 beq.n 80004f0 <HAL_ADC_Init+0xec>
  430. if (hadc->State == HAL_ADC_STATE_RESET)
  431. 800040c: 6a83 ldr r3, [r0, #40] ; 0x28
  432. 800040e: b923 cbnz r3, 800041a <HAL_ADC_Init+0x16>
  433. ADC_CLEAR_ERRORCODE(hadc);
  434. 8000410: 62c3 str r3, [r0, #44] ; 0x2c
  435. hadc->Lock = HAL_UNLOCKED;
  436. 8000412: f880 3024 strb.w r3, [r0, #36] ; 0x24
  437. HAL_ADC_MspInit(hadc);
  438. 8000416: f002 fdf5 bl 8003004 <HAL_ADC_MspInit>
  439. tmp_hal_status = ADC_ConversionStop_Disable(hadc);
  440. 800041a: 4620 mov r0, r4
  441. 800041c: f7ff ffd0 bl 80003c0 <ADC_ConversionStop_Disable>
  442. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
  443. 8000420: 6aa3 ldr r3, [r4, #40] ; 0x28
  444. 8000422: f013 0f10 tst.w r3, #16
  445. ADC_STATE_CLR_SET(hadc->State,
  446. 8000426: 6aa3 ldr r3, [r4, #40] ; 0x28
  447. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
  448. 8000428: d164 bne.n 80004f4 <HAL_ADC_Init+0xf0>
  449. 800042a: 2800 cmp r0, #0
  450. 800042c: d162 bne.n 80004f4 <HAL_ADC_Init+0xf0>
  451. tmp_cr2 |= (hadc->Init.DataAlign |
  452. 800042e: 69e1 ldr r1, [r4, #28]
  453. ADC_STATE_CLR_SET(hadc->State,
  454. 8000430: f423 5388 bic.w r3, r3, #4352 ; 0x1100
  455. tmp_cr2 |= (hadc->Init.DataAlign |
  456. 8000434: 6862 ldr r2, [r4, #4]
  457. ADC_STATE_CLR_SET(hadc->State,
  458. 8000436: f023 0302 bic.w r3, r3, #2
  459. 800043a: f043 0302 orr.w r3, r3, #2
  460. tmp_cr2 |= (hadc->Init.DataAlign |
  461. 800043e: 430a orrs r2, r1
  462. tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
  463. 8000440: 68a1 ldr r1, [r4, #8]
  464. ADC_STATE_CLR_SET(hadc->State,
  465. 8000442: 62a3 str r3, [r4, #40] ; 0x28
  466. ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) );
  467. 8000444: 68e3 ldr r3, [r4, #12]
  468. tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
  469. 8000446: f5b1 7f80 cmp.w r1, #256 ; 0x100
  470. ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
  471. 800044a: ea42 0243 orr.w r2, r2, r3, lsl #1
  472. tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
  473. 800044e: d038 beq.n 80004c2 <HAL_ADC_Init+0xbe>
  474. 8000450: 2901 cmp r1, #1
  475. 8000452: bf14 ite ne
  476. 8000454: 4606 movne r6, r0
  477. 8000456: f44f 7680 moveq.w r6, #256 ; 0x100
  478. if (hadc->Init.DiscontinuousConvMode == ENABLE)
  479. 800045a: 6965 ldr r5, [r4, #20]
  480. 800045c: 2d01 cmp r5, #1
  481. 800045e: d107 bne.n 8000470 <HAL_ADC_Init+0x6c>
  482. if (hadc->Init.ContinuousConvMode == DISABLE)
  483. 8000460: 2b00 cmp r3, #0
  484. 8000462: d130 bne.n 80004c6 <HAL_ADC_Init+0xc2>
  485. SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
  486. 8000464: 69a3 ldr r3, [r4, #24]
  487. 8000466: 3b01 subs r3, #1
  488. 8000468: ea46 3543 orr.w r5, r6, r3, lsl #13
  489. 800046c: f445 6600 orr.w r6, r5, #2048 ; 0x800
  490. MODIFY_REG(hadc->Instance->CR1,
  491. 8000470: 6823 ldr r3, [r4, #0]
  492. if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
  493. 8000472: f5b1 7f80 cmp.w r1, #256 ; 0x100
  494. MODIFY_REG(hadc->Instance->CR1,
  495. 8000476: 685d ldr r5, [r3, #4]
  496. 8000478: f425 4569 bic.w r5, r5, #59648 ; 0xe900
  497. 800047c: ea45 0506 orr.w r5, r5, r6
  498. 8000480: 605d str r5, [r3, #4]
  499. MODIFY_REG(hadc->Instance->CR2,
  500. 8000482: 689e ldr r6, [r3, #8]
  501. 8000484: 4d1d ldr r5, [pc, #116] ; (80004fc <HAL_ADC_Init+0xf8>)
  502. 8000486: ea05 0506 and.w r5, r5, r6
  503. 800048a: ea45 0502 orr.w r5, r5, r2
  504. 800048e: 609d str r5, [r3, #8]
  505. if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
  506. 8000490: d001 beq.n 8000496 <HAL_ADC_Init+0x92>
  507. 8000492: 2901 cmp r1, #1
  508. 8000494: d120 bne.n 80004d8 <HAL_ADC_Init+0xd4>
  509. tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
  510. 8000496: 6921 ldr r1, [r4, #16]
  511. 8000498: 3901 subs r1, #1
  512. 800049a: 0509 lsls r1, r1, #20
  513. MODIFY_REG(hadc->Instance->SQR1,
  514. 800049c: 6add ldr r5, [r3, #44] ; 0x2c
  515. 800049e: f425 0570 bic.w r5, r5, #15728640 ; 0xf00000
  516. 80004a2: 4329 orrs r1, r5
  517. 80004a4: 62d9 str r1, [r3, #44] ; 0x2c
  518. if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
  519. 80004a6: 6899 ldr r1, [r3, #8]
  520. 80004a8: 4b15 ldr r3, [pc, #84] ; (8000500 <HAL_ADC_Init+0xfc>)
  521. 80004aa: 400b ands r3, r1
  522. 80004ac: 429a cmp r2, r3
  523. 80004ae: d115 bne.n 80004dc <HAL_ADC_Init+0xd8>
  524. ADC_CLEAR_ERRORCODE(hadc);
  525. 80004b0: 2300 movs r3, #0
  526. 80004b2: 62e3 str r3, [r4, #44] ; 0x2c
  527. ADC_STATE_CLR_SET(hadc->State,
  528. 80004b4: 6aa3 ldr r3, [r4, #40] ; 0x28
  529. 80004b6: f023 0303 bic.w r3, r3, #3
  530. 80004ba: f043 0301 orr.w r3, r3, #1
  531. 80004be: 62a3 str r3, [r4, #40] ; 0x28
  532. 80004c0: bd70 pop {r4, r5, r6, pc}
  533. tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
  534. 80004c2: 460e mov r6, r1
  535. 80004c4: e7c9 b.n 800045a <HAL_ADC_Init+0x56>
  536. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  537. 80004c6: 6aa3 ldr r3, [r4, #40] ; 0x28
  538. 80004c8: f043 0320 orr.w r3, r3, #32
  539. 80004cc: 62a3 str r3, [r4, #40] ; 0x28
  540. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  541. 80004ce: 6ae3 ldr r3, [r4, #44] ; 0x2c
  542. 80004d0: f043 0301 orr.w r3, r3, #1
  543. 80004d4: 62e3 str r3, [r4, #44] ; 0x2c
  544. 80004d6: e7cb b.n 8000470 <HAL_ADC_Init+0x6c>
  545. uint32_t tmp_sqr1 = 0U;
  546. 80004d8: 2100 movs r1, #0
  547. 80004da: e7df b.n 800049c <HAL_ADC_Init+0x98>
  548. ADC_STATE_CLR_SET(hadc->State,
  549. 80004dc: 6aa3 ldr r3, [r4, #40] ; 0x28
  550. 80004de: f023 0312 bic.w r3, r3, #18
  551. 80004e2: f043 0310 orr.w r3, r3, #16
  552. 80004e6: 62a3 str r3, [r4, #40] ; 0x28
  553. SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
  554. 80004e8: 6ae3 ldr r3, [r4, #44] ; 0x2c
  555. 80004ea: f043 0301 orr.w r3, r3, #1
  556. 80004ee: 62e3 str r3, [r4, #44] ; 0x2c
  557. return HAL_ERROR;
  558. 80004f0: 2001 movs r0, #1
  559. }
  560. 80004f2: bd70 pop {r4, r5, r6, pc}
  561. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
  562. 80004f4: f043 0310 orr.w r3, r3, #16
  563. 80004f8: 62a3 str r3, [r4, #40] ; 0x28
  564. 80004fa: e7f9 b.n 80004f0 <HAL_ADC_Init+0xec>
  565. 80004fc: ffe1f7fd .word 0xffe1f7fd
  566. 8000500: ff1f0efe .word 0xff1f0efe
  567. 08000504 <HAL_NVIC_SetPriorityGrouping>:
  568. __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
  569. {
  570. uint32_t reg_value;
  571. uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
  572. reg_value = SCB->AIRCR; /* read old register configuration */
  573. 8000504: 4a07 ldr r2, [pc, #28] ; (8000524 <HAL_NVIC_SetPriorityGrouping+0x20>)
  574. reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
  575. reg_value = (reg_value |
  576. ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
  577. (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
  578. 8000506: 0200 lsls r0, r0, #8
  579. reg_value = SCB->AIRCR; /* read old register configuration */
  580. 8000508: 68d3 ldr r3, [r2, #12]
  581. (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
  582. 800050a: f400 60e0 and.w r0, r0, #1792 ; 0x700
  583. reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
  584. 800050e: f423 63e0 bic.w r3, r3, #1792 ; 0x700
  585. 8000512: 041b lsls r3, r3, #16
  586. 8000514: 0c1b lsrs r3, r3, #16
  587. 8000516: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
  588. 800051a: f443 3300 orr.w r3, r3, #131072 ; 0x20000
  589. reg_value = (reg_value |
  590. 800051e: 4303 orrs r3, r0
  591. SCB->AIRCR = reg_value;
  592. 8000520: 60d3 str r3, [r2, #12]
  593. 8000522: 4770 bx lr
  594. 8000524: e000ed00 .word 0xe000ed00
  595. 08000528 <HAL_NVIC_SetPriority>:
  596. \details Reads the priority grouping field from the NVIC Interrupt Controller.
  597. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  598. */
  599. __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
  600. {
  601. return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
  602. 8000528: 4b17 ldr r3, [pc, #92] ; (8000588 <HAL_NVIC_SetPriority+0x60>)
  603. * This parameter can be a value between 0 and 15
  604. * A lower priority value indicates a higher priority.
  605. * @retval None
  606. */
  607. void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
  608. {
  609. 800052a: b530 push {r4, r5, lr}
  610. 800052c: 68dc ldr r4, [r3, #12]
  611. 800052e: f3c4 2402 ubfx r4, r4, #8, #3
  612. {
  613. uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
  614. uint32_t PreemptPriorityBits;
  615. uint32_t SubPriorityBits;
  616. PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
  617. 8000532: f1c4 0307 rsb r3, r4, #7
  618. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  619. 8000536: 1d25 adds r5, r4, #4
  620. PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
  621. 8000538: 2b04 cmp r3, #4
  622. 800053a: bf28 it cs
  623. 800053c: 2304 movcs r3, #4
  624. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  625. 800053e: 2d06 cmp r5, #6
  626. return (
  627. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  628. 8000540: f04f 0501 mov.w r5, #1
  629. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  630. 8000544: bf98 it ls
  631. 8000546: 2400 movls r4, #0
  632. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  633. 8000548: fa05 f303 lsl.w r3, r5, r3
  634. 800054c: f103 33ff add.w r3, r3, #4294967295
  635. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  636. 8000550: bf88 it hi
  637. 8000552: 3c03 subhi r4, #3
  638. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  639. 8000554: 4019 ands r1, r3
  640. 8000556: 40a1 lsls r1, r4
  641. ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
  642. 8000558: fa05 f404 lsl.w r4, r5, r4
  643. 800055c: 3c01 subs r4, #1
  644. 800055e: 4022 ands r2, r4
  645. if ((int32_t)(IRQn) < 0)
  646. 8000560: 2800 cmp r0, #0
  647. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  648. 8000562: ea42 0201 orr.w r2, r2, r1
  649. 8000566: ea4f 1202 mov.w r2, r2, lsl #4
  650. NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  651. 800056a: bfaf iteee ge
  652. 800056c: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000
  653. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  654. 8000570: 4b06 ldrlt r3, [pc, #24] ; (800058c <HAL_NVIC_SetPriority+0x64>)
  655. 8000572: f000 000f andlt.w r0, r0, #15
  656. 8000576: b2d2 uxtblt r2, r2
  657. NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  658. 8000578: bfa5 ittet ge
  659. 800057a: b2d2 uxtbge r2, r2
  660. 800057c: f500 4061 addge.w r0, r0, #57600 ; 0xe100
  661. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  662. 8000580: 541a strblt r2, [r3, r0]
  663. NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  664. 8000582: f880 2300 strbge.w r2, [r0, #768] ; 0x300
  665. 8000586: bd30 pop {r4, r5, pc}
  666. 8000588: e000ed00 .word 0xe000ed00
  667. 800058c: e000ed14 .word 0xe000ed14
  668. 08000590 <HAL_NVIC_EnableIRQ>:
  669. NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
  670. 8000590: 2301 movs r3, #1
  671. 8000592: 0942 lsrs r2, r0, #5
  672. 8000594: f000 001f and.w r0, r0, #31
  673. 8000598: fa03 f000 lsl.w r0, r3, r0
  674. 800059c: 4b01 ldr r3, [pc, #4] ; (80005a4 <HAL_NVIC_EnableIRQ+0x14>)
  675. 800059e: f843 0022 str.w r0, [r3, r2, lsl #2]
  676. 80005a2: 4770 bx lr
  677. 80005a4: e000e100 .word 0xe000e100
  678. 080005a8 <HAL_SYSTICK_Config>:
  679. function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
  680. must contain a vendor-specific implementation of this function.
  681. */
  682. __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
  683. {
  684. if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
  685. 80005a8: 3801 subs r0, #1
  686. 80005aa: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000
  687. 80005ae: d20a bcs.n 80005c6 <HAL_SYSTICK_Config+0x1e>
  688. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  689. 80005b0: 21f0 movs r1, #240 ; 0xf0
  690. {
  691. return (1UL); /* Reload value impossible */
  692. }
  693. SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
  694. 80005b2: 4b06 ldr r3, [pc, #24] ; (80005cc <HAL_SYSTICK_Config+0x24>)
  695. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  696. 80005b4: 4a06 ldr r2, [pc, #24] ; (80005d0 <HAL_SYSTICK_Config+0x28>)
  697. SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
  698. 80005b6: 6058 str r0, [r3, #4]
  699. SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  700. 80005b8: f882 1023 strb.w r1, [r2, #35] ; 0x23
  701. NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  702. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  703. 80005bc: 2000 movs r0, #0
  704. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  705. 80005be: 2207 movs r2, #7
  706. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  707. 80005c0: 6098 str r0, [r3, #8]
  708. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  709. 80005c2: 601a str r2, [r3, #0]
  710. 80005c4: 4770 bx lr
  711. return (1UL); /* Reload value impossible */
  712. 80005c6: 2001 movs r0, #1
  713. * - 1 Function failed.
  714. */
  715. uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
  716. {
  717. return SysTick_Config(TicksNumb);
  718. }
  719. 80005c8: 4770 bx lr
  720. 80005ca: bf00 nop
  721. 80005cc: e000e010 .word 0xe000e010
  722. 80005d0: e000ed00 .word 0xe000ed00
  723. 080005d4 <HAL_DMA_Abort_IT>:
  724. */
  725. HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
  726. {
  727. HAL_StatusTypeDef status = HAL_OK;
  728. if(HAL_DMA_STATE_BUSY != hdma->State)
  729. 80005d4: f890 3021 ldrb.w r3, [r0, #33] ; 0x21
  730. {
  731. 80005d8: b510 push {r4, lr}
  732. if(HAL_DMA_STATE_BUSY != hdma->State)
  733. 80005da: 2b02 cmp r3, #2
  734. 80005dc: d003 beq.n 80005e6 <HAL_DMA_Abort_IT+0x12>
  735. {
  736. /* no transfer ongoing */
  737. hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
  738. 80005de: 2304 movs r3, #4
  739. 80005e0: 6383 str r3, [r0, #56] ; 0x38
  740. status = HAL_ERROR;
  741. 80005e2: 2001 movs r0, #1
  742. 80005e4: bd10 pop {r4, pc}
  743. }
  744. else
  745. {
  746. /* Disable DMA IT */
  747. __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
  748. 80005e6: 6803 ldr r3, [r0, #0]
  749. 80005e8: 681a ldr r2, [r3, #0]
  750. 80005ea: f022 020e bic.w r2, r2, #14
  751. 80005ee: 601a str r2, [r3, #0]
  752. /* Disable the channel */
  753. __HAL_DMA_DISABLE(hdma);
  754. 80005f0: 681a ldr r2, [r3, #0]
  755. 80005f2: f022 0201 bic.w r2, r2, #1
  756. 80005f6: 601a str r2, [r3, #0]
  757. /* Clear all flags */
  758. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  759. 80005f8: 4a18 ldr r2, [pc, #96] ; (800065c <HAL_DMA_Abort_IT+0x88>)
  760. 80005fa: 4293 cmp r3, r2
  761. 80005fc: d01f beq.n 800063e <HAL_DMA_Abort_IT+0x6a>
  762. 80005fe: 3214 adds r2, #20
  763. 8000600: 4293 cmp r3, r2
  764. 8000602: d01e beq.n 8000642 <HAL_DMA_Abort_IT+0x6e>
  765. 8000604: 3214 adds r2, #20
  766. 8000606: 4293 cmp r3, r2
  767. 8000608: d01d beq.n 8000646 <HAL_DMA_Abort_IT+0x72>
  768. 800060a: 3214 adds r2, #20
  769. 800060c: 4293 cmp r3, r2
  770. 800060e: d01d beq.n 800064c <HAL_DMA_Abort_IT+0x78>
  771. 8000610: 3214 adds r2, #20
  772. 8000612: 4293 cmp r3, r2
  773. 8000614: d01d beq.n 8000652 <HAL_DMA_Abort_IT+0x7e>
  774. 8000616: 3214 adds r2, #20
  775. 8000618: 4293 cmp r3, r2
  776. 800061a: bf0c ite eq
  777. 800061c: f44f 1380 moveq.w r3, #1048576 ; 0x100000
  778. 8000620: f04f 7380 movne.w r3, #16777216 ; 0x1000000
  779. 8000624: 4a0e ldr r2, [pc, #56] ; (8000660 <HAL_DMA_Abort_IT+0x8c>)
  780. /* Change the DMA state */
  781. hdma->State = HAL_DMA_STATE_READY;
  782. /* Process Unlocked */
  783. __HAL_UNLOCK(hdma);
  784. 8000626: 2400 movs r4, #0
  785. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  786. 8000628: 6053 str r3, [r2, #4]
  787. hdma->State = HAL_DMA_STATE_READY;
  788. 800062a: 2301 movs r3, #1
  789. 800062c: f880 3021 strb.w r3, [r0, #33] ; 0x21
  790. /* Call User Abort callback */
  791. if(hdma->XferAbortCallback != NULL)
  792. 8000630: 6b43 ldr r3, [r0, #52] ; 0x34
  793. __HAL_UNLOCK(hdma);
  794. 8000632: f880 4020 strb.w r4, [r0, #32]
  795. if(hdma->XferAbortCallback != NULL)
  796. 8000636: b17b cbz r3, 8000658 <HAL_DMA_Abort_IT+0x84>
  797. {
  798. hdma->XferAbortCallback(hdma);
  799. 8000638: 4798 blx r3
  800. HAL_StatusTypeDef status = HAL_OK;
  801. 800063a: 4620 mov r0, r4
  802. 800063c: bd10 pop {r4, pc}
  803. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
  804. 800063e: 2301 movs r3, #1
  805. 8000640: e7f0 b.n 8000624 <HAL_DMA_Abort_IT+0x50>
  806. 8000642: 2310 movs r3, #16
  807. 8000644: e7ee b.n 8000624 <HAL_DMA_Abort_IT+0x50>
  808. 8000646: f44f 7380 mov.w r3, #256 ; 0x100
  809. 800064a: e7eb b.n 8000624 <HAL_DMA_Abort_IT+0x50>
  810. 800064c: f44f 5380 mov.w r3, #4096 ; 0x1000
  811. 8000650: e7e8 b.n 8000624 <HAL_DMA_Abort_IT+0x50>
  812. 8000652: f44f 3380 mov.w r3, #65536 ; 0x10000
  813. 8000656: e7e5 b.n 8000624 <HAL_DMA_Abort_IT+0x50>
  814. HAL_StatusTypeDef status = HAL_OK;
  815. 8000658: 4618 mov r0, r3
  816. }
  817. }
  818. return status;
  819. }
  820. 800065a: bd10 pop {r4, pc}
  821. 800065c: 40020008 .word 0x40020008
  822. 8000660: 40020000 .word 0x40020000
  823. 08000664 <HAL_GPIO_Init>:
  824. * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  825. * the configuration information for the specified GPIO peripheral.
  826. * @retval None
  827. */
  828. void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  829. {
  830. 8000664: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  831. uint32_t position;
  832. uint32_t ioposition = 0x00U;
  833. uint32_t iocurrent = 0x00U;
  834. uint32_t temp = 0x00U;
  835. uint32_t config = 0x00U;
  836. 8000668: 2200 movs r2, #0
  837. assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  838. assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  839. assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
  840. /* Configure the port pins */
  841. for (position = 0U; position < GPIO_NUMBER; position++)
  842. 800066a: 4616 mov r6, r2
  843. 800066c: 4b65 ldr r3, [pc, #404] ; (8000804 <HAL_GPIO_Init+0x1a0>)
  844. {
  845. /* Check the Alternate function parameters */
  846. assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
  847. /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
  848. switch (GPIO_Init->Mode)
  849. 800066e: f8df e1a4 ldr.w lr, [pc, #420] ; 8000814 <HAL_GPIO_Init+0x1b0>
  850. 8000672: f8df c1a4 ldr.w ip, [pc, #420] ; 8000818 <HAL_GPIO_Init+0x1b4>
  851. ioposition = (0x01U << position);
  852. 8000676: f04f 0801 mov.w r8, #1
  853. iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
  854. 800067a: 680c ldr r4, [r1, #0]
  855. ioposition = (0x01U << position);
  856. 800067c: fa08 f806 lsl.w r8, r8, r6
  857. iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
  858. 8000680: ea08 0404 and.w r4, r8, r4
  859. if (iocurrent == ioposition)
  860. 8000684: 45a0 cmp r8, r4
  861. 8000686: d17f bne.n 8000788 <HAL_GPIO_Init+0x124>
  862. switch (GPIO_Init->Mode)
  863. 8000688: 684d ldr r5, [r1, #4]
  864. 800068a: 2d12 cmp r5, #18
  865. 800068c: f000 80af beq.w 80007ee <HAL_GPIO_Init+0x18a>
  866. 8000690: f200 8088 bhi.w 80007a4 <HAL_GPIO_Init+0x140>
  867. 8000694: 2d02 cmp r5, #2
  868. 8000696: f000 80a7 beq.w 80007e8 <HAL_GPIO_Init+0x184>
  869. 800069a: d87c bhi.n 8000796 <HAL_GPIO_Init+0x132>
  870. 800069c: 2d00 cmp r5, #0
  871. 800069e: f000 808e beq.w 80007be <HAL_GPIO_Init+0x15a>
  872. 80006a2: 2d01 cmp r5, #1
  873. 80006a4: f000 809e beq.w 80007e4 <HAL_GPIO_Init+0x180>
  874. in order to address CRH or CRL register*/
  875. configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
  876. registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2U) : ((position - 8U) << 2U);
  877. /* Apply the new configuration of the pin to the register */
  878. MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
  879. 80006a8: f04f 090f mov.w r9, #15
  880. configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
  881. 80006ac: 2cff cmp r4, #255 ; 0xff
  882. 80006ae: bf93 iteet ls
  883. 80006b0: 4682 movls sl, r0
  884. 80006b2: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000
  885. 80006b6: 3d08 subhi r5, #8
  886. 80006b8: f8d0 b000 ldrls.w fp, [r0]
  887. 80006bc: bf92 itee ls
  888. 80006be: 00b5 lslls r5, r6, #2
  889. 80006c0: f8d0 b004 ldrhi.w fp, [r0, #4]
  890. 80006c4: 00ad lslhi r5, r5, #2
  891. MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
  892. 80006c6: fa09 f805 lsl.w r8, r9, r5
  893. 80006ca: ea2b 0808 bic.w r8, fp, r8
  894. 80006ce: fa02 f505 lsl.w r5, r2, r5
  895. configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
  896. 80006d2: bf88 it hi
  897. 80006d4: f100 0a04 addhi.w sl, r0, #4
  898. MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
  899. 80006d8: ea48 0505 orr.w r5, r8, r5
  900. 80006dc: f8ca 5000 str.w r5, [sl]
  901. /*--------------------- EXTI Mode Configuration ------------------------*/
  902. /* Configure the External Interrupt or event for the current IO */
  903. if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
  904. 80006e0: f8d1 a004 ldr.w sl, [r1, #4]
  905. 80006e4: f01a 5f80 tst.w sl, #268435456 ; 0x10000000
  906. 80006e8: d04e beq.n 8000788 <HAL_GPIO_Init+0x124>
  907. {
  908. /* Enable AFIO Clock */
  909. __HAL_RCC_AFIO_CLK_ENABLE();
  910. 80006ea: 4d47 ldr r5, [pc, #284] ; (8000808 <HAL_GPIO_Init+0x1a4>)
  911. 80006ec: 4f46 ldr r7, [pc, #280] ; (8000808 <HAL_GPIO_Init+0x1a4>)
  912. 80006ee: 69ad ldr r5, [r5, #24]
  913. 80006f0: f026 0803 bic.w r8, r6, #3
  914. 80006f4: f045 0501 orr.w r5, r5, #1
  915. 80006f8: 61bd str r5, [r7, #24]
  916. 80006fa: 69bd ldr r5, [r7, #24]
  917. 80006fc: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000
  918. 8000700: f005 0501 and.w r5, r5, #1
  919. 8000704: 9501 str r5, [sp, #4]
  920. 8000706: f508 3880 add.w r8, r8, #65536 ; 0x10000
  921. temp = AFIO->EXTICR[position >> 2U];
  922. CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
  923. 800070a: f006 0b03 and.w fp, r6, #3
  924. __HAL_RCC_AFIO_CLK_ENABLE();
  925. 800070e: 9d01 ldr r5, [sp, #4]
  926. CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
  927. 8000710: ea4f 0b8b mov.w fp, fp, lsl #2
  928. temp = AFIO->EXTICR[position >> 2U];
  929. 8000714: f8d8 5008 ldr.w r5, [r8, #8]
  930. CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
  931. 8000718: fa09 f90b lsl.w r9, r9, fp
  932. 800071c: ea25 0909 bic.w r9, r5, r9
  933. SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
  934. 8000720: 4d3a ldr r5, [pc, #232] ; (800080c <HAL_GPIO_Init+0x1a8>)
  935. 8000722: 42a8 cmp r0, r5
  936. 8000724: d068 beq.n 80007f8 <HAL_GPIO_Init+0x194>
  937. 8000726: f505 6580 add.w r5, r5, #1024 ; 0x400
  938. 800072a: 42a8 cmp r0, r5
  939. 800072c: d066 beq.n 80007fc <HAL_GPIO_Init+0x198>
  940. 800072e: f505 6580 add.w r5, r5, #1024 ; 0x400
  941. 8000732: 42a8 cmp r0, r5
  942. 8000734: d064 beq.n 8000800 <HAL_GPIO_Init+0x19c>
  943. 8000736: f505 6580 add.w r5, r5, #1024 ; 0x400
  944. 800073a: 42a8 cmp r0, r5
  945. 800073c: bf0c ite eq
  946. 800073e: 2503 moveq r5, #3
  947. 8000740: 2504 movne r5, #4
  948. 8000742: fa05 f50b lsl.w r5, r5, fp
  949. 8000746: ea45 0509 orr.w r5, r5, r9
  950. AFIO->EXTICR[position >> 2U] = temp;
  951. 800074a: f8c8 5008 str.w r5, [r8, #8]
  952. /* Configure the interrupt mask */
  953. if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
  954. {
  955. SET_BIT(EXTI->IMR, iocurrent);
  956. 800074e: 681d ldr r5, [r3, #0]
  957. if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
  958. 8000750: f41a 3f80 tst.w sl, #65536 ; 0x10000
  959. SET_BIT(EXTI->IMR, iocurrent);
  960. 8000754: bf14 ite ne
  961. 8000756: 4325 orrne r5, r4
  962. }
  963. else
  964. {
  965. CLEAR_BIT(EXTI->IMR, iocurrent);
  966. 8000758: 43a5 biceq r5, r4
  967. 800075a: 601d str r5, [r3, #0]
  968. }
  969. /* Configure the event mask */
  970. if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
  971. {
  972. SET_BIT(EXTI->EMR, iocurrent);
  973. 800075c: 685d ldr r5, [r3, #4]
  974. if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
  975. 800075e: f41a 3f00 tst.w sl, #131072 ; 0x20000
  976. SET_BIT(EXTI->EMR, iocurrent);
  977. 8000762: bf14 ite ne
  978. 8000764: 4325 orrne r5, r4
  979. }
  980. else
  981. {
  982. CLEAR_BIT(EXTI->EMR, iocurrent);
  983. 8000766: 43a5 biceq r5, r4
  984. 8000768: 605d str r5, [r3, #4]
  985. }
  986. /* Enable or disable the rising trigger */
  987. if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
  988. {
  989. SET_BIT(EXTI->RTSR, iocurrent);
  990. 800076a: 689d ldr r5, [r3, #8]
  991. if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
  992. 800076c: f41a 1f80 tst.w sl, #1048576 ; 0x100000
  993. SET_BIT(EXTI->RTSR, iocurrent);
  994. 8000770: bf14 ite ne
  995. 8000772: 4325 orrne r5, r4
  996. }
  997. else
  998. {
  999. CLEAR_BIT(EXTI->RTSR, iocurrent);
  1000. 8000774: 43a5 biceq r5, r4
  1001. 8000776: 609d str r5, [r3, #8]
  1002. }
  1003. /* Enable or disable the falling trigger */
  1004. if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
  1005. {
  1006. SET_BIT(EXTI->FTSR, iocurrent);
  1007. 8000778: 68dd ldr r5, [r3, #12]
  1008. if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
  1009. 800077a: f41a 1f00 tst.w sl, #2097152 ; 0x200000
  1010. SET_BIT(EXTI->FTSR, iocurrent);
  1011. 800077e: bf14 ite ne
  1012. 8000780: 432c orrne r4, r5
  1013. }
  1014. else
  1015. {
  1016. CLEAR_BIT(EXTI->FTSR, iocurrent);
  1017. 8000782: ea25 0404 biceq.w r4, r5, r4
  1018. 8000786: 60dc str r4, [r3, #12]
  1019. for (position = 0U; position < GPIO_NUMBER; position++)
  1020. 8000788: 3601 adds r6, #1
  1021. 800078a: 2e10 cmp r6, #16
  1022. 800078c: f47f af73 bne.w 8000676 <HAL_GPIO_Init+0x12>
  1023. }
  1024. }
  1025. }
  1026. }
  1027. }
  1028. 8000790: b003 add sp, #12
  1029. 8000792: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  1030. switch (GPIO_Init->Mode)
  1031. 8000796: 2d03 cmp r5, #3
  1032. 8000798: d022 beq.n 80007e0 <HAL_GPIO_Init+0x17c>
  1033. 800079a: 2d11 cmp r5, #17
  1034. 800079c: d184 bne.n 80006a8 <HAL_GPIO_Init+0x44>
  1035. config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
  1036. 800079e: 68ca ldr r2, [r1, #12]
  1037. 80007a0: 3204 adds r2, #4
  1038. break;
  1039. 80007a2: e781 b.n 80006a8 <HAL_GPIO_Init+0x44>
  1040. switch (GPIO_Init->Mode)
  1041. 80007a4: 4f1a ldr r7, [pc, #104] ; (8000810 <HAL_GPIO_Init+0x1ac>)
  1042. 80007a6: 42bd cmp r5, r7
  1043. 80007a8: d009 beq.n 80007be <HAL_GPIO_Init+0x15a>
  1044. 80007aa: d812 bhi.n 80007d2 <HAL_GPIO_Init+0x16e>
  1045. 80007ac: f8df 906c ldr.w r9, [pc, #108] ; 800081c <HAL_GPIO_Init+0x1b8>
  1046. 80007b0: 454d cmp r5, r9
  1047. 80007b2: d004 beq.n 80007be <HAL_GPIO_Init+0x15a>
  1048. 80007b4: f509 3980 add.w r9, r9, #65536 ; 0x10000
  1049. 80007b8: 454d cmp r5, r9
  1050. 80007ba: f47f af75 bne.w 80006a8 <HAL_GPIO_Init+0x44>
  1051. if (GPIO_Init->Pull == GPIO_NOPULL)
  1052. 80007be: 688a ldr r2, [r1, #8]
  1053. 80007c0: b1c2 cbz r2, 80007f4 <HAL_GPIO_Init+0x190>
  1054. else if (GPIO_Init->Pull == GPIO_PULLUP)
  1055. 80007c2: 2a01 cmp r2, #1
  1056. GPIOx->BSRR = ioposition;
  1057. 80007c4: bf0c ite eq
  1058. 80007c6: f8c0 8010 streq.w r8, [r0, #16]
  1059. GPIOx->BRR = ioposition;
  1060. 80007ca: f8c0 8014 strne.w r8, [r0, #20]
  1061. config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
  1062. 80007ce: 2208 movs r2, #8
  1063. 80007d0: e76a b.n 80006a8 <HAL_GPIO_Init+0x44>
  1064. switch (GPIO_Init->Mode)
  1065. 80007d2: 4575 cmp r5, lr
  1066. 80007d4: d0f3 beq.n 80007be <HAL_GPIO_Init+0x15a>
  1067. 80007d6: 4565 cmp r5, ip
  1068. 80007d8: d0f1 beq.n 80007be <HAL_GPIO_Init+0x15a>
  1069. 80007da: f8df 9044 ldr.w r9, [pc, #68] ; 8000820 <HAL_GPIO_Init+0x1bc>
  1070. 80007de: e7eb b.n 80007b8 <HAL_GPIO_Init+0x154>
  1071. config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
  1072. 80007e0: 2200 movs r2, #0
  1073. 80007e2: e761 b.n 80006a8 <HAL_GPIO_Init+0x44>
  1074. config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
  1075. 80007e4: 68ca ldr r2, [r1, #12]
  1076. break;
  1077. 80007e6: e75f b.n 80006a8 <HAL_GPIO_Init+0x44>
  1078. config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
  1079. 80007e8: 68ca ldr r2, [r1, #12]
  1080. 80007ea: 3208 adds r2, #8
  1081. break;
  1082. 80007ec: e75c b.n 80006a8 <HAL_GPIO_Init+0x44>
  1083. config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
  1084. 80007ee: 68ca ldr r2, [r1, #12]
  1085. 80007f0: 320c adds r2, #12
  1086. break;
  1087. 80007f2: e759 b.n 80006a8 <HAL_GPIO_Init+0x44>
  1088. config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
  1089. 80007f4: 2204 movs r2, #4
  1090. 80007f6: e757 b.n 80006a8 <HAL_GPIO_Init+0x44>
  1091. SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
  1092. 80007f8: 2500 movs r5, #0
  1093. 80007fa: e7a2 b.n 8000742 <HAL_GPIO_Init+0xde>
  1094. 80007fc: 2501 movs r5, #1
  1095. 80007fe: e7a0 b.n 8000742 <HAL_GPIO_Init+0xde>
  1096. 8000800: 2502 movs r5, #2
  1097. 8000802: e79e b.n 8000742 <HAL_GPIO_Init+0xde>
  1098. 8000804: 40010400 .word 0x40010400
  1099. 8000808: 40021000 .word 0x40021000
  1100. 800080c: 40010800 .word 0x40010800
  1101. 8000810: 10210000 .word 0x10210000
  1102. 8000814: 10310000 .word 0x10310000
  1103. 8000818: 10320000 .word 0x10320000
  1104. 800081c: 10110000 .word 0x10110000
  1105. 8000820: 10220000 .word 0x10220000
  1106. 08000824 <HAL_GPIO_WritePin>:
  1107. {
  1108. /* Check the parameters */
  1109. assert_param(IS_GPIO_PIN(GPIO_Pin));
  1110. assert_param(IS_GPIO_PIN_ACTION(PinState));
  1111. if (PinState != GPIO_PIN_RESET)
  1112. 8000824: b10a cbz r2, 800082a <HAL_GPIO_WritePin+0x6>
  1113. {
  1114. GPIOx->BSRR = GPIO_Pin;
  1115. }
  1116. else
  1117. {
  1118. GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
  1119. 8000826: 6101 str r1, [r0, #16]
  1120. 8000828: 4770 bx lr
  1121. 800082a: 0409 lsls r1, r1, #16
  1122. 800082c: e7fb b.n 8000826 <HAL_GPIO_WritePin+0x2>
  1123. 0800082e <HAL_GPIO_TogglePin>:
  1124. void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  1125. {
  1126. /* Check the parameters */
  1127. assert_param(IS_GPIO_PIN(GPIO_Pin));
  1128. GPIOx->ODR ^= GPIO_Pin;
  1129. 800082e: 68c3 ldr r3, [r0, #12]
  1130. 8000830: 4059 eors r1, r3
  1131. 8000832: 60c1 str r1, [r0, #12]
  1132. 8000834: 4770 bx lr
  1133. 08000836 <I2C_IsAcknowledgeFailed>:
  1134. * the configuration information for the specified I2C.
  1135. * @retval HAL status
  1136. */
  1137. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  1138. {
  1139. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  1140. 8000836: 6802 ldr r2, [r0, #0]
  1141. 8000838: 6953 ldr r3, [r2, #20]
  1142. 800083a: f413 6380 ands.w r3, r3, #1024 ; 0x400
  1143. 800083e: d00d beq.n 800085c <I2C_IsAcknowledgeFailed+0x26>
  1144. {
  1145. /* Clear NACKF Flag */
  1146. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  1147. 8000840: f46f 6380 mvn.w r3, #1024 ; 0x400
  1148. 8000844: 6153 str r3, [r2, #20]
  1149. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  1150. 8000846: 2304 movs r3, #4
  1151. hi2c->PreviousState = I2C_STATE_NONE;
  1152. hi2c->State= HAL_I2C_STATE_READY;
  1153. 8000848: 2220 movs r2, #32
  1154. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  1155. 800084a: 6403 str r3, [r0, #64] ; 0x40
  1156. hi2c->PreviousState = I2C_STATE_NONE;
  1157. 800084c: 2300 movs r3, #0
  1158. 800084e: 6303 str r3, [r0, #48] ; 0x30
  1159. /* Process Unlocked */
  1160. __HAL_UNLOCK(hi2c);
  1161. 8000850: f880 303c strb.w r3, [r0, #60] ; 0x3c
  1162. hi2c->State= HAL_I2C_STATE_READY;
  1163. 8000854: f880 203d strb.w r2, [r0, #61] ; 0x3d
  1164. return HAL_ERROR;
  1165. 8000858: 2001 movs r0, #1
  1166. 800085a: 4770 bx lr
  1167. }
  1168. return HAL_OK;
  1169. 800085c: 4618 mov r0, r3
  1170. }
  1171. 800085e: 4770 bx lr
  1172. 08000860 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
  1173. {
  1174. 8000860: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  1175. 8000864: 4604 mov r4, r0
  1176. 8000866: 4617 mov r7, r2
  1177. 8000868: 4699 mov r9, r3
  1178. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  1179. 800086a: f3c1 4807 ubfx r8, r1, #16, #8
  1180. 800086e: b28e uxth r6, r1
  1181. 8000870: 6825 ldr r5, [r4, #0]
  1182. 8000872: f1b8 0f01 cmp.w r8, #1
  1183. 8000876: bf0c ite eq
  1184. 8000878: 696b ldreq r3, [r5, #20]
  1185. 800087a: 69ab ldrne r3, [r5, #24]
  1186. 800087c: ea36 0303 bics.w r3, r6, r3
  1187. 8000880: bf14 ite ne
  1188. 8000882: 2001 movne r0, #1
  1189. 8000884: 2000 moveq r0, #0
  1190. 8000886: b908 cbnz r0, 800088c <I2C_WaitOnMasterAddressFlagUntilTimeout+0x2c>
  1191. }
  1192. 8000888: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  1193. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  1194. 800088c: 696b ldr r3, [r5, #20]
  1195. 800088e: 055a lsls r2, r3, #21
  1196. 8000890: d512 bpl.n 80008b8 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x58>
  1197. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1198. 8000892: 682b ldr r3, [r5, #0]
  1199. hi2c->State= HAL_I2C_STATE_READY;
  1200. 8000894: 2220 movs r2, #32
  1201. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1202. 8000896: f443 7300 orr.w r3, r3, #512 ; 0x200
  1203. 800089a: 602b str r3, [r5, #0]
  1204. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  1205. 800089c: f46f 6380 mvn.w r3, #1024 ; 0x400
  1206. 80008a0: 616b str r3, [r5, #20]
  1207. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  1208. 80008a2: 2304 movs r3, #4
  1209. 80008a4: 6423 str r3, [r4, #64] ; 0x40
  1210. hi2c->PreviousState = I2C_STATE_NONE;
  1211. 80008a6: 2300 movs r3, #0
  1212. return HAL_ERROR;
  1213. 80008a8: 2001 movs r0, #1
  1214. hi2c->PreviousState = I2C_STATE_NONE;
  1215. 80008aa: 6323 str r3, [r4, #48] ; 0x30
  1216. __HAL_UNLOCK(hi2c);
  1217. 80008ac: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1218. hi2c->State= HAL_I2C_STATE_READY;
  1219. 80008b0: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1220. return HAL_ERROR;
  1221. 80008b4: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  1222. if(Timeout != HAL_MAX_DELAY)
  1223. 80008b8: 1c7b adds r3, r7, #1
  1224. 80008ba: d0d9 beq.n 8000870 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
  1225. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  1226. 80008bc: b94f cbnz r7, 80008d2 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x72>
  1227. hi2c->PreviousState = I2C_STATE_NONE;
  1228. 80008be: 2300 movs r3, #0
  1229. hi2c->State= HAL_I2C_STATE_READY;
  1230. 80008c0: 2220 movs r2, #32
  1231. hi2c->PreviousState = I2C_STATE_NONE;
  1232. 80008c2: 6323 str r3, [r4, #48] ; 0x30
  1233. __HAL_UNLOCK(hi2c);
  1234. 80008c4: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1235. hi2c->State= HAL_I2C_STATE_READY;
  1236. 80008c8: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1237. return HAL_TIMEOUT;
  1238. 80008cc: 2003 movs r0, #3
  1239. 80008ce: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  1240. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  1241. 80008d2: f7ff fcd9 bl 8000288 <HAL_GetTick>
  1242. 80008d6: eba0 0009 sub.w r0, r0, r9
  1243. 80008da: 4287 cmp r7, r0
  1244. 80008dc: d2c8 bcs.n 8000870 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
  1245. 80008de: e7ee b.n 80008be <I2C_WaitOnMasterAddressFlagUntilTimeout+0x5e>
  1246. 080008e0 <I2C_WaitOnFlagUntilTimeout>:
  1247. {
  1248. 80008e0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  1249. 80008e4: 4604 mov r4, r0
  1250. 80008e6: 4690 mov r8, r2
  1251. 80008e8: 461f mov r7, r3
  1252. 80008ea: 9e08 ldr r6, [sp, #32]
  1253. while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
  1254. 80008ec: f3c1 4907 ubfx r9, r1, #16, #8
  1255. 80008f0: b28d uxth r5, r1
  1256. 80008f2: 6823 ldr r3, [r4, #0]
  1257. 80008f4: f1b9 0f01 cmp.w r9, #1
  1258. 80008f8: bf0c ite eq
  1259. 80008fa: 695b ldreq r3, [r3, #20]
  1260. 80008fc: 699b ldrne r3, [r3, #24]
  1261. 80008fe: ea35 0303 bics.w r3, r5, r3
  1262. 8000902: bf0c ite eq
  1263. 8000904: 2301 moveq r3, #1
  1264. 8000906: 2300 movne r3, #0
  1265. 8000908: 4543 cmp r3, r8
  1266. 800090a: d002 beq.n 8000912 <I2C_WaitOnFlagUntilTimeout+0x32>
  1267. return HAL_OK;
  1268. 800090c: 2000 movs r0, #0
  1269. }
  1270. 800090e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  1271. if(Timeout != HAL_MAX_DELAY)
  1272. 8000912: 1c7b adds r3, r7, #1
  1273. 8000914: d0ed beq.n 80008f2 <I2C_WaitOnFlagUntilTimeout+0x12>
  1274. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  1275. 8000916: b95f cbnz r7, 8000930 <I2C_WaitOnFlagUntilTimeout+0x50>
  1276. hi2c->PreviousState = I2C_STATE_NONE;
  1277. 8000918: 2300 movs r3, #0
  1278. hi2c->State= HAL_I2C_STATE_READY;
  1279. 800091a: 2220 movs r2, #32
  1280. hi2c->PreviousState = I2C_STATE_NONE;
  1281. 800091c: 6323 str r3, [r4, #48] ; 0x30
  1282. __HAL_UNLOCK(hi2c);
  1283. 800091e: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1284. hi2c->State= HAL_I2C_STATE_READY;
  1285. 8000922: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1286. __HAL_UNLOCK(hi2c);
  1287. 8000926: 2003 movs r0, #3
  1288. hi2c->Mode = HAL_I2C_MODE_NONE;
  1289. 8000928: f884 303e strb.w r3, [r4, #62] ; 0x3e
  1290. 800092c: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  1291. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  1292. 8000930: f7ff fcaa bl 8000288 <HAL_GetTick>
  1293. 8000934: 1b80 subs r0, r0, r6
  1294. 8000936: 4287 cmp r7, r0
  1295. 8000938: d2db bcs.n 80008f2 <I2C_WaitOnFlagUntilTimeout+0x12>
  1296. 800093a: e7ed b.n 8000918 <I2C_WaitOnFlagUntilTimeout+0x38>
  1297. 0800093c <I2C_WaitOnTXEFlagUntilTimeout>:
  1298. {
  1299. 800093c: b570 push {r4, r5, r6, lr}
  1300. 800093e: 4604 mov r4, r0
  1301. 8000940: 460d mov r5, r1
  1302. 8000942: 4616 mov r6, r2
  1303. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  1304. 8000944: 6823 ldr r3, [r4, #0]
  1305. 8000946: 695b ldr r3, [r3, #20]
  1306. 8000948: 061b lsls r3, r3, #24
  1307. 800094a: d501 bpl.n 8000950 <I2C_WaitOnTXEFlagUntilTimeout+0x14>
  1308. return HAL_OK;
  1309. 800094c: 2000 movs r0, #0
  1310. 800094e: bd70 pop {r4, r5, r6, pc}
  1311. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  1312. 8000950: 4620 mov r0, r4
  1313. 8000952: f7ff ff70 bl 8000836 <I2C_IsAcknowledgeFailed>
  1314. 8000956: b9a8 cbnz r0, 8000984 <I2C_WaitOnTXEFlagUntilTimeout+0x48>
  1315. if(Timeout != HAL_MAX_DELAY)
  1316. 8000958: 1c6a adds r2, r5, #1
  1317. 800095a: d0f3 beq.n 8000944 <I2C_WaitOnTXEFlagUntilTimeout+0x8>
  1318. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1319. 800095c: b965 cbnz r5, 8000978 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
  1320. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1321. 800095e: 6c23 ldr r3, [r4, #64] ; 0x40
  1322. hi2c->State= HAL_I2C_STATE_READY;
  1323. 8000960: 2220 movs r2, #32
  1324. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1325. 8000962: f043 0320 orr.w r3, r3, #32
  1326. 8000966: 6423 str r3, [r4, #64] ; 0x40
  1327. hi2c->PreviousState = I2C_STATE_NONE;
  1328. 8000968: 2300 movs r3, #0
  1329. __HAL_UNLOCK(hi2c);
  1330. 800096a: 2003 movs r0, #3
  1331. hi2c->PreviousState = I2C_STATE_NONE;
  1332. 800096c: 6323 str r3, [r4, #48] ; 0x30
  1333. __HAL_UNLOCK(hi2c);
  1334. 800096e: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1335. hi2c->State= HAL_I2C_STATE_READY;
  1336. 8000972: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1337. 8000976: bd70 pop {r4, r5, r6, pc}
  1338. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1339. 8000978: f7ff fc86 bl 8000288 <HAL_GetTick>
  1340. 800097c: 1b80 subs r0, r0, r6
  1341. 800097e: 4285 cmp r5, r0
  1342. 8000980: d2e0 bcs.n 8000944 <I2C_WaitOnTXEFlagUntilTimeout+0x8>
  1343. 8000982: e7ec b.n 800095e <I2C_WaitOnTXEFlagUntilTimeout+0x22>
  1344. return HAL_ERROR;
  1345. 8000984: 2001 movs r0, #1
  1346. }
  1347. 8000986: bd70 pop {r4, r5, r6, pc}
  1348. 08000988 <I2C_RequestMemoryWrite>:
  1349. {
  1350. 8000988: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
  1351. 800098c: 4615 mov r5, r2
  1352. hi2c->Instance->CR1 |= I2C_CR1_START;
  1353. 800098e: 6802 ldr r2, [r0, #0]
  1354. {
  1355. 8000990: 4698 mov r8, r3
  1356. hi2c->Instance->CR1 |= I2C_CR1_START;
  1357. 8000992: 6813 ldr r3, [r2, #0]
  1358. {
  1359. 8000994: 9e0b ldr r6, [sp, #44] ; 0x2c
  1360. hi2c->Instance->CR1 |= I2C_CR1_START;
  1361. 8000996: f443 7380 orr.w r3, r3, #256 ; 0x100
  1362. 800099a: 6013 str r3, [r2, #0]
  1363. {
  1364. 800099c: 460f mov r7, r1
  1365. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1366. 800099e: 9600 str r6, [sp, #0]
  1367. 80009a0: 9b0a ldr r3, [sp, #40] ; 0x28
  1368. 80009a2: 2200 movs r2, #0
  1369. 80009a4: f04f 1101 mov.w r1, #65537 ; 0x10001
  1370. {
  1371. 80009a8: 4604 mov r4, r0
  1372. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1373. 80009aa: f7ff ff99 bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  1374. 80009ae: b968 cbnz r0, 80009cc <I2C_RequestMemoryWrite+0x44>
  1375. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  1376. 80009b0: 6823 ldr r3, [r4, #0]
  1377. 80009b2: f007 07fe and.w r7, r7, #254 ; 0xfe
  1378. 80009b6: 611f str r7, [r3, #16]
  1379. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  1380. 80009b8: 9a0a ldr r2, [sp, #40] ; 0x28
  1381. 80009ba: 4633 mov r3, r6
  1382. 80009bc: 491a ldr r1, [pc, #104] ; (8000a28 <I2C_RequestMemoryWrite+0xa0>)
  1383. 80009be: 4620 mov r0, r4
  1384. 80009c0: f7ff ff4e bl 8000860 <I2C_WaitOnMasterAddressFlagUntilTimeout>
  1385. 80009c4: b130 cbz r0, 80009d4 <I2C_RequestMemoryWrite+0x4c>
  1386. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1387. 80009c6: 6c23 ldr r3, [r4, #64] ; 0x40
  1388. 80009c8: 2b04 cmp r3, #4
  1389. 80009ca: d018 beq.n 80009fe <I2C_RequestMemoryWrite+0x76>
  1390. return HAL_TIMEOUT;
  1391. 80009cc: 2003 movs r0, #3
  1392. }
  1393. 80009ce: b004 add sp, #16
  1394. 80009d0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  1395. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1396. 80009d4: 6823 ldr r3, [r4, #0]
  1397. 80009d6: 9003 str r0, [sp, #12]
  1398. 80009d8: 695a ldr r2, [r3, #20]
  1399. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1400. 80009da: 990a ldr r1, [sp, #40] ; 0x28
  1401. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1402. 80009dc: 9203 str r2, [sp, #12]
  1403. 80009de: 699b ldr r3, [r3, #24]
  1404. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1405. 80009e0: 4632 mov r2, r6
  1406. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1407. 80009e2: 9303 str r3, [sp, #12]
  1408. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1409. 80009e4: 4620 mov r0, r4
  1410. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1411. 80009e6: 9b03 ldr r3, [sp, #12]
  1412. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1413. 80009e8: f7ff ffa8 bl 800093c <I2C_WaitOnTXEFlagUntilTimeout>
  1414. 80009ec: b148 cbz r0, 8000a02 <I2C_RequestMemoryWrite+0x7a>
  1415. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1416. 80009ee: 6c23 ldr r3, [r4, #64] ; 0x40
  1417. 80009f0: 2b04 cmp r3, #4
  1418. 80009f2: d1eb bne.n 80009cc <I2C_RequestMemoryWrite+0x44>
  1419. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1420. 80009f4: 6822 ldr r2, [r4, #0]
  1421. 80009f6: 6813 ldr r3, [r2, #0]
  1422. 80009f8: f443 7300 orr.w r3, r3, #512 ; 0x200
  1423. 80009fc: 6013 str r3, [r2, #0]
  1424. return HAL_ERROR;
  1425. 80009fe: 2001 movs r0, #1
  1426. 8000a00: e7e5 b.n 80009ce <I2C_RequestMemoryWrite+0x46>
  1427. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  1428. 8000a02: f1b8 0f01 cmp.w r8, #1
  1429. 8000a06: 6823 ldr r3, [r4, #0]
  1430. 8000a08: d102 bne.n 8000a10 <I2C_RequestMemoryWrite+0x88>
  1431. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1432. 8000a0a: b2ed uxtb r5, r5
  1433. 8000a0c: 611d str r5, [r3, #16]
  1434. 8000a0e: e7de b.n 80009ce <I2C_RequestMemoryWrite+0x46>
  1435. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  1436. 8000a10: 0a2a lsrs r2, r5, #8
  1437. 8000a12: 611a str r2, [r3, #16]
  1438. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1439. 8000a14: 990a ldr r1, [sp, #40] ; 0x28
  1440. 8000a16: 4632 mov r2, r6
  1441. 8000a18: 4620 mov r0, r4
  1442. 8000a1a: f7ff ff8f bl 800093c <I2C_WaitOnTXEFlagUntilTimeout>
  1443. 8000a1e: 2800 cmp r0, #0
  1444. 8000a20: d1e5 bne.n 80009ee <I2C_RequestMemoryWrite+0x66>
  1445. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1446. 8000a22: 6823 ldr r3, [r4, #0]
  1447. 8000a24: e7f1 b.n 8000a0a <I2C_RequestMemoryWrite+0x82>
  1448. 8000a26: bf00 nop
  1449. 8000a28: 00010002 .word 0x00010002
  1450. 08000a2c <I2C_RequestMemoryRead>:
  1451. {
  1452. 8000a2c: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
  1453. 8000a30: 4698 mov r8, r3
  1454. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1455. 8000a32: 6803 ldr r3, [r0, #0]
  1456. {
  1457. 8000a34: 4616 mov r6, r2
  1458. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1459. 8000a36: 681a ldr r2, [r3, #0]
  1460. {
  1461. 8000a38: 9d0b ldr r5, [sp, #44] ; 0x2c
  1462. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1463. 8000a3a: f442 6280 orr.w r2, r2, #1024 ; 0x400
  1464. 8000a3e: 601a str r2, [r3, #0]
  1465. hi2c->Instance->CR1 |= I2C_CR1_START;
  1466. 8000a40: 681a ldr r2, [r3, #0]
  1467. {
  1468. 8000a42: 460f mov r7, r1
  1469. hi2c->Instance->CR1 |= I2C_CR1_START;
  1470. 8000a44: f442 7280 orr.w r2, r2, #256 ; 0x100
  1471. 8000a48: 601a str r2, [r3, #0]
  1472. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1473. 8000a4a: f04f 1101 mov.w r1, #65537 ; 0x10001
  1474. 8000a4e: 9500 str r5, [sp, #0]
  1475. 8000a50: 9b0a ldr r3, [sp, #40] ; 0x28
  1476. 8000a52: 2200 movs r2, #0
  1477. {
  1478. 8000a54: 4604 mov r4, r0
  1479. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1480. 8000a56: f7ff ff43 bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  1481. 8000a5a: b980 cbnz r0, 8000a7e <I2C_RequestMemoryRead+0x52>
  1482. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  1483. 8000a5c: 6823 ldr r3, [r4, #0]
  1484. 8000a5e: b2ff uxtb r7, r7
  1485. 8000a60: f007 02fe and.w r2, r7, #254 ; 0xfe
  1486. 8000a64: 611a str r2, [r3, #16]
  1487. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  1488. 8000a66: 492d ldr r1, [pc, #180] ; (8000b1c <I2C_RequestMemoryRead+0xf0>)
  1489. 8000a68: 462b mov r3, r5
  1490. 8000a6a: 9a0a ldr r2, [sp, #40] ; 0x28
  1491. 8000a6c: 4620 mov r0, r4
  1492. 8000a6e: f7ff fef7 bl 8000860 <I2C_WaitOnMasterAddressFlagUntilTimeout>
  1493. 8000a72: b140 cbz r0, 8000a86 <I2C_RequestMemoryRead+0x5a>
  1494. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1495. 8000a74: 6c23 ldr r3, [r4, #64] ; 0x40
  1496. 8000a76: 2b04 cmp r3, #4
  1497. 8000a78: d101 bne.n 8000a7e <I2C_RequestMemoryRead+0x52>
  1498. return HAL_ERROR;
  1499. 8000a7a: 2001 movs r0, #1
  1500. 8000a7c: e000 b.n 8000a80 <I2C_RequestMemoryRead+0x54>
  1501. return HAL_TIMEOUT;
  1502. 8000a7e: 2003 movs r0, #3
  1503. }
  1504. 8000a80: b004 add sp, #16
  1505. 8000a82: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  1506. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1507. 8000a86: 6823 ldr r3, [r4, #0]
  1508. 8000a88: 9003 str r0, [sp, #12]
  1509. 8000a8a: 695a ldr r2, [r3, #20]
  1510. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1511. 8000a8c: 990a ldr r1, [sp, #40] ; 0x28
  1512. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1513. 8000a8e: 9203 str r2, [sp, #12]
  1514. 8000a90: 699b ldr r3, [r3, #24]
  1515. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1516. 8000a92: 462a mov r2, r5
  1517. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1518. 8000a94: 9303 str r3, [sp, #12]
  1519. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1520. 8000a96: 4620 mov r0, r4
  1521. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1522. 8000a98: 9b03 ldr r3, [sp, #12]
  1523. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1524. 8000a9a: f7ff ff4f bl 800093c <I2C_WaitOnTXEFlagUntilTimeout>
  1525. 8000a9e: b140 cbz r0, 8000ab2 <I2C_RequestMemoryRead+0x86>
  1526. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1527. 8000aa0: 6c23 ldr r3, [r4, #64] ; 0x40
  1528. 8000aa2: 2b04 cmp r3, #4
  1529. 8000aa4: d1eb bne.n 8000a7e <I2C_RequestMemoryRead+0x52>
  1530. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1531. 8000aa6: 6822 ldr r2, [r4, #0]
  1532. 8000aa8: 6813 ldr r3, [r2, #0]
  1533. 8000aaa: f443 7300 orr.w r3, r3, #512 ; 0x200
  1534. 8000aae: 6013 str r3, [r2, #0]
  1535. 8000ab0: e7e3 b.n 8000a7a <I2C_RequestMemoryRead+0x4e>
  1536. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  1537. 8000ab2: f1b8 0f01 cmp.w r8, #1
  1538. 8000ab6: 6823 ldr r3, [r4, #0]
  1539. 8000ab8: d124 bne.n 8000b04 <I2C_RequestMemoryRead+0xd8>
  1540. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1541. 8000aba: b2f6 uxtb r6, r6
  1542. 8000abc: 611e str r6, [r3, #16]
  1543. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1544. 8000abe: 462a mov r2, r5
  1545. 8000ac0: 990a ldr r1, [sp, #40] ; 0x28
  1546. 8000ac2: 4620 mov r0, r4
  1547. 8000ac4: f7ff ff3a bl 800093c <I2C_WaitOnTXEFlagUntilTimeout>
  1548. 8000ac8: 4602 mov r2, r0
  1549. 8000aca: 2800 cmp r0, #0
  1550. 8000acc: d1e8 bne.n 8000aa0 <I2C_RequestMemoryRead+0x74>
  1551. hi2c->Instance->CR1 |= I2C_CR1_START;
  1552. 8000ace: 6821 ldr r1, [r4, #0]
  1553. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1554. 8000ad0: 4620 mov r0, r4
  1555. hi2c->Instance->CR1 |= I2C_CR1_START;
  1556. 8000ad2: 680b ldr r3, [r1, #0]
  1557. 8000ad4: f443 7380 orr.w r3, r3, #256 ; 0x100
  1558. 8000ad8: 600b str r3, [r1, #0]
  1559. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  1560. 8000ada: 9500 str r5, [sp, #0]
  1561. 8000adc: 9b0a ldr r3, [sp, #40] ; 0x28
  1562. 8000ade: f04f 1101 mov.w r1, #65537 ; 0x10001
  1563. 8000ae2: f7ff fefd bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  1564. 8000ae6: 2800 cmp r0, #0
  1565. 8000ae8: d1c9 bne.n 8000a7e <I2C_RequestMemoryRead+0x52>
  1566. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  1567. 8000aea: 6823 ldr r3, [r4, #0]
  1568. 8000aec: f047 0701 orr.w r7, r7, #1
  1569. 8000af0: 611f str r7, [r3, #16]
  1570. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  1571. 8000af2: 9a0a ldr r2, [sp, #40] ; 0x28
  1572. 8000af4: 462b mov r3, r5
  1573. 8000af6: 4909 ldr r1, [pc, #36] ; (8000b1c <I2C_RequestMemoryRead+0xf0>)
  1574. 8000af8: 4620 mov r0, r4
  1575. 8000afa: f7ff feb1 bl 8000860 <I2C_WaitOnMasterAddressFlagUntilTimeout>
  1576. 8000afe: 2800 cmp r0, #0
  1577. 8000b00: d1b8 bne.n 8000a74 <I2C_RequestMemoryRead+0x48>
  1578. 8000b02: e7bd b.n 8000a80 <I2C_RequestMemoryRead+0x54>
  1579. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  1580. 8000b04: 0a32 lsrs r2, r6, #8
  1581. 8000b06: 611a str r2, [r3, #16]
  1582. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  1583. 8000b08: 990a ldr r1, [sp, #40] ; 0x28
  1584. 8000b0a: 462a mov r2, r5
  1585. 8000b0c: 4620 mov r0, r4
  1586. 8000b0e: f7ff ff15 bl 800093c <I2C_WaitOnTXEFlagUntilTimeout>
  1587. 8000b12: 2800 cmp r0, #0
  1588. 8000b14: d1c4 bne.n 8000aa0 <I2C_RequestMemoryRead+0x74>
  1589. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  1590. 8000b16: 6823 ldr r3, [r4, #0]
  1591. 8000b18: e7cf b.n 8000aba <I2C_RequestMemoryRead+0x8e>
  1592. 8000b1a: bf00 nop
  1593. 8000b1c: 00010002 .word 0x00010002
  1594. 08000b20 <I2C_WaitOnRXNEFlagUntilTimeout>:
  1595. {
  1596. 8000b20: b570 push {r4, r5, r6, lr}
  1597. 8000b22: 4604 mov r4, r0
  1598. 8000b24: 460d mov r5, r1
  1599. 8000b26: 4616 mov r6, r2
  1600. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  1601. 8000b28: 6820 ldr r0, [r4, #0]
  1602. 8000b2a: 6943 ldr r3, [r0, #20]
  1603. 8000b2c: f013 0340 ands.w r3, r3, #64 ; 0x40
  1604. 8000b30: d001 beq.n 8000b36 <I2C_WaitOnRXNEFlagUntilTimeout+0x16>
  1605. return HAL_OK;
  1606. 8000b32: 2000 movs r0, #0
  1607. }
  1608. 8000b34: bd70 pop {r4, r5, r6, pc}
  1609. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  1610. 8000b36: 6942 ldr r2, [r0, #20]
  1611. 8000b38: 06d2 lsls r2, r2, #27
  1612. 8000b3a: d50b bpl.n 8000b54 <I2C_WaitOnRXNEFlagUntilTimeout+0x34>
  1613. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  1614. 8000b3c: f06f 0210 mvn.w r2, #16
  1615. 8000b40: 6142 str r2, [r0, #20]
  1616. hi2c->State= HAL_I2C_STATE_READY;
  1617. 8000b42: 2220 movs r2, #32
  1618. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1619. 8000b44: 6423 str r3, [r4, #64] ; 0x40
  1620. __HAL_UNLOCK(hi2c);
  1621. 8000b46: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1622. hi2c->PreviousState = I2C_STATE_NONE;
  1623. 8000b4a: 6323 str r3, [r4, #48] ; 0x30
  1624. return HAL_ERROR;
  1625. 8000b4c: 2001 movs r0, #1
  1626. hi2c->State= HAL_I2C_STATE_READY;
  1627. 8000b4e: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1628. return HAL_ERROR;
  1629. 8000b52: bd70 pop {r4, r5, r6, pc}
  1630. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1631. 8000b54: b95d cbnz r5, 8000b6e <I2C_WaitOnRXNEFlagUntilTimeout+0x4e>
  1632. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1633. 8000b56: 6c23 ldr r3, [r4, #64] ; 0x40
  1634. __HAL_UNLOCK(hi2c);
  1635. 8000b58: 2003 movs r0, #3
  1636. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1637. 8000b5a: f043 0320 orr.w r3, r3, #32
  1638. 8000b5e: 6423 str r3, [r4, #64] ; 0x40
  1639. hi2c->State= HAL_I2C_STATE_READY;
  1640. 8000b60: 2320 movs r3, #32
  1641. 8000b62: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1642. __HAL_UNLOCK(hi2c);
  1643. 8000b66: 2300 movs r3, #0
  1644. 8000b68: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1645. 8000b6c: bd70 pop {r4, r5, r6, pc}
  1646. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1647. 8000b6e: f7ff fb8b bl 8000288 <HAL_GetTick>
  1648. 8000b72: 1b80 subs r0, r0, r6
  1649. 8000b74: 4285 cmp r5, r0
  1650. 8000b76: d2d7 bcs.n 8000b28 <I2C_WaitOnRXNEFlagUntilTimeout+0x8>
  1651. 8000b78: e7ed b.n 8000b56 <I2C_WaitOnRXNEFlagUntilTimeout+0x36>
  1652. 08000b7a <I2C_WaitOnBTFFlagUntilTimeout>:
  1653. {
  1654. 8000b7a: b570 push {r4, r5, r6, lr}
  1655. 8000b7c: 4604 mov r4, r0
  1656. 8000b7e: 460d mov r5, r1
  1657. 8000b80: 4616 mov r6, r2
  1658. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  1659. 8000b82: 6823 ldr r3, [r4, #0]
  1660. 8000b84: 695b ldr r3, [r3, #20]
  1661. 8000b86: 075b lsls r3, r3, #29
  1662. 8000b88: d501 bpl.n 8000b8e <I2C_WaitOnBTFFlagUntilTimeout+0x14>
  1663. return HAL_OK;
  1664. 8000b8a: 2000 movs r0, #0
  1665. 8000b8c: bd70 pop {r4, r5, r6, pc}
  1666. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  1667. 8000b8e: 4620 mov r0, r4
  1668. 8000b90: f7ff fe51 bl 8000836 <I2C_IsAcknowledgeFailed>
  1669. 8000b94: b9a8 cbnz r0, 8000bc2 <I2C_WaitOnBTFFlagUntilTimeout+0x48>
  1670. if(Timeout != HAL_MAX_DELAY)
  1671. 8000b96: 1c6a adds r2, r5, #1
  1672. 8000b98: d0f3 beq.n 8000b82 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
  1673. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1674. 8000b9a: b965 cbnz r5, 8000bb6 <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
  1675. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1676. 8000b9c: 6c23 ldr r3, [r4, #64] ; 0x40
  1677. hi2c->State= HAL_I2C_STATE_READY;
  1678. 8000b9e: 2220 movs r2, #32
  1679. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1680. 8000ba0: f043 0320 orr.w r3, r3, #32
  1681. 8000ba4: 6423 str r3, [r4, #64] ; 0x40
  1682. hi2c->PreviousState = I2C_STATE_NONE;
  1683. 8000ba6: 2300 movs r3, #0
  1684. __HAL_UNLOCK(hi2c);
  1685. 8000ba8: 2003 movs r0, #3
  1686. hi2c->PreviousState = I2C_STATE_NONE;
  1687. 8000baa: 6323 str r3, [r4, #48] ; 0x30
  1688. __HAL_UNLOCK(hi2c);
  1689. 8000bac: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1690. hi2c->State= HAL_I2C_STATE_READY;
  1691. 8000bb0: f884 203d strb.w r2, [r4, #61] ; 0x3d
  1692. 8000bb4: bd70 pop {r4, r5, r6, pc}
  1693. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  1694. 8000bb6: f7ff fb67 bl 8000288 <HAL_GetTick>
  1695. 8000bba: 1b80 subs r0, r0, r6
  1696. 8000bbc: 4285 cmp r5, r0
  1697. 8000bbe: d2e0 bcs.n 8000b82 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
  1698. 8000bc0: e7ec b.n 8000b9c <I2C_WaitOnBTFFlagUntilTimeout+0x22>
  1699. return HAL_ERROR;
  1700. 8000bc2: 2001 movs r0, #1
  1701. }
  1702. 8000bc4: bd70 pop {r4, r5, r6, pc}
  1703. ...
  1704. 08000bc8 <HAL_I2C_Init>:
  1705. {
  1706. 8000bc8: b538 push {r3, r4, r5, lr}
  1707. if(hi2c == NULL)
  1708. 8000bca: 4604 mov r4, r0
  1709. 8000bcc: b908 cbnz r0, 8000bd2 <HAL_I2C_Init+0xa>
  1710. return HAL_ERROR;
  1711. 8000bce: 2001 movs r0, #1
  1712. 8000bd0: bd38 pop {r3, r4, r5, pc}
  1713. if(hi2c->State == HAL_I2C_STATE_RESET)
  1714. 8000bd2: f890 303d ldrb.w r3, [r0, #61] ; 0x3d
  1715. 8000bd6: f003 02ff and.w r2, r3, #255 ; 0xff
  1716. 8000bda: b91b cbnz r3, 8000be4 <HAL_I2C_Init+0x1c>
  1717. hi2c->Lock = HAL_UNLOCKED;
  1718. 8000bdc: f880 203c strb.w r2, [r0, #60] ; 0x3c
  1719. HAL_I2C_MspInit(hi2c);
  1720. 8000be0: f002 fa3e bl 8003060 <HAL_I2C_MspInit>
  1721. hi2c->State = HAL_I2C_STATE_BUSY;
  1722. 8000be4: 2324 movs r3, #36 ; 0x24
  1723. __HAL_I2C_DISABLE(hi2c);
  1724. 8000be6: 6822 ldr r2, [r4, #0]
  1725. hi2c->State = HAL_I2C_STATE_BUSY;
  1726. 8000be8: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1727. __HAL_I2C_DISABLE(hi2c);
  1728. 8000bec: 6813 ldr r3, [r2, #0]
  1729. 8000bee: f023 0301 bic.w r3, r3, #1
  1730. 8000bf2: 6013 str r3, [r2, #0]
  1731. pclk1 = HAL_RCC_GetPCLK1Freq();
  1732. 8000bf4: f001 f8a0 bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  1733. if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
  1734. 8000bf8: 6863 ldr r3, [r4, #4]
  1735. 8000bfa: 4a2f ldr r2, [pc, #188] ; (8000cb8 <HAL_I2C_Init+0xf0>)
  1736. 8000bfc: 4293 cmp r3, r2
  1737. 8000bfe: d830 bhi.n 8000c62 <HAL_I2C_Init+0x9a>
  1738. 8000c00: 4a2e ldr r2, [pc, #184] ; (8000cbc <HAL_I2C_Init+0xf4>)
  1739. 8000c02: 4290 cmp r0, r2
  1740. 8000c04: d9e3 bls.n 8000bce <HAL_I2C_Init+0x6>
  1741. freqrange = I2C_FREQRANGE(pclk1);
  1742. 8000c06: 4a2e ldr r2, [pc, #184] ; (8000cc0 <HAL_I2C_Init+0xf8>)
  1743. hi2c->Instance->CR2 = freqrange;
  1744. 8000c08: 6821 ldr r1, [r4, #0]
  1745. freqrange = I2C_FREQRANGE(pclk1);
  1746. 8000c0a: fbb0 f2f2 udiv r2, r0, r2
  1747. hi2c->Instance->CR2 = freqrange;
  1748. 8000c0e: 604a str r2, [r1, #4]
  1749. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1750. 8000c10: 3201 adds r2, #1
  1751. 8000c12: 620a str r2, [r1, #32]
  1752. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  1753. 8000c14: 4a28 ldr r2, [pc, #160] ; (8000cb8 <HAL_I2C_Init+0xf0>)
  1754. 8000c16: 3801 subs r0, #1
  1755. 8000c18: 4293 cmp r3, r2
  1756. 8000c1a: d832 bhi.n 8000c82 <HAL_I2C_Init+0xba>
  1757. 8000c1c: 005b lsls r3, r3, #1
  1758. 8000c1e: fbb0 f0f3 udiv r0, r0, r3
  1759. 8000c22: 1c43 adds r3, r0, #1
  1760. 8000c24: f3c3 030b ubfx r3, r3, #0, #12
  1761. 8000c28: 2b04 cmp r3, #4
  1762. 8000c2a: bf38 it cc
  1763. 8000c2c: 2304 movcc r3, #4
  1764. 8000c2e: 61cb str r3, [r1, #28]
  1765. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  1766. 8000c30: 6a22 ldr r2, [r4, #32]
  1767. 8000c32: 69e3 ldr r3, [r4, #28]
  1768. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1769. 8000c34: 2000 movs r0, #0
  1770. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  1771. 8000c36: 4313 orrs r3, r2
  1772. 8000c38: 600b str r3, [r1, #0]
  1773. hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
  1774. 8000c3a: 68e2 ldr r2, [r4, #12]
  1775. 8000c3c: 6923 ldr r3, [r4, #16]
  1776. 8000c3e: 4313 orrs r3, r2
  1777. 8000c40: 608b str r3, [r1, #8]
  1778. hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
  1779. 8000c42: 69a2 ldr r2, [r4, #24]
  1780. 8000c44: 6963 ldr r3, [r4, #20]
  1781. 8000c46: 4313 orrs r3, r2
  1782. 8000c48: 60cb str r3, [r1, #12]
  1783. __HAL_I2C_ENABLE(hi2c);
  1784. 8000c4a: 680b ldr r3, [r1, #0]
  1785. 8000c4c: f043 0301 orr.w r3, r3, #1
  1786. 8000c50: 600b str r3, [r1, #0]
  1787. hi2c->State = HAL_I2C_STATE_READY;
  1788. 8000c52: 2320 movs r3, #32
  1789. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1790. 8000c54: 6420 str r0, [r4, #64] ; 0x40
  1791. hi2c->State = HAL_I2C_STATE_READY;
  1792. 8000c56: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1793. hi2c->PreviousState = I2C_STATE_NONE;
  1794. 8000c5a: 6320 str r0, [r4, #48] ; 0x30
  1795. hi2c->Mode = HAL_I2C_MODE_NONE;
  1796. 8000c5c: f884 003e strb.w r0, [r4, #62] ; 0x3e
  1797. return HAL_OK;
  1798. 8000c60: bd38 pop {r3, r4, r5, pc}
  1799. if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
  1800. 8000c62: 4a18 ldr r2, [pc, #96] ; (8000cc4 <HAL_I2C_Init+0xfc>)
  1801. 8000c64: 4290 cmp r0, r2
  1802. 8000c66: d9b2 bls.n 8000bce <HAL_I2C_Init+0x6>
  1803. freqrange = I2C_FREQRANGE(pclk1);
  1804. 8000c68: 4d15 ldr r5, [pc, #84] ; (8000cc0 <HAL_I2C_Init+0xf8>)
  1805. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1806. 8000c6a: f44f 7296 mov.w r2, #300 ; 0x12c
  1807. freqrange = I2C_FREQRANGE(pclk1);
  1808. 8000c6e: fbb0 f5f5 udiv r5, r0, r5
  1809. hi2c->Instance->CR2 = freqrange;
  1810. 8000c72: 6821 ldr r1, [r4, #0]
  1811. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1812. 8000c74: 436a muls r2, r5
  1813. hi2c->Instance->CR2 = freqrange;
  1814. 8000c76: 604d str r5, [r1, #4]
  1815. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  1816. 8000c78: f44f 757a mov.w r5, #1000 ; 0x3e8
  1817. 8000c7c: fbb2 f2f5 udiv r2, r2, r5
  1818. 8000c80: e7c6 b.n 8000c10 <HAL_I2C_Init+0x48>
  1819. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  1820. 8000c82: 68a2 ldr r2, [r4, #8]
  1821. 8000c84: b952 cbnz r2, 8000c9c <HAL_I2C_Init+0xd4>
  1822. 8000c86: eb03 0343 add.w r3, r3, r3, lsl #1
  1823. 8000c8a: fbb0 f0f3 udiv r0, r0, r3
  1824. 8000c8e: 1c43 adds r3, r0, #1
  1825. 8000c90: f3c3 030b ubfx r3, r3, #0, #12
  1826. 8000c94: b16b cbz r3, 8000cb2 <HAL_I2C_Init+0xea>
  1827. 8000c96: f443 4300 orr.w r3, r3, #32768 ; 0x8000
  1828. 8000c9a: e7c8 b.n 8000c2e <HAL_I2C_Init+0x66>
  1829. 8000c9c: 2219 movs r2, #25
  1830. 8000c9e: 4353 muls r3, r2
  1831. 8000ca0: fbb0 f0f3 udiv r0, r0, r3
  1832. 8000ca4: 1c43 adds r3, r0, #1
  1833. 8000ca6: f3c3 030b ubfx r3, r3, #0, #12
  1834. 8000caa: b113 cbz r3, 8000cb2 <HAL_I2C_Init+0xea>
  1835. 8000cac: f443 4340 orr.w r3, r3, #49152 ; 0xc000
  1836. 8000cb0: e7bd b.n 8000c2e <HAL_I2C_Init+0x66>
  1837. 8000cb2: 2301 movs r3, #1
  1838. 8000cb4: e7bb b.n 8000c2e <HAL_I2C_Init+0x66>
  1839. 8000cb6: bf00 nop
  1840. 8000cb8: 000186a0 .word 0x000186a0
  1841. 8000cbc: 001e847f .word 0x001e847f
  1842. 8000cc0: 000f4240 .word 0x000f4240
  1843. 8000cc4: 003d08ff .word 0x003d08ff
  1844. 08000cc8 <HAL_I2C_Mem_Write>:
  1845. {
  1846. 8000cc8: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr}
  1847. 8000ccc: 4604 mov r4, r0
  1848. 8000cce: 469a mov sl, r3
  1849. 8000cd0: 4688 mov r8, r1
  1850. 8000cd2: 4691 mov r9, r2
  1851. 8000cd4: 9e0c ldr r6, [sp, #48] ; 0x30
  1852. tickstart = HAL_GetTick();
  1853. 8000cd6: f7ff fad7 bl 8000288 <HAL_GetTick>
  1854. if(hi2c->State == HAL_I2C_STATE_READY)
  1855. 8000cda: f894 303d ldrb.w r3, [r4, #61] ; 0x3d
  1856. tickstart = HAL_GetTick();
  1857. 8000cde: 4605 mov r5, r0
  1858. if(hi2c->State == HAL_I2C_STATE_READY)
  1859. 8000ce0: 2b20 cmp r3, #32
  1860. 8000ce2: d003 beq.n 8000cec <HAL_I2C_Mem_Write+0x24>
  1861. return HAL_BUSY;
  1862. 8000ce4: 2002 movs r0, #2
  1863. }
  1864. 8000ce6: b002 add sp, #8
  1865. 8000ce8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  1866. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1867. 8000cec: 9000 str r0, [sp, #0]
  1868. 8000cee: 2319 movs r3, #25
  1869. 8000cf0: 2201 movs r2, #1
  1870. 8000cf2: 493e ldr r1, [pc, #248] ; (8000dec <HAL_I2C_Mem_Write+0x124>)
  1871. 8000cf4: 4620 mov r0, r4
  1872. 8000cf6: f7ff fdf3 bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  1873. 8000cfa: 2800 cmp r0, #0
  1874. 8000cfc: d1f2 bne.n 8000ce4 <HAL_I2C_Mem_Write+0x1c>
  1875. __HAL_LOCK(hi2c);
  1876. 8000cfe: f894 303c ldrb.w r3, [r4, #60] ; 0x3c
  1877. 8000d02: 2b01 cmp r3, #1
  1878. 8000d04: d0ee beq.n 8000ce4 <HAL_I2C_Mem_Write+0x1c>
  1879. 8000d06: 2301 movs r3, #1
  1880. 8000d08: f884 303c strb.w r3, [r4, #60] ; 0x3c
  1881. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1882. 8000d0c: 6823 ldr r3, [r4, #0]
  1883. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1884. 8000d0e: 2700 movs r7, #0
  1885. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1886. 8000d10: 681a ldr r2, [r3, #0]
  1887. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1888. 8000d12: 4641 mov r1, r8
  1889. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1890. 8000d14: 07d2 lsls r2, r2, #31
  1891. __HAL_I2C_ENABLE(hi2c);
  1892. 8000d16: bf58 it pl
  1893. 8000d18: 681a ldrpl r2, [r3, #0]
  1894. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1895. 8000d1a: 4620 mov r0, r4
  1896. __HAL_I2C_ENABLE(hi2c);
  1897. 8000d1c: bf5c itt pl
  1898. 8000d1e: f042 0201 orrpl.w r2, r2, #1
  1899. 8000d22: 601a strpl r2, [r3, #0]
  1900. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1901. 8000d24: 681a ldr r2, [r3, #0]
  1902. 8000d26: f422 6200 bic.w r2, r2, #2048 ; 0x800
  1903. 8000d2a: 601a str r2, [r3, #0]
  1904. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1905. 8000d2c: 2321 movs r3, #33 ; 0x21
  1906. 8000d2e: f884 303d strb.w r3, [r4, #61] ; 0x3d
  1907. hi2c->Mode = HAL_I2C_MODE_MEM;
  1908. 8000d32: 2340 movs r3, #64 ; 0x40
  1909. 8000d34: f884 303e strb.w r3, [r4, #62] ; 0x3e
  1910. hi2c->pBuffPtr = pData;
  1911. 8000d38: 9b0a ldr r3, [sp, #40] ; 0x28
  1912. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1913. 8000d3a: 6427 str r7, [r4, #64] ; 0x40
  1914. hi2c->pBuffPtr = pData;
  1915. 8000d3c: 6263 str r3, [r4, #36] ; 0x24
  1916. hi2c->XferCount = Size;
  1917. 8000d3e: f8bd 302c ldrh.w r3, [sp, #44] ; 0x2c
  1918. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1919. 8000d42: 9501 str r5, [sp, #4]
  1920. hi2c->XferCount = Size;
  1921. 8000d44: 8563 strh r3, [r4, #42] ; 0x2a
  1922. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1923. 8000d46: 4b2a ldr r3, [pc, #168] ; (8000df0 <HAL_I2C_Mem_Write+0x128>)
  1924. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1925. 8000d48: 9600 str r6, [sp, #0]
  1926. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1927. 8000d4a: 62e3 str r3, [r4, #44] ; 0x2c
  1928. hi2c->XferSize = hi2c->XferCount;
  1929. 8000d4c: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1930. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1931. 8000d4e: 464a mov r2, r9
  1932. hi2c->XferSize = hi2c->XferCount;
  1933. 8000d50: 8523 strh r3, [r4, #40] ; 0x28
  1934. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1935. 8000d52: 4653 mov r3, sl
  1936. 8000d54: f7ff fe18 bl 8000988 <I2C_RequestMemoryWrite>
  1937. 8000d58: 2800 cmp r0, #0
  1938. 8000d5a: d02a beq.n 8000db2 <HAL_I2C_Mem_Write+0xea>
  1939. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1940. 8000d5c: 6c23 ldr r3, [r4, #64] ; 0x40
  1941. __HAL_UNLOCK(hi2c);
  1942. 8000d5e: f884 703c strb.w r7, [r4, #60] ; 0x3c
  1943. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1944. 8000d62: 2b04 cmp r3, #4
  1945. 8000d64: d107 bne.n 8000d76 <HAL_I2C_Mem_Write+0xae>
  1946. return HAL_ERROR;
  1947. 8000d66: 2001 movs r0, #1
  1948. 8000d68: e7bd b.n 8000ce6 <HAL_I2C_Mem_Write+0x1e>
  1949. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1950. 8000d6a: f7ff fde7 bl 800093c <I2C_WaitOnTXEFlagUntilTimeout>
  1951. 8000d6e: b120 cbz r0, 8000d7a <HAL_I2C_Mem_Write+0xb2>
  1952. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1953. 8000d70: 6c23 ldr r3, [r4, #64] ; 0x40
  1954. 8000d72: 2b04 cmp r3, #4
  1955. 8000d74: d034 beq.n 8000de0 <HAL_I2C_Mem_Write+0x118>
  1956. return HAL_TIMEOUT;
  1957. 8000d76: 2003 movs r0, #3
  1958. 8000d78: e7b5 b.n 8000ce6 <HAL_I2C_Mem_Write+0x1e>
  1959. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1960. 8000d7a: 6a61 ldr r1, [r4, #36] ; 0x24
  1961. 8000d7c: 6827 ldr r7, [r4, #0]
  1962. 8000d7e: 1c4b adds r3, r1, #1
  1963. 8000d80: 6263 str r3, [r4, #36] ; 0x24
  1964. 8000d82: 780b ldrb r3, [r1, #0]
  1965. hi2c->XferSize--;
  1966. 8000d84: 8d22 ldrh r2, [r4, #40] ; 0x28
  1967. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1968. 8000d86: 613b str r3, [r7, #16]
  1969. hi2c->XferCount--;
  1970. 8000d88: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1971. hi2c->XferSize--;
  1972. 8000d8a: 1e50 subs r0, r2, #1
  1973. hi2c->XferCount--;
  1974. 8000d8c: 3b01 subs r3, #1
  1975. 8000d8e: b29b uxth r3, r3
  1976. 8000d90: 8563 strh r3, [r4, #42] ; 0x2a
  1977. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1978. 8000d92: 697b ldr r3, [r7, #20]
  1979. hi2c->XferSize--;
  1980. 8000d94: b280 uxth r0, r0
  1981. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1982. 8000d96: 075b lsls r3, r3, #29
  1983. hi2c->XferSize--;
  1984. 8000d98: 8520 strh r0, [r4, #40] ; 0x28
  1985. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1986. 8000d9a: d50a bpl.n 8000db2 <HAL_I2C_Mem_Write+0xea>
  1987. 8000d9c: b148 cbz r0, 8000db2 <HAL_I2C_Mem_Write+0xea>
  1988. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1989. 8000d9e: 1c8b adds r3, r1, #2
  1990. 8000da0: 6263 str r3, [r4, #36] ; 0x24
  1991. 8000da2: 784b ldrb r3, [r1, #1]
  1992. hi2c->XferSize--;
  1993. 8000da4: 3a02 subs r2, #2
  1994. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  1995. 8000da6: 613b str r3, [r7, #16]
  1996. hi2c->XferCount--;
  1997. 8000da8: 8d63 ldrh r3, [r4, #42] ; 0x2a
  1998. hi2c->XferSize--;
  1999. 8000daa: 8522 strh r2, [r4, #40] ; 0x28
  2000. hi2c->XferCount--;
  2001. 8000dac: 3b01 subs r3, #1
  2002. 8000dae: b29b uxth r3, r3
  2003. 8000db0: 8563 strh r3, [r4, #42] ; 0x2a
  2004. while(hi2c->XferSize > 0U)
  2005. 8000db2: 8d23 ldrh r3, [r4, #40] ; 0x28
  2006. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2007. 8000db4: 462a mov r2, r5
  2008. 8000db6: 4631 mov r1, r6
  2009. 8000db8: 4620 mov r0, r4
  2010. while(hi2c->XferSize > 0U)
  2011. 8000dba: 2b00 cmp r3, #0
  2012. 8000dbc: d1d5 bne.n 8000d6a <HAL_I2C_Mem_Write+0xa2>
  2013. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2014. 8000dbe: f7ff fedc bl 8000b7a <I2C_WaitOnBTFFlagUntilTimeout>
  2015. 8000dc2: 2800 cmp r0, #0
  2016. 8000dc4: d1d4 bne.n 8000d70 <HAL_I2C_Mem_Write+0xa8>
  2017. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2018. 8000dc6: 6822 ldr r2, [r4, #0]
  2019. 8000dc8: 6813 ldr r3, [r2, #0]
  2020. 8000dca: f443 7300 orr.w r3, r3, #512 ; 0x200
  2021. 8000dce: 6013 str r3, [r2, #0]
  2022. hi2c->State = HAL_I2C_STATE_READY;
  2023. 8000dd0: 2320 movs r3, #32
  2024. __HAL_UNLOCK(hi2c);
  2025. 8000dd2: f884 003c strb.w r0, [r4, #60] ; 0x3c
  2026. hi2c->State = HAL_I2C_STATE_READY;
  2027. 8000dd6: f884 303d strb.w r3, [r4, #61] ; 0x3d
  2028. hi2c->Mode = HAL_I2C_MODE_NONE;
  2029. 8000dda: f884 003e strb.w r0, [r4, #62] ; 0x3e
  2030. return HAL_OK;
  2031. 8000dde: e782 b.n 8000ce6 <HAL_I2C_Mem_Write+0x1e>
  2032. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2033. 8000de0: 6822 ldr r2, [r4, #0]
  2034. 8000de2: 6813 ldr r3, [r2, #0]
  2035. 8000de4: f443 7300 orr.w r3, r3, #512 ; 0x200
  2036. 8000de8: 6013 str r3, [r2, #0]
  2037. 8000dea: e7bc b.n 8000d66 <HAL_I2C_Mem_Write+0x9e>
  2038. 8000dec: 00100002 .word 0x00100002
  2039. 8000df0: ffff0000 .word 0xffff0000
  2040. 08000df4 <HAL_I2C_Mem_Read>:
  2041. {
  2042. 8000df4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  2043. 8000df8: 4604 mov r4, r0
  2044. 8000dfa: b086 sub sp, #24
  2045. 8000dfc: 469a mov sl, r3
  2046. 8000dfe: 460d mov r5, r1
  2047. 8000e00: 4691 mov r9, r2
  2048. 8000e02: 9f10 ldr r7, [sp, #64] ; 0x40
  2049. tickstart = HAL_GetTick();
  2050. 8000e04: f7ff fa40 bl 8000288 <HAL_GetTick>
  2051. if(hi2c->State == HAL_I2C_STATE_READY)
  2052. 8000e08: f894 303d ldrb.w r3, [r4, #61] ; 0x3d
  2053. tickstart = HAL_GetTick();
  2054. 8000e0c: 4606 mov r6, r0
  2055. if(hi2c->State == HAL_I2C_STATE_READY)
  2056. 8000e0e: 2b20 cmp r3, #32
  2057. 8000e10: d004 beq.n 8000e1c <HAL_I2C_Mem_Read+0x28>
  2058. return HAL_BUSY;
  2059. 8000e12: 2502 movs r5, #2
  2060. }
  2061. 8000e14: 4628 mov r0, r5
  2062. 8000e16: b006 add sp, #24
  2063. 8000e18: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  2064. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2065. 8000e1c: 9000 str r0, [sp, #0]
  2066. 8000e1e: 2319 movs r3, #25
  2067. 8000e20: 2201 movs r2, #1
  2068. 8000e22: 4981 ldr r1, [pc, #516] ; (8001028 <HAL_I2C_Mem_Read+0x234>)
  2069. 8000e24: 4620 mov r0, r4
  2070. 8000e26: f7ff fd5b bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  2071. 8000e2a: 2800 cmp r0, #0
  2072. 8000e2c: d1f1 bne.n 8000e12 <HAL_I2C_Mem_Read+0x1e>
  2073. __HAL_LOCK(hi2c);
  2074. 8000e2e: f894 303c ldrb.w r3, [r4, #60] ; 0x3c
  2075. 8000e32: 2b01 cmp r3, #1
  2076. 8000e34: d0ed beq.n 8000e12 <HAL_I2C_Mem_Read+0x1e>
  2077. 8000e36: 2301 movs r3, #1
  2078. 8000e38: f884 303c strb.w r3, [r4, #60] ; 0x3c
  2079. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2080. 8000e3c: 6823 ldr r3, [r4, #0]
  2081. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2082. 8000e3e: f04f 0800 mov.w r8, #0
  2083. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2084. 8000e42: 681a ldr r2, [r3, #0]
  2085. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2086. 8000e44: 4629 mov r1, r5
  2087. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2088. 8000e46: 07d2 lsls r2, r2, #31
  2089. __HAL_I2C_ENABLE(hi2c);
  2090. 8000e48: bf58 it pl
  2091. 8000e4a: 681a ldrpl r2, [r3, #0]
  2092. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2093. 8000e4c: 4620 mov r0, r4
  2094. __HAL_I2C_ENABLE(hi2c);
  2095. 8000e4e: bf5c itt pl
  2096. 8000e50: f042 0201 orrpl.w r2, r2, #1
  2097. 8000e54: 601a strpl r2, [r3, #0]
  2098. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2099. 8000e56: 681a ldr r2, [r3, #0]
  2100. 8000e58: f422 6200 bic.w r2, r2, #2048 ; 0x800
  2101. 8000e5c: 601a str r2, [r3, #0]
  2102. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2103. 8000e5e: 2322 movs r3, #34 ; 0x22
  2104. 8000e60: f884 303d strb.w r3, [r4, #61] ; 0x3d
  2105. hi2c->Mode = HAL_I2C_MODE_MEM;
  2106. 8000e64: 2340 movs r3, #64 ; 0x40
  2107. 8000e66: f884 303e strb.w r3, [r4, #62] ; 0x3e
  2108. hi2c->pBuffPtr = pData;
  2109. 8000e6a: 9b0e ldr r3, [sp, #56] ; 0x38
  2110. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2111. 8000e6c: f8c4 8040 str.w r8, [r4, #64] ; 0x40
  2112. hi2c->pBuffPtr = pData;
  2113. 8000e70: 6263 str r3, [r4, #36] ; 0x24
  2114. hi2c->XferCount = Size;
  2115. 8000e72: f8bd 303c ldrh.w r3, [sp, #60] ; 0x3c
  2116. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2117. 8000e76: 9601 str r6, [sp, #4]
  2118. hi2c->XferCount = Size;
  2119. 8000e78: 8563 strh r3, [r4, #42] ; 0x2a
  2120. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2121. 8000e7a: 4b6c ldr r3, [pc, #432] ; (800102c <HAL_I2C_Mem_Read+0x238>)
  2122. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2123. 8000e7c: 9700 str r7, [sp, #0]
  2124. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2125. 8000e7e: 62e3 str r3, [r4, #44] ; 0x2c
  2126. hi2c->XferSize = hi2c->XferCount;
  2127. 8000e80: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2128. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2129. 8000e82: 464a mov r2, r9
  2130. hi2c->XferSize = hi2c->XferCount;
  2131. 8000e84: 8523 strh r3, [r4, #40] ; 0x28
  2132. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2133. 8000e86: 4653 mov r3, sl
  2134. 8000e88: f7ff fdd0 bl 8000a2c <I2C_RequestMemoryRead>
  2135. 8000e8c: 4605 mov r5, r0
  2136. 8000e8e: b130 cbz r0, 8000e9e <HAL_I2C_Mem_Read+0xaa>
  2137. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2138. 8000e90: 6c23 ldr r3, [r4, #64] ; 0x40
  2139. __HAL_UNLOCK(hi2c);
  2140. 8000e92: f884 803c strb.w r8, [r4, #60] ; 0x3c
  2141. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2142. 8000e96: 2b04 cmp r3, #4
  2143. 8000e98: d13d bne.n 8000f16 <HAL_I2C_Mem_Read+0x122>
  2144. return HAL_ERROR;
  2145. 8000e9a: 2501 movs r5, #1
  2146. 8000e9c: e7ba b.n 8000e14 <HAL_I2C_Mem_Read+0x20>
  2147. if(hi2c->XferSize == 0U)
  2148. 8000e9e: 8d22 ldrh r2, [r4, #40] ; 0x28
  2149. 8000ea0: 6823 ldr r3, [r4, #0]
  2150. 8000ea2: b992 cbnz r2, 8000eca <HAL_I2C_Mem_Read+0xd6>
  2151. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2152. 8000ea4: 9002 str r0, [sp, #8]
  2153. 8000ea6: 695a ldr r2, [r3, #20]
  2154. 8000ea8: 9202 str r2, [sp, #8]
  2155. 8000eaa: 699a ldr r2, [r3, #24]
  2156. 8000eac: 9202 str r2, [sp, #8]
  2157. 8000eae: 9a02 ldr r2, [sp, #8]
  2158. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2159. 8000eb0: 681a ldr r2, [r3, #0]
  2160. 8000eb2: f442 7200 orr.w r2, r2, #512 ; 0x200
  2161. 8000eb6: 601a str r2, [r3, #0]
  2162. hi2c->State = HAL_I2C_STATE_READY;
  2163. 8000eb8: 2320 movs r3, #32
  2164. 8000eba: f884 303d strb.w r3, [r4, #61] ; 0x3d
  2165. hi2c->Mode = HAL_I2C_MODE_NONE;
  2166. 8000ebe: 2300 movs r3, #0
  2167. 8000ec0: f884 303e strb.w r3, [r4, #62] ; 0x3e
  2168. __HAL_UNLOCK(hi2c);
  2169. 8000ec4: f884 303c strb.w r3, [r4, #60] ; 0x3c
  2170. return HAL_OK;
  2171. 8000ec8: e7a4 b.n 8000e14 <HAL_I2C_Mem_Read+0x20>
  2172. else if(hi2c->XferSize == 1U)
  2173. 8000eca: 2a01 cmp r2, #1
  2174. 8000ecc: d125 bne.n 8000f1a <HAL_I2C_Mem_Read+0x126>
  2175. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2176. 8000ece: 681a ldr r2, [r3, #0]
  2177. 8000ed0: f422 6280 bic.w r2, r2, #1024 ; 0x400
  2178. 8000ed4: 601a str r2, [r3, #0]
  2179. \details Disables IRQ interrupts by setting the I-bit in the CPSR.
  2180. Can only be executed in Privileged modes.
  2181. */
  2182. __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
  2183. {
  2184. __ASM volatile ("cpsid i" : : : "memory");
  2185. 8000ed6: b672 cpsid i
  2186. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2187. 8000ed8: 6823 ldr r3, [r4, #0]
  2188. 8000eda: 9003 str r0, [sp, #12]
  2189. 8000edc: 695a ldr r2, [r3, #20]
  2190. 8000ede: 9203 str r2, [sp, #12]
  2191. 8000ee0: 699a ldr r2, [r3, #24]
  2192. 8000ee2: 9203 str r2, [sp, #12]
  2193. 8000ee4: 9a03 ldr r2, [sp, #12]
  2194. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2195. 8000ee6: 681a ldr r2, [r3, #0]
  2196. 8000ee8: f442 7200 orr.w r2, r2, #512 ; 0x200
  2197. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2198. 8000eec: 601a str r2, [r3, #0]
  2199. __ASM volatile ("cpsie i" : : : "memory");
  2200. 8000eee: b662 cpsie i
  2201. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2202. 8000ef0: f8df 813c ldr.w r8, [pc, #316] ; 8001030 <HAL_I2C_Mem_Read+0x23c>
  2203. while(hi2c->XferSize > 0U)
  2204. 8000ef4: 8d23 ldrh r3, [r4, #40] ; 0x28
  2205. 8000ef6: 2b00 cmp r3, #0
  2206. 8000ef8: d0de beq.n 8000eb8 <HAL_I2C_Mem_Read+0xc4>
  2207. if(hi2c->XferSize <= 3U)
  2208. 8000efa: 2b03 cmp r3, #3
  2209. 8000efc: d877 bhi.n 8000fee <HAL_I2C_Mem_Read+0x1fa>
  2210. if(hi2c->XferSize== 1U)
  2211. 8000efe: 2b01 cmp r3, #1
  2212. 8000f00: d127 bne.n 8000f52 <HAL_I2C_Mem_Read+0x15e>
  2213. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2214. 8000f02: 4632 mov r2, r6
  2215. 8000f04: 4639 mov r1, r7
  2216. 8000f06: 4620 mov r0, r4
  2217. 8000f08: f7ff fe0a bl 8000b20 <I2C_WaitOnRXNEFlagUntilTimeout>
  2218. 8000f0c: 2800 cmp r0, #0
  2219. 8000f0e: d03f beq.n 8000f90 <HAL_I2C_Mem_Read+0x19c>
  2220. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2221. 8000f10: 6c23 ldr r3, [r4, #64] ; 0x40
  2222. 8000f12: 2b20 cmp r3, #32
  2223. 8000f14: d1c1 bne.n 8000e9a <HAL_I2C_Mem_Read+0xa6>
  2224. return HAL_TIMEOUT;
  2225. 8000f16: 2503 movs r5, #3
  2226. 8000f18: e77c b.n 8000e14 <HAL_I2C_Mem_Read+0x20>
  2227. else if(hi2c->XferSize == 2U)
  2228. 8000f1a: 2a02 cmp r2, #2
  2229. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2230. 8000f1c: 681a ldr r2, [r3, #0]
  2231. else if(hi2c->XferSize == 2U)
  2232. 8000f1e: d10e bne.n 8000f3e <HAL_I2C_Mem_Read+0x14a>
  2233. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2234. 8000f20: f442 6200 orr.w r2, r2, #2048 ; 0x800
  2235. 8000f24: 601a str r2, [r3, #0]
  2236. __ASM volatile ("cpsid i" : : : "memory");
  2237. 8000f26: b672 cpsid i
  2238. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2239. 8000f28: 6823 ldr r3, [r4, #0]
  2240. 8000f2a: 9004 str r0, [sp, #16]
  2241. 8000f2c: 695a ldr r2, [r3, #20]
  2242. 8000f2e: 9204 str r2, [sp, #16]
  2243. 8000f30: 699a ldr r2, [r3, #24]
  2244. 8000f32: 9204 str r2, [sp, #16]
  2245. 8000f34: 9a04 ldr r2, [sp, #16]
  2246. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2247. 8000f36: 681a ldr r2, [r3, #0]
  2248. 8000f38: f422 6280 bic.w r2, r2, #1024 ; 0x400
  2249. 8000f3c: e7d6 b.n 8000eec <HAL_I2C_Mem_Read+0xf8>
  2250. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2251. 8000f3e: f442 6280 orr.w r2, r2, #1024 ; 0x400
  2252. 8000f42: 601a str r2, [r3, #0]
  2253. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2254. 8000f44: 9005 str r0, [sp, #20]
  2255. 8000f46: 695a ldr r2, [r3, #20]
  2256. 8000f48: 9205 str r2, [sp, #20]
  2257. 8000f4a: 699b ldr r3, [r3, #24]
  2258. 8000f4c: 9305 str r3, [sp, #20]
  2259. 8000f4e: 9b05 ldr r3, [sp, #20]
  2260. 8000f50: e7ce b.n 8000ef0 <HAL_I2C_Mem_Read+0xfc>
  2261. else if(hi2c->XferSize == 2U)
  2262. 8000f52: 2b02 cmp r3, #2
  2263. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2264. 8000f54: 9600 str r6, [sp, #0]
  2265. 8000f56: 463b mov r3, r7
  2266. 8000f58: f04f 0200 mov.w r2, #0
  2267. 8000f5c: 4641 mov r1, r8
  2268. 8000f5e: 4620 mov r0, r4
  2269. else if(hi2c->XferSize == 2U)
  2270. 8000f60: d124 bne.n 8000fac <HAL_I2C_Mem_Read+0x1b8>
  2271. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2272. 8000f62: f7ff fcbd bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  2273. 8000f66: 2800 cmp r0, #0
  2274. 8000f68: d1d5 bne.n 8000f16 <HAL_I2C_Mem_Read+0x122>
  2275. 8000f6a: b672 cpsid i
  2276. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2277. 8000f6c: 6823 ldr r3, [r4, #0]
  2278. 8000f6e: 681a ldr r2, [r3, #0]
  2279. 8000f70: f442 7200 orr.w r2, r2, #512 ; 0x200
  2280. 8000f74: 601a str r2, [r3, #0]
  2281. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2282. 8000f76: 6a62 ldr r2, [r4, #36] ; 0x24
  2283. 8000f78: 691b ldr r3, [r3, #16]
  2284. 8000f7a: 1c51 adds r1, r2, #1
  2285. 8000f7c: 6261 str r1, [r4, #36] ; 0x24
  2286. 8000f7e: 7013 strb r3, [r2, #0]
  2287. hi2c->XferSize--;
  2288. 8000f80: 8d23 ldrh r3, [r4, #40] ; 0x28
  2289. 8000f82: 3b01 subs r3, #1
  2290. 8000f84: 8523 strh r3, [r4, #40] ; 0x28
  2291. hi2c->XferCount--;
  2292. 8000f86: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2293. 8000f88: 3b01 subs r3, #1
  2294. 8000f8a: b29b uxth r3, r3
  2295. 8000f8c: 8563 strh r3, [r4, #42] ; 0x2a
  2296. __ASM volatile ("cpsie i" : : : "memory");
  2297. 8000f8e: b662 cpsie i
  2298. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2299. 8000f90: 6a63 ldr r3, [r4, #36] ; 0x24
  2300. 8000f92: 1c5a adds r2, r3, #1
  2301. 8000f94: 6262 str r2, [r4, #36] ; 0x24
  2302. 8000f96: 6822 ldr r2, [r4, #0]
  2303. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2304. 8000f98: 6912 ldr r2, [r2, #16]
  2305. 8000f9a: 701a strb r2, [r3, #0]
  2306. hi2c->XferSize--;
  2307. 8000f9c: 8d23 ldrh r3, [r4, #40] ; 0x28
  2308. 8000f9e: 3b01 subs r3, #1
  2309. 8000fa0: 8523 strh r3, [r4, #40] ; 0x28
  2310. hi2c->XferCount--;
  2311. 8000fa2: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2312. 8000fa4: 3b01 subs r3, #1
  2313. 8000fa6: b29b uxth r3, r3
  2314. 8000fa8: 8563 strh r3, [r4, #42] ; 0x2a
  2315. 8000faa: e7a3 b.n 8000ef4 <HAL_I2C_Mem_Read+0x100>
  2316. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2317. 8000fac: f7ff fc98 bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  2318. 8000fb0: 4602 mov r2, r0
  2319. 8000fb2: 2800 cmp r0, #0
  2320. 8000fb4: d1af bne.n 8000f16 <HAL_I2C_Mem_Read+0x122>
  2321. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2322. 8000fb6: 6821 ldr r1, [r4, #0]
  2323. 8000fb8: 680b ldr r3, [r1, #0]
  2324. 8000fba: f423 6380 bic.w r3, r3, #1024 ; 0x400
  2325. 8000fbe: 600b str r3, [r1, #0]
  2326. __ASM volatile ("cpsid i" : : : "memory");
  2327. 8000fc0: b672 cpsid i
  2328. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2329. 8000fc2: 6a63 ldr r3, [r4, #36] ; 0x24
  2330. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2331. 8000fc4: 4620 mov r0, r4
  2332. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2333. 8000fc6: 1c59 adds r1, r3, #1
  2334. 8000fc8: 6261 str r1, [r4, #36] ; 0x24
  2335. 8000fca: 6821 ldr r1, [r4, #0]
  2336. 8000fcc: 6909 ldr r1, [r1, #16]
  2337. 8000fce: 7019 strb r1, [r3, #0]
  2338. hi2c->XferSize--;
  2339. 8000fd0: 8d23 ldrh r3, [r4, #40] ; 0x28
  2340. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2341. 8000fd2: 9600 str r6, [sp, #0]
  2342. hi2c->XferSize--;
  2343. 8000fd4: 3b01 subs r3, #1
  2344. 8000fd6: 8523 strh r3, [r4, #40] ; 0x28
  2345. hi2c->XferCount--;
  2346. 8000fd8: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2347. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2348. 8000fda: 4641 mov r1, r8
  2349. hi2c->XferCount--;
  2350. 8000fdc: 3b01 subs r3, #1
  2351. 8000fde: b29b uxth r3, r3
  2352. 8000fe0: 8563 strh r3, [r4, #42] ; 0x2a
  2353. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2354. 8000fe2: 463b mov r3, r7
  2355. 8000fe4: f7ff fc7c bl 80008e0 <I2C_WaitOnFlagUntilTimeout>
  2356. 8000fe8: 2800 cmp r0, #0
  2357. 8000fea: d0bf beq.n 8000f6c <HAL_I2C_Mem_Read+0x178>
  2358. 8000fec: e793 b.n 8000f16 <HAL_I2C_Mem_Read+0x122>
  2359. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2360. 8000fee: 4632 mov r2, r6
  2361. 8000ff0: 4639 mov r1, r7
  2362. 8000ff2: 4620 mov r0, r4
  2363. 8000ff4: f7ff fd94 bl 8000b20 <I2C_WaitOnRXNEFlagUntilTimeout>
  2364. 8000ff8: 2800 cmp r0, #0
  2365. 8000ffa: d189 bne.n 8000f10 <HAL_I2C_Mem_Read+0x11c>
  2366. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2367. 8000ffc: 6a63 ldr r3, [r4, #36] ; 0x24
  2368. 8000ffe: 1c5a adds r2, r3, #1
  2369. 8001000: 6262 str r2, [r4, #36] ; 0x24
  2370. 8001002: 6822 ldr r2, [r4, #0]
  2371. 8001004: 6912 ldr r2, [r2, #16]
  2372. 8001006: 701a strb r2, [r3, #0]
  2373. hi2c->XferSize--;
  2374. 8001008: 8d23 ldrh r3, [r4, #40] ; 0x28
  2375. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2376. 800100a: 6822 ldr r2, [r4, #0]
  2377. hi2c->XferSize--;
  2378. 800100c: 3b01 subs r3, #1
  2379. 800100e: 8523 strh r3, [r4, #40] ; 0x28
  2380. hi2c->XferCount--;
  2381. 8001010: 8d63 ldrh r3, [r4, #42] ; 0x2a
  2382. 8001012: 3b01 subs r3, #1
  2383. 8001014: b29b uxth r3, r3
  2384. 8001016: 8563 strh r3, [r4, #42] ; 0x2a
  2385. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2386. 8001018: 6953 ldr r3, [r2, #20]
  2387. 800101a: 075b lsls r3, r3, #29
  2388. 800101c: f57f af6a bpl.w 8000ef4 <HAL_I2C_Mem_Read+0x100>
  2389. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2390. 8001020: 6a63 ldr r3, [r4, #36] ; 0x24
  2391. 8001022: 1c59 adds r1, r3, #1
  2392. 8001024: 6261 str r1, [r4, #36] ; 0x24
  2393. 8001026: e7b7 b.n 8000f98 <HAL_I2C_Mem_Read+0x1a4>
  2394. 8001028: 00100002 .word 0x00100002
  2395. 800102c: ffff0000 .word 0xffff0000
  2396. 8001030: 00010004 .word 0x00010004
  2397. 08001034 <HAL_I2C_MasterTxCpltCallback>:
  2398. 8001034: 4770 bx lr
  2399. 08001036 <HAL_I2C_MasterRxCpltCallback>:
  2400. 8001036: 4770 bx lr
  2401. 08001038 <HAL_I2C_SlaveTxCpltCallback>:
  2402. 8001038: 4770 bx lr
  2403. 0800103a <HAL_I2C_SlaveRxCpltCallback>:
  2404. 800103a: 4770 bx lr
  2405. 0800103c <HAL_I2C_AddrCallback>:
  2406. {
  2407. 800103c: 4770 bx lr
  2408. 0800103e <HAL_I2C_ListenCpltCallback>:
  2409. 800103e: 4770 bx lr
  2410. 08001040 <HAL_I2C_MemTxCpltCallback>:
  2411. 8001040: 4770 bx lr
  2412. 08001042 <HAL_I2C_MemRxCpltCallback>:
  2413. 8001042: 4770 bx lr
  2414. 08001044 <HAL_I2C_ErrorCallback>:
  2415. 8001044: 4770 bx lr
  2416. 08001046 <HAL_I2C_AbortCpltCallback>:
  2417. {
  2418. 8001046: 4770 bx lr
  2419. 08001048 <I2C_ITError>:
  2420. uint32_t CurrentState = hi2c->State;
  2421. 8001048: f890 303d ldrb.w r3, [r0, #61] ; 0x3d
  2422. {
  2423. 800104c: b510 push {r4, lr}
  2424. if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  2425. 800104e: 3b29 subs r3, #41 ; 0x29
  2426. 8001050: 2b01 cmp r3, #1
  2427. {
  2428. 8001052: 4604 mov r4, r0
  2429. 8001054: 6803 ldr r3, [r0, #0]
  2430. if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  2431. 8001056: d839 bhi.n 80010cc <I2C_ITError+0x84>
  2432. hi2c->PreviousState = I2C_STATE_NONE;
  2433. 8001058: 2200 movs r2, #0
  2434. 800105a: 6302 str r2, [r0, #48] ; 0x30
  2435. hi2c->State = HAL_I2C_STATE_LISTEN;
  2436. 800105c: 2228 movs r2, #40 ; 0x28
  2437. 800105e: f880 203d strb.w r2, [r0, #61] ; 0x3d
  2438. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2439. 8001062: 681a ldr r2, [r3, #0]
  2440. 8001064: f422 6200 bic.w r2, r2, #2048 ; 0x800
  2441. 8001068: 601a str r2, [r3, #0]
  2442. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  2443. 800106a: 685a ldr r2, [r3, #4]
  2444. 800106c: f412 6200 ands.w r2, r2, #2048 ; 0x800
  2445. 8001070: d054 beq.n 800111c <I2C_ITError+0xd4>
  2446. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  2447. 8001072: 685a ldr r2, [r3, #4]
  2448. if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  2449. 8001074: 6b60 ldr r0, [r4, #52] ; 0x34
  2450. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  2451. 8001076: f422 6200 bic.w r2, r2, #2048 ; 0x800
  2452. 800107a: 605a str r2, [r3, #4]
  2453. if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  2454. 800107c: f890 3021 ldrb.w r3, [r0, #33] ; 0x21
  2455. 8001080: 2b01 cmp r3, #1
  2456. 8001082: 4b39 ldr r3, [pc, #228] ; (8001168 <I2C_ITError+0x120>)
  2457. 8001084: d031 beq.n 80010ea <I2C_ITError+0xa2>
  2458. hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  2459. 8001086: 6343 str r3, [r0, #52] ; 0x34
  2460. if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  2461. 8001088: f7ff faa4 bl 80005d4 <HAL_DMA_Abort_IT>
  2462. 800108c: b150 cbz r0, 80010a4 <I2C_ITError+0x5c>
  2463. __HAL_I2C_DISABLE(hi2c);
  2464. 800108e: 6822 ldr r2, [r4, #0]
  2465. hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  2466. 8001090: 6b60 ldr r0, [r4, #52] ; 0x34
  2467. __HAL_I2C_DISABLE(hi2c);
  2468. 8001092: 6813 ldr r3, [r2, #0]
  2469. 8001094: f023 0301 bic.w r3, r3, #1
  2470. 8001098: 6013 str r3, [r2, #0]
  2471. hi2c->State = HAL_I2C_STATE_READY;
  2472. 800109a: 2320 movs r3, #32
  2473. 800109c: f884 303d strb.w r3, [r4, #61] ; 0x3d
  2474. hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  2475. 80010a0: 6b43 ldr r3, [r0, #52] ; 0x34
  2476. 80010a2: 4798 blx r3
  2477. if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
  2478. 80010a4: f894 303d ldrb.w r3, [r4, #61] ; 0x3d
  2479. 80010a8: 2b28 cmp r3, #40 ; 0x28
  2480. 80010aa: d10e bne.n 80010ca <I2C_ITError+0x82>
  2481. 80010ac: 6c23 ldr r3, [r4, #64] ; 0x40
  2482. 80010ae: 075b lsls r3, r3, #29
  2483. 80010b0: d50b bpl.n 80010ca <I2C_ITError+0x82>
  2484. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2485. 80010b2: 4b2e ldr r3, [pc, #184] ; (800116c <I2C_ITError+0x124>)
  2486. hi2c->State = HAL_I2C_STATE_READY;
  2487. 80010b4: 2220 movs r2, #32
  2488. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2489. 80010b6: 62e3 str r3, [r4, #44] ; 0x2c
  2490. hi2c->PreviousState = I2C_STATE_NONE;
  2491. 80010b8: 2300 movs r3, #0
  2492. HAL_I2C_ListenCpltCallback(hi2c);
  2493. 80010ba: 4620 mov r0, r4
  2494. hi2c->PreviousState = I2C_STATE_NONE;
  2495. 80010bc: 6323 str r3, [r4, #48] ; 0x30
  2496. hi2c->State = HAL_I2C_STATE_READY;
  2497. 80010be: f884 203d strb.w r2, [r4, #61] ; 0x3d
  2498. hi2c->Mode = HAL_I2C_MODE_NONE;
  2499. 80010c2: f884 303e strb.w r3, [r4, #62] ; 0x3e
  2500. HAL_I2C_ListenCpltCallback(hi2c);
  2501. 80010c6: f7ff ffba bl 800103e <HAL_I2C_ListenCpltCallback>
  2502. 80010ca: bd10 pop {r4, pc}
  2503. if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
  2504. 80010cc: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  2505. 80010d0: 2a60 cmp r2, #96 ; 0x60
  2506. 80010d2: d005 beq.n 80010e0 <I2C_ITError+0x98>
  2507. 80010d4: 685a ldr r2, [r3, #4]
  2508. 80010d6: 0512 lsls r2, r2, #20
  2509. hi2c->State = HAL_I2C_STATE_READY;
  2510. 80010d8: bf5c itt pl
  2511. 80010da: 2220 movpl r2, #32
  2512. 80010dc: f880 203d strbpl.w r2, [r0, #61] ; 0x3d
  2513. hi2c->PreviousState = I2C_STATE_NONE;
  2514. 80010e0: 2200 movs r2, #0
  2515. 80010e2: 6322 str r2, [r4, #48] ; 0x30
  2516. hi2c->Mode = HAL_I2C_MODE_NONE;
  2517. 80010e4: f884 203e strb.w r2, [r4, #62] ; 0x3e
  2518. 80010e8: e7bb b.n 8001062 <I2C_ITError+0x1a>
  2519. hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  2520. 80010ea: 6ba0 ldr r0, [r4, #56] ; 0x38
  2521. 80010ec: 6343 str r3, [r0, #52] ; 0x34
  2522. if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  2523. 80010ee: f7ff fa71 bl 80005d4 <HAL_DMA_Abort_IT>
  2524. 80010f2: 2800 cmp r0, #0
  2525. 80010f4: d0d6 beq.n 80010a4 <I2C_ITError+0x5c>
  2526. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  2527. 80010f6: 6822 ldr r2, [r4, #0]
  2528. 80010f8: 6953 ldr r3, [r2, #20]
  2529. 80010fa: 0658 lsls r0, r3, #25
  2530. 80010fc: d504 bpl.n 8001108 <I2C_ITError+0xc0>
  2531. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2532. 80010fe: 6a63 ldr r3, [r4, #36] ; 0x24
  2533. 8001100: 6912 ldr r2, [r2, #16]
  2534. 8001102: 1c59 adds r1, r3, #1
  2535. 8001104: 6261 str r1, [r4, #36] ; 0x24
  2536. 8001106: 701a strb r2, [r3, #0]
  2537. __HAL_I2C_DISABLE(hi2c);
  2538. 8001108: 6822 ldr r2, [r4, #0]
  2539. hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  2540. 800110a: 6ba0 ldr r0, [r4, #56] ; 0x38
  2541. __HAL_I2C_DISABLE(hi2c);
  2542. 800110c: 6813 ldr r3, [r2, #0]
  2543. 800110e: f023 0301 bic.w r3, r3, #1
  2544. 8001112: 6013 str r3, [r2, #0]
  2545. hi2c->State = HAL_I2C_STATE_READY;
  2546. 8001114: 2320 movs r3, #32
  2547. 8001116: f884 303d strb.w r3, [r4, #61] ; 0x3d
  2548. 800111a: e7c1 b.n 80010a0 <I2C_ITError+0x58>
  2549. else if(hi2c->State == HAL_I2C_STATE_ABORT)
  2550. 800111c: f894 103d ldrb.w r1, [r4, #61] ; 0x3d
  2551. 8001120: 2960 cmp r1, #96 ; 0x60
  2552. 8001122: d114 bne.n 800114e <I2C_ITError+0x106>
  2553. hi2c->State = HAL_I2C_STATE_READY;
  2554. 8001124: 2120 movs r1, #32
  2555. 8001126: f884 103d strb.w r1, [r4, #61] ; 0x3d
  2556. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2557. 800112a: 6422 str r2, [r4, #64] ; 0x40
  2558. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  2559. 800112c: 695a ldr r2, [r3, #20]
  2560. 800112e: 0651 lsls r1, r2, #25
  2561. 8001130: d504 bpl.n 800113c <I2C_ITError+0xf4>
  2562. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2563. 8001132: 6a62 ldr r2, [r4, #36] ; 0x24
  2564. 8001134: 691b ldr r3, [r3, #16]
  2565. 8001136: 1c51 adds r1, r2, #1
  2566. 8001138: 6261 str r1, [r4, #36] ; 0x24
  2567. 800113a: 7013 strb r3, [r2, #0]
  2568. __HAL_I2C_DISABLE(hi2c);
  2569. 800113c: 6822 ldr r2, [r4, #0]
  2570. HAL_I2C_AbortCpltCallback(hi2c);
  2571. 800113e: 4620 mov r0, r4
  2572. __HAL_I2C_DISABLE(hi2c);
  2573. 8001140: 6813 ldr r3, [r2, #0]
  2574. 8001142: f023 0301 bic.w r3, r3, #1
  2575. 8001146: 6013 str r3, [r2, #0]
  2576. HAL_I2C_AbortCpltCallback(hi2c);
  2577. 8001148: f7ff ff7d bl 8001046 <HAL_I2C_AbortCpltCallback>
  2578. 800114c: e7aa b.n 80010a4 <I2C_ITError+0x5c>
  2579. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  2580. 800114e: 695a ldr r2, [r3, #20]
  2581. 8001150: 0652 lsls r2, r2, #25
  2582. 8001152: d504 bpl.n 800115e <I2C_ITError+0x116>
  2583. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2584. 8001154: 6a62 ldr r2, [r4, #36] ; 0x24
  2585. 8001156: 691b ldr r3, [r3, #16]
  2586. 8001158: 1c51 adds r1, r2, #1
  2587. 800115a: 6261 str r1, [r4, #36] ; 0x24
  2588. 800115c: 7013 strb r3, [r2, #0]
  2589. HAL_I2C_ErrorCallback(hi2c);
  2590. 800115e: 4620 mov r0, r4
  2591. 8001160: f7ff ff70 bl 8001044 <HAL_I2C_ErrorCallback>
  2592. 8001164: e79e b.n 80010a4 <I2C_ITError+0x5c>
  2593. 8001166: bf00 nop
  2594. 8001168: 08001845 .word 0x08001845
  2595. 800116c: ffff0000 .word 0xffff0000
  2596. 08001170 <HAL_I2C_EV_IRQHandler>:
  2597. uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
  2598. 8001170: 6803 ldr r3, [r0, #0]
  2599. {
  2600. 8001172: b5f0 push {r4, r5, r6, r7, lr}
  2601. uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
  2602. 8001174: 699d ldr r5, [r3, #24]
  2603. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2604. 8001176: 6959 ldr r1, [r3, #20]
  2605. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2606. 8001178: 685a ldr r2, [r3, #4]
  2607. uint32_t CurrentMode = hi2c->Mode;
  2608. 800117a: f890 403e ldrb.w r4, [r0, #62] ; 0x3e
  2609. {
  2610. 800117e: b08d sub sp, #52 ; 0x34
  2611. uint32_t CurrentMode = hi2c->Mode;
  2612. 8001180: b2e4 uxtb r4, r4
  2613. if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  2614. 8001182: 2c10 cmp r4, #16
  2615. 8001184: d002 beq.n 800118c <HAL_I2C_EV_IRQHandler+0x1c>
  2616. 8001186: 2c40 cmp r4, #64 ; 0x40
  2617. 8001188: f040 8256 bne.w 8001638 <HAL_I2C_EV_IRQHandler+0x4c8>
  2618. if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2619. 800118c: f011 1f01 tst.w r1, #65537 ; 0x10001
  2620. 8001190: d066 beq.n 8001260 <HAL_I2C_EV_IRQHandler+0xf0>
  2621. 8001192: 0597 lsls r7, r2, #22
  2622. 8001194: d564 bpl.n 8001260 <HAL_I2C_EV_IRQHandler+0xf0>
  2623. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  2624. 8001196: f890 403e ldrb.w r4, [r0, #62] ; 0x3e
  2625. 800119a: 2c40 cmp r4, #64 ; 0x40
  2626. 800119c: d143 bne.n 8001226 <HAL_I2C_EV_IRQHandler+0xb6>
  2627. if(hi2c->EventCount == 0U)
  2628. 800119e: 6d04 ldr r4, [r0, #80] ; 0x50
  2629. 80011a0: 2c00 cmp r4, #0
  2630. 80011a2: d13b bne.n 800121c <HAL_I2C_EV_IRQHandler+0xac>
  2631. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  2632. 80011a4: 6c44 ldr r4, [r0, #68] ; 0x44
  2633. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  2634. 80011a6: f004 04fe and.w r4, r4, #254 ; 0xfe
  2635. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  2636. 80011aa: 611c str r4, [r3, #16]
  2637. if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2638. 80011ac: 4e94 ldr r6, [pc, #592] ; (8001400 <HAL_I2C_EV_IRQHandler+0x290>)
  2639. 80011ae: 4c95 ldr r4, [pc, #596] ; (8001404 <HAL_I2C_EV_IRQHandler+0x294>)
  2640. 80011b0: 402e ands r6, r5
  2641. 80011b2: 400c ands r4, r1
  2642. 80011b4: 2e00 cmp r6, #0
  2643. 80011b6: f000 81a2 beq.w 80014fe <HAL_I2C_EV_IRQHandler+0x38e>
  2644. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2645. 80011ba: 4d93 ldr r5, [pc, #588] ; (8001408 <HAL_I2C_EV_IRQHandler+0x298>)
  2646. 80011bc: 400d ands r5, r1
  2647. 80011be: 2d00 cmp r5, #0
  2648. 80011c0: f000 8169 beq.w 8001496 <HAL_I2C_EV_IRQHandler+0x326>
  2649. 80011c4: 0555 lsls r5, r2, #21
  2650. 80011c6: f140 8166 bpl.w 8001496 <HAL_I2C_EV_IRQHandler+0x326>
  2651. 80011ca: 2c00 cmp r4, #0
  2652. 80011cc: f040 8163 bne.w 8001496 <HAL_I2C_EV_IRQHandler+0x326>
  2653. uint32_t CurrentState = hi2c->State;
  2654. 80011d0: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  2655. if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  2656. 80011d4: 8d05 ldrh r5, [r0, #40] ; 0x28
  2657. uint32_t CurrentMode = hi2c->Mode;
  2658. 80011d6: f890 103e ldrb.w r1, [r0, #62] ; 0x3e
  2659. uint32_t CurrentState = hi2c->State;
  2660. 80011da: b2d2 uxtb r2, r2
  2661. uint32_t CurrentMode = hi2c->Mode;
  2662. 80011dc: b2c9 uxtb r1, r1
  2663. uint32_t CurrentXferOptions = hi2c->XferOptions;
  2664. 80011de: 6ac4 ldr r4, [r0, #44] ; 0x2c
  2665. if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  2666. 80011e0: 2d00 cmp r5, #0
  2667. 80011e2: f040 8117 bne.w 8001414 <HAL_I2C_EV_IRQHandler+0x2a4>
  2668. 80011e6: 2a21 cmp r2, #33 ; 0x21
  2669. 80011e8: f040 8116 bne.w 8001418 <HAL_I2C_EV_IRQHandler+0x2a8>
  2670. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  2671. 80011ec: 2c04 cmp r4, #4
  2672. 80011ee: f000 816f beq.w 80014d0 <HAL_I2C_EV_IRQHandler+0x360>
  2673. 80011f2: 2c08 cmp r4, #8
  2674. 80011f4: f000 816c beq.w 80014d0 <HAL_I2C_EV_IRQHandler+0x360>
  2675. 80011f8: f514 3f80 cmn.w r4, #65536 ; 0x10000
  2676. 80011fc: f000 8168 beq.w 80014d0 <HAL_I2C_EV_IRQHandler+0x360>
  2677. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2678. 8001200: 685a ldr r2, [r3, #4]
  2679. 8001202: f422 62e0 bic.w r2, r2, #1792 ; 0x700
  2680. 8001206: 605a str r2, [r3, #4]
  2681. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  2682. 8001208: 2311 movs r3, #17
  2683. 800120a: 6303 str r3, [r0, #48] ; 0x30
  2684. hi2c->Mode = HAL_I2C_MODE_NONE;
  2685. 800120c: f880 503e strb.w r5, [r0, #62] ; 0x3e
  2686. hi2c->State = HAL_I2C_STATE_READY;
  2687. 8001210: 2320 movs r3, #32
  2688. 8001212: f880 303d strb.w r3, [r0, #61] ; 0x3d
  2689. HAL_I2C_MasterTxCpltCallback(hi2c);
  2690. 8001216: f7ff ff0d bl 8001034 <HAL_I2C_MasterTxCpltCallback>
  2691. 800121a: e118 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  2692. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  2693. 800121c: 6c44 ldr r4, [r0, #68] ; 0x44
  2694. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  2695. 800121e: f044 0401 orr.w r4, r4, #1
  2696. 8001222: b2e4 uxtb r4, r4
  2697. 8001224: e7c1 b.n 80011aa <HAL_I2C_EV_IRQHandler+0x3a>
  2698. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  2699. 8001226: 6904 ldr r4, [r0, #16]
  2700. 8001228: f5b4 4f80 cmp.w r4, #16384 ; 0x4000
  2701. 800122c: d105 bne.n 800123a <HAL_I2C_EV_IRQHandler+0xca>
  2702. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  2703. 800122e: f890 403d ldrb.w r4, [r0, #61] ; 0x3d
  2704. 8001232: 2c21 cmp r4, #33 ; 0x21
  2705. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  2706. 8001234: 6c44 ldr r4, [r0, #68] ; 0x44
  2707. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  2708. 8001236: d1f2 bne.n 800121e <HAL_I2C_EV_IRQHandler+0xae>
  2709. 8001238: e7b5 b.n 80011a6 <HAL_I2C_EV_IRQHandler+0x36>
  2710. if(hi2c->EventCount == 0U)
  2711. 800123a: 6d04 ldr r4, [r0, #80] ; 0x50
  2712. 800123c: b934 cbnz r4, 800124c <HAL_I2C_EV_IRQHandler+0xdc>
  2713. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  2714. 800123e: 6c44 ldr r4, [r0, #68] ; 0x44
  2715. 8001240: 11e4 asrs r4, r4, #7
  2716. 8001242: f004 0406 and.w r4, r4, #6
  2717. 8001246: f044 04f0 orr.w r4, r4, #240 ; 0xf0
  2718. 800124a: e7ae b.n 80011aa <HAL_I2C_EV_IRQHandler+0x3a>
  2719. else if(hi2c->EventCount == 1U)
  2720. 800124c: 6d04 ldr r4, [r0, #80] ; 0x50
  2721. 800124e: 2c01 cmp r4, #1
  2722. 8001250: d1ac bne.n 80011ac <HAL_I2C_EV_IRQHandler+0x3c>
  2723. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  2724. 8001252: 6c44 ldr r4, [r0, #68] ; 0x44
  2725. 8001254: 11e4 asrs r4, r4, #7
  2726. 8001256: f004 0406 and.w r4, r4, #6
  2727. 800125a: f044 04f1 orr.w r4, r4, #241 ; 0xf1
  2728. 800125e: e7a4 b.n 80011aa <HAL_I2C_EV_IRQHandler+0x3a>
  2729. else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2730. 8001260: 4c6a ldr r4, [pc, #424] ; (800140c <HAL_I2C_EV_IRQHandler+0x29c>)
  2731. 8001262: 400c ands r4, r1
  2732. 8001264: b11c cbz r4, 800126e <HAL_I2C_EV_IRQHandler+0xfe>
  2733. 8001266: 0596 lsls r6, r2, #22
  2734. 8001268: d501 bpl.n 800126e <HAL_I2C_EV_IRQHandler+0xfe>
  2735. hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  2736. 800126a: 6c44 ldr r4, [r0, #68] ; 0x44
  2737. 800126c: e7d9 b.n 8001222 <HAL_I2C_EV_IRQHandler+0xb2>
  2738. else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2739. 800126e: 4c68 ldr r4, [pc, #416] ; (8001410 <HAL_I2C_EV_IRQHandler+0x2a0>)
  2740. 8001270: 400c ands r4, r1
  2741. 8001272: 2c00 cmp r4, #0
  2742. 8001274: d09a beq.n 80011ac <HAL_I2C_EV_IRQHandler+0x3c>
  2743. 8001276: 0594 lsls r4, r2, #22
  2744. 8001278: d598 bpl.n 80011ac <HAL_I2C_EV_IRQHandler+0x3c>
  2745. uint32_t CurrentMode = hi2c->Mode;
  2746. 800127a: f890 403e ldrb.w r4, [r0, #62] ; 0x3e
  2747. uint32_t CurrentXferOptions = hi2c->XferOptions;
  2748. 800127e: 6ac6 ldr r6, [r0, #44] ; 0x2c
  2749. uint32_t Prev_State = hi2c->PreviousState;
  2750. 8001280: f8d0 e030 ldr.w lr, [r0, #48] ; 0x30
  2751. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  2752. 8001284: f890 703d ldrb.w r7, [r0, #61] ; 0x3d
  2753. uint32_t CurrentMode = hi2c->Mode;
  2754. 8001288: b2e4 uxtb r4, r4
  2755. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  2756. 800128a: 2f22 cmp r7, #34 ; 0x22
  2757. 800128c: f040 80af bne.w 80013ee <HAL_I2C_EV_IRQHandler+0x27e>
  2758. if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  2759. 8001290: 6d07 ldr r7, [r0, #80] ; 0x50
  2760. 8001292: b947 cbnz r7, 80012a6 <HAL_I2C_EV_IRQHandler+0x136>
  2761. 8001294: 2c40 cmp r4, #64 ; 0x40
  2762. 8001296: d106 bne.n 80012a6 <HAL_I2C_EV_IRQHandler+0x136>
  2763. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2764. 8001298: 9700 str r7, [sp, #0]
  2765. 800129a: 695c ldr r4, [r3, #20]
  2766. 800129c: 9400 str r4, [sp, #0]
  2767. 800129e: 699c ldr r4, [r3, #24]
  2768. 80012a0: 9400 str r4, [sp, #0]
  2769. 80012a2: 9c00 ldr r4, [sp, #0]
  2770. 80012a4: e782 b.n 80011ac <HAL_I2C_EV_IRQHandler+0x3c>
  2771. else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  2772. 80012a6: 6d04 ldr r4, [r0, #80] ; 0x50
  2773. 80012a8: b98c cbnz r4, 80012ce <HAL_I2C_EV_IRQHandler+0x15e>
  2774. 80012aa: 6907 ldr r7, [r0, #16]
  2775. 80012ac: f5b7 4f40 cmp.w r7, #49152 ; 0xc000
  2776. 80012b0: d10d bne.n 80012ce <HAL_I2C_EV_IRQHandler+0x15e>
  2777. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2778. 80012b2: 9401 str r4, [sp, #4]
  2779. 80012b4: 695c ldr r4, [r3, #20]
  2780. 80012b6: 9401 str r4, [sp, #4]
  2781. 80012b8: 699c ldr r4, [r3, #24]
  2782. 80012ba: 9401 str r4, [sp, #4]
  2783. 80012bc: 9c01 ldr r4, [sp, #4]
  2784. hi2c->Instance->CR1 |= I2C_CR1_START;
  2785. 80012be: 681c ldr r4, [r3, #0]
  2786. 80012c0: f444 7480 orr.w r4, r4, #256 ; 0x100
  2787. 80012c4: 601c str r4, [r3, #0]
  2788. hi2c->EventCount++;
  2789. 80012c6: 6d04 ldr r4, [r0, #80] ; 0x50
  2790. 80012c8: 3401 adds r4, #1
  2791. hi2c->EventCount = 0U;
  2792. 80012ca: 6504 str r4, [r0, #80] ; 0x50
  2793. 80012cc: e76e b.n 80011ac <HAL_I2C_EV_IRQHandler+0x3c>
  2794. if(hi2c->XferCount == 0U)
  2795. 80012ce: 8d44 ldrh r4, [r0, #42] ; 0x2a
  2796. 80012d0: b2a4 uxth r4, r4
  2797. 80012d2: b954 cbnz r4, 80012ea <HAL_I2C_EV_IRQHandler+0x17a>
  2798. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2799. 80012d4: 9402 str r4, [sp, #8]
  2800. 80012d6: 695c ldr r4, [r3, #20]
  2801. 80012d8: 9402 str r4, [sp, #8]
  2802. 80012da: 699c ldr r4, [r3, #24]
  2803. 80012dc: 9402 str r4, [sp, #8]
  2804. 80012de: 9c02 ldr r4, [sp, #8]
  2805. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2806. 80012e0: 681c ldr r4, [r3, #0]
  2807. 80012e2: f444 7400 orr.w r4, r4, #512 ; 0x200
  2808. 80012e6: 601c str r4, [r3, #0]
  2809. 80012e8: e019 b.n 800131e <HAL_I2C_EV_IRQHandler+0x1ae>
  2810. else if(hi2c->XferCount == 1U)
  2811. 80012ea: 8d44 ldrh r4, [r0, #42] ; 0x2a
  2812. 80012ec: b2a4 uxth r4, r4
  2813. 80012ee: 2c01 cmp r4, #1
  2814. 80012f0: d142 bne.n 8001378 <HAL_I2C_EV_IRQHandler+0x208>
  2815. if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
  2816. 80012f2: f516 3f80 cmn.w r6, #65536 ; 0x10000
  2817. 80012f6: d11b bne.n 8001330 <HAL_I2C_EV_IRQHandler+0x1c0>
  2818. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2819. 80012f8: 681c ldr r4, [r3, #0]
  2820. 80012fa: f424 6480 bic.w r4, r4, #1024 ; 0x400
  2821. 80012fe: 601c str r4, [r3, #0]
  2822. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  2823. 8001300: 685c ldr r4, [r3, #4]
  2824. 8001302: f414 6400 ands.w r4, r4, #2048 ; 0x800
  2825. 8001306: d00c beq.n 8001322 <HAL_I2C_EV_IRQHandler+0x1b2>
  2826. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2827. 8001308: 681c ldr r4, [r3, #0]
  2828. 800130a: f424 6480 bic.w r4, r4, #1024 ; 0x400
  2829. 800130e: 601c str r4, [r3, #0]
  2830. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2831. 8001310: 2400 movs r4, #0
  2832. 8001312: 9403 str r4, [sp, #12]
  2833. 8001314: 695c ldr r4, [r3, #20]
  2834. 8001316: 9403 str r4, [sp, #12]
  2835. 8001318: 699c ldr r4, [r3, #24]
  2836. 800131a: 9403 str r4, [sp, #12]
  2837. 800131c: 9c03 ldr r4, [sp, #12]
  2838. hi2c->EventCount = 0U;
  2839. 800131e: 2400 movs r4, #0
  2840. 8001320: e7d3 b.n 80012ca <HAL_I2C_EV_IRQHandler+0x15a>
  2841. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2842. 8001322: 9404 str r4, [sp, #16]
  2843. 8001324: 695c ldr r4, [r3, #20]
  2844. 8001326: 9404 str r4, [sp, #16]
  2845. 8001328: 699c ldr r4, [r3, #24]
  2846. 800132a: 9404 str r4, [sp, #16]
  2847. 800132c: 9c04 ldr r4, [sp, #16]
  2848. 800132e: e7d7 b.n 80012e0 <HAL_I2C_EV_IRQHandler+0x170>
  2849. else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  2850. 8001330: 2e04 cmp r6, #4
  2851. 8001332: d015 beq.n 8001360 <HAL_I2C_EV_IRQHandler+0x1f0>
  2852. 8001334: 2e08 cmp r6, #8
  2853. 8001336: d013 beq.n 8001360 <HAL_I2C_EV_IRQHandler+0x1f0>
  2854. && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
  2855. 8001338: f1be 0f12 cmp.w lr, #18
  2856. 800133c: d010 beq.n 8001360 <HAL_I2C_EV_IRQHandler+0x1f0>
  2857. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  2858. 800133e: 6ac4 ldr r4, [r0, #44] ; 0x2c
  2859. 8001340: 2c02 cmp r4, #2
  2860. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2861. 8001342: 681c ldr r4, [r3, #0]
  2862. 8001344: bf14 ite ne
  2863. 8001346: f424 6480 bicne.w r4, r4, #1024 ; 0x400
  2864. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2865. 800134a: f444 6480 orreq.w r4, r4, #1024 ; 0x400
  2866. 800134e: 601c str r4, [r3, #0]
  2867. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2868. 8001350: 2400 movs r4, #0
  2869. 8001352: 9405 str r4, [sp, #20]
  2870. 8001354: 695c ldr r4, [r3, #20]
  2871. 8001356: 9405 str r4, [sp, #20]
  2872. 8001358: 699c ldr r4, [r3, #24]
  2873. 800135a: 9405 str r4, [sp, #20]
  2874. 800135c: 9c05 ldr r4, [sp, #20]
  2875. 800135e: e7de b.n 800131e <HAL_I2C_EV_IRQHandler+0x1ae>
  2876. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2877. 8001360: 681c ldr r4, [r3, #0]
  2878. 8001362: f424 6480 bic.w r4, r4, #1024 ; 0x400
  2879. 8001366: 601c str r4, [r3, #0]
  2880. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2881. 8001368: 2400 movs r4, #0
  2882. 800136a: 9406 str r4, [sp, #24]
  2883. 800136c: 695c ldr r4, [r3, #20]
  2884. 800136e: 9406 str r4, [sp, #24]
  2885. 8001370: 699c ldr r4, [r3, #24]
  2886. 8001372: 9406 str r4, [sp, #24]
  2887. 8001374: 9c06 ldr r4, [sp, #24]
  2888. 8001376: e7b3 b.n 80012e0 <HAL_I2C_EV_IRQHandler+0x170>
  2889. else if(hi2c->XferCount == 2U)
  2890. 8001378: 8d44 ldrh r4, [r0, #42] ; 0x2a
  2891. 800137a: b2a4 uxth r4, r4
  2892. 800137c: 2c02 cmp r4, #2
  2893. 800137e: d123 bne.n 80013c8 <HAL_I2C_EV_IRQHandler+0x258>
  2894. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  2895. 8001380: 6ac4 ldr r4, [r0, #44] ; 0x2c
  2896. 8001382: 2600 movs r6, #0
  2897. 8001384: 2c02 cmp r4, #2
  2898. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2899. 8001386: 681c ldr r4, [r3, #0]
  2900. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  2901. 8001388: d014 beq.n 80013b4 <HAL_I2C_EV_IRQHandler+0x244>
  2902. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2903. 800138a: f444 6400 orr.w r4, r4, #2048 ; 0x800
  2904. 800138e: 601c str r4, [r3, #0]
  2905. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2906. 8001390: 9607 str r6, [sp, #28]
  2907. 8001392: 695c ldr r4, [r3, #20]
  2908. 8001394: 9407 str r4, [sp, #28]
  2909. 8001396: 699c ldr r4, [r3, #24]
  2910. 8001398: 9407 str r4, [sp, #28]
  2911. 800139a: 9c07 ldr r4, [sp, #28]
  2912. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2913. 800139c: 681c ldr r4, [r3, #0]
  2914. 800139e: f424 6480 bic.w r4, r4, #1024 ; 0x400
  2915. 80013a2: 601c str r4, [r3, #0]
  2916. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  2917. 80013a4: 685c ldr r4, [r3, #4]
  2918. 80013a6: 0527 lsls r7, r4, #20
  2919. 80013a8: d5b9 bpl.n 800131e <HAL_I2C_EV_IRQHandler+0x1ae>
  2920. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  2921. 80013aa: 685c ldr r4, [r3, #4]
  2922. 80013ac: f444 5480 orr.w r4, r4, #4096 ; 0x1000
  2923. 80013b0: 605c str r4, [r3, #4]
  2924. 80013b2: e7b4 b.n 800131e <HAL_I2C_EV_IRQHandler+0x1ae>
  2925. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2926. 80013b4: f444 6480 orr.w r4, r4, #1024 ; 0x400
  2927. 80013b8: 601c str r4, [r3, #0]
  2928. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2929. 80013ba: 9608 str r6, [sp, #32]
  2930. 80013bc: 695c ldr r4, [r3, #20]
  2931. 80013be: 9408 str r4, [sp, #32]
  2932. 80013c0: 699c ldr r4, [r3, #24]
  2933. 80013c2: 9408 str r4, [sp, #32]
  2934. 80013c4: 9c08 ldr r4, [sp, #32]
  2935. 80013c6: e7ed b.n 80013a4 <HAL_I2C_EV_IRQHandler+0x234>
  2936. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2937. 80013c8: 681c ldr r4, [r3, #0]
  2938. 80013ca: f444 6480 orr.w r4, r4, #1024 ; 0x400
  2939. 80013ce: 601c str r4, [r3, #0]
  2940. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  2941. 80013d0: 685c ldr r4, [r3, #4]
  2942. 80013d2: 0526 lsls r6, r4, #20
  2943. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  2944. 80013d4: bf42 ittt mi
  2945. 80013d6: 685c ldrmi r4, [r3, #4]
  2946. 80013d8: f444 5480 orrmi.w r4, r4, #4096 ; 0x1000
  2947. 80013dc: 605c strmi r4, [r3, #4]
  2948. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2949. 80013de: 2400 movs r4, #0
  2950. 80013e0: 9409 str r4, [sp, #36] ; 0x24
  2951. 80013e2: 695c ldr r4, [r3, #20]
  2952. 80013e4: 9409 str r4, [sp, #36] ; 0x24
  2953. 80013e6: 699c ldr r4, [r3, #24]
  2954. 80013e8: 9409 str r4, [sp, #36] ; 0x24
  2955. 80013ea: 9c09 ldr r4, [sp, #36] ; 0x24
  2956. 80013ec: e797 b.n 800131e <HAL_I2C_EV_IRQHandler+0x1ae>
  2957. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2958. 80013ee: 2400 movs r4, #0
  2959. 80013f0: 940a str r4, [sp, #40] ; 0x28
  2960. 80013f2: 695c ldr r4, [r3, #20]
  2961. 80013f4: 940a str r4, [sp, #40] ; 0x28
  2962. 80013f6: 699c ldr r4, [r3, #24]
  2963. 80013f8: 940a str r4, [sp, #40] ; 0x28
  2964. 80013fa: 9c0a ldr r4, [sp, #40] ; 0x28
  2965. 80013fc: e6d6 b.n 80011ac <HAL_I2C_EV_IRQHandler+0x3c>
  2966. 80013fe: bf00 nop
  2967. 8001400: 00100004 .word 0x00100004
  2968. 8001404: 00010004 .word 0x00010004
  2969. 8001408: 00010080 .word 0x00010080
  2970. 800140c: 00010008 .word 0x00010008
  2971. 8001410: 00010002 .word 0x00010002
  2972. else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  2973. 8001414: 2a21 cmp r2, #33 ; 0x21
  2974. 8001416: d003 beq.n 8001420 <HAL_I2C_EV_IRQHandler+0x2b0>
  2975. 8001418: 2940 cmp r1, #64 ; 0x40
  2976. 800141a: d118 bne.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  2977. ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  2978. 800141c: 2a22 cmp r2, #34 ; 0x22
  2979. 800141e: d116 bne.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  2980. if(hi2c->XferCount == 0U)
  2981. 8001420: 8d42 ldrh r2, [r0, #42] ; 0x2a
  2982. 8001422: b292 uxth r2, r2
  2983. 8001424: b922 cbnz r2, 8001430 <HAL_I2C_EV_IRQHandler+0x2c0>
  2984. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  2985. 8001426: 685a ldr r2, [r3, #4]
  2986. 8001428: f422 6280 bic.w r2, r2, #1024 ; 0x400
  2987. 800142c: 605a str r2, [r3, #4]
  2988. 800142e: e00e b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  2989. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  2990. 8001430: f890 203e ldrb.w r2, [r0, #62] ; 0x3e
  2991. 8001434: 2a40 cmp r2, #64 ; 0x40
  2992. 8001436: d128 bne.n 800148a <HAL_I2C_EV_IRQHandler+0x31a>
  2993. if(hi2c->EventCount == 0)
  2994. 8001438: 6d02 ldr r2, [r0, #80] ; 0x50
  2995. 800143a: b982 cbnz r2, 800145e <HAL_I2C_EV_IRQHandler+0x2ee>
  2996. if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  2997. 800143c: 6cc2 ldr r2, [r0, #76] ; 0x4c
  2998. 800143e: 2a01 cmp r2, #1
  2999. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3000. 8001440: 6c82 ldr r2, [r0, #72] ; 0x48
  3001. if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  3002. 8001442: d106 bne.n 8001452 <HAL_I2C_EV_IRQHandler+0x2e2>
  3003. 8001444: b2d2 uxtb r2, r2
  3004. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3005. 8001446: 611a str r2, [r3, #16]
  3006. hi2c->EventCount += 2;
  3007. 8001448: 6d03 ldr r3, [r0, #80] ; 0x50
  3008. 800144a: 3302 adds r3, #2
  3009. hi2c->EventCount++;
  3010. 800144c: 6503 str r3, [r0, #80] ; 0x50
  3011. }
  3012. 800144e: b00d add sp, #52 ; 0x34
  3013. 8001450: bdf0 pop {r4, r5, r6, r7, pc}
  3014. hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  3015. 8001452: f3c2 2207 ubfx r2, r2, #8, #8
  3016. 8001456: 611a str r2, [r3, #16]
  3017. hi2c->EventCount++;
  3018. 8001458: 6d03 ldr r3, [r0, #80] ; 0x50
  3019. 800145a: 3301 adds r3, #1
  3020. 800145c: e7f6 b.n 800144c <HAL_I2C_EV_IRQHandler+0x2dc>
  3021. else if(hi2c->EventCount == 1)
  3022. 800145e: 6d02 ldr r2, [r0, #80] ; 0x50
  3023. 8001460: 2a01 cmp r2, #1
  3024. 8001462: d102 bne.n 800146a <HAL_I2C_EV_IRQHandler+0x2fa>
  3025. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3026. 8001464: 6c82 ldr r2, [r0, #72] ; 0x48
  3027. 8001466: b2d2 uxtb r2, r2
  3028. 8001468: e7f5 b.n 8001456 <HAL_I2C_EV_IRQHandler+0x2e6>
  3029. else if(hi2c->EventCount == 2)
  3030. 800146a: 6d02 ldr r2, [r0, #80] ; 0x50
  3031. 800146c: 2a02 cmp r2, #2
  3032. 800146e: d1ee bne.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3033. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3034. 8001470: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  3035. 8001474: 2a22 cmp r2, #34 ; 0x22
  3036. 8001476: d104 bne.n 8001482 <HAL_I2C_EV_IRQHandler+0x312>
  3037. hi2c->Instance->CR1 |= I2C_CR1_START;
  3038. 8001478: 681a ldr r2, [r3, #0]
  3039. 800147a: f442 7280 orr.w r2, r2, #256 ; 0x100
  3040. 800147e: 601a str r2, [r3, #0]
  3041. 8001480: e7e5 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3042. else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3043. 8001482: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  3044. 8001486: 2a21 cmp r2, #33 ; 0x21
  3045. 8001488: d1e1 bne.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3046. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3047. 800148a: 6a42 ldr r2, [r0, #36] ; 0x24
  3048. 800148c: 1c51 adds r1, r2, #1
  3049. 800148e: 6241 str r1, [r0, #36] ; 0x24
  3050. 8001490: 7812 ldrb r2, [r2, #0]
  3051. 8001492: 611a str r2, [r3, #16]
  3052. 8001494: e099 b.n 80015ca <HAL_I2C_EV_IRQHandler+0x45a>
  3053. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  3054. 8001496: 2c00 cmp r4, #0
  3055. 8001498: d0d9 beq.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3056. 800149a: 0594 lsls r4, r2, #22
  3057. 800149c: d5d7 bpl.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3058. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3059. 800149e: 6ac1 ldr r1, [r0, #44] ; 0x2c
  3060. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3061. 80014a0: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  3062. 80014a4: 2a21 cmp r2, #33 ; 0x21
  3063. 80014a6: d1d2 bne.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3064. if(hi2c->XferCount != 0U)
  3065. 80014a8: 8d42 ldrh r2, [r0, #42] ; 0x2a
  3066. 80014aa: b292 uxth r2, r2
  3067. 80014ac: 2a00 cmp r2, #0
  3068. 80014ae: d1ec bne.n 800148a <HAL_I2C_EV_IRQHandler+0x31a>
  3069. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3070. 80014b0: 2904 cmp r1, #4
  3071. 80014b2: d00d beq.n 80014d0 <HAL_I2C_EV_IRQHandler+0x360>
  3072. 80014b4: 2908 cmp r1, #8
  3073. 80014b6: d00b beq.n 80014d0 <HAL_I2C_EV_IRQHandler+0x360>
  3074. 80014b8: f511 3f80 cmn.w r1, #65536 ; 0x10000
  3075. 80014bc: d008 beq.n 80014d0 <HAL_I2C_EV_IRQHandler+0x360>
  3076. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3077. 80014be: 6859 ldr r1, [r3, #4]
  3078. 80014c0: f421 61e0 bic.w r1, r1, #1792 ; 0x700
  3079. 80014c4: 6059 str r1, [r3, #4]
  3080. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3081. 80014c6: 2311 movs r3, #17
  3082. 80014c8: 6303 str r3, [r0, #48] ; 0x30
  3083. hi2c->Mode = HAL_I2C_MODE_NONE;
  3084. 80014ca: f880 203e strb.w r2, [r0, #62] ; 0x3e
  3085. 80014ce: e69f b.n 8001210 <HAL_I2C_EV_IRQHandler+0xa0>
  3086. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3087. 80014d0: 685a ldr r2, [r3, #4]
  3088. 80014d2: f422 62e0 bic.w r2, r2, #1792 ; 0x700
  3089. 80014d6: 605a str r2, [r3, #4]
  3090. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3091. 80014d8: 681a ldr r2, [r3, #0]
  3092. 80014da: f442 7200 orr.w r2, r2, #512 ; 0x200
  3093. 80014de: 601a str r2, [r3, #0]
  3094. hi2c->PreviousState = I2C_STATE_NONE;
  3095. 80014e0: 2300 movs r3, #0
  3096. hi2c->State = HAL_I2C_STATE_READY;
  3097. 80014e2: 2220 movs r2, #32
  3098. hi2c->PreviousState = I2C_STATE_NONE;
  3099. 80014e4: 6303 str r3, [r0, #48] ; 0x30
  3100. hi2c->State = HAL_I2C_STATE_READY;
  3101. 80014e6: f880 203d strb.w r2, [r0, #61] ; 0x3d
  3102. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3103. 80014ea: f890 203e ldrb.w r2, [r0, #62] ; 0x3e
  3104. hi2c->Mode = HAL_I2C_MODE_NONE;
  3105. 80014ee: f880 303e strb.w r3, [r0, #62] ; 0x3e
  3106. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3107. 80014f2: 2a40 cmp r2, #64 ; 0x40
  3108. 80014f4: f47f ae8f bne.w 8001216 <HAL_I2C_EV_IRQHandler+0xa6>
  3109. HAL_I2C_MemTxCpltCallback(hi2c);
  3110. 80014f8: f7ff fda2 bl 8001040 <HAL_I2C_MemTxCpltCallback>
  3111. 80014fc: e7a7 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3112. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  3113. 80014fe: 4d8f ldr r5, [pc, #572] ; (800173c <HAL_I2C_EV_IRQHandler+0x5cc>)
  3114. 8001500: 400d ands r5, r1
  3115. 8001502: 2d00 cmp r5, #0
  3116. 8001504: d046 beq.n 8001594 <HAL_I2C_EV_IRQHandler+0x424>
  3117. 8001506: 0551 lsls r1, r2, #21
  3118. 8001508: d544 bpl.n 8001594 <HAL_I2C_EV_IRQHandler+0x424>
  3119. 800150a: 2c00 cmp r4, #0
  3120. 800150c: d142 bne.n 8001594 <HAL_I2C_EV_IRQHandler+0x424>
  3121. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3122. 800150e: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  3123. 8001512: 2a22 cmp r2, #34 ; 0x22
  3124. 8001514: d19b bne.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3125. tmp = hi2c->XferCount;
  3126. 8001516: 8d42 ldrh r2, [r0, #42] ; 0x2a
  3127. 8001518: b292 uxth r2, r2
  3128. if(tmp > 3U)
  3129. 800151a: 2a03 cmp r2, #3
  3130. 800151c: d905 bls.n 800152a <HAL_I2C_EV_IRQHandler+0x3ba>
  3131. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3132. 800151e: 6a42 ldr r2, [r0, #36] ; 0x24
  3133. 8001520: 691b ldr r3, [r3, #16]
  3134. 8001522: 1c51 adds r1, r2, #1
  3135. 8001524: 6241 str r1, [r0, #36] ; 0x24
  3136. 8001526: 7013 strb r3, [r2, #0]
  3137. 8001528: e04f b.n 80015ca <HAL_I2C_EV_IRQHandler+0x45a>
  3138. else if((tmp == 2U) || (tmp == 3U))
  3139. 800152a: 3a02 subs r2, #2
  3140. 800152c: 2a01 cmp r2, #1
  3141. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3142. 800152e: 6ac2 ldr r2, [r0, #44] ; 0x2c
  3143. else if((tmp == 2U) || (tmp == 3U))
  3144. 8001530: d80d bhi.n 800154e <HAL_I2C_EV_IRQHandler+0x3de>
  3145. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3146. 8001532: 2a02 cmp r2, #2
  3147. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3148. 8001534: 681a ldr r2, [r3, #0]
  3149. 8001536: bf1d ittte ne
  3150. 8001538: f422 6280 bicne.w r2, r2, #1024 ; 0x400
  3151. 800153c: 601a strne r2, [r3, #0]
  3152. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3153. 800153e: 681a ldrne r2, [r3, #0]
  3154. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3155. 8001540: f442 6280 orreq.w r2, r2, #1024 ; 0x400
  3156. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3157. 8001544: bf18 it ne
  3158. 8001546: f442 6200 orrne.w r2, r2, #2048 ; 0x800
  3159. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3160. 800154a: 601a str r2, [r3, #0]
  3161. 800154c: e76b b.n 8001426 <HAL_I2C_EV_IRQHandler+0x2b6>
  3162. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3163. 800154e: 2a02 cmp r2, #2
  3164. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3165. 8001550: 681a ldr r2, [r3, #0]
  3166. 8001552: bf14 ite ne
  3167. 8001554: f422 6280 bicne.w r2, r2, #1024 ; 0x400
  3168. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3169. 8001558: f442 6280 orreq.w r2, r2, #1024 ; 0x400
  3170. 800155c: 601a str r2, [r3, #0]
  3171. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3172. 800155e: 685a ldr r2, [r3, #4]
  3173. 8001560: f422 62e0 bic.w r2, r2, #1792 ; 0x700
  3174. 8001564: 605a str r2, [r3, #4]
  3175. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3176. 8001566: 6a42 ldr r2, [r0, #36] ; 0x24
  3177. 8001568: 691b ldr r3, [r3, #16]
  3178. 800156a: 1c51 adds r1, r2, #1
  3179. 800156c: 6241 str r1, [r0, #36] ; 0x24
  3180. 800156e: 7013 strb r3, [r2, #0]
  3181. hi2c->XferCount--;
  3182. 8001570: 8d43 ldrh r3, [r0, #42] ; 0x2a
  3183. 8001572: 3b01 subs r3, #1
  3184. 8001574: b29b uxth r3, r3
  3185. 8001576: 8543 strh r3, [r0, #42] ; 0x2a
  3186. hi2c->State = HAL_I2C_STATE_READY;
  3187. 8001578: 2320 movs r3, #32
  3188. 800157a: f880 303d strb.w r3, [r0, #61] ; 0x3d
  3189. hi2c->PreviousState = I2C_STATE_NONE;
  3190. 800157e: 2300 movs r3, #0
  3191. 8001580: 6303 str r3, [r0, #48] ; 0x30
  3192. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3193. 8001582: f890 203e ldrb.w r2, [r0, #62] ; 0x3e
  3194. hi2c->Mode = HAL_I2C_MODE_NONE;
  3195. 8001586: f880 303e strb.w r3, [r0, #62] ; 0x3e
  3196. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3197. 800158a: 2a40 cmp r2, #64 ; 0x40
  3198. 800158c: d151 bne.n 8001632 <HAL_I2C_EV_IRQHandler+0x4c2>
  3199. HAL_I2C_MemRxCpltCallback(hi2c);
  3200. 800158e: f7ff fd58 bl 8001042 <HAL_I2C_MemRxCpltCallback>
  3201. 8001592: e75c b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3202. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  3203. 8001594: 2c00 cmp r4, #0
  3204. 8001596: f43f af5a beq.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3205. 800159a: 0597 lsls r7, r2, #22
  3206. 800159c: f57f af57 bpl.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3207. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3208. 80015a0: 6ac2 ldr r2, [r0, #44] ; 0x2c
  3209. if(hi2c->XferCount == 3U)
  3210. 80015a2: 8d41 ldrh r1, [r0, #42] ; 0x2a
  3211. 80015a4: b289 uxth r1, r1
  3212. 80015a6: 2903 cmp r1, #3
  3213. 80015a8: 6a41 ldr r1, [r0, #36] ; 0x24
  3214. 80015aa: d113 bne.n 80015d4 <HAL_I2C_EV_IRQHandler+0x464>
  3215. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3216. 80015ac: 2a04 cmp r2, #4
  3217. 80015ae: d004 beq.n 80015ba <HAL_I2C_EV_IRQHandler+0x44a>
  3218. 80015b0: 2a08 cmp r2, #8
  3219. 80015b2: d002 beq.n 80015ba <HAL_I2C_EV_IRQHandler+0x44a>
  3220. 80015b4: f512 3f80 cmn.w r2, #65536 ; 0x10000
  3221. 80015b8: d103 bne.n 80015c2 <HAL_I2C_EV_IRQHandler+0x452>
  3222. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3223. 80015ba: 681a ldr r2, [r3, #0]
  3224. 80015bc: f422 6280 bic.w r2, r2, #1024 ; 0x400
  3225. 80015c0: 601a str r2, [r3, #0]
  3226. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3227. 80015c2: 691b ldr r3, [r3, #16]
  3228. 80015c4: 1c4a adds r2, r1, #1
  3229. 80015c6: 6242 str r2, [r0, #36] ; 0x24
  3230. 80015c8: 700b strb r3, [r1, #0]
  3231. hi2c->XferCount--;
  3232. 80015ca: 8d43 ldrh r3, [r0, #42] ; 0x2a
  3233. 80015cc: 3b01 subs r3, #1
  3234. 80015ce: b29b uxth r3, r3
  3235. 80015d0: 8543 strh r3, [r0, #42] ; 0x2a
  3236. }
  3237. 80015d2: e73c b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3238. else if(hi2c->XferCount == 2U)
  3239. 80015d4: 8d44 ldrh r4, [r0, #42] ; 0x2a
  3240. 80015d6: b2a4 uxth r4, r4
  3241. 80015d8: 2c02 cmp r4, #2
  3242. 80015da: d1f2 bne.n 80015c2 <HAL_I2C_EV_IRQHandler+0x452>
  3243. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3244. 80015dc: 2a04 cmp r2, #4
  3245. 80015de: d01f beq.n 8001620 <HAL_I2C_EV_IRQHandler+0x4b0>
  3246. 80015e0: 2a08 cmp r2, #8
  3247. 80015e2: d01d beq.n 8001620 <HAL_I2C_EV_IRQHandler+0x4b0>
  3248. 80015e4: f512 3f80 cmn.w r2, #65536 ; 0x10000
  3249. 80015e8: d01a beq.n 8001620 <HAL_I2C_EV_IRQHandler+0x4b0>
  3250. if(CurrentXferOptions != I2C_NEXT_FRAME)
  3251. 80015ea: 2a02 cmp r2, #2
  3252. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3253. 80015ec: 681a ldr r2, [r3, #0]
  3254. 80015ee: bf14 ite ne
  3255. 80015f0: f422 6280 bicne.w r2, r2, #1024 ; 0x400
  3256. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3257. 80015f4: f442 6280 orreq.w r2, r2, #1024 ; 0x400
  3258. 80015f8: 601a str r2, [r3, #0]
  3259. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3260. 80015fa: 685a ldr r2, [r3, #4]
  3261. 80015fc: f422 7240 bic.w r2, r2, #768 ; 0x300
  3262. 8001600: 605a str r2, [r3, #4]
  3263. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3264. 8001602: 691b ldr r3, [r3, #16]
  3265. 8001604: 1c4a adds r2, r1, #1
  3266. 8001606: 6242 str r2, [r0, #36] ; 0x24
  3267. 8001608: 700b strb r3, [r1, #0]
  3268. hi2c->XferCount--;
  3269. 800160a: 8d43 ldrh r3, [r0, #42] ; 0x2a
  3270. 800160c: 3b01 subs r3, #1
  3271. 800160e: b29b uxth r3, r3
  3272. 8001610: 8543 strh r3, [r0, #42] ; 0x2a
  3273. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3274. 8001612: 6a43 ldr r3, [r0, #36] ; 0x24
  3275. 8001614: 1c5a adds r2, r3, #1
  3276. 8001616: 6242 str r2, [r0, #36] ; 0x24
  3277. 8001618: 6802 ldr r2, [r0, #0]
  3278. 800161a: 6912 ldr r2, [r2, #16]
  3279. 800161c: 701a strb r2, [r3, #0]
  3280. 800161e: e7a7 b.n 8001570 <HAL_I2C_EV_IRQHandler+0x400>
  3281. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3282. 8001620: 685a ldr r2, [r3, #4]
  3283. 8001622: f422 7240 bic.w r2, r2, #768 ; 0x300
  3284. 8001626: 605a str r2, [r3, #4]
  3285. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3286. 8001628: 681a ldr r2, [r3, #0]
  3287. 800162a: f442 7200 orr.w r2, r2, #512 ; 0x200
  3288. 800162e: 601a str r2, [r3, #0]
  3289. 8001630: e7e7 b.n 8001602 <HAL_I2C_EV_IRQHandler+0x492>
  3290. HAL_I2C_MasterRxCpltCallback(hi2c);
  3291. 8001632: f7ff fd00 bl 8001036 <HAL_I2C_MasterRxCpltCallback>
  3292. 8001636: e70a b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3293. if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  3294. 8001638: 4c41 ldr r4, [pc, #260] ; (8001740 <HAL_I2C_EV_IRQHandler+0x5d0>)
  3295. 800163a: 400c ands r4, r1
  3296. 800163c: b174 cbz r4, 800165c <HAL_I2C_EV_IRQHandler+0x4ec>
  3297. 800163e: 0596 lsls r6, r2, #22
  3298. 8001640: d50c bpl.n 800165c <HAL_I2C_EV_IRQHandler+0x4ec>
  3299. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
  3300. 8001642: 6999 ldr r1, [r3, #24]
  3301. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
  3302. 8001644: 699b ldr r3, [r3, #24]
  3303. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
  3304. 8001646: f081 0104 eor.w r1, r1, #4
  3305. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
  3306. 800164a: 061d lsls r5, r3, #24
  3307. uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  3308. 800164c: f3c1 0180 ubfx r1, r1, #2, #1
  3309. SlaveAddrCode = hi2c->Init.OwnAddress1;
  3310. 8001650: bf54 ite pl
  3311. 8001652: 8982 ldrhpl r2, [r0, #12]
  3312. SlaveAddrCode = hi2c->Init.OwnAddress2;
  3313. 8001654: 8b02 ldrhmi r2, [r0, #24]
  3314. HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3315. 8001656: f7ff fcf1 bl 800103c <HAL_I2C_AddrCallback>
  3316. 800165a: e6f8 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3317. else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  3318. 800165c: 4c39 ldr r4, [pc, #228] ; (8001744 <HAL_I2C_EV_IRQHandler+0x5d4>)
  3319. 800165e: 400c ands r4, r1
  3320. 8001660: 2c00 cmp r4, #0
  3321. 8001662: d073 beq.n 800174c <HAL_I2C_EV_IRQHandler+0x5dc>
  3322. 8001664: 0594 lsls r4, r2, #22
  3323. 8001666: d571 bpl.n 800174c <HAL_I2C_EV_IRQHandler+0x5dc>
  3324. uint32_t CurrentState = hi2c->State;
  3325. 8001668: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  3326. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3327. 800166c: 6859 ldr r1, [r3, #4]
  3328. uint32_t CurrentState = hi2c->State;
  3329. 800166e: b2d2 uxtb r2, r2
  3330. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3331. 8001670: f421 61e0 bic.w r1, r1, #1792 ; 0x700
  3332. 8001674: 6059 str r1, [r3, #4]
  3333. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  3334. 8001676: 2100 movs r1, #0
  3335. 8001678: 910b str r1, [sp, #44] ; 0x2c
  3336. 800167a: 6959 ldr r1, [r3, #20]
  3337. 800167c: 910b str r1, [sp, #44] ; 0x2c
  3338. 800167e: 6819 ldr r1, [r3, #0]
  3339. 8001680: f041 0101 orr.w r1, r1, #1
  3340. 8001684: 6019 str r1, [r3, #0]
  3341. 8001686: 990b ldr r1, [sp, #44] ; 0x2c
  3342. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3343. 8001688: 6819 ldr r1, [r3, #0]
  3344. 800168a: f421 6180 bic.w r1, r1, #1024 ; 0x400
  3345. 800168e: 6019 str r1, [r3, #0]
  3346. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3347. 8001690: 6859 ldr r1, [r3, #4]
  3348. 8001692: 0509 lsls r1, r1, #20
  3349. 8001694: d50c bpl.n 80016b0 <HAL_I2C_EV_IRQHandler+0x540>
  3350. if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3351. 8001696: f890 103d ldrb.w r1, [r0, #61] ; 0x3d
  3352. 800169a: 2922 cmp r1, #34 ; 0x22
  3353. 800169c: d003 beq.n 80016a6 <HAL_I2C_EV_IRQHandler+0x536>
  3354. 800169e: f890 103d ldrb.w r1, [r0, #61] ; 0x3d
  3355. 80016a2: 292a cmp r1, #42 ; 0x2a
  3356. 80016a4: d129 bne.n 80016fa <HAL_I2C_EV_IRQHandler+0x58a>
  3357. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
  3358. 80016a6: 6b81 ldr r1, [r0, #56] ; 0x38
  3359. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
  3360. 80016a8: 6809 ldr r1, [r1, #0]
  3361. 80016aa: 6849 ldr r1, [r1, #4]
  3362. 80016ac: b289 uxth r1, r1
  3363. 80016ae: 8541 strh r1, [r0, #42] ; 0x2a
  3364. if(hi2c->XferCount != 0U)
  3365. 80016b0: 8d41 ldrh r1, [r0, #42] ; 0x2a
  3366. 80016b2: b289 uxth r1, r1
  3367. 80016b4: b1e1 cbz r1, 80016f0 <HAL_I2C_EV_IRQHandler+0x580>
  3368. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  3369. 80016b6: 6959 ldr r1, [r3, #20]
  3370. 80016b8: 074f lsls r7, r1, #29
  3371. 80016ba: d508 bpl.n 80016ce <HAL_I2C_EV_IRQHandler+0x55e>
  3372. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3373. 80016bc: 6a41 ldr r1, [r0, #36] ; 0x24
  3374. 80016be: 691b ldr r3, [r3, #16]
  3375. 80016c0: 1c4c adds r4, r1, #1
  3376. 80016c2: 6244 str r4, [r0, #36] ; 0x24
  3377. 80016c4: 700b strb r3, [r1, #0]
  3378. hi2c->XferCount--;
  3379. 80016c6: 8d43 ldrh r3, [r0, #42] ; 0x2a
  3380. 80016c8: 3b01 subs r3, #1
  3381. 80016ca: b29b uxth r3, r3
  3382. 80016cc: 8543 strh r3, [r0, #42] ; 0x2a
  3383. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3384. 80016ce: 6801 ldr r1, [r0, #0]
  3385. 80016d0: 694b ldr r3, [r1, #20]
  3386. 80016d2: 065e lsls r6, r3, #25
  3387. 80016d4: d508 bpl.n 80016e8 <HAL_I2C_EV_IRQHandler+0x578>
  3388. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3389. 80016d6: 6a43 ldr r3, [r0, #36] ; 0x24
  3390. 80016d8: 6909 ldr r1, [r1, #16]
  3391. 80016da: 1c5c adds r4, r3, #1
  3392. 80016dc: 6244 str r4, [r0, #36] ; 0x24
  3393. 80016de: 7019 strb r1, [r3, #0]
  3394. hi2c->XferCount--;
  3395. 80016e0: 8d43 ldrh r3, [r0, #42] ; 0x2a
  3396. 80016e2: 3b01 subs r3, #1
  3397. 80016e4: b29b uxth r3, r3
  3398. 80016e6: 8543 strh r3, [r0, #42] ; 0x2a
  3399. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  3400. 80016e8: 6c03 ldr r3, [r0, #64] ; 0x40
  3401. 80016ea: f043 0304 orr.w r3, r3, #4
  3402. 80016ee: 6403 str r3, [r0, #64] ; 0x40
  3403. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  3404. 80016f0: 6c03 ldr r3, [r0, #64] ; 0x40
  3405. 80016f2: b123 cbz r3, 80016fe <HAL_I2C_EV_IRQHandler+0x58e>
  3406. I2C_ITError(hi2c);
  3407. 80016f4: f7ff fca8 bl 8001048 <I2C_ITError>
  3408. 80016f8: e6a9 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3409. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
  3410. 80016fa: 6b41 ldr r1, [r0, #52] ; 0x34
  3411. 80016fc: e7d4 b.n 80016a8 <HAL_I2C_EV_IRQHandler+0x538>
  3412. if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
  3413. 80016fe: f1a2 0128 sub.w r1, r2, #40 ; 0x28
  3414. 8001702: 2902 cmp r1, #2
  3415. 8001704: d80a bhi.n 800171c <HAL_I2C_EV_IRQHandler+0x5ac>
  3416. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3417. 8001706: 4a10 ldr r2, [pc, #64] ; (8001748 <HAL_I2C_EV_IRQHandler+0x5d8>)
  3418. 8001708: 62c2 str r2, [r0, #44] ; 0x2c
  3419. hi2c->State = HAL_I2C_STATE_READY;
  3420. 800170a: 2220 movs r2, #32
  3421. hi2c->PreviousState = I2C_STATE_NONE;
  3422. 800170c: 6303 str r3, [r0, #48] ; 0x30
  3423. hi2c->State = HAL_I2C_STATE_READY;
  3424. 800170e: f880 203d strb.w r2, [r0, #61] ; 0x3d
  3425. hi2c->Mode = HAL_I2C_MODE_NONE;
  3426. 8001712: f880 303e strb.w r3, [r0, #62] ; 0x3e
  3427. HAL_I2C_ListenCpltCallback(hi2c);
  3428. 8001716: f7ff fc92 bl 800103e <HAL_I2C_ListenCpltCallback>
  3429. 800171a: e698 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3430. if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3431. 800171c: 6b03 ldr r3, [r0, #48] ; 0x30
  3432. 800171e: 2b22 cmp r3, #34 ; 0x22
  3433. 8001720: d002 beq.n 8001728 <HAL_I2C_EV_IRQHandler+0x5b8>
  3434. 8001722: 2a22 cmp r2, #34 ; 0x22
  3435. 8001724: f47f ae93 bne.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3436. hi2c->PreviousState = I2C_STATE_NONE;
  3437. 8001728: 2300 movs r3, #0
  3438. hi2c->State = HAL_I2C_STATE_READY;
  3439. 800172a: 2220 movs r2, #32
  3440. hi2c->PreviousState = I2C_STATE_NONE;
  3441. 800172c: 6303 str r3, [r0, #48] ; 0x30
  3442. hi2c->State = HAL_I2C_STATE_READY;
  3443. 800172e: f880 203d strb.w r2, [r0, #61] ; 0x3d
  3444. hi2c->Mode = HAL_I2C_MODE_NONE;
  3445. 8001732: f880 303e strb.w r3, [r0, #62] ; 0x3e
  3446. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3447. 8001736: f7ff fc80 bl 800103a <HAL_I2C_SlaveRxCpltCallback>
  3448. 800173a: e688 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3449. 800173c: 00010040 .word 0x00010040
  3450. 8001740: 00010002 .word 0x00010002
  3451. 8001744: 00010010 .word 0x00010010
  3452. 8001748: ffff0000 .word 0xffff0000
  3453. else if((sr2itflags & I2C_FLAG_TRA) != RESET)
  3454. 800174c: 4e39 ldr r6, [pc, #228] ; (8001834 <HAL_I2C_EV_IRQHandler+0x6c4>)
  3455. 800174e: 4c3a ldr r4, [pc, #232] ; (8001838 <HAL_I2C_EV_IRQHandler+0x6c8>)
  3456. 8001750: 402e ands r6, r5
  3457. 8001752: 400c ands r4, r1
  3458. 8001754: 2e00 cmp r6, #0
  3459. 8001756: d036 beq.n 80017c6 <HAL_I2C_EV_IRQHandler+0x656>
  3460. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  3461. 8001758: 4d38 ldr r5, [pc, #224] ; (800183c <HAL_I2C_EV_IRQHandler+0x6cc>)
  3462. 800175a: 400d ands r5, r1
  3463. 800175c: b33d cbz r5, 80017ae <HAL_I2C_EV_IRQHandler+0x63e>
  3464. 800175e: 0555 lsls r5, r2, #21
  3465. 8001760: d525 bpl.n 80017ae <HAL_I2C_EV_IRQHandler+0x63e>
  3466. 8001762: bb24 cbnz r4, 80017ae <HAL_I2C_EV_IRQHandler+0x63e>
  3467. uint32_t CurrentState = hi2c->State;
  3468. 8001764: f890 103d ldrb.w r1, [r0, #61] ; 0x3d
  3469. if(hi2c->XferCount != 0U)
  3470. 8001768: 8d42 ldrh r2, [r0, #42] ; 0x2a
  3471. uint32_t CurrentState = hi2c->State;
  3472. 800176a: b2c9 uxtb r1, r1
  3473. if(hi2c->XferCount != 0U)
  3474. 800176c: b292 uxth r2, r2
  3475. 800176e: 2a00 cmp r2, #0
  3476. 8001770: f43f ae6d beq.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3477. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3478. 8001774: 6a42 ldr r2, [r0, #36] ; 0x24
  3479. 8001776: 1c54 adds r4, r2, #1
  3480. 8001778: 6244 str r4, [r0, #36] ; 0x24
  3481. 800177a: 7812 ldrb r2, [r2, #0]
  3482. 800177c: 611a str r2, [r3, #16]
  3483. hi2c->XferCount--;
  3484. 800177e: 8d42 ldrh r2, [r0, #42] ; 0x2a
  3485. 8001780: 3a01 subs r2, #1
  3486. 8001782: b292 uxth r2, r2
  3487. 8001784: 8542 strh r2, [r0, #42] ; 0x2a
  3488. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3489. 8001786: 8d42 ldrh r2, [r0, #42] ; 0x2a
  3490. 8001788: b292 uxth r2, r2
  3491. 800178a: 2a00 cmp r2, #0
  3492. 800178c: f47f ae5f bne.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3493. 8001790: 2929 cmp r1, #41 ; 0x29
  3494. 8001792: f47f ae5c bne.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3495. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3496. 8001796: 685a ldr r2, [r3, #4]
  3497. 8001798: f422 6280 bic.w r2, r2, #1024 ; 0x400
  3498. 800179c: 605a str r2, [r3, #4]
  3499. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3500. 800179e: 2321 movs r3, #33 ; 0x21
  3501. 80017a0: 6303 str r3, [r0, #48] ; 0x30
  3502. hi2c->State = HAL_I2C_STATE_LISTEN;
  3503. 80017a2: 2328 movs r3, #40 ; 0x28
  3504. 80017a4: f880 303d strb.w r3, [r0, #61] ; 0x3d
  3505. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3506. 80017a8: f7ff fc46 bl 8001038 <HAL_I2C_SlaveTxCpltCallback>
  3507. 80017ac: e64f b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3508. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  3509. 80017ae: 2c00 cmp r4, #0
  3510. 80017b0: f43f ae4d beq.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3511. 80017b4: 0594 lsls r4, r2, #22
  3512. 80017b6: f57f ae4a bpl.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3513. if(hi2c->XferCount != 0U)
  3514. 80017ba: 8d42 ldrh r2, [r0, #42] ; 0x2a
  3515. 80017bc: b292 uxth r2, r2
  3516. 80017be: 2a00 cmp r2, #0
  3517. 80017c0: f47f ae63 bne.w 800148a <HAL_I2C_EV_IRQHandler+0x31a>
  3518. 80017c4: e643 b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3519. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  3520. 80017c6: 4d1e ldr r5, [pc, #120] ; (8001840 <HAL_I2C_EV_IRQHandler+0x6d0>)
  3521. 80017c8: 400d ands r5, r1
  3522. 80017ca: b335 cbz r5, 800181a <HAL_I2C_EV_IRQHandler+0x6aa>
  3523. 80017cc: 0551 lsls r1, r2, #21
  3524. 80017ce: d524 bpl.n 800181a <HAL_I2C_EV_IRQHandler+0x6aa>
  3525. 80017d0: bb1c cbnz r4, 800181a <HAL_I2C_EV_IRQHandler+0x6aa>
  3526. uint32_t CurrentState = hi2c->State;
  3527. 80017d2: f890 203d ldrb.w r2, [r0, #61] ; 0x3d
  3528. if(hi2c->XferCount != 0U)
  3529. 80017d6: 8d41 ldrh r1, [r0, #42] ; 0x2a
  3530. uint32_t CurrentState = hi2c->State;
  3531. 80017d8: b2d2 uxtb r2, r2
  3532. if(hi2c->XferCount != 0U)
  3533. 80017da: b289 uxth r1, r1
  3534. 80017dc: 2900 cmp r1, #0
  3535. 80017de: f43f ae36 beq.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3536. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3537. 80017e2: 6a41 ldr r1, [r0, #36] ; 0x24
  3538. 80017e4: 691b ldr r3, [r3, #16]
  3539. 80017e6: 1c4c adds r4, r1, #1
  3540. 80017e8: 6244 str r4, [r0, #36] ; 0x24
  3541. 80017ea: 700b strb r3, [r1, #0]
  3542. hi2c->XferCount--;
  3543. 80017ec: 8d43 ldrh r3, [r0, #42] ; 0x2a
  3544. 80017ee: 3b01 subs r3, #1
  3545. 80017f0: b29b uxth r3, r3
  3546. 80017f2: 8543 strh r3, [r0, #42] ; 0x2a
  3547. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3548. 80017f4: 8d43 ldrh r3, [r0, #42] ; 0x2a
  3549. 80017f6: b29b uxth r3, r3
  3550. 80017f8: 2b00 cmp r3, #0
  3551. 80017fa: f47f ae28 bne.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3552. 80017fe: 2a2a cmp r2, #42 ; 0x2a
  3553. 8001800: f47f ae25 bne.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3554. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3555. 8001804: 6802 ldr r2, [r0, #0]
  3556. 8001806: 6853 ldr r3, [r2, #4]
  3557. 8001808: f423 6380 bic.w r3, r3, #1024 ; 0x400
  3558. 800180c: 6053 str r3, [r2, #4]
  3559. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  3560. 800180e: 2322 movs r3, #34 ; 0x22
  3561. 8001810: 6303 str r3, [r0, #48] ; 0x30
  3562. hi2c->State = HAL_I2C_STATE_LISTEN;
  3563. 8001812: 2328 movs r3, #40 ; 0x28
  3564. 8001814: f880 303d strb.w r3, [r0, #61] ; 0x3d
  3565. 8001818: e78d b.n 8001736 <HAL_I2C_EV_IRQHandler+0x5c6>
  3566. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  3567. 800181a: 2c00 cmp r4, #0
  3568. 800181c: f43f ae17 beq.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3569. 8001820: 0592 lsls r2, r2, #22
  3570. 8001822: f57f ae14 bpl.w 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3571. if(hi2c->XferCount != 0U)
  3572. 8001826: 8d42 ldrh r2, [r0, #42] ; 0x2a
  3573. 8001828: b292 uxth r2, r2
  3574. 800182a: 2a00 cmp r2, #0
  3575. 800182c: f47f ae77 bne.w 800151e <HAL_I2C_EV_IRQHandler+0x3ae>
  3576. 8001830: e60d b.n 800144e <HAL_I2C_EV_IRQHandler+0x2de>
  3577. 8001832: bf00 nop
  3578. 8001834: 00100004 .word 0x00100004
  3579. 8001838: 00010004 .word 0x00010004
  3580. 800183c: 00010080 .word 0x00010080
  3581. 8001840: 00010040 .word 0x00010040
  3582. 08001844 <I2C_DMAAbort>:
  3583. I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  3584. 8001844: 6a40 ldr r0, [r0, #36] ; 0x24
  3585. {
  3586. 8001846: b508 push {r3, lr}
  3587. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3588. 8001848: 6803 ldr r3, [r0, #0]
  3589. hi2c->hdmatx->XferAbortCallback = NULL;
  3590. 800184a: 6b41 ldr r1, [r0, #52] ; 0x34
  3591. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3592. 800184c: 681a ldr r2, [r3, #0]
  3593. 800184e: f422 6280 bic.w r2, r2, #1024 ; 0x400
  3594. 8001852: 601a str r2, [r3, #0]
  3595. hi2c->XferCount = 0U;
  3596. 8001854: 2200 movs r2, #0
  3597. 8001856: 8542 strh r2, [r0, #42] ; 0x2a
  3598. hi2c->hdmatx->XferAbortCallback = NULL;
  3599. 8001858: 634a str r2, [r1, #52] ; 0x34
  3600. hi2c->hdmarx->XferAbortCallback = NULL;
  3601. 800185a: 6b81 ldr r1, [r0, #56] ; 0x38
  3602. 800185c: 634a str r2, [r1, #52] ; 0x34
  3603. if(hi2c->State == HAL_I2C_STATE_ABORT)
  3604. 800185e: f890 103d ldrb.w r1, [r0, #61] ; 0x3d
  3605. 8001862: 2960 cmp r1, #96 ; 0x60
  3606. 8001864: f04f 0120 mov.w r1, #32
  3607. hi2c->State = HAL_I2C_STATE_READY;
  3608. 8001868: f880 103d strb.w r1, [r0, #61] ; 0x3d
  3609. hi2c->Mode = HAL_I2C_MODE_NONE;
  3610. 800186c: f880 203e strb.w r2, [r0, #62] ; 0x3e
  3611. if(hi2c->State == HAL_I2C_STATE_ABORT)
  3612. 8001870: d107 bne.n 8001882 <I2C_DMAAbort+0x3e>
  3613. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3614. 8001872: 6402 str r2, [r0, #64] ; 0x40
  3615. __HAL_I2C_DISABLE(hi2c);
  3616. 8001874: 681a ldr r2, [r3, #0]
  3617. 8001876: f022 0201 bic.w r2, r2, #1
  3618. 800187a: 601a str r2, [r3, #0]
  3619. HAL_I2C_AbortCpltCallback(hi2c);
  3620. 800187c: f7ff fbe3 bl 8001046 <HAL_I2C_AbortCpltCallback>
  3621. 8001880: bd08 pop {r3, pc}
  3622. __HAL_I2C_DISABLE(hi2c);
  3623. 8001882: 681a ldr r2, [r3, #0]
  3624. 8001884: f022 0201 bic.w r2, r2, #1
  3625. 8001888: 601a str r2, [r3, #0]
  3626. HAL_I2C_ErrorCallback(hi2c);
  3627. 800188a: f7ff fbdb bl 8001044 <HAL_I2C_ErrorCallback>
  3628. 800188e: bd08 pop {r3, pc}
  3629. 08001890 <HAL_RCC_OscConfig>:
  3630. /* Check the parameters */
  3631. assert_param(RCC_OscInitStruct != NULL);
  3632. assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  3633. /*------------------------------- HSE Configuration ------------------------*/
  3634. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  3635. 8001890: 6803 ldr r3, [r0, #0]
  3636. {
  3637. 8001892: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  3638. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  3639. 8001896: 07db lsls r3, r3, #31
  3640. {
  3641. 8001898: 4605 mov r5, r0
  3642. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  3643. 800189a: d410 bmi.n 80018be <HAL_RCC_OscConfig+0x2e>
  3644. }
  3645. }
  3646. }
  3647. }
  3648. /*----------------------------- HSI Configuration --------------------------*/
  3649. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
  3650. 800189c: 682b ldr r3, [r5, #0]
  3651. 800189e: 079f lsls r7, r3, #30
  3652. 80018a0: d45e bmi.n 8001960 <HAL_RCC_OscConfig+0xd0>
  3653. }
  3654. }
  3655. }
  3656. }
  3657. /*------------------------------ LSI Configuration -------------------------*/
  3658. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
  3659. 80018a2: 682b ldr r3, [r5, #0]
  3660. 80018a4: 0719 lsls r1, r3, #28
  3661. 80018a6: f100 8095 bmi.w 80019d4 <HAL_RCC_OscConfig+0x144>
  3662. }
  3663. }
  3664. }
  3665. }
  3666. /*------------------------------ LSE Configuration -------------------------*/
  3667. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
  3668. 80018aa: 682b ldr r3, [r5, #0]
  3669. 80018ac: 075a lsls r2, r3, #29
  3670. 80018ae: f100 80bf bmi.w 8001a30 <HAL_RCC_OscConfig+0x1a0>
  3671. #endif /* RCC_CR_PLL2ON */
  3672. /*-------------------------------- PLL Configuration -----------------------*/
  3673. /* Check the parameters */
  3674. assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  3675. if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
  3676. 80018b2: 69ea ldr r2, [r5, #28]
  3677. 80018b4: 2a00 cmp r2, #0
  3678. 80018b6: f040 812d bne.w 8001b14 <HAL_RCC_OscConfig+0x284>
  3679. {
  3680. return HAL_ERROR;
  3681. }
  3682. }
  3683. return HAL_OK;
  3684. 80018ba: 2000 movs r0, #0
  3685. 80018bc: e014 b.n 80018e8 <HAL_RCC_OscConfig+0x58>
  3686. if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
  3687. 80018be: 4c90 ldr r4, [pc, #576] ; (8001b00 <HAL_RCC_OscConfig+0x270>)
  3688. 80018c0: 6863 ldr r3, [r4, #4]
  3689. 80018c2: f003 030c and.w r3, r3, #12
  3690. 80018c6: 2b04 cmp r3, #4
  3691. 80018c8: d007 beq.n 80018da <HAL_RCC_OscConfig+0x4a>
  3692. || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
  3693. 80018ca: 6863 ldr r3, [r4, #4]
  3694. 80018cc: f003 030c and.w r3, r3, #12
  3695. 80018d0: 2b08 cmp r3, #8
  3696. 80018d2: d10c bne.n 80018ee <HAL_RCC_OscConfig+0x5e>
  3697. 80018d4: 6863 ldr r3, [r4, #4]
  3698. 80018d6: 03de lsls r6, r3, #15
  3699. 80018d8: d509 bpl.n 80018ee <HAL_RCC_OscConfig+0x5e>
  3700. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
  3701. 80018da: 6823 ldr r3, [r4, #0]
  3702. 80018dc: 039c lsls r4, r3, #14
  3703. 80018de: d5dd bpl.n 800189c <HAL_RCC_OscConfig+0xc>
  3704. 80018e0: 686b ldr r3, [r5, #4]
  3705. 80018e2: 2b00 cmp r3, #0
  3706. 80018e4: d1da bne.n 800189c <HAL_RCC_OscConfig+0xc>
  3707. return HAL_ERROR;
  3708. 80018e6: 2001 movs r0, #1
  3709. }
  3710. 80018e8: b002 add sp, #8
  3711. 80018ea: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  3712. __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  3713. 80018ee: 686b ldr r3, [r5, #4]
  3714. 80018f0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
  3715. 80018f4: d110 bne.n 8001918 <HAL_RCC_OscConfig+0x88>
  3716. 80018f6: 6823 ldr r3, [r4, #0]
  3717. 80018f8: f443 3380 orr.w r3, r3, #65536 ; 0x10000
  3718. 80018fc: 6023 str r3, [r4, #0]
  3719. tickstart = HAL_GetTick();
  3720. 80018fe: f7fe fcc3 bl 8000288 <HAL_GetTick>
  3721. 8001902: 4606 mov r6, r0
  3722. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  3723. 8001904: 6823 ldr r3, [r4, #0]
  3724. 8001906: 0398 lsls r0, r3, #14
  3725. 8001908: d4c8 bmi.n 800189c <HAL_RCC_OscConfig+0xc>
  3726. if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  3727. 800190a: f7fe fcbd bl 8000288 <HAL_GetTick>
  3728. 800190e: 1b80 subs r0, r0, r6
  3729. 8001910: 2864 cmp r0, #100 ; 0x64
  3730. 8001912: d9f7 bls.n 8001904 <HAL_RCC_OscConfig+0x74>
  3731. return HAL_TIMEOUT;
  3732. 8001914: 2003 movs r0, #3
  3733. 8001916: e7e7 b.n 80018e8 <HAL_RCC_OscConfig+0x58>
  3734. __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  3735. 8001918: b99b cbnz r3, 8001942 <HAL_RCC_OscConfig+0xb2>
  3736. 800191a: 6823 ldr r3, [r4, #0]
  3737. 800191c: f423 3380 bic.w r3, r3, #65536 ; 0x10000
  3738. 8001920: 6023 str r3, [r4, #0]
  3739. 8001922: 6823 ldr r3, [r4, #0]
  3740. 8001924: f423 2380 bic.w r3, r3, #262144 ; 0x40000
  3741. 8001928: 6023 str r3, [r4, #0]
  3742. tickstart = HAL_GetTick();
  3743. 800192a: f7fe fcad bl 8000288 <HAL_GetTick>
  3744. 800192e: 4606 mov r6, r0
  3745. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
  3746. 8001930: 6823 ldr r3, [r4, #0]
  3747. 8001932: 0399 lsls r1, r3, #14
  3748. 8001934: d5b2 bpl.n 800189c <HAL_RCC_OscConfig+0xc>
  3749. if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  3750. 8001936: f7fe fca7 bl 8000288 <HAL_GetTick>
  3751. 800193a: 1b80 subs r0, r0, r6
  3752. 800193c: 2864 cmp r0, #100 ; 0x64
  3753. 800193e: d9f7 bls.n 8001930 <HAL_RCC_OscConfig+0xa0>
  3754. 8001940: e7e8 b.n 8001914 <HAL_RCC_OscConfig+0x84>
  3755. __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  3756. 8001942: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
  3757. 8001946: 6823 ldr r3, [r4, #0]
  3758. 8001948: d103 bne.n 8001952 <HAL_RCC_OscConfig+0xc2>
  3759. 800194a: f443 2380 orr.w r3, r3, #262144 ; 0x40000
  3760. 800194e: 6023 str r3, [r4, #0]
  3761. 8001950: e7d1 b.n 80018f6 <HAL_RCC_OscConfig+0x66>
  3762. 8001952: f423 3380 bic.w r3, r3, #65536 ; 0x10000
  3763. 8001956: 6023 str r3, [r4, #0]
  3764. 8001958: 6823 ldr r3, [r4, #0]
  3765. 800195a: f423 2380 bic.w r3, r3, #262144 ; 0x40000
  3766. 800195e: e7cd b.n 80018fc <HAL_RCC_OscConfig+0x6c>
  3767. if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
  3768. 8001960: 4c67 ldr r4, [pc, #412] ; (8001b00 <HAL_RCC_OscConfig+0x270>)
  3769. 8001962: 6863 ldr r3, [r4, #4]
  3770. 8001964: f013 0f0c tst.w r3, #12
  3771. 8001968: d007 beq.n 800197a <HAL_RCC_OscConfig+0xea>
  3772. || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
  3773. 800196a: 6863 ldr r3, [r4, #4]
  3774. 800196c: f003 030c and.w r3, r3, #12
  3775. 8001970: 2b08 cmp r3, #8
  3776. 8001972: d110 bne.n 8001996 <HAL_RCC_OscConfig+0x106>
  3777. 8001974: 6863 ldr r3, [r4, #4]
  3778. 8001976: 03da lsls r2, r3, #15
  3779. 8001978: d40d bmi.n 8001996 <HAL_RCC_OscConfig+0x106>
  3780. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
  3781. 800197a: 6823 ldr r3, [r4, #0]
  3782. 800197c: 079b lsls r3, r3, #30
  3783. 800197e: d502 bpl.n 8001986 <HAL_RCC_OscConfig+0xf6>
  3784. 8001980: 692b ldr r3, [r5, #16]
  3785. 8001982: 2b01 cmp r3, #1
  3786. 8001984: d1af bne.n 80018e6 <HAL_RCC_OscConfig+0x56>
  3787. __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
  3788. 8001986: 6823 ldr r3, [r4, #0]
  3789. 8001988: 696a ldr r2, [r5, #20]
  3790. 800198a: f023 03f8 bic.w r3, r3, #248 ; 0xf8
  3791. 800198e: ea43 03c2 orr.w r3, r3, r2, lsl #3
  3792. 8001992: 6023 str r3, [r4, #0]
  3793. 8001994: e785 b.n 80018a2 <HAL_RCC_OscConfig+0x12>
  3794. if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
  3795. 8001996: 692a ldr r2, [r5, #16]
  3796. 8001998: 4b5a ldr r3, [pc, #360] ; (8001b04 <HAL_RCC_OscConfig+0x274>)
  3797. 800199a: b16a cbz r2, 80019b8 <HAL_RCC_OscConfig+0x128>
  3798. __HAL_RCC_HSI_ENABLE();
  3799. 800199c: 2201 movs r2, #1
  3800. 800199e: 601a str r2, [r3, #0]
  3801. tickstart = HAL_GetTick();
  3802. 80019a0: f7fe fc72 bl 8000288 <HAL_GetTick>
  3803. 80019a4: 4606 mov r6, r0
  3804. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  3805. 80019a6: 6823 ldr r3, [r4, #0]
  3806. 80019a8: 079f lsls r7, r3, #30
  3807. 80019aa: d4ec bmi.n 8001986 <HAL_RCC_OscConfig+0xf6>
  3808. if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  3809. 80019ac: f7fe fc6c bl 8000288 <HAL_GetTick>
  3810. 80019b0: 1b80 subs r0, r0, r6
  3811. 80019b2: 2802 cmp r0, #2
  3812. 80019b4: d9f7 bls.n 80019a6 <HAL_RCC_OscConfig+0x116>
  3813. 80019b6: e7ad b.n 8001914 <HAL_RCC_OscConfig+0x84>
  3814. __HAL_RCC_HSI_DISABLE();
  3815. 80019b8: 601a str r2, [r3, #0]
  3816. tickstart = HAL_GetTick();
  3817. 80019ba: f7fe fc65 bl 8000288 <HAL_GetTick>
  3818. 80019be: 4606 mov r6, r0
  3819. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
  3820. 80019c0: 6823 ldr r3, [r4, #0]
  3821. 80019c2: 0798 lsls r0, r3, #30
  3822. 80019c4: f57f af6d bpl.w 80018a2 <HAL_RCC_OscConfig+0x12>
  3823. if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  3824. 80019c8: f7fe fc5e bl 8000288 <HAL_GetTick>
  3825. 80019cc: 1b80 subs r0, r0, r6
  3826. 80019ce: 2802 cmp r0, #2
  3827. 80019d0: d9f6 bls.n 80019c0 <HAL_RCC_OscConfig+0x130>
  3828. 80019d2: e79f b.n 8001914 <HAL_RCC_OscConfig+0x84>
  3829. if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
  3830. 80019d4: 69aa ldr r2, [r5, #24]
  3831. 80019d6: 4c4a ldr r4, [pc, #296] ; (8001b00 <HAL_RCC_OscConfig+0x270>)
  3832. 80019d8: 4b4b ldr r3, [pc, #300] ; (8001b08 <HAL_RCC_OscConfig+0x278>)
  3833. 80019da: b1da cbz r2, 8001a14 <HAL_RCC_OscConfig+0x184>
  3834. __HAL_RCC_LSI_ENABLE();
  3835. 80019dc: 2201 movs r2, #1
  3836. 80019de: 601a str r2, [r3, #0]
  3837. tickstart = HAL_GetTick();
  3838. 80019e0: f7fe fc52 bl 8000288 <HAL_GetTick>
  3839. 80019e4: 4606 mov r6, r0
  3840. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
  3841. 80019e6: 6a63 ldr r3, [r4, #36] ; 0x24
  3842. 80019e8: 079b lsls r3, r3, #30
  3843. 80019ea: d50d bpl.n 8001a08 <HAL_RCC_OscConfig+0x178>
  3844. * @param mdelay: specifies the delay time length, in milliseconds.
  3845. * @retval None
  3846. */
  3847. static void RCC_Delay(uint32_t mdelay)
  3848. {
  3849. __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
  3850. 80019ec: f44f 52fa mov.w r2, #8000 ; 0x1f40
  3851. 80019f0: 4b46 ldr r3, [pc, #280] ; (8001b0c <HAL_RCC_OscConfig+0x27c>)
  3852. 80019f2: 681b ldr r3, [r3, #0]
  3853. 80019f4: fbb3 f3f2 udiv r3, r3, r2
  3854. 80019f8: 9301 str r3, [sp, #4]
  3855. \brief No Operation
  3856. \details No Operation does nothing. This instruction can be used for code alignment purposes.
  3857. */
  3858. __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
  3859. {
  3860. __ASM volatile ("nop");
  3861. 80019fa: bf00 nop
  3862. do
  3863. {
  3864. __NOP();
  3865. }
  3866. while (Delay --);
  3867. 80019fc: 9b01 ldr r3, [sp, #4]
  3868. 80019fe: 1e5a subs r2, r3, #1
  3869. 8001a00: 9201 str r2, [sp, #4]
  3870. 8001a02: 2b00 cmp r3, #0
  3871. 8001a04: d1f9 bne.n 80019fa <HAL_RCC_OscConfig+0x16a>
  3872. 8001a06: e750 b.n 80018aa <HAL_RCC_OscConfig+0x1a>
  3873. if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  3874. 8001a08: f7fe fc3e bl 8000288 <HAL_GetTick>
  3875. 8001a0c: 1b80 subs r0, r0, r6
  3876. 8001a0e: 2802 cmp r0, #2
  3877. 8001a10: d9e9 bls.n 80019e6 <HAL_RCC_OscConfig+0x156>
  3878. 8001a12: e77f b.n 8001914 <HAL_RCC_OscConfig+0x84>
  3879. __HAL_RCC_LSI_DISABLE();
  3880. 8001a14: 601a str r2, [r3, #0]
  3881. tickstart = HAL_GetTick();
  3882. 8001a16: f7fe fc37 bl 8000288 <HAL_GetTick>
  3883. 8001a1a: 4606 mov r6, r0
  3884. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
  3885. 8001a1c: 6a63 ldr r3, [r4, #36] ; 0x24
  3886. 8001a1e: 079f lsls r7, r3, #30
  3887. 8001a20: f57f af43 bpl.w 80018aa <HAL_RCC_OscConfig+0x1a>
  3888. if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  3889. 8001a24: f7fe fc30 bl 8000288 <HAL_GetTick>
  3890. 8001a28: 1b80 subs r0, r0, r6
  3891. 8001a2a: 2802 cmp r0, #2
  3892. 8001a2c: d9f6 bls.n 8001a1c <HAL_RCC_OscConfig+0x18c>
  3893. 8001a2e: e771 b.n 8001914 <HAL_RCC_OscConfig+0x84>
  3894. if(__HAL_RCC_PWR_IS_CLK_DISABLED())
  3895. 8001a30: 4c33 ldr r4, [pc, #204] ; (8001b00 <HAL_RCC_OscConfig+0x270>)
  3896. 8001a32: 69e3 ldr r3, [r4, #28]
  3897. 8001a34: 00d8 lsls r0, r3, #3
  3898. 8001a36: d424 bmi.n 8001a82 <HAL_RCC_OscConfig+0x1f2>
  3899. pwrclkchanged = SET;
  3900. 8001a38: 2701 movs r7, #1
  3901. __HAL_RCC_PWR_CLK_ENABLE();
  3902. 8001a3a: 69e3 ldr r3, [r4, #28]
  3903. 8001a3c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
  3904. 8001a40: 61e3 str r3, [r4, #28]
  3905. 8001a42: 69e3 ldr r3, [r4, #28]
  3906. 8001a44: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  3907. 8001a48: 9300 str r3, [sp, #0]
  3908. 8001a4a: 9b00 ldr r3, [sp, #0]
  3909. if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  3910. 8001a4c: 4e30 ldr r6, [pc, #192] ; (8001b10 <HAL_RCC_OscConfig+0x280>)
  3911. 8001a4e: 6833 ldr r3, [r6, #0]
  3912. 8001a50: 05d9 lsls r1, r3, #23
  3913. 8001a52: d518 bpl.n 8001a86 <HAL_RCC_OscConfig+0x1f6>
  3914. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  3915. 8001a54: 68eb ldr r3, [r5, #12]
  3916. 8001a56: 2b01 cmp r3, #1
  3917. 8001a58: d126 bne.n 8001aa8 <HAL_RCC_OscConfig+0x218>
  3918. 8001a5a: 6a23 ldr r3, [r4, #32]
  3919. 8001a5c: f043 0301 orr.w r3, r3, #1
  3920. 8001a60: 6223 str r3, [r4, #32]
  3921. tickstart = HAL_GetTick();
  3922. 8001a62: f7fe fc11 bl 8000288 <HAL_GetTick>
  3923. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  3924. 8001a66: f241 3688 movw r6, #5000 ; 0x1388
  3925. tickstart = HAL_GetTick();
  3926. 8001a6a: 4680 mov r8, r0
  3927. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
  3928. 8001a6c: 6a23 ldr r3, [r4, #32]
  3929. 8001a6e: 079b lsls r3, r3, #30
  3930. 8001a70: d53f bpl.n 8001af2 <HAL_RCC_OscConfig+0x262>
  3931. if(pwrclkchanged == SET)
  3932. 8001a72: 2f00 cmp r7, #0
  3933. 8001a74: f43f af1d beq.w 80018b2 <HAL_RCC_OscConfig+0x22>
  3934. __HAL_RCC_PWR_CLK_DISABLE();
  3935. 8001a78: 69e3 ldr r3, [r4, #28]
  3936. 8001a7a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
  3937. 8001a7e: 61e3 str r3, [r4, #28]
  3938. 8001a80: e717 b.n 80018b2 <HAL_RCC_OscConfig+0x22>
  3939. FlagStatus pwrclkchanged = RESET;
  3940. 8001a82: 2700 movs r7, #0
  3941. 8001a84: e7e2 b.n 8001a4c <HAL_RCC_OscConfig+0x1bc>
  3942. SET_BIT(PWR->CR, PWR_CR_DBP);
  3943. 8001a86: 6833 ldr r3, [r6, #0]
  3944. 8001a88: f443 7380 orr.w r3, r3, #256 ; 0x100
  3945. 8001a8c: 6033 str r3, [r6, #0]
  3946. tickstart = HAL_GetTick();
  3947. 8001a8e: f7fe fbfb bl 8000288 <HAL_GetTick>
  3948. 8001a92: 4680 mov r8, r0
  3949. while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  3950. 8001a94: 6833 ldr r3, [r6, #0]
  3951. 8001a96: 05da lsls r2, r3, #23
  3952. 8001a98: d4dc bmi.n 8001a54 <HAL_RCC_OscConfig+0x1c4>
  3953. if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
  3954. 8001a9a: f7fe fbf5 bl 8000288 <HAL_GetTick>
  3955. 8001a9e: eba0 0008 sub.w r0, r0, r8
  3956. 8001aa2: 2864 cmp r0, #100 ; 0x64
  3957. 8001aa4: d9f6 bls.n 8001a94 <HAL_RCC_OscConfig+0x204>
  3958. 8001aa6: e735 b.n 8001914 <HAL_RCC_OscConfig+0x84>
  3959. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  3960. 8001aa8: b9ab cbnz r3, 8001ad6 <HAL_RCC_OscConfig+0x246>
  3961. 8001aaa: 6a23 ldr r3, [r4, #32]
  3962. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  3963. 8001aac: f241 3888 movw r8, #5000 ; 0x1388
  3964. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  3965. 8001ab0: f023 0301 bic.w r3, r3, #1
  3966. 8001ab4: 6223 str r3, [r4, #32]
  3967. 8001ab6: 6a23 ldr r3, [r4, #32]
  3968. 8001ab8: f023 0304 bic.w r3, r3, #4
  3969. 8001abc: 6223 str r3, [r4, #32]
  3970. tickstart = HAL_GetTick();
  3971. 8001abe: f7fe fbe3 bl 8000288 <HAL_GetTick>
  3972. 8001ac2: 4606 mov r6, r0
  3973. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
  3974. 8001ac4: 6a23 ldr r3, [r4, #32]
  3975. 8001ac6: 0798 lsls r0, r3, #30
  3976. 8001ac8: d5d3 bpl.n 8001a72 <HAL_RCC_OscConfig+0x1e2>
  3977. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  3978. 8001aca: f7fe fbdd bl 8000288 <HAL_GetTick>
  3979. 8001ace: 1b80 subs r0, r0, r6
  3980. 8001ad0: 4540 cmp r0, r8
  3981. 8001ad2: d9f7 bls.n 8001ac4 <HAL_RCC_OscConfig+0x234>
  3982. 8001ad4: e71e b.n 8001914 <HAL_RCC_OscConfig+0x84>
  3983. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  3984. 8001ad6: 2b05 cmp r3, #5
  3985. 8001ad8: 6a23 ldr r3, [r4, #32]
  3986. 8001ada: d103 bne.n 8001ae4 <HAL_RCC_OscConfig+0x254>
  3987. 8001adc: f043 0304 orr.w r3, r3, #4
  3988. 8001ae0: 6223 str r3, [r4, #32]
  3989. 8001ae2: e7ba b.n 8001a5a <HAL_RCC_OscConfig+0x1ca>
  3990. 8001ae4: f023 0301 bic.w r3, r3, #1
  3991. 8001ae8: 6223 str r3, [r4, #32]
  3992. 8001aea: 6a23 ldr r3, [r4, #32]
  3993. 8001aec: f023 0304 bic.w r3, r3, #4
  3994. 8001af0: e7b6 b.n 8001a60 <HAL_RCC_OscConfig+0x1d0>
  3995. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  3996. 8001af2: f7fe fbc9 bl 8000288 <HAL_GetTick>
  3997. 8001af6: eba0 0008 sub.w r0, r0, r8
  3998. 8001afa: 42b0 cmp r0, r6
  3999. 8001afc: d9b6 bls.n 8001a6c <HAL_RCC_OscConfig+0x1dc>
  4000. 8001afe: e709 b.n 8001914 <HAL_RCC_OscConfig+0x84>
  4001. 8001b00: 40021000 .word 0x40021000
  4002. 8001b04: 42420000 .word 0x42420000
  4003. 8001b08: 42420480 .word 0x42420480
  4004. 8001b0c: 20000008 .word 0x20000008
  4005. 8001b10: 40007000 .word 0x40007000
  4006. if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
  4007. 8001b14: 4c22 ldr r4, [pc, #136] ; (8001ba0 <HAL_RCC_OscConfig+0x310>)
  4008. 8001b16: 6863 ldr r3, [r4, #4]
  4009. 8001b18: f003 030c and.w r3, r3, #12
  4010. 8001b1c: 2b08 cmp r3, #8
  4011. 8001b1e: f43f aee2 beq.w 80018e6 <HAL_RCC_OscConfig+0x56>
  4012. 8001b22: 2300 movs r3, #0
  4013. 8001b24: 4e1f ldr r6, [pc, #124] ; (8001ba4 <HAL_RCC_OscConfig+0x314>)
  4014. if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
  4015. 8001b26: 2a02 cmp r2, #2
  4016. __HAL_RCC_PLL_DISABLE();
  4017. 8001b28: 6033 str r3, [r6, #0]
  4018. if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
  4019. 8001b2a: d12b bne.n 8001b84 <HAL_RCC_OscConfig+0x2f4>
  4020. tickstart = HAL_GetTick();
  4021. 8001b2c: f7fe fbac bl 8000288 <HAL_GetTick>
  4022. 8001b30: 4607 mov r7, r0
  4023. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
  4024. 8001b32: 6823 ldr r3, [r4, #0]
  4025. 8001b34: 0199 lsls r1, r3, #6
  4026. 8001b36: d41f bmi.n 8001b78 <HAL_RCC_OscConfig+0x2e8>
  4027. if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
  4028. 8001b38: 6a2b ldr r3, [r5, #32]
  4029. 8001b3a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
  4030. 8001b3e: d105 bne.n 8001b4c <HAL_RCC_OscConfig+0x2bc>
  4031. __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
  4032. 8001b40: 6ae2 ldr r2, [r4, #44] ; 0x2c
  4033. 8001b42: 68a9 ldr r1, [r5, #8]
  4034. 8001b44: f022 020f bic.w r2, r2, #15
  4035. 8001b48: 430a orrs r2, r1
  4036. 8001b4a: 62e2 str r2, [r4, #44] ; 0x2c
  4037. __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
  4038. 8001b4c: 6a69 ldr r1, [r5, #36] ; 0x24
  4039. 8001b4e: 6862 ldr r2, [r4, #4]
  4040. 8001b50: 430b orrs r3, r1
  4041. 8001b52: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000
  4042. 8001b56: 4313 orrs r3, r2
  4043. 8001b58: 6063 str r3, [r4, #4]
  4044. __HAL_RCC_PLL_ENABLE();
  4045. 8001b5a: 2301 movs r3, #1
  4046. 8001b5c: 6033 str r3, [r6, #0]
  4047. tickstart = HAL_GetTick();
  4048. 8001b5e: f7fe fb93 bl 8000288 <HAL_GetTick>
  4049. 8001b62: 4605 mov r5, r0
  4050. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
  4051. 8001b64: 6823 ldr r3, [r4, #0]
  4052. 8001b66: 019a lsls r2, r3, #6
  4053. 8001b68: f53f aea7 bmi.w 80018ba <HAL_RCC_OscConfig+0x2a>
  4054. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  4055. 8001b6c: f7fe fb8c bl 8000288 <HAL_GetTick>
  4056. 8001b70: 1b40 subs r0, r0, r5
  4057. 8001b72: 2802 cmp r0, #2
  4058. 8001b74: d9f6 bls.n 8001b64 <HAL_RCC_OscConfig+0x2d4>
  4059. 8001b76: e6cd b.n 8001914 <HAL_RCC_OscConfig+0x84>
  4060. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  4061. 8001b78: f7fe fb86 bl 8000288 <HAL_GetTick>
  4062. 8001b7c: 1bc0 subs r0, r0, r7
  4063. 8001b7e: 2802 cmp r0, #2
  4064. 8001b80: d9d7 bls.n 8001b32 <HAL_RCC_OscConfig+0x2a2>
  4065. 8001b82: e6c7 b.n 8001914 <HAL_RCC_OscConfig+0x84>
  4066. tickstart = HAL_GetTick();
  4067. 8001b84: f7fe fb80 bl 8000288 <HAL_GetTick>
  4068. 8001b88: 4605 mov r5, r0
  4069. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
  4070. 8001b8a: 6823 ldr r3, [r4, #0]
  4071. 8001b8c: 019b lsls r3, r3, #6
  4072. 8001b8e: f57f ae94 bpl.w 80018ba <HAL_RCC_OscConfig+0x2a>
  4073. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  4074. 8001b92: f7fe fb79 bl 8000288 <HAL_GetTick>
  4075. 8001b96: 1b40 subs r0, r0, r5
  4076. 8001b98: 2802 cmp r0, #2
  4077. 8001b9a: d9f6 bls.n 8001b8a <HAL_RCC_OscConfig+0x2fa>
  4078. 8001b9c: e6ba b.n 8001914 <HAL_RCC_OscConfig+0x84>
  4079. 8001b9e: bf00 nop
  4080. 8001ba0: 40021000 .word 0x40021000
  4081. 8001ba4: 42420060 .word 0x42420060
  4082. 08001ba8 <HAL_RCC_GetSysClockFreq>:
  4083. {
  4084. 8001ba8: b530 push {r4, r5, lr}
  4085. 8001baa: b089 sub sp, #36 ; 0x24
  4086. const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
  4087. 8001bac: 466c mov r4, sp
  4088. 8001bae: 4b1b ldr r3, [pc, #108] ; (8001c1c <HAL_RCC_GetSysClockFreq+0x74>)
  4089. 8001bb0: f103 0510 add.w r5, r3, #16
  4090. 8001bb4: 4622 mov r2, r4
  4091. 8001bb6: 6818 ldr r0, [r3, #0]
  4092. 8001bb8: 6859 ldr r1, [r3, #4]
  4093. 8001bba: 3308 adds r3, #8
  4094. 8001bbc: c203 stmia r2!, {r0, r1}
  4095. 8001bbe: 42ab cmp r3, r5
  4096. 8001bc0: 4614 mov r4, r2
  4097. 8001bc2: d1f7 bne.n 8001bb4 <HAL_RCC_GetSysClockFreq+0xc>
  4098. const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
  4099. 8001bc4: 4b16 ldr r3, [pc, #88] ; (8001c20 <HAL_RCC_GetSysClockFreq+0x78>)
  4100. 8001bc6: ac04 add r4, sp, #16
  4101. 8001bc8: f103 0510 add.w r5, r3, #16
  4102. 8001bcc: 4622 mov r2, r4
  4103. 8001bce: 6818 ldr r0, [r3, #0]
  4104. 8001bd0: 6859 ldr r1, [r3, #4]
  4105. 8001bd2: 3308 adds r3, #8
  4106. 8001bd4: c203 stmia r2!, {r0, r1}
  4107. 8001bd6: 42ab cmp r3, r5
  4108. 8001bd8: 4614 mov r4, r2
  4109. 8001bda: d1f7 bne.n 8001bcc <HAL_RCC_GetSysClockFreq+0x24>
  4110. tmpreg = RCC->CFGR;
  4111. 8001bdc: 4911 ldr r1, [pc, #68] ; (8001c24 <HAL_RCC_GetSysClockFreq+0x7c>)
  4112. 8001bde: 684b ldr r3, [r1, #4]
  4113. switch (tmpreg & RCC_CFGR_SWS)
  4114. 8001be0: f003 020c and.w r2, r3, #12
  4115. 8001be4: 2a08 cmp r2, #8
  4116. 8001be6: d117 bne.n 8001c18 <HAL_RCC_GetSysClockFreq+0x70>
  4117. pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
  4118. 8001be8: f3c3 4283 ubfx r2, r3, #18, #4
  4119. 8001bec: a808 add r0, sp, #32
  4120. 8001bee: 4402 add r2, r0
  4121. if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
  4122. 8001bf0: 03db lsls r3, r3, #15
  4123. pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
  4124. 8001bf2: f812 2c20 ldrb.w r2, [r2, #-32]
  4125. if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
  4126. 8001bf6: d50c bpl.n 8001c12 <HAL_RCC_GetSysClockFreq+0x6a>
  4127. prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
  4128. 8001bf8: 6acb ldr r3, [r1, #44] ; 0x2c
  4129. pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
  4130. 8001bfa: 480b ldr r0, [pc, #44] ; (8001c28 <HAL_RCC_GetSysClockFreq+0x80>)
  4131. prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
  4132. 8001bfc: f003 030f and.w r3, r3, #15
  4133. pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
  4134. 8001c00: 4350 muls r0, r2
  4135. prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
  4136. 8001c02: aa08 add r2, sp, #32
  4137. 8001c04: 4413 add r3, r2
  4138. 8001c06: f813 3c10 ldrb.w r3, [r3, #-16]
  4139. pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
  4140. 8001c0a: fbb0 f0f3 udiv r0, r0, r3
  4141. }
  4142. 8001c0e: b009 add sp, #36 ; 0x24
  4143. 8001c10: bd30 pop {r4, r5, pc}
  4144. pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
  4145. 8001c12: 4806 ldr r0, [pc, #24] ; (8001c2c <HAL_RCC_GetSysClockFreq+0x84>)
  4146. 8001c14: 4350 muls r0, r2
  4147. 8001c16: e7fa b.n 8001c0e <HAL_RCC_GetSysClockFreq+0x66>
  4148. sysclockfreq = HSE_VALUE;
  4149. 8001c18: 4803 ldr r0, [pc, #12] ; (8001c28 <HAL_RCC_GetSysClockFreq+0x80>)
  4150. return sysclockfreq;
  4151. 8001c1a: e7f8 b.n 8001c0e <HAL_RCC_GetSysClockFreq+0x66>
  4152. 8001c1c: 080043c8 .word 0x080043c8
  4153. 8001c20: 080043d8 .word 0x080043d8
  4154. 8001c24: 40021000 .word 0x40021000
  4155. 8001c28: 007a1200 .word 0x007a1200
  4156. 8001c2c: 003d0900 .word 0x003d0900
  4157. 08001c30 <HAL_RCC_ClockConfig>:
  4158. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
  4159. 8001c30: 6802 ldr r2, [r0, #0]
  4160. {
  4161. 8001c32: b5f8 push {r3, r4, r5, r6, r7, lr}
  4162. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
  4163. 8001c34: f012 0f02 tst.w r2, #2
  4164. {
  4165. 8001c38: 4605 mov r5, r0
  4166. 8001c3a: 4c3c ldr r4, [pc, #240] ; (8001d2c <HAL_RCC_ClockConfig+0xfc>)
  4167. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
  4168. 8001c3c: d011 beq.n 8001c62 <HAL_RCC_ClockConfig+0x32>
  4169. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
  4170. 8001c3e: 0757 lsls r7, r2, #29
  4171. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
  4172. 8001c40: bf42 ittt mi
  4173. 8001c42: 6863 ldrmi r3, [r4, #4]
  4174. 8001c44: f443 63e0 orrmi.w r3, r3, #1792 ; 0x700
  4175. 8001c48: 6063 strmi r3, [r4, #4]
  4176. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
  4177. 8001c4a: 0716 lsls r6, r2, #28
  4178. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
  4179. 8001c4c: bf42 ittt mi
  4180. 8001c4e: 6863 ldrmi r3, [r4, #4]
  4181. 8001c50: f443 5360 orrmi.w r3, r3, #14336 ; 0x3800
  4182. 8001c54: 6063 strmi r3, [r4, #4]
  4183. MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
  4184. 8001c56: 6863 ldr r3, [r4, #4]
  4185. 8001c58: 6881 ldr r1, [r0, #8]
  4186. 8001c5a: f023 03f0 bic.w r3, r3, #240 ; 0xf0
  4187. 8001c5e: 430b orrs r3, r1
  4188. 8001c60: 6063 str r3, [r4, #4]
  4189. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
  4190. 8001c62: 07d0 lsls r0, r2, #31
  4191. 8001c64: d41a bmi.n 8001c9c <HAL_RCC_ClockConfig+0x6c>
  4192. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
  4193. 8001c66: 682a ldr r2, [r5, #0]
  4194. 8001c68: 0751 lsls r1, r2, #29
  4195. 8001c6a: d456 bmi.n 8001d1a <HAL_RCC_ClockConfig+0xea>
  4196. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
  4197. 8001c6c: 0713 lsls r3, r2, #28
  4198. 8001c6e: d506 bpl.n 8001c7e <HAL_RCC_ClockConfig+0x4e>
  4199. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
  4200. 8001c70: 6863 ldr r3, [r4, #4]
  4201. 8001c72: 692a ldr r2, [r5, #16]
  4202. 8001c74: f423 5360 bic.w r3, r3, #14336 ; 0x3800
  4203. 8001c78: ea43 03c2 orr.w r3, r3, r2, lsl #3
  4204. 8001c7c: 6063 str r3, [r4, #4]
  4205. SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
  4206. 8001c7e: f7ff ff93 bl 8001ba8 <HAL_RCC_GetSysClockFreq>
  4207. 8001c82: 6863 ldr r3, [r4, #4]
  4208. 8001c84: 4a2a ldr r2, [pc, #168] ; (8001d30 <HAL_RCC_ClockConfig+0x100>)
  4209. 8001c86: f3c3 1303 ubfx r3, r3, #4, #4
  4210. 8001c8a: 5cd3 ldrb r3, [r2, r3]
  4211. 8001c8c: 40d8 lsrs r0, r3
  4212. 8001c8e: 4b29 ldr r3, [pc, #164] ; (8001d34 <HAL_RCC_ClockConfig+0x104>)
  4213. 8001c90: 6018 str r0, [r3, #0]
  4214. HAL_InitTick (TICK_INT_PRIORITY);
  4215. 8001c92: 2000 movs r0, #0
  4216. 8001c94: f7fe fabc bl 8000210 <HAL_InitTick>
  4217. return HAL_OK;
  4218. 8001c98: 2000 movs r0, #0
  4219. 8001c9a: bdf8 pop {r3, r4, r5, r6, r7, pc}
  4220. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  4221. 8001c9c: 6868 ldr r0, [r5, #4]
  4222. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  4223. 8001c9e: 6823 ldr r3, [r4, #0]
  4224. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  4225. 8001ca0: 2801 cmp r0, #1
  4226. 8001ca2: d102 bne.n 8001caa <HAL_RCC_ClockConfig+0x7a>
  4227. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  4228. 8001ca4: 039a lsls r2, r3, #14
  4229. 8001ca6: d405 bmi.n 8001cb4 <HAL_RCC_ClockConfig+0x84>
  4230. 8001ca8: bdf8 pop {r3, r4, r5, r6, r7, pc}
  4231. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
  4232. 8001caa: 2802 cmp r0, #2
  4233. 8001cac: d11b bne.n 8001ce6 <HAL_RCC_ClockConfig+0xb6>
  4234. if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
  4235. 8001cae: f013 7f00 tst.w r3, #33554432 ; 0x2000000
  4236. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  4237. 8001cb2: d039 beq.n 8001d28 <HAL_RCC_ClockConfig+0xf8>
  4238. __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
  4239. 8001cb4: 6863 ldr r3, [r4, #4]
  4240. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  4241. 8001cb6: f241 3788 movw r7, #5000 ; 0x1388
  4242. __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
  4243. 8001cba: f023 0303 bic.w r3, r3, #3
  4244. 8001cbe: 4318 orrs r0, r3
  4245. 8001cc0: 6060 str r0, [r4, #4]
  4246. tickstart = HAL_GetTick();
  4247. 8001cc2: f7fe fae1 bl 8000288 <HAL_GetTick>
  4248. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  4249. 8001cc6: 686b ldr r3, [r5, #4]
  4250. tickstart = HAL_GetTick();
  4251. 8001cc8: 4606 mov r6, r0
  4252. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  4253. 8001cca: 2b01 cmp r3, #1
  4254. 8001ccc: d10e bne.n 8001cec <HAL_RCC_ClockConfig+0xbc>
  4255. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
  4256. 8001cce: 6863 ldr r3, [r4, #4]
  4257. 8001cd0: f003 030c and.w r3, r3, #12
  4258. 8001cd4: 2b04 cmp r3, #4
  4259. 8001cd6: d0c6 beq.n 8001c66 <HAL_RCC_ClockConfig+0x36>
  4260. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  4261. 8001cd8: f7fe fad6 bl 8000288 <HAL_GetTick>
  4262. 8001cdc: 1b80 subs r0, r0, r6
  4263. 8001cde: 42b8 cmp r0, r7
  4264. 8001ce0: d9f5 bls.n 8001cce <HAL_RCC_ClockConfig+0x9e>
  4265. return HAL_TIMEOUT;
  4266. 8001ce2: 2003 movs r0, #3
  4267. 8001ce4: bdf8 pop {r3, r4, r5, r6, r7, pc}
  4268. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  4269. 8001ce6: f013 0f02 tst.w r3, #2
  4270. 8001cea: e7e2 b.n 8001cb2 <HAL_RCC_ClockConfig+0x82>
  4271. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
  4272. 8001cec: 2b02 cmp r3, #2
  4273. 8001cee: d10f bne.n 8001d10 <HAL_RCC_ClockConfig+0xe0>
  4274. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
  4275. 8001cf0: 6863 ldr r3, [r4, #4]
  4276. 8001cf2: f003 030c and.w r3, r3, #12
  4277. 8001cf6: 2b08 cmp r3, #8
  4278. 8001cf8: d0b5 beq.n 8001c66 <HAL_RCC_ClockConfig+0x36>
  4279. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  4280. 8001cfa: f7fe fac5 bl 8000288 <HAL_GetTick>
  4281. 8001cfe: 1b80 subs r0, r0, r6
  4282. 8001d00: 42b8 cmp r0, r7
  4283. 8001d02: d9f5 bls.n 8001cf0 <HAL_RCC_ClockConfig+0xc0>
  4284. 8001d04: e7ed b.n 8001ce2 <HAL_RCC_ClockConfig+0xb2>
  4285. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  4286. 8001d06: f7fe fabf bl 8000288 <HAL_GetTick>
  4287. 8001d0a: 1b80 subs r0, r0, r6
  4288. 8001d0c: 42b8 cmp r0, r7
  4289. 8001d0e: d8e8 bhi.n 8001ce2 <HAL_RCC_ClockConfig+0xb2>
  4290. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
  4291. 8001d10: 6863 ldr r3, [r4, #4]
  4292. 8001d12: f013 0f0c tst.w r3, #12
  4293. 8001d16: d1f6 bne.n 8001d06 <HAL_RCC_ClockConfig+0xd6>
  4294. 8001d18: e7a5 b.n 8001c66 <HAL_RCC_ClockConfig+0x36>
  4295. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
  4296. 8001d1a: 6863 ldr r3, [r4, #4]
  4297. 8001d1c: 68e9 ldr r1, [r5, #12]
  4298. 8001d1e: f423 63e0 bic.w r3, r3, #1792 ; 0x700
  4299. 8001d22: 430b orrs r3, r1
  4300. 8001d24: 6063 str r3, [r4, #4]
  4301. 8001d26: e7a1 b.n 8001c6c <HAL_RCC_ClockConfig+0x3c>
  4302. return HAL_ERROR;
  4303. 8001d28: 2001 movs r0, #1
  4304. }
  4305. 8001d2a: bdf8 pop {r3, r4, r5, r6, r7, pc}
  4306. 8001d2c: 40021000 .word 0x40021000
  4307. 8001d30: 0800452b .word 0x0800452b
  4308. 8001d34: 20000008 .word 0x20000008
  4309. 08001d38 <HAL_RCC_GetPCLK1Freq>:
  4310. return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
  4311. 8001d38: 4b04 ldr r3, [pc, #16] ; (8001d4c <HAL_RCC_GetPCLK1Freq+0x14>)
  4312. 8001d3a: 4a05 ldr r2, [pc, #20] ; (8001d50 <HAL_RCC_GetPCLK1Freq+0x18>)
  4313. 8001d3c: 685b ldr r3, [r3, #4]
  4314. 8001d3e: f3c3 2302 ubfx r3, r3, #8, #3
  4315. 8001d42: 5cd3 ldrb r3, [r2, r3]
  4316. 8001d44: 4a03 ldr r2, [pc, #12] ; (8001d54 <HAL_RCC_GetPCLK1Freq+0x1c>)
  4317. 8001d46: 6810 ldr r0, [r2, #0]
  4318. }
  4319. 8001d48: 40d8 lsrs r0, r3
  4320. 8001d4a: 4770 bx lr
  4321. 8001d4c: 40021000 .word 0x40021000
  4322. 8001d50: 0800453b .word 0x0800453b
  4323. 8001d54: 20000008 .word 0x20000008
  4324. 08001d58 <HAL_RCC_GetPCLK2Freq>:
  4325. return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
  4326. 8001d58: 4b04 ldr r3, [pc, #16] ; (8001d6c <HAL_RCC_GetPCLK2Freq+0x14>)
  4327. 8001d5a: 4a05 ldr r2, [pc, #20] ; (8001d70 <HAL_RCC_GetPCLK2Freq+0x18>)
  4328. 8001d5c: 685b ldr r3, [r3, #4]
  4329. 8001d5e: f3c3 23c2 ubfx r3, r3, #11, #3
  4330. 8001d62: 5cd3 ldrb r3, [r2, r3]
  4331. 8001d64: 4a03 ldr r2, [pc, #12] ; (8001d74 <HAL_RCC_GetPCLK2Freq+0x1c>)
  4332. 8001d66: 6810 ldr r0, [r2, #0]
  4333. }
  4334. 8001d68: 40d8 lsrs r0, r3
  4335. 8001d6a: 4770 bx lr
  4336. 8001d6c: 40021000 .word 0x40021000
  4337. 8001d70: 0800453b .word 0x0800453b
  4338. 8001d74: 20000008 .word 0x20000008
  4339. 08001d78 <HAL_RCCEx_PeriphCLKConfig>:
  4340. /* Check the parameters */
  4341. assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
  4342. /*------------------------------- RTC/LCD Configuration ------------------------*/
  4343. if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
  4344. 8001d78: 6803 ldr r3, [r0, #0]
  4345. {
  4346. 8001d7a: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
  4347. if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
  4348. 8001d7e: 07df lsls r7, r3, #31
  4349. {
  4350. 8001d80: 4606 mov r6, r0
  4351. if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
  4352. 8001d82: d520 bpl.n 8001dc6 <HAL_RCCEx_PeriphCLKConfig+0x4e>
  4353. FlagStatus pwrclkchanged = RESET;
  4354. /* As soon as function is called to change RTC clock source, activation of the
  4355. power domain is done. */
  4356. /* Requires to enable write access to Backup Domain of necessary */
  4357. if(__HAL_RCC_PWR_IS_CLK_DISABLED())
  4358. 8001d84: 4c30 ldr r4, [pc, #192] ; (8001e48 <HAL_RCCEx_PeriphCLKConfig+0xd0>)
  4359. 8001d86: 69e3 ldr r3, [r4, #28]
  4360. 8001d88: 00dd lsls r5, r3, #3
  4361. 8001d8a: d429 bmi.n 8001de0 <HAL_RCCEx_PeriphCLKConfig+0x68>
  4362. {
  4363. __HAL_RCC_PWR_CLK_ENABLE();
  4364. pwrclkchanged = SET;
  4365. 8001d8c: 2701 movs r7, #1
  4366. __HAL_RCC_PWR_CLK_ENABLE();
  4367. 8001d8e: 69e3 ldr r3, [r4, #28]
  4368. 8001d90: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
  4369. 8001d94: 61e3 str r3, [r4, #28]
  4370. 8001d96: 69e3 ldr r3, [r4, #28]
  4371. 8001d98: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  4372. 8001d9c: 9301 str r3, [sp, #4]
  4373. 8001d9e: 9b01 ldr r3, [sp, #4]
  4374. }
  4375. if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  4376. 8001da0: 4d2a ldr r5, [pc, #168] ; (8001e4c <HAL_RCCEx_PeriphCLKConfig+0xd4>)
  4377. 8001da2: 682b ldr r3, [r5, #0]
  4378. 8001da4: 05d8 lsls r0, r3, #23
  4379. 8001da6: d51d bpl.n 8001de4 <HAL_RCCEx_PeriphCLKConfig+0x6c>
  4380. }
  4381. }
  4382. }
  4383. /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
  4384. temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
  4385. 8001da8: 6a23 ldr r3, [r4, #32]
  4386. if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
  4387. 8001daa: f413 7340 ands.w r3, r3, #768 ; 0x300
  4388. 8001dae: d12d bne.n 8001e0c <HAL_RCCEx_PeriphCLKConfig+0x94>
  4389. return HAL_TIMEOUT;
  4390. }
  4391. }
  4392. }
  4393. }
  4394. __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
  4395. 8001db0: 6a23 ldr r3, [r4, #32]
  4396. 8001db2: 6872 ldr r2, [r6, #4]
  4397. 8001db4: f423 7340 bic.w r3, r3, #768 ; 0x300
  4398. 8001db8: 4313 orrs r3, r2
  4399. 8001dba: 6223 str r3, [r4, #32]
  4400. /* Require to disable power clock if necessary */
  4401. if(pwrclkchanged == SET)
  4402. 8001dbc: b11f cbz r7, 8001dc6 <HAL_RCCEx_PeriphCLKConfig+0x4e>
  4403. {
  4404. __HAL_RCC_PWR_CLK_DISABLE();
  4405. 8001dbe: 69e3 ldr r3, [r4, #28]
  4406. 8001dc0: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
  4407. 8001dc4: 61e3 str r3, [r4, #28]
  4408. }
  4409. }
  4410. /*------------------------------ ADC clock Configuration ------------------*/
  4411. if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
  4412. 8001dc6: 6830 ldr r0, [r6, #0]
  4413. 8001dc8: f010 0002 ands.w r0, r0, #2
  4414. 8001dcc: d01b beq.n 8001e06 <HAL_RCCEx_PeriphCLKConfig+0x8e>
  4415. {
  4416. /* Check the parameters */
  4417. assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
  4418. /* Configure the ADC clock source */
  4419. __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
  4420. 8001dce: 4a1e ldr r2, [pc, #120] ; (8001e48 <HAL_RCCEx_PeriphCLKConfig+0xd0>)
  4421. 8001dd0: 68b1 ldr r1, [r6, #8]
  4422. 8001dd2: 6853 ldr r3, [r2, #4]
  4423. /* Configure the USB clock source */
  4424. __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
  4425. }
  4426. #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
  4427. return HAL_OK;
  4428. 8001dd4: 2000 movs r0, #0
  4429. __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
  4430. 8001dd6: f423 4340 bic.w r3, r3, #49152 ; 0xc000
  4431. 8001dda: 430b orrs r3, r1
  4432. 8001ddc: 6053 str r3, [r2, #4]
  4433. 8001dde: e012 b.n 8001e06 <HAL_RCCEx_PeriphCLKConfig+0x8e>
  4434. FlagStatus pwrclkchanged = RESET;
  4435. 8001de0: 2700 movs r7, #0
  4436. 8001de2: e7dd b.n 8001da0 <HAL_RCCEx_PeriphCLKConfig+0x28>
  4437. SET_BIT(PWR->CR, PWR_CR_DBP);
  4438. 8001de4: 682b ldr r3, [r5, #0]
  4439. 8001de6: f443 7380 orr.w r3, r3, #256 ; 0x100
  4440. 8001dea: 602b str r3, [r5, #0]
  4441. tickstart = HAL_GetTick();
  4442. 8001dec: f7fe fa4c bl 8000288 <HAL_GetTick>
  4443. 8001df0: 4680 mov r8, r0
  4444. while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  4445. 8001df2: 682b ldr r3, [r5, #0]
  4446. 8001df4: 05d9 lsls r1, r3, #23
  4447. 8001df6: d4d7 bmi.n 8001da8 <HAL_RCCEx_PeriphCLKConfig+0x30>
  4448. if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
  4449. 8001df8: f7fe fa46 bl 8000288 <HAL_GetTick>
  4450. 8001dfc: eba0 0008 sub.w r0, r0, r8
  4451. 8001e00: 2864 cmp r0, #100 ; 0x64
  4452. 8001e02: d9f6 bls.n 8001df2 <HAL_RCCEx_PeriphCLKConfig+0x7a>
  4453. return HAL_TIMEOUT;
  4454. 8001e04: 2003 movs r0, #3
  4455. }
  4456. 8001e06: b002 add sp, #8
  4457. 8001e08: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  4458. if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
  4459. 8001e0c: 6872 ldr r2, [r6, #4]
  4460. 8001e0e: f402 7240 and.w r2, r2, #768 ; 0x300
  4461. 8001e12: 4293 cmp r3, r2
  4462. 8001e14: d0cc beq.n 8001db0 <HAL_RCCEx_PeriphCLKConfig+0x38>
  4463. __HAL_RCC_BACKUPRESET_FORCE();
  4464. 8001e16: 2001 movs r0, #1
  4465. 8001e18: 4a0d ldr r2, [pc, #52] ; (8001e50 <HAL_RCCEx_PeriphCLKConfig+0xd8>)
  4466. temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
  4467. 8001e1a: 6a23 ldr r3, [r4, #32]
  4468. __HAL_RCC_BACKUPRESET_FORCE();
  4469. 8001e1c: 6010 str r0, [r2, #0]
  4470. __HAL_RCC_BACKUPRESET_RELEASE();
  4471. 8001e1e: 2000 movs r0, #0
  4472. temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
  4473. 8001e20: f423 7140 bic.w r1, r3, #768 ; 0x300
  4474. __HAL_RCC_BACKUPRESET_RELEASE();
  4475. 8001e24: 6010 str r0, [r2, #0]
  4476. if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
  4477. 8001e26: 07da lsls r2, r3, #31
  4478. RCC->BDCR = temp_reg;
  4479. 8001e28: 6221 str r1, [r4, #32]
  4480. if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
  4481. 8001e2a: d5c1 bpl.n 8001db0 <HAL_RCCEx_PeriphCLKConfig+0x38>
  4482. tickstart = HAL_GetTick();
  4483. 8001e2c: f7fe fa2c bl 8000288 <HAL_GetTick>
  4484. if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
  4485. 8001e30: f241 3888 movw r8, #5000 ; 0x1388
  4486. tickstart = HAL_GetTick();
  4487. 8001e34: 4605 mov r5, r0
  4488. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
  4489. 8001e36: 6a23 ldr r3, [r4, #32]
  4490. 8001e38: 079b lsls r3, r3, #30
  4491. 8001e3a: d4b9 bmi.n 8001db0 <HAL_RCCEx_PeriphCLKConfig+0x38>
  4492. if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
  4493. 8001e3c: f7fe fa24 bl 8000288 <HAL_GetTick>
  4494. 8001e40: 1b40 subs r0, r0, r5
  4495. 8001e42: 4540 cmp r0, r8
  4496. 8001e44: d9f7 bls.n 8001e36 <HAL_RCCEx_PeriphCLKConfig+0xbe>
  4497. 8001e46: e7dd b.n 8001e04 <HAL_RCCEx_PeriphCLKConfig+0x8c>
  4498. 8001e48: 40021000 .word 0x40021000
  4499. 8001e4c: 40007000 .word 0x40007000
  4500. 8001e50: 42420440 .word 0x42420440
  4501. 08001e54 <HAL_TIM_Base_Start_IT>:
  4502. {
  4503. /* Check the parameters */
  4504. assert_param(IS_TIM_INSTANCE(htim->Instance));
  4505. /* Enable the TIM Update interrupt */
  4506. __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
  4507. 8001e54: 6803 ldr r3, [r0, #0]
  4508. /* Enable the Peripheral */
  4509. __HAL_TIM_ENABLE(htim);
  4510. /* Return function status */
  4511. return HAL_OK;
  4512. }
  4513. 8001e56: 2000 movs r0, #0
  4514. __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
  4515. 8001e58: 68da ldr r2, [r3, #12]
  4516. 8001e5a: f042 0201 orr.w r2, r2, #1
  4517. 8001e5e: 60da str r2, [r3, #12]
  4518. __HAL_TIM_ENABLE(htim);
  4519. 8001e60: 681a ldr r2, [r3, #0]
  4520. 8001e62: f042 0201 orr.w r2, r2, #1
  4521. 8001e66: 601a str r2, [r3, #0]
  4522. }
  4523. 8001e68: 4770 bx lr
  4524. 08001e6a <HAL_TIM_OC_DelayElapsedCallback>:
  4525. 8001e6a: 4770 bx lr
  4526. 08001e6c <HAL_TIM_IC_CaptureCallback>:
  4527. 8001e6c: 4770 bx lr
  4528. 08001e6e <HAL_TIM_PWM_PulseFinishedCallback>:
  4529. 8001e6e: 4770 bx lr
  4530. 08001e70 <HAL_TIM_TriggerCallback>:
  4531. 8001e70: 4770 bx lr
  4532. 08001e72 <HAL_TIM_IRQHandler>:
  4533. * @retval None
  4534. */
  4535. void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
  4536. {
  4537. /* Capture compare 1 event */
  4538. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
  4539. 8001e72: 6803 ldr r3, [r0, #0]
  4540. {
  4541. 8001e74: b510 push {r4, lr}
  4542. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
  4543. 8001e76: 691a ldr r2, [r3, #16]
  4544. {
  4545. 8001e78: 4604 mov r4, r0
  4546. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
  4547. 8001e7a: 0791 lsls r1, r2, #30
  4548. 8001e7c: d50e bpl.n 8001e9c <HAL_TIM_IRQHandler+0x2a>
  4549. {
  4550. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
  4551. 8001e7e: 68da ldr r2, [r3, #12]
  4552. 8001e80: 0792 lsls r2, r2, #30
  4553. 8001e82: d50b bpl.n 8001e9c <HAL_TIM_IRQHandler+0x2a>
  4554. {
  4555. {
  4556. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
  4557. 8001e84: f06f 0202 mvn.w r2, #2
  4558. 8001e88: 611a str r2, [r3, #16]
  4559. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  4560. 8001e8a: 2201 movs r2, #1
  4561. /* Input capture event */
  4562. if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
  4563. 8001e8c: 699b ldr r3, [r3, #24]
  4564. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  4565. 8001e8e: 7702 strb r2, [r0, #28]
  4566. if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
  4567. 8001e90: 079b lsls r3, r3, #30
  4568. 8001e92: d077 beq.n 8001f84 <HAL_TIM_IRQHandler+0x112>
  4569. {
  4570. HAL_TIM_IC_CaptureCallback(htim);
  4571. 8001e94: f7ff ffea bl 8001e6c <HAL_TIM_IC_CaptureCallback>
  4572. else
  4573. {
  4574. HAL_TIM_OC_DelayElapsedCallback(htim);
  4575. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4576. }
  4577. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  4578. 8001e98: 2300 movs r3, #0
  4579. 8001e9a: 7723 strb r3, [r4, #28]
  4580. }
  4581. }
  4582. }
  4583. /* Capture compare 2 event */
  4584. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
  4585. 8001e9c: 6823 ldr r3, [r4, #0]
  4586. 8001e9e: 691a ldr r2, [r3, #16]
  4587. 8001ea0: 0750 lsls r0, r2, #29
  4588. 8001ea2: d510 bpl.n 8001ec6 <HAL_TIM_IRQHandler+0x54>
  4589. {
  4590. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
  4591. 8001ea4: 68da ldr r2, [r3, #12]
  4592. 8001ea6: 0751 lsls r1, r2, #29
  4593. 8001ea8: d50d bpl.n 8001ec6 <HAL_TIM_IRQHandler+0x54>
  4594. {
  4595. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
  4596. 8001eaa: f06f 0204 mvn.w r2, #4
  4597. 8001eae: 611a str r2, [r3, #16]
  4598. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  4599. 8001eb0: 2202 movs r2, #2
  4600. /* Input capture event */
  4601. if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
  4602. 8001eb2: 699b ldr r3, [r3, #24]
  4603. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  4604. 8001eb4: 7722 strb r2, [r4, #28]
  4605. if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
  4606. 8001eb6: f413 7f40 tst.w r3, #768 ; 0x300
  4607. {
  4608. HAL_TIM_IC_CaptureCallback(htim);
  4609. 8001eba: 4620 mov r0, r4
  4610. if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
  4611. 8001ebc: d068 beq.n 8001f90 <HAL_TIM_IRQHandler+0x11e>
  4612. HAL_TIM_IC_CaptureCallback(htim);
  4613. 8001ebe: f7ff ffd5 bl 8001e6c <HAL_TIM_IC_CaptureCallback>
  4614. else
  4615. {
  4616. HAL_TIM_OC_DelayElapsedCallback(htim);
  4617. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4618. }
  4619. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  4620. 8001ec2: 2300 movs r3, #0
  4621. 8001ec4: 7723 strb r3, [r4, #28]
  4622. }
  4623. }
  4624. /* Capture compare 3 event */
  4625. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
  4626. 8001ec6: 6823 ldr r3, [r4, #0]
  4627. 8001ec8: 691a ldr r2, [r3, #16]
  4628. 8001eca: 0712 lsls r2, r2, #28
  4629. 8001ecc: d50f bpl.n 8001eee <HAL_TIM_IRQHandler+0x7c>
  4630. {
  4631. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
  4632. 8001ece: 68da ldr r2, [r3, #12]
  4633. 8001ed0: 0710 lsls r0, r2, #28
  4634. 8001ed2: d50c bpl.n 8001eee <HAL_TIM_IRQHandler+0x7c>
  4635. {
  4636. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
  4637. 8001ed4: f06f 0208 mvn.w r2, #8
  4638. 8001ed8: 611a str r2, [r3, #16]
  4639. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  4640. 8001eda: 2204 movs r2, #4
  4641. /* Input capture event */
  4642. if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
  4643. 8001edc: 69db ldr r3, [r3, #28]
  4644. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  4645. 8001ede: 7722 strb r2, [r4, #28]
  4646. if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
  4647. 8001ee0: 0799 lsls r1, r3, #30
  4648. {
  4649. HAL_TIM_IC_CaptureCallback(htim);
  4650. 8001ee2: 4620 mov r0, r4
  4651. if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
  4652. 8001ee4: d05a beq.n 8001f9c <HAL_TIM_IRQHandler+0x12a>
  4653. HAL_TIM_IC_CaptureCallback(htim);
  4654. 8001ee6: f7ff ffc1 bl 8001e6c <HAL_TIM_IC_CaptureCallback>
  4655. else
  4656. {
  4657. HAL_TIM_OC_DelayElapsedCallback(htim);
  4658. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4659. }
  4660. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  4661. 8001eea: 2300 movs r3, #0
  4662. 8001eec: 7723 strb r3, [r4, #28]
  4663. }
  4664. }
  4665. /* Capture compare 4 event */
  4666. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
  4667. 8001eee: 6823 ldr r3, [r4, #0]
  4668. 8001ef0: 691a ldr r2, [r3, #16]
  4669. 8001ef2: 06d2 lsls r2, r2, #27
  4670. 8001ef4: d510 bpl.n 8001f18 <HAL_TIM_IRQHandler+0xa6>
  4671. {
  4672. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
  4673. 8001ef6: 68da ldr r2, [r3, #12]
  4674. 8001ef8: 06d0 lsls r0, r2, #27
  4675. 8001efa: d50d bpl.n 8001f18 <HAL_TIM_IRQHandler+0xa6>
  4676. {
  4677. __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
  4678. 8001efc: f06f 0210 mvn.w r2, #16
  4679. 8001f00: 611a str r2, [r3, #16]
  4680. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  4681. 8001f02: 2208 movs r2, #8
  4682. /* Input capture event */
  4683. if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
  4684. 8001f04: 69db ldr r3, [r3, #28]
  4685. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  4686. 8001f06: 7722 strb r2, [r4, #28]
  4687. if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
  4688. 8001f08: f413 7f40 tst.w r3, #768 ; 0x300
  4689. {
  4690. HAL_TIM_IC_CaptureCallback(htim);
  4691. 8001f0c: 4620 mov r0, r4
  4692. if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
  4693. 8001f0e: d04b beq.n 8001fa8 <HAL_TIM_IRQHandler+0x136>
  4694. HAL_TIM_IC_CaptureCallback(htim);
  4695. 8001f10: f7ff ffac bl 8001e6c <HAL_TIM_IC_CaptureCallback>
  4696. else
  4697. {
  4698. HAL_TIM_OC_DelayElapsedCallback(htim);
  4699. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4700. }
  4701. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  4702. 8001f14: 2300 movs r3, #0
  4703. 8001f16: 7723 strb r3, [r4, #28]
  4704. }
  4705. }
  4706. /* TIM Update event */
  4707. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
  4708. 8001f18: 6823 ldr r3, [r4, #0]
  4709. 8001f1a: 691a ldr r2, [r3, #16]
  4710. 8001f1c: 07d1 lsls r1, r2, #31
  4711. 8001f1e: d508 bpl.n 8001f32 <HAL_TIM_IRQHandler+0xc0>
  4712. {
  4713. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
  4714. 8001f20: 68da ldr r2, [r3, #12]
  4715. 8001f22: 07d2 lsls r2, r2, #31
  4716. 8001f24: d505 bpl.n 8001f32 <HAL_TIM_IRQHandler+0xc0>
  4717. {
  4718. __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
  4719. 8001f26: f06f 0201 mvn.w r2, #1
  4720. HAL_TIM_PeriodElapsedCallback(htim);
  4721. 8001f2a: 4620 mov r0, r4
  4722. __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
  4723. 8001f2c: 611a str r2, [r3, #16]
  4724. HAL_TIM_PeriodElapsedCallback(htim);
  4725. 8001f2e: f000 fe17 bl 8002b60 <HAL_TIM_PeriodElapsedCallback>
  4726. }
  4727. }
  4728. /* TIM Break input event */
  4729. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
  4730. 8001f32: 6823 ldr r3, [r4, #0]
  4731. 8001f34: 691a ldr r2, [r3, #16]
  4732. 8001f36: 0610 lsls r0, r2, #24
  4733. 8001f38: d508 bpl.n 8001f4c <HAL_TIM_IRQHandler+0xda>
  4734. {
  4735. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
  4736. 8001f3a: 68da ldr r2, [r3, #12]
  4737. 8001f3c: 0611 lsls r1, r2, #24
  4738. 8001f3e: d505 bpl.n 8001f4c <HAL_TIM_IRQHandler+0xda>
  4739. {
  4740. __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
  4741. 8001f40: f06f 0280 mvn.w r2, #128 ; 0x80
  4742. HAL_TIMEx_BreakCallback(htim);
  4743. 8001f44: 4620 mov r0, r4
  4744. __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
  4745. 8001f46: 611a str r2, [r3, #16]
  4746. HAL_TIMEx_BreakCallback(htim);
  4747. 8001f48: f000 f8c5 bl 80020d6 <HAL_TIMEx_BreakCallback>
  4748. }
  4749. }
  4750. /* TIM Trigger detection event */
  4751. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
  4752. 8001f4c: 6823 ldr r3, [r4, #0]
  4753. 8001f4e: 691a ldr r2, [r3, #16]
  4754. 8001f50: 0652 lsls r2, r2, #25
  4755. 8001f52: d508 bpl.n 8001f66 <HAL_TIM_IRQHandler+0xf4>
  4756. {
  4757. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
  4758. 8001f54: 68da ldr r2, [r3, #12]
  4759. 8001f56: 0650 lsls r0, r2, #25
  4760. 8001f58: d505 bpl.n 8001f66 <HAL_TIM_IRQHandler+0xf4>
  4761. {
  4762. __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
  4763. 8001f5a: f06f 0240 mvn.w r2, #64 ; 0x40
  4764. HAL_TIM_TriggerCallback(htim);
  4765. 8001f5e: 4620 mov r0, r4
  4766. __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
  4767. 8001f60: 611a str r2, [r3, #16]
  4768. HAL_TIM_TriggerCallback(htim);
  4769. 8001f62: f7ff ff85 bl 8001e70 <HAL_TIM_TriggerCallback>
  4770. }
  4771. }
  4772. /* TIM commutation event */
  4773. if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
  4774. 8001f66: 6823 ldr r3, [r4, #0]
  4775. 8001f68: 691a ldr r2, [r3, #16]
  4776. 8001f6a: 0691 lsls r1, r2, #26
  4777. 8001f6c: d522 bpl.n 8001fb4 <HAL_TIM_IRQHandler+0x142>
  4778. {
  4779. if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
  4780. 8001f6e: 68da ldr r2, [r3, #12]
  4781. 8001f70: 0692 lsls r2, r2, #26
  4782. 8001f72: d51f bpl.n 8001fb4 <HAL_TIM_IRQHandler+0x142>
  4783. {
  4784. __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
  4785. 8001f74: f06f 0220 mvn.w r2, #32
  4786. HAL_TIMEx_CommutationCallback(htim);
  4787. 8001f78: 4620 mov r0, r4
  4788. }
  4789. }
  4790. }
  4791. 8001f7a: e8bd 4010 ldmia.w sp!, {r4, lr}
  4792. __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
  4793. 8001f7e: 611a str r2, [r3, #16]
  4794. HAL_TIMEx_CommutationCallback(htim);
  4795. 8001f80: f000 b8a8 b.w 80020d4 <HAL_TIMEx_CommutationCallback>
  4796. HAL_TIM_OC_DelayElapsedCallback(htim);
  4797. 8001f84: f7ff ff71 bl 8001e6a <HAL_TIM_OC_DelayElapsedCallback>
  4798. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4799. 8001f88: 4620 mov r0, r4
  4800. 8001f8a: f7ff ff70 bl 8001e6e <HAL_TIM_PWM_PulseFinishedCallback>
  4801. 8001f8e: e783 b.n 8001e98 <HAL_TIM_IRQHandler+0x26>
  4802. HAL_TIM_OC_DelayElapsedCallback(htim);
  4803. 8001f90: f7ff ff6b bl 8001e6a <HAL_TIM_OC_DelayElapsedCallback>
  4804. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4805. 8001f94: 4620 mov r0, r4
  4806. 8001f96: f7ff ff6a bl 8001e6e <HAL_TIM_PWM_PulseFinishedCallback>
  4807. 8001f9a: e792 b.n 8001ec2 <HAL_TIM_IRQHandler+0x50>
  4808. HAL_TIM_OC_DelayElapsedCallback(htim);
  4809. 8001f9c: f7ff ff65 bl 8001e6a <HAL_TIM_OC_DelayElapsedCallback>
  4810. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4811. 8001fa0: 4620 mov r0, r4
  4812. 8001fa2: f7ff ff64 bl 8001e6e <HAL_TIM_PWM_PulseFinishedCallback>
  4813. 8001fa6: e7a0 b.n 8001eea <HAL_TIM_IRQHandler+0x78>
  4814. HAL_TIM_OC_DelayElapsedCallback(htim);
  4815. 8001fa8: f7ff ff5f bl 8001e6a <HAL_TIM_OC_DelayElapsedCallback>
  4816. HAL_TIM_PWM_PulseFinishedCallback(htim);
  4817. 8001fac: 4620 mov r0, r4
  4818. 8001fae: f7ff ff5e bl 8001e6e <HAL_TIM_PWM_PulseFinishedCallback>
  4819. 8001fb2: e7af b.n 8001f14 <HAL_TIM_IRQHandler+0xa2>
  4820. 8001fb4: bd10 pop {r4, pc}
  4821. ...
  4822. 08001fb8 <TIM_Base_SetConfig>:
  4823. {
  4824. uint32_t tmpcr1 = 0U;
  4825. tmpcr1 = TIMx->CR1;
  4826. /* Set TIM Time Base Unit parameters ---------------------------------------*/
  4827. if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
  4828. 8001fb8: 4a26 ldr r2, [pc, #152] ; (8002054 <TIM_Base_SetConfig+0x9c>)
  4829. tmpcr1 = TIMx->CR1;
  4830. 8001fba: 6803 ldr r3, [r0, #0]
  4831. if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
  4832. 8001fbc: 4290 cmp r0, r2
  4833. 8001fbe: d00a beq.n 8001fd6 <TIM_Base_SetConfig+0x1e>
  4834. 8001fc0: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000
  4835. 8001fc4: d007 beq.n 8001fd6 <TIM_Base_SetConfig+0x1e>
  4836. 8001fc6: f5a2 3294 sub.w r2, r2, #75776 ; 0x12800
  4837. 8001fca: 4290 cmp r0, r2
  4838. 8001fcc: d003 beq.n 8001fd6 <TIM_Base_SetConfig+0x1e>
  4839. 8001fce: f502 6280 add.w r2, r2, #1024 ; 0x400
  4840. 8001fd2: 4290 cmp r0, r2
  4841. 8001fd4: d111 bne.n 8001ffa <TIM_Base_SetConfig+0x42>
  4842. {
  4843. /* Select the Counter Mode */
  4844. tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
  4845. tmpcr1 |= Structure->CounterMode;
  4846. 8001fd6: 684a ldr r2, [r1, #4]
  4847. tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
  4848. 8001fd8: f023 0370 bic.w r3, r3, #112 ; 0x70
  4849. tmpcr1 |= Structure->CounterMode;
  4850. 8001fdc: 4313 orrs r3, r2
  4851. }
  4852. if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
  4853. 8001fde: 4a1d ldr r2, [pc, #116] ; (8002054 <TIM_Base_SetConfig+0x9c>)
  4854. 8001fe0: 4290 cmp r0, r2
  4855. 8001fe2: d015 beq.n 8002010 <TIM_Base_SetConfig+0x58>
  4856. 8001fe4: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000
  4857. 8001fe8: d012 beq.n 8002010 <TIM_Base_SetConfig+0x58>
  4858. 8001fea: f5a2 3294 sub.w r2, r2, #75776 ; 0x12800
  4859. 8001fee: 4290 cmp r0, r2
  4860. 8001ff0: d00e beq.n 8002010 <TIM_Base_SetConfig+0x58>
  4861. 8001ff2: f502 6280 add.w r2, r2, #1024 ; 0x400
  4862. 8001ff6: 4290 cmp r0, r2
  4863. 8001ff8: d00a beq.n 8002010 <TIM_Base_SetConfig+0x58>
  4864. 8001ffa: 4a17 ldr r2, [pc, #92] ; (8002058 <TIM_Base_SetConfig+0xa0>)
  4865. 8001ffc: 4290 cmp r0, r2
  4866. 8001ffe: d007 beq.n 8002010 <TIM_Base_SetConfig+0x58>
  4867. 8002000: f502 6280 add.w r2, r2, #1024 ; 0x400
  4868. 8002004: 4290 cmp r0, r2
  4869. 8002006: d003 beq.n 8002010 <TIM_Base_SetConfig+0x58>
  4870. 8002008: f502 6280 add.w r2, r2, #1024 ; 0x400
  4871. 800200c: 4290 cmp r0, r2
  4872. 800200e: d103 bne.n 8002018 <TIM_Base_SetConfig+0x60>
  4873. {
  4874. /* Set the clock division */
  4875. tmpcr1 &= ~TIM_CR1_CKD;
  4876. tmpcr1 |= (uint32_t)Structure->ClockDivision;
  4877. 8002010: 68ca ldr r2, [r1, #12]
  4878. tmpcr1 &= ~TIM_CR1_CKD;
  4879. 8002012: f423 7340 bic.w r3, r3, #768 ; 0x300
  4880. tmpcr1 |= (uint32_t)Structure->ClockDivision;
  4881. 8002016: 4313 orrs r3, r2
  4882. }
  4883. /* Set the auto-reload preload */
  4884. tmpcr1 &= ~TIM_CR1_ARPE;
  4885. tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
  4886. 8002018: 694a ldr r2, [r1, #20]
  4887. tmpcr1 &= ~TIM_CR1_ARPE;
  4888. 800201a: f023 0380 bic.w r3, r3, #128 ; 0x80
  4889. tmpcr1 |= (uint32_t)Structure->AutoReloadPreload;
  4890. 800201e: 4313 orrs r3, r2
  4891. TIMx->CR1 = tmpcr1;
  4892. 8002020: 6003 str r3, [r0, #0]
  4893. /* Set the Autoreload value */
  4894. TIMx->ARR = (uint32_t)Structure->Period ;
  4895. 8002022: 688b ldr r3, [r1, #8]
  4896. 8002024: 62c3 str r3, [r0, #44] ; 0x2c
  4897. /* Set the Prescaler value */
  4898. TIMx->PSC = (uint32_t)Structure->Prescaler;
  4899. 8002026: 680b ldr r3, [r1, #0]
  4900. 8002028: 6283 str r3, [r0, #40] ; 0x28
  4901. if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
  4902. 800202a: 4b0a ldr r3, [pc, #40] ; (8002054 <TIM_Base_SetConfig+0x9c>)
  4903. 800202c: 4298 cmp r0, r3
  4904. 800202e: d00b beq.n 8002048 <TIM_Base_SetConfig+0x90>
  4905. 8002030: f503 53a0 add.w r3, r3, #5120 ; 0x1400
  4906. 8002034: 4298 cmp r0, r3
  4907. 8002036: d007 beq.n 8002048 <TIM_Base_SetConfig+0x90>
  4908. 8002038: f503 6380 add.w r3, r3, #1024 ; 0x400
  4909. 800203c: 4298 cmp r0, r3
  4910. 800203e: d003 beq.n 8002048 <TIM_Base_SetConfig+0x90>
  4911. 8002040: f503 6380 add.w r3, r3, #1024 ; 0x400
  4912. 8002044: 4298 cmp r0, r3
  4913. 8002046: d101 bne.n 800204c <TIM_Base_SetConfig+0x94>
  4914. {
  4915. /* Set the Repetition Counter value */
  4916. TIMx->RCR = Structure->RepetitionCounter;
  4917. 8002048: 690b ldr r3, [r1, #16]
  4918. 800204a: 6303 str r3, [r0, #48] ; 0x30
  4919. }
  4920. /* Generate an update event to reload the Prescaler
  4921. and the repetition counter(only for TIM1 and TIM8) value immediatly */
  4922. TIMx->EGR = TIM_EGR_UG;
  4923. 800204c: 2301 movs r3, #1
  4924. 800204e: 6143 str r3, [r0, #20]
  4925. 8002050: 4770 bx lr
  4926. 8002052: bf00 nop
  4927. 8002054: 40012c00 .word 0x40012c00
  4928. 8002058: 40014000 .word 0x40014000
  4929. 0800205c <HAL_TIM_Base_Init>:
  4930. {
  4931. 800205c: b510 push {r4, lr}
  4932. if(htim == NULL)
  4933. 800205e: 4604 mov r4, r0
  4934. 8002060: b1a0 cbz r0, 800208c <HAL_TIM_Base_Init+0x30>
  4935. if(htim->State == HAL_TIM_STATE_RESET)
  4936. 8002062: f890 303d ldrb.w r3, [r0, #61] ; 0x3d
  4937. 8002066: f003 02ff and.w r2, r3, #255 ; 0xff
  4938. 800206a: b91b cbnz r3, 8002074 <HAL_TIM_Base_Init+0x18>
  4939. htim->Lock = HAL_UNLOCKED;
  4940. 800206c: f880 203c strb.w r2, [r0, #60] ; 0x3c
  4941. HAL_TIM_Base_MspInit(htim);
  4942. 8002070: f001 f830 bl 80030d4 <HAL_TIM_Base_MspInit>
  4943. htim->State= HAL_TIM_STATE_BUSY;
  4944. 8002074: 2302 movs r3, #2
  4945. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  4946. 8002076: 6820 ldr r0, [r4, #0]
  4947. htim->State= HAL_TIM_STATE_BUSY;
  4948. 8002078: f884 303d strb.w r3, [r4, #61] ; 0x3d
  4949. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  4950. 800207c: 1d21 adds r1, r4, #4
  4951. 800207e: f7ff ff9b bl 8001fb8 <TIM_Base_SetConfig>
  4952. htim->State= HAL_TIM_STATE_READY;
  4953. 8002082: 2301 movs r3, #1
  4954. return HAL_OK;
  4955. 8002084: 2000 movs r0, #0
  4956. htim->State= HAL_TIM_STATE_READY;
  4957. 8002086: f884 303d strb.w r3, [r4, #61] ; 0x3d
  4958. return HAL_OK;
  4959. 800208a: bd10 pop {r4, pc}
  4960. return HAL_ERROR;
  4961. 800208c: 2001 movs r0, #1
  4962. }
  4963. 800208e: bd10 pop {r4, pc}
  4964. 08002090 <HAL_TIMEx_MasterConfigSynchronization>:
  4965. /* Check the parameters */
  4966. assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  4967. assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  4968. assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  4969. __HAL_LOCK(htim);
  4970. 8002090: f890 303c ldrb.w r3, [r0, #60] ; 0x3c
  4971. {
  4972. 8002094: b510 push {r4, lr}
  4973. __HAL_LOCK(htim);
  4974. 8002096: 2b01 cmp r3, #1
  4975. 8002098: f04f 0302 mov.w r3, #2
  4976. 800209c: d018 beq.n 80020d0 <HAL_TIMEx_MasterConfigSynchronization+0x40>
  4977. htim->State = HAL_TIM_STATE_BUSY;
  4978. 800209e: f880 303d strb.w r3, [r0, #61] ; 0x3d
  4979. /* Reset the MMS Bits */
  4980. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  4981. 80020a2: 6803 ldr r3, [r0, #0]
  4982. /* Select the TRGO source */
  4983. htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
  4984. 80020a4: 680c ldr r4, [r1, #0]
  4985. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  4986. 80020a6: 685a ldr r2, [r3, #4]
  4987. /* Reset the MSM Bit */
  4988. htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  4989. /* Set or Reset the MSM Bit */
  4990. htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
  4991. 80020a8: 6849 ldr r1, [r1, #4]
  4992. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  4993. 80020aa: f022 0270 bic.w r2, r2, #112 ; 0x70
  4994. 80020ae: 605a str r2, [r3, #4]
  4995. htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger;
  4996. 80020b0: 685a ldr r2, [r3, #4]
  4997. 80020b2: 4322 orrs r2, r4
  4998. 80020b4: 605a str r2, [r3, #4]
  4999. htim->Instance->SMCR &= ~TIM_SMCR_MSM;
  5000. 80020b6: 689a ldr r2, [r3, #8]
  5001. 80020b8: f022 0280 bic.w r2, r2, #128 ; 0x80
  5002. 80020bc: 609a str r2, [r3, #8]
  5003. htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
  5004. 80020be: 689a ldr r2, [r3, #8]
  5005. 80020c0: 430a orrs r2, r1
  5006. 80020c2: 609a str r2, [r3, #8]
  5007. htim->State = HAL_TIM_STATE_READY;
  5008. 80020c4: 2301 movs r3, #1
  5009. 80020c6: f880 303d strb.w r3, [r0, #61] ; 0x3d
  5010. __HAL_UNLOCK(htim);
  5011. 80020ca: 2300 movs r3, #0
  5012. 80020cc: f880 303c strb.w r3, [r0, #60] ; 0x3c
  5013. __HAL_LOCK(htim);
  5014. 80020d0: 4618 mov r0, r3
  5015. return HAL_OK;
  5016. }
  5017. 80020d2: bd10 pop {r4, pc}
  5018. 080020d4 <HAL_TIMEx_CommutationCallback>:
  5019. 80020d4: 4770 bx lr
  5020. 080020d6 <HAL_TIMEx_BreakCallback>:
  5021. * @brief Hall Break detection callback in non blocking mode
  5022. * @param htim : TIM handle
  5023. * @retval None
  5024. */
  5025. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  5026. {
  5027. 80020d6: 4770 bx lr
  5028. 080020d8 <UART_EndRxTransfer>:
  5029. * @retval None
  5030. */
  5031. static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
  5032. {
  5033. /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  5034. CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
  5035. 80020d8: 6803 ldr r3, [r0, #0]
  5036. 80020da: 68da ldr r2, [r3, #12]
  5037. 80020dc: f422 7290 bic.w r2, r2, #288 ; 0x120
  5038. 80020e0: 60da str r2, [r3, #12]
  5039. CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
  5040. 80020e2: 695a ldr r2, [r3, #20]
  5041. 80020e4: f022 0201 bic.w r2, r2, #1
  5042. 80020e8: 615a str r2, [r3, #20]
  5043. /* At end of Rx process, restore huart->RxState to Ready */
  5044. huart->RxState = HAL_UART_STATE_READY;
  5045. 80020ea: 2320 movs r3, #32
  5046. 80020ec: f880 303a strb.w r3, [r0, #58] ; 0x3a
  5047. 80020f0: 4770 bx lr
  5048. ...
  5049. 080020f4 <UART_SetConfig>:
  5050. * @param huart: pointer to a UART_HandleTypeDef structure that contains
  5051. * the configuration information for the specified UART module.
  5052. * @retval None
  5053. */
  5054. static void UART_SetConfig(UART_HandleTypeDef *huart)
  5055. {
  5056. 80020f4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  5057. 80020f8: 4681 mov r9, r0
  5058. assert_param(IS_UART_MODE(huart->Init.Mode));
  5059. /*------- UART-associated USART registers setting : CR2 Configuration ------*/
  5060. /* Configure the UART Stop Bits: Set STOP[13:12] bits according
  5061. * to huart->Init.StopBits value */
  5062. MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
  5063. 80020fa: 6805 ldr r5, [r0, #0]
  5064. 80020fc: 68c2 ldr r2, [r0, #12]
  5065. 80020fe: 692b ldr r3, [r5, #16]
  5066. Set PCE and PS bits according to huart->Init.Parity value
  5067. Set TE and RE bits according to huart->Init.Mode value
  5068. Set OVER8 bit according to huart->Init.OverSampling value */
  5069. #if defined(USART_CR1_OVER8)
  5070. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  5071. 8002100: 69c1 ldr r1, [r0, #28]
  5072. MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
  5073. 8002102: f423 5340 bic.w r3, r3, #12288 ; 0x3000
  5074. 8002106: 4313 orrs r3, r2
  5075. 8002108: 612b str r3, [r5, #16]
  5076. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  5077. 800210a: 6883 ldr r3, [r0, #8]
  5078. 800210c: 6900 ldr r0, [r0, #16]
  5079. MODIFY_REG(huart->Instance->CR1,
  5080. 800210e: 68ea ldr r2, [r5, #12]
  5081. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  5082. 8002110: 4303 orrs r3, r0
  5083. 8002112: f8d9 0014 ldr.w r0, [r9, #20]
  5084. MODIFY_REG(huart->Instance->CR1,
  5085. 8002116: f422 4216 bic.w r2, r2, #38400 ; 0x9600
  5086. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  5087. 800211a: 4303 orrs r3, r0
  5088. MODIFY_REG(huart->Instance->CR1,
  5089. 800211c: f022 020c bic.w r2, r2, #12
  5090. tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  5091. 8002120: 430b orrs r3, r1
  5092. MODIFY_REG(huart->Instance->CR1,
  5093. 8002122: 4313 orrs r3, r2
  5094. 8002124: 60eb str r3, [r5, #12]
  5095. tmpreg);
  5096. #endif /* USART_CR1_OVER8 */
  5097. /*------- UART-associated USART registers setting : CR3 Configuration ------*/
  5098. /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  5099. MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
  5100. 8002126: 696b ldr r3, [r5, #20]
  5101. 8002128: f8d9 2018 ldr.w r2, [r9, #24]
  5102. 800212c: f423 7340 bic.w r3, r3, #768 ; 0x300
  5103. 8002130: 4313 orrs r3, r2
  5104. #if defined(USART_CR1_OVER8)
  5105. /* Check the Over Sampling */
  5106. if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
  5107. 8002132: f5b1 4f00 cmp.w r1, #32768 ; 0x8000
  5108. MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
  5109. 8002136: 616b str r3, [r5, #20]
  5110. 8002138: 4b7e ldr r3, [pc, #504] ; (8002334 <UART_SetConfig+0x240>)
  5111. if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
  5112. 800213a: d17f bne.n 800223c <UART_SetConfig+0x148>
  5113. {
  5114. /*-------------------------- USART BRR Configuration ---------------------*/
  5115. if(huart->Instance == USART1)
  5116. 800213c: 429d cmp r5, r3
  5117. 800213e: f04f 0419 mov.w r4, #25
  5118. 8002142: d147 bne.n 80021d4 <UART_SetConfig+0xe0>
  5119. {
  5120. huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
  5121. 8002144: f7ff fe08 bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5122. 8002148: fb04 f300 mul.w r3, r4, r0
  5123. 800214c: f8d9 7004 ldr.w r7, [r9, #4]
  5124. 8002150: f04f 0864 mov.w r8, #100 ; 0x64
  5125. 8002154: 007f lsls r7, r7, #1
  5126. 8002156: fbb3 f3f7 udiv r3, r3, r7
  5127. 800215a: fbb3 f3f8 udiv r3, r3, r8
  5128. 800215e: 011f lsls r7, r3, #4
  5129. 8002160: f7ff fdfa bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5130. 8002164: 4360 muls r0, r4
  5131. 8002166: f8d9 3004 ldr.w r3, [r9, #4]
  5132. 800216a: 005b lsls r3, r3, #1
  5133. 800216c: fbb0 f6f3 udiv r6, r0, r3
  5134. 8002170: f7ff fdf2 bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5135. 8002174: 4360 muls r0, r4
  5136. 8002176: f8d9 3004 ldr.w r3, [r9, #4]
  5137. 800217a: 005b lsls r3, r3, #1
  5138. 800217c: fbb0 f3f3 udiv r3, r0, r3
  5139. 8002180: fbb3 f3f8 udiv r3, r3, r8
  5140. 8002184: fb08 6313 mls r3, r8, r3, r6
  5141. 8002188: 00db lsls r3, r3, #3
  5142. 800218a: 3332 adds r3, #50 ; 0x32
  5143. 800218c: fbb3 f3f8 udiv r3, r3, r8
  5144. 8002190: 005b lsls r3, r3, #1
  5145. 8002192: f403 76f8 and.w r6, r3, #496 ; 0x1f0
  5146. 8002196: f7ff fddf bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5147. 800219a: 4360 muls r0, r4
  5148. 800219c: f8d9 2004 ldr.w r2, [r9, #4]
  5149. 80021a0: 0052 lsls r2, r2, #1
  5150. 80021a2: fbb0 faf2 udiv sl, r0, r2
  5151. 80021a6: f7ff fdd7 bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5152. }
  5153. else
  5154. {
  5155. huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
  5156. 80021aa: 4360 muls r0, r4
  5157. 80021ac: f8d9 3004 ldr.w r3, [r9, #4]
  5158. 80021b0: 005b lsls r3, r3, #1
  5159. 80021b2: fbb0 f3f3 udiv r3, r0, r3
  5160. 80021b6: fbb3 f3f8 udiv r3, r3, r8
  5161. 80021ba: fb08 a313 mls r3, r8, r3, sl
  5162. 80021be: 00db lsls r3, r3, #3
  5163. 80021c0: 3332 adds r3, #50 ; 0x32
  5164. 80021c2: fbb3 f3f8 udiv r3, r3, r8
  5165. 80021c6: f003 0307 and.w r3, r3, #7
  5166. 80021ca: 443b add r3, r7
  5167. {
  5168. huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
  5169. }
  5170. else
  5171. {
  5172. huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
  5173. 80021cc: 4433 add r3, r6
  5174. 80021ce: 60ab str r3, [r5, #8]
  5175. 80021d0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  5176. huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
  5177. 80021d4: f7ff fdb0 bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5178. 80021d8: fb04 f300 mul.w r3, r4, r0
  5179. 80021dc: f8d9 7004 ldr.w r7, [r9, #4]
  5180. 80021e0: f04f 0864 mov.w r8, #100 ; 0x64
  5181. 80021e4: 007f lsls r7, r7, #1
  5182. 80021e6: fbb3 f3f7 udiv r3, r3, r7
  5183. 80021ea: fbb3 f3f8 udiv r3, r3, r8
  5184. 80021ee: 011f lsls r7, r3, #4
  5185. 80021f0: f7ff fda2 bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5186. 80021f4: 4360 muls r0, r4
  5187. 80021f6: f8d9 3004 ldr.w r3, [r9, #4]
  5188. 80021fa: 005b lsls r3, r3, #1
  5189. 80021fc: fbb0 f6f3 udiv r6, r0, r3
  5190. 8002200: f7ff fd9a bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5191. 8002204: 4360 muls r0, r4
  5192. 8002206: f8d9 3004 ldr.w r3, [r9, #4]
  5193. 800220a: 005b lsls r3, r3, #1
  5194. 800220c: fbb0 f3f3 udiv r3, r0, r3
  5195. 8002210: fbb3 f3f8 udiv r3, r3, r8
  5196. 8002214: fb08 6313 mls r3, r8, r3, r6
  5197. 8002218: 00db lsls r3, r3, #3
  5198. 800221a: 3332 adds r3, #50 ; 0x32
  5199. 800221c: fbb3 f3f8 udiv r3, r3, r8
  5200. 8002220: 005b lsls r3, r3, #1
  5201. 8002222: f403 76f8 and.w r6, r3, #496 ; 0x1f0
  5202. 8002226: f7ff fd87 bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5203. 800222a: 4360 muls r0, r4
  5204. 800222c: f8d9 2004 ldr.w r2, [r9, #4]
  5205. 8002230: 0052 lsls r2, r2, #1
  5206. 8002232: fbb0 faf2 udiv sl, r0, r2
  5207. 8002236: f7ff fd7f bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5208. 800223a: e7b6 b.n 80021aa <UART_SetConfig+0xb6>
  5209. if(huart->Instance == USART1)
  5210. 800223c: 429d cmp r5, r3
  5211. 800223e: f04f 0419 mov.w r4, #25
  5212. 8002242: d143 bne.n 80022cc <UART_SetConfig+0x1d8>
  5213. huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
  5214. 8002244: f7ff fd88 bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5215. 8002248: fb04 f300 mul.w r3, r4, r0
  5216. 800224c: f8d9 6004 ldr.w r6, [r9, #4]
  5217. 8002250: f04f 0864 mov.w r8, #100 ; 0x64
  5218. 8002254: 00b6 lsls r6, r6, #2
  5219. 8002256: fbb3 f3f6 udiv r3, r3, r6
  5220. 800225a: fbb3 f3f8 udiv r3, r3, r8
  5221. 800225e: 011e lsls r6, r3, #4
  5222. 8002260: f7ff fd7a bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5223. 8002264: 4360 muls r0, r4
  5224. 8002266: f8d9 3004 ldr.w r3, [r9, #4]
  5225. 800226a: 009b lsls r3, r3, #2
  5226. 800226c: fbb0 f7f3 udiv r7, r0, r3
  5227. 8002270: f7ff fd72 bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5228. 8002274: 4360 muls r0, r4
  5229. 8002276: f8d9 3004 ldr.w r3, [r9, #4]
  5230. 800227a: 009b lsls r3, r3, #2
  5231. 800227c: fbb0 f3f3 udiv r3, r0, r3
  5232. 8002280: fbb3 f3f8 udiv r3, r3, r8
  5233. 8002284: fb08 7313 mls r3, r8, r3, r7
  5234. 8002288: 011b lsls r3, r3, #4
  5235. 800228a: 3332 adds r3, #50 ; 0x32
  5236. 800228c: fbb3 f3f8 udiv r3, r3, r8
  5237. 8002290: f003 07f0 and.w r7, r3, #240 ; 0xf0
  5238. 8002294: f7ff fd60 bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5239. 8002298: 4360 muls r0, r4
  5240. 800229a: f8d9 2004 ldr.w r2, [r9, #4]
  5241. 800229e: 0092 lsls r2, r2, #2
  5242. 80022a0: fbb0 faf2 udiv sl, r0, r2
  5243. 80022a4: f7ff fd58 bl 8001d58 <HAL_RCC_GetPCLK2Freq>
  5244. huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
  5245. 80022a8: 4360 muls r0, r4
  5246. 80022aa: f8d9 3004 ldr.w r3, [r9, #4]
  5247. 80022ae: 009b lsls r3, r3, #2
  5248. 80022b0: fbb0 f3f3 udiv r3, r0, r3
  5249. 80022b4: fbb3 f3f8 udiv r3, r3, r8
  5250. 80022b8: fb08 a313 mls r3, r8, r3, sl
  5251. 80022bc: 011b lsls r3, r3, #4
  5252. 80022be: 3332 adds r3, #50 ; 0x32
  5253. 80022c0: fbb3 f3f8 udiv r3, r3, r8
  5254. 80022c4: f003 030f and.w r3, r3, #15
  5255. 80022c8: 433b orrs r3, r7
  5256. 80022ca: e77f b.n 80021cc <UART_SetConfig+0xd8>
  5257. 80022cc: f7ff fd34 bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5258. 80022d0: fb04 f300 mul.w r3, r4, r0
  5259. 80022d4: f8d9 6004 ldr.w r6, [r9, #4]
  5260. 80022d8: f04f 0864 mov.w r8, #100 ; 0x64
  5261. 80022dc: 00b6 lsls r6, r6, #2
  5262. 80022de: fbb3 f3f6 udiv r3, r3, r6
  5263. 80022e2: fbb3 f3f8 udiv r3, r3, r8
  5264. 80022e6: 011e lsls r6, r3, #4
  5265. 80022e8: f7ff fd26 bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5266. 80022ec: 4360 muls r0, r4
  5267. 80022ee: f8d9 3004 ldr.w r3, [r9, #4]
  5268. 80022f2: 009b lsls r3, r3, #2
  5269. 80022f4: fbb0 f7f3 udiv r7, r0, r3
  5270. 80022f8: f7ff fd1e bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5271. 80022fc: 4360 muls r0, r4
  5272. 80022fe: f8d9 3004 ldr.w r3, [r9, #4]
  5273. 8002302: 009b lsls r3, r3, #2
  5274. 8002304: fbb0 f3f3 udiv r3, r0, r3
  5275. 8002308: fbb3 f3f8 udiv r3, r3, r8
  5276. 800230c: fb08 7313 mls r3, r8, r3, r7
  5277. 8002310: 011b lsls r3, r3, #4
  5278. 8002312: 3332 adds r3, #50 ; 0x32
  5279. 8002314: fbb3 f3f8 udiv r3, r3, r8
  5280. 8002318: f003 07f0 and.w r7, r3, #240 ; 0xf0
  5281. 800231c: f7ff fd0c bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5282. 8002320: 4360 muls r0, r4
  5283. 8002322: f8d9 2004 ldr.w r2, [r9, #4]
  5284. 8002326: 0092 lsls r2, r2, #2
  5285. 8002328: fbb0 faf2 udiv sl, r0, r2
  5286. 800232c: f7ff fd04 bl 8001d38 <HAL_RCC_GetPCLK1Freq>
  5287. 8002330: e7ba b.n 80022a8 <UART_SetConfig+0x1b4>
  5288. 8002332: bf00 nop
  5289. 8002334: 40013800 .word 0x40013800
  5290. 08002338 <UART_WaitOnFlagUntilTimeout.constprop.3>:
  5291. static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
  5292. 8002338: b5f8 push {r3, r4, r5, r6, r7, lr}
  5293. 800233a: 4604 mov r4, r0
  5294. 800233c: 460e mov r6, r1
  5295. 800233e: 4617 mov r7, r2
  5296. 8002340: 461d mov r5, r3
  5297. while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
  5298. 8002342: 6821 ldr r1, [r4, #0]
  5299. 8002344: 680b ldr r3, [r1, #0]
  5300. 8002346: ea36 0303 bics.w r3, r6, r3
  5301. 800234a: d101 bne.n 8002350 <UART_WaitOnFlagUntilTimeout.constprop.3+0x18>
  5302. return HAL_OK;
  5303. 800234c: 2000 movs r0, #0
  5304. }
  5305. 800234e: bdf8 pop {r3, r4, r5, r6, r7, pc}
  5306. if(Timeout != HAL_MAX_DELAY)
  5307. 8002350: 1c6b adds r3, r5, #1
  5308. 8002352: d0f7 beq.n 8002344 <UART_WaitOnFlagUntilTimeout.constprop.3+0xc>
  5309. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  5310. 8002354: b995 cbnz r5, 800237c <UART_WaitOnFlagUntilTimeout.constprop.3+0x44>
  5311. CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
  5312. 8002356: 6823 ldr r3, [r4, #0]
  5313. __HAL_UNLOCK(huart);
  5314. 8002358: 2003 movs r0, #3
  5315. CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
  5316. 800235a: 68da ldr r2, [r3, #12]
  5317. 800235c: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
  5318. 8002360: 60da str r2, [r3, #12]
  5319. CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
  5320. 8002362: 695a ldr r2, [r3, #20]
  5321. 8002364: f022 0201 bic.w r2, r2, #1
  5322. 8002368: 615a str r2, [r3, #20]
  5323. huart->gState = HAL_UART_STATE_READY;
  5324. 800236a: 2320 movs r3, #32
  5325. 800236c: f884 3039 strb.w r3, [r4, #57] ; 0x39
  5326. huart->RxState = HAL_UART_STATE_READY;
  5327. 8002370: f884 303a strb.w r3, [r4, #58] ; 0x3a
  5328. __HAL_UNLOCK(huart);
  5329. 8002374: 2300 movs r3, #0
  5330. 8002376: f884 3038 strb.w r3, [r4, #56] ; 0x38
  5331. 800237a: bdf8 pop {r3, r4, r5, r6, r7, pc}
  5332. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  5333. 800237c: f7fd ff84 bl 8000288 <HAL_GetTick>
  5334. 8002380: 1bc0 subs r0, r0, r7
  5335. 8002382: 4285 cmp r5, r0
  5336. 8002384: d2dd bcs.n 8002342 <UART_WaitOnFlagUntilTimeout.constprop.3+0xa>
  5337. 8002386: e7e6 b.n 8002356 <UART_WaitOnFlagUntilTimeout.constprop.3+0x1e>
  5338. 08002388 <HAL_UART_Init>:
  5339. {
  5340. 8002388: b510 push {r4, lr}
  5341. if(huart == NULL)
  5342. 800238a: 4604 mov r4, r0
  5343. 800238c: b340 cbz r0, 80023e0 <HAL_UART_Init+0x58>
  5344. if(huart->gState == HAL_UART_STATE_RESET)
  5345. 800238e: f890 3039 ldrb.w r3, [r0, #57] ; 0x39
  5346. 8002392: f003 02ff and.w r2, r3, #255 ; 0xff
  5347. 8002396: b91b cbnz r3, 80023a0 <HAL_UART_Init+0x18>
  5348. huart->Lock = HAL_UNLOCKED;
  5349. 8002398: f880 2038 strb.w r2, [r0, #56] ; 0x38
  5350. HAL_UART_MspInit(huart);
  5351. 800239c: f000 feae bl 80030fc <HAL_UART_MspInit>
  5352. huart->gState = HAL_UART_STATE_BUSY;
  5353. 80023a0: 2324 movs r3, #36 ; 0x24
  5354. __HAL_UART_DISABLE(huart);
  5355. 80023a2: 6822 ldr r2, [r4, #0]
  5356. huart->gState = HAL_UART_STATE_BUSY;
  5357. 80023a4: f884 3039 strb.w r3, [r4, #57] ; 0x39
  5358. __HAL_UART_DISABLE(huart);
  5359. 80023a8: 68d3 ldr r3, [r2, #12]
  5360. UART_SetConfig(huart);
  5361. 80023aa: 4620 mov r0, r4
  5362. __HAL_UART_DISABLE(huart);
  5363. 80023ac: f423 5300 bic.w r3, r3, #8192 ; 0x2000
  5364. 80023b0: 60d3 str r3, [r2, #12]
  5365. UART_SetConfig(huart);
  5366. 80023b2: f7ff fe9f bl 80020f4 <UART_SetConfig>
  5367. CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
  5368. 80023b6: 6823 ldr r3, [r4, #0]
  5369. huart->ErrorCode = HAL_UART_ERROR_NONE;
  5370. 80023b8: 2000 movs r0, #0
  5371. CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
  5372. 80023ba: 691a ldr r2, [r3, #16]
  5373. 80023bc: f422 4290 bic.w r2, r2, #18432 ; 0x4800
  5374. 80023c0: 611a str r2, [r3, #16]
  5375. CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
  5376. 80023c2: 695a ldr r2, [r3, #20]
  5377. 80023c4: f022 022a bic.w r2, r2, #42 ; 0x2a
  5378. 80023c8: 615a str r2, [r3, #20]
  5379. __HAL_UART_ENABLE(huart);
  5380. 80023ca: 68da ldr r2, [r3, #12]
  5381. 80023cc: f442 5200 orr.w r2, r2, #8192 ; 0x2000
  5382. 80023d0: 60da str r2, [r3, #12]
  5383. huart->gState= HAL_UART_STATE_READY;
  5384. 80023d2: 2320 movs r3, #32
  5385. huart->ErrorCode = HAL_UART_ERROR_NONE;
  5386. 80023d4: 63e0 str r0, [r4, #60] ; 0x3c
  5387. huart->gState= HAL_UART_STATE_READY;
  5388. 80023d6: f884 3039 strb.w r3, [r4, #57] ; 0x39
  5389. huart->RxState= HAL_UART_STATE_READY;
  5390. 80023da: f884 303a strb.w r3, [r4, #58] ; 0x3a
  5391. return HAL_OK;
  5392. 80023de: bd10 pop {r4, pc}
  5393. return HAL_ERROR;
  5394. 80023e0: 2001 movs r0, #1
  5395. }
  5396. 80023e2: bd10 pop {r4, pc}
  5397. 080023e4 <HAL_UART_Transmit>:
  5398. {
  5399. 80023e4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  5400. 80023e8: 461f mov r7, r3
  5401. if(huart->gState == HAL_UART_STATE_READY)
  5402. 80023ea: f890 3039 ldrb.w r3, [r0, #57] ; 0x39
  5403. {
  5404. 80023ee: 4604 mov r4, r0
  5405. if(huart->gState == HAL_UART_STATE_READY)
  5406. 80023f0: 2b20 cmp r3, #32
  5407. {
  5408. 80023f2: 460d mov r5, r1
  5409. 80023f4: 4690 mov r8, r2
  5410. if(huart->gState == HAL_UART_STATE_READY)
  5411. 80023f6: d14e bne.n 8002496 <HAL_UART_Transmit+0xb2>
  5412. if((pData == NULL) || (Size == 0U))
  5413. 80023f8: 2900 cmp r1, #0
  5414. 80023fa: d049 beq.n 8002490 <HAL_UART_Transmit+0xac>
  5415. 80023fc: 2a00 cmp r2, #0
  5416. 80023fe: d047 beq.n 8002490 <HAL_UART_Transmit+0xac>
  5417. __HAL_LOCK(huart);
  5418. 8002400: f890 3038 ldrb.w r3, [r0, #56] ; 0x38
  5419. 8002404: 2b01 cmp r3, #1
  5420. 8002406: d046 beq.n 8002496 <HAL_UART_Transmit+0xb2>
  5421. 8002408: 2301 movs r3, #1
  5422. 800240a: f880 3038 strb.w r3, [r0, #56] ; 0x38
  5423. huart->ErrorCode = HAL_UART_ERROR_NONE;
  5424. 800240e: 2300 movs r3, #0
  5425. 8002410: 63c3 str r3, [r0, #60] ; 0x3c
  5426. huart->gState = HAL_UART_STATE_BUSY_TX;
  5427. 8002412: 2321 movs r3, #33 ; 0x21
  5428. 8002414: f880 3039 strb.w r3, [r0, #57] ; 0x39
  5429. tickstart = HAL_GetTick();
  5430. 8002418: f7fd ff36 bl 8000288 <HAL_GetTick>
  5431. 800241c: 4606 mov r6, r0
  5432. huart->TxXferSize = Size;
  5433. 800241e: f8a4 8024 strh.w r8, [r4, #36] ; 0x24
  5434. huart->TxXferCount = Size;
  5435. 8002422: f8a4 8026 strh.w r8, [r4, #38] ; 0x26
  5436. while(huart->TxXferCount > 0U)
  5437. 8002426: 8ce3 ldrh r3, [r4, #38] ; 0x26
  5438. 8002428: b29b uxth r3, r3
  5439. 800242a: b96b cbnz r3, 8002448 <HAL_UART_Transmit+0x64>
  5440. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
  5441. 800242c: 463b mov r3, r7
  5442. 800242e: 4632 mov r2, r6
  5443. 8002430: 2140 movs r1, #64 ; 0x40
  5444. 8002432: 4620 mov r0, r4
  5445. 8002434: f7ff ff80 bl 8002338 <UART_WaitOnFlagUntilTimeout.constprop.3>
  5446. 8002438: b9a8 cbnz r0, 8002466 <HAL_UART_Transmit+0x82>
  5447. huart->gState = HAL_UART_STATE_READY;
  5448. 800243a: 2320 movs r3, #32
  5449. __HAL_UNLOCK(huart);
  5450. 800243c: f884 0038 strb.w r0, [r4, #56] ; 0x38
  5451. huart->gState = HAL_UART_STATE_READY;
  5452. 8002440: f884 3039 strb.w r3, [r4, #57] ; 0x39
  5453. return HAL_OK;
  5454. 8002444: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  5455. huart->TxXferCount--;
  5456. 8002448: 8ce3 ldrh r3, [r4, #38] ; 0x26
  5457. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  5458. 800244a: 4632 mov r2, r6
  5459. huart->TxXferCount--;
  5460. 800244c: 3b01 subs r3, #1
  5461. 800244e: b29b uxth r3, r3
  5462. 8002450: 84e3 strh r3, [r4, #38] ; 0x26
  5463. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  5464. 8002452: 68a3 ldr r3, [r4, #8]
  5465. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  5466. 8002454: 2180 movs r1, #128 ; 0x80
  5467. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  5468. 8002456: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
  5469. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  5470. 800245a: 4620 mov r0, r4
  5471. 800245c: 463b mov r3, r7
  5472. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  5473. 800245e: d10e bne.n 800247e <HAL_UART_Transmit+0x9a>
  5474. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  5475. 8002460: f7ff ff6a bl 8002338 <UART_WaitOnFlagUntilTimeout.constprop.3>
  5476. 8002464: b110 cbz r0, 800246c <HAL_UART_Transmit+0x88>
  5477. return HAL_TIMEOUT;
  5478. 8002466: 2003 movs r0, #3
  5479. 8002468: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  5480. huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
  5481. 800246c: 882b ldrh r3, [r5, #0]
  5482. 800246e: 6822 ldr r2, [r4, #0]
  5483. 8002470: f3c3 0308 ubfx r3, r3, #0, #9
  5484. 8002474: 6053 str r3, [r2, #4]
  5485. if(huart->Init.Parity == UART_PARITY_NONE)
  5486. 8002476: 6923 ldr r3, [r4, #16]
  5487. 8002478: b943 cbnz r3, 800248c <HAL_UART_Transmit+0xa8>
  5488. pData +=2U;
  5489. 800247a: 3502 adds r5, #2
  5490. 800247c: e7d3 b.n 8002426 <HAL_UART_Transmit+0x42>
  5491. if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  5492. 800247e: f7ff ff5b bl 8002338 <UART_WaitOnFlagUntilTimeout.constprop.3>
  5493. 8002482: 2800 cmp r0, #0
  5494. 8002484: d1ef bne.n 8002466 <HAL_UART_Transmit+0x82>
  5495. huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
  5496. 8002486: 6823 ldr r3, [r4, #0]
  5497. 8002488: 782a ldrb r2, [r5, #0]
  5498. 800248a: 605a str r2, [r3, #4]
  5499. 800248c: 3501 adds r5, #1
  5500. 800248e: e7ca b.n 8002426 <HAL_UART_Transmit+0x42>
  5501. return HAL_ERROR;
  5502. 8002490: 2001 movs r0, #1
  5503. 8002492: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  5504. return HAL_BUSY;
  5505. 8002496: 2002 movs r0, #2
  5506. }
  5507. 8002498: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  5508. 0800249c <HAL_UART_Receive_IT>:
  5509. if(huart->RxState == HAL_UART_STATE_READY)
  5510. 800249c: f890 303a ldrb.w r3, [r0, #58] ; 0x3a
  5511. 80024a0: 2b20 cmp r3, #32
  5512. 80024a2: d120 bne.n 80024e6 <HAL_UART_Receive_IT+0x4a>
  5513. if((pData == NULL) || (Size == 0U))
  5514. 80024a4: b1e9 cbz r1, 80024e2 <HAL_UART_Receive_IT+0x46>
  5515. 80024a6: b1e2 cbz r2, 80024e2 <HAL_UART_Receive_IT+0x46>
  5516. __HAL_LOCK(huart);
  5517. 80024a8: f890 3038 ldrb.w r3, [r0, #56] ; 0x38
  5518. 80024ac: 2b01 cmp r3, #1
  5519. 80024ae: d01a beq.n 80024e6 <HAL_UART_Receive_IT+0x4a>
  5520. huart->RxXferCount = Size;
  5521. 80024b0: 85c2 strh r2, [r0, #46] ; 0x2e
  5522. huart->RxXferSize = Size;
  5523. 80024b2: 8582 strh r2, [r0, #44] ; 0x2c
  5524. huart->ErrorCode = HAL_UART_ERROR_NONE;
  5525. 80024b4: 2300 movs r3, #0
  5526. huart->RxState = HAL_UART_STATE_BUSY_RX;
  5527. 80024b6: 2222 movs r2, #34 ; 0x22
  5528. huart->ErrorCode = HAL_UART_ERROR_NONE;
  5529. 80024b8: 63c3 str r3, [r0, #60] ; 0x3c
  5530. huart->RxState = HAL_UART_STATE_BUSY_RX;
  5531. 80024ba: f880 203a strb.w r2, [r0, #58] ; 0x3a
  5532. __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
  5533. 80024be: 6802 ldr r2, [r0, #0]
  5534. huart->pRxBuffPtr = pData;
  5535. 80024c0: 6281 str r1, [r0, #40] ; 0x28
  5536. __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
  5537. 80024c2: 68d1 ldr r1, [r2, #12]
  5538. __HAL_UNLOCK(huart);
  5539. 80024c4: f880 3038 strb.w r3, [r0, #56] ; 0x38
  5540. __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
  5541. 80024c8: f441 7180 orr.w r1, r1, #256 ; 0x100
  5542. 80024cc: 60d1 str r1, [r2, #12]
  5543. __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
  5544. 80024ce: 6951 ldr r1, [r2, #20]
  5545. return HAL_OK;
  5546. 80024d0: 4618 mov r0, r3
  5547. __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
  5548. 80024d2: f041 0101 orr.w r1, r1, #1
  5549. 80024d6: 6151 str r1, [r2, #20]
  5550. __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
  5551. 80024d8: 68d1 ldr r1, [r2, #12]
  5552. 80024da: f041 0120 orr.w r1, r1, #32
  5553. 80024de: 60d1 str r1, [r2, #12]
  5554. return HAL_OK;
  5555. 80024e0: 4770 bx lr
  5556. return HAL_ERROR;
  5557. 80024e2: 2001 movs r0, #1
  5558. 80024e4: 4770 bx lr
  5559. return HAL_BUSY;
  5560. 80024e6: 2002 movs r0, #2
  5561. }
  5562. 80024e8: 4770 bx lr
  5563. 080024ea <HAL_UART_TxCpltCallback>:
  5564. 80024ea: 4770 bx lr
  5565. 080024ec <UART_Receive_IT>:
  5566. if(huart->RxState == HAL_UART_STATE_BUSY_RX)
  5567. 80024ec: f890 303a ldrb.w r3, [r0, #58] ; 0x3a
  5568. {
  5569. 80024f0: b510 push {r4, lr}
  5570. if(huart->RxState == HAL_UART_STATE_BUSY_RX)
  5571. 80024f2: 2b22 cmp r3, #34 ; 0x22
  5572. 80024f4: d136 bne.n 8002564 <UART_Receive_IT+0x78>
  5573. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  5574. 80024f6: 6883 ldr r3, [r0, #8]
  5575. 80024f8: 6901 ldr r1, [r0, #16]
  5576. 80024fa: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
  5577. 80024fe: 6802 ldr r2, [r0, #0]
  5578. 8002500: 6a83 ldr r3, [r0, #40] ; 0x28
  5579. 8002502: d123 bne.n 800254c <UART_Receive_IT+0x60>
  5580. *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
  5581. 8002504: 6852 ldr r2, [r2, #4]
  5582. if(huart->Init.Parity == UART_PARITY_NONE)
  5583. 8002506: b9e9 cbnz r1, 8002544 <UART_Receive_IT+0x58>
  5584. *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
  5585. 8002508: f3c2 0208 ubfx r2, r2, #0, #9
  5586. 800250c: f823 2b02 strh.w r2, [r3], #2
  5587. huart->pRxBuffPtr += 1U;
  5588. 8002510: 6283 str r3, [r0, #40] ; 0x28
  5589. if(--huart->RxXferCount == 0U)
  5590. 8002512: 8dc4 ldrh r4, [r0, #46] ; 0x2e
  5591. 8002514: 3c01 subs r4, #1
  5592. 8002516: b2a4 uxth r4, r4
  5593. 8002518: 85c4 strh r4, [r0, #46] ; 0x2e
  5594. 800251a: b98c cbnz r4, 8002540 <UART_Receive_IT+0x54>
  5595. __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
  5596. 800251c: 6803 ldr r3, [r0, #0]
  5597. 800251e: 68da ldr r2, [r3, #12]
  5598. 8002520: f022 0220 bic.w r2, r2, #32
  5599. 8002524: 60da str r2, [r3, #12]
  5600. __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
  5601. 8002526: 68da ldr r2, [r3, #12]
  5602. 8002528: f422 7280 bic.w r2, r2, #256 ; 0x100
  5603. 800252c: 60da str r2, [r3, #12]
  5604. __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
  5605. 800252e: 695a ldr r2, [r3, #20]
  5606. 8002530: f022 0201 bic.w r2, r2, #1
  5607. 8002534: 615a str r2, [r3, #20]
  5608. huart->RxState = HAL_UART_STATE_READY;
  5609. 8002536: 2320 movs r3, #32
  5610. 8002538: f880 303a strb.w r3, [r0, #58] ; 0x3a
  5611. HAL_UART_RxCpltCallback(huart);
  5612. 800253c: f000 fab6 bl 8002aac <HAL_UART_RxCpltCallback>
  5613. if(--huart->RxXferCount == 0U)
  5614. 8002540: 2000 movs r0, #0
  5615. }
  5616. 8002542: bd10 pop {r4, pc}
  5617. *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
  5618. 8002544: b2d2 uxtb r2, r2
  5619. 8002546: f823 2b01 strh.w r2, [r3], #1
  5620. 800254a: e7e1 b.n 8002510 <UART_Receive_IT+0x24>
  5621. if(huart->Init.Parity == UART_PARITY_NONE)
  5622. 800254c: b921 cbnz r1, 8002558 <UART_Receive_IT+0x6c>
  5623. *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
  5624. 800254e: 1c59 adds r1, r3, #1
  5625. 8002550: 6852 ldr r2, [r2, #4]
  5626. 8002552: 6281 str r1, [r0, #40] ; 0x28
  5627. *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
  5628. 8002554: 701a strb r2, [r3, #0]
  5629. 8002556: e7dc b.n 8002512 <UART_Receive_IT+0x26>
  5630. 8002558: 6852 ldr r2, [r2, #4]
  5631. 800255a: 1c59 adds r1, r3, #1
  5632. 800255c: 6281 str r1, [r0, #40] ; 0x28
  5633. 800255e: f002 027f and.w r2, r2, #127 ; 0x7f
  5634. 8002562: e7f7 b.n 8002554 <UART_Receive_IT+0x68>
  5635. return HAL_BUSY;
  5636. 8002564: 2002 movs r0, #2
  5637. 8002566: bd10 pop {r4, pc}
  5638. 08002568 <HAL_UART_ErrorCallback>:
  5639. 8002568: 4770 bx lr
  5640. ...
  5641. 0800256c <HAL_UART_IRQHandler>:
  5642. uint32_t isrflags = READ_REG(huart->Instance->SR);
  5643. 800256c: 6803 ldr r3, [r0, #0]
  5644. {
  5645. 800256e: b570 push {r4, r5, r6, lr}
  5646. uint32_t isrflags = READ_REG(huart->Instance->SR);
  5647. 8002570: 681a ldr r2, [r3, #0]
  5648. {
  5649. 8002572: 4604 mov r4, r0
  5650. if(errorflags == RESET)
  5651. 8002574: 0716 lsls r6, r2, #28
  5652. uint32_t cr1its = READ_REG(huart->Instance->CR1);
  5653. 8002576: 68d9 ldr r1, [r3, #12]
  5654. uint32_t cr3its = READ_REG(huart->Instance->CR3);
  5655. 8002578: 695d ldr r5, [r3, #20]
  5656. if(errorflags == RESET)
  5657. 800257a: d107 bne.n 800258c <HAL_UART_IRQHandler+0x20>
  5658. if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
  5659. 800257c: 0696 lsls r6, r2, #26
  5660. 800257e: d55a bpl.n 8002636 <HAL_UART_IRQHandler+0xca>
  5661. 8002580: 068d lsls r5, r1, #26
  5662. 8002582: d558 bpl.n 8002636 <HAL_UART_IRQHandler+0xca>
  5663. }
  5664. 8002584: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  5665. UART_Receive_IT(huart);
  5666. 8002588: f7ff bfb0 b.w 80024ec <UART_Receive_IT>
  5667. if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
  5668. 800258c: f015 0501 ands.w r5, r5, #1
  5669. 8002590: d102 bne.n 8002598 <HAL_UART_IRQHandler+0x2c>
  5670. 8002592: f411 7f90 tst.w r1, #288 ; 0x120
  5671. 8002596: d04e beq.n 8002636 <HAL_UART_IRQHandler+0xca>
  5672. if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
  5673. 8002598: 07d3 lsls r3, r2, #31
  5674. 800259a: d505 bpl.n 80025a8 <HAL_UART_IRQHandler+0x3c>
  5675. 800259c: 05ce lsls r6, r1, #23
  5676. huart->ErrorCode |= HAL_UART_ERROR_PE;
  5677. 800259e: bf42 ittt mi
  5678. 80025a0: 6be3 ldrmi r3, [r4, #60] ; 0x3c
  5679. 80025a2: f043 0301 orrmi.w r3, r3, #1
  5680. 80025a6: 63e3 strmi r3, [r4, #60] ; 0x3c
  5681. if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
  5682. 80025a8: 0750 lsls r0, r2, #29
  5683. 80025aa: d504 bpl.n 80025b6 <HAL_UART_IRQHandler+0x4a>
  5684. 80025ac: b11d cbz r5, 80025b6 <HAL_UART_IRQHandler+0x4a>
  5685. huart->ErrorCode |= HAL_UART_ERROR_NE;
  5686. 80025ae: 6be3 ldr r3, [r4, #60] ; 0x3c
  5687. 80025b0: f043 0302 orr.w r3, r3, #2
  5688. 80025b4: 63e3 str r3, [r4, #60] ; 0x3c
  5689. if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
  5690. 80025b6: 0793 lsls r3, r2, #30
  5691. 80025b8: d504 bpl.n 80025c4 <HAL_UART_IRQHandler+0x58>
  5692. 80025ba: b11d cbz r5, 80025c4 <HAL_UART_IRQHandler+0x58>
  5693. huart->ErrorCode |= HAL_UART_ERROR_FE;
  5694. 80025bc: 6be3 ldr r3, [r4, #60] ; 0x3c
  5695. 80025be: f043 0304 orr.w r3, r3, #4
  5696. 80025c2: 63e3 str r3, [r4, #60] ; 0x3c
  5697. if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
  5698. 80025c4: 0716 lsls r6, r2, #28
  5699. 80025c6: d504 bpl.n 80025d2 <HAL_UART_IRQHandler+0x66>
  5700. 80025c8: b11d cbz r5, 80025d2 <HAL_UART_IRQHandler+0x66>
  5701. huart->ErrorCode |= HAL_UART_ERROR_ORE;
  5702. 80025ca: 6be3 ldr r3, [r4, #60] ; 0x3c
  5703. 80025cc: f043 0308 orr.w r3, r3, #8
  5704. 80025d0: 63e3 str r3, [r4, #60] ; 0x3c
  5705. if(huart->ErrorCode != HAL_UART_ERROR_NONE)
  5706. 80025d2: 6be3 ldr r3, [r4, #60] ; 0x3c
  5707. 80025d4: 2b00 cmp r3, #0
  5708. 80025d6: d066 beq.n 80026a6 <HAL_UART_IRQHandler+0x13a>
  5709. if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
  5710. 80025d8: 0695 lsls r5, r2, #26
  5711. 80025da: d504 bpl.n 80025e6 <HAL_UART_IRQHandler+0x7a>
  5712. 80025dc: 0688 lsls r0, r1, #26
  5713. 80025de: d502 bpl.n 80025e6 <HAL_UART_IRQHandler+0x7a>
  5714. UART_Receive_IT(huart);
  5715. 80025e0: 4620 mov r0, r4
  5716. 80025e2: f7ff ff83 bl 80024ec <UART_Receive_IT>
  5717. dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
  5718. 80025e6: 6823 ldr r3, [r4, #0]
  5719. UART_EndRxTransfer(huart);
  5720. 80025e8: 4620 mov r0, r4
  5721. dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
  5722. 80025ea: 695d ldr r5, [r3, #20]
  5723. if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
  5724. 80025ec: 6be2 ldr r2, [r4, #60] ; 0x3c
  5725. 80025ee: 0711 lsls r1, r2, #28
  5726. 80025f0: d402 bmi.n 80025f8 <HAL_UART_IRQHandler+0x8c>
  5727. 80025f2: f015 0540 ands.w r5, r5, #64 ; 0x40
  5728. 80025f6: d01a beq.n 800262e <HAL_UART_IRQHandler+0xc2>
  5729. UART_EndRxTransfer(huart);
  5730. 80025f8: f7ff fd6e bl 80020d8 <UART_EndRxTransfer>
  5731. if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
  5732. 80025fc: 6823 ldr r3, [r4, #0]
  5733. 80025fe: 695a ldr r2, [r3, #20]
  5734. 8002600: 0652 lsls r2, r2, #25
  5735. 8002602: d510 bpl.n 8002626 <HAL_UART_IRQHandler+0xba>
  5736. CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
  5737. 8002604: 695a ldr r2, [r3, #20]
  5738. if(huart->hdmarx != NULL)
  5739. 8002606: 6b60 ldr r0, [r4, #52] ; 0x34
  5740. CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
  5741. 8002608: f022 0240 bic.w r2, r2, #64 ; 0x40
  5742. 800260c: 615a str r2, [r3, #20]
  5743. if(huart->hdmarx != NULL)
  5744. 800260e: b150 cbz r0, 8002626 <HAL_UART_IRQHandler+0xba>
  5745. huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
  5746. 8002610: 4b25 ldr r3, [pc, #148] ; (80026a8 <HAL_UART_IRQHandler+0x13c>)
  5747. 8002612: 6343 str r3, [r0, #52] ; 0x34
  5748. if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
  5749. 8002614: f7fd ffde bl 80005d4 <HAL_DMA_Abort_IT>
  5750. 8002618: 2800 cmp r0, #0
  5751. 800261a: d044 beq.n 80026a6 <HAL_UART_IRQHandler+0x13a>
  5752. huart->hdmarx->XferAbortCallback(huart->hdmarx);
  5753. 800261c: 6b60 ldr r0, [r4, #52] ; 0x34
  5754. }
  5755. 800261e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  5756. huart->hdmarx->XferAbortCallback(huart->hdmarx);
  5757. 8002622: 6b43 ldr r3, [r0, #52] ; 0x34
  5758. 8002624: 4718 bx r3
  5759. HAL_UART_ErrorCallback(huart);
  5760. 8002626: 4620 mov r0, r4
  5761. 8002628: f7ff ff9e bl 8002568 <HAL_UART_ErrorCallback>
  5762. 800262c: bd70 pop {r4, r5, r6, pc}
  5763. HAL_UART_ErrorCallback(huart);
  5764. 800262e: f7ff ff9b bl 8002568 <HAL_UART_ErrorCallback>
  5765. huart->ErrorCode = HAL_UART_ERROR_NONE;
  5766. 8002632: 63e5 str r5, [r4, #60] ; 0x3c
  5767. 8002634: bd70 pop {r4, r5, r6, pc}
  5768. if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
  5769. 8002636: 0616 lsls r6, r2, #24
  5770. 8002638: d527 bpl.n 800268a <HAL_UART_IRQHandler+0x11e>
  5771. 800263a: 060d lsls r5, r1, #24
  5772. 800263c: d525 bpl.n 800268a <HAL_UART_IRQHandler+0x11e>
  5773. if(huart->gState == HAL_UART_STATE_BUSY_TX)
  5774. 800263e: f894 2039 ldrb.w r2, [r4, #57] ; 0x39
  5775. 8002642: 2a21 cmp r2, #33 ; 0x21
  5776. 8002644: d12f bne.n 80026a6 <HAL_UART_IRQHandler+0x13a>
  5777. if(huart->Init.WordLength == UART_WORDLENGTH_9B)
  5778. 8002646: 68a2 ldr r2, [r4, #8]
  5779. 8002648: f5b2 5f80 cmp.w r2, #4096 ; 0x1000
  5780. 800264c: 6a22 ldr r2, [r4, #32]
  5781. 800264e: d117 bne.n 8002680 <HAL_UART_IRQHandler+0x114>
  5782. huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
  5783. 8002650: 8811 ldrh r1, [r2, #0]
  5784. 8002652: f3c1 0108 ubfx r1, r1, #0, #9
  5785. 8002656: 6059 str r1, [r3, #4]
  5786. if(huart->Init.Parity == UART_PARITY_NONE)
  5787. 8002658: 6921 ldr r1, [r4, #16]
  5788. 800265a: b979 cbnz r1, 800267c <HAL_UART_IRQHandler+0x110>
  5789. huart->pTxBuffPtr += 2U;
  5790. 800265c: 3202 adds r2, #2
  5791. huart->pTxBuffPtr += 1U;
  5792. 800265e: 6222 str r2, [r4, #32]
  5793. if(--huart->TxXferCount == 0U)
  5794. 8002660: 8ce2 ldrh r2, [r4, #38] ; 0x26
  5795. 8002662: 3a01 subs r2, #1
  5796. 8002664: b292 uxth r2, r2
  5797. 8002666: 84e2 strh r2, [r4, #38] ; 0x26
  5798. 8002668: b9ea cbnz r2, 80026a6 <HAL_UART_IRQHandler+0x13a>
  5799. __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
  5800. 800266a: 68da ldr r2, [r3, #12]
  5801. 800266c: f022 0280 bic.w r2, r2, #128 ; 0x80
  5802. 8002670: 60da str r2, [r3, #12]
  5803. __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
  5804. 8002672: 68da ldr r2, [r3, #12]
  5805. 8002674: f042 0240 orr.w r2, r2, #64 ; 0x40
  5806. 8002678: 60da str r2, [r3, #12]
  5807. 800267a: bd70 pop {r4, r5, r6, pc}
  5808. huart->pTxBuffPtr += 1U;
  5809. 800267c: 3201 adds r2, #1
  5810. 800267e: e7ee b.n 800265e <HAL_UART_IRQHandler+0xf2>
  5811. huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
  5812. 8002680: 1c51 adds r1, r2, #1
  5813. 8002682: 6221 str r1, [r4, #32]
  5814. 8002684: 7812 ldrb r2, [r2, #0]
  5815. 8002686: 605a str r2, [r3, #4]
  5816. 8002688: e7ea b.n 8002660 <HAL_UART_IRQHandler+0xf4>
  5817. if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
  5818. 800268a: 0650 lsls r0, r2, #25
  5819. 800268c: d50b bpl.n 80026a6 <HAL_UART_IRQHandler+0x13a>
  5820. 800268e: 064a lsls r2, r1, #25
  5821. 8002690: d509 bpl.n 80026a6 <HAL_UART_IRQHandler+0x13a>
  5822. __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
  5823. 8002692: 68da ldr r2, [r3, #12]
  5824. HAL_UART_TxCpltCallback(huart);
  5825. 8002694: 4620 mov r0, r4
  5826. __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
  5827. 8002696: f022 0240 bic.w r2, r2, #64 ; 0x40
  5828. 800269a: 60da str r2, [r3, #12]
  5829. huart->gState = HAL_UART_STATE_READY;
  5830. 800269c: 2320 movs r3, #32
  5831. 800269e: f884 3039 strb.w r3, [r4, #57] ; 0x39
  5832. HAL_UART_TxCpltCallback(huart);
  5833. 80026a2: f7ff ff22 bl 80024ea <HAL_UART_TxCpltCallback>
  5834. 80026a6: bd70 pop {r4, r5, r6, pc}
  5835. 80026a8: 080026ad .word 0x080026ad
  5836. 080026ac <UART_DMAAbortOnError>:
  5837. {
  5838. 80026ac: b508 push {r3, lr}
  5839. huart->RxXferCount = 0x00U;
  5840. 80026ae: 2300 movs r3, #0
  5841. UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  5842. 80026b0: 6a40 ldr r0, [r0, #36] ; 0x24
  5843. huart->RxXferCount = 0x00U;
  5844. 80026b2: 85c3 strh r3, [r0, #46] ; 0x2e
  5845. huart->TxXferCount = 0x00U;
  5846. 80026b4: 84c3 strh r3, [r0, #38] ; 0x26
  5847. HAL_UART_ErrorCallback(huart);
  5848. 80026b6: f7ff ff57 bl 8002568 <HAL_UART_ErrorCallback>
  5849. 80026ba: bd08 pop {r3, pc}
  5850. 080026bc <RGB_Sensor_Func>:
  5851. #define RGB_SensorDataRequest_Length 7
  5852. #define RGB_SensorIDAutoSetRequest_Length 7
  5853. uint8_t My_RGB_ID = 0;
  5854. uint8_t My_RGB_ID_Reset_RequestCnt;
  5855. uint8_t* RGB_Sensor_Func(uint8_t* data){
  5856. 80026bc: b5f8 push {r3, r4, r5, r6, r7, lr}
  5857. RGB_CMD_T type = data[Bluecell_Type];
  5858. switch(type){
  5859. 80026be: 7845 ldrb r5, [r0, #1]
  5860. uint8_t* RGB_Sensor_Func(uint8_t* data){
  5861. 80026c0: 4604 mov r4, r0
  5862. switch(type){
  5863. 80026c2: 2d03 cmp r5, #3
  5864. 80026c4: d05d beq.n 8002782 <RGB_Sensor_Func+0xc6>
  5865. 80026c6: 2d08 cmp r5, #8
  5866. 80026c8: d07a beq.n 80027c0 <RGB_Sensor_Func+0x104>
  5867. 80026ca: 2d01 cmp r5, #1
  5868. 80026cc: d157 bne.n 800277e <RGB_Sensor_Func+0xc2>
  5869. case RGB_Status_Data_Request:
  5870. if(My_RGB_ID != 0 && data[bluecell_srcid + 1] == My_RGB_ID){
  5871. 80026ce: 4f47 ldr r7, [pc, #284] ; (80027ec <RGB_Sensor_Func+0x130>)
  5872. 80026d0: 7906 ldrb r6, [r0, #4]
  5873. 80026d2: 783b ldrb r3, [r7, #0]
  5874. 80026d4: 4639 mov r1, r7
  5875. 80026d6: b323 cbz r3, 8002722 <RGB_Sensor_Func+0x66>
  5876. 80026d8: 429e cmp r6, r3
  5877. 80026da: d141 bne.n 8002760 <RGB_Sensor_Func+0xa4>
  5878. HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);
  5879. 80026dc: 462a mov r2, r5
  5880. My_RGB_ID_Reset_RequestCnt = 0;
  5881. 80026de: 2500 movs r5, #0
  5882. HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);
  5883. 80026e0: f44f 7180 mov.w r1, #256 ; 0x100
  5884. 80026e4: 4842 ldr r0, [pc, #264] ; (80027f0 <RGB_Sensor_Func+0x134>)
  5885. 80026e6: f7fe f89d bl 8000824 <HAL_GPIO_WritePin>
  5886. My_RGB_ID_Reset_RequestCnt = 0;
  5887. 80026ea: 4b42 ldr r3, [pc, #264] ; (80027f4 <RGB_Sensor_Func+0x138>)
  5888. printf("MY RGB Status Send");
  5889. 80026ec: 4842 ldr r0, [pc, #264] ; (80027f8 <RGB_Sensor_Func+0x13c>)
  5890. My_RGB_ID_Reset_RequestCnt = 0;
  5891. 80026ee: 701d strb r5, [r3, #0]
  5892. printf("MY RGB Status Send");
  5893. 80026f0: f000 fe02 bl 80032f8 <iprintf>
  5894. for(uint8_t i = 0; i<15; i++)
  5895. printf("%02x ",RGB_Data[i]);
  5896. 80026f4: 4f41 ldr r7, [pc, #260] ; (80027fc <RGB_Sensor_Func+0x140>)
  5897. 80026f6: 4e42 ldr r6, [pc, #264] ; (8002800 <RGB_Sensor_Func+0x144>)
  5898. 80026f8: 5d79 ldrb r1, [r7, r5]
  5899. 80026fa: 4630 mov r0, r6
  5900. 80026fc: 3501 adds r5, #1
  5901. 80026fe: f000 fdfb bl 80032f8 <iprintf>
  5902. for(uint8_t i = 0; i<15; i++)
  5903. 8002702: 2d0f cmp r5, #15
  5904. 8002704: d1f8 bne.n 80026f8 <RGB_Sensor_Func+0x3c>
  5905. printf("\r\n");
  5906. 8002706: 483f ldr r0, [pc, #252] ; (8002804 <RGB_Sensor_Func+0x148>)
  5907. 8002708: f000 fe6a bl 80033e0 <puts>
  5908. Uart2_Data_Send(&RGB_Data[0],15);
  5909. 800270c: 4629 mov r1, r5
  5910. 800270e: 483b ldr r0, [pc, #236] ; (80027fc <RGB_Sensor_Func+0x140>)
  5911. data[bluecell_length] = 4;//2 // 4 byte
  5912. data[bluecell_srcid + 1] = data[bluecell_srcid + 0];
  5913. data[bluecell_srcid + 0] = My_RGB_ID;
  5914. data[bluecell_srcid + 2] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  5915. data[bluecell_srcid + 3] = 0xEB;
  5916. Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3);
  5917. 8002710: f000 fa44 bl 8002b9c <Uart2_Data_Send>
  5918. HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_RESET);
  5919. 8002714: 2200 movs r2, #0
  5920. 8002716: f44f 7180 mov.w r1, #256 ; 0x100
  5921. 800271a: 4835 ldr r0, [pc, #212] ; (80027f0 <RGB_Sensor_Func+0x134>)
  5922. 800271c: f7fe f882 bl 8000824 <HAL_GPIO_WritePin>
  5923. 8002720: e02d b.n 800277e <RGB_Sensor_Func+0xc2>
  5924. }else if(My_RGB_ID == 0 && data[bluecell_srcid + 1] == My_RGB_ID){
  5925. 8002722: b9ee cbnz r6, 8002760 <RGB_Sensor_Func+0xa4>
  5926. printf("MY ID IS NOT SET : %02x \r\n",My_RGB_ID);
  5927. 8002724: 4631 mov r1, r6
  5928. 8002726: 4838 ldr r0, [pc, #224] ; (8002808 <RGB_Sensor_Func+0x14c>)
  5929. 8002728: f000 fde6 bl 80032f8 <iprintf>
  5930. HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);
  5931. 800272c: f44f 7180 mov.w r1, #256 ; 0x100
  5932. 8002730: 462a mov r2, r5
  5933. 8002732: 482f ldr r0, [pc, #188] ; (80027f0 <RGB_Sensor_Func+0x134>)
  5934. 8002734: f7fe f876 bl 8000824 <HAL_GPIO_WritePin>
  5935. data[bluecell_stx] = 0xBE; //0
  5936. 8002738: 23be movs r3, #190 ; 0xbe
  5937. 800273a: 7023 strb r3, [r4, #0]
  5938. data[bluecell_type] = RGB_SensorID_SET;//1
  5939. 800273c: 2303 movs r3, #3
  5940. data[bluecell_length] = 4;//2 // 4 byte
  5941. 800273e: 2104 movs r1, #4
  5942. data[bluecell_type] = RGB_SensorID_SET;//1
  5943. 8002740: 7063 strb r3, [r4, #1]
  5944. data[bluecell_srcid + 1] = data[bluecell_srcid + 0];
  5945. 8002742: 78e3 ldrb r3, [r4, #3]
  5946. data[bluecell_length] = 4;//2 // 4 byte
  5947. 8002744: 70a1 strb r1, [r4, #2]
  5948. data[bluecell_srcid + 1] = data[bluecell_srcid + 0];
  5949. 8002746: 7123 strb r3, [r4, #4]
  5950. data[bluecell_srcid + 0] = My_RGB_ID;
  5951. 8002748: 783b ldrb r3, [r7, #0]
  5952. data[bluecell_srcid + 0] = My_RGB_ID;
  5953. 800274a: 70e3 strb r3, [r4, #3]
  5954. data[bluecell_srcid + 2] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  5955. 800274c: 1c60 adds r0, r4, #1
  5956. 800274e: f000 fbff bl 8002f50 <STH30_CreateCrc>
  5957. data[bluecell_srcid + 3] = 0xEB;
  5958. 8002752: 23eb movs r3, #235 ; 0xeb
  5959. Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3);
  5960. 8002754: 78a1 ldrb r1, [r4, #2]
  5961. data[bluecell_srcid + 2] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  5962. 8002756: 7160 strb r0, [r4, #5]
  5963. Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3);
  5964. 8002758: 3103 adds r1, #3
  5965. data[bluecell_srcid + 3] = 0xEB;
  5966. 800275a: 71a3 strb r3, [r4, #6]
  5967. Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3);
  5968. 800275c: b2c9 uxtb r1, r1
  5969. 800275e: e02b b.n 80027b8 <RGB_Sensor_Func+0xfc>
  5970. My_RGB_ID_Reset_RequestCnt++;
  5971. 8002760: 4a24 ldr r2, [pc, #144] ; (80027f4 <RGB_Sensor_Func+0x138>)
  5972. printf("NO MY ID IS %02x \r\n",My_RGB_ID);
  5973. 8002762: 482a ldr r0, [pc, #168] ; (800280c <RGB_Sensor_Func+0x150>)
  5974. My_RGB_ID_Reset_RequestCnt++;
  5975. 8002764: 7813 ldrb r3, [r2, #0]
  5976. 8002766: 3301 adds r3, #1
  5977. 8002768: b2db uxtb r3, r3
  5978. if(My_RGB_ID_Reset_RequestCnt >= 17){
  5979. 800276a: 2b10 cmp r3, #16
  5980. My_RGB_ID_Reset_RequestCnt++;
  5981. 800276c: 7013 strb r3, [r2, #0]
  5982. My_RGB_ID = 0;
  5983. 800276e: bf84 itt hi
  5984. 8002770: 2300 movhi r3, #0
  5985. 8002772: 700b strbhi r3, [r1, #0]
  5986. printf("NO MY ID IS %02x \r\n",My_RGB_ID);
  5987. 8002774: 7809 ldrb r1, [r1, #0]
  5988. My_RGB_ID_Reset_RequestCnt = 0;
  5989. 8002776: bf88 it hi
  5990. 8002778: 7013 strbhi r3, [r2, #0]
  5991. printf("My ID aleady exist %02x \r\n",My_RGB_ID);
  5992. 800277a: f000 fdbd bl 80032f8 <iprintf>
  5993. }
  5994. break;
  5995. default:break;
  5996. }
  5997. return data;
  5998. }
  5999. 800277e: 4620 mov r0, r4
  6000. 8002780: bdf8 pop {r3, r4, r5, r6, r7, pc}
  6001. if(My_RGB_ID == 0 || My_RGB_ID == data[bluecell_srcid + 1]){
  6002. 8002782: 4d1a ldr r5, [pc, #104] ; (80027ec <RGB_Sensor_Func+0x130>)
  6003. 8002784: 7829 ldrb r1, [r5, #0]
  6004. 8002786: b111 cbz r1, 800278e <RGB_Sensor_Func+0xd2>
  6005. 8002788: 7903 ldrb r3, [r0, #4]
  6006. 800278a: 428b cmp r3, r1
  6007. 800278c: d116 bne.n 80027bc <RGB_Sensor_Func+0x100>
  6008. HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);
  6009. 800278e: 2201 movs r2, #1
  6010. 8002790: f44f 7180 mov.w r1, #256 ; 0x100
  6011. 8002794: 4816 ldr r0, [pc, #88] ; (80027f0 <RGB_Sensor_Func+0x134>)
  6012. 8002796: f7fe f845 bl 8000824 <HAL_GPIO_WritePin>
  6013. data[bluecell_type] = RGB_SensorID_SET_Success;
  6014. 800279a: 2304 movs r3, #4
  6015. 800279c: 7063 strb r3, [r4, #1]
  6016. data[bluecell_srcid] = My_RGB_ID = data[bluecell_srcid + 1];
  6017. 800279e: 7923 ldrb r3, [r4, #4]
  6018. data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  6019. 80027a0: 78a1 ldrb r1, [r4, #2]
  6020. data[bluecell_srcid] = My_RGB_ID = data[bluecell_srcid + 1];
  6021. 80027a2: 70e3 strb r3, [r4, #3]
  6022. data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  6023. 80027a4: 1c60 adds r0, r4, #1
  6024. data[bluecell_srcid] = My_RGB_ID = data[bluecell_srcid + 1];
  6025. 80027a6: 702b strb r3, [r5, #0]
  6026. data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  6027. 80027a8: f000 fbd2 bl 8002f50 <STH30_CreateCrc>
  6028. printf("My ID SET Success %02x \r\n",My_RGB_ID);
  6029. 80027ac: 7829 ldrb r1, [r5, #0]
  6030. data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]);
  6031. 80027ae: 7160 strb r0, [r4, #5]
  6032. printf("My ID SET Success %02x \r\n",My_RGB_ID);
  6033. 80027b0: 4817 ldr r0, [pc, #92] ; (8002810 <RGB_Sensor_Func+0x154>)
  6034. 80027b2: f000 fda1 bl 80032f8 <iprintf>
  6035. Uart2_Data_Send(&data[bluecell_stx],RGB_SensorIDAutoSetRequest_Length);
  6036. 80027b6: 2107 movs r1, #7
  6037. Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3);
  6038. 80027b8: 4620 mov r0, r4
  6039. 80027ba: e7a9 b.n 8002710 <RGB_Sensor_Func+0x54>
  6040. printf("My ID aleady exist %02x \r\n",My_RGB_ID);
  6041. 80027bc: 4815 ldr r0, [pc, #84] ; (8002814 <RGB_Sensor_Func+0x158>)
  6042. 80027be: e7dc b.n 800277a <RGB_Sensor_Func+0xbe>
  6043. if(My_RGB_ID == data[bluecell_srcid + 1]){
  6044. 80027c0: 4d0a ldr r5, [pc, #40] ; (80027ec <RGB_Sensor_Func+0x130>)
  6045. 80027c2: 7902 ldrb r2, [r0, #4]
  6046. 80027c4: 782b ldrb r3, [r5, #0]
  6047. 80027c6: 429a cmp r2, r3
  6048. 80027c8: d1d9 bne.n 800277e <RGB_Sensor_Func+0xc2>
  6049. HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET);
  6050. 80027ca: f44f 7180 mov.w r1, #256 ; 0x100
  6051. 80027ce: 2201 movs r2, #1
  6052. 80027d0: 4807 ldr r0, [pc, #28] ; (80027f0 <RGB_Sensor_Func+0x134>)
  6053. 80027d2: f7fe f827 bl 8000824 <HAL_GPIO_WritePin>
  6054. data[bluecell_stx] = 0xBE; //0
  6055. 80027d6: 23be movs r3, #190 ; 0xbe
  6056. 80027d8: 7023 strb r3, [r4, #0]
  6057. data[bluecell_type] = type + 1;//1
  6058. 80027da: 2309 movs r3, #9
  6059. data[bluecell_length] = 4;//2 // 4 byte
  6060. 80027dc: 2104 movs r1, #4
  6061. data[bluecell_type] = type + 1;//1
  6062. 80027de: 7063 strb r3, [r4, #1]
  6063. data[bluecell_srcid + 1] = data[bluecell_srcid + 0];
  6064. 80027e0: 78e3 ldrb r3, [r4, #3]
  6065. data[bluecell_length] = 4;//2 // 4 byte
  6066. 80027e2: 70a1 strb r1, [r4, #2]
  6067. data[bluecell_srcid + 1] = data[bluecell_srcid + 0];
  6068. 80027e4: 7123 strb r3, [r4, #4]
  6069. data[bluecell_srcid + 0] = My_RGB_ID;
  6070. 80027e6: 782b ldrb r3, [r5, #0]
  6071. 80027e8: e7af b.n 800274a <RGB_Sensor_Func+0x8e>
  6072. 80027ea: bf00 nop
  6073. 80027ec: 2000008c .word 0x2000008c
  6074. 80027f0: 40010800 .word 0x40010800
  6075. 80027f4: 20000148 .word 0x20000148
  6076. 80027f8: 080043e8 .word 0x080043e8
  6077. 80027fc: 20000096 .word 0x20000096
  6078. 8002800: 080043fb .word 0x080043fb
  6079. 8002804: 080044c3 .word 0x080044c3
  6080. 8002808: 08004401 .word 0x08004401
  6081. 800280c: 0800441d .word 0x0800441d
  6082. 8002810: 08004432 .word 0x08004432
  6083. 8002814: 0800444c .word 0x0800444c
  6084. 08002818 <TCS34725_I2C_Read>:
  6085. tcs34725IntegrationTime_t _tcs34725IntegrationTime;
  6086. tcs34725Gain_t _tcs34725Gain;
  6087. uint8_t TCS34725_I2C_Read(uint8_t addr, uint8_t reg)
  6088. {
  6089. 8002818: b57f push {r0, r1, r2, r3, r4, r5, r6, lr}
  6090. uint8_t TCS34725_I2C[3]={0,};
  6091. 800281a: 2300 movs r3, #0
  6092. 800281c: f8ad 3014 strh.w r3, [sp, #20]
  6093. 8002820: f88d 3016 strb.w r3, [sp, #22]
  6094. uint16_t value = 0;
  6095. uint8_t data = 0;
  6096. data=HAL_I2C_Mem_Read(&hi2c1, addr, reg, 1, TCS34725_I2C, 1, 10);
  6097. 8002824: 230a movs r3, #10
  6098. 8002826: 9302 str r3, [sp, #8]
  6099. 8002828: 2301 movs r3, #1
  6100. uint8_t TCS34725_I2C[3]={0,};
  6101. 800282a: aa05 add r2, sp, #20
  6102. data=HAL_I2C_Mem_Read(&hi2c1, addr, reg, 1, TCS34725_I2C, 1, 10);
  6103. 800282c: e88d 000c stmia.w sp, {r2, r3}
  6104. 8002830: 460a mov r2, r1
  6105. 8002832: 4601 mov r1, r0
  6106. 8002834: 4803 ldr r0, [pc, #12] ; (8002844 <TCS34725_I2C_Read+0x2c>)
  6107. 8002836: f7fe fadd bl 8000df4 <HAL_I2C_Mem_Read>
  6108. // i2c_status(data);
  6109. value = TCS34725_I2C[0];
  6110. return value;
  6111. }
  6112. 800283a: f89d 0014 ldrb.w r0, [sp, #20]
  6113. 800283e: b007 add sp, #28
  6114. 8002840: f85d fb04 ldr.w pc, [sp], #4
  6115. 8002844: 20000150 .word 0x20000150
  6116. 08002848 <TCS34725_I2C_Write>:
  6117. void TCS34725_I2C_Write(uint8_t addr, uint8_t reg, uint8_t data)
  6118. {
  6119. uint8_t tmp_afe;
  6120. tmp_afe = data;
  6121. HAL_I2C_Mem_Write(&hi2c1, addr, reg, 1, &tmp_afe, 1, 10);
  6122. 8002848: 230a movs r3, #10
  6123. {
  6124. 800284a: b510 push {r4, lr}
  6125. 800284c: b086 sub sp, #24
  6126. tmp_afe = data;
  6127. 800284e: ac06 add r4, sp, #24
  6128. 8002850: f804 2d01 strb.w r2, [r4, #-1]!
  6129. HAL_I2C_Mem_Write(&hi2c1, addr, reg, 1, &tmp_afe, 1, 10);
  6130. 8002854: 9302 str r3, [sp, #8]
  6131. 8002856: 2301 movs r3, #1
  6132. 8002858: 460a mov r2, r1
  6133. 800285a: 9301 str r3, [sp, #4]
  6134. 800285c: 4601 mov r1, r0
  6135. 800285e: 9400 str r4, [sp, #0]
  6136. 8002860: 4802 ldr r0, [pc, #8] ; (800286c <TCS34725_I2C_Write+0x24>)
  6137. 8002862: f7fe fa31 bl 8000cc8 <HAL_I2C_Mem_Write>
  6138. }
  6139. 8002866: b006 add sp, #24
  6140. 8002868: bd10 pop {r4, pc}
  6141. 800286a: bf00 nop
  6142. 800286c: 20000150 .word 0x20000150
  6143. 08002870 <RGB_data_arrage>:
  6144. uint8_t Green_L;
  6145. uint8_t Blue_H;
  6146. uint8_t Blue_L;
  6147. }RGB_Bit_st;
  6148. void RGB_data_arrage(uint8_t* rgbval){
  6149. 8002870: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
  6150. static uint16_t Clear_Calc_data ;
  6151. static uint16_t Red_Calc_data ;
  6152. static uint16_t Green_Calc_data ;
  6153. static uint16_t Blue_Calc_data ;
  6154. RGB_Bit_st data;
  6155. memcpy(&data.Clear_L,&rgbval[0],8);
  6156. 8002874: 6803 ldr r3, [r0, #0]
  6157. uint16_t Red = (data.Red_H << 8) | data.Red_L;
  6158. uint16_t Green = (data.Green_H << 8) | data.Green_L;
  6159. uint16_t Blue = (data.Blue_H << 8) | data.Blue_L;
  6160. #if 1 // PYJ.2019.03.15_BEGIN --
  6161. switch(Cnt){
  6162. 8002876: 4d50 ldr r5, [pc, #320] ; (80029b8 <RGB_data_arrage+0x148>)
  6163. memcpy(&data.Clear_L,&rgbval[0],8);
  6164. 8002878: f8cd 3001 str.w r3, [sp, #1]
  6165. 800287c: 6843 ldr r3, [r0, #4]
  6166. uint16_t Clear = (data.Clear_H << 8) | data.Clear_L;
  6167. 800287e: f89d 6000 ldrb.w r6, [sp]
  6168. memcpy(&data.Clear_L,&rgbval[0],8);
  6169. 8002882: f8cd 3005 str.w r3, [sp, #5]
  6170. uint16_t Blue = (data.Blue_H << 8) | data.Blue_L;
  6171. 8002886: f89d 3006 ldrb.w r3, [sp, #6]
  6172. 800288a: f89d 1007 ldrb.w r1, [sp, #7]
  6173. uint16_t Clear = (data.Clear_H << 8) | data.Clear_L;
  6174. 800288e: f89d e001 ldrb.w lr, [sp, #1]
  6175. uint16_t Red = (data.Red_H << 8) | data.Red_L;
  6176. 8002892: f89d 0002 ldrb.w r0, [sp, #2]
  6177. 8002896: f89d 7003 ldrb.w r7, [sp, #3]
  6178. uint16_t Green = (data.Green_H << 8) | data.Green_L;
  6179. 800289a: f89d 2004 ldrb.w r2, [sp, #4]
  6180. 800289e: f89d 4005 ldrb.w r4, [sp, #5]
  6181. uint16_t Blue = (data.Blue_H << 8) | data.Blue_L;
  6182. 80028a2: ea41 2103 orr.w r1, r1, r3, lsl #8
  6183. switch(Cnt){
  6184. 80028a6: 782b ldrb r3, [r5, #0]
  6185. uint16_t Clear = (data.Clear_H << 8) | data.Clear_L;
  6186. 80028a8: ea4e 2e06 orr.w lr, lr, r6, lsl #8
  6187. uint16_t Red = (data.Red_H << 8) | data.Red_L;
  6188. 80028ac: ea47 2700 orr.w r7, r7, r0, lsl #8
  6189. uint16_t Green = (data.Green_H << 8) | data.Green_L;
  6190. 80028b0: ea44 2402 orr.w r4, r4, r2, lsl #8
  6191. switch(Cnt){
  6192. 80028b4: 2b03 cmp r3, #3
  6193. 80028b6: d80e bhi.n 80028d6 <RGB_data_arrage+0x66>
  6194. 80028b8: e8df f003 tbb [pc, r3]
  6195. 80028bc: 36231002 .word 0x36231002
  6196. case 0:
  6197. Clear_Calc_data = Clear;
  6198. 80028c0: 4b3e ldr r3, [pc, #248] ; (80029bc <RGB_data_arrage+0x14c>)
  6199. 80028c2: f8a3 e000 strh.w lr, [r3]
  6200. Red_Calc_data = Red;
  6201. 80028c6: 4b3e ldr r3, [pc, #248] ; (80029c0 <RGB_data_arrage+0x150>)
  6202. 80028c8: 801f strh r7, [r3, #0]
  6203. Green_Calc_data = Green;
  6204. 80028ca: 4b3e ldr r3, [pc, #248] ; (80029c4 <RGB_data_arrage+0x154>)
  6205. 80028cc: 801c strh r4, [r3, #0]
  6206. Blue_Calc_data = Blue;
  6207. 80028ce: 4b3e ldr r3, [pc, #248] ; (80029c8 <RGB_data_arrage+0x158>)
  6208. 80028d0: 8019 strh r1, [r3, #0]
  6209. Cnt = 1;
  6210. 80028d2: 2301 movs r3, #1
  6211. case 2:
  6212. Clear_Calc_data += Clear;
  6213. Red_Calc_data += Red;
  6214. Green_Calc_data += Green;
  6215. Blue_Calc_data += Blue;
  6216. Cnt = 3;
  6217. 80028d4: 702b strb r3, [r5, #0]
  6218. Uart2_Data_Send(&temp[0],8);
  6219. #endif // PYJ.2019.03.15_END --
  6220. }
  6221. 80028d6: b003 add sp, #12
  6222. 80028d8: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
  6223. Clear_Calc_data += Clear;
  6224. 80028dc: 4b37 ldr r3, [pc, #220] ; (80029bc <RGB_data_arrage+0x14c>)
  6225. 80028de: 881e ldrh r6, [r3, #0]
  6226. 80028e0: 44b6 add lr, r6
  6227. 80028e2: f8a3 e000 strh.w lr, [r3]
  6228. Red_Calc_data += Red;
  6229. 80028e6: 4b36 ldr r3, [pc, #216] ; (80029c0 <RGB_data_arrage+0x150>)
  6230. 80028e8: 8818 ldrh r0, [r3, #0]
  6231. 80028ea: 4407 add r7, r0
  6232. 80028ec: 801f strh r7, [r3, #0]
  6233. Green_Calc_data += Green;
  6234. 80028ee: 4b35 ldr r3, [pc, #212] ; (80029c4 <RGB_data_arrage+0x154>)
  6235. 80028f0: 881a ldrh r2, [r3, #0]
  6236. 80028f2: 4414 add r4, r2
  6237. Blue_Calc_data += Blue;
  6238. 80028f4: 4a34 ldr r2, [pc, #208] ; (80029c8 <RGB_data_arrage+0x158>)
  6239. Green_Calc_data += Green;
  6240. 80028f6: 801c strh r4, [r3, #0]
  6241. Blue_Calc_data += Blue;
  6242. 80028f8: 8813 ldrh r3, [r2, #0]
  6243. 80028fa: 4419 add r1, r3
  6244. 80028fc: 8011 strh r1, [r2, #0]
  6245. Cnt = 2;
  6246. 80028fe: 2302 movs r3, #2
  6247. 8002900: e7e8 b.n 80028d4 <RGB_data_arrage+0x64>
  6248. Clear_Calc_data += Clear;
  6249. 8002902: 4b2e ldr r3, [pc, #184] ; (80029bc <RGB_data_arrage+0x14c>)
  6250. 8002904: 881e ldrh r6, [r3, #0]
  6251. 8002906: 44b6 add lr, r6
  6252. 8002908: f8a3 e000 strh.w lr, [r3]
  6253. Red_Calc_data += Red;
  6254. 800290c: 4b2c ldr r3, [pc, #176] ; (80029c0 <RGB_data_arrage+0x150>)
  6255. 800290e: 8818 ldrh r0, [r3, #0]
  6256. 8002910: 4407 add r7, r0
  6257. 8002912: 801f strh r7, [r3, #0]
  6258. Green_Calc_data += Green;
  6259. 8002914: 4b2b ldr r3, [pc, #172] ; (80029c4 <RGB_data_arrage+0x154>)
  6260. 8002916: 881a ldrh r2, [r3, #0]
  6261. 8002918: 4414 add r4, r2
  6262. Blue_Calc_data += Blue;
  6263. 800291a: 4a2b ldr r2, [pc, #172] ; (80029c8 <RGB_data_arrage+0x158>)
  6264. Green_Calc_data += Green;
  6265. 800291c: 801c strh r4, [r3, #0]
  6266. Blue_Calc_data += Blue;
  6267. 800291e: 8813 ldrh r3, [r2, #0]
  6268. 8002920: 4419 add r1, r3
  6269. 8002922: 8011 strh r1, [r2, #0]
  6270. Cnt = 3;
  6271. 8002924: 2303 movs r3, #3
  6272. 8002926: e7d5 b.n 80028d4 <RGB_data_arrage+0x64>
  6273. Clear_Calc_data = (Clear_Calc_data + Clear)/4;
  6274. 8002928: 4b24 ldr r3, [pc, #144] ; (80029bc <RGB_data_arrage+0x14c>)
  6275. RGB_Data[Bluecell_DATA] = My_RGB_ID;//Src ID
  6276. 800292a: f8df 90a4 ldr.w r9, [pc, #164] ; 80029d0 <RGB_data_arrage+0x160>
  6277. Clear_Calc_data = (Clear_Calc_data + Clear)/4;
  6278. 800292e: 881e ldrh r6, [r3, #0]
  6279. RGB_Data[Bluecell_DATA] = My_RGB_ID;//Src ID
  6280. 8002930: f899 9000 ldrb.w r9, [r9]
  6281. Clear_Calc_data = (Clear_Calc_data + Clear)/4;
  6282. 8002934: 4476 add r6, lr
  6283. 8002936: 10b6 asrs r6, r6, #2
  6284. 8002938: fa1f f886 uxth.w r8, r6
  6285. 800293c: f8a3 8000 strh.w r8, [r3]
  6286. Red_Calc_data = (Red_Calc_data + Red)/4;
  6287. 8002940: 4b1f ldr r3, [pc, #124] ; (80029c0 <RGB_data_arrage+0x150>)
  6288. RGB_Data[Bluecell_DATA + 1] = ((Clear_Calc_data & 0xFF00) >> 8);
  6289. 8002942: ea4f 2818 mov.w r8, r8, lsr #8
  6290. Red_Calc_data = (Red_Calc_data + Red)/4;
  6291. 8002946: 8818 ldrh r0, [r3, #0]
  6292. 8002948: 4438 add r0, r7
  6293. 800294a: 1080 asrs r0, r0, #2
  6294. 800294c: fa1f fc80 uxth.w ip, r0
  6295. 8002950: f8a3 c000 strh.w ip, [r3]
  6296. Green_Calc_data = (Green_Calc_data + Green)/4;
  6297. 8002954: 4b1b ldr r3, [pc, #108] ; (80029c4 <RGB_data_arrage+0x154>)
  6298. RGB_Data[Bluecell_DATA + 3] = ((Red_Calc_data & 0xFF00) >> 8);
  6299. 8002956: ea4f 2c1c mov.w ip, ip, lsr #8
  6300. Green_Calc_data = (Green_Calc_data + Green)/4;
  6301. 800295a: 881a ldrh r2, [r3, #0]
  6302. 800295c: 4422 add r2, r4
  6303. 800295e: 1092 asrs r2, r2, #2
  6304. Blue_Calc_data = (Blue_Calc_data + Blue)/4;
  6305. 8002960: 4c19 ldr r4, [pc, #100] ; (80029c8 <RGB_data_arrage+0x158>)
  6306. Green_Calc_data = (Green_Calc_data + Green)/4;
  6307. 8002962: fa1f fe82 uxth.w lr, r2
  6308. 8002966: f8a3 e000 strh.w lr, [r3]
  6309. Blue_Calc_data = (Blue_Calc_data + Blue)/4;
  6310. 800296a: 8823 ldrh r3, [r4, #0]
  6311. RGB_Data[Bluecell_DATA + 5] = ((Green_Calc_data & 0xFF00) >> 8);
  6312. 800296c: ea4f 2e1e mov.w lr, lr, lsr #8
  6313. Blue_Calc_data = (Blue_Calc_data + Blue)/4;
  6314. 8002970: 440b add r3, r1
  6315. RGB_Data[Bluecell_STX] = 0xbe;
  6316. 8002972: 21be movs r1, #190 ; 0xbe
  6317. Blue_Calc_data = (Blue_Calc_data + Blue)/4;
  6318. 8002974: 109b asrs r3, r3, #2
  6319. 8002976: b29f uxth r7, r3
  6320. 8002978: 8027 strh r7, [r4, #0]
  6321. RGB_Data[Bluecell_STX] = 0xbe;
  6322. 800297a: 4c14 ldr r4, [pc, #80] ; (80029cc <RGB_data_arrage+0x15c>)
  6323. RGB_Data[Bluecell_DATA + 7] = ((Blue_Calc_data & 0xFF00) >> 8);
  6324. 800297c: 0a3f lsrs r7, r7, #8
  6325. RGB_Data[Bluecell_STX] = 0xbe;
  6326. 800297e: 7021 strb r1, [r4, #0]
  6327. RGB_Data[Bluecell_Type] = RGB_Status_Data_Response;//Type
  6328. 8002980: 2105 movs r1, #5
  6329. RGB_Data[Bluecell_DATA + 2] = (Clear_Calc_data & 0x00FF);
  6330. 8002982: 7166 strb r6, [r4, #5]
  6331. RGB_Data[Bluecell_Type] = RGB_Status_Data_Response;//Type
  6332. 8002984: 7061 strb r1, [r4, #1]
  6333. RGB_Data[Bluecell_DATA + 9] = 0;//dst id(Blue_Calc_data & 0x00FF);
  6334. 8002986: 2600 movs r6, #0
  6335. RGB_Data[Bluecell_Length] = 12;//Length
  6336. 8002988: 210c movs r1, #12
  6337. RGB_Data[Bluecell_DATA + 4] = (Red_Calc_data & 0x00FF);
  6338. 800298a: 71e0 strb r0, [r4, #7]
  6339. RGB_Data[Bluecell_DATA + 10] = STH30_CreateCrc(&RGB_Data[Bluecell_Type],RGB_Data[Bluecell_Length]);//crc
  6340. 800298c: 1c60 adds r0, r4, #1
  6341. RGB_Data[Bluecell_DATA + 8] = (Blue_Calc_data & 0x00FF);
  6342. 800298e: 72e3 strb r3, [r4, #11]
  6343. RGB_Data[Bluecell_Length] = 12;//Length
  6344. 8002990: 70a1 strb r1, [r4, #2]
  6345. RGB_Data[Bluecell_DATA] = My_RGB_ID;//Src ID
  6346. 8002992: f884 9003 strb.w r9, [r4, #3]
  6347. RGB_Data[Bluecell_DATA + 1] = ((Clear_Calc_data & 0xFF00) >> 8);
  6348. 8002996: f884 8004 strb.w r8, [r4, #4]
  6349. RGB_Data[Bluecell_DATA + 3] = ((Red_Calc_data & 0xFF00) >> 8);
  6350. 800299a: f884 c006 strb.w ip, [r4, #6]
  6351. RGB_Data[Bluecell_DATA + 5] = ((Green_Calc_data & 0xFF00) >> 8);
  6352. 800299e: f884 e008 strb.w lr, [r4, #8]
  6353. RGB_Data[Bluecell_DATA + 6] = (Green_Calc_data & 0x00FF);
  6354. 80029a2: 7262 strb r2, [r4, #9]
  6355. RGB_Data[Bluecell_DATA + 7] = ((Blue_Calc_data & 0xFF00) >> 8);
  6356. 80029a4: 72a7 strb r7, [r4, #10]
  6357. RGB_Data[Bluecell_DATA + 9] = 0;//dst id(Blue_Calc_data & 0x00FF);
  6358. 80029a6: 7326 strb r6, [r4, #12]
  6359. RGB_Data[Bluecell_DATA + 10] = STH30_CreateCrc(&RGB_Data[Bluecell_Type],RGB_Data[Bluecell_Length]);//crc
  6360. 80029a8: f000 fad2 bl 8002f50 <STH30_CreateCrc>
  6361. RGB_Data[Bluecell_DATA + 11] = 0xeb;
  6362. 80029ac: 23eb movs r3, #235 ; 0xeb
  6363. RGB_Data[Bluecell_DATA + 10] = STH30_CreateCrc(&RGB_Data[Bluecell_Type],RGB_Data[Bluecell_Length]);//crc
  6364. 80029ae: 7360 strb r0, [r4, #13]
  6365. RGB_Data[Bluecell_DATA + 11] = 0xeb;
  6366. 80029b0: 73a3 strb r3, [r4, #14]
  6367. Cnt = 0;
  6368. 80029b2: 702e strb r6, [r5, #0]
  6369. }
  6370. 80029b4: e78f b.n 80028d6 <RGB_data_arrage+0x66>
  6371. 80029b6: bf00 nop
  6372. 80029b8: 20000092 .word 0x20000092
  6373. 80029bc: 20000090 .word 0x20000090
  6374. 80029c0: 200000fa .word 0x200000fa
  6375. 80029c4: 20000094 .word 0x20000094
  6376. 80029c8: 2000008e .word 0x2000008e
  6377. 80029cc: 20000096 .word 0x20000096
  6378. 80029d0: 2000008c .word 0x2000008c
  6379. 080029d4 <TCS34725_getrawdata>:
  6380. void TCS34725_getrawdata(void)
  6381. {
  6382. 80029d4: b507 push {r0, r1, r2, lr}
  6383. RGB_Bit_st data;
  6384. uint8_t DEV_DATA = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_ID);
  6385. 80029d6: 2192 movs r1, #146 ; 0x92
  6386. 80029d8: 2052 movs r0, #82 ; 0x52
  6387. 80029da: f7ff ff1d bl 8002818 <TCS34725_I2C_Read>
  6388. data.Clear_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAL);
  6389. 80029de: 2194 movs r1, #148 ; 0x94
  6390. 80029e0: 2052 movs r0, #82 ; 0x52
  6391. 80029e2: f7ff ff19 bl 8002818 <TCS34725_I2C_Read>
  6392. data.Clear_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAH);
  6393. 80029e6: 2195 movs r1, #149 ; 0x95
  6394. data.Clear_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAL);
  6395. 80029e8: f88d 0001 strb.w r0, [sp, #1]
  6396. data.Clear_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAH);
  6397. 80029ec: 2052 movs r0, #82 ; 0x52
  6398. 80029ee: f7ff ff13 bl 8002818 <TCS34725_I2C_Read>
  6399. data.Red_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAL);
  6400. 80029f2: 2196 movs r1, #150 ; 0x96
  6401. data.Clear_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAH);
  6402. 80029f4: f88d 0000 strb.w r0, [sp]
  6403. data.Red_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAL);
  6404. 80029f8: 2052 movs r0, #82 ; 0x52
  6405. 80029fa: f7ff ff0d bl 8002818 <TCS34725_I2C_Read>
  6406. data.Red_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAH);
  6407. 80029fe: 2197 movs r1, #151 ; 0x97
  6408. data.Red_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAL);
  6409. 8002a00: f88d 0003 strb.w r0, [sp, #3]
  6410. data.Red_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAH);
  6411. 8002a04: 2052 movs r0, #82 ; 0x52
  6412. 8002a06: f7ff ff07 bl 8002818 <TCS34725_I2C_Read>
  6413. data.Green_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAL);
  6414. 8002a0a: 2198 movs r1, #152 ; 0x98
  6415. data.Red_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAH);
  6416. 8002a0c: f88d 0002 strb.w r0, [sp, #2]
  6417. data.Green_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAL);
  6418. 8002a10: 2052 movs r0, #82 ; 0x52
  6419. 8002a12: f7ff ff01 bl 8002818 <TCS34725_I2C_Read>
  6420. data.Green_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAH);
  6421. 8002a16: 2199 movs r1, #153 ; 0x99
  6422. data.Green_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAL);
  6423. 8002a18: f88d 0005 strb.w r0, [sp, #5]
  6424. data.Green_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAH);
  6425. 8002a1c: 2052 movs r0, #82 ; 0x52
  6426. 8002a1e: f7ff fefb bl 8002818 <TCS34725_I2C_Read>
  6427. data.Blue_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAL);
  6428. 8002a22: 219a movs r1, #154 ; 0x9a
  6429. data.Green_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAH);
  6430. 8002a24: f88d 0004 strb.w r0, [sp, #4]
  6431. data.Blue_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAL);
  6432. 8002a28: 2052 movs r0, #82 ; 0x52
  6433. 8002a2a: f7ff fef5 bl 8002818 <TCS34725_I2C_Read>
  6434. data.Blue_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAH);
  6435. 8002a2e: 219b movs r1, #155 ; 0x9b
  6436. data.Blue_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAL);
  6437. 8002a30: f88d 0007 strb.w r0, [sp, #7]
  6438. data.Blue_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAH);
  6439. 8002a34: 2052 movs r0, #82 ; 0x52
  6440. 8002a36: f7ff feef bl 8002818 <TCS34725_I2C_Read>
  6441. 8002a3a: f88d 0006 strb.w r0, [sp, #6]
  6442. RED = (R_DATA_H << 8) | R_DATA_L;
  6443. GREEN = (G_DATA_H << 8) | G_DATA_L;
  6444. BLUE = (B_DATA_H << 8) | B_DATA_L;
  6445. #endif // PYJ.2019.03.16_END --
  6446. RGB_data_arrage(&data.Clear_L);
  6447. 8002a3e: f10d 0001 add.w r0, sp, #1
  6448. 8002a42: f7ff ff15 bl 8002870 <RGB_data_arrage>
  6449. printf("6. B\t:\tHEX : [%04x]\tDEC : [%05d]\r\n", BLUE,BLUE);
  6450. #else
  6451. #endif
  6452. }
  6453. 8002a46: b003 add sp, #12
  6454. 8002a48: f85d fb04 ldr.w pc, [sp], #4
  6455. 08002a4c <TCS34725_enable>:
  6456. reg = TCS34725_I2C_Read(TCS34725_ADDRESS,TCS34725_ENABLE);
  6457. TCS34725_I2C_Write(TCS34725_ADDRESS,TCS34725_ENABLE, reg & ~(TCS34725_ENABLE_PON | TCS34725_ENABLE_AEN));
  6458. }
  6459. void TCS34725_enable(void)
  6460. {
  6461. 8002a4c: b508 push {r3, lr}
  6462. TCS34725_I2C_Write(TCS34725_ADDRESS, TCS34725_ENABLE, TCS34725_ENABLE_PON);
  6463. 8002a4e: 2201 movs r2, #1
  6464. 8002a50: 2100 movs r1, #0
  6465. 8002a52: 2052 movs r0, #82 ; 0x52
  6466. 8002a54: f7ff fef8 bl 8002848 <TCS34725_I2C_Write>
  6467. HAL_Delay(3);
  6468. 8002a58: 2003 movs r0, #3
  6469. 8002a5a: f7fd fc1b bl 8000294 <HAL_Delay>
  6470. TCS34725_I2C_Write(TCS34725_ADDRESS, TCS34725_ENABLE, TCS34725_ENABLE_PON | TCS34725_ENABLE_AEN);
  6471. 8002a5e: 2203 movs r2, #3
  6472. 8002a60: 2100 movs r1, #0
  6473. 8002a62: 2052 movs r0, #82 ; 0x52
  6474. 8002a64: f7ff fef0 bl 8002848 <TCS34725_I2C_Write>
  6475. switch (_tcs34725IntegrationTime)
  6476. 8002a68: 4b0f ldr r3, [pc, #60] ; (8002aa8 <TCS34725_enable+0x5c>)
  6477. 8002a6a: 781b ldrb r3, [r3, #0]
  6478. 8002a6c: 2bd5 cmp r3, #213 ; 0xd5
  6479. 8002a6e: d013 beq.n 8002a98 <TCS34725_enable+0x4c>
  6480. 8002a70: d803 bhi.n 8002a7a <TCS34725_enable+0x2e>
  6481. 8002a72: b1ab cbz r3, 8002aa0 <TCS34725_enable+0x54>
  6482. 8002a74: 2bc0 cmp r3, #192 ; 0xc0
  6483. 8002a76: d011 beq.n 8002a9c <TCS34725_enable+0x50>
  6484. 8002a78: bd08 pop {r3, pc}
  6485. 8002a7a: 2bf6 cmp r3, #246 ; 0xf6
  6486. 8002a7c: d00a beq.n 8002a94 <TCS34725_enable+0x48>
  6487. 8002a7e: 2bff cmp r3, #255 ; 0xff
  6488. 8002a80: d003 beq.n 8002a8a <TCS34725_enable+0x3e>
  6489. 8002a82: 2beb cmp r3, #235 ; 0xeb
  6490. 8002a84: d10f bne.n 8002aa6 <TCS34725_enable+0x5a>
  6491. break;
  6492. case TCS34725_INTEGRATIONTIME_24MS:
  6493. HAL_Delay(24);
  6494. break;
  6495. case TCS34725_INTEGRATIONTIME_50MS:
  6496. HAL_Delay(50);
  6497. 8002a86: 2032 movs r0, #50 ; 0x32
  6498. 8002a88: e000 b.n 8002a8c <TCS34725_enable+0x40>
  6499. HAL_Delay(3);
  6500. 8002a8a: 2003 movs r0, #3
  6501. break;
  6502. case TCS34725_INTEGRATIONTIME_700MS:
  6503. HAL_Delay(700);
  6504. break;
  6505. }
  6506. }
  6507. 8002a8c: e8bd 4008 ldmia.w sp!, {r3, lr}
  6508. HAL_Delay(700);
  6509. 8002a90: f7fd bc00 b.w 8000294 <HAL_Delay>
  6510. HAL_Delay(24);
  6511. 8002a94: 2018 movs r0, #24
  6512. 8002a96: e7f9 b.n 8002a8c <TCS34725_enable+0x40>
  6513. HAL_Delay(101);
  6514. 8002a98: 2065 movs r0, #101 ; 0x65
  6515. 8002a9a: e7f7 b.n 8002a8c <TCS34725_enable+0x40>
  6516. HAL_Delay(154);
  6517. 8002a9c: 209a movs r0, #154 ; 0x9a
  6518. 8002a9e: e7f5 b.n 8002a8c <TCS34725_enable+0x40>
  6519. HAL_Delay(700);
  6520. 8002aa0: f44f 702f mov.w r0, #700 ; 0x2bc
  6521. 8002aa4: e7f2 b.n 8002a8c <TCS34725_enable+0x40>
  6522. 8002aa6: bd08 pop {r3, pc}
  6523. 8002aa8: 20000149 .word 0x20000149
  6524. 08002aac <HAL_UART_RxCpltCallback>:
  6525. /* Private user code ---------------------------------------------------------*/
  6526. /* USER CODE BEGIN 0 */
  6527. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  6528. {
  6529. if(huart->Instance == USART1){
  6530. 8002aac: 6802 ldr r2, [r0, #0]
  6531. 8002aae: 4b22 ldr r3, [pc, #136] ; (8002b38 <HAL_UART_RxCpltCallback+0x8c>)
  6532. {
  6533. 8002ab0: b510 push {r4, lr}
  6534. if(huart->Instance == USART1){
  6535. 8002ab2: 429a cmp r2, r3
  6536. {
  6537. 8002ab4: 4604 mov r4, r0
  6538. if(huart->Instance == USART1){
  6539. 8002ab6: d11b bne.n 8002af0 <HAL_UART_RxCpltCallback+0x44>
  6540. buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR;
  6541. 8002ab8: 4b20 ldr r3, [pc, #128] ; (8002b3c <HAL_UART_RxCpltCallback+0x90>)
  6542. 8002aba: 4821 ldr r0, [pc, #132] ; (8002b40 <HAL_UART_RxCpltCallback+0x94>)
  6543. 8002abc: 781a ldrb r2, [r3, #0]
  6544. 8002abe: 4921 ldr r1, [pc, #132] ; (8002b44 <HAL_UART_RxCpltCallback+0x98>)
  6545. 8002ac0: 7800 ldrb r0, [r0, #0]
  6546. 8002ac2: 5488 strb r0, [r1, r2]
  6547. if(buf[count_in1++] == 0xEB){
  6548. 8002ac4: 781a ldrb r2, [r3, #0]
  6549. 8002ac6: b2d2 uxtb r2, r2
  6550. 8002ac8: 1c50 adds r0, r2, #1
  6551. 8002aca: 5c8a ldrb r2, [r1, r2]
  6552. 8002acc: b2c0 uxtb r0, r0
  6553. 8002ace: 2aeb cmp r2, #235 ; 0xeb
  6554. 8002ad0: 7018 strb r0, [r3, #0]
  6555. 8002ad2: d108 bne.n 8002ae6 <HAL_UART_RxCpltCallback+0x3a>
  6556. if(buf[Bluecell_Length] == (count_in1 - 3))
  6557. 8002ad4: 781a ldrb r2, [r3, #0]
  6558. 8002ad6: 7889 ldrb r1, [r1, #2]
  6559. 8002ad8: 3a03 subs r2, #3
  6560. 8002ada: 4291 cmp r1, r2
  6561. }
  6562. }
  6563. void UartDataRecvSet(uint8_t val){
  6564. UartDataisReved = val;
  6565. 8002adc: bf0a itet eq
  6566. 8002ade: 2201 moveq r2, #1
  6567. count_in1 = 0;
  6568. 8002ae0: 2200 movne r2, #0
  6569. UartDataisReved = val;
  6570. 8002ae2: 4b19 ldreq r3, [pc, #100] ; (8002b48 <HAL_UART_RxCpltCallback+0x9c>)
  6571. count_in1 = 0;
  6572. 8002ae4: 701a strb r2, [r3, #0]
  6573. HAL_UART_Receive_IT(&huart1,&rx1_data[0],1);
  6574. 8002ae6: 2201 movs r2, #1
  6575. 8002ae8: 4915 ldr r1, [pc, #84] ; (8002b40 <HAL_UART_RxCpltCallback+0x94>)
  6576. 8002aea: 4818 ldr r0, [pc, #96] ; (8002b4c <HAL_UART_RxCpltCallback+0xa0>)
  6577. 8002aec: f7ff fcd6 bl 800249c <HAL_UART_Receive_IT>
  6578. if(huart->Instance == USART2){
  6579. 8002af0: 6822 ldr r2, [r4, #0]
  6580. 8002af2: 4b17 ldr r3, [pc, #92] ; (8002b50 <HAL_UART_RxCpltCallback+0xa4>)
  6581. 8002af4: 429a cmp r2, r3
  6582. 8002af6: d11d bne.n 8002b34 <HAL_UART_RxCpltCallback+0x88>
  6583. buf[count_in2] = rx2_data[0];
  6584. 8002af8: 4b16 ldr r3, [pc, #88] ; (8002b54 <HAL_UART_RxCpltCallback+0xa8>)
  6585. 8002afa: 4817 ldr r0, [pc, #92] ; (8002b58 <HAL_UART_RxCpltCallback+0xac>)
  6586. 8002afc: 781a ldrb r2, [r3, #0]
  6587. 8002afe: 4911 ldr r1, [pc, #68] ; (8002b44 <HAL_UART_RxCpltCallback+0x98>)
  6588. 8002b00: 7800 ldrb r0, [r0, #0]
  6589. 8002b02: 5488 strb r0, [r1, r2]
  6590. if(buf[count_in2++] == 0xEB){
  6591. 8002b04: 781a ldrb r2, [r3, #0]
  6592. 8002b06: b2d2 uxtb r2, r2
  6593. 8002b08: 1c50 adds r0, r2, #1
  6594. 8002b0a: 5c8a ldrb r2, [r1, r2]
  6595. 8002b0c: b2c0 uxtb r0, r0
  6596. 8002b0e: 2aeb cmp r2, #235 ; 0xeb
  6597. 8002b10: 7018 strb r0, [r3, #0]
  6598. 8002b12: d108 bne.n 8002b26 <HAL_UART_RxCpltCallback+0x7a>
  6599. if(buf[Bluecell_Length] == (count_in2 - 3))
  6600. 8002b14: 781a ldrb r2, [r3, #0]
  6601. 8002b16: 7889 ldrb r1, [r1, #2]
  6602. 8002b18: 3a03 subs r2, #3
  6603. 8002b1a: 4291 cmp r1, r2
  6604. UartDataisReved = val;
  6605. 8002b1c: bf0a itet eq
  6606. 8002b1e: 2202 moveq r2, #2
  6607. count_in2 = 0;
  6608. 8002b20: 2200 movne r2, #0
  6609. UartDataisReved = val;
  6610. 8002b22: 4b09 ldreq r3, [pc, #36] ; (8002b48 <HAL_UART_RxCpltCallback+0x9c>)
  6611. count_in2 = 0;
  6612. 8002b24: 701a strb r2, [r3, #0]
  6613. HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
  6614. 8002b26: 2201 movs r2, #1
  6615. }
  6616. 8002b28: e8bd 4010 ldmia.w sp!, {r4, lr}
  6617. HAL_UART_Receive_IT(&huart2,&rx2_data[0],1);
  6618. 8002b2c: 490a ldr r1, [pc, #40] ; (8002b58 <HAL_UART_RxCpltCallback+0xac>)
  6619. 8002b2e: 480b ldr r0, [pc, #44] ; (8002b5c <HAL_UART_RxCpltCallback+0xb0>)
  6620. 8002b30: f7ff bcb4 b.w 800249c <HAL_UART_Receive_IT>
  6621. 8002b34: bd10 pop {r4, pc}
  6622. 8002b36: bf00 nop
  6623. 8002b38: 40013800 .word 0x40013800
  6624. 8002b3c: 20000136 .word 0x20000136
  6625. 8002b40: 2000024a .word 0x2000024a
  6626. 8002b44: 20000104 .word 0x20000104
  6627. 8002b48: 2000014c .word 0x2000014c
  6628. 8002b4c: 200001d8 .word 0x200001d8
  6629. 8002b50: 40004400 .word 0x40004400
  6630. 8002b54: 20000137 .word 0x20000137
  6631. 8002b58: 200001a4 .word 0x200001a4
  6632. 8002b5c: 2000024c .word 0x2000024c
  6633. 08002b60 <HAL_TIM_PeriodElapsedCallback>:
  6634. if(htim->Instance == TIM7){
  6635. 8002b60: 6802 ldr r2, [r0, #0]
  6636. 8002b62: 4b06 ldr r3, [pc, #24] ; (8002b7c <HAL_TIM_PeriodElapsedCallback+0x1c>)
  6637. 8002b64: 429a cmp r2, r3
  6638. 8002b66: d107 bne.n 8002b78 <HAL_TIM_PeriodElapsedCallback+0x18>
  6639. UartTimerCnt++;
  6640. 8002b68: 4a05 ldr r2, [pc, #20] ; (8002b80 <HAL_TIM_PeriodElapsedCallback+0x20>)
  6641. 8002b6a: 6813 ldr r3, [r2, #0]
  6642. 8002b6c: 3301 adds r3, #1
  6643. 8002b6e: 6013 str r3, [r2, #0]
  6644. LedTimerCnt++;
  6645. 8002b70: 4a04 ldr r2, [pc, #16] ; (8002b84 <HAL_TIM_PeriodElapsedCallback+0x24>)
  6646. 8002b72: 6813 ldr r3, [r2, #0]
  6647. 8002b74: 3301 adds r3, #1
  6648. 8002b76: 6013 str r3, [r2, #0]
  6649. 8002b78: 4770 bx lr
  6650. 8002b7a: bf00 nop
  6651. 8002b7c: 40001400 .word 0x40001400
  6652. 8002b80: 20000100 .word 0x20000100
  6653. 8002b84: 200000fc .word 0x200000fc
  6654. 08002b88 <_write>:
  6655. uint8_t UartDataRecvGet(void){
  6656. return UartDataisReved;
  6657. }
  6658. int _write (int file, uint8_t *ptr, uint16_t len)
  6659. {
  6660. 8002b88: b510 push {r4, lr}
  6661. 8002b8a: 4614 mov r4, r2
  6662. HAL_UART_Transmit (&huart1, ptr, len, 10);
  6663. 8002b8c: 230a movs r3, #10
  6664. 8002b8e: 4802 ldr r0, [pc, #8] ; (8002b98 <_write+0x10>)
  6665. 8002b90: f7ff fc28 bl 80023e4 <HAL_UART_Transmit>
  6666. return len;
  6667. }
  6668. 8002b94: 4620 mov r0, r4
  6669. 8002b96: bd10 pop {r4, pc}
  6670. 8002b98: 200001d8 .word 0x200001d8
  6671. 08002b9c <Uart2_Data_Send>:
  6672. void Uart1_Data_Send(uint8_t* data,uint8_t size){ //Firmware Download Cable
  6673. HAL_UART_Transmit(&huart1, data,size, 10);
  6674. }
  6675. void Uart2_Data_Send(uint8_t* data,uint8_t size){ // Controller Comunication Cable
  6676. HAL_UART_Transmit(&huart2, data,size, 10);
  6677. 8002b9c: 460a mov r2, r1
  6678. 8002b9e: 230a movs r3, #10
  6679. 8002ba0: 4601 mov r1, r0
  6680. 8002ba2: 4801 ldr r0, [pc, #4] ; (8002ba8 <Uart2_Data_Send+0xc>)
  6681. 8002ba4: f7ff bc1e b.w 80023e4 <HAL_UART_Transmit>
  6682. 8002ba8: 2000024c .word 0x2000024c
  6683. 08002bac <Uart_dataCheck>:
  6684. }
  6685. void Uart_dataCheck(uint8_t* cnt){
  6686. 8002bac: b5f8 push {r3, r4, r5, r6, r7, lr}
  6687. 8002bae: 4605 mov r5, r0
  6688. etError crccheck = 0;
  6689. #if 1 // PYJ.2019.03.17_BEGIN --
  6690. for(uint8_t i = 0; i < (* cnt); i++){
  6691. 8002bb0: 2300 movs r3, #0
  6692. 8002bb2: 4c1f ldr r4, [pc, #124] ; (8002c30 <Uart_dataCheck+0x84>)
  6693. printf("%02x ",buf[i]);
  6694. 8002bb4: 4f1f ldr r7, [pc, #124] ; (8002c34 <Uart_dataCheck+0x88>)
  6695. for(uint8_t i = 0; i < (* cnt); i++){
  6696. 8002bb6: 782a ldrb r2, [r5, #0]
  6697. 8002bb8: 1c5e adds r6, r3, #1
  6698. 8002bba: b2db uxtb r3, r3
  6699. 8002bbc: 429a cmp r2, r3
  6700. 8002bbe: d820 bhi.n 8002c02 <Uart_dataCheck+0x56>
  6701. }
  6702. printf("\r\n");
  6703. 8002bc0: 481d ldr r0, [pc, #116] ; (8002c38 <Uart_dataCheck+0x8c>)
  6704. 8002bc2: f000 fc0d bl 80033e0 <puts>
  6705. #endif // PYJ.2019.03.17_END --
  6706. crccheck = STH30_CheckCrc(&buf[Bluecell_Type],buf[Bluecell_Length],buf[buf[Bluecell_Length] + 1]);
  6707. 8002bc6: 78a1 ldrb r1, [r4, #2]
  6708. 8002bc8: 481c ldr r0, [pc, #112] ; (8002c3c <Uart_dataCheck+0x90>)
  6709. 8002bca: 1863 adds r3, r4, r1
  6710. 8002bcc: 785a ldrb r2, [r3, #1]
  6711. 8002bce: f000 f9da bl 8002f86 <STH30_CheckCrc>
  6712. if(crccheck == CHECKSUM_ERROR){
  6713. 8002bd2: bb10 cbnz r0, 8002c1a <Uart_dataCheck+0x6e>
  6714. for(uint8_t i = 0; i < (*cnt); i++){
  6715. printf("%02x ",buf[i]);
  6716. 8002bd4: 4f17 ldr r7, [pc, #92] ; (8002c34 <Uart_dataCheck+0x88>)
  6717. for(uint8_t i = 0; i < (*cnt); i++){
  6718. 8002bd6: 782b ldrb r3, [r5, #0]
  6719. 8002bd8: 1c46 adds r6, r0, #1
  6720. 8002bda: b2c0 uxtb r0, r0
  6721. 8002bdc: 4283 cmp r3, r0
  6722. 8002bde: d816 bhi.n 8002c0e <Uart_dataCheck+0x62>
  6723. }
  6724. printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,buf[buf[Bluecell_Length] + 1]);
  6725. 8002be0: 78a3 ldrb r3, [r4, #2]
  6726. 8002be2: 2100 movs r1, #0
  6727. 8002be4: 441c add r4, r3
  6728. 8002be6: 7862 ldrb r2, [r4, #1]
  6729. 8002be8: 4815 ldr r0, [pc, #84] ; (8002c40 <Uart_dataCheck+0x94>)
  6730. 8002bea: f000 fb85 bl 80032f8 <iprintf>
  6731. RGB_Sensor_Func(&buf[bluecell_stx]);
  6732. }
  6733. else{
  6734. printf("What Happen?\r\n");
  6735. }
  6736. *cnt = 0;
  6737. 8002bee: 2100 movs r1, #0
  6738. UartDataisReved = val;
  6739. 8002bf0: 4b14 ldr r3, [pc, #80] ; (8002c44 <Uart_dataCheck+0x98>)
  6740. *cnt = 0;
  6741. 8002bf2: 7029 strb r1, [r5, #0]
  6742. UartDataisReved = val;
  6743. 8002bf4: 7019 strb r1, [r3, #0]
  6744. UartDataRecvSet(0);
  6745. memset(buf,0x00,buf_size);
  6746. 8002bf6: 2232 movs r2, #50 ; 0x32
  6747. }
  6748. 8002bf8: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
  6749. memset(buf,0x00,buf_size);
  6750. 8002bfc: 480c ldr r0, [pc, #48] ; (8002c30 <Uart_dataCheck+0x84>)
  6751. 8002bfe: f000 bb73 b.w 80032e8 <memset>
  6752. printf("%02x ",buf[i]);
  6753. 8002c02: 5ce1 ldrb r1, [r4, r3]
  6754. 8002c04: 4638 mov r0, r7
  6755. 8002c06: f000 fb77 bl 80032f8 <iprintf>
  6756. 8002c0a: 4633 mov r3, r6
  6757. 8002c0c: e7d3 b.n 8002bb6 <Uart_dataCheck+0xa>
  6758. printf("%02x ",buf[i]);
  6759. 8002c0e: 5c21 ldrb r1, [r4, r0]
  6760. 8002c10: 4638 mov r0, r7
  6761. 8002c12: f000 fb71 bl 80032f8 <iprintf>
  6762. 8002c16: 4630 mov r0, r6
  6763. 8002c18: e7dd b.n 8002bd6 <Uart_dataCheck+0x2a>
  6764. else if(crccheck == NO_ERROR){
  6765. 8002c1a: 2801 cmp r0, #1
  6766. 8002c1c: d103 bne.n 8002c26 <Uart_dataCheck+0x7a>
  6767. RGB_Sensor_Func(&buf[bluecell_stx]);
  6768. 8002c1e: 4804 ldr r0, [pc, #16] ; (8002c30 <Uart_dataCheck+0x84>)
  6769. 8002c20: f7ff fd4c bl 80026bc <RGB_Sensor_Func>
  6770. 8002c24: e7e3 b.n 8002bee <Uart_dataCheck+0x42>
  6771. printf("What Happen?\r\n");
  6772. 8002c26: 4808 ldr r0, [pc, #32] ; (8002c48 <Uart_dataCheck+0x9c>)
  6773. 8002c28: f000 fbda bl 80033e0 <puts>
  6774. 8002c2c: e7df b.n 8002bee <Uart_dataCheck+0x42>
  6775. 8002c2e: bf00 nop
  6776. 8002c30: 20000104 .word 0x20000104
  6777. 8002c34: 080043fb .word 0x080043fb
  6778. 8002c38: 080044c3 .word 0x080044c3
  6779. 8002c3c: 20000105 .word 0x20000105
  6780. 8002c40: 08004467 .word 0x08004467
  6781. 8002c44: 2000014c .word 0x2000014c
  6782. 8002c48: 0800448d .word 0x0800448d
  6783. 08002c4c <SystemClock_Config>:
  6784. /**
  6785. * @brief System Clock Configuration
  6786. * @retval None
  6787. */
  6788. void SystemClock_Config(void)
  6789. {
  6790. 8002c4c: b530 push {r4, r5, lr}
  6791. 8002c4e: b093 sub sp, #76 ; 0x4c
  6792. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  6793. 8002c50: 2228 movs r2, #40 ; 0x28
  6794. 8002c52: 2100 movs r1, #0
  6795. 8002c54: a808 add r0, sp, #32
  6796. 8002c56: f000 fb47 bl 80032e8 <memset>
  6797. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  6798. 8002c5a: 2214 movs r2, #20
  6799. 8002c5c: 2100 movs r1, #0
  6800. 8002c5e: a803 add r0, sp, #12
  6801. 8002c60: f000 fb42 bl 80032e8 <memset>
  6802. RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  6803. /**Initializes the CPU, AHB and APB busses clocks
  6804. */
  6805. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  6806. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  6807. 8002c64: 2301 movs r3, #1
  6808. RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  6809. 8002c66: 2400 movs r4, #0
  6810. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  6811. 8002c68: 2502 movs r5, #2
  6812. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  6813. 8002c6a: 930c str r3, [sp, #48] ; 0x30
  6814. RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  6815. 8002c6c: 2310 movs r3, #16
  6816. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
  6817. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  6818. 8002c6e: a808 add r0, sp, #32
  6819. RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  6820. 8002c70: 930d str r3, [sp, #52] ; 0x34
  6821. RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  6822. 8002c72: 9400 str r4, [sp, #0]
  6823. 8002c74: 9401 str r4, [sp, #4]
  6824. 8002c76: 9402 str r4, [sp, #8]
  6825. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  6826. 8002c78: 9508 str r5, [sp, #32]
  6827. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  6828. 8002c7a: f7fe fe09 bl 8001890 <HAL_RCC_OscConfig>
  6829. {
  6830. Error_Handler();
  6831. }
  6832. /**Initializes the CPU, AHB and APB busses clocks
  6833. */
  6834. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  6835. 8002c7e: 230f movs r3, #15
  6836. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
  6837. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  6838. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  6839. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  6840. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
  6841. 8002c80: 4621 mov r1, r4
  6842. 8002c82: a803 add r0, sp, #12
  6843. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  6844. 8002c84: 9303 str r3, [sp, #12]
  6845. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
  6846. 8002c86: 9404 str r4, [sp, #16]
  6847. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  6848. 8002c88: 9405 str r4, [sp, #20]
  6849. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  6850. 8002c8a: 9406 str r4, [sp, #24]
  6851. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  6852. 8002c8c: 9407 str r4, [sp, #28]
  6853. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
  6854. 8002c8e: f7fe ffcf bl 8001c30 <HAL_RCC_ClockConfig>
  6855. {
  6856. Error_Handler();
  6857. }
  6858. PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  6859. PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2;
  6860. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  6861. 8002c92: 4668 mov r0, sp
  6862. PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  6863. 8002c94: 9500 str r5, [sp, #0]
  6864. PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2;
  6865. 8002c96: 9402 str r4, [sp, #8]
  6866. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  6867. 8002c98: f7ff f86e bl 8001d78 <HAL_RCCEx_PeriphCLKConfig>
  6868. {
  6869. Error_Handler();
  6870. }
  6871. }
  6872. 8002c9c: b013 add sp, #76 ; 0x4c
  6873. 8002c9e: bd30 pop {r4, r5, pc}
  6874. 08002ca0 <main>:
  6875. {
  6876. 8002ca0: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
  6877. 8002ca4: b089 sub sp, #36 ; 0x24
  6878. HAL_Init();
  6879. 8002ca6: f7fd fad7 bl 8000258 <HAL_Init>
  6880. SystemClock_Config();
  6881. 8002caa: f7ff ffcf bl 8002c4c <SystemClock_Config>
  6882. * @param None
  6883. * @retval None
  6884. */
  6885. static void MX_GPIO_Init(void)
  6886. {
  6887. GPIO_InitTypeDef GPIO_InitStruct = {0};
  6888. 8002cae: 2210 movs r2, #16
  6889. 8002cb0: 2100 movs r1, #0
  6890. 8002cb2: eb0d 0002 add.w r0, sp, r2
  6891. 8002cb6: f000 fb17 bl 80032e8 <memset>
  6892. /* GPIO Ports Clock Enable */
  6893. __HAL_RCC_GPIOC_CLK_ENABLE();
  6894. 8002cba: 4b87 ldr r3, [pc, #540] ; (8002ed8 <main+0x238>)
  6895. __HAL_RCC_GPIOA_CLK_ENABLE();
  6896. __HAL_RCC_GPIOB_CLK_ENABLE();
  6897. /*Configure GPIO pin Output Level */
  6898. HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
  6899. 8002cbc: f44f 4100 mov.w r1, #32768 ; 0x8000
  6900. __HAL_RCC_GPIOC_CLK_ENABLE();
  6901. 8002cc0: 699a ldr r2, [r3, #24]
  6902. HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
  6903. 8002cc2: 4886 ldr r0, [pc, #536] ; (8002edc <main+0x23c>)
  6904. __HAL_RCC_GPIOC_CLK_ENABLE();
  6905. 8002cc4: f042 0210 orr.w r2, r2, #16
  6906. 8002cc8: 619a str r2, [r3, #24]
  6907. 8002cca: 699a ldr r2, [r3, #24]
  6908. HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
  6909. /*Configure GPIO pin : PC15 */
  6910. GPIO_InitStruct.Pin = GPIO_PIN_15;
  6911. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  6912. GPIO_InitStruct.Pull = GPIO_NOPULL;
  6913. 8002ccc: 2400 movs r4, #0
  6914. __HAL_RCC_GPIOC_CLK_ENABLE();
  6915. 8002cce: f002 0210 and.w r2, r2, #16
  6916. 8002cd2: 9201 str r2, [sp, #4]
  6917. 8002cd4: 9a01 ldr r2, [sp, #4]
  6918. __HAL_RCC_GPIOA_CLK_ENABLE();
  6919. 8002cd6: 699a ldr r2, [r3, #24]
  6920. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  6921. 8002cd8: f04f 0901 mov.w r9, #1
  6922. __HAL_RCC_GPIOA_CLK_ENABLE();
  6923. 8002cdc: f042 0204 orr.w r2, r2, #4
  6924. 8002ce0: 619a str r2, [r3, #24]
  6925. 8002ce2: 699a ldr r2, [r3, #24]
  6926. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  6927. 8002ce4: 2502 movs r5, #2
  6928. __HAL_RCC_GPIOA_CLK_ENABLE();
  6929. 8002ce6: f002 0204 and.w r2, r2, #4
  6930. 8002cea: 9202 str r2, [sp, #8]
  6931. 8002cec: 9a02 ldr r2, [sp, #8]
  6932. __HAL_RCC_GPIOB_CLK_ENABLE();
  6933. 8002cee: 699a ldr r2, [r3, #24]
  6934. huart1.Init.BaudRate = 115200;
  6935. 8002cf0: f44f 38e1 mov.w r8, #115200 ; 0x1c200
  6936. __HAL_RCC_GPIOB_CLK_ENABLE();
  6937. 8002cf4: f042 0208 orr.w r2, r2, #8
  6938. 8002cf8: 619a str r2, [r3, #24]
  6939. 8002cfa: 699b ldr r3, [r3, #24]
  6940. HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
  6941. 8002cfc: 2200 movs r2, #0
  6942. __HAL_RCC_GPIOB_CLK_ENABLE();
  6943. 8002cfe: f003 0308 and.w r3, r3, #8
  6944. 8002d02: 9303 str r3, [sp, #12]
  6945. 8002d04: 9b03 ldr r3, [sp, #12]
  6946. HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET);
  6947. 8002d06: f7fd fd8d bl 8000824 <HAL_GPIO_WritePin>
  6948. HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8|GPIO_PIN_15, GPIO_PIN_RESET);
  6949. 8002d0a: 2200 movs r2, #0
  6950. 8002d0c: f44f 4101 mov.w r1, #33024 ; 0x8100
  6951. 8002d10: 4873 ldr r0, [pc, #460] ; (8002ee0 <main+0x240>)
  6952. 8002d12: f7fd fd87 bl 8000824 <HAL_GPIO_WritePin>
  6953. HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
  6954. 8002d16: 2200 movs r2, #0
  6955. 8002d18: 2138 movs r1, #56 ; 0x38
  6956. 8002d1a: 4872 ldr r0, [pc, #456] ; (8002ee4 <main+0x244>)
  6957. 8002d1c: f7fd fd82 bl 8000824 <HAL_GPIO_WritePin>
  6958. GPIO_InitStruct.Pin = GPIO_PIN_15;
  6959. 8002d20: f44f 4300 mov.w r3, #32768 ; 0x8000
  6960. HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  6961. 8002d24: a904 add r1, sp, #16
  6962. 8002d26: 486d ldr r0, [pc, #436] ; (8002edc <main+0x23c>)
  6963. GPIO_InitStruct.Pin = GPIO_PIN_15;
  6964. 8002d28: 9304 str r3, [sp, #16]
  6965. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  6966. 8002d2a: 9507 str r5, [sp, #28]
  6967. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  6968. 8002d2c: f8cd 9014 str.w r9, [sp, #20]
  6969. GPIO_InitStruct.Pull = GPIO_NOPULL;
  6970. 8002d30: 9406 str r4, [sp, #24]
  6971. HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
  6972. 8002d32: f7fd fc97 bl 8000664 <HAL_GPIO_Init>
  6973. /*Configure GPIO pins : PA8 PA15 */
  6974. GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_15;
  6975. 8002d36: f44f 4301 mov.w r3, #33024 ; 0x8100
  6976. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  6977. GPIO_InitStruct.Pull = GPIO_NOPULL;
  6978. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  6979. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  6980. 8002d3a: a904 add r1, sp, #16
  6981. 8002d3c: 4868 ldr r0, [pc, #416] ; (8002ee0 <main+0x240>)
  6982. GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_15;
  6983. 8002d3e: 9304 str r3, [sp, #16]
  6984. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  6985. 8002d40: 9507 str r5, [sp, #28]
  6986. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  6987. 8002d42: f8cd 9014 str.w r9, [sp, #20]
  6988. GPIO_InitStruct.Pull = GPIO_NOPULL;
  6989. 8002d46: 9406 str r4, [sp, #24]
  6990. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  6991. 8002d48: f7fd fc8c bl 8000664 <HAL_GPIO_Init>
  6992. /*Configure GPIO pins : PB3 PB4 PB5 */
  6993. GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
  6994. 8002d4c: 2338 movs r3, #56 ; 0x38
  6995. huart1.Init.Mode = UART_MODE_TX_RX;
  6996. 8002d4e: 270c movs r7, #12
  6997. huart1.Instance = USART1;
  6998. 8002d50: 4e65 ldr r6, [pc, #404] ; (8002ee8 <main+0x248>)
  6999. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7000. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7001. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7002. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7003. 8002d52: a904 add r1, sp, #16
  7004. 8002d54: 4863 ldr r0, [pc, #396] ; (8002ee4 <main+0x244>)
  7005. GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
  7006. 8002d56: 9304 str r3, [sp, #16]
  7007. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  7008. 8002d58: 9507 str r5, [sp, #28]
  7009. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  7010. 8002d5a: f8cd 9014 str.w r9, [sp, #20]
  7011. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7012. 8002d5e: 9406 str r4, [sp, #24]
  7013. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7014. 8002d60: f7fd fc80 bl 8000664 <HAL_GPIO_Init>
  7015. huart1.Init.BaudRate = 115200;
  7016. 8002d64: 4b61 ldr r3, [pc, #388] ; (8002eec <main+0x24c>)
  7017. huart2.Instance = USART2;
  7018. 8002d66: 4d62 ldr r5, [pc, #392] ; (8002ef0 <main+0x250>)
  7019. if (HAL_UART_Init(&huart1) != HAL_OK)
  7020. 8002d68: 4630 mov r0, r6
  7021. huart1.Init.BaudRate = 115200;
  7022. 8002d6a: e886 0108 stmia.w r6, {r3, r8}
  7023. huart1.Init.Mode = UART_MODE_TX_RX;
  7024. 8002d6e: 6177 str r7, [r6, #20]
  7025. huart1.Init.WordLength = UART_WORDLENGTH_8B;
  7026. 8002d70: 60b4 str r4, [r6, #8]
  7027. huart1.Init.StopBits = UART_STOPBITS_1;
  7028. 8002d72: 60f4 str r4, [r6, #12]
  7029. huart1.Init.Parity = UART_PARITY_NONE;
  7030. 8002d74: 6134 str r4, [r6, #16]
  7031. huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  7032. 8002d76: 61b4 str r4, [r6, #24]
  7033. huart1.Init.OverSampling = UART_OVERSAMPLING_16;
  7034. 8002d78: 61f4 str r4, [r6, #28]
  7035. if (HAL_UART_Init(&huart1) != HAL_OK)
  7036. 8002d7a: f7ff fb05 bl 8002388 <HAL_UART_Init>
  7037. huart2.Instance = USART2;
  7038. 8002d7e: 4b5d ldr r3, [pc, #372] ; (8002ef4 <main+0x254>)
  7039. if (HAL_UART_Init(&huart2) != HAL_OK)
  7040. 8002d80: 4628 mov r0, r5
  7041. huart2.Init.BaudRate = 115200;
  7042. 8002d82: e885 0108 stmia.w r5, {r3, r8}
  7043. huart2.Init.Mode = UART_MODE_TX_RX;
  7044. 8002d86: 616f str r7, [r5, #20]
  7045. huart2.Init.WordLength = UART_WORDLENGTH_8B;
  7046. 8002d88: 60ac str r4, [r5, #8]
  7047. huart2.Init.StopBits = UART_STOPBITS_1;
  7048. 8002d8a: 60ec str r4, [r5, #12]
  7049. huart2.Init.Parity = UART_PARITY_NONE;
  7050. 8002d8c: 612c str r4, [r5, #16]
  7051. huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  7052. 8002d8e: 61ac str r4, [r5, #24]
  7053. huart2.Init.OverSampling = UART_OVERSAMPLING_16;
  7054. 8002d90: 61ec str r4, [r5, #28]
  7055. if (HAL_UART_Init(&huart2) != HAL_OK)
  7056. 8002d92: f7ff faf9 bl 8002388 <HAL_UART_Init>
  7057. htim7.Init.Prescaler = 800 - 1;
  7058. 8002d96: f240 331f movw r3, #799 ; 0x31f
  7059. htim7.Instance = TIM7;
  7060. 8002d9a: f8df 81b0 ldr.w r8, [pc, #432] ; 8002f4c <main+0x2ac>
  7061. htim7.Init.Prescaler = 800 - 1;
  7062. 8002d9e: 4a56 ldr r2, [pc, #344] ; (8002ef8 <main+0x258>)
  7063. if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
  7064. 8002da0: 4640 mov r0, r8
  7065. htim7.Init.Prescaler = 800 - 1;
  7066. 8002da2: e888 000c stmia.w r8, {r2, r3}
  7067. htim7.Init.Period = 10- 1;
  7068. 8002da6: 2309 movs r3, #9
  7069. TIM_MasterConfigTypeDef sMasterConfig = {0};
  7070. 8002da8: 9404 str r4, [sp, #16]
  7071. htim7.Init.Period = 10- 1;
  7072. 8002daa: f8c8 300c str.w r3, [r8, #12]
  7073. TIM_MasterConfigTypeDef sMasterConfig = {0};
  7074. 8002dae: 9405 str r4, [sp, #20]
  7075. htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
  7076. 8002db0: f8c8 4008 str.w r4, [r8, #8]
  7077. htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  7078. 8002db4: f8c8 4018 str.w r4, [r8, #24]
  7079. if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
  7080. 8002db8: f7ff f950 bl 800205c <HAL_TIM_Base_Init>
  7081. if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
  7082. 8002dbc: a904 add r1, sp, #16
  7083. 8002dbe: 4640 mov r0, r8
  7084. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  7085. 8002dc0: 9404 str r4, [sp, #16]
  7086. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  7087. 8002dc2: 9405 str r4, [sp, #20]
  7088. if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
  7089. 8002dc4: f7ff f964 bl 8002090 <HAL_TIMEx_MasterConfigSynchronization>
  7090. hi2c1.Instance = I2C1;
  7091. 8002dc8: 484c ldr r0, [pc, #304] ; (8002efc <main+0x25c>)
  7092. hi2c1.Init.ClockSpeed = 100000;
  7093. 8002dca: 494d ldr r1, [pc, #308] ; (8002f00 <main+0x260>)
  7094. 8002dcc: 4b4d ldr r3, [pc, #308] ; (8002f04 <main+0x264>)
  7095. hadc1.Instance = ADC1;
  7096. 8002dce: 4f4e ldr r7, [pc, #312] ; (8002f08 <main+0x268>)
  7097. hi2c1.Init.ClockSpeed = 100000;
  7098. 8002dd0: e880 000a stmia.w r0, {r1, r3}
  7099. hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
  7100. 8002dd4: f44f 4380 mov.w r3, #16384 ; 0x4000
  7101. hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
  7102. 8002dd8: 6084 str r4, [r0, #8]
  7103. hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
  7104. 8002dda: 6103 str r3, [r0, #16]
  7105. hi2c1.Init.OwnAddress1 = 0;
  7106. 8002ddc: 60c4 str r4, [r0, #12]
  7107. hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
  7108. 8002dde: 6144 str r4, [r0, #20]
  7109. hi2c1.Init.OwnAddress2 = 0;
  7110. 8002de0: 6184 str r4, [r0, #24]
  7111. hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
  7112. 8002de2: 61c4 str r4, [r0, #28]
  7113. hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
  7114. 8002de4: 6204 str r4, [r0, #32]
  7115. if (HAL_I2C_Init(&hi2c1) != HAL_OK)
  7116. 8002de6: f7fd feef bl 8000bc8 <HAL_I2C_Init>
  7117. hadc1.Instance = ADC1;
  7118. 8002dea: 4b48 ldr r3, [pc, #288] ; (8002f0c <main+0x26c>)
  7119. if (HAL_ADC_Init(&hadc1) != HAL_OK)
  7120. 8002dec: 4638 mov r0, r7
  7121. hadc1.Instance = ADC1;
  7122. 8002dee: 603b str r3, [r7, #0]
  7123. hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
  7124. 8002df0: f44f 2360 mov.w r3, #917504 ; 0xe0000
  7125. hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
  7126. 8002df4: 60bc str r4, [r7, #8]
  7127. hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
  7128. 8002df6: 61fb str r3, [r7, #28]
  7129. hadc1.Init.ContinuousConvMode = DISABLE;
  7130. 8002df8: 60fc str r4, [r7, #12]
  7131. hadc1.Init.DiscontinuousConvMode = DISABLE;
  7132. 8002dfa: 617c str r4, [r7, #20]
  7133. hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
  7134. 8002dfc: 607c str r4, [r7, #4]
  7135. hadc1.Init.NbrOfConversion = 1;
  7136. 8002dfe: f8c7 9010 str.w r9, [r7, #16]
  7137. ADC_ChannelConfTypeDef sConfig = {0};
  7138. 8002e02: 9404 str r4, [sp, #16]
  7139. 8002e04: 9405 str r4, [sp, #20]
  7140. 8002e06: 9406 str r4, [sp, #24]
  7141. if (HAL_ADC_Init(&hadc1) != HAL_OK)
  7142. 8002e08: f7fd fafc bl 8000404 <HAL_ADC_Init>
  7143. if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
  7144. 8002e0c: a904 add r1, sp, #16
  7145. 8002e0e: 4638 mov r0, r7
  7146. sConfig.Channel = ADC_CHANNEL_0;
  7147. 8002e10: 9404 str r4, [sp, #16]
  7148. sConfig.Rank = ADC_REGULAR_RANK_1;
  7149. 8002e12: f8cd 9014 str.w r9, [sp, #20]
  7150. sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
  7151. 8002e16: 9406 str r4, [sp, #24]
  7152. if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
  7153. 8002e18: f7fd fa4e bl 80002b8 <HAL_ADC_ConfigChannel>
  7154. HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
  7155. 8002e1c: 4622 mov r2, r4
  7156. 8002e1e: 4621 mov r1, r4
  7157. 8002e20: 2025 movs r0, #37 ; 0x25
  7158. 8002e22: f7fd fb81 bl 8000528 <HAL_NVIC_SetPriority>
  7159. HAL_NVIC_EnableIRQ(USART1_IRQn);
  7160. 8002e26: 2025 movs r0, #37 ; 0x25
  7161. 8002e28: f7fd fbb2 bl 8000590 <HAL_NVIC_EnableIRQ>
  7162. HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
  7163. 8002e2c: 4622 mov r2, r4
  7164. 8002e2e: 4621 mov r1, r4
  7165. 8002e30: 2026 movs r0, #38 ; 0x26
  7166. 8002e32: f7fd fb79 bl 8000528 <HAL_NVIC_SetPriority>
  7167. HAL_NVIC_EnableIRQ(USART2_IRQn);
  7168. 8002e36: 2026 movs r0, #38 ; 0x26
  7169. 8002e38: f7fd fbaa bl 8000590 <HAL_NVIC_EnableIRQ>
  7170. HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
  7171. 8002e3c: 4622 mov r2, r4
  7172. 8002e3e: 4621 mov r1, r4
  7173. 8002e40: 2037 movs r0, #55 ; 0x37
  7174. 8002e42: f7fd fb71 bl 8000528 <HAL_NVIC_SetPriority>
  7175. HAL_NVIC_EnableIRQ(TIM7_IRQn);
  7176. 8002e46: 2037 movs r0, #55 ; 0x37
  7177. 8002e48: f7fd fba2 bl 8000590 <HAL_NVIC_EnableIRQ>
  7178. HAL_TIM_Base_Start_IT(&htim7);
  7179. 8002e4c: 4640 mov r0, r8
  7180. 8002e4e: f7ff f801 bl 8001e54 <HAL_TIM_Base_Start_IT>
  7181. HAL_UART_Receive_IT(&huart1, &rx1_data,1);
  7182. 8002e52: 464a mov r2, r9
  7183. 8002e54: 492e ldr r1, [pc, #184] ; (8002f10 <main+0x270>)
  7184. 8002e56: 4630 mov r0, r6
  7185. 8002e58: f7ff fb20 bl 800249c <HAL_UART_Receive_IT>
  7186. HAL_UART_Receive_IT(&huart2, &rx2_data,1);
  7187. 8002e5c: 464a mov r2, r9
  7188. 8002e5e: 492d ldr r1, [pc, #180] ; (8002f14 <main+0x274>)
  7189. 8002e60: 4628 mov r0, r5
  7190. 8002e62: f7ff fb1b bl 800249c <HAL_UART_Receive_IT>
  7191. setbuf(stdout, NULL); // \n ?��?��?��, printf �???????��?���?????? ?��?��?��
  7192. 8002e66: 4b2c ldr r3, [pc, #176] ; (8002f18 <main+0x278>)
  7193. 8002e68: 4621 mov r1, r4
  7194. 8002e6a: 681b ldr r3, [r3, #0]
  7195. return UartDataisReved;
  7196. 8002e6c: 4f2b ldr r7, [pc, #172] ; (8002f1c <main+0x27c>)
  7197. setbuf(stdout, NULL); // \n ?��?��?��, printf �???????��?���?????? ?��?��?��
  7198. 8002e6e: 6898 ldr r0, [r3, #8]
  7199. 8002e70: f000 fabe bl 80033f0 <setbuf>
  7200. printf("****************************************\r\n");
  7201. 8002e74: 482a ldr r0, [pc, #168] ; (8002f20 <main+0x280>)
  7202. 8002e76: f000 fab3 bl 80033e0 <puts>
  7203. printf("RGB Sensor Project\r\n");
  7204. 8002e7a: 482a ldr r0, [pc, #168] ; (8002f24 <main+0x284>)
  7205. 8002e7c: f000 fab0 bl 80033e0 <puts>
  7206. printf("Build at %s %s\r\n", __DATE__, __TIME__);
  7207. 8002e80: 4a29 ldr r2, [pc, #164] ; (8002f28 <main+0x288>)
  7208. 8002e82: 492a ldr r1, [pc, #168] ; (8002f2c <main+0x28c>)
  7209. 8002e84: 482a ldr r0, [pc, #168] ; (8002f30 <main+0x290>)
  7210. 8002e86: f000 fa37 bl 80032f8 <iprintf>
  7211. printf("Copyright (c) 2019. BLUECELL\r\n");
  7212. 8002e8a: 482a ldr r0, [pc, #168] ; (8002f34 <main+0x294>)
  7213. 8002e8c: f000 faa8 bl 80033e0 <puts>
  7214. printf("****************************************\r\n");
  7215. 8002e90: 4823 ldr r0, [pc, #140] ; (8002f20 <main+0x280>)
  7216. 8002e92: f000 faa5 bl 80033e0 <puts>
  7217. printf("My ID %02x \r\n",My_RGB_ID);
  7218. 8002e96: 4b28 ldr r3, [pc, #160] ; (8002f38 <main+0x298>)
  7219. 8002e98: 4828 ldr r0, [pc, #160] ; (8002f3c <main+0x29c>)
  7220. 8002e9a: 7819 ldrb r1, [r3, #0]
  7221. 8002e9c: f000 fa2c bl 80032f8 <iprintf>
  7222. TCS34725_enable();
  7223. 8002ea0: f7ff fdd4 bl 8002a4c <TCS34725_enable>
  7224. if(LedTimerCnt > 100){
  7225. 8002ea4: 4d26 ldr r5, [pc, #152] ; (8002f40 <main+0x2a0>)
  7226. HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
  7227. 8002ea6: 4e0d ldr r6, [pc, #52] ; (8002edc <main+0x23c>)
  7228. return UartDataisReved;
  7229. 8002ea8: 783c ldrb r4, [r7, #0]
  7230. if(uartdatarecv != 0){
  7231. 8002eaa: b14c cbz r4, 8002ec0 <main+0x220>
  7232. if(uartdatarecv == 1){
  7233. 8002eac: 2c01 cmp r4, #1
  7234. 8002eae: d103 bne.n 8002eb8 <main+0x218>
  7235. Uart_dataCheck(&count_in1);
  7236. 8002eb0: 4824 ldr r0, [pc, #144] ; (8002f44 <main+0x2a4>)
  7237. Uart_dataCheck(&count_in2);
  7238. 8002eb2: f7ff fe7b bl 8002bac <Uart_dataCheck>
  7239. 8002eb6: e7f7 b.n 8002ea8 <main+0x208>
  7240. }else if(uartdatarecv == 2){
  7241. 8002eb8: 2c02 cmp r4, #2
  7242. 8002eba: d1f5 bne.n 8002ea8 <main+0x208>
  7243. Uart_dataCheck(&count_in2);
  7244. 8002ebc: 4822 ldr r0, [pc, #136] ; (8002f48 <main+0x2a8>)
  7245. 8002ebe: e7f8 b.n 8002eb2 <main+0x212>
  7246. if(LedTimerCnt > 100){
  7247. 8002ec0: 682b ldr r3, [r5, #0]
  7248. 8002ec2: 2b64 cmp r3, #100 ; 0x64
  7249. 8002ec4: d9f0 bls.n 8002ea8 <main+0x208>
  7250. TCS34725_getrawdata();
  7251. 8002ec6: f7ff fd85 bl 80029d4 <TCS34725_getrawdata>
  7252. HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15);
  7253. 8002eca: f44f 4100 mov.w r1, #32768 ; 0x8000
  7254. 8002ece: 4630 mov r0, r6
  7255. 8002ed0: f7fd fcad bl 800082e <HAL_GPIO_TogglePin>
  7256. LedTimerCnt = 0;
  7257. 8002ed4: 602c str r4, [r5, #0]
  7258. 8002ed6: e7e7 b.n 8002ea8 <main+0x208>
  7259. 8002ed8: 40021000 .word 0x40021000
  7260. 8002edc: 40011000 .word 0x40011000
  7261. 8002ee0: 40010800 .word 0x40010800
  7262. 8002ee4: 40010c00 .word 0x40010c00
  7263. 8002ee8: 200001d8 .word 0x200001d8
  7264. 8002eec: 40013800 .word 0x40013800
  7265. 8002ef0: 2000024c .word 0x2000024c
  7266. 8002ef4: 40004400 .word 0x40004400
  7267. 8002ef8: 40001400 .word 0x40001400
  7268. 8002efc: 20000150 .word 0x20000150
  7269. 8002f00: 40005400 .word 0x40005400
  7270. 8002f04: 000186a0 .word 0x000186a0
  7271. 8002f08: 200001a8 .word 0x200001a8
  7272. 8002f0c: 40012400 .word 0x40012400
  7273. 8002f10: 2000024a .word 0x2000024a
  7274. 8002f14: 200001a4 .word 0x200001a4
  7275. 8002f18: 2000000c .word 0x2000000c
  7276. 8002f1c: 2000014c .word 0x2000014c
  7277. 8002f20: 0800449b .word 0x0800449b
  7278. 8002f24: 080044c5 .word 0x080044c5
  7279. 8002f28: 080044d9 .word 0x080044d9
  7280. 8002f2c: 080044e2 .word 0x080044e2
  7281. 8002f30: 080044ee .word 0x080044ee
  7282. 8002f34: 080044ff .word 0x080044ff
  7283. 8002f38: 2000008c .word 0x2000008c
  7284. 8002f3c: 0800451d .word 0x0800451d
  7285. 8002f40: 200000fc .word 0x200000fc
  7286. 8002f44: 20000136 .word 0x20000136
  7287. 8002f48: 20000137 .word 0x20000137
  7288. 8002f4c: 2000028c .word 0x2000028c
  7289. 08002f50 <STH30_CreateCrc>:
  7290. 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
  7291. 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
  7292. };
  7293. uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes)
  7294. {
  7295. 8002f50: b510 push {r4, lr}
  7296. uint8_t bit; // bit mask
  7297. uint8_t crc = 0xFF; // calculated checksum
  7298. 8002f52: 23ff movs r3, #255 ; 0xff
  7299. uint8_t byteCtr; // byte counter
  7300. // calculates 8-Bit checksum with given polynomial
  7301. for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
  7302. 8002f54: 4604 mov r4, r0
  7303. 8002f56: 1a22 subs r2, r4, r0
  7304. 8002f58: b2d2 uxtb r2, r2
  7305. 8002f5a: 4291 cmp r1, r2
  7306. 8002f5c: d801 bhi.n 8002f62 <STH30_CreateCrc+0x12>
  7307. if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
  7308. else crc = (crc << 1);
  7309. }
  7310. }
  7311. return crc;
  7312. }
  7313. 8002f5e: 4618 mov r0, r3
  7314. 8002f60: bd10 pop {r4, pc}
  7315. crc ^= (data[byteCtr]);
  7316. 8002f62: f814 2b01 ldrb.w r2, [r4], #1
  7317. 8002f66: 4053 eors r3, r2
  7318. 8002f68: 2208 movs r2, #8
  7319. if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
  7320. 8002f6a: f013 0f80 tst.w r3, #128 ; 0x80
  7321. 8002f6e: f102 32ff add.w r2, r2, #4294967295
  7322. 8002f72: ea4f 0343 mov.w r3, r3, lsl #1
  7323. 8002f76: bf18 it ne
  7324. 8002f78: f083 0331 eorne.w r3, r3, #49 ; 0x31
  7325. for(bit = 8; bit > 0; --bit)
  7326. 8002f7c: f012 02ff ands.w r2, r2, #255 ; 0xff
  7327. else crc = (crc << 1);
  7328. 8002f80: b2db uxtb r3, r3
  7329. for(bit = 8; bit > 0; --bit)
  7330. 8002f82: d1f2 bne.n 8002f6a <STH30_CreateCrc+0x1a>
  7331. 8002f84: e7e7 b.n 8002f56 <STH30_CreateCrc+0x6>
  7332. 08002f86 <STH30_CheckCrc>:
  7333. etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum)
  7334. {
  7335. 8002f86: b530 push {r4, r5, lr}
  7336. uint8_t bit; // bit mask
  7337. uint8_t crc = 0xFF; // calculated checksum
  7338. 8002f88: 23ff movs r3, #255 ; 0xff
  7339. uint8_t byteCtr; // byte counter
  7340. // calculates 8-Bit checksum with given polynomial
  7341. for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++)
  7342. 8002f8a: 4605 mov r5, r0
  7343. 8002f8c: 1a2c subs r4, r5, r0
  7344. 8002f8e: b2e4 uxtb r4, r4
  7345. 8002f90: 42a1 cmp r1, r4
  7346. 8002f92: d803 bhi.n 8002f9c <STH30_CheckCrc+0x16>
  7347. else crc = (crc << 1);
  7348. }
  7349. }
  7350. if(crc != checksum) return CHECKSUM_ERROR;
  7351. else return NO_ERROR;
  7352. }
  7353. 8002f94: 1a9b subs r3, r3, r2
  7354. 8002f96: 4258 negs r0, r3
  7355. 8002f98: 4158 adcs r0, r3
  7356. 8002f9a: bd30 pop {r4, r5, pc}
  7357. crc ^= (data[byteCtr]);
  7358. 8002f9c: f815 4b01 ldrb.w r4, [r5], #1
  7359. 8002fa0: 4063 eors r3, r4
  7360. 8002fa2: 2408 movs r4, #8
  7361. if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL;
  7362. 8002fa4: f013 0f80 tst.w r3, #128 ; 0x80
  7363. 8002fa8: f104 34ff add.w r4, r4, #4294967295
  7364. 8002fac: ea4f 0343 mov.w r3, r3, lsl #1
  7365. 8002fb0: bf18 it ne
  7366. 8002fb2: f083 0331 eorne.w r3, r3, #49 ; 0x31
  7367. for(bit = 8; bit > 0; --bit)
  7368. 8002fb6: f014 04ff ands.w r4, r4, #255 ; 0xff
  7369. else crc = (crc << 1);
  7370. 8002fba: b2db uxtb r3, r3
  7371. for(bit = 8; bit > 0; --bit)
  7372. 8002fbc: d1f2 bne.n 8002fa4 <STH30_CheckCrc+0x1e>
  7373. 8002fbe: e7e5 b.n 8002f8c <STH30_CheckCrc+0x6>
  7374. 08002fc0 <HAL_MspInit>:
  7375. {
  7376. /* USER CODE BEGIN MspInit 0 */
  7377. /* USER CODE END MspInit 0 */
  7378. __HAL_RCC_AFIO_CLK_ENABLE();
  7379. 8002fc0: 4b0e ldr r3, [pc, #56] ; (8002ffc <HAL_MspInit+0x3c>)
  7380. {
  7381. 8002fc2: b082 sub sp, #8
  7382. __HAL_RCC_AFIO_CLK_ENABLE();
  7383. 8002fc4: 699a ldr r2, [r3, #24]
  7384. 8002fc6: f042 0201 orr.w r2, r2, #1
  7385. 8002fca: 619a str r2, [r3, #24]
  7386. 8002fcc: 699a ldr r2, [r3, #24]
  7387. 8002fce: f002 0201 and.w r2, r2, #1
  7388. 8002fd2: 9200 str r2, [sp, #0]
  7389. 8002fd4: 9a00 ldr r2, [sp, #0]
  7390. __HAL_RCC_PWR_CLK_ENABLE();
  7391. 8002fd6: 69da ldr r2, [r3, #28]
  7392. 8002fd8: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000
  7393. 8002fdc: 61da str r2, [r3, #28]
  7394. 8002fde: 69db ldr r3, [r3, #28]
  7395. /* System interrupt init*/
  7396. /**DISABLE: JTAG-DP Disabled and SW-DP Disabled
  7397. */
  7398. __HAL_AFIO_REMAP_SWJ_DISABLE();
  7399. 8002fe0: 4a07 ldr r2, [pc, #28] ; (8003000 <HAL_MspInit+0x40>)
  7400. __HAL_RCC_PWR_CLK_ENABLE();
  7401. 8002fe2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  7402. 8002fe6: 9301 str r3, [sp, #4]
  7403. 8002fe8: 9b01 ldr r3, [sp, #4]
  7404. __HAL_AFIO_REMAP_SWJ_DISABLE();
  7405. 8002fea: 6853 ldr r3, [r2, #4]
  7406. 8002fec: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
  7407. 8002ff0: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
  7408. 8002ff4: 6053 str r3, [r2, #4]
  7409. /* USER CODE BEGIN MspInit 1 */
  7410. /* USER CODE END MspInit 1 */
  7411. }
  7412. 8002ff6: b002 add sp, #8
  7413. 8002ff8: 4770 bx lr
  7414. 8002ffa: bf00 nop
  7415. 8002ffc: 40021000 .word 0x40021000
  7416. 8003000: 40010000 .word 0x40010000
  7417. 08003004 <HAL_ADC_MspInit>:
  7418. * This function configures the hardware resources used in this example
  7419. * @param hadc: ADC handle pointer
  7420. * @retval None
  7421. */
  7422. void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
  7423. {
  7424. 8003004: b510 push {r4, lr}
  7425. 8003006: 4604 mov r4, r0
  7426. 8003008: b086 sub sp, #24
  7427. GPIO_InitTypeDef GPIO_InitStruct = {0};
  7428. 800300a: 2210 movs r2, #16
  7429. 800300c: 2100 movs r1, #0
  7430. 800300e: a802 add r0, sp, #8
  7431. 8003010: f000 f96a bl 80032e8 <memset>
  7432. if(hadc->Instance==ADC1)
  7433. 8003014: 6822 ldr r2, [r4, #0]
  7434. 8003016: 4b10 ldr r3, [pc, #64] ; (8003058 <HAL_ADC_MspInit+0x54>)
  7435. 8003018: 429a cmp r2, r3
  7436. 800301a: d11b bne.n 8003054 <HAL_ADC_MspInit+0x50>
  7437. {
  7438. /* USER CODE BEGIN ADC1_MspInit 0 */
  7439. /* USER CODE END ADC1_MspInit 0 */
  7440. /* Peripheral clock enable */
  7441. __HAL_RCC_ADC1_CLK_ENABLE();
  7442. 800301c: f503 436c add.w r3, r3, #60416 ; 0xec00
  7443. 8003020: 699a ldr r2, [r3, #24]
  7444. /**ADC1 GPIO Configuration
  7445. PA0-WKUP ------> ADC1_IN0
  7446. */
  7447. GPIO_InitStruct.Pin = GPIO_PIN_0;
  7448. GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
  7449. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7450. 8003022: a902 add r1, sp, #8
  7451. __HAL_RCC_ADC1_CLK_ENABLE();
  7452. 8003024: f442 7200 orr.w r2, r2, #512 ; 0x200
  7453. 8003028: 619a str r2, [r3, #24]
  7454. 800302a: 699a ldr r2, [r3, #24]
  7455. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7456. 800302c: 480b ldr r0, [pc, #44] ; (800305c <HAL_ADC_MspInit+0x58>)
  7457. __HAL_RCC_ADC1_CLK_ENABLE();
  7458. 800302e: f402 7200 and.w r2, r2, #512 ; 0x200
  7459. 8003032: 9200 str r2, [sp, #0]
  7460. 8003034: 9a00 ldr r2, [sp, #0]
  7461. __HAL_RCC_GPIOA_CLK_ENABLE();
  7462. 8003036: 699a ldr r2, [r3, #24]
  7463. 8003038: f042 0204 orr.w r2, r2, #4
  7464. 800303c: 619a str r2, [r3, #24]
  7465. 800303e: 699b ldr r3, [r3, #24]
  7466. 8003040: f003 0304 and.w r3, r3, #4
  7467. 8003044: 9301 str r3, [sp, #4]
  7468. 8003046: 9b01 ldr r3, [sp, #4]
  7469. GPIO_InitStruct.Pin = GPIO_PIN_0;
  7470. 8003048: 2301 movs r3, #1
  7471. 800304a: 9302 str r3, [sp, #8]
  7472. GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
  7473. 800304c: 2303 movs r3, #3
  7474. 800304e: 9303 str r3, [sp, #12]
  7475. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7476. 8003050: f7fd fb08 bl 8000664 <HAL_GPIO_Init>
  7477. /* USER CODE BEGIN ADC1_MspInit 1 */
  7478. /* USER CODE END ADC1_MspInit 1 */
  7479. }
  7480. }
  7481. 8003054: b006 add sp, #24
  7482. 8003056: bd10 pop {r4, pc}
  7483. 8003058: 40012400 .word 0x40012400
  7484. 800305c: 40010800 .word 0x40010800
  7485. 08003060 <HAL_I2C_MspInit>:
  7486. * This function configures the hardware resources used in this example
  7487. * @param hi2c: I2C handle pointer
  7488. * @retval None
  7489. */
  7490. void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
  7491. {
  7492. 8003060: b510 push {r4, lr}
  7493. 8003062: 4604 mov r4, r0
  7494. 8003064: b086 sub sp, #24
  7495. GPIO_InitTypeDef GPIO_InitStruct = {0};
  7496. 8003066: 2210 movs r2, #16
  7497. 8003068: 2100 movs r1, #0
  7498. 800306a: a802 add r0, sp, #8
  7499. 800306c: f000 f93c bl 80032e8 <memset>
  7500. if(hi2c->Instance==I2C1)
  7501. 8003070: 6822 ldr r2, [r4, #0]
  7502. 8003072: 4b15 ldr r3, [pc, #84] ; (80030c8 <HAL_I2C_MspInit+0x68>)
  7503. 8003074: 429a cmp r2, r3
  7504. 8003076: d124 bne.n 80030c2 <HAL_I2C_MspInit+0x62>
  7505. {
  7506. /* USER CODE BEGIN I2C1_MspInit 0 */
  7507. /* USER CODE END I2C1_MspInit 0 */
  7508. __HAL_RCC_GPIOB_CLK_ENABLE();
  7509. 8003078: 4c14 ldr r4, [pc, #80] ; (80030cc <HAL_I2C_MspInit+0x6c>)
  7510. PB7 ------> I2C1_SDA
  7511. */
  7512. GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
  7513. GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
  7514. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7515. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7516. 800307a: a902 add r1, sp, #8
  7517. __HAL_RCC_GPIOB_CLK_ENABLE();
  7518. 800307c: 69a3 ldr r3, [r4, #24]
  7519. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7520. 800307e: 4814 ldr r0, [pc, #80] ; (80030d0 <HAL_I2C_MspInit+0x70>)
  7521. __HAL_RCC_GPIOB_CLK_ENABLE();
  7522. 8003080: f043 0308 orr.w r3, r3, #8
  7523. 8003084: 61a3 str r3, [r4, #24]
  7524. 8003086: 69a3 ldr r3, [r4, #24]
  7525. 8003088: f003 0308 and.w r3, r3, #8
  7526. 800308c: 9300 str r3, [sp, #0]
  7527. 800308e: 9b00 ldr r3, [sp, #0]
  7528. GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
  7529. 8003090: 23c0 movs r3, #192 ; 0xc0
  7530. 8003092: 9302 str r3, [sp, #8]
  7531. GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
  7532. 8003094: 2312 movs r3, #18
  7533. 8003096: 9303 str r3, [sp, #12]
  7534. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7535. 8003098: 2303 movs r3, #3
  7536. 800309a: 9305 str r3, [sp, #20]
  7537. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  7538. 800309c: f7fd fae2 bl 8000664 <HAL_GPIO_Init>
  7539. /* Peripheral clock enable */
  7540. __HAL_RCC_I2C1_CLK_ENABLE();
  7541. /* I2C1 interrupt Init */
  7542. HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0);
  7543. 80030a0: 2200 movs r2, #0
  7544. __HAL_RCC_I2C1_CLK_ENABLE();
  7545. 80030a2: 69e3 ldr r3, [r4, #28]
  7546. HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0);
  7547. 80030a4: 201f movs r0, #31
  7548. __HAL_RCC_I2C1_CLK_ENABLE();
  7549. 80030a6: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
  7550. 80030aa: 61e3 str r3, [r4, #28]
  7551. 80030ac: 69e3 ldr r3, [r4, #28]
  7552. HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0);
  7553. 80030ae: 4611 mov r1, r2
  7554. __HAL_RCC_I2C1_CLK_ENABLE();
  7555. 80030b0: f403 1300 and.w r3, r3, #2097152 ; 0x200000
  7556. 80030b4: 9301 str r3, [sp, #4]
  7557. 80030b6: 9b01 ldr r3, [sp, #4]
  7558. HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0);
  7559. 80030b8: f7fd fa36 bl 8000528 <HAL_NVIC_SetPriority>
  7560. HAL_NVIC_EnableIRQ(I2C1_EV_IRQn);
  7561. 80030bc: 201f movs r0, #31
  7562. 80030be: f7fd fa67 bl 8000590 <HAL_NVIC_EnableIRQ>
  7563. /* USER CODE BEGIN I2C1_MspInit 1 */
  7564. /* USER CODE END I2C1_MspInit 1 */
  7565. }
  7566. }
  7567. 80030c2: b006 add sp, #24
  7568. 80030c4: bd10 pop {r4, pc}
  7569. 80030c6: bf00 nop
  7570. 80030c8: 40005400 .word 0x40005400
  7571. 80030cc: 40021000 .word 0x40021000
  7572. 80030d0: 40010c00 .word 0x40010c00
  7573. 080030d4 <HAL_TIM_Base_MspInit>:
  7574. * @retval None
  7575. */
  7576. void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
  7577. {
  7578. if(htim_base->Instance==TIM7)
  7579. 80030d4: 6802 ldr r2, [r0, #0]
  7580. 80030d6: 4b08 ldr r3, [pc, #32] ; (80030f8 <HAL_TIM_Base_MspInit+0x24>)
  7581. {
  7582. 80030d8: b082 sub sp, #8
  7583. if(htim_base->Instance==TIM7)
  7584. 80030da: 429a cmp r2, r3
  7585. 80030dc: d10a bne.n 80030f4 <HAL_TIM_Base_MspInit+0x20>
  7586. {
  7587. /* USER CODE BEGIN TIM7_MspInit 0 */
  7588. /* USER CODE END TIM7_MspInit 0 */
  7589. /* Peripheral clock enable */
  7590. __HAL_RCC_TIM7_CLK_ENABLE();
  7591. 80030de: f503 33fe add.w r3, r3, #130048 ; 0x1fc00
  7592. 80030e2: 69da ldr r2, [r3, #28]
  7593. 80030e4: f042 0220 orr.w r2, r2, #32
  7594. 80030e8: 61da str r2, [r3, #28]
  7595. 80030ea: 69db ldr r3, [r3, #28]
  7596. 80030ec: f003 0320 and.w r3, r3, #32
  7597. 80030f0: 9301 str r3, [sp, #4]
  7598. 80030f2: 9b01 ldr r3, [sp, #4]
  7599. /* USER CODE BEGIN TIM7_MspInit 1 */
  7600. /* USER CODE END TIM7_MspInit 1 */
  7601. }
  7602. }
  7603. 80030f4: b002 add sp, #8
  7604. 80030f6: 4770 bx lr
  7605. 80030f8: 40001400 .word 0x40001400
  7606. 080030fc <HAL_UART_MspInit>:
  7607. * @retval None
  7608. */
  7609. void HAL_UART_MspInit(UART_HandleTypeDef* huart)
  7610. {
  7611. GPIO_InitTypeDef GPIO_InitStruct = {0};
  7612. 80030fc: 2210 movs r2, #16
  7613. {
  7614. 80030fe: b510 push {r4, lr}
  7615. 8003100: 4604 mov r4, r0
  7616. 8003102: b088 sub sp, #32
  7617. GPIO_InitTypeDef GPIO_InitStruct = {0};
  7618. 8003104: eb0d 0002 add.w r0, sp, r2
  7619. 8003108: 2100 movs r1, #0
  7620. 800310a: f000 f8ed bl 80032e8 <memset>
  7621. if(huart->Instance==USART1)
  7622. 800310e: 6823 ldr r3, [r4, #0]
  7623. 8003110: 4a27 ldr r2, [pc, #156] ; (80031b0 <HAL_UART_MspInit+0xb4>)
  7624. 8003112: 4293 cmp r3, r2
  7625. 8003114: d129 bne.n 800316a <HAL_UART_MspInit+0x6e>
  7626. {
  7627. /* USER CODE BEGIN USART1_MspInit 0 */
  7628. /* USER CODE END USART1_MspInit 0 */
  7629. /* Peripheral clock enable */
  7630. __HAL_RCC_USART1_CLK_ENABLE();
  7631. 8003116: 4b27 ldr r3, [pc, #156] ; (80031b4 <HAL_UART_MspInit+0xb8>)
  7632. PA10 ------> USART1_RX
  7633. */
  7634. GPIO_InitStruct.Pin = GPIO_PIN_9;
  7635. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  7636. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7637. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7638. 8003118: a904 add r1, sp, #16
  7639. __HAL_RCC_USART1_CLK_ENABLE();
  7640. 800311a: 699a ldr r2, [r3, #24]
  7641. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7642. 800311c: 4826 ldr r0, [pc, #152] ; (80031b8 <HAL_UART_MspInit+0xbc>)
  7643. __HAL_RCC_USART1_CLK_ENABLE();
  7644. 800311e: f442 4280 orr.w r2, r2, #16384 ; 0x4000
  7645. 8003122: 619a str r2, [r3, #24]
  7646. 8003124: 699a ldr r2, [r3, #24]
  7647. 8003126: f402 4280 and.w r2, r2, #16384 ; 0x4000
  7648. 800312a: 9200 str r2, [sp, #0]
  7649. 800312c: 9a00 ldr r2, [sp, #0]
  7650. __HAL_RCC_GPIOA_CLK_ENABLE();
  7651. 800312e: 699a ldr r2, [r3, #24]
  7652. 8003130: f042 0204 orr.w r2, r2, #4
  7653. 8003134: 619a str r2, [r3, #24]
  7654. 8003136: 699b ldr r3, [r3, #24]
  7655. 8003138: f003 0304 and.w r3, r3, #4
  7656. 800313c: 9301 str r3, [sp, #4]
  7657. 800313e: 9b01 ldr r3, [sp, #4]
  7658. GPIO_InitStruct.Pin = GPIO_PIN_9;
  7659. 8003140: f44f 7300 mov.w r3, #512 ; 0x200
  7660. 8003144: 9304 str r3, [sp, #16]
  7661. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  7662. 8003146: 2302 movs r3, #2
  7663. 8003148: 9305 str r3, [sp, #20]
  7664. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7665. 800314a: 2303 movs r3, #3
  7666. 800314c: 9307 str r3, [sp, #28]
  7667. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7668. 800314e: f7fd fa89 bl 8000664 <HAL_GPIO_Init>
  7669. GPIO_InitStruct.Pin = GPIO_PIN_10;
  7670. 8003152: f44f 6380 mov.w r3, #1024 ; 0x400
  7671. GPIO_InitStruct.Pin = GPIO_PIN_2;
  7672. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  7673. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7674. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7675. GPIO_InitStruct.Pin = GPIO_PIN_3;
  7676. 8003156: 9304 str r3, [sp, #16]
  7677. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  7678. 8003158: 2300 movs r3, #0
  7679. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7680. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7681. 800315a: a904 add r1, sp, #16
  7682. 800315c: 4816 ldr r0, [pc, #88] ; (80031b8 <HAL_UART_MspInit+0xbc>)
  7683. GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
  7684. 800315e: 9305 str r3, [sp, #20]
  7685. GPIO_InitStruct.Pull = GPIO_NOPULL;
  7686. 8003160: 9306 str r3, [sp, #24]
  7687. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7688. 8003162: f7fd fa7f bl 8000664 <HAL_GPIO_Init>
  7689. /* USER CODE BEGIN USART2_MspInit 1 */
  7690. /* USER CODE END USART2_MspInit 1 */
  7691. }
  7692. }
  7693. 8003166: b008 add sp, #32
  7694. 8003168: bd10 pop {r4, pc}
  7695. else if(huart->Instance==USART2)
  7696. 800316a: 4a14 ldr r2, [pc, #80] ; (80031bc <HAL_UART_MspInit+0xc0>)
  7697. 800316c: 4293 cmp r3, r2
  7698. 800316e: d1fa bne.n 8003166 <HAL_UART_MspInit+0x6a>
  7699. __HAL_RCC_USART2_CLK_ENABLE();
  7700. 8003170: 4b10 ldr r3, [pc, #64] ; (80031b4 <HAL_UART_MspInit+0xb8>)
  7701. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7702. 8003172: a904 add r1, sp, #16
  7703. __HAL_RCC_USART2_CLK_ENABLE();
  7704. 8003174: 69da ldr r2, [r3, #28]
  7705. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7706. 8003176: 4810 ldr r0, [pc, #64] ; (80031b8 <HAL_UART_MspInit+0xbc>)
  7707. __HAL_RCC_USART2_CLK_ENABLE();
  7708. 8003178: f442 3200 orr.w r2, r2, #131072 ; 0x20000
  7709. 800317c: 61da str r2, [r3, #28]
  7710. 800317e: 69da ldr r2, [r3, #28]
  7711. 8003180: f402 3200 and.w r2, r2, #131072 ; 0x20000
  7712. 8003184: 9202 str r2, [sp, #8]
  7713. 8003186: 9a02 ldr r2, [sp, #8]
  7714. __HAL_RCC_GPIOA_CLK_ENABLE();
  7715. 8003188: 699a ldr r2, [r3, #24]
  7716. 800318a: f042 0204 orr.w r2, r2, #4
  7717. 800318e: 619a str r2, [r3, #24]
  7718. 8003190: 699b ldr r3, [r3, #24]
  7719. 8003192: f003 0304 and.w r3, r3, #4
  7720. 8003196: 9303 str r3, [sp, #12]
  7721. 8003198: 9b03 ldr r3, [sp, #12]
  7722. GPIO_InitStruct.Pin = GPIO_PIN_2;
  7723. 800319a: 2304 movs r3, #4
  7724. 800319c: 9304 str r3, [sp, #16]
  7725. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  7726. 800319e: 2302 movs r3, #2
  7727. 80031a0: 9305 str r3, [sp, #20]
  7728. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  7729. 80031a2: 2303 movs r3, #3
  7730. 80031a4: 9307 str r3, [sp, #28]
  7731. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  7732. 80031a6: f7fd fa5d bl 8000664 <HAL_GPIO_Init>
  7733. GPIO_InitStruct.Pin = GPIO_PIN_3;
  7734. 80031aa: 2308 movs r3, #8
  7735. 80031ac: e7d3 b.n 8003156 <HAL_UART_MspInit+0x5a>
  7736. 80031ae: bf00 nop
  7737. 80031b0: 40013800 .word 0x40013800
  7738. 80031b4: 40021000 .word 0x40021000
  7739. 80031b8: 40010800 .word 0x40010800
  7740. 80031bc: 40004400 .word 0x40004400
  7741. 080031c0 <NMI_Handler>:
  7742. 80031c0: 4770 bx lr
  7743. 080031c2 <HardFault_Handler>:
  7744. /**
  7745. * @brief This function handles Hard fault interrupt.
  7746. */
  7747. void HardFault_Handler(void)
  7748. {
  7749. 80031c2: e7fe b.n 80031c2 <HardFault_Handler>
  7750. 080031c4 <MemManage_Handler>:
  7751. /**
  7752. * @brief This function handles Memory management fault.
  7753. */
  7754. void MemManage_Handler(void)
  7755. {
  7756. 80031c4: e7fe b.n 80031c4 <MemManage_Handler>
  7757. 080031c6 <BusFault_Handler>:
  7758. /**
  7759. * @brief This function handles Prefetch fault, memory access fault.
  7760. */
  7761. void BusFault_Handler(void)
  7762. {
  7763. 80031c6: e7fe b.n 80031c6 <BusFault_Handler>
  7764. 080031c8 <UsageFault_Handler>:
  7765. /**
  7766. * @brief This function handles Undefined instruction or illegal state.
  7767. */
  7768. void UsageFault_Handler(void)
  7769. {
  7770. 80031c8: e7fe b.n 80031c8 <UsageFault_Handler>
  7771. 080031ca <SVC_Handler>:
  7772. 80031ca: 4770 bx lr
  7773. 080031cc <DebugMon_Handler>:
  7774. 80031cc: 4770 bx lr
  7775. 080031ce <PendSV_Handler>:
  7776. /**
  7777. * @brief This function handles Pendable request for system service.
  7778. */
  7779. void PendSV_Handler(void)
  7780. {
  7781. 80031ce: 4770 bx lr
  7782. 080031d0 <SysTick_Handler>:
  7783. void SysTick_Handler(void)
  7784. {
  7785. /* USER CODE BEGIN SysTick_IRQn 0 */
  7786. /* USER CODE END SysTick_IRQn 0 */
  7787. HAL_IncTick();
  7788. 80031d0: f7fd b84e b.w 8000270 <HAL_IncTick>
  7789. 080031d4 <I2C1_EV_IRQHandler>:
  7790. void I2C1_EV_IRQHandler(void)
  7791. {
  7792. /* USER CODE BEGIN I2C1_EV_IRQn 0 */
  7793. /* USER CODE END I2C1_EV_IRQn 0 */
  7794. HAL_I2C_EV_IRQHandler(&hi2c1);
  7795. 80031d4: 4801 ldr r0, [pc, #4] ; (80031dc <I2C1_EV_IRQHandler+0x8>)
  7796. 80031d6: f7fd bfcb b.w 8001170 <HAL_I2C_EV_IRQHandler>
  7797. 80031da: bf00 nop
  7798. 80031dc: 20000150 .word 0x20000150
  7799. 080031e0 <USART1_IRQHandler>:
  7800. void USART1_IRQHandler(void)
  7801. {
  7802. /* USER CODE BEGIN USART1_IRQn 0 */
  7803. /* USER CODE END USART1_IRQn 0 */
  7804. HAL_UART_IRQHandler(&huart1);
  7805. 80031e0: 4801 ldr r0, [pc, #4] ; (80031e8 <USART1_IRQHandler+0x8>)
  7806. 80031e2: f7ff b9c3 b.w 800256c <HAL_UART_IRQHandler>
  7807. 80031e6: bf00 nop
  7808. 80031e8: 200001d8 .word 0x200001d8
  7809. 080031ec <USART2_IRQHandler>:
  7810. void USART2_IRQHandler(void)
  7811. {
  7812. /* USER CODE BEGIN USART2_IRQn 0 */
  7813. /* USER CODE END USART2_IRQn 0 */
  7814. HAL_UART_IRQHandler(&huart2);
  7815. 80031ec: 4801 ldr r0, [pc, #4] ; (80031f4 <USART2_IRQHandler+0x8>)
  7816. 80031ee: f7ff b9bd b.w 800256c <HAL_UART_IRQHandler>
  7817. 80031f2: bf00 nop
  7818. 80031f4: 2000024c .word 0x2000024c
  7819. 080031f8 <TIM7_IRQHandler>:
  7820. void TIM7_IRQHandler(void)
  7821. {
  7822. /* USER CODE BEGIN TIM7_IRQn 0 */
  7823. /* USER CODE END TIM7_IRQn 0 */
  7824. HAL_TIM_IRQHandler(&htim7);
  7825. 80031f8: 4801 ldr r0, [pc, #4] ; (8003200 <TIM7_IRQHandler+0x8>)
  7826. 80031fa: f7fe be3a b.w 8001e72 <HAL_TIM_IRQHandler>
  7827. 80031fe: bf00 nop
  7828. 8003200: 2000028c .word 0x2000028c
  7829. 08003204 <SystemInit>:
  7830. */
  7831. void SystemInit (void)
  7832. {
  7833. /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
  7834. /* Set HSION bit */
  7835. RCC->CR |= 0x00000001U;
  7836. 8003204: 4b10 ldr r3, [pc, #64] ; (8003248 <SystemInit+0x44>)
  7837. 8003206: 681a ldr r2, [r3, #0]
  7838. 8003208: f042 0201 orr.w r2, r2, #1
  7839. 800320c: 601a str r2, [r3, #0]
  7840. /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
  7841. #if !defined(STM32F105xC) && !defined(STM32F107xC)
  7842. RCC->CFGR &= 0xF8FF0000U;
  7843. 800320e: 6859 ldr r1, [r3, #4]
  7844. 8003210: 4a0e ldr r2, [pc, #56] ; (800324c <SystemInit+0x48>)
  7845. 8003212: 400a ands r2, r1
  7846. 8003214: 605a str r2, [r3, #4]
  7847. #else
  7848. RCC->CFGR &= 0xF0FF0000U;
  7849. #endif /* STM32F105xC */
  7850. /* Reset HSEON, CSSON and PLLON bits */
  7851. RCC->CR &= 0xFEF6FFFFU;
  7852. 8003216: 681a ldr r2, [r3, #0]
  7853. 8003218: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000
  7854. 800321c: f422 3280 bic.w r2, r2, #65536 ; 0x10000
  7855. 8003220: 601a str r2, [r3, #0]
  7856. /* Reset HSEBYP bit */
  7857. RCC->CR &= 0xFFFBFFFFU;
  7858. 8003222: 681a ldr r2, [r3, #0]
  7859. 8003224: f422 2280 bic.w r2, r2, #262144 ; 0x40000
  7860. 8003228: 601a str r2, [r3, #0]
  7861. /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
  7862. RCC->CFGR &= 0xFF80FFFFU;
  7863. 800322a: 685a ldr r2, [r3, #4]
  7864. 800322c: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000
  7865. 8003230: 605a str r2, [r3, #4]
  7866. /* Reset CFGR2 register */
  7867. RCC->CFGR2 = 0x00000000U;
  7868. #elif defined(STM32F100xB) || defined(STM32F100xE)
  7869. /* Disable all interrupts and clear pending bits */
  7870. RCC->CIR = 0x009F0000U;
  7871. 8003232: f44f 021f mov.w r2, #10420224 ; 0x9f0000
  7872. 8003236: 609a str r2, [r3, #8]
  7873. /* Reset CFGR2 register */
  7874. RCC->CFGR2 = 0x00000000U;
  7875. 8003238: 2200 movs r2, #0
  7876. 800323a: 62da str r2, [r3, #44] ; 0x2c
  7877. #endif
  7878. #ifdef VECT_TAB_SRAM
  7879. SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
  7880. #else
  7881. SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
  7882. 800323c: f04f 6200 mov.w r2, #134217728 ; 0x8000000
  7883. 8003240: 4b03 ldr r3, [pc, #12] ; (8003250 <SystemInit+0x4c>)
  7884. 8003242: 609a str r2, [r3, #8]
  7885. 8003244: 4770 bx lr
  7886. 8003246: bf00 nop
  7887. 8003248: 40021000 .word 0x40021000
  7888. 800324c: f8ff0000 .word 0xf8ff0000
  7889. 8003250: e000ed00 .word 0xe000ed00
  7890. 08003254 <Reset_Handler>:
  7891. .weak Reset_Handler
  7892. .type Reset_Handler, %function
  7893. Reset_Handler:
  7894. /* Copy the data segment initializers from flash to SRAM */
  7895. movs r1, #0
  7896. 8003254: 2100 movs r1, #0
  7897. b LoopCopyDataInit
  7898. 8003256: e003 b.n 8003260 <LoopCopyDataInit>
  7899. 08003258 <CopyDataInit>:
  7900. CopyDataInit:
  7901. ldr r3, =_sidata
  7902. 8003258: 4b0b ldr r3, [pc, #44] ; (8003288 <LoopFillZerobss+0x14>)
  7903. ldr r3, [r3, r1]
  7904. 800325a: 585b ldr r3, [r3, r1]
  7905. str r3, [r0, r1]
  7906. 800325c: 5043 str r3, [r0, r1]
  7907. adds r1, r1, #4
  7908. 800325e: 3104 adds r1, #4
  7909. 08003260 <LoopCopyDataInit>:
  7910. LoopCopyDataInit:
  7911. ldr r0, =_sdata
  7912. 8003260: 480a ldr r0, [pc, #40] ; (800328c <LoopFillZerobss+0x18>)
  7913. ldr r3, =_edata
  7914. 8003262: 4b0b ldr r3, [pc, #44] ; (8003290 <LoopFillZerobss+0x1c>)
  7915. adds r2, r0, r1
  7916. 8003264: 1842 adds r2, r0, r1
  7917. cmp r2, r3
  7918. 8003266: 429a cmp r2, r3
  7919. bcc CopyDataInit
  7920. 8003268: d3f6 bcc.n 8003258 <CopyDataInit>
  7921. ldr r2, =_sbss
  7922. 800326a: 4a0a ldr r2, [pc, #40] ; (8003294 <LoopFillZerobss+0x20>)
  7923. b LoopFillZerobss
  7924. 800326c: e002 b.n 8003274 <LoopFillZerobss>
  7925. 0800326e <FillZerobss>:
  7926. /* Zero fill the bss segment. */
  7927. FillZerobss:
  7928. movs r3, #0
  7929. 800326e: 2300 movs r3, #0
  7930. str r3, [r2], #4
  7931. 8003270: f842 3b04 str.w r3, [r2], #4
  7932. 08003274 <LoopFillZerobss>:
  7933. LoopFillZerobss:
  7934. ldr r3, = _ebss
  7935. 8003274: 4b08 ldr r3, [pc, #32] ; (8003298 <LoopFillZerobss+0x24>)
  7936. cmp r2, r3
  7937. 8003276: 429a cmp r2, r3
  7938. bcc FillZerobss
  7939. 8003278: d3f9 bcc.n 800326e <FillZerobss>
  7940. /* Call the clock system intitialization function.*/
  7941. bl SystemInit
  7942. 800327a: f7ff ffc3 bl 8003204 <SystemInit>
  7943. /* Call static constructors */
  7944. bl __libc_init_array
  7945. 800327e: f000 f80f bl 80032a0 <__libc_init_array>
  7946. /* Call the application's entry point.*/
  7947. bl main
  7948. 8003282: f7ff fd0d bl 8002ca0 <main>
  7949. bx lr
  7950. 8003286: 4770 bx lr
  7951. ldr r3, =_sidata
  7952. 8003288: 080045e4 .word 0x080045e4
  7953. ldr r0, =_sdata
  7954. 800328c: 20000000 .word 0x20000000
  7955. ldr r3, =_edata
  7956. 8003290: 20000070 .word 0x20000070
  7957. ldr r2, =_sbss
  7958. 8003294: 20000070 .word 0x20000070
  7959. ldr r3, = _ebss
  7960. 8003298: 200002d0 .word 0x200002d0
  7961. 0800329c <ADC1_IRQHandler>:
  7962. * @retval : None
  7963. */
  7964. .section .text.Default_Handler,"ax",%progbits
  7965. Default_Handler:
  7966. Infinite_Loop:
  7967. b Infinite_Loop
  7968. 800329c: e7fe b.n 800329c <ADC1_IRQHandler>
  7969. ...
  7970. 080032a0 <__libc_init_array>:
  7971. 80032a0: b570 push {r4, r5, r6, lr}
  7972. 80032a2: 2500 movs r5, #0
  7973. 80032a4: 4e0c ldr r6, [pc, #48] ; (80032d8 <__libc_init_array+0x38>)
  7974. 80032a6: 4c0d ldr r4, [pc, #52] ; (80032dc <__libc_init_array+0x3c>)
  7975. 80032a8: 1ba4 subs r4, r4, r6
  7976. 80032aa: 10a4 asrs r4, r4, #2
  7977. 80032ac: 42a5 cmp r5, r4
  7978. 80032ae: d109 bne.n 80032c4 <__libc_init_array+0x24>
  7979. 80032b0: f001 f87e bl 80043b0 <_init>
  7980. 80032b4: 2500 movs r5, #0
  7981. 80032b6: 4e0a ldr r6, [pc, #40] ; (80032e0 <__libc_init_array+0x40>)
  7982. 80032b8: 4c0a ldr r4, [pc, #40] ; (80032e4 <__libc_init_array+0x44>)
  7983. 80032ba: 1ba4 subs r4, r4, r6
  7984. 80032bc: 10a4 asrs r4, r4, #2
  7985. 80032be: 42a5 cmp r5, r4
  7986. 80032c0: d105 bne.n 80032ce <__libc_init_array+0x2e>
  7987. 80032c2: bd70 pop {r4, r5, r6, pc}
  7988. 80032c4: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  7989. 80032c8: 4798 blx r3
  7990. 80032ca: 3501 adds r5, #1
  7991. 80032cc: e7ee b.n 80032ac <__libc_init_array+0xc>
  7992. 80032ce: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  7993. 80032d2: 4798 blx r3
  7994. 80032d4: 3501 adds r5, #1
  7995. 80032d6: e7f2 b.n 80032be <__libc_init_array+0x1e>
  7996. 80032d8: 080045dc .word 0x080045dc
  7997. 80032dc: 080045dc .word 0x080045dc
  7998. 80032e0: 080045dc .word 0x080045dc
  7999. 80032e4: 080045e0 .word 0x080045e0
  8000. 080032e8 <memset>:
  8001. 80032e8: 4603 mov r3, r0
  8002. 80032ea: 4402 add r2, r0
  8003. 80032ec: 4293 cmp r3, r2
  8004. 80032ee: d100 bne.n 80032f2 <memset+0xa>
  8005. 80032f0: 4770 bx lr
  8006. 80032f2: f803 1b01 strb.w r1, [r3], #1
  8007. 80032f6: e7f9 b.n 80032ec <memset+0x4>
  8008. 080032f8 <iprintf>:
  8009. 80032f8: b40f push {r0, r1, r2, r3}
  8010. 80032fa: 4b0a ldr r3, [pc, #40] ; (8003324 <iprintf+0x2c>)
  8011. 80032fc: b513 push {r0, r1, r4, lr}
  8012. 80032fe: 681c ldr r4, [r3, #0]
  8013. 8003300: b124 cbz r4, 800330c <iprintf+0x14>
  8014. 8003302: 69a3 ldr r3, [r4, #24]
  8015. 8003304: b913 cbnz r3, 800330c <iprintf+0x14>
  8016. 8003306: 4620 mov r0, r4
  8017. 8003308: f000 fada bl 80038c0 <__sinit>
  8018. 800330c: ab05 add r3, sp, #20
  8019. 800330e: 9a04 ldr r2, [sp, #16]
  8020. 8003310: 68a1 ldr r1, [r4, #8]
  8021. 8003312: 4620 mov r0, r4
  8022. 8003314: 9301 str r3, [sp, #4]
  8023. 8003316: f000 fc9b bl 8003c50 <_vfiprintf_r>
  8024. 800331a: b002 add sp, #8
  8025. 800331c: e8bd 4010 ldmia.w sp!, {r4, lr}
  8026. 8003320: b004 add sp, #16
  8027. 8003322: 4770 bx lr
  8028. 8003324: 2000000c .word 0x2000000c
  8029. 08003328 <_puts_r>:
  8030. 8003328: b570 push {r4, r5, r6, lr}
  8031. 800332a: 460e mov r6, r1
  8032. 800332c: 4605 mov r5, r0
  8033. 800332e: b118 cbz r0, 8003338 <_puts_r+0x10>
  8034. 8003330: 6983 ldr r3, [r0, #24]
  8035. 8003332: b90b cbnz r3, 8003338 <_puts_r+0x10>
  8036. 8003334: f000 fac4 bl 80038c0 <__sinit>
  8037. 8003338: 69ab ldr r3, [r5, #24]
  8038. 800333a: 68ac ldr r4, [r5, #8]
  8039. 800333c: b913 cbnz r3, 8003344 <_puts_r+0x1c>
  8040. 800333e: 4628 mov r0, r5
  8041. 8003340: f000 fabe bl 80038c0 <__sinit>
  8042. 8003344: 4b23 ldr r3, [pc, #140] ; (80033d4 <_puts_r+0xac>)
  8043. 8003346: 429c cmp r4, r3
  8044. 8003348: d117 bne.n 800337a <_puts_r+0x52>
  8045. 800334a: 686c ldr r4, [r5, #4]
  8046. 800334c: 89a3 ldrh r3, [r4, #12]
  8047. 800334e: 071b lsls r3, r3, #28
  8048. 8003350: d51d bpl.n 800338e <_puts_r+0x66>
  8049. 8003352: 6923 ldr r3, [r4, #16]
  8050. 8003354: b1db cbz r3, 800338e <_puts_r+0x66>
  8051. 8003356: 3e01 subs r6, #1
  8052. 8003358: 68a3 ldr r3, [r4, #8]
  8053. 800335a: f816 1f01 ldrb.w r1, [r6, #1]!
  8054. 800335e: 3b01 subs r3, #1
  8055. 8003360: 60a3 str r3, [r4, #8]
  8056. 8003362: b9e9 cbnz r1, 80033a0 <_puts_r+0x78>
  8057. 8003364: 2b00 cmp r3, #0
  8058. 8003366: da2e bge.n 80033c6 <_puts_r+0x9e>
  8059. 8003368: 4622 mov r2, r4
  8060. 800336a: 210a movs r1, #10
  8061. 800336c: 4628 mov r0, r5
  8062. 800336e: f000 f8f5 bl 800355c <__swbuf_r>
  8063. 8003372: 3001 adds r0, #1
  8064. 8003374: d011 beq.n 800339a <_puts_r+0x72>
  8065. 8003376: 200a movs r0, #10
  8066. 8003378: bd70 pop {r4, r5, r6, pc}
  8067. 800337a: 4b17 ldr r3, [pc, #92] ; (80033d8 <_puts_r+0xb0>)
  8068. 800337c: 429c cmp r4, r3
  8069. 800337e: d101 bne.n 8003384 <_puts_r+0x5c>
  8070. 8003380: 68ac ldr r4, [r5, #8]
  8071. 8003382: e7e3 b.n 800334c <_puts_r+0x24>
  8072. 8003384: 4b15 ldr r3, [pc, #84] ; (80033dc <_puts_r+0xb4>)
  8073. 8003386: 429c cmp r4, r3
  8074. 8003388: bf08 it eq
  8075. 800338a: 68ec ldreq r4, [r5, #12]
  8076. 800338c: e7de b.n 800334c <_puts_r+0x24>
  8077. 800338e: 4621 mov r1, r4
  8078. 8003390: 4628 mov r0, r5
  8079. 8003392: f000 f935 bl 8003600 <__swsetup_r>
  8080. 8003396: 2800 cmp r0, #0
  8081. 8003398: d0dd beq.n 8003356 <_puts_r+0x2e>
  8082. 800339a: f04f 30ff mov.w r0, #4294967295
  8083. 800339e: bd70 pop {r4, r5, r6, pc}
  8084. 80033a0: 2b00 cmp r3, #0
  8085. 80033a2: da04 bge.n 80033ae <_puts_r+0x86>
  8086. 80033a4: 69a2 ldr r2, [r4, #24]
  8087. 80033a6: 4293 cmp r3, r2
  8088. 80033a8: db06 blt.n 80033b8 <_puts_r+0x90>
  8089. 80033aa: 290a cmp r1, #10
  8090. 80033ac: d004 beq.n 80033b8 <_puts_r+0x90>
  8091. 80033ae: 6823 ldr r3, [r4, #0]
  8092. 80033b0: 1c5a adds r2, r3, #1
  8093. 80033b2: 6022 str r2, [r4, #0]
  8094. 80033b4: 7019 strb r1, [r3, #0]
  8095. 80033b6: e7cf b.n 8003358 <_puts_r+0x30>
  8096. 80033b8: 4622 mov r2, r4
  8097. 80033ba: 4628 mov r0, r5
  8098. 80033bc: f000 f8ce bl 800355c <__swbuf_r>
  8099. 80033c0: 3001 adds r0, #1
  8100. 80033c2: d1c9 bne.n 8003358 <_puts_r+0x30>
  8101. 80033c4: e7e9 b.n 800339a <_puts_r+0x72>
  8102. 80033c6: 200a movs r0, #10
  8103. 80033c8: 6823 ldr r3, [r4, #0]
  8104. 80033ca: 1c5a adds r2, r3, #1
  8105. 80033cc: 6022 str r2, [r4, #0]
  8106. 80033ce: 7018 strb r0, [r3, #0]
  8107. 80033d0: bd70 pop {r4, r5, r6, pc}
  8108. 80033d2: bf00 nop
  8109. 80033d4: 08004568 .word 0x08004568
  8110. 80033d8: 08004588 .word 0x08004588
  8111. 80033dc: 08004548 .word 0x08004548
  8112. 080033e0 <puts>:
  8113. 80033e0: 4b02 ldr r3, [pc, #8] ; (80033ec <puts+0xc>)
  8114. 80033e2: 4601 mov r1, r0
  8115. 80033e4: 6818 ldr r0, [r3, #0]
  8116. 80033e6: f7ff bf9f b.w 8003328 <_puts_r>
  8117. 80033ea: bf00 nop
  8118. 80033ec: 2000000c .word 0x2000000c
  8119. 080033f0 <setbuf>:
  8120. 80033f0: 2900 cmp r1, #0
  8121. 80033f2: f44f 6380 mov.w r3, #1024 ; 0x400
  8122. 80033f6: bf0c ite eq
  8123. 80033f8: 2202 moveq r2, #2
  8124. 80033fa: 2200 movne r2, #0
  8125. 80033fc: f000 b800 b.w 8003400 <setvbuf>
  8126. 08003400 <setvbuf>:
  8127. 8003400: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
  8128. 8003404: 461d mov r5, r3
  8129. 8003406: 4b51 ldr r3, [pc, #324] ; (800354c <setvbuf+0x14c>)
  8130. 8003408: 4604 mov r4, r0
  8131. 800340a: 681e ldr r6, [r3, #0]
  8132. 800340c: 460f mov r7, r1
  8133. 800340e: 4690 mov r8, r2
  8134. 8003410: b126 cbz r6, 800341c <setvbuf+0x1c>
  8135. 8003412: 69b3 ldr r3, [r6, #24]
  8136. 8003414: b913 cbnz r3, 800341c <setvbuf+0x1c>
  8137. 8003416: 4630 mov r0, r6
  8138. 8003418: f000 fa52 bl 80038c0 <__sinit>
  8139. 800341c: 4b4c ldr r3, [pc, #304] ; (8003550 <setvbuf+0x150>)
  8140. 800341e: 429c cmp r4, r3
  8141. 8003420: d152 bne.n 80034c8 <setvbuf+0xc8>
  8142. 8003422: 6874 ldr r4, [r6, #4]
  8143. 8003424: f1b8 0f02 cmp.w r8, #2
  8144. 8003428: d006 beq.n 8003438 <setvbuf+0x38>
  8145. 800342a: f1b8 0f01 cmp.w r8, #1
  8146. 800342e: f200 8089 bhi.w 8003544 <setvbuf+0x144>
  8147. 8003432: 2d00 cmp r5, #0
  8148. 8003434: f2c0 8086 blt.w 8003544 <setvbuf+0x144>
  8149. 8003438: 4621 mov r1, r4
  8150. 800343a: 4630 mov r0, r6
  8151. 800343c: f000 f9d6 bl 80037ec <_fflush_r>
  8152. 8003440: 6b61 ldr r1, [r4, #52] ; 0x34
  8153. 8003442: b141 cbz r1, 8003456 <setvbuf+0x56>
  8154. 8003444: f104 0344 add.w r3, r4, #68 ; 0x44
  8155. 8003448: 4299 cmp r1, r3
  8156. 800344a: d002 beq.n 8003452 <setvbuf+0x52>
  8157. 800344c: 4630 mov r0, r6
  8158. 800344e: f000 fb2d bl 8003aac <_free_r>
  8159. 8003452: 2300 movs r3, #0
  8160. 8003454: 6363 str r3, [r4, #52] ; 0x34
  8161. 8003456: 2300 movs r3, #0
  8162. 8003458: 61a3 str r3, [r4, #24]
  8163. 800345a: 6063 str r3, [r4, #4]
  8164. 800345c: 89a3 ldrh r3, [r4, #12]
  8165. 800345e: 061b lsls r3, r3, #24
  8166. 8003460: d503 bpl.n 800346a <setvbuf+0x6a>
  8167. 8003462: 6921 ldr r1, [r4, #16]
  8168. 8003464: 4630 mov r0, r6
  8169. 8003466: f000 fb21 bl 8003aac <_free_r>
  8170. 800346a: 89a3 ldrh r3, [r4, #12]
  8171. 800346c: f1b8 0f02 cmp.w r8, #2
  8172. 8003470: f423 634a bic.w r3, r3, #3232 ; 0xca0
  8173. 8003474: f023 0303 bic.w r3, r3, #3
  8174. 8003478: 81a3 strh r3, [r4, #12]
  8175. 800347a: d05d beq.n 8003538 <setvbuf+0x138>
  8176. 800347c: ab01 add r3, sp, #4
  8177. 800347e: 466a mov r2, sp
  8178. 8003480: 4621 mov r1, r4
  8179. 8003482: 4630 mov r0, r6
  8180. 8003484: f000 faa6 bl 80039d4 <__swhatbuf_r>
  8181. 8003488: 89a3 ldrh r3, [r4, #12]
  8182. 800348a: 4318 orrs r0, r3
  8183. 800348c: 81a0 strh r0, [r4, #12]
  8184. 800348e: bb2d cbnz r5, 80034dc <setvbuf+0xdc>
  8185. 8003490: 9d00 ldr r5, [sp, #0]
  8186. 8003492: 4628 mov r0, r5
  8187. 8003494: f000 fb02 bl 8003a9c <malloc>
  8188. 8003498: 4607 mov r7, r0
  8189. 800349a: 2800 cmp r0, #0
  8190. 800349c: d14e bne.n 800353c <setvbuf+0x13c>
  8191. 800349e: f8dd 9000 ldr.w r9, [sp]
  8192. 80034a2: 45a9 cmp r9, r5
  8193. 80034a4: d13c bne.n 8003520 <setvbuf+0x120>
  8194. 80034a6: f04f 30ff mov.w r0, #4294967295
  8195. 80034aa: 89a3 ldrh r3, [r4, #12]
  8196. 80034ac: f043 0302 orr.w r3, r3, #2
  8197. 80034b0: 81a3 strh r3, [r4, #12]
  8198. 80034b2: 2300 movs r3, #0
  8199. 80034b4: 60a3 str r3, [r4, #8]
  8200. 80034b6: f104 0347 add.w r3, r4, #71 ; 0x47
  8201. 80034ba: 6023 str r3, [r4, #0]
  8202. 80034bc: 6123 str r3, [r4, #16]
  8203. 80034be: 2301 movs r3, #1
  8204. 80034c0: 6163 str r3, [r4, #20]
  8205. 80034c2: b003 add sp, #12
  8206. 80034c4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
  8207. 80034c8: 4b22 ldr r3, [pc, #136] ; (8003554 <setvbuf+0x154>)
  8208. 80034ca: 429c cmp r4, r3
  8209. 80034cc: d101 bne.n 80034d2 <setvbuf+0xd2>
  8210. 80034ce: 68b4 ldr r4, [r6, #8]
  8211. 80034d0: e7a8 b.n 8003424 <setvbuf+0x24>
  8212. 80034d2: 4b21 ldr r3, [pc, #132] ; (8003558 <setvbuf+0x158>)
  8213. 80034d4: 429c cmp r4, r3
  8214. 80034d6: bf08 it eq
  8215. 80034d8: 68f4 ldreq r4, [r6, #12]
  8216. 80034da: e7a3 b.n 8003424 <setvbuf+0x24>
  8217. 80034dc: 2f00 cmp r7, #0
  8218. 80034de: d0d8 beq.n 8003492 <setvbuf+0x92>
  8219. 80034e0: 69b3 ldr r3, [r6, #24]
  8220. 80034e2: b913 cbnz r3, 80034ea <setvbuf+0xea>
  8221. 80034e4: 4630 mov r0, r6
  8222. 80034e6: f000 f9eb bl 80038c0 <__sinit>
  8223. 80034ea: f1b8 0f01 cmp.w r8, #1
  8224. 80034ee: bf08 it eq
  8225. 80034f0: 89a3 ldrheq r3, [r4, #12]
  8226. 80034f2: 6027 str r7, [r4, #0]
  8227. 80034f4: bf04 itt eq
  8228. 80034f6: f043 0301 orreq.w r3, r3, #1
  8229. 80034fa: 81a3 strheq r3, [r4, #12]
  8230. 80034fc: 89a3 ldrh r3, [r4, #12]
  8231. 80034fe: 6127 str r7, [r4, #16]
  8232. 8003500: f013 0008 ands.w r0, r3, #8
  8233. 8003504: 6165 str r5, [r4, #20]
  8234. 8003506: d01b beq.n 8003540 <setvbuf+0x140>
  8235. 8003508: f013 0001 ands.w r0, r3, #1
  8236. 800350c: f04f 0300 mov.w r3, #0
  8237. 8003510: bf1f itttt ne
  8238. 8003512: 426d negne r5, r5
  8239. 8003514: 60a3 strne r3, [r4, #8]
  8240. 8003516: 61a5 strne r5, [r4, #24]
  8241. 8003518: 4618 movne r0, r3
  8242. 800351a: bf08 it eq
  8243. 800351c: 60a5 streq r5, [r4, #8]
  8244. 800351e: e7d0 b.n 80034c2 <setvbuf+0xc2>
  8245. 8003520: 4648 mov r0, r9
  8246. 8003522: f000 fabb bl 8003a9c <malloc>
  8247. 8003526: 4607 mov r7, r0
  8248. 8003528: 2800 cmp r0, #0
  8249. 800352a: d0bc beq.n 80034a6 <setvbuf+0xa6>
  8250. 800352c: 89a3 ldrh r3, [r4, #12]
  8251. 800352e: 464d mov r5, r9
  8252. 8003530: f043 0380 orr.w r3, r3, #128 ; 0x80
  8253. 8003534: 81a3 strh r3, [r4, #12]
  8254. 8003536: e7d3 b.n 80034e0 <setvbuf+0xe0>
  8255. 8003538: 2000 movs r0, #0
  8256. 800353a: e7b6 b.n 80034aa <setvbuf+0xaa>
  8257. 800353c: 46a9 mov r9, r5
  8258. 800353e: e7f5 b.n 800352c <setvbuf+0x12c>
  8259. 8003540: 60a0 str r0, [r4, #8]
  8260. 8003542: e7be b.n 80034c2 <setvbuf+0xc2>
  8261. 8003544: f04f 30ff mov.w r0, #4294967295
  8262. 8003548: e7bb b.n 80034c2 <setvbuf+0xc2>
  8263. 800354a: bf00 nop
  8264. 800354c: 2000000c .word 0x2000000c
  8265. 8003550: 08004568 .word 0x08004568
  8266. 8003554: 08004588 .word 0x08004588
  8267. 8003558: 08004548 .word 0x08004548
  8268. 0800355c <__swbuf_r>:
  8269. 800355c: b5f8 push {r3, r4, r5, r6, r7, lr}
  8270. 800355e: 460e mov r6, r1
  8271. 8003560: 4614 mov r4, r2
  8272. 8003562: 4605 mov r5, r0
  8273. 8003564: b118 cbz r0, 800356e <__swbuf_r+0x12>
  8274. 8003566: 6983 ldr r3, [r0, #24]
  8275. 8003568: b90b cbnz r3, 800356e <__swbuf_r+0x12>
  8276. 800356a: f000 f9a9 bl 80038c0 <__sinit>
  8277. 800356e: 4b21 ldr r3, [pc, #132] ; (80035f4 <__swbuf_r+0x98>)
  8278. 8003570: 429c cmp r4, r3
  8279. 8003572: d12a bne.n 80035ca <__swbuf_r+0x6e>
  8280. 8003574: 686c ldr r4, [r5, #4]
  8281. 8003576: 69a3 ldr r3, [r4, #24]
  8282. 8003578: 60a3 str r3, [r4, #8]
  8283. 800357a: 89a3 ldrh r3, [r4, #12]
  8284. 800357c: 071a lsls r2, r3, #28
  8285. 800357e: d52e bpl.n 80035de <__swbuf_r+0x82>
  8286. 8003580: 6923 ldr r3, [r4, #16]
  8287. 8003582: b363 cbz r3, 80035de <__swbuf_r+0x82>
  8288. 8003584: 6923 ldr r3, [r4, #16]
  8289. 8003586: 6820 ldr r0, [r4, #0]
  8290. 8003588: b2f6 uxtb r6, r6
  8291. 800358a: 1ac0 subs r0, r0, r3
  8292. 800358c: 6963 ldr r3, [r4, #20]
  8293. 800358e: 4637 mov r7, r6
  8294. 8003590: 4298 cmp r0, r3
  8295. 8003592: db04 blt.n 800359e <__swbuf_r+0x42>
  8296. 8003594: 4621 mov r1, r4
  8297. 8003596: 4628 mov r0, r5
  8298. 8003598: f000 f928 bl 80037ec <_fflush_r>
  8299. 800359c: bb28 cbnz r0, 80035ea <__swbuf_r+0x8e>
  8300. 800359e: 68a3 ldr r3, [r4, #8]
  8301. 80035a0: 3001 adds r0, #1
  8302. 80035a2: 3b01 subs r3, #1
  8303. 80035a4: 60a3 str r3, [r4, #8]
  8304. 80035a6: 6823 ldr r3, [r4, #0]
  8305. 80035a8: 1c5a adds r2, r3, #1
  8306. 80035aa: 6022 str r2, [r4, #0]
  8307. 80035ac: 701e strb r6, [r3, #0]
  8308. 80035ae: 6963 ldr r3, [r4, #20]
  8309. 80035b0: 4298 cmp r0, r3
  8310. 80035b2: d004 beq.n 80035be <__swbuf_r+0x62>
  8311. 80035b4: 89a3 ldrh r3, [r4, #12]
  8312. 80035b6: 07db lsls r3, r3, #31
  8313. 80035b8: d519 bpl.n 80035ee <__swbuf_r+0x92>
  8314. 80035ba: 2e0a cmp r6, #10
  8315. 80035bc: d117 bne.n 80035ee <__swbuf_r+0x92>
  8316. 80035be: 4621 mov r1, r4
  8317. 80035c0: 4628 mov r0, r5
  8318. 80035c2: f000 f913 bl 80037ec <_fflush_r>
  8319. 80035c6: b190 cbz r0, 80035ee <__swbuf_r+0x92>
  8320. 80035c8: e00f b.n 80035ea <__swbuf_r+0x8e>
  8321. 80035ca: 4b0b ldr r3, [pc, #44] ; (80035f8 <__swbuf_r+0x9c>)
  8322. 80035cc: 429c cmp r4, r3
  8323. 80035ce: d101 bne.n 80035d4 <__swbuf_r+0x78>
  8324. 80035d0: 68ac ldr r4, [r5, #8]
  8325. 80035d2: e7d0 b.n 8003576 <__swbuf_r+0x1a>
  8326. 80035d4: 4b09 ldr r3, [pc, #36] ; (80035fc <__swbuf_r+0xa0>)
  8327. 80035d6: 429c cmp r4, r3
  8328. 80035d8: bf08 it eq
  8329. 80035da: 68ec ldreq r4, [r5, #12]
  8330. 80035dc: e7cb b.n 8003576 <__swbuf_r+0x1a>
  8331. 80035de: 4621 mov r1, r4
  8332. 80035e0: 4628 mov r0, r5
  8333. 80035e2: f000 f80d bl 8003600 <__swsetup_r>
  8334. 80035e6: 2800 cmp r0, #0
  8335. 80035e8: d0cc beq.n 8003584 <__swbuf_r+0x28>
  8336. 80035ea: f04f 37ff mov.w r7, #4294967295
  8337. 80035ee: 4638 mov r0, r7
  8338. 80035f0: bdf8 pop {r3, r4, r5, r6, r7, pc}
  8339. 80035f2: bf00 nop
  8340. 80035f4: 08004568 .word 0x08004568
  8341. 80035f8: 08004588 .word 0x08004588
  8342. 80035fc: 08004548 .word 0x08004548
  8343. 08003600 <__swsetup_r>:
  8344. 8003600: 4b32 ldr r3, [pc, #200] ; (80036cc <__swsetup_r+0xcc>)
  8345. 8003602: b570 push {r4, r5, r6, lr}
  8346. 8003604: 681d ldr r5, [r3, #0]
  8347. 8003606: 4606 mov r6, r0
  8348. 8003608: 460c mov r4, r1
  8349. 800360a: b125 cbz r5, 8003616 <__swsetup_r+0x16>
  8350. 800360c: 69ab ldr r3, [r5, #24]
  8351. 800360e: b913 cbnz r3, 8003616 <__swsetup_r+0x16>
  8352. 8003610: 4628 mov r0, r5
  8353. 8003612: f000 f955 bl 80038c0 <__sinit>
  8354. 8003616: 4b2e ldr r3, [pc, #184] ; (80036d0 <__swsetup_r+0xd0>)
  8355. 8003618: 429c cmp r4, r3
  8356. 800361a: d10f bne.n 800363c <__swsetup_r+0x3c>
  8357. 800361c: 686c ldr r4, [r5, #4]
  8358. 800361e: f9b4 300c ldrsh.w r3, [r4, #12]
  8359. 8003622: b29a uxth r2, r3
  8360. 8003624: 0715 lsls r5, r2, #28
  8361. 8003626: d42c bmi.n 8003682 <__swsetup_r+0x82>
  8362. 8003628: 06d0 lsls r0, r2, #27
  8363. 800362a: d411 bmi.n 8003650 <__swsetup_r+0x50>
  8364. 800362c: 2209 movs r2, #9
  8365. 800362e: 6032 str r2, [r6, #0]
  8366. 8003630: f043 0340 orr.w r3, r3, #64 ; 0x40
  8367. 8003634: 81a3 strh r3, [r4, #12]
  8368. 8003636: f04f 30ff mov.w r0, #4294967295
  8369. 800363a: bd70 pop {r4, r5, r6, pc}
  8370. 800363c: 4b25 ldr r3, [pc, #148] ; (80036d4 <__swsetup_r+0xd4>)
  8371. 800363e: 429c cmp r4, r3
  8372. 8003640: d101 bne.n 8003646 <__swsetup_r+0x46>
  8373. 8003642: 68ac ldr r4, [r5, #8]
  8374. 8003644: e7eb b.n 800361e <__swsetup_r+0x1e>
  8375. 8003646: 4b24 ldr r3, [pc, #144] ; (80036d8 <__swsetup_r+0xd8>)
  8376. 8003648: 429c cmp r4, r3
  8377. 800364a: bf08 it eq
  8378. 800364c: 68ec ldreq r4, [r5, #12]
  8379. 800364e: e7e6 b.n 800361e <__swsetup_r+0x1e>
  8380. 8003650: 0751 lsls r1, r2, #29
  8381. 8003652: d512 bpl.n 800367a <__swsetup_r+0x7a>
  8382. 8003654: 6b61 ldr r1, [r4, #52] ; 0x34
  8383. 8003656: b141 cbz r1, 800366a <__swsetup_r+0x6a>
  8384. 8003658: f104 0344 add.w r3, r4, #68 ; 0x44
  8385. 800365c: 4299 cmp r1, r3
  8386. 800365e: d002 beq.n 8003666 <__swsetup_r+0x66>
  8387. 8003660: 4630 mov r0, r6
  8388. 8003662: f000 fa23 bl 8003aac <_free_r>
  8389. 8003666: 2300 movs r3, #0
  8390. 8003668: 6363 str r3, [r4, #52] ; 0x34
  8391. 800366a: 89a3 ldrh r3, [r4, #12]
  8392. 800366c: f023 0324 bic.w r3, r3, #36 ; 0x24
  8393. 8003670: 81a3 strh r3, [r4, #12]
  8394. 8003672: 2300 movs r3, #0
  8395. 8003674: 6063 str r3, [r4, #4]
  8396. 8003676: 6923 ldr r3, [r4, #16]
  8397. 8003678: 6023 str r3, [r4, #0]
  8398. 800367a: 89a3 ldrh r3, [r4, #12]
  8399. 800367c: f043 0308 orr.w r3, r3, #8
  8400. 8003680: 81a3 strh r3, [r4, #12]
  8401. 8003682: 6923 ldr r3, [r4, #16]
  8402. 8003684: b94b cbnz r3, 800369a <__swsetup_r+0x9a>
  8403. 8003686: 89a3 ldrh r3, [r4, #12]
  8404. 8003688: f403 7320 and.w r3, r3, #640 ; 0x280
  8405. 800368c: f5b3 7f00 cmp.w r3, #512 ; 0x200
  8406. 8003690: d003 beq.n 800369a <__swsetup_r+0x9a>
  8407. 8003692: 4621 mov r1, r4
  8408. 8003694: 4630 mov r0, r6
  8409. 8003696: f000 f9c1 bl 8003a1c <__smakebuf_r>
  8410. 800369a: 89a2 ldrh r2, [r4, #12]
  8411. 800369c: f012 0301 ands.w r3, r2, #1
  8412. 80036a0: d00c beq.n 80036bc <__swsetup_r+0xbc>
  8413. 80036a2: 2300 movs r3, #0
  8414. 80036a4: 60a3 str r3, [r4, #8]
  8415. 80036a6: 6963 ldr r3, [r4, #20]
  8416. 80036a8: 425b negs r3, r3
  8417. 80036aa: 61a3 str r3, [r4, #24]
  8418. 80036ac: 6923 ldr r3, [r4, #16]
  8419. 80036ae: b953 cbnz r3, 80036c6 <__swsetup_r+0xc6>
  8420. 80036b0: f9b4 300c ldrsh.w r3, [r4, #12]
  8421. 80036b4: f013 0080 ands.w r0, r3, #128 ; 0x80
  8422. 80036b8: d1ba bne.n 8003630 <__swsetup_r+0x30>
  8423. 80036ba: bd70 pop {r4, r5, r6, pc}
  8424. 80036bc: 0792 lsls r2, r2, #30
  8425. 80036be: bf58 it pl
  8426. 80036c0: 6963 ldrpl r3, [r4, #20]
  8427. 80036c2: 60a3 str r3, [r4, #8]
  8428. 80036c4: e7f2 b.n 80036ac <__swsetup_r+0xac>
  8429. 80036c6: 2000 movs r0, #0
  8430. 80036c8: e7f7 b.n 80036ba <__swsetup_r+0xba>
  8431. 80036ca: bf00 nop
  8432. 80036cc: 2000000c .word 0x2000000c
  8433. 80036d0: 08004568 .word 0x08004568
  8434. 80036d4: 08004588 .word 0x08004588
  8435. 80036d8: 08004548 .word 0x08004548
  8436. 080036dc <__sflush_r>:
  8437. 80036dc: 898a ldrh r2, [r1, #12]
  8438. 80036de: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  8439. 80036e2: 4605 mov r5, r0
  8440. 80036e4: 0710 lsls r0, r2, #28
  8441. 80036e6: 460c mov r4, r1
  8442. 80036e8: d45a bmi.n 80037a0 <__sflush_r+0xc4>
  8443. 80036ea: 684b ldr r3, [r1, #4]
  8444. 80036ec: 2b00 cmp r3, #0
  8445. 80036ee: dc05 bgt.n 80036fc <__sflush_r+0x20>
  8446. 80036f0: 6c0b ldr r3, [r1, #64] ; 0x40
  8447. 80036f2: 2b00 cmp r3, #0
  8448. 80036f4: dc02 bgt.n 80036fc <__sflush_r+0x20>
  8449. 80036f6: 2000 movs r0, #0
  8450. 80036f8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8451. 80036fc: 6ae6 ldr r6, [r4, #44] ; 0x2c
  8452. 80036fe: 2e00 cmp r6, #0
  8453. 8003700: d0f9 beq.n 80036f6 <__sflush_r+0x1a>
  8454. 8003702: 2300 movs r3, #0
  8455. 8003704: f412 5280 ands.w r2, r2, #4096 ; 0x1000
  8456. 8003708: 682f ldr r7, [r5, #0]
  8457. 800370a: 602b str r3, [r5, #0]
  8458. 800370c: d033 beq.n 8003776 <__sflush_r+0x9a>
  8459. 800370e: 6d60 ldr r0, [r4, #84] ; 0x54
  8460. 8003710: 89a3 ldrh r3, [r4, #12]
  8461. 8003712: 075a lsls r2, r3, #29
  8462. 8003714: d505 bpl.n 8003722 <__sflush_r+0x46>
  8463. 8003716: 6863 ldr r3, [r4, #4]
  8464. 8003718: 1ac0 subs r0, r0, r3
  8465. 800371a: 6b63 ldr r3, [r4, #52] ; 0x34
  8466. 800371c: b10b cbz r3, 8003722 <__sflush_r+0x46>
  8467. 800371e: 6c23 ldr r3, [r4, #64] ; 0x40
  8468. 8003720: 1ac0 subs r0, r0, r3
  8469. 8003722: 2300 movs r3, #0
  8470. 8003724: 4602 mov r2, r0
  8471. 8003726: 6ae6 ldr r6, [r4, #44] ; 0x2c
  8472. 8003728: 6a21 ldr r1, [r4, #32]
  8473. 800372a: 4628 mov r0, r5
  8474. 800372c: 47b0 blx r6
  8475. 800372e: 1c43 adds r3, r0, #1
  8476. 8003730: 89a3 ldrh r3, [r4, #12]
  8477. 8003732: d106 bne.n 8003742 <__sflush_r+0x66>
  8478. 8003734: 6829 ldr r1, [r5, #0]
  8479. 8003736: 291d cmp r1, #29
  8480. 8003738: d84b bhi.n 80037d2 <__sflush_r+0xf6>
  8481. 800373a: 4a2b ldr r2, [pc, #172] ; (80037e8 <__sflush_r+0x10c>)
  8482. 800373c: 40ca lsrs r2, r1
  8483. 800373e: 07d6 lsls r6, r2, #31
  8484. 8003740: d547 bpl.n 80037d2 <__sflush_r+0xf6>
  8485. 8003742: 2200 movs r2, #0
  8486. 8003744: 6062 str r2, [r4, #4]
  8487. 8003746: 6922 ldr r2, [r4, #16]
  8488. 8003748: 04d9 lsls r1, r3, #19
  8489. 800374a: 6022 str r2, [r4, #0]
  8490. 800374c: d504 bpl.n 8003758 <__sflush_r+0x7c>
  8491. 800374e: 1c42 adds r2, r0, #1
  8492. 8003750: d101 bne.n 8003756 <__sflush_r+0x7a>
  8493. 8003752: 682b ldr r3, [r5, #0]
  8494. 8003754: b903 cbnz r3, 8003758 <__sflush_r+0x7c>
  8495. 8003756: 6560 str r0, [r4, #84] ; 0x54
  8496. 8003758: 6b61 ldr r1, [r4, #52] ; 0x34
  8497. 800375a: 602f str r7, [r5, #0]
  8498. 800375c: 2900 cmp r1, #0
  8499. 800375e: d0ca beq.n 80036f6 <__sflush_r+0x1a>
  8500. 8003760: f104 0344 add.w r3, r4, #68 ; 0x44
  8501. 8003764: 4299 cmp r1, r3
  8502. 8003766: d002 beq.n 800376e <__sflush_r+0x92>
  8503. 8003768: 4628 mov r0, r5
  8504. 800376a: f000 f99f bl 8003aac <_free_r>
  8505. 800376e: 2000 movs r0, #0
  8506. 8003770: 6360 str r0, [r4, #52] ; 0x34
  8507. 8003772: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8508. 8003776: 6a21 ldr r1, [r4, #32]
  8509. 8003778: 2301 movs r3, #1
  8510. 800377a: 4628 mov r0, r5
  8511. 800377c: 47b0 blx r6
  8512. 800377e: 1c41 adds r1, r0, #1
  8513. 8003780: d1c6 bne.n 8003710 <__sflush_r+0x34>
  8514. 8003782: 682b ldr r3, [r5, #0]
  8515. 8003784: 2b00 cmp r3, #0
  8516. 8003786: d0c3 beq.n 8003710 <__sflush_r+0x34>
  8517. 8003788: 2b1d cmp r3, #29
  8518. 800378a: d001 beq.n 8003790 <__sflush_r+0xb4>
  8519. 800378c: 2b16 cmp r3, #22
  8520. 800378e: d101 bne.n 8003794 <__sflush_r+0xb8>
  8521. 8003790: 602f str r7, [r5, #0]
  8522. 8003792: e7b0 b.n 80036f6 <__sflush_r+0x1a>
  8523. 8003794: 89a3 ldrh r3, [r4, #12]
  8524. 8003796: f043 0340 orr.w r3, r3, #64 ; 0x40
  8525. 800379a: 81a3 strh r3, [r4, #12]
  8526. 800379c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8527. 80037a0: 690f ldr r7, [r1, #16]
  8528. 80037a2: 2f00 cmp r7, #0
  8529. 80037a4: d0a7 beq.n 80036f6 <__sflush_r+0x1a>
  8530. 80037a6: 0793 lsls r3, r2, #30
  8531. 80037a8: bf18 it ne
  8532. 80037aa: 2300 movne r3, #0
  8533. 80037ac: 680e ldr r6, [r1, #0]
  8534. 80037ae: bf08 it eq
  8535. 80037b0: 694b ldreq r3, [r1, #20]
  8536. 80037b2: eba6 0807 sub.w r8, r6, r7
  8537. 80037b6: 600f str r7, [r1, #0]
  8538. 80037b8: 608b str r3, [r1, #8]
  8539. 80037ba: f1b8 0f00 cmp.w r8, #0
  8540. 80037be: dd9a ble.n 80036f6 <__sflush_r+0x1a>
  8541. 80037c0: 4643 mov r3, r8
  8542. 80037c2: 463a mov r2, r7
  8543. 80037c4: 6a21 ldr r1, [r4, #32]
  8544. 80037c6: 4628 mov r0, r5
  8545. 80037c8: 6aa6 ldr r6, [r4, #40] ; 0x28
  8546. 80037ca: 47b0 blx r6
  8547. 80037cc: 2800 cmp r0, #0
  8548. 80037ce: dc07 bgt.n 80037e0 <__sflush_r+0x104>
  8549. 80037d0: 89a3 ldrh r3, [r4, #12]
  8550. 80037d2: f043 0340 orr.w r3, r3, #64 ; 0x40
  8551. 80037d6: 81a3 strh r3, [r4, #12]
  8552. 80037d8: f04f 30ff mov.w r0, #4294967295
  8553. 80037dc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
  8554. 80037e0: 4407 add r7, r0
  8555. 80037e2: eba8 0800 sub.w r8, r8, r0
  8556. 80037e6: e7e8 b.n 80037ba <__sflush_r+0xde>
  8557. 80037e8: 20400001 .word 0x20400001
  8558. 080037ec <_fflush_r>:
  8559. 80037ec: b538 push {r3, r4, r5, lr}
  8560. 80037ee: 690b ldr r3, [r1, #16]
  8561. 80037f0: 4605 mov r5, r0
  8562. 80037f2: 460c mov r4, r1
  8563. 80037f4: b1db cbz r3, 800382e <_fflush_r+0x42>
  8564. 80037f6: b118 cbz r0, 8003800 <_fflush_r+0x14>
  8565. 80037f8: 6983 ldr r3, [r0, #24]
  8566. 80037fa: b90b cbnz r3, 8003800 <_fflush_r+0x14>
  8567. 80037fc: f000 f860 bl 80038c0 <__sinit>
  8568. 8003800: 4b0c ldr r3, [pc, #48] ; (8003834 <_fflush_r+0x48>)
  8569. 8003802: 429c cmp r4, r3
  8570. 8003804: d109 bne.n 800381a <_fflush_r+0x2e>
  8571. 8003806: 686c ldr r4, [r5, #4]
  8572. 8003808: f9b4 300c ldrsh.w r3, [r4, #12]
  8573. 800380c: b17b cbz r3, 800382e <_fflush_r+0x42>
  8574. 800380e: 4621 mov r1, r4
  8575. 8003810: 4628 mov r0, r5
  8576. 8003812: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
  8577. 8003816: f7ff bf61 b.w 80036dc <__sflush_r>
  8578. 800381a: 4b07 ldr r3, [pc, #28] ; (8003838 <_fflush_r+0x4c>)
  8579. 800381c: 429c cmp r4, r3
  8580. 800381e: d101 bne.n 8003824 <_fflush_r+0x38>
  8581. 8003820: 68ac ldr r4, [r5, #8]
  8582. 8003822: e7f1 b.n 8003808 <_fflush_r+0x1c>
  8583. 8003824: 4b05 ldr r3, [pc, #20] ; (800383c <_fflush_r+0x50>)
  8584. 8003826: 429c cmp r4, r3
  8585. 8003828: bf08 it eq
  8586. 800382a: 68ec ldreq r4, [r5, #12]
  8587. 800382c: e7ec b.n 8003808 <_fflush_r+0x1c>
  8588. 800382e: 2000 movs r0, #0
  8589. 8003830: bd38 pop {r3, r4, r5, pc}
  8590. 8003832: bf00 nop
  8591. 8003834: 08004568 .word 0x08004568
  8592. 8003838: 08004588 .word 0x08004588
  8593. 800383c: 08004548 .word 0x08004548
  8594. 08003840 <_cleanup_r>:
  8595. 8003840: 4901 ldr r1, [pc, #4] ; (8003848 <_cleanup_r+0x8>)
  8596. 8003842: f000 b8a9 b.w 8003998 <_fwalk_reent>
  8597. 8003846: bf00 nop
  8598. 8003848: 080037ed .word 0x080037ed
  8599. 0800384c <std.isra.0>:
  8600. 800384c: 2300 movs r3, #0
  8601. 800384e: b510 push {r4, lr}
  8602. 8003850: 4604 mov r4, r0
  8603. 8003852: 6003 str r3, [r0, #0]
  8604. 8003854: 6043 str r3, [r0, #4]
  8605. 8003856: 6083 str r3, [r0, #8]
  8606. 8003858: 8181 strh r1, [r0, #12]
  8607. 800385a: 6643 str r3, [r0, #100] ; 0x64
  8608. 800385c: 81c2 strh r2, [r0, #14]
  8609. 800385e: 6103 str r3, [r0, #16]
  8610. 8003860: 6143 str r3, [r0, #20]
  8611. 8003862: 6183 str r3, [r0, #24]
  8612. 8003864: 4619 mov r1, r3
  8613. 8003866: 2208 movs r2, #8
  8614. 8003868: 305c adds r0, #92 ; 0x5c
  8615. 800386a: f7ff fd3d bl 80032e8 <memset>
  8616. 800386e: 4b05 ldr r3, [pc, #20] ; (8003884 <std.isra.0+0x38>)
  8617. 8003870: 6224 str r4, [r4, #32]
  8618. 8003872: 6263 str r3, [r4, #36] ; 0x24
  8619. 8003874: 4b04 ldr r3, [pc, #16] ; (8003888 <std.isra.0+0x3c>)
  8620. 8003876: 62a3 str r3, [r4, #40] ; 0x28
  8621. 8003878: 4b04 ldr r3, [pc, #16] ; (800388c <std.isra.0+0x40>)
  8622. 800387a: 62e3 str r3, [r4, #44] ; 0x2c
  8623. 800387c: 4b04 ldr r3, [pc, #16] ; (8003890 <std.isra.0+0x44>)
  8624. 800387e: 6323 str r3, [r4, #48] ; 0x30
  8625. 8003880: bd10 pop {r4, pc}
  8626. 8003882: bf00 nop
  8627. 8003884: 080041cd .word 0x080041cd
  8628. 8003888: 080041ef .word 0x080041ef
  8629. 800388c: 08004227 .word 0x08004227
  8630. 8003890: 0800424b .word 0x0800424b
  8631. 08003894 <__sfmoreglue>:
  8632. 8003894: b570 push {r4, r5, r6, lr}
  8633. 8003896: 2568 movs r5, #104 ; 0x68
  8634. 8003898: 1e4a subs r2, r1, #1
  8635. 800389a: 4355 muls r5, r2
  8636. 800389c: 460e mov r6, r1
  8637. 800389e: f105 0174 add.w r1, r5, #116 ; 0x74
  8638. 80038a2: f000 f94f bl 8003b44 <_malloc_r>
  8639. 80038a6: 4604 mov r4, r0
  8640. 80038a8: b140 cbz r0, 80038bc <__sfmoreglue+0x28>
  8641. 80038aa: 2100 movs r1, #0
  8642. 80038ac: e880 0042 stmia.w r0, {r1, r6}
  8643. 80038b0: 300c adds r0, #12
  8644. 80038b2: 60a0 str r0, [r4, #8]
  8645. 80038b4: f105 0268 add.w r2, r5, #104 ; 0x68
  8646. 80038b8: f7ff fd16 bl 80032e8 <memset>
  8647. 80038bc: 4620 mov r0, r4
  8648. 80038be: bd70 pop {r4, r5, r6, pc}
  8649. 080038c0 <__sinit>:
  8650. 80038c0: 6983 ldr r3, [r0, #24]
  8651. 80038c2: b510 push {r4, lr}
  8652. 80038c4: 4604 mov r4, r0
  8653. 80038c6: bb33 cbnz r3, 8003916 <__sinit+0x56>
  8654. 80038c8: 6483 str r3, [r0, #72] ; 0x48
  8655. 80038ca: 64c3 str r3, [r0, #76] ; 0x4c
  8656. 80038cc: 6503 str r3, [r0, #80] ; 0x50
  8657. 80038ce: 4b12 ldr r3, [pc, #72] ; (8003918 <__sinit+0x58>)
  8658. 80038d0: 4a12 ldr r2, [pc, #72] ; (800391c <__sinit+0x5c>)
  8659. 80038d2: 681b ldr r3, [r3, #0]
  8660. 80038d4: 6282 str r2, [r0, #40] ; 0x28
  8661. 80038d6: 4298 cmp r0, r3
  8662. 80038d8: bf04 itt eq
  8663. 80038da: 2301 moveq r3, #1
  8664. 80038dc: 6183 streq r3, [r0, #24]
  8665. 80038de: f000 f81f bl 8003920 <__sfp>
  8666. 80038e2: 6060 str r0, [r4, #4]
  8667. 80038e4: 4620 mov r0, r4
  8668. 80038e6: f000 f81b bl 8003920 <__sfp>
  8669. 80038ea: 60a0 str r0, [r4, #8]
  8670. 80038ec: 4620 mov r0, r4
  8671. 80038ee: f000 f817 bl 8003920 <__sfp>
  8672. 80038f2: 2200 movs r2, #0
  8673. 80038f4: 60e0 str r0, [r4, #12]
  8674. 80038f6: 2104 movs r1, #4
  8675. 80038f8: 6860 ldr r0, [r4, #4]
  8676. 80038fa: f7ff ffa7 bl 800384c <std.isra.0>
  8677. 80038fe: 2201 movs r2, #1
  8678. 8003900: 2109 movs r1, #9
  8679. 8003902: 68a0 ldr r0, [r4, #8]
  8680. 8003904: f7ff ffa2 bl 800384c <std.isra.0>
  8681. 8003908: 2202 movs r2, #2
  8682. 800390a: 2112 movs r1, #18
  8683. 800390c: 68e0 ldr r0, [r4, #12]
  8684. 800390e: f7ff ff9d bl 800384c <std.isra.0>
  8685. 8003912: 2301 movs r3, #1
  8686. 8003914: 61a3 str r3, [r4, #24]
  8687. 8003916: bd10 pop {r4, pc}
  8688. 8003918: 08004544 .word 0x08004544
  8689. 800391c: 08003841 .word 0x08003841
  8690. 08003920 <__sfp>:
  8691. 8003920: b5f8 push {r3, r4, r5, r6, r7, lr}
  8692. 8003922: 4b1c ldr r3, [pc, #112] ; (8003994 <__sfp+0x74>)
  8693. 8003924: 4607 mov r7, r0
  8694. 8003926: 681e ldr r6, [r3, #0]
  8695. 8003928: 69b3 ldr r3, [r6, #24]
  8696. 800392a: b913 cbnz r3, 8003932 <__sfp+0x12>
  8697. 800392c: 4630 mov r0, r6
  8698. 800392e: f7ff ffc7 bl 80038c0 <__sinit>
  8699. 8003932: 3648 adds r6, #72 ; 0x48
  8700. 8003934: 68b4 ldr r4, [r6, #8]
  8701. 8003936: 6873 ldr r3, [r6, #4]
  8702. 8003938: 3b01 subs r3, #1
  8703. 800393a: d503 bpl.n 8003944 <__sfp+0x24>
  8704. 800393c: 6833 ldr r3, [r6, #0]
  8705. 800393e: b133 cbz r3, 800394e <__sfp+0x2e>
  8706. 8003940: 6836 ldr r6, [r6, #0]
  8707. 8003942: e7f7 b.n 8003934 <__sfp+0x14>
  8708. 8003944: f9b4 500c ldrsh.w r5, [r4, #12]
  8709. 8003948: b16d cbz r5, 8003966 <__sfp+0x46>
  8710. 800394a: 3468 adds r4, #104 ; 0x68
  8711. 800394c: e7f4 b.n 8003938 <__sfp+0x18>
  8712. 800394e: 2104 movs r1, #4
  8713. 8003950: 4638 mov r0, r7
  8714. 8003952: f7ff ff9f bl 8003894 <__sfmoreglue>
  8715. 8003956: 6030 str r0, [r6, #0]
  8716. 8003958: 2800 cmp r0, #0
  8717. 800395a: d1f1 bne.n 8003940 <__sfp+0x20>
  8718. 800395c: 230c movs r3, #12
  8719. 800395e: 4604 mov r4, r0
  8720. 8003960: 603b str r3, [r7, #0]
  8721. 8003962: 4620 mov r0, r4
  8722. 8003964: bdf8 pop {r3, r4, r5, r6, r7, pc}
  8723. 8003966: f64f 73ff movw r3, #65535 ; 0xffff
  8724. 800396a: 81e3 strh r3, [r4, #14]
  8725. 800396c: 2301 movs r3, #1
  8726. 800396e: 6665 str r5, [r4, #100] ; 0x64
  8727. 8003970: 81a3 strh r3, [r4, #12]
  8728. 8003972: 6025 str r5, [r4, #0]
  8729. 8003974: 60a5 str r5, [r4, #8]
  8730. 8003976: 6065 str r5, [r4, #4]
  8731. 8003978: 6125 str r5, [r4, #16]
  8732. 800397a: 6165 str r5, [r4, #20]
  8733. 800397c: 61a5 str r5, [r4, #24]
  8734. 800397e: 2208 movs r2, #8
  8735. 8003980: 4629 mov r1, r5
  8736. 8003982: f104 005c add.w r0, r4, #92 ; 0x5c
  8737. 8003986: f7ff fcaf bl 80032e8 <memset>
  8738. 800398a: 6365 str r5, [r4, #52] ; 0x34
  8739. 800398c: 63a5 str r5, [r4, #56] ; 0x38
  8740. 800398e: 64a5 str r5, [r4, #72] ; 0x48
  8741. 8003990: 64e5 str r5, [r4, #76] ; 0x4c
  8742. 8003992: e7e6 b.n 8003962 <__sfp+0x42>
  8743. 8003994: 08004544 .word 0x08004544
  8744. 08003998 <_fwalk_reent>:
  8745. 8003998: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  8746. 800399c: 4680 mov r8, r0
  8747. 800399e: 4689 mov r9, r1
  8748. 80039a0: 2600 movs r6, #0
  8749. 80039a2: f100 0448 add.w r4, r0, #72 ; 0x48
  8750. 80039a6: b914 cbnz r4, 80039ae <_fwalk_reent+0x16>
  8751. 80039a8: 4630 mov r0, r6
  8752. 80039aa: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
  8753. 80039ae: 68a5 ldr r5, [r4, #8]
  8754. 80039b0: 6867 ldr r7, [r4, #4]
  8755. 80039b2: 3f01 subs r7, #1
  8756. 80039b4: d501 bpl.n 80039ba <_fwalk_reent+0x22>
  8757. 80039b6: 6824 ldr r4, [r4, #0]
  8758. 80039b8: e7f5 b.n 80039a6 <_fwalk_reent+0xe>
  8759. 80039ba: 89ab ldrh r3, [r5, #12]
  8760. 80039bc: 2b01 cmp r3, #1
  8761. 80039be: d907 bls.n 80039d0 <_fwalk_reent+0x38>
  8762. 80039c0: f9b5 300e ldrsh.w r3, [r5, #14]
  8763. 80039c4: 3301 adds r3, #1
  8764. 80039c6: d003 beq.n 80039d0 <_fwalk_reent+0x38>
  8765. 80039c8: 4629 mov r1, r5
  8766. 80039ca: 4640 mov r0, r8
  8767. 80039cc: 47c8 blx r9
  8768. 80039ce: 4306 orrs r6, r0
  8769. 80039d0: 3568 adds r5, #104 ; 0x68
  8770. 80039d2: e7ee b.n 80039b2 <_fwalk_reent+0x1a>
  8771. 080039d4 <__swhatbuf_r>:
  8772. 80039d4: b570 push {r4, r5, r6, lr}
  8773. 80039d6: 460e mov r6, r1
  8774. 80039d8: f9b1 100e ldrsh.w r1, [r1, #14]
  8775. 80039dc: b090 sub sp, #64 ; 0x40
  8776. 80039de: 2900 cmp r1, #0
  8777. 80039e0: 4614 mov r4, r2
  8778. 80039e2: 461d mov r5, r3
  8779. 80039e4: da07 bge.n 80039f6 <__swhatbuf_r+0x22>
  8780. 80039e6: 2300 movs r3, #0
  8781. 80039e8: 602b str r3, [r5, #0]
  8782. 80039ea: 89b3 ldrh r3, [r6, #12]
  8783. 80039ec: 061a lsls r2, r3, #24
  8784. 80039ee: d410 bmi.n 8003a12 <__swhatbuf_r+0x3e>
  8785. 80039f0: f44f 6380 mov.w r3, #1024 ; 0x400
  8786. 80039f4: e00e b.n 8003a14 <__swhatbuf_r+0x40>
  8787. 80039f6: aa01 add r2, sp, #4
  8788. 80039f8: f000 fc4e bl 8004298 <_fstat_r>
  8789. 80039fc: 2800 cmp r0, #0
  8790. 80039fe: dbf2 blt.n 80039e6 <__swhatbuf_r+0x12>
  8791. 8003a00: 9a02 ldr r2, [sp, #8]
  8792. 8003a02: f402 4270 and.w r2, r2, #61440 ; 0xf000
  8793. 8003a06: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
  8794. 8003a0a: 425a negs r2, r3
  8795. 8003a0c: 415a adcs r2, r3
  8796. 8003a0e: 602a str r2, [r5, #0]
  8797. 8003a10: e7ee b.n 80039f0 <__swhatbuf_r+0x1c>
  8798. 8003a12: 2340 movs r3, #64 ; 0x40
  8799. 8003a14: 2000 movs r0, #0
  8800. 8003a16: 6023 str r3, [r4, #0]
  8801. 8003a18: b010 add sp, #64 ; 0x40
  8802. 8003a1a: bd70 pop {r4, r5, r6, pc}
  8803. 08003a1c <__smakebuf_r>:
  8804. 8003a1c: 898b ldrh r3, [r1, #12]
  8805. 8003a1e: b573 push {r0, r1, r4, r5, r6, lr}
  8806. 8003a20: 079d lsls r5, r3, #30
  8807. 8003a22: 4606 mov r6, r0
  8808. 8003a24: 460c mov r4, r1
  8809. 8003a26: d507 bpl.n 8003a38 <__smakebuf_r+0x1c>
  8810. 8003a28: f104 0347 add.w r3, r4, #71 ; 0x47
  8811. 8003a2c: 6023 str r3, [r4, #0]
  8812. 8003a2e: 6123 str r3, [r4, #16]
  8813. 8003a30: 2301 movs r3, #1
  8814. 8003a32: 6163 str r3, [r4, #20]
  8815. 8003a34: b002 add sp, #8
  8816. 8003a36: bd70 pop {r4, r5, r6, pc}
  8817. 8003a38: ab01 add r3, sp, #4
  8818. 8003a3a: 466a mov r2, sp
  8819. 8003a3c: f7ff ffca bl 80039d4 <__swhatbuf_r>
  8820. 8003a40: 9900 ldr r1, [sp, #0]
  8821. 8003a42: 4605 mov r5, r0
  8822. 8003a44: 4630 mov r0, r6
  8823. 8003a46: f000 f87d bl 8003b44 <_malloc_r>
  8824. 8003a4a: b948 cbnz r0, 8003a60 <__smakebuf_r+0x44>
  8825. 8003a4c: f9b4 300c ldrsh.w r3, [r4, #12]
  8826. 8003a50: 059a lsls r2, r3, #22
  8827. 8003a52: d4ef bmi.n 8003a34 <__smakebuf_r+0x18>
  8828. 8003a54: f023 0303 bic.w r3, r3, #3
  8829. 8003a58: f043 0302 orr.w r3, r3, #2
  8830. 8003a5c: 81a3 strh r3, [r4, #12]
  8831. 8003a5e: e7e3 b.n 8003a28 <__smakebuf_r+0xc>
  8832. 8003a60: 4b0d ldr r3, [pc, #52] ; (8003a98 <__smakebuf_r+0x7c>)
  8833. 8003a62: 62b3 str r3, [r6, #40] ; 0x28
  8834. 8003a64: 89a3 ldrh r3, [r4, #12]
  8835. 8003a66: 6020 str r0, [r4, #0]
  8836. 8003a68: f043 0380 orr.w r3, r3, #128 ; 0x80
  8837. 8003a6c: 81a3 strh r3, [r4, #12]
  8838. 8003a6e: 9b00 ldr r3, [sp, #0]
  8839. 8003a70: 6120 str r0, [r4, #16]
  8840. 8003a72: 6163 str r3, [r4, #20]
  8841. 8003a74: 9b01 ldr r3, [sp, #4]
  8842. 8003a76: b15b cbz r3, 8003a90 <__smakebuf_r+0x74>
  8843. 8003a78: f9b4 100e ldrsh.w r1, [r4, #14]
  8844. 8003a7c: 4630 mov r0, r6
  8845. 8003a7e: f000 fc1d bl 80042bc <_isatty_r>
  8846. 8003a82: b128 cbz r0, 8003a90 <__smakebuf_r+0x74>
  8847. 8003a84: 89a3 ldrh r3, [r4, #12]
  8848. 8003a86: f023 0303 bic.w r3, r3, #3
  8849. 8003a8a: f043 0301 orr.w r3, r3, #1
  8850. 8003a8e: 81a3 strh r3, [r4, #12]
  8851. 8003a90: 89a3 ldrh r3, [r4, #12]
  8852. 8003a92: 431d orrs r5, r3
  8853. 8003a94: 81a5 strh r5, [r4, #12]
  8854. 8003a96: e7cd b.n 8003a34 <__smakebuf_r+0x18>
  8855. 8003a98: 08003841 .word 0x08003841
  8856. 08003a9c <malloc>:
  8857. 8003a9c: 4b02 ldr r3, [pc, #8] ; (8003aa8 <malloc+0xc>)
  8858. 8003a9e: 4601 mov r1, r0
  8859. 8003aa0: 6818 ldr r0, [r3, #0]
  8860. 8003aa2: f000 b84f b.w 8003b44 <_malloc_r>
  8861. 8003aa6: bf00 nop
  8862. 8003aa8: 2000000c .word 0x2000000c
  8863. 08003aac <_free_r>:
  8864. 8003aac: b538 push {r3, r4, r5, lr}
  8865. 8003aae: 4605 mov r5, r0
  8866. 8003ab0: 2900 cmp r1, #0
  8867. 8003ab2: d043 beq.n 8003b3c <_free_r+0x90>
  8868. 8003ab4: f851 3c04 ldr.w r3, [r1, #-4]
  8869. 8003ab8: 1f0c subs r4, r1, #4
  8870. 8003aba: 2b00 cmp r3, #0
  8871. 8003abc: bfb8 it lt
  8872. 8003abe: 18e4 addlt r4, r4, r3
  8873. 8003ac0: f000 fc2c bl 800431c <__malloc_lock>
  8874. 8003ac4: 4a1e ldr r2, [pc, #120] ; (8003b40 <_free_r+0x94>)
  8875. 8003ac6: 6813 ldr r3, [r2, #0]
  8876. 8003ac8: 4610 mov r0, r2
  8877. 8003aca: b933 cbnz r3, 8003ada <_free_r+0x2e>
  8878. 8003acc: 6063 str r3, [r4, #4]
  8879. 8003ace: 6014 str r4, [r2, #0]
  8880. 8003ad0: 4628 mov r0, r5
  8881. 8003ad2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
  8882. 8003ad6: f000 bc22 b.w 800431e <__malloc_unlock>
  8883. 8003ada: 42a3 cmp r3, r4
  8884. 8003adc: d90b bls.n 8003af6 <_free_r+0x4a>
  8885. 8003ade: 6821 ldr r1, [r4, #0]
  8886. 8003ae0: 1862 adds r2, r4, r1
  8887. 8003ae2: 4293 cmp r3, r2
  8888. 8003ae4: bf01 itttt eq
  8889. 8003ae6: 681a ldreq r2, [r3, #0]
  8890. 8003ae8: 685b ldreq r3, [r3, #4]
  8891. 8003aea: 1852 addeq r2, r2, r1
  8892. 8003aec: 6022 streq r2, [r4, #0]
  8893. 8003aee: 6063 str r3, [r4, #4]
  8894. 8003af0: 6004 str r4, [r0, #0]
  8895. 8003af2: e7ed b.n 8003ad0 <_free_r+0x24>
  8896. 8003af4: 4613 mov r3, r2
  8897. 8003af6: 685a ldr r2, [r3, #4]
  8898. 8003af8: b10a cbz r2, 8003afe <_free_r+0x52>
  8899. 8003afa: 42a2 cmp r2, r4
  8900. 8003afc: d9fa bls.n 8003af4 <_free_r+0x48>
  8901. 8003afe: 6819 ldr r1, [r3, #0]
  8902. 8003b00: 1858 adds r0, r3, r1
  8903. 8003b02: 42a0 cmp r0, r4
  8904. 8003b04: d10b bne.n 8003b1e <_free_r+0x72>
  8905. 8003b06: 6820 ldr r0, [r4, #0]
  8906. 8003b08: 4401 add r1, r0
  8907. 8003b0a: 1858 adds r0, r3, r1
  8908. 8003b0c: 4282 cmp r2, r0
  8909. 8003b0e: 6019 str r1, [r3, #0]
  8910. 8003b10: d1de bne.n 8003ad0 <_free_r+0x24>
  8911. 8003b12: 6810 ldr r0, [r2, #0]
  8912. 8003b14: 6852 ldr r2, [r2, #4]
  8913. 8003b16: 4401 add r1, r0
  8914. 8003b18: 6019 str r1, [r3, #0]
  8915. 8003b1a: 605a str r2, [r3, #4]
  8916. 8003b1c: e7d8 b.n 8003ad0 <_free_r+0x24>
  8917. 8003b1e: d902 bls.n 8003b26 <_free_r+0x7a>
  8918. 8003b20: 230c movs r3, #12
  8919. 8003b22: 602b str r3, [r5, #0]
  8920. 8003b24: e7d4 b.n 8003ad0 <_free_r+0x24>
  8921. 8003b26: 6820 ldr r0, [r4, #0]
  8922. 8003b28: 1821 adds r1, r4, r0
  8923. 8003b2a: 428a cmp r2, r1
  8924. 8003b2c: bf01 itttt eq
  8925. 8003b2e: 6811 ldreq r1, [r2, #0]
  8926. 8003b30: 6852 ldreq r2, [r2, #4]
  8927. 8003b32: 1809 addeq r1, r1, r0
  8928. 8003b34: 6021 streq r1, [r4, #0]
  8929. 8003b36: 6062 str r2, [r4, #4]
  8930. 8003b38: 605c str r4, [r3, #4]
  8931. 8003b3a: e7c9 b.n 8003ad0 <_free_r+0x24>
  8932. 8003b3c: bd38 pop {r3, r4, r5, pc}
  8933. 8003b3e: bf00 nop
  8934. 8003b40: 20000138 .word 0x20000138
  8935. 08003b44 <_malloc_r>:
  8936. 8003b44: b570 push {r4, r5, r6, lr}
  8937. 8003b46: 1ccd adds r5, r1, #3
  8938. 8003b48: f025 0503 bic.w r5, r5, #3
  8939. 8003b4c: 3508 adds r5, #8
  8940. 8003b4e: 2d0c cmp r5, #12
  8941. 8003b50: bf38 it cc
  8942. 8003b52: 250c movcc r5, #12
  8943. 8003b54: 2d00 cmp r5, #0
  8944. 8003b56: 4606 mov r6, r0
  8945. 8003b58: db01 blt.n 8003b5e <_malloc_r+0x1a>
  8946. 8003b5a: 42a9 cmp r1, r5
  8947. 8003b5c: d903 bls.n 8003b66 <_malloc_r+0x22>
  8948. 8003b5e: 230c movs r3, #12
  8949. 8003b60: 6033 str r3, [r6, #0]
  8950. 8003b62: 2000 movs r0, #0
  8951. 8003b64: bd70 pop {r4, r5, r6, pc}
  8952. 8003b66: f000 fbd9 bl 800431c <__malloc_lock>
  8953. 8003b6a: 4a23 ldr r2, [pc, #140] ; (8003bf8 <_malloc_r+0xb4>)
  8954. 8003b6c: 6814 ldr r4, [r2, #0]
  8955. 8003b6e: 4621 mov r1, r4
  8956. 8003b70: b991 cbnz r1, 8003b98 <_malloc_r+0x54>
  8957. 8003b72: 4c22 ldr r4, [pc, #136] ; (8003bfc <_malloc_r+0xb8>)
  8958. 8003b74: 6823 ldr r3, [r4, #0]
  8959. 8003b76: b91b cbnz r3, 8003b80 <_malloc_r+0x3c>
  8960. 8003b78: 4630 mov r0, r6
  8961. 8003b7a: f000 fb17 bl 80041ac <_sbrk_r>
  8962. 8003b7e: 6020 str r0, [r4, #0]
  8963. 8003b80: 4629 mov r1, r5
  8964. 8003b82: 4630 mov r0, r6
  8965. 8003b84: f000 fb12 bl 80041ac <_sbrk_r>
  8966. 8003b88: 1c43 adds r3, r0, #1
  8967. 8003b8a: d126 bne.n 8003bda <_malloc_r+0x96>
  8968. 8003b8c: 230c movs r3, #12
  8969. 8003b8e: 4630 mov r0, r6
  8970. 8003b90: 6033 str r3, [r6, #0]
  8971. 8003b92: f000 fbc4 bl 800431e <__malloc_unlock>
  8972. 8003b96: e7e4 b.n 8003b62 <_malloc_r+0x1e>
  8973. 8003b98: 680b ldr r3, [r1, #0]
  8974. 8003b9a: 1b5b subs r3, r3, r5
  8975. 8003b9c: d41a bmi.n 8003bd4 <_malloc_r+0x90>
  8976. 8003b9e: 2b0b cmp r3, #11
  8977. 8003ba0: d90f bls.n 8003bc2 <_malloc_r+0x7e>
  8978. 8003ba2: 600b str r3, [r1, #0]
  8979. 8003ba4: 18cc adds r4, r1, r3
  8980. 8003ba6: 50cd str r5, [r1, r3]
  8981. 8003ba8: 4630 mov r0, r6
  8982. 8003baa: f000 fbb8 bl 800431e <__malloc_unlock>
  8983. 8003bae: f104 000b add.w r0, r4, #11
  8984. 8003bb2: 1d23 adds r3, r4, #4
  8985. 8003bb4: f020 0007 bic.w r0, r0, #7
  8986. 8003bb8: 1ac3 subs r3, r0, r3
  8987. 8003bba: d01b beq.n 8003bf4 <_malloc_r+0xb0>
  8988. 8003bbc: 425a negs r2, r3
  8989. 8003bbe: 50e2 str r2, [r4, r3]
  8990. 8003bc0: bd70 pop {r4, r5, r6, pc}
  8991. 8003bc2: 428c cmp r4, r1
  8992. 8003bc4: bf0b itete eq
  8993. 8003bc6: 6863 ldreq r3, [r4, #4]
  8994. 8003bc8: 684b ldrne r3, [r1, #4]
  8995. 8003bca: 6013 streq r3, [r2, #0]
  8996. 8003bcc: 6063 strne r3, [r4, #4]
  8997. 8003bce: bf18 it ne
  8998. 8003bd0: 460c movne r4, r1
  8999. 8003bd2: e7e9 b.n 8003ba8 <_malloc_r+0x64>
  9000. 8003bd4: 460c mov r4, r1
  9001. 8003bd6: 6849 ldr r1, [r1, #4]
  9002. 8003bd8: e7ca b.n 8003b70 <_malloc_r+0x2c>
  9003. 8003bda: 1cc4 adds r4, r0, #3
  9004. 8003bdc: f024 0403 bic.w r4, r4, #3
  9005. 8003be0: 42a0 cmp r0, r4
  9006. 8003be2: d005 beq.n 8003bf0 <_malloc_r+0xac>
  9007. 8003be4: 1a21 subs r1, r4, r0
  9008. 8003be6: 4630 mov r0, r6
  9009. 8003be8: f000 fae0 bl 80041ac <_sbrk_r>
  9010. 8003bec: 3001 adds r0, #1
  9011. 8003bee: d0cd beq.n 8003b8c <_malloc_r+0x48>
  9012. 8003bf0: 6025 str r5, [r4, #0]
  9013. 8003bf2: e7d9 b.n 8003ba8 <_malloc_r+0x64>
  9014. 8003bf4: bd70 pop {r4, r5, r6, pc}
  9015. 8003bf6: bf00 nop
  9016. 8003bf8: 20000138 .word 0x20000138
  9017. 8003bfc: 2000013c .word 0x2000013c
  9018. 08003c00 <__sfputc_r>:
  9019. 8003c00: 6893 ldr r3, [r2, #8]
  9020. 8003c02: b410 push {r4}
  9021. 8003c04: 3b01 subs r3, #1
  9022. 8003c06: 2b00 cmp r3, #0
  9023. 8003c08: 6093 str r3, [r2, #8]
  9024. 8003c0a: da08 bge.n 8003c1e <__sfputc_r+0x1e>
  9025. 8003c0c: 6994 ldr r4, [r2, #24]
  9026. 8003c0e: 42a3 cmp r3, r4
  9027. 8003c10: db02 blt.n 8003c18 <__sfputc_r+0x18>
  9028. 8003c12: b2cb uxtb r3, r1
  9029. 8003c14: 2b0a cmp r3, #10
  9030. 8003c16: d102 bne.n 8003c1e <__sfputc_r+0x1e>
  9031. 8003c18: bc10 pop {r4}
  9032. 8003c1a: f7ff bc9f b.w 800355c <__swbuf_r>
  9033. 8003c1e: 6813 ldr r3, [r2, #0]
  9034. 8003c20: 1c58 adds r0, r3, #1
  9035. 8003c22: 6010 str r0, [r2, #0]
  9036. 8003c24: 7019 strb r1, [r3, #0]
  9037. 8003c26: b2c8 uxtb r0, r1
  9038. 8003c28: bc10 pop {r4}
  9039. 8003c2a: 4770 bx lr
  9040. 08003c2c <__sfputs_r>:
  9041. 8003c2c: b5f8 push {r3, r4, r5, r6, r7, lr}
  9042. 8003c2e: 4606 mov r6, r0
  9043. 8003c30: 460f mov r7, r1
  9044. 8003c32: 4614 mov r4, r2
  9045. 8003c34: 18d5 adds r5, r2, r3
  9046. 8003c36: 42ac cmp r4, r5
  9047. 8003c38: d101 bne.n 8003c3e <__sfputs_r+0x12>
  9048. 8003c3a: 2000 movs r0, #0
  9049. 8003c3c: e007 b.n 8003c4e <__sfputs_r+0x22>
  9050. 8003c3e: 463a mov r2, r7
  9051. 8003c40: f814 1b01 ldrb.w r1, [r4], #1
  9052. 8003c44: 4630 mov r0, r6
  9053. 8003c46: f7ff ffdb bl 8003c00 <__sfputc_r>
  9054. 8003c4a: 1c43 adds r3, r0, #1
  9055. 8003c4c: d1f3 bne.n 8003c36 <__sfputs_r+0xa>
  9056. 8003c4e: bdf8 pop {r3, r4, r5, r6, r7, pc}
  9057. 08003c50 <_vfiprintf_r>:
  9058. 8003c50: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  9059. 8003c54: b09d sub sp, #116 ; 0x74
  9060. 8003c56: 460c mov r4, r1
  9061. 8003c58: 4617 mov r7, r2
  9062. 8003c5a: 9303 str r3, [sp, #12]
  9063. 8003c5c: 4606 mov r6, r0
  9064. 8003c5e: b118 cbz r0, 8003c68 <_vfiprintf_r+0x18>
  9065. 8003c60: 6983 ldr r3, [r0, #24]
  9066. 8003c62: b90b cbnz r3, 8003c68 <_vfiprintf_r+0x18>
  9067. 8003c64: f7ff fe2c bl 80038c0 <__sinit>
  9068. 8003c68: 4b7c ldr r3, [pc, #496] ; (8003e5c <_vfiprintf_r+0x20c>)
  9069. 8003c6a: 429c cmp r4, r3
  9070. 8003c6c: d157 bne.n 8003d1e <_vfiprintf_r+0xce>
  9071. 8003c6e: 6874 ldr r4, [r6, #4]
  9072. 8003c70: 89a3 ldrh r3, [r4, #12]
  9073. 8003c72: 0718 lsls r0, r3, #28
  9074. 8003c74: d55d bpl.n 8003d32 <_vfiprintf_r+0xe2>
  9075. 8003c76: 6923 ldr r3, [r4, #16]
  9076. 8003c78: 2b00 cmp r3, #0
  9077. 8003c7a: d05a beq.n 8003d32 <_vfiprintf_r+0xe2>
  9078. 8003c7c: 2300 movs r3, #0
  9079. 8003c7e: 9309 str r3, [sp, #36] ; 0x24
  9080. 8003c80: 2320 movs r3, #32
  9081. 8003c82: f88d 3029 strb.w r3, [sp, #41] ; 0x29
  9082. 8003c86: 2330 movs r3, #48 ; 0x30
  9083. 8003c88: f04f 0b01 mov.w fp, #1
  9084. 8003c8c: f88d 302a strb.w r3, [sp, #42] ; 0x2a
  9085. 8003c90: 46b8 mov r8, r7
  9086. 8003c92: 4645 mov r5, r8
  9087. 8003c94: f815 3b01 ldrb.w r3, [r5], #1
  9088. 8003c98: 2b00 cmp r3, #0
  9089. 8003c9a: d155 bne.n 8003d48 <_vfiprintf_r+0xf8>
  9090. 8003c9c: ebb8 0a07 subs.w sl, r8, r7
  9091. 8003ca0: d00b beq.n 8003cba <_vfiprintf_r+0x6a>
  9092. 8003ca2: 4653 mov r3, sl
  9093. 8003ca4: 463a mov r2, r7
  9094. 8003ca6: 4621 mov r1, r4
  9095. 8003ca8: 4630 mov r0, r6
  9096. 8003caa: f7ff ffbf bl 8003c2c <__sfputs_r>
  9097. 8003cae: 3001 adds r0, #1
  9098. 8003cb0: f000 80c4 beq.w 8003e3c <_vfiprintf_r+0x1ec>
  9099. 8003cb4: 9b09 ldr r3, [sp, #36] ; 0x24
  9100. 8003cb6: 4453 add r3, sl
  9101. 8003cb8: 9309 str r3, [sp, #36] ; 0x24
  9102. 8003cba: f898 3000 ldrb.w r3, [r8]
  9103. 8003cbe: 2b00 cmp r3, #0
  9104. 8003cc0: f000 80bc beq.w 8003e3c <_vfiprintf_r+0x1ec>
  9105. 8003cc4: 2300 movs r3, #0
  9106. 8003cc6: f04f 32ff mov.w r2, #4294967295
  9107. 8003cca: 9304 str r3, [sp, #16]
  9108. 8003ccc: 9307 str r3, [sp, #28]
  9109. 8003cce: 9205 str r2, [sp, #20]
  9110. 8003cd0: 9306 str r3, [sp, #24]
  9111. 8003cd2: f88d 3053 strb.w r3, [sp, #83] ; 0x53
  9112. 8003cd6: 931a str r3, [sp, #104] ; 0x68
  9113. 8003cd8: 2205 movs r2, #5
  9114. 8003cda: 7829 ldrb r1, [r5, #0]
  9115. 8003cdc: 4860 ldr r0, [pc, #384] ; (8003e60 <_vfiprintf_r+0x210>)
  9116. 8003cde: f000 fb0f bl 8004300 <memchr>
  9117. 8003ce2: f105 0801 add.w r8, r5, #1
  9118. 8003ce6: 9b04 ldr r3, [sp, #16]
  9119. 8003ce8: 2800 cmp r0, #0
  9120. 8003cea: d131 bne.n 8003d50 <_vfiprintf_r+0x100>
  9121. 8003cec: 06d9 lsls r1, r3, #27
  9122. 8003cee: bf44 itt mi
  9123. 8003cf0: 2220 movmi r2, #32
  9124. 8003cf2: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
  9125. 8003cf6: 071a lsls r2, r3, #28
  9126. 8003cf8: bf44 itt mi
  9127. 8003cfa: 222b movmi r2, #43 ; 0x2b
  9128. 8003cfc: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
  9129. 8003d00: 782a ldrb r2, [r5, #0]
  9130. 8003d02: 2a2a cmp r2, #42 ; 0x2a
  9131. 8003d04: d02c beq.n 8003d60 <_vfiprintf_r+0x110>
  9132. 8003d06: 2100 movs r1, #0
  9133. 8003d08: 200a movs r0, #10
  9134. 8003d0a: 9a07 ldr r2, [sp, #28]
  9135. 8003d0c: 46a8 mov r8, r5
  9136. 8003d0e: f898 3000 ldrb.w r3, [r8]
  9137. 8003d12: 3501 adds r5, #1
  9138. 8003d14: 3b30 subs r3, #48 ; 0x30
  9139. 8003d16: 2b09 cmp r3, #9
  9140. 8003d18: d96d bls.n 8003df6 <_vfiprintf_r+0x1a6>
  9141. 8003d1a: b371 cbz r1, 8003d7a <_vfiprintf_r+0x12a>
  9142. 8003d1c: e026 b.n 8003d6c <_vfiprintf_r+0x11c>
  9143. 8003d1e: 4b51 ldr r3, [pc, #324] ; (8003e64 <_vfiprintf_r+0x214>)
  9144. 8003d20: 429c cmp r4, r3
  9145. 8003d22: d101 bne.n 8003d28 <_vfiprintf_r+0xd8>
  9146. 8003d24: 68b4 ldr r4, [r6, #8]
  9147. 8003d26: e7a3 b.n 8003c70 <_vfiprintf_r+0x20>
  9148. 8003d28: 4b4f ldr r3, [pc, #316] ; (8003e68 <_vfiprintf_r+0x218>)
  9149. 8003d2a: 429c cmp r4, r3
  9150. 8003d2c: bf08 it eq
  9151. 8003d2e: 68f4 ldreq r4, [r6, #12]
  9152. 8003d30: e79e b.n 8003c70 <_vfiprintf_r+0x20>
  9153. 8003d32: 4621 mov r1, r4
  9154. 8003d34: 4630 mov r0, r6
  9155. 8003d36: f7ff fc63 bl 8003600 <__swsetup_r>
  9156. 8003d3a: 2800 cmp r0, #0
  9157. 8003d3c: d09e beq.n 8003c7c <_vfiprintf_r+0x2c>
  9158. 8003d3e: f04f 30ff mov.w r0, #4294967295
  9159. 8003d42: b01d add sp, #116 ; 0x74
  9160. 8003d44: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  9161. 8003d48: 2b25 cmp r3, #37 ; 0x25
  9162. 8003d4a: d0a7 beq.n 8003c9c <_vfiprintf_r+0x4c>
  9163. 8003d4c: 46a8 mov r8, r5
  9164. 8003d4e: e7a0 b.n 8003c92 <_vfiprintf_r+0x42>
  9165. 8003d50: 4a43 ldr r2, [pc, #268] ; (8003e60 <_vfiprintf_r+0x210>)
  9166. 8003d52: 4645 mov r5, r8
  9167. 8003d54: 1a80 subs r0, r0, r2
  9168. 8003d56: fa0b f000 lsl.w r0, fp, r0
  9169. 8003d5a: 4318 orrs r0, r3
  9170. 8003d5c: 9004 str r0, [sp, #16]
  9171. 8003d5e: e7bb b.n 8003cd8 <_vfiprintf_r+0x88>
  9172. 8003d60: 9a03 ldr r2, [sp, #12]
  9173. 8003d62: 1d11 adds r1, r2, #4
  9174. 8003d64: 6812 ldr r2, [r2, #0]
  9175. 8003d66: 9103 str r1, [sp, #12]
  9176. 8003d68: 2a00 cmp r2, #0
  9177. 8003d6a: db01 blt.n 8003d70 <_vfiprintf_r+0x120>
  9178. 8003d6c: 9207 str r2, [sp, #28]
  9179. 8003d6e: e004 b.n 8003d7a <_vfiprintf_r+0x12a>
  9180. 8003d70: 4252 negs r2, r2
  9181. 8003d72: f043 0302 orr.w r3, r3, #2
  9182. 8003d76: 9207 str r2, [sp, #28]
  9183. 8003d78: 9304 str r3, [sp, #16]
  9184. 8003d7a: f898 3000 ldrb.w r3, [r8]
  9185. 8003d7e: 2b2e cmp r3, #46 ; 0x2e
  9186. 8003d80: d110 bne.n 8003da4 <_vfiprintf_r+0x154>
  9187. 8003d82: f898 3001 ldrb.w r3, [r8, #1]
  9188. 8003d86: f108 0101 add.w r1, r8, #1
  9189. 8003d8a: 2b2a cmp r3, #42 ; 0x2a
  9190. 8003d8c: d137 bne.n 8003dfe <_vfiprintf_r+0x1ae>
  9191. 8003d8e: 9b03 ldr r3, [sp, #12]
  9192. 8003d90: f108 0802 add.w r8, r8, #2
  9193. 8003d94: 1d1a adds r2, r3, #4
  9194. 8003d96: 681b ldr r3, [r3, #0]
  9195. 8003d98: 9203 str r2, [sp, #12]
  9196. 8003d9a: 2b00 cmp r3, #0
  9197. 8003d9c: bfb8 it lt
  9198. 8003d9e: f04f 33ff movlt.w r3, #4294967295
  9199. 8003da2: 9305 str r3, [sp, #20]
  9200. 8003da4: 4d31 ldr r5, [pc, #196] ; (8003e6c <_vfiprintf_r+0x21c>)
  9201. 8003da6: 2203 movs r2, #3
  9202. 8003da8: f898 1000 ldrb.w r1, [r8]
  9203. 8003dac: 4628 mov r0, r5
  9204. 8003dae: f000 faa7 bl 8004300 <memchr>
  9205. 8003db2: b140 cbz r0, 8003dc6 <_vfiprintf_r+0x176>
  9206. 8003db4: 2340 movs r3, #64 ; 0x40
  9207. 8003db6: 1b40 subs r0, r0, r5
  9208. 8003db8: fa03 f000 lsl.w r0, r3, r0
  9209. 8003dbc: 9b04 ldr r3, [sp, #16]
  9210. 8003dbe: f108 0801 add.w r8, r8, #1
  9211. 8003dc2: 4303 orrs r3, r0
  9212. 8003dc4: 9304 str r3, [sp, #16]
  9213. 8003dc6: f898 1000 ldrb.w r1, [r8]
  9214. 8003dca: 2206 movs r2, #6
  9215. 8003dcc: 4828 ldr r0, [pc, #160] ; (8003e70 <_vfiprintf_r+0x220>)
  9216. 8003dce: f108 0701 add.w r7, r8, #1
  9217. 8003dd2: f88d 1028 strb.w r1, [sp, #40] ; 0x28
  9218. 8003dd6: f000 fa93 bl 8004300 <memchr>
  9219. 8003dda: 2800 cmp r0, #0
  9220. 8003ddc: d034 beq.n 8003e48 <_vfiprintf_r+0x1f8>
  9221. 8003dde: 4b25 ldr r3, [pc, #148] ; (8003e74 <_vfiprintf_r+0x224>)
  9222. 8003de0: bb03 cbnz r3, 8003e24 <_vfiprintf_r+0x1d4>
  9223. 8003de2: 9b03 ldr r3, [sp, #12]
  9224. 8003de4: 3307 adds r3, #7
  9225. 8003de6: f023 0307 bic.w r3, r3, #7
  9226. 8003dea: 3308 adds r3, #8
  9227. 8003dec: 9303 str r3, [sp, #12]
  9228. 8003dee: 9b09 ldr r3, [sp, #36] ; 0x24
  9229. 8003df0: 444b add r3, r9
  9230. 8003df2: 9309 str r3, [sp, #36] ; 0x24
  9231. 8003df4: e74c b.n 8003c90 <_vfiprintf_r+0x40>
  9232. 8003df6: fb00 3202 mla r2, r0, r2, r3
  9233. 8003dfa: 2101 movs r1, #1
  9234. 8003dfc: e786 b.n 8003d0c <_vfiprintf_r+0xbc>
  9235. 8003dfe: 2300 movs r3, #0
  9236. 8003e00: 250a movs r5, #10
  9237. 8003e02: 4618 mov r0, r3
  9238. 8003e04: 9305 str r3, [sp, #20]
  9239. 8003e06: 4688 mov r8, r1
  9240. 8003e08: f898 2000 ldrb.w r2, [r8]
  9241. 8003e0c: 3101 adds r1, #1
  9242. 8003e0e: 3a30 subs r2, #48 ; 0x30
  9243. 8003e10: 2a09 cmp r2, #9
  9244. 8003e12: d903 bls.n 8003e1c <_vfiprintf_r+0x1cc>
  9245. 8003e14: 2b00 cmp r3, #0
  9246. 8003e16: d0c5 beq.n 8003da4 <_vfiprintf_r+0x154>
  9247. 8003e18: 9005 str r0, [sp, #20]
  9248. 8003e1a: e7c3 b.n 8003da4 <_vfiprintf_r+0x154>
  9249. 8003e1c: fb05 2000 mla r0, r5, r0, r2
  9250. 8003e20: 2301 movs r3, #1
  9251. 8003e22: e7f0 b.n 8003e06 <_vfiprintf_r+0x1b6>
  9252. 8003e24: ab03 add r3, sp, #12
  9253. 8003e26: 9300 str r3, [sp, #0]
  9254. 8003e28: 4622 mov r2, r4
  9255. 8003e2a: 4b13 ldr r3, [pc, #76] ; (8003e78 <_vfiprintf_r+0x228>)
  9256. 8003e2c: a904 add r1, sp, #16
  9257. 8003e2e: 4630 mov r0, r6
  9258. 8003e30: f3af 8000 nop.w
  9259. 8003e34: f1b0 3fff cmp.w r0, #4294967295
  9260. 8003e38: 4681 mov r9, r0
  9261. 8003e3a: d1d8 bne.n 8003dee <_vfiprintf_r+0x19e>
  9262. 8003e3c: 89a3 ldrh r3, [r4, #12]
  9263. 8003e3e: 065b lsls r3, r3, #25
  9264. 8003e40: f53f af7d bmi.w 8003d3e <_vfiprintf_r+0xee>
  9265. 8003e44: 9809 ldr r0, [sp, #36] ; 0x24
  9266. 8003e46: e77c b.n 8003d42 <_vfiprintf_r+0xf2>
  9267. 8003e48: ab03 add r3, sp, #12
  9268. 8003e4a: 9300 str r3, [sp, #0]
  9269. 8003e4c: 4622 mov r2, r4
  9270. 8003e4e: 4b0a ldr r3, [pc, #40] ; (8003e78 <_vfiprintf_r+0x228>)
  9271. 8003e50: a904 add r1, sp, #16
  9272. 8003e52: 4630 mov r0, r6
  9273. 8003e54: f000 f88a bl 8003f6c <_printf_i>
  9274. 8003e58: e7ec b.n 8003e34 <_vfiprintf_r+0x1e4>
  9275. 8003e5a: bf00 nop
  9276. 8003e5c: 08004568 .word 0x08004568
  9277. 8003e60: 080045a8 .word 0x080045a8
  9278. 8003e64: 08004588 .word 0x08004588
  9279. 8003e68: 08004548 .word 0x08004548
  9280. 8003e6c: 080045ae .word 0x080045ae
  9281. 8003e70: 080045b2 .word 0x080045b2
  9282. 8003e74: 00000000 .word 0x00000000
  9283. 8003e78: 08003c2d .word 0x08003c2d
  9284. 08003e7c <_printf_common>:
  9285. 8003e7c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  9286. 8003e80: 4691 mov r9, r2
  9287. 8003e82: 461f mov r7, r3
  9288. 8003e84: 688a ldr r2, [r1, #8]
  9289. 8003e86: 690b ldr r3, [r1, #16]
  9290. 8003e88: 4606 mov r6, r0
  9291. 8003e8a: 4293 cmp r3, r2
  9292. 8003e8c: bfb8 it lt
  9293. 8003e8e: 4613 movlt r3, r2
  9294. 8003e90: f8c9 3000 str.w r3, [r9]
  9295. 8003e94: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
  9296. 8003e98: 460c mov r4, r1
  9297. 8003e9a: f8dd 8020 ldr.w r8, [sp, #32]
  9298. 8003e9e: b112 cbz r2, 8003ea6 <_printf_common+0x2a>
  9299. 8003ea0: 3301 adds r3, #1
  9300. 8003ea2: f8c9 3000 str.w r3, [r9]
  9301. 8003ea6: 6823 ldr r3, [r4, #0]
  9302. 8003ea8: 0699 lsls r1, r3, #26
  9303. 8003eaa: bf42 ittt mi
  9304. 8003eac: f8d9 3000 ldrmi.w r3, [r9]
  9305. 8003eb0: 3302 addmi r3, #2
  9306. 8003eb2: f8c9 3000 strmi.w r3, [r9]
  9307. 8003eb6: 6825 ldr r5, [r4, #0]
  9308. 8003eb8: f015 0506 ands.w r5, r5, #6
  9309. 8003ebc: d107 bne.n 8003ece <_printf_common+0x52>
  9310. 8003ebe: f104 0a19 add.w sl, r4, #25
  9311. 8003ec2: 68e3 ldr r3, [r4, #12]
  9312. 8003ec4: f8d9 2000 ldr.w r2, [r9]
  9313. 8003ec8: 1a9b subs r3, r3, r2
  9314. 8003eca: 429d cmp r5, r3
  9315. 8003ecc: db2a blt.n 8003f24 <_printf_common+0xa8>
  9316. 8003ece: f894 3043 ldrb.w r3, [r4, #67] ; 0x43
  9317. 8003ed2: 6822 ldr r2, [r4, #0]
  9318. 8003ed4: 3300 adds r3, #0
  9319. 8003ed6: bf18 it ne
  9320. 8003ed8: 2301 movne r3, #1
  9321. 8003eda: 0692 lsls r2, r2, #26
  9322. 8003edc: d42f bmi.n 8003f3e <_printf_common+0xc2>
  9323. 8003ede: f104 0243 add.w r2, r4, #67 ; 0x43
  9324. 8003ee2: 4639 mov r1, r7
  9325. 8003ee4: 4630 mov r0, r6
  9326. 8003ee6: 47c0 blx r8
  9327. 8003ee8: 3001 adds r0, #1
  9328. 8003eea: d022 beq.n 8003f32 <_printf_common+0xb6>
  9329. 8003eec: 6823 ldr r3, [r4, #0]
  9330. 8003eee: 68e5 ldr r5, [r4, #12]
  9331. 8003ef0: f003 0306 and.w r3, r3, #6
  9332. 8003ef4: 2b04 cmp r3, #4
  9333. 8003ef6: bf18 it ne
  9334. 8003ef8: 2500 movne r5, #0
  9335. 8003efa: f8d9 2000 ldr.w r2, [r9]
  9336. 8003efe: f04f 0900 mov.w r9, #0
  9337. 8003f02: bf08 it eq
  9338. 8003f04: 1aad subeq r5, r5, r2
  9339. 8003f06: 68a3 ldr r3, [r4, #8]
  9340. 8003f08: 6922 ldr r2, [r4, #16]
  9341. 8003f0a: bf08 it eq
  9342. 8003f0c: ea25 75e5 biceq.w r5, r5, r5, asr #31
  9343. 8003f10: 4293 cmp r3, r2
  9344. 8003f12: bfc4 itt gt
  9345. 8003f14: 1a9b subgt r3, r3, r2
  9346. 8003f16: 18ed addgt r5, r5, r3
  9347. 8003f18: 341a adds r4, #26
  9348. 8003f1a: 454d cmp r5, r9
  9349. 8003f1c: d11b bne.n 8003f56 <_printf_common+0xda>
  9350. 8003f1e: 2000 movs r0, #0
  9351. 8003f20: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  9352. 8003f24: 2301 movs r3, #1
  9353. 8003f26: 4652 mov r2, sl
  9354. 8003f28: 4639 mov r1, r7
  9355. 8003f2a: 4630 mov r0, r6
  9356. 8003f2c: 47c0 blx r8
  9357. 8003f2e: 3001 adds r0, #1
  9358. 8003f30: d103 bne.n 8003f3a <_printf_common+0xbe>
  9359. 8003f32: f04f 30ff mov.w r0, #4294967295
  9360. 8003f36: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  9361. 8003f3a: 3501 adds r5, #1
  9362. 8003f3c: e7c1 b.n 8003ec2 <_printf_common+0x46>
  9363. 8003f3e: 2030 movs r0, #48 ; 0x30
  9364. 8003f40: 18e1 adds r1, r4, r3
  9365. 8003f42: f881 0043 strb.w r0, [r1, #67] ; 0x43
  9366. 8003f46: 1c5a adds r2, r3, #1
  9367. 8003f48: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
  9368. 8003f4c: 4422 add r2, r4
  9369. 8003f4e: 3302 adds r3, #2
  9370. 8003f50: f882 1043 strb.w r1, [r2, #67] ; 0x43
  9371. 8003f54: e7c3 b.n 8003ede <_printf_common+0x62>
  9372. 8003f56: 2301 movs r3, #1
  9373. 8003f58: 4622 mov r2, r4
  9374. 8003f5a: 4639 mov r1, r7
  9375. 8003f5c: 4630 mov r0, r6
  9376. 8003f5e: 47c0 blx r8
  9377. 8003f60: 3001 adds r0, #1
  9378. 8003f62: d0e6 beq.n 8003f32 <_printf_common+0xb6>
  9379. 8003f64: f109 0901 add.w r9, r9, #1
  9380. 8003f68: e7d7 b.n 8003f1a <_printf_common+0x9e>
  9381. ...
  9382. 08003f6c <_printf_i>:
  9383. 8003f6c: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
  9384. 8003f70: 4617 mov r7, r2
  9385. 8003f72: 7e0a ldrb r2, [r1, #24]
  9386. 8003f74: b085 sub sp, #20
  9387. 8003f76: 2a6e cmp r2, #110 ; 0x6e
  9388. 8003f78: 4698 mov r8, r3
  9389. 8003f7a: 4606 mov r6, r0
  9390. 8003f7c: 460c mov r4, r1
  9391. 8003f7e: 9b0c ldr r3, [sp, #48] ; 0x30
  9392. 8003f80: f101 0e43 add.w lr, r1, #67 ; 0x43
  9393. 8003f84: f000 80bc beq.w 8004100 <_printf_i+0x194>
  9394. 8003f88: d81a bhi.n 8003fc0 <_printf_i+0x54>
  9395. 8003f8a: 2a63 cmp r2, #99 ; 0x63
  9396. 8003f8c: d02e beq.n 8003fec <_printf_i+0x80>
  9397. 8003f8e: d80a bhi.n 8003fa6 <_printf_i+0x3a>
  9398. 8003f90: 2a00 cmp r2, #0
  9399. 8003f92: f000 80c8 beq.w 8004126 <_printf_i+0x1ba>
  9400. 8003f96: 2a58 cmp r2, #88 ; 0x58
  9401. 8003f98: f000 808a beq.w 80040b0 <_printf_i+0x144>
  9402. 8003f9c: f104 0542 add.w r5, r4, #66 ; 0x42
  9403. 8003fa0: f884 2042 strb.w r2, [r4, #66] ; 0x42
  9404. 8003fa4: e02a b.n 8003ffc <_printf_i+0x90>
  9405. 8003fa6: 2a64 cmp r2, #100 ; 0x64
  9406. 8003fa8: d001 beq.n 8003fae <_printf_i+0x42>
  9407. 8003faa: 2a69 cmp r2, #105 ; 0x69
  9408. 8003fac: d1f6 bne.n 8003f9c <_printf_i+0x30>
  9409. 8003fae: 6821 ldr r1, [r4, #0]
  9410. 8003fb0: 681a ldr r2, [r3, #0]
  9411. 8003fb2: f011 0f80 tst.w r1, #128 ; 0x80
  9412. 8003fb6: d023 beq.n 8004000 <_printf_i+0x94>
  9413. 8003fb8: 1d11 adds r1, r2, #4
  9414. 8003fba: 6019 str r1, [r3, #0]
  9415. 8003fbc: 6813 ldr r3, [r2, #0]
  9416. 8003fbe: e027 b.n 8004010 <_printf_i+0xa4>
  9417. 8003fc0: 2a73 cmp r2, #115 ; 0x73
  9418. 8003fc2: f000 80b4 beq.w 800412e <_printf_i+0x1c2>
  9419. 8003fc6: d808 bhi.n 8003fda <_printf_i+0x6e>
  9420. 8003fc8: 2a6f cmp r2, #111 ; 0x6f
  9421. 8003fca: d02a beq.n 8004022 <_printf_i+0xb6>
  9422. 8003fcc: 2a70 cmp r2, #112 ; 0x70
  9423. 8003fce: d1e5 bne.n 8003f9c <_printf_i+0x30>
  9424. 8003fd0: 680a ldr r2, [r1, #0]
  9425. 8003fd2: f042 0220 orr.w r2, r2, #32
  9426. 8003fd6: 600a str r2, [r1, #0]
  9427. 8003fd8: e003 b.n 8003fe2 <_printf_i+0x76>
  9428. 8003fda: 2a75 cmp r2, #117 ; 0x75
  9429. 8003fdc: d021 beq.n 8004022 <_printf_i+0xb6>
  9430. 8003fde: 2a78 cmp r2, #120 ; 0x78
  9431. 8003fe0: d1dc bne.n 8003f9c <_printf_i+0x30>
  9432. 8003fe2: 2278 movs r2, #120 ; 0x78
  9433. 8003fe4: 496f ldr r1, [pc, #444] ; (80041a4 <_printf_i+0x238>)
  9434. 8003fe6: f884 2045 strb.w r2, [r4, #69] ; 0x45
  9435. 8003fea: e064 b.n 80040b6 <_printf_i+0x14a>
  9436. 8003fec: 681a ldr r2, [r3, #0]
  9437. 8003fee: f101 0542 add.w r5, r1, #66 ; 0x42
  9438. 8003ff2: 1d11 adds r1, r2, #4
  9439. 8003ff4: 6019 str r1, [r3, #0]
  9440. 8003ff6: 6813 ldr r3, [r2, #0]
  9441. 8003ff8: f884 3042 strb.w r3, [r4, #66] ; 0x42
  9442. 8003ffc: 2301 movs r3, #1
  9443. 8003ffe: e0a3 b.n 8004148 <_printf_i+0x1dc>
  9444. 8004000: f011 0f40 tst.w r1, #64 ; 0x40
  9445. 8004004: f102 0104 add.w r1, r2, #4
  9446. 8004008: 6019 str r1, [r3, #0]
  9447. 800400a: d0d7 beq.n 8003fbc <_printf_i+0x50>
  9448. 800400c: f9b2 3000 ldrsh.w r3, [r2]
  9449. 8004010: 2b00 cmp r3, #0
  9450. 8004012: da03 bge.n 800401c <_printf_i+0xb0>
  9451. 8004014: 222d movs r2, #45 ; 0x2d
  9452. 8004016: 425b negs r3, r3
  9453. 8004018: f884 2043 strb.w r2, [r4, #67] ; 0x43
  9454. 800401c: 4962 ldr r1, [pc, #392] ; (80041a8 <_printf_i+0x23c>)
  9455. 800401e: 220a movs r2, #10
  9456. 8004020: e017 b.n 8004052 <_printf_i+0xe6>
  9457. 8004022: 6820 ldr r0, [r4, #0]
  9458. 8004024: 6819 ldr r1, [r3, #0]
  9459. 8004026: f010 0f80 tst.w r0, #128 ; 0x80
  9460. 800402a: d003 beq.n 8004034 <_printf_i+0xc8>
  9461. 800402c: 1d08 adds r0, r1, #4
  9462. 800402e: 6018 str r0, [r3, #0]
  9463. 8004030: 680b ldr r3, [r1, #0]
  9464. 8004032: e006 b.n 8004042 <_printf_i+0xd6>
  9465. 8004034: f010 0f40 tst.w r0, #64 ; 0x40
  9466. 8004038: f101 0004 add.w r0, r1, #4
  9467. 800403c: 6018 str r0, [r3, #0]
  9468. 800403e: d0f7 beq.n 8004030 <_printf_i+0xc4>
  9469. 8004040: 880b ldrh r3, [r1, #0]
  9470. 8004042: 2a6f cmp r2, #111 ; 0x6f
  9471. 8004044: bf14 ite ne
  9472. 8004046: 220a movne r2, #10
  9473. 8004048: 2208 moveq r2, #8
  9474. 800404a: 4957 ldr r1, [pc, #348] ; (80041a8 <_printf_i+0x23c>)
  9475. 800404c: 2000 movs r0, #0
  9476. 800404e: f884 0043 strb.w r0, [r4, #67] ; 0x43
  9477. 8004052: 6865 ldr r5, [r4, #4]
  9478. 8004054: 2d00 cmp r5, #0
  9479. 8004056: 60a5 str r5, [r4, #8]
  9480. 8004058: f2c0 809c blt.w 8004194 <_printf_i+0x228>
  9481. 800405c: 6820 ldr r0, [r4, #0]
  9482. 800405e: f020 0004 bic.w r0, r0, #4
  9483. 8004062: 6020 str r0, [r4, #0]
  9484. 8004064: 2b00 cmp r3, #0
  9485. 8004066: d13f bne.n 80040e8 <_printf_i+0x17c>
  9486. 8004068: 2d00 cmp r5, #0
  9487. 800406a: f040 8095 bne.w 8004198 <_printf_i+0x22c>
  9488. 800406e: 4675 mov r5, lr
  9489. 8004070: 2a08 cmp r2, #8
  9490. 8004072: d10b bne.n 800408c <_printf_i+0x120>
  9491. 8004074: 6823 ldr r3, [r4, #0]
  9492. 8004076: 07da lsls r2, r3, #31
  9493. 8004078: d508 bpl.n 800408c <_printf_i+0x120>
  9494. 800407a: 6923 ldr r3, [r4, #16]
  9495. 800407c: 6862 ldr r2, [r4, #4]
  9496. 800407e: 429a cmp r2, r3
  9497. 8004080: bfde ittt le
  9498. 8004082: 2330 movle r3, #48 ; 0x30
  9499. 8004084: f805 3c01 strble.w r3, [r5, #-1]
  9500. 8004088: f105 35ff addle.w r5, r5, #4294967295
  9501. 800408c: ebae 0305 sub.w r3, lr, r5
  9502. 8004090: 6123 str r3, [r4, #16]
  9503. 8004092: f8cd 8000 str.w r8, [sp]
  9504. 8004096: 463b mov r3, r7
  9505. 8004098: aa03 add r2, sp, #12
  9506. 800409a: 4621 mov r1, r4
  9507. 800409c: 4630 mov r0, r6
  9508. 800409e: f7ff feed bl 8003e7c <_printf_common>
  9509. 80040a2: 3001 adds r0, #1
  9510. 80040a4: d155 bne.n 8004152 <_printf_i+0x1e6>
  9511. 80040a6: f04f 30ff mov.w r0, #4294967295
  9512. 80040aa: b005 add sp, #20
  9513. 80040ac: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
  9514. 80040b0: f881 2045 strb.w r2, [r1, #69] ; 0x45
  9515. 80040b4: 493c ldr r1, [pc, #240] ; (80041a8 <_printf_i+0x23c>)
  9516. 80040b6: 6822 ldr r2, [r4, #0]
  9517. 80040b8: 6818 ldr r0, [r3, #0]
  9518. 80040ba: f012 0f80 tst.w r2, #128 ; 0x80
  9519. 80040be: f100 0504 add.w r5, r0, #4
  9520. 80040c2: 601d str r5, [r3, #0]
  9521. 80040c4: d001 beq.n 80040ca <_printf_i+0x15e>
  9522. 80040c6: 6803 ldr r3, [r0, #0]
  9523. 80040c8: e002 b.n 80040d0 <_printf_i+0x164>
  9524. 80040ca: 0655 lsls r5, r2, #25
  9525. 80040cc: d5fb bpl.n 80040c6 <_printf_i+0x15a>
  9526. 80040ce: 8803 ldrh r3, [r0, #0]
  9527. 80040d0: 07d0 lsls r0, r2, #31
  9528. 80040d2: bf44 itt mi
  9529. 80040d4: f042 0220 orrmi.w r2, r2, #32
  9530. 80040d8: 6022 strmi r2, [r4, #0]
  9531. 80040da: b91b cbnz r3, 80040e4 <_printf_i+0x178>
  9532. 80040dc: 6822 ldr r2, [r4, #0]
  9533. 80040de: f022 0220 bic.w r2, r2, #32
  9534. 80040e2: 6022 str r2, [r4, #0]
  9535. 80040e4: 2210 movs r2, #16
  9536. 80040e6: e7b1 b.n 800404c <_printf_i+0xe0>
  9537. 80040e8: 4675 mov r5, lr
  9538. 80040ea: fbb3 f0f2 udiv r0, r3, r2
  9539. 80040ee: fb02 3310 mls r3, r2, r0, r3
  9540. 80040f2: 5ccb ldrb r3, [r1, r3]
  9541. 80040f4: f805 3d01 strb.w r3, [r5, #-1]!
  9542. 80040f8: 4603 mov r3, r0
  9543. 80040fa: 2800 cmp r0, #0
  9544. 80040fc: d1f5 bne.n 80040ea <_printf_i+0x17e>
  9545. 80040fe: e7b7 b.n 8004070 <_printf_i+0x104>
  9546. 8004100: 6808 ldr r0, [r1, #0]
  9547. 8004102: 681a ldr r2, [r3, #0]
  9548. 8004104: f010 0f80 tst.w r0, #128 ; 0x80
  9549. 8004108: 6949 ldr r1, [r1, #20]
  9550. 800410a: d004 beq.n 8004116 <_printf_i+0x1aa>
  9551. 800410c: 1d10 adds r0, r2, #4
  9552. 800410e: 6018 str r0, [r3, #0]
  9553. 8004110: 6813 ldr r3, [r2, #0]
  9554. 8004112: 6019 str r1, [r3, #0]
  9555. 8004114: e007 b.n 8004126 <_printf_i+0x1ba>
  9556. 8004116: f010 0f40 tst.w r0, #64 ; 0x40
  9557. 800411a: f102 0004 add.w r0, r2, #4
  9558. 800411e: 6018 str r0, [r3, #0]
  9559. 8004120: 6813 ldr r3, [r2, #0]
  9560. 8004122: d0f6 beq.n 8004112 <_printf_i+0x1a6>
  9561. 8004124: 8019 strh r1, [r3, #0]
  9562. 8004126: 2300 movs r3, #0
  9563. 8004128: 4675 mov r5, lr
  9564. 800412a: 6123 str r3, [r4, #16]
  9565. 800412c: e7b1 b.n 8004092 <_printf_i+0x126>
  9566. 800412e: 681a ldr r2, [r3, #0]
  9567. 8004130: 1d11 adds r1, r2, #4
  9568. 8004132: 6019 str r1, [r3, #0]
  9569. 8004134: 6815 ldr r5, [r2, #0]
  9570. 8004136: 2100 movs r1, #0
  9571. 8004138: 6862 ldr r2, [r4, #4]
  9572. 800413a: 4628 mov r0, r5
  9573. 800413c: f000 f8e0 bl 8004300 <memchr>
  9574. 8004140: b108 cbz r0, 8004146 <_printf_i+0x1da>
  9575. 8004142: 1b40 subs r0, r0, r5
  9576. 8004144: 6060 str r0, [r4, #4]
  9577. 8004146: 6863 ldr r3, [r4, #4]
  9578. 8004148: 6123 str r3, [r4, #16]
  9579. 800414a: 2300 movs r3, #0
  9580. 800414c: f884 3043 strb.w r3, [r4, #67] ; 0x43
  9581. 8004150: e79f b.n 8004092 <_printf_i+0x126>
  9582. 8004152: 6923 ldr r3, [r4, #16]
  9583. 8004154: 462a mov r2, r5
  9584. 8004156: 4639 mov r1, r7
  9585. 8004158: 4630 mov r0, r6
  9586. 800415a: 47c0 blx r8
  9587. 800415c: 3001 adds r0, #1
  9588. 800415e: d0a2 beq.n 80040a6 <_printf_i+0x13a>
  9589. 8004160: 6823 ldr r3, [r4, #0]
  9590. 8004162: 079b lsls r3, r3, #30
  9591. 8004164: d507 bpl.n 8004176 <_printf_i+0x20a>
  9592. 8004166: 2500 movs r5, #0
  9593. 8004168: f104 0919 add.w r9, r4, #25
  9594. 800416c: 68e3 ldr r3, [r4, #12]
  9595. 800416e: 9a03 ldr r2, [sp, #12]
  9596. 8004170: 1a9b subs r3, r3, r2
  9597. 8004172: 429d cmp r5, r3
  9598. 8004174: db05 blt.n 8004182 <_printf_i+0x216>
  9599. 8004176: 68e0 ldr r0, [r4, #12]
  9600. 8004178: 9b03 ldr r3, [sp, #12]
  9601. 800417a: 4298 cmp r0, r3
  9602. 800417c: bfb8 it lt
  9603. 800417e: 4618 movlt r0, r3
  9604. 8004180: e793 b.n 80040aa <_printf_i+0x13e>
  9605. 8004182: 2301 movs r3, #1
  9606. 8004184: 464a mov r2, r9
  9607. 8004186: 4639 mov r1, r7
  9608. 8004188: 4630 mov r0, r6
  9609. 800418a: 47c0 blx r8
  9610. 800418c: 3001 adds r0, #1
  9611. 800418e: d08a beq.n 80040a6 <_printf_i+0x13a>
  9612. 8004190: 3501 adds r5, #1
  9613. 8004192: e7eb b.n 800416c <_printf_i+0x200>
  9614. 8004194: 2b00 cmp r3, #0
  9615. 8004196: d1a7 bne.n 80040e8 <_printf_i+0x17c>
  9616. 8004198: 780b ldrb r3, [r1, #0]
  9617. 800419a: f104 0542 add.w r5, r4, #66 ; 0x42
  9618. 800419e: f884 3042 strb.w r3, [r4, #66] ; 0x42
  9619. 80041a2: e765 b.n 8004070 <_printf_i+0x104>
  9620. 80041a4: 080045ca .word 0x080045ca
  9621. 80041a8: 080045b9 .word 0x080045b9
  9622. 080041ac <_sbrk_r>:
  9623. 80041ac: b538 push {r3, r4, r5, lr}
  9624. 80041ae: 2300 movs r3, #0
  9625. 80041b0: 4c05 ldr r4, [pc, #20] ; (80041c8 <_sbrk_r+0x1c>)
  9626. 80041b2: 4605 mov r5, r0
  9627. 80041b4: 4608 mov r0, r1
  9628. 80041b6: 6023 str r3, [r4, #0]
  9629. 80041b8: f000 f8ec bl 8004394 <_sbrk>
  9630. 80041bc: 1c43 adds r3, r0, #1
  9631. 80041be: d102 bne.n 80041c6 <_sbrk_r+0x1a>
  9632. 80041c0: 6823 ldr r3, [r4, #0]
  9633. 80041c2: b103 cbz r3, 80041c6 <_sbrk_r+0x1a>
  9634. 80041c4: 602b str r3, [r5, #0]
  9635. 80041c6: bd38 pop {r3, r4, r5, pc}
  9636. 80041c8: 200002cc .word 0x200002cc
  9637. 080041cc <__sread>:
  9638. 80041cc: b510 push {r4, lr}
  9639. 80041ce: 460c mov r4, r1
  9640. 80041d0: f9b1 100e ldrsh.w r1, [r1, #14]
  9641. 80041d4: f000 f8a4 bl 8004320 <_read_r>
  9642. 80041d8: 2800 cmp r0, #0
  9643. 80041da: bfab itete ge
  9644. 80041dc: 6d63 ldrge r3, [r4, #84] ; 0x54
  9645. 80041de: 89a3 ldrhlt r3, [r4, #12]
  9646. 80041e0: 181b addge r3, r3, r0
  9647. 80041e2: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
  9648. 80041e6: bfac ite ge
  9649. 80041e8: 6563 strge r3, [r4, #84] ; 0x54
  9650. 80041ea: 81a3 strhlt r3, [r4, #12]
  9651. 80041ec: bd10 pop {r4, pc}
  9652. 080041ee <__swrite>:
  9653. 80041ee: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
  9654. 80041f2: 461f mov r7, r3
  9655. 80041f4: 898b ldrh r3, [r1, #12]
  9656. 80041f6: 4605 mov r5, r0
  9657. 80041f8: 05db lsls r3, r3, #23
  9658. 80041fa: 460c mov r4, r1
  9659. 80041fc: 4616 mov r6, r2
  9660. 80041fe: d505 bpl.n 800420c <__swrite+0x1e>
  9661. 8004200: 2302 movs r3, #2
  9662. 8004202: 2200 movs r2, #0
  9663. 8004204: f9b1 100e ldrsh.w r1, [r1, #14]
  9664. 8004208: f000 f868 bl 80042dc <_lseek_r>
  9665. 800420c: 89a3 ldrh r3, [r4, #12]
  9666. 800420e: 4632 mov r2, r6
  9667. 8004210: f423 5380 bic.w r3, r3, #4096 ; 0x1000
  9668. 8004214: 81a3 strh r3, [r4, #12]
  9669. 8004216: f9b4 100e ldrsh.w r1, [r4, #14]
  9670. 800421a: 463b mov r3, r7
  9671. 800421c: 4628 mov r0, r5
  9672. 800421e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
  9673. 8004222: f000 b817 b.w 8004254 <_write_r>
  9674. 08004226 <__sseek>:
  9675. 8004226: b510 push {r4, lr}
  9676. 8004228: 460c mov r4, r1
  9677. 800422a: f9b1 100e ldrsh.w r1, [r1, #14]
  9678. 800422e: f000 f855 bl 80042dc <_lseek_r>
  9679. 8004232: 1c43 adds r3, r0, #1
  9680. 8004234: 89a3 ldrh r3, [r4, #12]
  9681. 8004236: bf15 itete ne
  9682. 8004238: 6560 strne r0, [r4, #84] ; 0x54
  9683. 800423a: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
  9684. 800423e: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
  9685. 8004242: 81a3 strheq r3, [r4, #12]
  9686. 8004244: bf18 it ne
  9687. 8004246: 81a3 strhne r3, [r4, #12]
  9688. 8004248: bd10 pop {r4, pc}
  9689. 0800424a <__sclose>:
  9690. 800424a: f9b1 100e ldrsh.w r1, [r1, #14]
  9691. 800424e: f000 b813 b.w 8004278 <_close_r>
  9692. ...
  9693. 08004254 <_write_r>:
  9694. 8004254: b538 push {r3, r4, r5, lr}
  9695. 8004256: 4605 mov r5, r0
  9696. 8004258: 4608 mov r0, r1
  9697. 800425a: 4611 mov r1, r2
  9698. 800425c: 2200 movs r2, #0
  9699. 800425e: 4c05 ldr r4, [pc, #20] ; (8004274 <_write_r+0x20>)
  9700. 8004260: 6022 str r2, [r4, #0]
  9701. 8004262: 461a mov r2, r3
  9702. 8004264: f7fe fc90 bl 8002b88 <_write>
  9703. 8004268: 1c43 adds r3, r0, #1
  9704. 800426a: d102 bne.n 8004272 <_write_r+0x1e>
  9705. 800426c: 6823 ldr r3, [r4, #0]
  9706. 800426e: b103 cbz r3, 8004272 <_write_r+0x1e>
  9707. 8004270: 602b str r3, [r5, #0]
  9708. 8004272: bd38 pop {r3, r4, r5, pc}
  9709. 8004274: 200002cc .word 0x200002cc
  9710. 08004278 <_close_r>:
  9711. 8004278: b538 push {r3, r4, r5, lr}
  9712. 800427a: 2300 movs r3, #0
  9713. 800427c: 4c05 ldr r4, [pc, #20] ; (8004294 <_close_r+0x1c>)
  9714. 800427e: 4605 mov r5, r0
  9715. 8004280: 4608 mov r0, r1
  9716. 8004282: 6023 str r3, [r4, #0]
  9717. 8004284: f000 f85e bl 8004344 <_close>
  9718. 8004288: 1c43 adds r3, r0, #1
  9719. 800428a: d102 bne.n 8004292 <_close_r+0x1a>
  9720. 800428c: 6823 ldr r3, [r4, #0]
  9721. 800428e: b103 cbz r3, 8004292 <_close_r+0x1a>
  9722. 8004290: 602b str r3, [r5, #0]
  9723. 8004292: bd38 pop {r3, r4, r5, pc}
  9724. 8004294: 200002cc .word 0x200002cc
  9725. 08004298 <_fstat_r>:
  9726. 8004298: b538 push {r3, r4, r5, lr}
  9727. 800429a: 2300 movs r3, #0
  9728. 800429c: 4c06 ldr r4, [pc, #24] ; (80042b8 <_fstat_r+0x20>)
  9729. 800429e: 4605 mov r5, r0
  9730. 80042a0: 4608 mov r0, r1
  9731. 80042a2: 4611 mov r1, r2
  9732. 80042a4: 6023 str r3, [r4, #0]
  9733. 80042a6: f000 f855 bl 8004354 <_fstat>
  9734. 80042aa: 1c43 adds r3, r0, #1
  9735. 80042ac: d102 bne.n 80042b4 <_fstat_r+0x1c>
  9736. 80042ae: 6823 ldr r3, [r4, #0]
  9737. 80042b0: b103 cbz r3, 80042b4 <_fstat_r+0x1c>
  9738. 80042b2: 602b str r3, [r5, #0]
  9739. 80042b4: bd38 pop {r3, r4, r5, pc}
  9740. 80042b6: bf00 nop
  9741. 80042b8: 200002cc .word 0x200002cc
  9742. 080042bc <_isatty_r>:
  9743. 80042bc: b538 push {r3, r4, r5, lr}
  9744. 80042be: 2300 movs r3, #0
  9745. 80042c0: 4c05 ldr r4, [pc, #20] ; (80042d8 <_isatty_r+0x1c>)
  9746. 80042c2: 4605 mov r5, r0
  9747. 80042c4: 4608 mov r0, r1
  9748. 80042c6: 6023 str r3, [r4, #0]
  9749. 80042c8: f000 f84c bl 8004364 <_isatty>
  9750. 80042cc: 1c43 adds r3, r0, #1
  9751. 80042ce: d102 bne.n 80042d6 <_isatty_r+0x1a>
  9752. 80042d0: 6823 ldr r3, [r4, #0]
  9753. 80042d2: b103 cbz r3, 80042d6 <_isatty_r+0x1a>
  9754. 80042d4: 602b str r3, [r5, #0]
  9755. 80042d6: bd38 pop {r3, r4, r5, pc}
  9756. 80042d8: 200002cc .word 0x200002cc
  9757. 080042dc <_lseek_r>:
  9758. 80042dc: b538 push {r3, r4, r5, lr}
  9759. 80042de: 4605 mov r5, r0
  9760. 80042e0: 4608 mov r0, r1
  9761. 80042e2: 4611 mov r1, r2
  9762. 80042e4: 2200 movs r2, #0
  9763. 80042e6: 4c05 ldr r4, [pc, #20] ; (80042fc <_lseek_r+0x20>)
  9764. 80042e8: 6022 str r2, [r4, #0]
  9765. 80042ea: 461a mov r2, r3
  9766. 80042ec: f000 f842 bl 8004374 <_lseek>
  9767. 80042f0: 1c43 adds r3, r0, #1
  9768. 80042f2: d102 bne.n 80042fa <_lseek_r+0x1e>
  9769. 80042f4: 6823 ldr r3, [r4, #0]
  9770. 80042f6: b103 cbz r3, 80042fa <_lseek_r+0x1e>
  9771. 80042f8: 602b str r3, [r5, #0]
  9772. 80042fa: bd38 pop {r3, r4, r5, pc}
  9773. 80042fc: 200002cc .word 0x200002cc
  9774. 08004300 <memchr>:
  9775. 8004300: b510 push {r4, lr}
  9776. 8004302: b2c9 uxtb r1, r1
  9777. 8004304: 4402 add r2, r0
  9778. 8004306: 4290 cmp r0, r2
  9779. 8004308: 4603 mov r3, r0
  9780. 800430a: d101 bne.n 8004310 <memchr+0x10>
  9781. 800430c: 2000 movs r0, #0
  9782. 800430e: bd10 pop {r4, pc}
  9783. 8004310: 781c ldrb r4, [r3, #0]
  9784. 8004312: 3001 adds r0, #1
  9785. 8004314: 428c cmp r4, r1
  9786. 8004316: d1f6 bne.n 8004306 <memchr+0x6>
  9787. 8004318: 4618 mov r0, r3
  9788. 800431a: bd10 pop {r4, pc}
  9789. 0800431c <__malloc_lock>:
  9790. 800431c: 4770 bx lr
  9791. 0800431e <__malloc_unlock>:
  9792. 800431e: 4770 bx lr
  9793. 08004320 <_read_r>:
  9794. 8004320: b538 push {r3, r4, r5, lr}
  9795. 8004322: 4605 mov r5, r0
  9796. 8004324: 4608 mov r0, r1
  9797. 8004326: 4611 mov r1, r2
  9798. 8004328: 2200 movs r2, #0
  9799. 800432a: 4c05 ldr r4, [pc, #20] ; (8004340 <_read_r+0x20>)
  9800. 800432c: 6022 str r2, [r4, #0]
  9801. 800432e: 461a mov r2, r3
  9802. 8004330: f000 f828 bl 8004384 <_read>
  9803. 8004334: 1c43 adds r3, r0, #1
  9804. 8004336: d102 bne.n 800433e <_read_r+0x1e>
  9805. 8004338: 6823 ldr r3, [r4, #0]
  9806. 800433a: b103 cbz r3, 800433e <_read_r+0x1e>
  9807. 800433c: 602b str r3, [r5, #0]
  9808. 800433e: bd38 pop {r3, r4, r5, pc}
  9809. 8004340: 200002cc .word 0x200002cc
  9810. 08004344 <_close>:
  9811. 8004344: 2258 movs r2, #88 ; 0x58
  9812. 8004346: 4b02 ldr r3, [pc, #8] ; (8004350 <_close+0xc>)
  9813. 8004348: f04f 30ff mov.w r0, #4294967295
  9814. 800434c: 601a str r2, [r3, #0]
  9815. 800434e: 4770 bx lr
  9816. 8004350: 200002cc .word 0x200002cc
  9817. 08004354 <_fstat>:
  9818. 8004354: 2258 movs r2, #88 ; 0x58
  9819. 8004356: 4b02 ldr r3, [pc, #8] ; (8004360 <_fstat+0xc>)
  9820. 8004358: f04f 30ff mov.w r0, #4294967295
  9821. 800435c: 601a str r2, [r3, #0]
  9822. 800435e: 4770 bx lr
  9823. 8004360: 200002cc .word 0x200002cc
  9824. 08004364 <_isatty>:
  9825. 8004364: 2258 movs r2, #88 ; 0x58
  9826. 8004366: 4b02 ldr r3, [pc, #8] ; (8004370 <_isatty+0xc>)
  9827. 8004368: 2000 movs r0, #0
  9828. 800436a: 601a str r2, [r3, #0]
  9829. 800436c: 4770 bx lr
  9830. 800436e: bf00 nop
  9831. 8004370: 200002cc .word 0x200002cc
  9832. 08004374 <_lseek>:
  9833. 8004374: 2258 movs r2, #88 ; 0x58
  9834. 8004376: 4b02 ldr r3, [pc, #8] ; (8004380 <_lseek+0xc>)
  9835. 8004378: f04f 30ff mov.w r0, #4294967295
  9836. 800437c: 601a str r2, [r3, #0]
  9837. 800437e: 4770 bx lr
  9838. 8004380: 200002cc .word 0x200002cc
  9839. 08004384 <_read>:
  9840. 8004384: 2258 movs r2, #88 ; 0x58
  9841. 8004386: 4b02 ldr r3, [pc, #8] ; (8004390 <_read+0xc>)
  9842. 8004388: f04f 30ff mov.w r0, #4294967295
  9843. 800438c: 601a str r2, [r3, #0]
  9844. 800438e: 4770 bx lr
  9845. 8004390: 200002cc .word 0x200002cc
  9846. 08004394 <_sbrk>:
  9847. 8004394: 4b04 ldr r3, [pc, #16] ; (80043a8 <_sbrk+0x14>)
  9848. 8004396: 4602 mov r2, r0
  9849. 8004398: 6819 ldr r1, [r3, #0]
  9850. 800439a: b909 cbnz r1, 80043a0 <_sbrk+0xc>
  9851. 800439c: 4903 ldr r1, [pc, #12] ; (80043ac <_sbrk+0x18>)
  9852. 800439e: 6019 str r1, [r3, #0]
  9853. 80043a0: 6818 ldr r0, [r3, #0]
  9854. 80043a2: 4402 add r2, r0
  9855. 80043a4: 601a str r2, [r3, #0]
  9856. 80043a6: 4770 bx lr
  9857. 80043a8: 20000140 .word 0x20000140
  9858. 80043ac: 200002d0 .word 0x200002d0
  9859. 080043b0 <_init>:
  9860. 80043b0: b5f8 push {r3, r4, r5, r6, r7, lr}
  9861. 80043b2: bf00 nop
  9862. 80043b4: bcf8 pop {r3, r4, r5, r6, r7}
  9863. 80043b6: bc08 pop {r3}
  9864. 80043b8: 469e mov lr, r3
  9865. 80043ba: 4770 bx lr
  9866. 080043bc <_fini>:
  9867. 80043bc: b5f8 push {r3, r4, r5, r6, r7, lr}
  9868. 80043be: bf00 nop
  9869. 80043c0: bcf8 pop {r3, r4, r5, r6, r7}
  9870. 80043c2: bc08 pop {r3}
  9871. 80043c4: 469e mov lr, r3
  9872. 80043c6: 4770 bx lr