STM32F100_RGB_Sensor.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001d0 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 000041f8 080001d0 080001d0 000101d0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000214 080043c8 080043c8 000143c8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init_array 00000004 080045dc 080045dc 000145dc 2**2 CONTENTS, ALLOC, LOAD, DATA 4 .fini_array 00000004 080045e0 080045e0 000145e0 2**2 CONTENTS, ALLOC, LOAD, DATA 5 .data 00000070 20000000 080045e4 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 6 .bss 00000260 20000070 08004654 00020070 2**2 ALLOC 7 ._user_heap_stack 00000600 200002d0 08004654 000202d0 2**0 ALLOC 8 .ARM.attributes 00000029 00000000 00000000 00020070 2**0 CONTENTS, READONLY 9 .debug_info 0001bdb6 00000000 00000000 00020099 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_abbrev 00003581 00000000 00000000 0003be4f 2**0 CONTENTS, READONLY, DEBUGGING 11 .debug_loc 0000add8 00000000 00000000 0003f3d0 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_aranges 00000c60 00000000 00000000 0004a1a8 2**3 CONTENTS, READONLY, DEBUGGING 13 .debug_ranges 000012d8 00000000 00000000 0004ae08 2**3 CONTENTS, READONLY, DEBUGGING 14 .debug_line 00008499 00000000 00000000 0004c0e0 2**0 CONTENTS, READONLY, DEBUGGING 15 .debug_str 00004c24 00000000 00000000 00054579 2**0 CONTENTS, READONLY, DEBUGGING 16 .comment 0000007c 00000000 00000000 0005919d 2**0 CONTENTS, READONLY 17 .debug_frame 00002e30 00000000 00000000 0005921c 2**2 CONTENTS, READONLY, DEBUGGING 18 .stab 00000084 00000000 00000000 0005c04c 2**2 CONTENTS, READONLY, DEBUGGING 19 .stabstr 00000117 00000000 00000000 0005c0d0 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 080001d0 <__do_global_dtors_aux>: 80001d0: b510 push {r4, lr} 80001d2: 4c05 ldr r4, [pc, #20] ; (80001e8 <__do_global_dtors_aux+0x18>) 80001d4: 7823 ldrb r3, [r4, #0] 80001d6: b933 cbnz r3, 80001e6 <__do_global_dtors_aux+0x16> 80001d8: 4b04 ldr r3, [pc, #16] ; (80001ec <__do_global_dtors_aux+0x1c>) 80001da: b113 cbz r3, 80001e2 <__do_global_dtors_aux+0x12> 80001dc: 4804 ldr r0, [pc, #16] ; (80001f0 <__do_global_dtors_aux+0x20>) 80001de: f3af 8000 nop.w 80001e2: 2301 movs r3, #1 80001e4: 7023 strb r3, [r4, #0] 80001e6: bd10 pop {r4, pc} 80001e8: 20000070 .word 0x20000070 80001ec: 00000000 .word 0x00000000 80001f0: 080043b0 .word 0x080043b0 080001f4 : 80001f4: b508 push {r3, lr} 80001f6: 4b03 ldr r3, [pc, #12] ; (8000204 ) 80001f8: b11b cbz r3, 8000202 80001fa: 4903 ldr r1, [pc, #12] ; (8000208 ) 80001fc: 4803 ldr r0, [pc, #12] ; (800020c ) 80001fe: f3af 8000 nop.w 8000202: bd08 pop {r3, pc} 8000204: 00000000 .word 0x00000000 8000208: 20000074 .word 0x20000074 800020c: 080043b0 .word 0x080043b0 08000210 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8000210: b538 push {r3, r4, r5, lr} /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000212: 4b0e ldr r3, [pc, #56] ; (800024c ) { 8000214: 4605 mov r5, r0 if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8000216: 7818 ldrb r0, [r3, #0] 8000218: f44f 737a mov.w r3, #1000 ; 0x3e8 800021c: fbb3 f3f0 udiv r3, r3, r0 8000220: 4a0b ldr r2, [pc, #44] ; (8000250 ) 8000222: 6810 ldr r0, [r2, #0] 8000224: fbb0 f0f3 udiv r0, r0, r3 8000228: f000 f9be bl 80005a8 800022c: 4604 mov r4, r0 800022e: b958 cbnz r0, 8000248 { return HAL_ERROR; } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8000230: 2d0f cmp r5, #15 8000232: d809 bhi.n 8000248 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8000234: 4602 mov r2, r0 8000236: 4629 mov r1, r5 8000238: f04f 30ff mov.w r0, #4294967295 800023c: f000 f974 bl 8000528 uwTickPrio = TickPriority; 8000240: 4b04 ldr r3, [pc, #16] ; (8000254 ) 8000242: 4620 mov r0, r4 8000244: 601d str r5, [r3, #0] 8000246: bd38 pop {r3, r4, r5, pc} return HAL_ERROR; 8000248: 2001 movs r0, #1 return HAL_ERROR; } /* Return function status */ return HAL_OK; } 800024a: bd38 pop {r3, r4, r5, pc} 800024c: 20000000 .word 0x20000000 8000250: 20000008 .word 0x20000008 8000254: 20000004 .word 0x20000004 08000258 : { 8000258: b508 push {r3, lr} HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800025a: 2003 movs r0, #3 800025c: f000 f952 bl 8000504 HAL_InitTick(TICK_INT_PRIORITY); 8000260: 2000 movs r0, #0 8000262: f7ff ffd5 bl 8000210 HAL_MspInit(); 8000266: f002 feab bl 8002fc0 } 800026a: 2000 movs r0, #0 800026c: bd08 pop {r3, pc} ... 08000270 : * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { uwTick += uwTickFreq; 8000270: 4a03 ldr r2, [pc, #12] ; (8000280 ) 8000272: 4b04 ldr r3, [pc, #16] ; (8000284 ) 8000274: 6811 ldr r1, [r2, #0] 8000276: 781b ldrb r3, [r3, #0] 8000278: 440b add r3, r1 800027a: 6013 str r3, [r2, #0] 800027c: 4770 bx lr 800027e: bf00 nop 8000280: 20000144 .word 0x20000144 8000284: 20000000 .word 0x20000000 08000288 : * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { return uwTick; 8000288: 4b01 ldr r3, [pc, #4] ; (8000290 ) 800028a: 6818 ldr r0, [r3, #0] } 800028c: 4770 bx lr 800028e: bf00 nop 8000290: 20000144 .word 0x20000144 08000294 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8000294: b538 push {r3, r4, r5, lr} 8000296: 4604 mov r4, r0 uint32_t tickstart = HAL_GetTick(); 8000298: f7ff fff6 bl 8000288 800029c: 4605 mov r5, r0 uint32_t wait = Delay; /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800029e: 1c63 adds r3, r4, #1 { wait += (uint32_t)(uwTickFreq); 80002a0: bf1e ittt ne 80002a2: 4b04 ldrne r3, [pc, #16] ; (80002b4 ) 80002a4: 781b ldrbne r3, [r3, #0] 80002a6: 18e4 addne r4, r4, r3 } while ((HAL_GetTick() - tickstart) < wait) 80002a8: f7ff ffee bl 8000288 80002ac: 1b40 subs r0, r0, r5 80002ae: 4284 cmp r4, r0 80002b0: d8fa bhi.n 80002a8 { } } 80002b2: bd38 pop {r3, r4, r5, pc} 80002b4: 20000000 .word 0x20000000 080002b8 : * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { HAL_StatusTypeDef tmp_hal_status = HAL_OK; __IO uint32_t wait_loop_index = 0U; 80002b8: 2300 movs r3, #0 { 80002ba: b573 push {r0, r1, r4, r5, r6, lr} __IO uint32_t wait_loop_index = 0U; 80002bc: 9301 str r3, [sp, #4] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 80002be: f890 3024 ldrb.w r3, [r0, #36] ; 0x24 80002c2: 2b01 cmp r3, #1 80002c4: d074 beq.n 80003b0 80002c6: 2301 movs r3, #1 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 80002c8: 684d ldr r5, [r1, #4] __HAL_LOCK(hadc); 80002ca: f880 3024 strb.w r3, [r0, #36] ; 0x24 if (sConfig->Rank < 7U) 80002ce: 2d06 cmp r5, #6 80002d0: 6802 ldr r2, [r0, #0] 80002d2: ea4f 0385 mov.w r3, r5, lsl #2 80002d6: 680c ldr r4, [r1, #0] 80002d8: d825 bhi.n 8000326 { MODIFY_REG(hadc->Instance->SQR3 , 80002da: 442b add r3, r5 80002dc: 251f movs r5, #31 80002de: 6b56 ldr r6, [r2, #52] ; 0x34 80002e0: 3b05 subs r3, #5 80002e2: 409d lsls r5, r3 80002e4: ea26 0505 bic.w r5, r6, r5 80002e8: fa04 f303 lsl.w r3, r4, r3 80002ec: 432b orrs r3, r5 80002ee: 6353 str r3, [r2, #52] ; 0x34 } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 80002f0: 2c09 cmp r4, #9 80002f2: ea4f 0344 mov.w r3, r4, lsl #1 80002f6: 688d ldr r5, [r1, #8] 80002f8: d92f bls.n 800035a { MODIFY_REG(hadc->Instance->SMPR1 , 80002fa: 2607 movs r6, #7 80002fc: 4423 add r3, r4 80002fe: 68d1 ldr r1, [r2, #12] 8000300: 3b1e subs r3, #30 8000302: 409e lsls r6, r3 8000304: ea21 0106 bic.w r1, r1, r6 8000308: fa05 f303 lsl.w r3, r5, r3 800030c: 430b orrs r3, r1 800030e: 60d3 str r3, [r2, #12] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8000310: f1a4 0310 sub.w r3, r4, #16 8000314: 2b01 cmp r3, #1 8000316: d92b bls.n 8000370 HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8000318: 2300 movs r3, #0 tmp_hal_status = HAL_ERROR; } } /* Process unlocked */ __HAL_UNLOCK(hadc); 800031a: 2200 movs r2, #0 800031c: f880 2024 strb.w r2, [r0, #36] ; 0x24 /* Return function status */ return tmp_hal_status; } 8000320: 4618 mov r0, r3 8000322: b002 add sp, #8 8000324: bd70 pop {r4, r5, r6, pc} else if (sConfig->Rank < 13U) 8000326: 2d0c cmp r5, #12 8000328: d80b bhi.n 8000342 MODIFY_REG(hadc->Instance->SQR2 , 800032a: 442b add r3, r5 800032c: 251f movs r5, #31 800032e: 6b16 ldr r6, [r2, #48] ; 0x30 8000330: 3b23 subs r3, #35 ; 0x23 8000332: 409d lsls r5, r3 8000334: ea26 0505 bic.w r5, r6, r5 8000338: fa04 f303 lsl.w r3, r4, r3 800033c: 432b orrs r3, r5 800033e: 6313 str r3, [r2, #48] ; 0x30 8000340: e7d6 b.n 80002f0 MODIFY_REG(hadc->Instance->SQR1 , 8000342: 442b add r3, r5 8000344: 251f movs r5, #31 8000346: 6ad6 ldr r6, [r2, #44] ; 0x2c 8000348: 3b41 subs r3, #65 ; 0x41 800034a: 409d lsls r5, r3 800034c: ea26 0505 bic.w r5, r6, r5 8000350: fa04 f303 lsl.w r3, r4, r3 8000354: 432b orrs r3, r5 8000356: 62d3 str r3, [r2, #44] ; 0x2c 8000358: e7ca b.n 80002f0 MODIFY_REG(hadc->Instance->SMPR2 , 800035a: 2607 movs r6, #7 800035c: 6911 ldr r1, [r2, #16] 800035e: 4423 add r3, r4 8000360: 409e lsls r6, r3 8000362: ea21 0106 bic.w r1, r1, r6 8000366: fa05 f303 lsl.w r3, r5, r3 800036a: 430b orrs r3, r1 800036c: 6113 str r3, [r2, #16] 800036e: e7cf b.n 8000310 if (hadc->Instance == ADC1) 8000370: 4b10 ldr r3, [pc, #64] ; (80003b4 ) 8000372: 429a cmp r2, r3 8000374: d116 bne.n 80003a4 if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 8000376: 6893 ldr r3, [r2, #8] 8000378: 021b lsls r3, r3, #8 800037a: d4cd bmi.n 8000318 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800037c: 6893 ldr r3, [r2, #8] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) 800037e: 2c10 cmp r4, #16 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8000380: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 8000384: 6093 str r3, [r2, #8] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) 8000386: d1c7 bne.n 8000318 wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8000388: 4b0b ldr r3, [pc, #44] ; (80003b8 ) 800038a: 4a0c ldr r2, [pc, #48] ; (80003bc ) 800038c: 681b ldr r3, [r3, #0] 800038e: fbb3 f2f2 udiv r2, r3, r2 8000392: 230a movs r3, #10 8000394: 4353 muls r3, r2 wait_loop_index--; 8000396: 9301 str r3, [sp, #4] while(wait_loop_index != 0U) 8000398: 9b01 ldr r3, [sp, #4] 800039a: 2b00 cmp r3, #0 800039c: d0bc beq.n 8000318 wait_loop_index--; 800039e: 9b01 ldr r3, [sp, #4] 80003a0: 3b01 subs r3, #1 80003a2: e7f8 b.n 8000396 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 80003a4: 6a83 ldr r3, [r0, #40] ; 0x28 80003a6: f043 0320 orr.w r3, r3, #32 80003aa: 6283 str r3, [r0, #40] ; 0x28 tmp_hal_status = HAL_ERROR; 80003ac: 2301 movs r3, #1 80003ae: e7b4 b.n 800031a __HAL_LOCK(hadc); 80003b0: 2302 movs r3, #2 80003b2: e7b5 b.n 8000320 80003b4: 40012400 .word 0x40012400 80003b8: 20000008 .word 0x20000008 80003bc: 000f4240 .word 0x000f4240 080003c0 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 80003c0: b538 push {r3, r4, r5, lr} uint32_t tickstart = 0U; /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 80003c2: 6803 ldr r3, [r0, #0] { 80003c4: 4604 mov r4, r0 if (ADC_IS_ENABLE(hadc) != RESET) 80003c6: 689a ldr r2, [r3, #8] 80003c8: 07d2 lsls r2, r2, #31 80003ca: d401 bmi.n 80003d0 } } } /* Return HAL status */ return HAL_OK; 80003cc: 2000 movs r0, #0 80003ce: bd38 pop {r3, r4, r5, pc} __HAL_ADC_DISABLE(hadc); 80003d0: 689a ldr r2, [r3, #8] 80003d2: f022 0201 bic.w r2, r2, #1 80003d6: 609a str r2, [r3, #8] tickstart = HAL_GetTick(); 80003d8: f7ff ff56 bl 8000288 80003dc: 4605 mov r5, r0 while(ADC_IS_ENABLE(hadc) != RESET) 80003de: 6823 ldr r3, [r4, #0] 80003e0: 689b ldr r3, [r3, #8] 80003e2: 07db lsls r3, r3, #31 80003e4: d5f2 bpl.n 80003cc if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 80003e6: f7ff ff4f bl 8000288 80003ea: 1b40 subs r0, r0, r5 80003ec: 2802 cmp r0, #2 80003ee: d9f6 bls.n 80003de SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80003f0: 6aa3 ldr r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80003f2: 2001 movs r0, #1 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80003f4: f043 0310 orr.w r3, r3, #16 80003f8: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80003fa: 6ae3 ldr r3, [r4, #44] ; 0x2c 80003fc: f043 0301 orr.w r3, r3, #1 8000400: 62e3 str r3, [r4, #44] ; 0x2c 8000402: bd38 pop {r3, r4, r5, pc} 08000404 : { 8000404: b570 push {r4, r5, r6, lr} if(hadc == NULL) 8000406: 4604 mov r4, r0 8000408: 2800 cmp r0, #0 800040a: d071 beq.n 80004f0 if (hadc->State == HAL_ADC_STATE_RESET) 800040c: 6a83 ldr r3, [r0, #40] ; 0x28 800040e: b923 cbnz r3, 800041a ADC_CLEAR_ERRORCODE(hadc); 8000410: 62c3 str r3, [r0, #44] ; 0x2c hadc->Lock = HAL_UNLOCKED; 8000412: f880 3024 strb.w r3, [r0, #36] ; 0x24 HAL_ADC_MspInit(hadc); 8000416: f002 fdf5 bl 8003004 tmp_hal_status = ADC_ConversionStop_Disable(hadc); 800041a: 4620 mov r0, r4 800041c: f7ff ffd0 bl 80003c0 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8000420: 6aa3 ldr r3, [r4, #40] ; 0x28 8000422: f013 0f10 tst.w r3, #16 ADC_STATE_CLR_SET(hadc->State, 8000426: 6aa3 ldr r3, [r4, #40] ; 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8000428: d164 bne.n 80004f4 800042a: 2800 cmp r0, #0 800042c: d162 bne.n 80004f4 tmp_cr2 |= (hadc->Init.DataAlign | 800042e: 69e1 ldr r1, [r4, #28] ADC_STATE_CLR_SET(hadc->State, 8000430: f423 5388 bic.w r3, r3, #4352 ; 0x1100 tmp_cr2 |= (hadc->Init.DataAlign | 8000434: 6862 ldr r2, [r4, #4] ADC_STATE_CLR_SET(hadc->State, 8000436: f023 0302 bic.w r3, r3, #2 800043a: f043 0302 orr.w r3, r3, #2 tmp_cr2 |= (hadc->Init.DataAlign | 800043e: 430a orrs r2, r1 tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8000440: 68a1 ldr r1, [r4, #8] ADC_STATE_CLR_SET(hadc->State, 8000442: 62a3 str r3, [r4, #40] ; 0x28 ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) ); 8000444: 68e3 ldr r3, [r4, #12] tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8000446: f5b1 7f80 cmp.w r1, #256 ; 0x100 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800044a: ea42 0243 orr.w r2, r2, r3, lsl #1 tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 800044e: d038 beq.n 80004c2 8000450: 2901 cmp r1, #1 8000452: bf14 ite ne 8000454: 4606 movne r6, r0 8000456: f44f 7680 moveq.w r6, #256 ; 0x100 if (hadc->Init.DiscontinuousConvMode == ENABLE) 800045a: 6965 ldr r5, [r4, #20] 800045c: 2d01 cmp r5, #1 800045e: d107 bne.n 8000470 if (hadc->Init.ContinuousConvMode == DISABLE) 8000460: 2b00 cmp r3, #0 8000462: d130 bne.n 80004c6 SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 8000464: 69a3 ldr r3, [r4, #24] 8000466: 3b01 subs r3, #1 8000468: ea46 3543 orr.w r5, r6, r3, lsl #13 800046c: f445 6600 orr.w r6, r5, #2048 ; 0x800 MODIFY_REG(hadc->Instance->CR1, 8000470: 6823 ldr r3, [r4, #0] if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8000472: f5b1 7f80 cmp.w r1, #256 ; 0x100 MODIFY_REG(hadc->Instance->CR1, 8000476: 685d ldr r5, [r3, #4] 8000478: f425 4569 bic.w r5, r5, #59648 ; 0xe900 800047c: ea45 0506 orr.w r5, r5, r6 8000480: 605d str r5, [r3, #4] MODIFY_REG(hadc->Instance->CR2, 8000482: 689e ldr r6, [r3, #8] 8000484: 4d1d ldr r5, [pc, #116] ; (80004fc ) 8000486: ea05 0506 and.w r5, r5, r6 800048a: ea45 0502 orr.w r5, r5, r2 800048e: 609d str r5, [r3, #8] if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8000490: d001 beq.n 8000496 8000492: 2901 cmp r1, #1 8000494: d120 bne.n 80004d8 tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 8000496: 6921 ldr r1, [r4, #16] 8000498: 3901 subs r1, #1 800049a: 0509 lsls r1, r1, #20 MODIFY_REG(hadc->Instance->SQR1, 800049c: 6add ldr r5, [r3, #44] ; 0x2c 800049e: f425 0570 bic.w r5, r5, #15728640 ; 0xf00000 80004a2: 4329 orrs r1, r5 80004a4: 62d9 str r1, [r3, #44] ; 0x2c if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80004a6: 6899 ldr r1, [r3, #8] 80004a8: 4b15 ldr r3, [pc, #84] ; (8000500 ) 80004aa: 400b ands r3, r1 80004ac: 429a cmp r2, r3 80004ae: d115 bne.n 80004dc ADC_CLEAR_ERRORCODE(hadc); 80004b0: 2300 movs r3, #0 80004b2: 62e3 str r3, [r4, #44] ; 0x2c ADC_STATE_CLR_SET(hadc->State, 80004b4: 6aa3 ldr r3, [r4, #40] ; 0x28 80004b6: f023 0303 bic.w r3, r3, #3 80004ba: f043 0301 orr.w r3, r3, #1 80004be: 62a3 str r3, [r4, #40] ; 0x28 80004c0: bd70 pop {r4, r5, r6, pc} tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 80004c2: 460e mov r6, r1 80004c4: e7c9 b.n 800045a SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 80004c6: 6aa3 ldr r3, [r4, #40] ; 0x28 80004c8: f043 0320 orr.w r3, r3, #32 80004cc: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80004ce: 6ae3 ldr r3, [r4, #44] ; 0x2c 80004d0: f043 0301 orr.w r3, r3, #1 80004d4: 62e3 str r3, [r4, #44] ; 0x2c 80004d6: e7cb b.n 8000470 uint32_t tmp_sqr1 = 0U; 80004d8: 2100 movs r1, #0 80004da: e7df b.n 800049c ADC_STATE_CLR_SET(hadc->State, 80004dc: 6aa3 ldr r3, [r4, #40] ; 0x28 80004de: f023 0312 bic.w r3, r3, #18 80004e2: f043 0310 orr.w r3, r3, #16 80004e6: 62a3 str r3, [r4, #40] ; 0x28 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80004e8: 6ae3 ldr r3, [r4, #44] ; 0x2c 80004ea: f043 0301 orr.w r3, r3, #1 80004ee: 62e3 str r3, [r4, #44] ; 0x2c return HAL_ERROR; 80004f0: 2001 movs r0, #1 } 80004f2: bd70 pop {r4, r5, r6, pc} SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80004f4: f043 0310 orr.w r3, r3, #16 80004f8: 62a3 str r3, [r4, #40] ; 0x28 80004fa: e7f9 b.n 80004f0 80004fc: ffe1f7fd .word 0xffe1f7fd 8000500: ff1f0efe .word 0xff1f0efe 08000504 : __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ reg_value = SCB->AIRCR; /* read old register configuration */ 8000504: 4a07 ldr r2, [pc, #28] ; (8000524 ) reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 8000506: 0200 lsls r0, r0, #8 reg_value = SCB->AIRCR; /* read old register configuration */ 8000508: 68d3 ldr r3, [r2, #12] (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ 800050a: f400 60e0 and.w r0, r0, #1792 ; 0x700 reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 800050e: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8000512: 041b lsls r3, r3, #16 8000514: 0c1b lsrs r3, r3, #16 8000516: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 800051a: f443 3300 orr.w r3, r3, #131072 ; 0x20000 reg_value = (reg_value | 800051e: 4303 orrs r3, r0 SCB->AIRCR = reg_value; 8000520: 60d3 str r3, [r2, #12] 8000522: 4770 bx lr 8000524: e000ed00 .word 0xe000ed00 08000528 : \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) { return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8000528: 4b17 ldr r3, [pc, #92] ; (8000588 ) * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800052a: b530 push {r4, r5, lr} 800052c: 68dc ldr r4, [r3, #12] 800052e: f3c4 2402 ubfx r4, r4, #8, #3 { uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000532: f1c4 0307 rsb r3, r4, #7 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000536: 1d25 adds r5, r4, #4 PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8000538: 2b04 cmp r3, #4 800053a: bf28 it cs 800053c: 2304 movcs r3, #4 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 800053e: 2d06 cmp r5, #6 return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000540: f04f 0501 mov.w r5, #1 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000544: bf98 it ls 8000546: 2400 movls r4, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000548: fa05 f303 lsl.w r3, r5, r3 800054c: f103 33ff add.w r3, r3, #4294967295 SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8000550: bf88 it hi 8000552: 3c03 subhi r4, #3 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000554: 4019 ands r1, r3 8000556: 40a1 lsls r1, r4 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8000558: fa05 f404 lsl.w r4, r5, r4 800055c: 3c01 subs r4, #1 800055e: 4022 ands r2, r4 if ((int32_t)(IRQn) < 0) 8000560: 2800 cmp r0, #0 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8000562: ea42 0201 orr.w r2, r2, r1 8000566: ea4f 1202 mov.w r2, r2, lsl #4 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800056a: bfaf iteee ge 800056c: f100 4060 addge.w r0, r0, #3758096384 ; 0xe0000000 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000570: 4b06 ldrlt r3, [pc, #24] ; (800058c ) 8000572: f000 000f andlt.w r0, r0, #15 8000576: b2d2 uxtblt r2, r2 NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000578: bfa5 ittet ge 800057a: b2d2 uxtbge r2, r2 800057c: f500 4061 addge.w r0, r0, #57600 ; 0xe100 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000580: 541a strblt r2, [r3, r0] NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8000582: f880 2300 strbge.w r2, [r0, #768] ; 0x300 8000586: bd30 pop {r4, r5, pc} 8000588: e000ed00 .word 0xe000ed00 800058c: e000ed14 .word 0xe000ed14 08000590 : NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); 8000590: 2301 movs r3, #1 8000592: 0942 lsrs r2, r0, #5 8000594: f000 001f and.w r0, r0, #31 8000598: fa03 f000 lsl.w r0, r3, r0 800059c: 4b01 ldr r3, [pc, #4] ; (80005a4 ) 800059e: f843 0022 str.w r0, [r3, r2, lsl #2] 80005a2: 4770 bx lr 80005a4: e000e100 .word 0xe000e100 080005a8 : function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 80005a8: 3801 subs r0, #1 80005aa: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 80005ae: d20a bcs.n 80005c6 SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80005b0: 21f0 movs r1, #240 ; 0xf0 { return (1UL); /* Reload value impossible */ } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80005b2: 4b06 ldr r3, [pc, #24] ; (80005cc ) SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80005b4: 4a06 ldr r2, [pc, #24] ; (80005d0 ) SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80005b6: 6058 str r0, [r3, #4] SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80005b8: f882 1023 strb.w r1, [r2, #35] ; 0x23 NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80005bc: 2000 movs r0, #0 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80005be: 2207 movs r2, #7 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 80005c0: 6098 str r0, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 80005c2: 601a str r2, [r3, #0] 80005c4: 4770 bx lr return (1UL); /* Reload value impossible */ 80005c6: 2001 movs r0, #1 * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { return SysTick_Config(TicksNumb); } 80005c8: 4770 bx lr 80005ca: bf00 nop 80005cc: e000e010 .word 0xe000e010 80005d0: e000ed00 .word 0xe000ed00 080005d4 : */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { HAL_StatusTypeDef status = HAL_OK; if(HAL_DMA_STATE_BUSY != hdma->State) 80005d4: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 { 80005d8: b510 push {r4, lr} if(HAL_DMA_STATE_BUSY != hdma->State) 80005da: 2b02 cmp r3, #2 80005dc: d003 beq.n 80005e6 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80005de: 2304 movs r3, #4 80005e0: 6383 str r3, [r0, #56] ; 0x38 status = HAL_ERROR; 80005e2: 2001 movs r0, #1 80005e4: bd10 pop {r4, pc} } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80005e6: 6803 ldr r3, [r0, #0] 80005e8: 681a ldr r2, [r3, #0] 80005ea: f022 020e bic.w r2, r2, #14 80005ee: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80005f0: 681a ldr r2, [r3, #0] 80005f2: f022 0201 bic.w r2, r2, #1 80005f6: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80005f8: 4a18 ldr r2, [pc, #96] ; (800065c ) 80005fa: 4293 cmp r3, r2 80005fc: d01f beq.n 800063e 80005fe: 3214 adds r2, #20 8000600: 4293 cmp r3, r2 8000602: d01e beq.n 8000642 8000604: 3214 adds r2, #20 8000606: 4293 cmp r3, r2 8000608: d01d beq.n 8000646 800060a: 3214 adds r2, #20 800060c: 4293 cmp r3, r2 800060e: d01d beq.n 800064c 8000610: 3214 adds r2, #20 8000612: 4293 cmp r3, r2 8000614: d01d beq.n 8000652 8000616: 3214 adds r2, #20 8000618: 4293 cmp r3, r2 800061a: bf0c ite eq 800061c: f44f 1380 moveq.w r3, #1048576 ; 0x100000 8000620: f04f 7380 movne.w r3, #16777216 ; 0x1000000 8000624: 4a0e ldr r2, [pc, #56] ; (8000660 ) /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; /* Process Unlocked */ __HAL_UNLOCK(hdma); 8000626: 2400 movs r4, #0 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 8000628: 6053 str r3, [r2, #4] hdma->State = HAL_DMA_STATE_READY; 800062a: 2301 movs r3, #1 800062c: f880 3021 strb.w r3, [r0, #33] ; 0x21 /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8000630: 6b43 ldr r3, [r0, #52] ; 0x34 __HAL_UNLOCK(hdma); 8000632: f880 4020 strb.w r4, [r0, #32] if(hdma->XferAbortCallback != NULL) 8000636: b17b cbz r3, 8000658 { hdma->XferAbortCallback(hdma); 8000638: 4798 blx r3 HAL_StatusTypeDef status = HAL_OK; 800063a: 4620 mov r0, r4 800063c: bd10 pop {r4, pc} __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 800063e: 2301 movs r3, #1 8000640: e7f0 b.n 8000624 8000642: 2310 movs r3, #16 8000644: e7ee b.n 8000624 8000646: f44f 7380 mov.w r3, #256 ; 0x100 800064a: e7eb b.n 8000624 800064c: f44f 5380 mov.w r3, #4096 ; 0x1000 8000650: e7e8 b.n 8000624 8000652: f44f 3380 mov.w r3, #65536 ; 0x10000 8000656: e7e5 b.n 8000624 HAL_StatusTypeDef status = HAL_OK; 8000658: 4618 mov r0, r3 } } return status; } 800065a: bd10 pop {r4, pc} 800065c: 40020008 .word 0x40020008 8000660: 40020000 .word 0x40020000 08000664 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8000664: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} uint32_t position; uint32_t ioposition = 0x00U; uint32_t iocurrent = 0x00U; uint32_t temp = 0x00U; uint32_t config = 0x00U; 8000668: 2200 movs r2, #0 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0U; position < GPIO_NUMBER; position++) 800066a: 4616 mov r6, r2 800066c: 4b65 ldr r3, [pc, #404] ; (8000804 ) { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 800066e: f8df e1a4 ldr.w lr, [pc, #420] ; 8000814 8000672: f8df c1a4 ldr.w ip, [pc, #420] ; 8000818 ioposition = (0x01U << position); 8000676: f04f 0801 mov.w r8, #1 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 800067a: 680c ldr r4, [r1, #0] ioposition = (0x01U << position); 800067c: fa08 f806 lsl.w r8, r8, r6 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8000680: ea08 0404 and.w r4, r8, r4 if (iocurrent == ioposition) 8000684: 45a0 cmp r8, r4 8000686: d17f bne.n 8000788 switch (GPIO_Init->Mode) 8000688: 684d ldr r5, [r1, #4] 800068a: 2d12 cmp r5, #18 800068c: f000 80af beq.w 80007ee 8000690: f200 8088 bhi.w 80007a4 8000694: 2d02 cmp r5, #2 8000696: f000 80a7 beq.w 80007e8 800069a: d87c bhi.n 8000796 800069c: 2d00 cmp r5, #0 800069e: f000 808e beq.w 80007be 80006a2: 2d01 cmp r5, #1 80006a4: f000 809e beq.w 80007e4 in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2U) : ((position - 8U) << 2U); /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80006a8: f04f 090f mov.w r9, #15 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80006ac: 2cff cmp r4, #255 ; 0xff 80006ae: bf93 iteet ls 80006b0: 4682 movls sl, r0 80006b2: f106 4580 addhi.w r5, r6, #1073741824 ; 0x40000000 80006b6: 3d08 subhi r5, #8 80006b8: f8d0 b000 ldrls.w fp, [r0] 80006bc: bf92 itee ls 80006be: 00b5 lslls r5, r6, #2 80006c0: f8d0 b004 ldrhi.w fp, [r0, #4] 80006c4: 00ad lslhi r5, r5, #2 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80006c6: fa09 f805 lsl.w r8, r9, r5 80006ca: ea2b 0808 bic.w r8, fp, r8 80006ce: fa02 f505 lsl.w r5, r2, r5 configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80006d2: bf88 it hi 80006d4: f100 0a04 addhi.w sl, r0, #4 MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80006d8: ea48 0505 orr.w r5, r8, r5 80006dc: f8ca 5000 str.w r5, [sl] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 80006e0: f8d1 a004 ldr.w sl, [r1, #4] 80006e4: f01a 5f80 tst.w sl, #268435456 ; 0x10000000 80006e8: d04e beq.n 8000788 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 80006ea: 4d47 ldr r5, [pc, #284] ; (8000808 ) 80006ec: 4f46 ldr r7, [pc, #280] ; (8000808 ) 80006ee: 69ad ldr r5, [r5, #24] 80006f0: f026 0803 bic.w r8, r6, #3 80006f4: f045 0501 orr.w r5, r5, #1 80006f8: 61bd str r5, [r7, #24] 80006fa: 69bd ldr r5, [r7, #24] 80006fc: f108 4880 add.w r8, r8, #1073741824 ; 0x40000000 8000700: f005 0501 and.w r5, r5, #1 8000704: 9501 str r5, [sp, #4] 8000706: f508 3880 add.w r8, r8, #65536 ; 0x10000 temp = AFIO->EXTICR[position >> 2U]; CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 800070a: f006 0b03 and.w fp, r6, #3 __HAL_RCC_AFIO_CLK_ENABLE(); 800070e: 9d01 ldr r5, [sp, #4] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000710: ea4f 0b8b mov.w fp, fp, lsl #2 temp = AFIO->EXTICR[position >> 2U]; 8000714: f8d8 5008 ldr.w r5, [r8, #8] CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U))); 8000718: fa09 f90b lsl.w r9, r9, fp 800071c: ea25 0909 bic.w r9, r5, r9 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8000720: 4d3a ldr r5, [pc, #232] ; (800080c ) 8000722: 42a8 cmp r0, r5 8000724: d068 beq.n 80007f8 8000726: f505 6580 add.w r5, r5, #1024 ; 0x400 800072a: 42a8 cmp r0, r5 800072c: d066 beq.n 80007fc 800072e: f505 6580 add.w r5, r5, #1024 ; 0x400 8000732: 42a8 cmp r0, r5 8000734: d064 beq.n 8000800 8000736: f505 6580 add.w r5, r5, #1024 ; 0x400 800073a: 42a8 cmp r0, r5 800073c: bf0c ite eq 800073e: 2503 moveq r5, #3 8000740: 2504 movne r5, #4 8000742: fa05 f50b lsl.w r5, r5, fp 8000746: ea45 0509 orr.w r5, r5, r9 AFIO->EXTICR[position >> 2U] = temp; 800074a: f8c8 5008 str.w r5, [r8, #8] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) { SET_BIT(EXTI->IMR, iocurrent); 800074e: 681d ldr r5, [r3, #0] if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8000750: f41a 3f80 tst.w sl, #65536 ; 0x10000 SET_BIT(EXTI->IMR, iocurrent); 8000754: bf14 ite ne 8000756: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8000758: 43a5 biceq r5, r4 800075a: 601d str r5, [r3, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) { SET_BIT(EXTI->EMR, iocurrent); 800075c: 685d ldr r5, [r3, #4] if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 800075e: f41a 3f00 tst.w sl, #131072 ; 0x20000 SET_BIT(EXTI->EMR, iocurrent); 8000762: bf14 ite ne 8000764: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8000766: 43a5 biceq r5, r4 8000768: 605d str r5, [r3, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) { SET_BIT(EXTI->RTSR, iocurrent); 800076a: 689d ldr r5, [r3, #8] if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800076c: f41a 1f80 tst.w sl, #1048576 ; 0x100000 SET_BIT(EXTI->RTSR, iocurrent); 8000770: bf14 ite ne 8000772: 4325 orrne r5, r4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8000774: 43a5 biceq r5, r4 8000776: 609d str r5, [r3, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) { SET_BIT(EXTI->FTSR, iocurrent); 8000778: 68dd ldr r5, [r3, #12] if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 800077a: f41a 1f00 tst.w sl, #2097152 ; 0x200000 SET_BIT(EXTI->FTSR, iocurrent); 800077e: bf14 ite ne 8000780: 432c orrne r4, r5 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8000782: ea25 0404 biceq.w r4, r5, r4 8000786: 60dc str r4, [r3, #12] for (position = 0U; position < GPIO_NUMBER; position++) 8000788: 3601 adds r6, #1 800078a: 2e10 cmp r6, #16 800078c: f47f af73 bne.w 8000676 } } } } } 8000790: b003 add sp, #12 8000792: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} switch (GPIO_Init->Mode) 8000796: 2d03 cmp r5, #3 8000798: d022 beq.n 80007e0 800079a: 2d11 cmp r5, #17 800079c: d184 bne.n 80006a8 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 800079e: 68ca ldr r2, [r1, #12] 80007a0: 3204 adds r2, #4 break; 80007a2: e781 b.n 80006a8 switch (GPIO_Init->Mode) 80007a4: 4f1a ldr r7, [pc, #104] ; (8000810 ) 80007a6: 42bd cmp r5, r7 80007a8: d009 beq.n 80007be 80007aa: d812 bhi.n 80007d2 80007ac: f8df 906c ldr.w r9, [pc, #108] ; 800081c 80007b0: 454d cmp r5, r9 80007b2: d004 beq.n 80007be 80007b4: f509 3980 add.w r9, r9, #65536 ; 0x10000 80007b8: 454d cmp r5, r9 80007ba: f47f af75 bne.w 80006a8 if (GPIO_Init->Pull == GPIO_NOPULL) 80007be: 688a ldr r2, [r1, #8] 80007c0: b1c2 cbz r2, 80007f4 else if (GPIO_Init->Pull == GPIO_PULLUP) 80007c2: 2a01 cmp r2, #1 GPIOx->BSRR = ioposition; 80007c4: bf0c ite eq 80007c6: f8c0 8010 streq.w r8, [r0, #16] GPIOx->BRR = ioposition; 80007ca: f8c0 8014 strne.w r8, [r0, #20] config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80007ce: 2208 movs r2, #8 80007d0: e76a b.n 80006a8 switch (GPIO_Init->Mode) 80007d2: 4575 cmp r5, lr 80007d4: d0f3 beq.n 80007be 80007d6: 4565 cmp r5, ip 80007d8: d0f1 beq.n 80007be 80007da: f8df 9044 ldr.w r9, [pc, #68] ; 8000820 80007de: e7eb b.n 80007b8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80007e0: 2200 movs r2, #0 80007e2: e761 b.n 80006a8 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 80007e4: 68ca ldr r2, [r1, #12] break; 80007e6: e75f b.n 80006a8 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 80007e8: 68ca ldr r2, [r1, #12] 80007ea: 3208 adds r2, #8 break; 80007ec: e75c b.n 80006a8 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80007ee: 68ca ldr r2, [r1, #12] 80007f0: 320c adds r2, #12 break; 80007f2: e759 b.n 80006a8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80007f4: 2204 movs r2, #4 80007f6: e757 b.n 80006a8 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80007f8: 2500 movs r5, #0 80007fa: e7a2 b.n 8000742 80007fc: 2501 movs r5, #1 80007fe: e7a0 b.n 8000742 8000800: 2502 movs r5, #2 8000802: e79e b.n 8000742 8000804: 40010400 .word 0x40010400 8000808: 40021000 .word 0x40021000 800080c: 40010800 .word 0x40010800 8000810: 10210000 .word 0x10210000 8000814: 10310000 .word 0x10310000 8000818: 10320000 .word 0x10320000 800081c: 10110000 .word 0x10110000 8000820: 10220000 .word 0x10220000 08000824 : { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8000824: b10a cbz r2, 800082a { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8000826: 6101 str r1, [r0, #16] 8000828: 4770 bx lr 800082a: 0409 lsls r1, r1, #16 800082c: e7fb b.n 8000826 0800082e : void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); GPIOx->ODR ^= GPIO_Pin; 800082e: 68c3 ldr r3, [r0, #12] 8000830: 4059 eors r1, r3 8000832: 60c1 str r1, [r0, #12] 8000834: 4770 bx lr 08000836 : * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8000836: 6802 ldr r2, [r0, #0] 8000838: 6953 ldr r3, [r2, #20] 800083a: f413 6380 ands.w r3, r3, #1024 ; 0x400 800083e: d00d beq.n 800085c { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8000840: f46f 6380 mvn.w r3, #1024 ; 0x400 8000844: 6153 str r3, [r2, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 8000846: 2304 movs r3, #4 hi2c->PreviousState = I2C_STATE_NONE; hi2c->State= HAL_I2C_STATE_READY; 8000848: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_AF; 800084a: 6403 str r3, [r0, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 800084c: 2300 movs r3, #0 800084e: 6303 str r3, [r0, #48] ; 0x30 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8000850: f880 303c strb.w r3, [r0, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000854: f880 203d strb.w r2, [r0, #61] ; 0x3d return HAL_ERROR; 8000858: 2001 movs r0, #1 800085a: 4770 bx lr } return HAL_OK; 800085c: 4618 mov r0, r3 } 800085e: 4770 bx lr 08000860 : { 8000860: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8000864: 4604 mov r4, r0 8000866: 4617 mov r7, r2 8000868: 4699 mov r9, r3 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 800086a: f3c1 4807 ubfx r8, r1, #16, #8 800086e: b28e uxth r6, r1 8000870: 6825 ldr r5, [r4, #0] 8000872: f1b8 0f01 cmp.w r8, #1 8000876: bf0c ite eq 8000878: 696b ldreq r3, [r5, #20] 800087a: 69ab ldrne r3, [r5, #24] 800087c: ea36 0303 bics.w r3, r6, r3 8000880: bf14 ite ne 8000882: 2001 movne r0, #1 8000884: 2000 moveq r0, #0 8000886: b908 cbnz r0, 800088c } 8000888: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 800088c: 696b ldr r3, [r5, #20] 800088e: 055a lsls r2, r3, #21 8000890: d512 bpl.n 80008b8 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000892: 682b ldr r3, [r5, #0] hi2c->State= HAL_I2C_STATE_READY; 8000894: 2220 movs r2, #32 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000896: f443 7300 orr.w r3, r3, #512 ; 0x200 800089a: 602b str r3, [r5, #0] __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 800089c: f46f 6380 mvn.w r3, #1024 ; 0x400 80008a0: 616b str r3, [r5, #20] hi2c->ErrorCode = HAL_I2C_ERROR_AF; 80008a2: 2304 movs r3, #4 80008a4: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 80008a6: 2300 movs r3, #0 return HAL_ERROR; 80008a8: 2001 movs r0, #1 hi2c->PreviousState = I2C_STATE_NONE; 80008aa: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 80008ac: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 80008b0: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 80008b4: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 80008b8: 1c7b adds r3, r7, #1 80008ba: d0d9 beq.n 8000870 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80008bc: b94f cbnz r7, 80008d2 hi2c->PreviousState = I2C_STATE_NONE; 80008be: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 80008c0: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 80008c2: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 80008c4: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 80008c8: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_TIMEOUT; 80008cc: 2003 movs r0, #3 80008ce: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 80008d2: f7ff fcd9 bl 8000288 80008d6: eba0 0009 sub.w r0, r0, r9 80008da: 4287 cmp r7, r0 80008dc: d2c8 bcs.n 8000870 80008de: e7ee b.n 80008be 080008e0 : { 80008e0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80008e4: 4604 mov r4, r0 80008e6: 4690 mov r8, r2 80008e8: 461f mov r7, r3 80008ea: 9e08 ldr r6, [sp, #32] while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status) 80008ec: f3c1 4907 ubfx r9, r1, #16, #8 80008f0: b28d uxth r5, r1 80008f2: 6823 ldr r3, [r4, #0] 80008f4: f1b9 0f01 cmp.w r9, #1 80008f8: bf0c ite eq 80008fa: 695b ldreq r3, [r3, #20] 80008fc: 699b ldrne r3, [r3, #24] 80008fe: ea35 0303 bics.w r3, r5, r3 8000902: bf0c ite eq 8000904: 2301 moveq r3, #1 8000906: 2300 movne r3, #0 8000908: 4543 cmp r3, r8 800090a: d002 beq.n 8000912 return HAL_OK; 800090c: 2000 movs r0, #0 } 800090e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if(Timeout != HAL_MAX_DELAY) 8000912: 1c7b adds r3, r7, #1 8000914: d0ed beq.n 80008f2 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8000916: b95f cbnz r7, 8000930 hi2c->PreviousState = I2C_STATE_NONE; 8000918: 2300 movs r3, #0 hi2c->State= HAL_I2C_STATE_READY; 800091a: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 800091c: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 800091e: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000922: f884 203d strb.w r2, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8000926: 2003 movs r0, #3 hi2c->Mode = HAL_I2C_MODE_NONE; 8000928: f884 303e strb.w r3, [r4, #62] ; 0x3e 800092c: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8000930: f7ff fcaa bl 8000288 8000934: 1b80 subs r0, r0, r6 8000936: 4287 cmp r7, r0 8000938: d2db bcs.n 80008f2 800093a: e7ed b.n 8000918 0800093c : { 800093c: b570 push {r4, r5, r6, lr} 800093e: 4604 mov r4, r0 8000940: 460d mov r5, r1 8000942: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8000944: 6823 ldr r3, [r4, #0] 8000946: 695b ldr r3, [r3, #20] 8000948: 061b lsls r3, r3, #24 800094a: d501 bpl.n 8000950 return HAL_OK; 800094c: 2000 movs r0, #0 800094e: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8000950: 4620 mov r0, r4 8000952: f7ff ff70 bl 8000836 8000956: b9a8 cbnz r0, 8000984 if(Timeout != HAL_MAX_DELAY) 8000958: 1c6a adds r2, r5, #1 800095a: d0f3 beq.n 8000944 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 800095c: b965 cbnz r5, 8000978 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 800095e: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8000960: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000962: f043 0320 orr.w r3, r3, #32 8000966: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8000968: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 800096a: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 800096c: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 800096e: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000972: f884 203d strb.w r2, [r4, #61] ; 0x3d 8000976: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000978: f7ff fc86 bl 8000288 800097c: 1b80 subs r0, r0, r6 800097e: 4285 cmp r5, r0 8000980: d2e0 bcs.n 8000944 8000982: e7ec b.n 800095e return HAL_ERROR; 8000984: 2001 movs r0, #1 } 8000986: bd70 pop {r4, r5, r6, pc} 08000988 : { 8000988: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 800098c: 4615 mov r5, r2 hi2c->Instance->CR1 |= I2C_CR1_START; 800098e: 6802 ldr r2, [r0, #0] { 8000990: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_START; 8000992: 6813 ldr r3, [r2, #0] { 8000994: 9e0b ldr r6, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_START; 8000996: f443 7380 orr.w r3, r3, #256 ; 0x100 800099a: 6013 str r3, [r2, #0] { 800099c: 460f mov r7, r1 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 800099e: 9600 str r6, [sp, #0] 80009a0: 9b0a ldr r3, [sp, #40] ; 0x28 80009a2: 2200 movs r2, #0 80009a4: f04f 1101 mov.w r1, #65537 ; 0x10001 { 80009a8: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 80009aa: f7ff ff99 bl 80008e0 80009ae: b968 cbnz r0, 80009cc hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 80009b0: 6823 ldr r3, [r4, #0] 80009b2: f007 07fe and.w r7, r7, #254 ; 0xfe 80009b6: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 80009b8: 9a0a ldr r2, [sp, #40] ; 0x28 80009ba: 4633 mov r3, r6 80009bc: 491a ldr r1, [pc, #104] ; (8000a28 ) 80009be: 4620 mov r0, r4 80009c0: f7ff ff4e bl 8000860 80009c4: b130 cbz r0, 80009d4 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80009c6: 6c23 ldr r3, [r4, #64] ; 0x40 80009c8: 2b04 cmp r3, #4 80009ca: d018 beq.n 80009fe return HAL_TIMEOUT; 80009cc: 2003 movs r0, #3 } 80009ce: b004 add sp, #16 80009d0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80009d4: 6823 ldr r3, [r4, #0] 80009d6: 9003 str r0, [sp, #12] 80009d8: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 80009da: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80009dc: 9203 str r2, [sp, #12] 80009de: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 80009e0: 4632 mov r2, r6 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80009e2: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 80009e4: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80009e6: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 80009e8: f7ff ffa8 bl 800093c 80009ec: b148 cbz r0, 8000a02 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80009ee: 6c23 ldr r3, [r4, #64] ; 0x40 80009f0: 2b04 cmp r3, #4 80009f2: d1eb bne.n 80009cc hi2c->Instance->CR1 |= I2C_CR1_STOP; 80009f4: 6822 ldr r2, [r4, #0] 80009f6: 6813 ldr r3, [r2, #0] 80009f8: f443 7300 orr.w r3, r3, #512 ; 0x200 80009fc: 6013 str r3, [r2, #0] return HAL_ERROR; 80009fe: 2001 movs r0, #1 8000a00: e7e5 b.n 80009ce if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8000a02: f1b8 0f01 cmp.w r8, #1 8000a06: 6823 ldr r3, [r4, #0] 8000a08: d102 bne.n 8000a10 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000a0a: b2ed uxtb r5, r5 8000a0c: 611d str r5, [r3, #16] 8000a0e: e7de b.n 80009ce hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8000a10: 0a2a lsrs r2, r5, #8 8000a12: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000a14: 990a ldr r1, [sp, #40] ; 0x28 8000a16: 4632 mov r2, r6 8000a18: 4620 mov r0, r4 8000a1a: f7ff ff8f bl 800093c 8000a1e: 2800 cmp r0, #0 8000a20: d1e5 bne.n 80009ee hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000a22: 6823 ldr r3, [r4, #0] 8000a24: e7f1 b.n 8000a0a 8000a26: bf00 nop 8000a28: 00010002 .word 0x00010002 08000a2c : { 8000a2c: e92d 41ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr} 8000a30: 4698 mov r8, r3 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8000a32: 6803 ldr r3, [r0, #0] { 8000a34: 4616 mov r6, r2 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8000a36: 681a ldr r2, [r3, #0] { 8000a38: 9d0b ldr r5, [sp, #44] ; 0x2c hi2c->Instance->CR1 |= I2C_CR1_ACK; 8000a3a: f442 6280 orr.w r2, r2, #1024 ; 0x400 8000a3e: 601a str r2, [r3, #0] hi2c->Instance->CR1 |= I2C_CR1_START; 8000a40: 681a ldr r2, [r3, #0] { 8000a42: 460f mov r7, r1 hi2c->Instance->CR1 |= I2C_CR1_START; 8000a44: f442 7280 orr.w r2, r2, #256 ; 0x100 8000a48: 601a str r2, [r3, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000a4a: f04f 1101 mov.w r1, #65537 ; 0x10001 8000a4e: 9500 str r5, [sp, #0] 8000a50: 9b0a ldr r3, [sp, #40] ; 0x28 8000a52: 2200 movs r2, #0 { 8000a54: 4604 mov r4, r0 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000a56: f7ff ff43 bl 80008e0 8000a5a: b980 cbnz r0, 8000a7e hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8000a5c: 6823 ldr r3, [r4, #0] 8000a5e: b2ff uxtb r7, r7 8000a60: f007 02fe and.w r2, r7, #254 ; 0xfe 8000a64: 611a str r2, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8000a66: 492d ldr r1, [pc, #180] ; (8000b1c ) 8000a68: 462b mov r3, r5 8000a6a: 9a0a ldr r2, [sp, #40] ; 0x28 8000a6c: 4620 mov r0, r4 8000a6e: f7ff fef7 bl 8000860 8000a72: b140 cbz r0, 8000a86 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000a74: 6c23 ldr r3, [r4, #64] ; 0x40 8000a76: 2b04 cmp r3, #4 8000a78: d101 bne.n 8000a7e return HAL_ERROR; 8000a7a: 2001 movs r0, #1 8000a7c: e000 b.n 8000a80 return HAL_TIMEOUT; 8000a7e: 2003 movs r0, #3 } 8000a80: b004 add sp, #16 8000a82: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000a86: 6823 ldr r3, [r4, #0] 8000a88: 9003 str r0, [sp, #12] 8000a8a: 695a ldr r2, [r3, #20] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000a8c: 990a ldr r1, [sp, #40] ; 0x28 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000a8e: 9203 str r2, [sp, #12] 8000a90: 699b ldr r3, [r3, #24] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000a92: 462a mov r2, r5 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000a94: 9303 str r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000a96: 4620 mov r0, r4 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000a98: 9b03 ldr r3, [sp, #12] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000a9a: f7ff ff4f bl 800093c 8000a9e: b140 cbz r0, 8000ab2 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000aa0: 6c23 ldr r3, [r4, #64] ; 0x40 8000aa2: 2b04 cmp r3, #4 8000aa4: d1eb bne.n 8000a7e hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000aa6: 6822 ldr r2, [r4, #0] 8000aa8: 6813 ldr r3, [r2, #0] 8000aaa: f443 7300 orr.w r3, r3, #512 ; 0x200 8000aae: 6013 str r3, [r2, #0] 8000ab0: e7e3 b.n 8000a7a if(MemAddSize == I2C_MEMADD_SIZE_8BIT) 8000ab2: f1b8 0f01 cmp.w r8, #1 8000ab6: 6823 ldr r3, [r4, #0] 8000ab8: d124 bne.n 8000b04 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000aba: b2f6 uxtb r6, r6 8000abc: 611e str r6, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000abe: 462a mov r2, r5 8000ac0: 990a ldr r1, [sp, #40] ; 0x28 8000ac2: 4620 mov r0, r4 8000ac4: f7ff ff3a bl 800093c 8000ac8: 4602 mov r2, r0 8000aca: 2800 cmp r0, #0 8000acc: d1e8 bne.n 8000aa0 hi2c->Instance->CR1 |= I2C_CR1_START; 8000ace: 6821 ldr r1, [r4, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000ad0: 4620 mov r0, r4 hi2c->Instance->CR1 |= I2C_CR1_START; 8000ad2: 680b ldr r3, [r1, #0] 8000ad4: f443 7380 orr.w r3, r3, #256 ; 0x100 8000ad8: 600b str r3, [r1, #0] if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8000ada: 9500 str r5, [sp, #0] 8000adc: 9b0a ldr r3, [sp, #40] ; 0x28 8000ade: f04f 1101 mov.w r1, #65537 ; 0x10001 8000ae2: f7ff fefd bl 80008e0 8000ae6: 2800 cmp r0, #0 8000ae8: d1c9 bne.n 8000a7e hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 8000aea: 6823 ldr r3, [r4, #0] 8000aec: f047 0701 orr.w r7, r7, #1 8000af0: 611f str r7, [r3, #16] if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8000af2: 9a0a ldr r2, [sp, #40] ; 0x28 8000af4: 462b mov r3, r5 8000af6: 4909 ldr r1, [pc, #36] ; (8000b1c ) 8000af8: 4620 mov r0, r4 8000afa: f7ff feb1 bl 8000860 8000afe: 2800 cmp r0, #0 8000b00: d1b8 bne.n 8000a74 8000b02: e7bd b.n 8000a80 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8000b04: 0a32 lsrs r2, r6, #8 8000b06: 611a str r2, [r3, #16] if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8000b08: 990a ldr r1, [sp, #40] ; 0x28 8000b0a: 462a mov r2, r5 8000b0c: 4620 mov r0, r4 8000b0e: f7ff ff15 bl 800093c 8000b12: 2800 cmp r0, #0 8000b14: d1c4 bne.n 8000aa0 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8000b16: 6823 ldr r3, [r4, #0] 8000b18: e7cf b.n 8000aba 8000b1a: bf00 nop 8000b1c: 00010002 .word 0x00010002 08000b20 : { 8000b20: b570 push {r4, r5, r6, lr} 8000b22: 4604 mov r4, r0 8000b24: 460d mov r5, r1 8000b26: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 8000b28: 6820 ldr r0, [r4, #0] 8000b2a: 6943 ldr r3, [r0, #20] 8000b2c: f013 0340 ands.w r3, r3, #64 ; 0x40 8000b30: d001 beq.n 8000b36 return HAL_OK; 8000b32: 2000 movs r0, #0 } 8000b34: bd70 pop {r4, r5, r6, pc} if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 8000b36: 6942 ldr r2, [r0, #20] 8000b38: 06d2 lsls r2, r2, #27 8000b3a: d50b bpl.n 8000b54 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8000b3c: f06f 0210 mvn.w r2, #16 8000b40: 6142 str r2, [r0, #20] hi2c->State= HAL_I2C_STATE_READY; 8000b42: 2220 movs r2, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000b44: 6423 str r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8000b46: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->PreviousState = I2C_STATE_NONE; 8000b4a: 6323 str r3, [r4, #48] ; 0x30 return HAL_ERROR; 8000b4c: 2001 movs r0, #1 hi2c->State= HAL_I2C_STATE_READY; 8000b4e: f884 203d strb.w r2, [r4, #61] ; 0x3d return HAL_ERROR; 8000b52: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000b54: b95d cbnz r5, 8000b6e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000b56: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8000b58: 2003 movs r0, #3 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000b5a: f043 0320 orr.w r3, r3, #32 8000b5e: 6423 str r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8000b60: 2320 movs r3, #32 8000b62: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_UNLOCK(hi2c); 8000b66: 2300 movs r3, #0 8000b68: f884 303c strb.w r3, [r4, #60] ; 0x3c 8000b6c: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000b6e: f7ff fb8b bl 8000288 8000b72: 1b80 subs r0, r0, r6 8000b74: 4285 cmp r5, r0 8000b76: d2d7 bcs.n 8000b28 8000b78: e7ed b.n 8000b56 08000b7a : { 8000b7a: b570 push {r4, r5, r6, lr} 8000b7c: 4604 mov r4, r0 8000b7e: 460d mov r5, r1 8000b80: 4616 mov r6, r2 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8000b82: 6823 ldr r3, [r4, #0] 8000b84: 695b ldr r3, [r3, #20] 8000b86: 075b lsls r3, r3, #29 8000b88: d501 bpl.n 8000b8e return HAL_OK; 8000b8a: 2000 movs r0, #0 8000b8c: bd70 pop {r4, r5, r6, pc} if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8000b8e: 4620 mov r0, r4 8000b90: f7ff fe51 bl 8000836 8000b94: b9a8 cbnz r0, 8000bc2 if(Timeout != HAL_MAX_DELAY) 8000b96: 1c6a adds r2, r5, #1 8000b98: d0f3 beq.n 8000b82 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000b9a: b965 cbnz r5, 8000bb6 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000b9c: 6c23 ldr r3, [r4, #64] ; 0x40 hi2c->State= HAL_I2C_STATE_READY; 8000b9e: 2220 movs r2, #32 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8000ba0: f043 0320 orr.w r3, r3, #32 8000ba4: 6423 str r3, [r4, #64] ; 0x40 hi2c->PreviousState = I2C_STATE_NONE; 8000ba6: 2300 movs r3, #0 __HAL_UNLOCK(hi2c); 8000ba8: 2003 movs r0, #3 hi2c->PreviousState = I2C_STATE_NONE; 8000baa: 6323 str r3, [r4, #48] ; 0x30 __HAL_UNLOCK(hi2c); 8000bac: f884 303c strb.w r3, [r4, #60] ; 0x3c hi2c->State= HAL_I2C_STATE_READY; 8000bb0: f884 203d strb.w r2, [r4, #61] ; 0x3d 8000bb4: bd70 pop {r4, r5, r6, pc} if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) 8000bb6: f7ff fb67 bl 8000288 8000bba: 1b80 subs r0, r0, r6 8000bbc: 4285 cmp r5, r0 8000bbe: d2e0 bcs.n 8000b82 8000bc0: e7ec b.n 8000b9c return HAL_ERROR; 8000bc2: 2001 movs r0, #1 } 8000bc4: bd70 pop {r4, r5, r6, pc} ... 08000bc8 : { 8000bc8: b538 push {r3, r4, r5, lr} if(hi2c == NULL) 8000bca: 4604 mov r4, r0 8000bcc: b908 cbnz r0, 8000bd2 return HAL_ERROR; 8000bce: 2001 movs r0, #1 8000bd0: bd38 pop {r3, r4, r5, pc} if(hi2c->State == HAL_I2C_STATE_RESET) 8000bd2: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8000bd6: f003 02ff and.w r2, r3, #255 ; 0xff 8000bda: b91b cbnz r3, 8000be4 hi2c->Lock = HAL_UNLOCKED; 8000bdc: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_I2C_MspInit(hi2c); 8000be0: f002 fa3e bl 8003060 hi2c->State = HAL_I2C_STATE_BUSY; 8000be4: 2324 movs r3, #36 ; 0x24 __HAL_I2C_DISABLE(hi2c); 8000be6: 6822 ldr r2, [r4, #0] hi2c->State = HAL_I2C_STATE_BUSY; 8000be8: f884 303d strb.w r3, [r4, #61] ; 0x3d __HAL_I2C_DISABLE(hi2c); 8000bec: 6813 ldr r3, [r2, #0] 8000bee: f023 0301 bic.w r3, r3, #1 8000bf2: 6013 str r3, [r2, #0] pclk1 = HAL_RCC_GetPCLK1Freq(); 8000bf4: f001 f8a0 bl 8001d38 if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000bf8: 6863 ldr r3, [r4, #4] 8000bfa: 4a2f ldr r2, [pc, #188] ; (8000cb8 ) 8000bfc: 4293 cmp r3, r2 8000bfe: d830 bhi.n 8000c62 8000c00: 4a2e ldr r2, [pc, #184] ; (8000cbc ) 8000c02: 4290 cmp r0, r2 8000c04: d9e3 bls.n 8000bce freqrange = I2C_FREQRANGE(pclk1); 8000c06: 4a2e ldr r2, [pc, #184] ; (8000cc0 ) hi2c->Instance->CR2 = freqrange; 8000c08: 6821 ldr r1, [r4, #0] freqrange = I2C_FREQRANGE(pclk1); 8000c0a: fbb0 f2f2 udiv r2, r0, r2 hi2c->Instance->CR2 = freqrange; 8000c0e: 604a str r2, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c10: 3201 adds r2, #1 8000c12: 620a str r2, [r1, #32] hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000c14: 4a28 ldr r2, [pc, #160] ; (8000cb8 ) 8000c16: 3801 subs r0, #1 8000c18: 4293 cmp r3, r2 8000c1a: d832 bhi.n 8000c82 8000c1c: 005b lsls r3, r3, #1 8000c1e: fbb0 f0f3 udiv r0, r0, r3 8000c22: 1c43 adds r3, r0, #1 8000c24: f3c3 030b ubfx r3, r3, #0, #12 8000c28: 2b04 cmp r3, #4 8000c2a: bf38 it cc 8000c2c: 2304 movcc r3, #4 8000c2e: 61cb str r3, [r1, #28] hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000c30: 6a22 ldr r2, [r4, #32] 8000c32: 69e3 ldr r3, [r4, #28] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000c34: 2000 movs r0, #0 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8000c36: 4313 orrs r3, r2 8000c38: 600b str r3, [r1, #0] hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1); 8000c3a: 68e2 ldr r2, [r4, #12] 8000c3c: 6923 ldr r3, [r4, #16] 8000c3e: 4313 orrs r3, r2 8000c40: 608b str r3, [r1, #8] hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2); 8000c42: 69a2 ldr r2, [r4, #24] 8000c44: 6963 ldr r3, [r4, #20] 8000c46: 4313 orrs r3, r2 8000c48: 60cb str r3, [r1, #12] __HAL_I2C_ENABLE(hi2c); 8000c4a: 680b ldr r3, [r1, #0] 8000c4c: f043 0301 orr.w r3, r3, #1 8000c50: 600b str r3, [r1, #0] hi2c->State = HAL_I2C_STATE_READY; 8000c52: 2320 movs r3, #32 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000c54: 6420 str r0, [r4, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 8000c56: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8000c5a: 6320 str r0, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8000c5c: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8000c60: bd38 pop {r3, r4, r5, pc} if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8000c62: 4a18 ldr r2, [pc, #96] ; (8000cc4 ) 8000c64: 4290 cmp r0, r2 8000c66: d9b2 bls.n 8000bce freqrange = I2C_FREQRANGE(pclk1); 8000c68: 4d15 ldr r5, [pc, #84] ; (8000cc0 ) hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c6a: f44f 7296 mov.w r2, #300 ; 0x12c freqrange = I2C_FREQRANGE(pclk1); 8000c6e: fbb0 f5f5 udiv r5, r0, r5 hi2c->Instance->CR2 = freqrange; 8000c72: 6821 ldr r1, [r4, #0] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c74: 436a muls r2, r5 hi2c->Instance->CR2 = freqrange; 8000c76: 604d str r5, [r1, #4] hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed); 8000c78: f44f 757a mov.w r5, #1000 ; 0x3e8 8000c7c: fbb2 f2f5 udiv r2, r2, r5 8000c80: e7c6 b.n 8000c10 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle); 8000c82: 68a2 ldr r2, [r4, #8] 8000c84: b952 cbnz r2, 8000c9c 8000c86: eb03 0343 add.w r3, r3, r3, lsl #1 8000c8a: fbb0 f0f3 udiv r0, r0, r3 8000c8e: 1c43 adds r3, r0, #1 8000c90: f3c3 030b ubfx r3, r3, #0, #12 8000c94: b16b cbz r3, 8000cb2 8000c96: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8000c9a: e7c8 b.n 8000c2e 8000c9c: 2219 movs r2, #25 8000c9e: 4353 muls r3, r2 8000ca0: fbb0 f0f3 udiv r0, r0, r3 8000ca4: 1c43 adds r3, r0, #1 8000ca6: f3c3 030b ubfx r3, r3, #0, #12 8000caa: b113 cbz r3, 8000cb2 8000cac: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8000cb0: e7bd b.n 8000c2e 8000cb2: 2301 movs r3, #1 8000cb4: e7bb b.n 8000c2e 8000cb6: bf00 nop 8000cb8: 000186a0 .word 0x000186a0 8000cbc: 001e847f .word 0x001e847f 8000cc0: 000f4240 .word 0x000f4240 8000cc4: 003d08ff .word 0x003d08ff 08000cc8 : { 8000cc8: e92d 47f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, r9, sl, lr} 8000ccc: 4604 mov r4, r0 8000cce: 469a mov sl, r3 8000cd0: 4688 mov r8, r1 8000cd2: 4691 mov r9, r2 8000cd4: 9e0c ldr r6, [sp, #48] ; 0x30 tickstart = HAL_GetTick(); 8000cd6: f7ff fad7 bl 8000288 if(hi2c->State == HAL_I2C_STATE_READY) 8000cda: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8000cde: 4605 mov r5, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8000ce0: 2b20 cmp r3, #32 8000ce2: d003 beq.n 8000cec return HAL_BUSY; 8000ce4: 2002 movs r0, #2 } 8000ce6: b002 add sp, #8 8000ce8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8000cec: 9000 str r0, [sp, #0] 8000cee: 2319 movs r3, #25 8000cf0: 2201 movs r2, #1 8000cf2: 493e ldr r1, [pc, #248] ; (8000dec ) 8000cf4: 4620 mov r0, r4 8000cf6: f7ff fdf3 bl 80008e0 8000cfa: 2800 cmp r0, #0 8000cfc: d1f2 bne.n 8000ce4 __HAL_LOCK(hi2c); 8000cfe: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 8000d02: 2b01 cmp r3, #1 8000d04: d0ee beq.n 8000ce4 8000d06: 2301 movs r3, #1 8000d08: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8000d0c: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000d0e: 2700 movs r7, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8000d10: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000d12: 4641 mov r1, r8 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8000d14: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 8000d16: bf58 it pl 8000d18: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000d1a: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8000d1c: bf5c itt pl 8000d1e: f042 0201 orrpl.w r2, r2, #1 8000d22: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 8000d24: 681a ldr r2, [r3, #0] 8000d26: f422 6200 bic.w r2, r2, #2048 ; 0x800 8000d2a: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 8000d2c: 2321 movs r3, #33 ; 0x21 8000d2e: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8000d32: 2340 movs r3, #64 ; 0x40 8000d34: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 8000d38: 9b0a ldr r3, [sp, #40] ; 0x28 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000d3a: 6427 str r7, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 8000d3c: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 8000d3e: f8bd 302c ldrh.w r3, [sp, #44] ; 0x2c if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000d42: 9501 str r5, [sp, #4] hi2c->XferCount = Size; 8000d44: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8000d46: 4b2a ldr r3, [pc, #168] ; (8000df0 ) if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000d48: 9600 str r6, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8000d4a: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 8000d4c: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000d4e: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 8000d50: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000d52: 4653 mov r3, sl 8000d54: f7ff fe18 bl 8000988 8000d58: 2800 cmp r0, #0 8000d5a: d02a beq.n 8000db2 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000d5c: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8000d5e: f884 703c strb.w r7, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000d62: 2b04 cmp r3, #4 8000d64: d107 bne.n 8000d76 return HAL_ERROR; 8000d66: 2001 movs r0, #1 8000d68: e7bd b.n 8000ce6 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8000d6a: f7ff fde7 bl 800093c 8000d6e: b120 cbz r0, 8000d7a if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000d70: 6c23 ldr r3, [r4, #64] ; 0x40 8000d72: 2b04 cmp r3, #4 8000d74: d034 beq.n 8000de0 return HAL_TIMEOUT; 8000d76: 2003 movs r0, #3 8000d78: e7b5 b.n 8000ce6 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8000d7a: 6a61 ldr r1, [r4, #36] ; 0x24 8000d7c: 6827 ldr r7, [r4, #0] 8000d7e: 1c4b adds r3, r1, #1 8000d80: 6263 str r3, [r4, #36] ; 0x24 8000d82: 780b ldrb r3, [r1, #0] hi2c->XferSize--; 8000d84: 8d22 ldrh r2, [r4, #40] ; 0x28 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8000d86: 613b str r3, [r7, #16] hi2c->XferCount--; 8000d88: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 8000d8a: 1e50 subs r0, r2, #1 hi2c->XferCount--; 8000d8c: 3b01 subs r3, #1 8000d8e: b29b uxth r3, r3 8000d90: 8563 strh r3, [r4, #42] ; 0x2a if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8000d92: 697b ldr r3, [r7, #20] hi2c->XferSize--; 8000d94: b280 uxth r0, r0 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8000d96: 075b lsls r3, r3, #29 hi2c->XferSize--; 8000d98: 8520 strh r0, [r4, #40] ; 0x28 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8000d9a: d50a bpl.n 8000db2 8000d9c: b148 cbz r0, 8000db2 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8000d9e: 1c8b adds r3, r1, #2 8000da0: 6263 str r3, [r4, #36] ; 0x24 8000da2: 784b ldrb r3, [r1, #1] hi2c->XferSize--; 8000da4: 3a02 subs r2, #2 hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8000da6: 613b str r3, [r7, #16] hi2c->XferCount--; 8000da8: 8d63 ldrh r3, [r4, #42] ; 0x2a hi2c->XferSize--; 8000daa: 8522 strh r2, [r4, #40] ; 0x28 hi2c->XferCount--; 8000dac: 3b01 subs r3, #1 8000dae: b29b uxth r3, r3 8000db0: 8563 strh r3, [r4, #42] ; 0x2a while(hi2c->XferSize > 0U) 8000db2: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8000db4: 462a mov r2, r5 8000db6: 4631 mov r1, r6 8000db8: 4620 mov r0, r4 while(hi2c->XferSize > 0U) 8000dba: 2b00 cmp r3, #0 8000dbc: d1d5 bne.n 8000d6a if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8000dbe: f7ff fedc bl 8000b7a 8000dc2: 2800 cmp r0, #0 8000dc4: d1d4 bne.n 8000d70 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000dc6: 6822 ldr r2, [r4, #0] 8000dc8: 6813 ldr r3, [r2, #0] 8000dca: f443 7300 orr.w r3, r3, #512 ; 0x200 8000dce: 6013 str r3, [r2, #0] hi2c->State = HAL_I2C_STATE_READY; 8000dd0: 2320 movs r3, #32 __HAL_UNLOCK(hi2c); 8000dd2: f884 003c strb.w r0, [r4, #60] ; 0x3c hi2c->State = HAL_I2C_STATE_READY; 8000dd6: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8000dda: f884 003e strb.w r0, [r4, #62] ; 0x3e return HAL_OK; 8000dde: e782 b.n 8000ce6 hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000de0: 6822 ldr r2, [r4, #0] 8000de2: 6813 ldr r3, [r2, #0] 8000de4: f443 7300 orr.w r3, r3, #512 ; 0x200 8000de8: 6013 str r3, [r2, #0] 8000dea: e7bc b.n 8000d66 8000dec: 00100002 .word 0x00100002 8000df0: ffff0000 .word 0xffff0000 08000df4 : { 8000df4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8000df8: 4604 mov r4, r0 8000dfa: b086 sub sp, #24 8000dfc: 469a mov sl, r3 8000dfe: 460d mov r5, r1 8000e00: 4691 mov r9, r2 8000e02: 9f10 ldr r7, [sp, #64] ; 0x40 tickstart = HAL_GetTick(); 8000e04: f7ff fa40 bl 8000288 if(hi2c->State == HAL_I2C_STATE_READY) 8000e08: f894 303d ldrb.w r3, [r4, #61] ; 0x3d tickstart = HAL_GetTick(); 8000e0c: 4606 mov r6, r0 if(hi2c->State == HAL_I2C_STATE_READY) 8000e0e: 2b20 cmp r3, #32 8000e10: d004 beq.n 8000e1c return HAL_BUSY; 8000e12: 2502 movs r5, #2 } 8000e14: 4628 mov r0, r5 8000e16: b006 add sp, #24 8000e18: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8000e1c: 9000 str r0, [sp, #0] 8000e1e: 2319 movs r3, #25 8000e20: 2201 movs r2, #1 8000e22: 4981 ldr r1, [pc, #516] ; (8001028 ) 8000e24: 4620 mov r0, r4 8000e26: f7ff fd5b bl 80008e0 8000e2a: 2800 cmp r0, #0 8000e2c: d1f1 bne.n 8000e12 __HAL_LOCK(hi2c); 8000e2e: f894 303c ldrb.w r3, [r4, #60] ; 0x3c 8000e32: 2b01 cmp r3, #1 8000e34: d0ed beq.n 8000e12 8000e36: 2301 movs r3, #1 8000e38: f884 303c strb.w r3, [r4, #60] ; 0x3c if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8000e3c: 6823 ldr r3, [r4, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000e3e: f04f 0800 mov.w r8, #0 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8000e42: 681a ldr r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000e44: 4629 mov r1, r5 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8000e46: 07d2 lsls r2, r2, #31 __HAL_I2C_ENABLE(hi2c); 8000e48: bf58 it pl 8000e4a: 681a ldrpl r2, [r3, #0] if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000e4c: 4620 mov r0, r4 __HAL_I2C_ENABLE(hi2c); 8000e4e: bf5c itt pl 8000e50: f042 0201 orrpl.w r2, r2, #1 8000e54: 601a strpl r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_POS; 8000e56: 681a ldr r2, [r3, #0] 8000e58: f422 6200 bic.w r2, r2, #2048 ; 0x800 8000e5c: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 8000e5e: 2322 movs r3, #34 ; 0x22 8000e60: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8000e64: 2340 movs r3, #64 ; 0x40 8000e66: f884 303e strb.w r3, [r4, #62] ; 0x3e hi2c->pBuffPtr = pData; 8000e6a: 9b0e ldr r3, [sp, #56] ; 0x38 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8000e6c: f8c4 8040 str.w r8, [r4, #64] ; 0x40 hi2c->pBuffPtr = pData; 8000e70: 6263 str r3, [r4, #36] ; 0x24 hi2c->XferCount = Size; 8000e72: f8bd 303c ldrh.w r3, [sp, #60] ; 0x3c if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000e76: 9601 str r6, [sp, #4] hi2c->XferCount = Size; 8000e78: 8563 strh r3, [r4, #42] ; 0x2a hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8000e7a: 4b6c ldr r3, [pc, #432] ; (800102c ) if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000e7c: 9700 str r7, [sp, #0] hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8000e7e: 62e3 str r3, [r4, #44] ; 0x2c hi2c->XferSize = hi2c->XferCount; 8000e80: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000e82: 464a mov r2, r9 hi2c->XferSize = hi2c->XferCount; 8000e84: 8523 strh r3, [r4, #40] ; 0x28 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8000e86: 4653 mov r3, sl 8000e88: f7ff fdd0 bl 8000a2c 8000e8c: 4605 mov r5, r0 8000e8e: b130 cbz r0, 8000e9e if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000e90: 6c23 ldr r3, [r4, #64] ; 0x40 __HAL_UNLOCK(hi2c); 8000e92: f884 803c strb.w r8, [r4, #60] ; 0x3c if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8000e96: 2b04 cmp r3, #4 8000e98: d13d bne.n 8000f16 return HAL_ERROR; 8000e9a: 2501 movs r5, #1 8000e9c: e7ba b.n 8000e14 if(hi2c->XferSize == 0U) 8000e9e: 8d22 ldrh r2, [r4, #40] ; 0x28 8000ea0: 6823 ldr r3, [r4, #0] 8000ea2: b992 cbnz r2, 8000eca __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000ea4: 9002 str r0, [sp, #8] 8000ea6: 695a ldr r2, [r3, #20] 8000ea8: 9202 str r2, [sp, #8] 8000eaa: 699a ldr r2, [r3, #24] 8000eac: 9202 str r2, [sp, #8] 8000eae: 9a02 ldr r2, [sp, #8] hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000eb0: 681a ldr r2, [r3, #0] 8000eb2: f442 7200 orr.w r2, r2, #512 ; 0x200 8000eb6: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8000eb8: 2320 movs r3, #32 8000eba: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8000ebe: 2300 movs r3, #0 8000ec0: f884 303e strb.w r3, [r4, #62] ; 0x3e __HAL_UNLOCK(hi2c); 8000ec4: f884 303c strb.w r3, [r4, #60] ; 0x3c return HAL_OK; 8000ec8: e7a4 b.n 8000e14 else if(hi2c->XferSize == 1U) 8000eca: 2a01 cmp r2, #1 8000ecc: d125 bne.n 8000f1a hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8000ece: 681a ldr r2, [r3, #0] 8000ed0: f422 6280 bic.w r2, r2, #1024 ; 0x400 8000ed4: 601a str r2, [r3, #0] \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8000ed6: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000ed8: 6823 ldr r3, [r4, #0] 8000eda: 9003 str r0, [sp, #12] 8000edc: 695a ldr r2, [r3, #20] 8000ede: 9203 str r2, [sp, #12] 8000ee0: 699a ldr r2, [r3, #24] 8000ee2: 9203 str r2, [sp, #12] 8000ee4: 9a03 ldr r2, [sp, #12] hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000ee6: 681a ldr r2, [r3, #0] 8000ee8: f442 7200 orr.w r2, r2, #512 ; 0x200 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8000eec: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 8000eee: b662 cpsie i if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000ef0: f8df 813c ldr.w r8, [pc, #316] ; 8001030 while(hi2c->XferSize > 0U) 8000ef4: 8d23 ldrh r3, [r4, #40] ; 0x28 8000ef6: 2b00 cmp r3, #0 8000ef8: d0de beq.n 8000eb8 if(hi2c->XferSize <= 3U) 8000efa: 2b03 cmp r3, #3 8000efc: d877 bhi.n 8000fee if(hi2c->XferSize== 1U) 8000efe: 2b01 cmp r3, #1 8000f00: d127 bne.n 8000f52 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8000f02: 4632 mov r2, r6 8000f04: 4639 mov r1, r7 8000f06: 4620 mov r0, r4 8000f08: f7ff fe0a bl 8000b20 8000f0c: 2800 cmp r0, #0 8000f0e: d03f beq.n 8000f90 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) 8000f10: 6c23 ldr r3, [r4, #64] ; 0x40 8000f12: 2b20 cmp r3, #32 8000f14: d1c1 bne.n 8000e9a return HAL_TIMEOUT; 8000f16: 2503 movs r5, #3 8000f18: e77c b.n 8000e14 else if(hi2c->XferSize == 2U) 8000f1a: 2a02 cmp r2, #2 hi2c->Instance->CR1 |= I2C_CR1_POS; 8000f1c: 681a ldr r2, [r3, #0] else if(hi2c->XferSize == 2U) 8000f1e: d10e bne.n 8000f3e hi2c->Instance->CR1 |= I2C_CR1_POS; 8000f20: f442 6200 orr.w r2, r2, #2048 ; 0x800 8000f24: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 8000f26: b672 cpsid i __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000f28: 6823 ldr r3, [r4, #0] 8000f2a: 9004 str r0, [sp, #16] 8000f2c: 695a ldr r2, [r3, #20] 8000f2e: 9204 str r2, [sp, #16] 8000f30: 699a ldr r2, [r3, #24] 8000f32: 9204 str r2, [sp, #16] 8000f34: 9a04 ldr r2, [sp, #16] hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8000f36: 681a ldr r2, [r3, #0] 8000f38: f422 6280 bic.w r2, r2, #1024 ; 0x400 8000f3c: e7d6 b.n 8000eec SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8000f3e: f442 6280 orr.w r2, r2, #1024 ; 0x400 8000f42: 601a str r2, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8000f44: 9005 str r0, [sp, #20] 8000f46: 695a ldr r2, [r3, #20] 8000f48: 9205 str r2, [sp, #20] 8000f4a: 699b ldr r3, [r3, #24] 8000f4c: 9305 str r3, [sp, #20] 8000f4e: 9b05 ldr r3, [sp, #20] 8000f50: e7ce b.n 8000ef0 else if(hi2c->XferSize == 2U) 8000f52: 2b02 cmp r3, #2 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000f54: 9600 str r6, [sp, #0] 8000f56: 463b mov r3, r7 8000f58: f04f 0200 mov.w r2, #0 8000f5c: 4641 mov r1, r8 8000f5e: 4620 mov r0, r4 else if(hi2c->XferSize == 2U) 8000f60: d124 bne.n 8000fac if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000f62: f7ff fcbd bl 80008e0 8000f66: 2800 cmp r0, #0 8000f68: d1d5 bne.n 8000f16 8000f6a: b672 cpsid i hi2c->Instance->CR1 |= I2C_CR1_STOP; 8000f6c: 6823 ldr r3, [r4, #0] 8000f6e: 681a ldr r2, [r3, #0] 8000f70: f442 7200 orr.w r2, r2, #512 ; 0x200 8000f74: 601a str r2, [r3, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8000f76: 6a62 ldr r2, [r4, #36] ; 0x24 8000f78: 691b ldr r3, [r3, #16] 8000f7a: 1c51 adds r1, r2, #1 8000f7c: 6261 str r1, [r4, #36] ; 0x24 8000f7e: 7013 strb r3, [r2, #0] hi2c->XferSize--; 8000f80: 8d23 ldrh r3, [r4, #40] ; 0x28 8000f82: 3b01 subs r3, #1 8000f84: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8000f86: 8d63 ldrh r3, [r4, #42] ; 0x2a 8000f88: 3b01 subs r3, #1 8000f8a: b29b uxth r3, r3 8000f8c: 8563 strh r3, [r4, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 8000f8e: b662 cpsie i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8000f90: 6a63 ldr r3, [r4, #36] ; 0x24 8000f92: 1c5a adds r2, r3, #1 8000f94: 6262 str r2, [r4, #36] ; 0x24 8000f96: 6822 ldr r2, [r4, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8000f98: 6912 ldr r2, [r2, #16] 8000f9a: 701a strb r2, [r3, #0] hi2c->XferSize--; 8000f9c: 8d23 ldrh r3, [r4, #40] ; 0x28 8000f9e: 3b01 subs r3, #1 8000fa0: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8000fa2: 8d63 ldrh r3, [r4, #42] ; 0x2a 8000fa4: 3b01 subs r3, #1 8000fa6: b29b uxth r3, r3 8000fa8: 8563 strh r3, [r4, #42] ; 0x2a 8000faa: e7a3 b.n 8000ef4 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000fac: f7ff fc98 bl 80008e0 8000fb0: 4602 mov r2, r0 8000fb2: 2800 cmp r0, #0 8000fb4: d1af bne.n 8000f16 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8000fb6: 6821 ldr r1, [r4, #0] 8000fb8: 680b ldr r3, [r1, #0] 8000fba: f423 6380 bic.w r3, r3, #1024 ; 0x400 8000fbe: 600b str r3, [r1, #0] __ASM volatile ("cpsid i" : : : "memory"); 8000fc0: b672 cpsid i (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8000fc2: 6a63 ldr r3, [r4, #36] ; 0x24 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000fc4: 4620 mov r0, r4 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8000fc6: 1c59 adds r1, r3, #1 8000fc8: 6261 str r1, [r4, #36] ; 0x24 8000fca: 6821 ldr r1, [r4, #0] 8000fcc: 6909 ldr r1, [r1, #16] 8000fce: 7019 strb r1, [r3, #0] hi2c->XferSize--; 8000fd0: 8d23 ldrh r3, [r4, #40] ; 0x28 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000fd2: 9600 str r6, [sp, #0] hi2c->XferSize--; 8000fd4: 3b01 subs r3, #1 8000fd6: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8000fd8: 8d63 ldrh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000fda: 4641 mov r1, r8 hi2c->XferCount--; 8000fdc: 3b01 subs r3, #1 8000fde: b29b uxth r3, r3 8000fe0: 8563 strh r3, [r4, #42] ; 0x2a if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8000fe2: 463b mov r3, r7 8000fe4: f7ff fc7c bl 80008e0 8000fe8: 2800 cmp r0, #0 8000fea: d0bf beq.n 8000f6c 8000fec: e793 b.n 8000f16 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8000fee: 4632 mov r2, r6 8000ff0: 4639 mov r1, r7 8000ff2: 4620 mov r0, r4 8000ff4: f7ff fd94 bl 8000b20 8000ff8: 2800 cmp r0, #0 8000ffa: d189 bne.n 8000f10 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8000ffc: 6a63 ldr r3, [r4, #36] ; 0x24 8000ffe: 1c5a adds r2, r3, #1 8001000: 6262 str r2, [r4, #36] ; 0x24 8001002: 6822 ldr r2, [r4, #0] 8001004: 6912 ldr r2, [r2, #16] 8001006: 701a strb r2, [r3, #0] hi2c->XferSize--; 8001008: 8d23 ldrh r3, [r4, #40] ; 0x28 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 800100a: 6822 ldr r2, [r4, #0] hi2c->XferSize--; 800100c: 3b01 subs r3, #1 800100e: 8523 strh r3, [r4, #40] ; 0x28 hi2c->XferCount--; 8001010: 8d63 ldrh r3, [r4, #42] ; 0x2a 8001012: 3b01 subs r3, #1 8001014: b29b uxth r3, r3 8001016: 8563 strh r3, [r4, #42] ; 0x2a if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 8001018: 6953 ldr r3, [r2, #20] 800101a: 075b lsls r3, r3, #29 800101c: f57f af6a bpl.w 8000ef4 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001020: 6a63 ldr r3, [r4, #36] ; 0x24 8001022: 1c59 adds r1, r3, #1 8001024: 6261 str r1, [r4, #36] ; 0x24 8001026: e7b7 b.n 8000f98 8001028: 00100002 .word 0x00100002 800102c: ffff0000 .word 0xffff0000 8001030: 00010004 .word 0x00010004 08001034 : 8001034: 4770 bx lr 08001036 : 8001036: 4770 bx lr 08001038 : 8001038: 4770 bx lr 0800103a : 800103a: 4770 bx lr 0800103c : { 800103c: 4770 bx lr 0800103e : 800103e: 4770 bx lr 08001040 : 8001040: 4770 bx lr 08001042 : 8001042: 4770 bx lr 08001044 : 8001044: 4770 bx lr 08001046 : { 8001046: 4770 bx lr 08001048 : uint32_t CurrentState = hi2c->State; 8001048: f890 303d ldrb.w r3, [r0, #61] ; 0x3d { 800104c: b510 push {r4, lr} if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) 800104e: 3b29 subs r3, #41 ; 0x29 8001050: 2b01 cmp r3, #1 { 8001052: 4604 mov r4, r0 8001054: 6803 ldr r3, [r0, #0] if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) 8001056: d839 bhi.n 80010cc hi2c->PreviousState = I2C_STATE_NONE; 8001058: 2200 movs r2, #0 800105a: 6302 str r2, [r0, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 800105c: 2228 movs r2, #40 ; 0x28 800105e: f880 203d strb.w r2, [r0, #61] ; 0x3d hi2c->Instance->CR1 &= ~I2C_CR1_POS; 8001062: 681a ldr r2, [r3, #0] 8001064: f422 6200 bic.w r2, r2, #2048 ; 0x800 8001068: 601a str r2, [r3, #0] if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 800106a: 685a ldr r2, [r3, #4] 800106c: f412 6200 ands.w r2, r2, #2048 ; 0x800 8001070: d054 beq.n 800111c hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; 8001072: 685a ldr r2, [r3, #4] if(hi2c->hdmatx->State != HAL_DMA_STATE_READY) 8001074: 6b60 ldr r0, [r4, #52] ; 0x34 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; 8001076: f422 6200 bic.w r2, r2, #2048 ; 0x800 800107a: 605a str r2, [r3, #4] if(hi2c->hdmatx->State != HAL_DMA_STATE_READY) 800107c: f890 3021 ldrb.w r3, [r0, #33] ; 0x21 8001080: 2b01 cmp r3, #1 8001082: 4b39 ldr r3, [pc, #228] ; (8001168 ) 8001084: d031 beq.n 80010ea hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; 8001086: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) 8001088: f7ff faa4 bl 80005d4 800108c: b150 cbz r0, 80010a4 __HAL_I2C_DISABLE(hi2c); 800108e: 6822 ldr r2, [r4, #0] hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); 8001090: 6b60 ldr r0, [r4, #52] ; 0x34 __HAL_I2C_DISABLE(hi2c); 8001092: 6813 ldr r3, [r2, #0] 8001094: f023 0301 bic.w r3, r3, #1 8001098: 6013 str r3, [r2, #0] hi2c->State = HAL_I2C_STATE_READY; 800109a: 2320 movs r3, #32 800109c: f884 303d strb.w r3, [r4, #61] ; 0x3d hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); 80010a0: 6b43 ldr r3, [r0, #52] ; 0x34 80010a2: 4798 blx r3 if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF)) 80010a4: f894 303d ldrb.w r3, [r4, #61] ; 0x3d 80010a8: 2b28 cmp r3, #40 ; 0x28 80010aa: d10e bne.n 80010ca 80010ac: 6c23 ldr r3, [r4, #64] ; 0x40 80010ae: 075b lsls r3, r3, #29 80010b0: d50b bpl.n 80010ca hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80010b2: 4b2e ldr r3, [pc, #184] ; (800116c ) hi2c->State = HAL_I2C_STATE_READY; 80010b4: 2220 movs r2, #32 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80010b6: 62e3 str r3, [r4, #44] ; 0x2c hi2c->PreviousState = I2C_STATE_NONE; 80010b8: 2300 movs r3, #0 HAL_I2C_ListenCpltCallback(hi2c); 80010ba: 4620 mov r0, r4 hi2c->PreviousState = I2C_STATE_NONE; 80010bc: 6323 str r3, [r4, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 80010be: f884 203d strb.w r2, [r4, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80010c2: f884 303e strb.w r3, [r4, #62] ; 0x3e HAL_I2C_ListenCpltCallback(hi2c); 80010c6: f7ff ffba bl 800103e 80010ca: bd10 pop {r4, pc} if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN)) 80010cc: f890 203d ldrb.w r2, [r0, #61] ; 0x3d 80010d0: 2a60 cmp r2, #96 ; 0x60 80010d2: d005 beq.n 80010e0 80010d4: 685a ldr r2, [r3, #4] 80010d6: 0512 lsls r2, r2, #20 hi2c->State = HAL_I2C_STATE_READY; 80010d8: bf5c itt pl 80010da: 2220 movpl r2, #32 80010dc: f880 203d strbpl.w r2, [r0, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 80010e0: 2200 movs r2, #0 80010e2: 6322 str r2, [r4, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 80010e4: f884 203e strb.w r2, [r4, #62] ; 0x3e 80010e8: e7bb b.n 8001062 hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; 80010ea: 6ba0 ldr r0, [r4, #56] ; 0x38 80010ec: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) 80010ee: f7ff fa71 bl 80005d4 80010f2: 2800 cmp r0, #0 80010f4: d0d6 beq.n 80010a4 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 80010f6: 6822 ldr r2, [r4, #0] 80010f8: 6953 ldr r3, [r2, #20] 80010fa: 0658 lsls r0, r3, #25 80010fc: d504 bpl.n 8001108 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80010fe: 6a63 ldr r3, [r4, #36] ; 0x24 8001100: 6912 ldr r2, [r2, #16] 8001102: 1c59 adds r1, r3, #1 8001104: 6261 str r1, [r4, #36] ; 0x24 8001106: 701a strb r2, [r3, #0] __HAL_I2C_DISABLE(hi2c); 8001108: 6822 ldr r2, [r4, #0] hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); 800110a: 6ba0 ldr r0, [r4, #56] ; 0x38 __HAL_I2C_DISABLE(hi2c); 800110c: 6813 ldr r3, [r2, #0] 800110e: f023 0301 bic.w r3, r3, #1 8001112: 6013 str r3, [r2, #0] hi2c->State = HAL_I2C_STATE_READY; 8001114: 2320 movs r3, #32 8001116: f884 303d strb.w r3, [r4, #61] ; 0x3d 800111a: e7c1 b.n 80010a0 else if(hi2c->State == HAL_I2C_STATE_ABORT) 800111c: f894 103d ldrb.w r1, [r4, #61] ; 0x3d 8001120: 2960 cmp r1, #96 ; 0x60 8001122: d114 bne.n 800114e hi2c->State = HAL_I2C_STATE_READY; 8001124: 2120 movs r1, #32 8001126: f884 103d strb.w r1, [r4, #61] ; 0x3d hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 800112a: 6422 str r2, [r4, #64] ; 0x40 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 800112c: 695a ldr r2, [r3, #20] 800112e: 0651 lsls r1, r2, #25 8001130: d504 bpl.n 800113c (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001132: 6a62 ldr r2, [r4, #36] ; 0x24 8001134: 691b ldr r3, [r3, #16] 8001136: 1c51 adds r1, r2, #1 8001138: 6261 str r1, [r4, #36] ; 0x24 800113a: 7013 strb r3, [r2, #0] __HAL_I2C_DISABLE(hi2c); 800113c: 6822 ldr r2, [r4, #0] HAL_I2C_AbortCpltCallback(hi2c); 800113e: 4620 mov r0, r4 __HAL_I2C_DISABLE(hi2c); 8001140: 6813 ldr r3, [r2, #0] 8001142: f023 0301 bic.w r3, r3, #1 8001146: 6013 str r3, [r2, #0] HAL_I2C_AbortCpltCallback(hi2c); 8001148: f7ff ff7d bl 8001046 800114c: e7aa b.n 80010a4 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 800114e: 695a ldr r2, [r3, #20] 8001150: 0652 lsls r2, r2, #25 8001152: d504 bpl.n 800115e (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001154: 6a62 ldr r2, [r4, #36] ; 0x24 8001156: 691b ldr r3, [r3, #16] 8001158: 1c51 adds r1, r2, #1 800115a: 6261 str r1, [r4, #36] ; 0x24 800115c: 7013 strb r3, [r2, #0] HAL_I2C_ErrorCallback(hi2c); 800115e: 4620 mov r0, r4 8001160: f7ff ff70 bl 8001044 8001164: e79e b.n 80010a4 8001166: bf00 nop 8001168: 08001845 .word 0x08001845 800116c: ffff0000 .word 0xffff0000 08001170 : uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2); 8001170: 6803 ldr r3, [r0, #0] { 8001172: b5f0 push {r4, r5, r6, r7, lr} uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2); 8001174: 699d ldr r5, [r3, #24] uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1); 8001176: 6959 ldr r1, [r3, #20] uint32_t itsources = READ_REG(hi2c->Instance->CR2); 8001178: 685a ldr r2, [r3, #4] uint32_t CurrentMode = hi2c->Mode; 800117a: f890 403e ldrb.w r4, [r0, #62] ; 0x3e { 800117e: b08d sub sp, #52 ; 0x34 uint32_t CurrentMode = hi2c->Mode; 8001180: b2e4 uxtb r4, r4 if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) 8001182: 2c10 cmp r4, #16 8001184: d002 beq.n 800118c 8001186: 2c40 cmp r4, #64 ; 0x40 8001188: f040 8256 bne.w 8001638 if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 800118c: f011 1f01 tst.w r1, #65537 ; 0x10001 8001190: d066 beq.n 8001260 8001192: 0597 lsls r7, r2, #22 8001194: d564 bpl.n 8001260 if(hi2c->Mode == HAL_I2C_MODE_MEM) 8001196: f890 403e ldrb.w r4, [r0, #62] ; 0x3e 800119a: 2c40 cmp r4, #64 ; 0x40 800119c: d143 bne.n 8001226 if(hi2c->EventCount == 0U) 800119e: 6d04 ldr r4, [r0, #80] ; 0x50 80011a0: 2c00 cmp r4, #0 80011a2: d13b bne.n 800121c hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress); 80011a4: 6c44 ldr r4, [r0, #68] ; 0x44 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress); 80011a6: f004 04fe and.w r4, r4, #254 ; 0xfe hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress); 80011aa: 611c str r4, [r3, #16] if((sr2itflags & I2C_FLAG_TRA) != RESET) 80011ac: 4e94 ldr r6, [pc, #592] ; (8001400 ) 80011ae: 4c95 ldr r4, [pc, #596] ; (8001404 ) 80011b0: 402e ands r6, r5 80011b2: 400c ands r4, r1 80011b4: 2e00 cmp r6, #0 80011b6: f000 81a2 beq.w 80014fe if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 80011ba: 4d93 ldr r5, [pc, #588] ; (8001408 ) 80011bc: 400d ands r5, r1 80011be: 2d00 cmp r5, #0 80011c0: f000 8169 beq.w 8001496 80011c4: 0555 lsls r5, r2, #21 80011c6: f140 8166 bpl.w 8001496 80011ca: 2c00 cmp r4, #0 80011cc: f040 8163 bne.w 8001496 uint32_t CurrentState = hi2c->State; 80011d0: f890 203d ldrb.w r2, [r0, #61] ; 0x3d if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX)) 80011d4: 8d05 ldrh r5, [r0, #40] ; 0x28 uint32_t CurrentMode = hi2c->Mode; 80011d6: f890 103e ldrb.w r1, [r0, #62] ; 0x3e uint32_t CurrentState = hi2c->State; 80011da: b2d2 uxtb r2, r2 uint32_t CurrentMode = hi2c->Mode; 80011dc: b2c9 uxtb r1, r1 uint32_t CurrentXferOptions = hi2c->XferOptions; 80011de: 6ac4 ldr r4, [r0, #44] ; 0x2c if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX)) 80011e0: 2d00 cmp r5, #0 80011e2: f040 8117 bne.w 8001414 80011e6: 2a21 cmp r2, #33 ; 0x21 80011e8: f040 8116 bne.w 8001418 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 80011ec: 2c04 cmp r4, #4 80011ee: f000 816f beq.w 80014d0 80011f2: 2c08 cmp r4, #8 80011f4: f000 816c beq.w 80014d0 80011f8: f514 3f80 cmn.w r4, #65536 ; 0x10000 80011fc: f000 8168 beq.w 80014d0 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 8001200: 685a ldr r2, [r3, #4] 8001202: f422 62e0 bic.w r2, r2, #1792 ; 0x700 8001206: 605a str r2, [r3, #4] hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; 8001208: 2311 movs r3, #17 800120a: 6303 str r3, [r0, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 800120c: f880 503e strb.w r5, [r0, #62] ; 0x3e hi2c->State = HAL_I2C_STATE_READY; 8001210: 2320 movs r3, #32 8001212: f880 303d strb.w r3, [r0, #61] ; 0x3d HAL_I2C_MasterTxCpltCallback(hi2c); 8001216: f7ff ff0d bl 8001034 800121a: e118 b.n 800144e hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress); 800121c: 6c44 ldr r4, [r0, #68] ; 0x44 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress); 800121e: f044 0401 orr.w r4, r4, #1 8001222: b2e4 uxtb r4, r4 8001224: e7c1 b.n 80011aa if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 8001226: 6904 ldr r4, [r0, #16] 8001228: f5b4 4f80 cmp.w r4, #16384 ; 0x4000 800122c: d105 bne.n 800123a if(hi2c->State == HAL_I2C_STATE_BUSY_TX) 800122e: f890 403d ldrb.w r4, [r0, #61] ; 0x3d 8001232: 2c21 cmp r4, #33 ; 0x21 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress); 8001234: 6c44 ldr r4, [r0, #68] ; 0x44 if(hi2c->State == HAL_I2C_STATE_BUSY_TX) 8001236: d1f2 bne.n 800121e 8001238: e7b5 b.n 80011a6 if(hi2c->EventCount == 0U) 800123a: 6d04 ldr r4, [r0, #80] ; 0x50 800123c: b934 cbnz r4, 800124c hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress); 800123e: 6c44 ldr r4, [r0, #68] ; 0x44 8001240: 11e4 asrs r4, r4, #7 8001242: f004 0406 and.w r4, r4, #6 8001246: f044 04f0 orr.w r4, r4, #240 ; 0xf0 800124a: e7ae b.n 80011aa else if(hi2c->EventCount == 1U) 800124c: 6d04 ldr r4, [r0, #80] ; 0x50 800124e: 2c01 cmp r4, #1 8001250: d1ac bne.n 80011ac hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress); 8001252: 6c44 ldr r4, [r0, #68] ; 0x44 8001254: 11e4 asrs r4, r4, #7 8001256: f004 0406 and.w r4, r4, #6 800125a: f044 04f1 orr.w r4, r4, #241 ; 0xf1 800125e: e7a4 b.n 80011aa else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 8001260: 4c6a ldr r4, [pc, #424] ; (800140c ) 8001262: 400c ands r4, r1 8001264: b11c cbz r4, 800126e 8001266: 0596 lsls r6, r2, #22 8001268: d501 bpl.n 800126e hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress); 800126a: 6c44 ldr r4, [r0, #68] ; 0x44 800126c: e7d9 b.n 8001222 else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 800126e: 4c68 ldr r4, [pc, #416] ; (8001410 ) 8001270: 400c ands r4, r1 8001272: 2c00 cmp r4, #0 8001274: d09a beq.n 80011ac 8001276: 0594 lsls r4, r2, #22 8001278: d598 bpl.n 80011ac uint32_t CurrentMode = hi2c->Mode; 800127a: f890 403e ldrb.w r4, [r0, #62] ; 0x3e uint32_t CurrentXferOptions = hi2c->XferOptions; 800127e: 6ac6 ldr r6, [r0, #44] ; 0x2c uint32_t Prev_State = hi2c->PreviousState; 8001280: f8d0 e030 ldr.w lr, [r0, #48] ; 0x30 if(hi2c->State == HAL_I2C_STATE_BUSY_RX) 8001284: f890 703d ldrb.w r7, [r0, #61] ; 0x3d uint32_t CurrentMode = hi2c->Mode; 8001288: b2e4 uxtb r4, r4 if(hi2c->State == HAL_I2C_STATE_BUSY_RX) 800128a: 2f22 cmp r7, #34 ; 0x22 800128c: f040 80af bne.w 80013ee if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM)) 8001290: 6d07 ldr r7, [r0, #80] ; 0x50 8001292: b947 cbnz r7, 80012a6 8001294: 2c40 cmp r4, #64 ; 0x40 8001296: d106 bne.n 80012a6 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001298: 9700 str r7, [sp, #0] 800129a: 695c ldr r4, [r3, #20] 800129c: 9400 str r4, [sp, #0] 800129e: 699c ldr r4, [r3, #24] 80012a0: 9400 str r4, [sp, #0] 80012a2: 9c00 ldr r4, [sp, #0] 80012a4: e782 b.n 80011ac else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)) 80012a6: 6d04 ldr r4, [r0, #80] ; 0x50 80012a8: b98c cbnz r4, 80012ce 80012aa: 6907 ldr r7, [r0, #16] 80012ac: f5b7 4f40 cmp.w r7, #49152 ; 0xc000 80012b0: d10d bne.n 80012ce __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80012b2: 9401 str r4, [sp, #4] 80012b4: 695c ldr r4, [r3, #20] 80012b6: 9401 str r4, [sp, #4] 80012b8: 699c ldr r4, [r3, #24] 80012ba: 9401 str r4, [sp, #4] 80012bc: 9c01 ldr r4, [sp, #4] hi2c->Instance->CR1 |= I2C_CR1_START; 80012be: 681c ldr r4, [r3, #0] 80012c0: f444 7480 orr.w r4, r4, #256 ; 0x100 80012c4: 601c str r4, [r3, #0] hi2c->EventCount++; 80012c6: 6d04 ldr r4, [r0, #80] ; 0x50 80012c8: 3401 adds r4, #1 hi2c->EventCount = 0U; 80012ca: 6504 str r4, [r0, #80] ; 0x50 80012cc: e76e b.n 80011ac if(hi2c->XferCount == 0U) 80012ce: 8d44 ldrh r4, [r0, #42] ; 0x2a 80012d0: b2a4 uxth r4, r4 80012d2: b954 cbnz r4, 80012ea __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80012d4: 9402 str r4, [sp, #8] 80012d6: 695c ldr r4, [r3, #20] 80012d8: 9402 str r4, [sp, #8] 80012da: 699c ldr r4, [r3, #24] 80012dc: 9402 str r4, [sp, #8] 80012de: 9c02 ldr r4, [sp, #8] hi2c->Instance->CR1 |= I2C_CR1_STOP; 80012e0: 681c ldr r4, [r3, #0] 80012e2: f444 7400 orr.w r4, r4, #512 ; 0x200 80012e6: 601c str r4, [r3, #0] 80012e8: e019 b.n 800131e else if(hi2c->XferCount == 1U) 80012ea: 8d44 ldrh r4, [r0, #42] ; 0x2a 80012ec: b2a4 uxth r4, r4 80012ee: 2c01 cmp r4, #1 80012f0: d142 bne.n 8001378 if(CurrentXferOptions == I2C_NO_OPTION_FRAME) 80012f2: f516 3f80 cmn.w r6, #65536 ; 0x10000 80012f6: d11b bne.n 8001330 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 80012f8: 681c ldr r4, [r3, #0] 80012fa: f424 6480 bic.w r4, r4, #1024 ; 0x400 80012fe: 601c str r4, [r3, #0] if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 8001300: 685c ldr r4, [r3, #4] 8001302: f414 6400 ands.w r4, r4, #2048 ; 0x800 8001306: d00c beq.n 8001322 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001308: 681c ldr r4, [r3, #0] 800130a: f424 6480 bic.w r4, r4, #1024 ; 0x400 800130e: 601c str r4, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001310: 2400 movs r4, #0 8001312: 9403 str r4, [sp, #12] 8001314: 695c ldr r4, [r3, #20] 8001316: 9403 str r4, [sp, #12] 8001318: 699c ldr r4, [r3, #24] 800131a: 9403 str r4, [sp, #12] 800131c: 9c03 ldr r4, [sp, #12] hi2c->EventCount = 0U; 800131e: 2400 movs r4, #0 8001320: e7d3 b.n 80012ca __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001322: 9404 str r4, [sp, #16] 8001324: 695c ldr r4, [r3, #20] 8001326: 9404 str r4, [sp, #16] 8001328: 699c ldr r4, [r3, #24] 800132a: 9404 str r4, [sp, #16] 800132c: 9c04 ldr r4, [sp, #16] 800132e: e7d7 b.n 80012e0 else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \ 8001330: 2e04 cmp r6, #4 8001332: d015 beq.n 8001360 8001334: 2e08 cmp r6, #8 8001336: d013 beq.n 8001360 && (Prev_State != I2C_STATE_MASTER_BUSY_RX)) 8001338: f1be 0f12 cmp.w lr, #18 800133c: d010 beq.n 8001360 if(hi2c->XferOptions != I2C_NEXT_FRAME) 800133e: 6ac4 ldr r4, [r0, #44] ; 0x2c 8001340: 2c02 cmp r4, #2 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001342: 681c ldr r4, [r3, #0] 8001344: bf14 ite ne 8001346: f424 6480 bicne.w r4, r4, #1024 ; 0x400 hi2c->Instance->CR1 |= I2C_CR1_ACK; 800134a: f444 6480 orreq.w r4, r4, #1024 ; 0x400 800134e: 601c str r4, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001350: 2400 movs r4, #0 8001352: 9405 str r4, [sp, #20] 8001354: 695c ldr r4, [r3, #20] 8001356: 9405 str r4, [sp, #20] 8001358: 699c ldr r4, [r3, #24] 800135a: 9405 str r4, [sp, #20] 800135c: 9c05 ldr r4, [sp, #20] 800135e: e7de b.n 800131e hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001360: 681c ldr r4, [r3, #0] 8001362: f424 6480 bic.w r4, r4, #1024 ; 0x400 8001366: 601c str r4, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001368: 2400 movs r4, #0 800136a: 9406 str r4, [sp, #24] 800136c: 695c ldr r4, [r3, #20] 800136e: 9406 str r4, [sp, #24] 8001370: 699c ldr r4, [r3, #24] 8001372: 9406 str r4, [sp, #24] 8001374: 9c06 ldr r4, [sp, #24] 8001376: e7b3 b.n 80012e0 else if(hi2c->XferCount == 2U) 8001378: 8d44 ldrh r4, [r0, #42] ; 0x2a 800137a: b2a4 uxth r4, r4 800137c: 2c02 cmp r4, #2 800137e: d123 bne.n 80013c8 if(hi2c->XferOptions != I2C_NEXT_FRAME) 8001380: 6ac4 ldr r4, [r0, #44] ; 0x2c 8001382: 2600 movs r6, #0 8001384: 2c02 cmp r4, #2 hi2c->Instance->CR1 |= I2C_CR1_POS; 8001386: 681c ldr r4, [r3, #0] if(hi2c->XferOptions != I2C_NEXT_FRAME) 8001388: d014 beq.n 80013b4 hi2c->Instance->CR1 |= I2C_CR1_POS; 800138a: f444 6400 orr.w r4, r4, #2048 ; 0x800 800138e: 601c str r4, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8001390: 9607 str r6, [sp, #28] 8001392: 695c ldr r4, [r3, #20] 8001394: 9407 str r4, [sp, #28] 8001396: 699c ldr r4, [r3, #24] 8001398: 9407 str r4, [sp, #28] 800139a: 9c07 ldr r4, [sp, #28] hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 800139c: 681c ldr r4, [r3, #0] 800139e: f424 6480 bic.w r4, r4, #1024 ; 0x400 80013a2: 601c str r4, [r3, #0] if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 80013a4: 685c ldr r4, [r3, #4] 80013a6: 0527 lsls r7, r4, #20 80013a8: d5b9 bpl.n 800131e hi2c->Instance->CR2 |= I2C_CR2_LAST; 80013aa: 685c ldr r4, [r3, #4] 80013ac: f444 5480 orr.w r4, r4, #4096 ; 0x1000 80013b0: 605c str r4, [r3, #4] 80013b2: e7b4 b.n 800131e hi2c->Instance->CR1 |= I2C_CR1_ACK; 80013b4: f444 6480 orr.w r4, r4, #1024 ; 0x400 80013b8: 601c str r4, [r3, #0] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80013ba: 9608 str r6, [sp, #32] 80013bc: 695c ldr r4, [r3, #20] 80013be: 9408 str r4, [sp, #32] 80013c0: 699c ldr r4, [r3, #24] 80013c2: 9408 str r4, [sp, #32] 80013c4: 9c08 ldr r4, [sp, #32] 80013c6: e7ed b.n 80013a4 hi2c->Instance->CR1 |= I2C_CR1_ACK; 80013c8: 681c ldr r4, [r3, #0] 80013ca: f444 6480 orr.w r4, r4, #1024 ; 0x400 80013ce: 601c str r4, [r3, #0] if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 80013d0: 685c ldr r4, [r3, #4] 80013d2: 0526 lsls r6, r4, #20 hi2c->Instance->CR2 |= I2C_CR2_LAST; 80013d4: bf42 ittt mi 80013d6: 685c ldrmi r4, [r3, #4] 80013d8: f444 5480 orrmi.w r4, r4, #4096 ; 0x1000 80013dc: 605c strmi r4, [r3, #4] __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80013de: 2400 movs r4, #0 80013e0: 9409 str r4, [sp, #36] ; 0x24 80013e2: 695c ldr r4, [r3, #20] 80013e4: 9409 str r4, [sp, #36] ; 0x24 80013e6: 699c ldr r4, [r3, #24] 80013e8: 9409 str r4, [sp, #36] ; 0x24 80013ea: 9c09 ldr r4, [sp, #36] ; 0x24 80013ec: e797 b.n 800131e __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80013ee: 2400 movs r4, #0 80013f0: 940a str r4, [sp, #40] ; 0x28 80013f2: 695c ldr r4, [r3, #20] 80013f4: 940a str r4, [sp, #40] ; 0x28 80013f6: 699c ldr r4, [r3, #24] 80013f8: 940a str r4, [sp, #40] ; 0x28 80013fa: 9c0a ldr r4, [sp, #40] ; 0x28 80013fc: e6d6 b.n 80011ac 80013fe: bf00 nop 8001400: 00100004 .word 0x00100004 8001404: 00010004 .word 0x00010004 8001408: 00010080 .word 0x00010080 800140c: 00010008 .word 0x00010008 8001410: 00010002 .word 0x00010002 else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \ 8001414: 2a21 cmp r2, #33 ; 0x21 8001416: d003 beq.n 8001420 8001418: 2940 cmp r1, #64 ; 0x40 800141a: d118 bne.n 800144e ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX))) 800141c: 2a22 cmp r2, #34 ; 0x22 800141e: d116 bne.n 800144e if(hi2c->XferCount == 0U) 8001420: 8d42 ldrh r2, [r0, #42] ; 0x2a 8001422: b292 uxth r2, r2 8001424: b922 cbnz r2, 8001430 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8001426: 685a ldr r2, [r3, #4] 8001428: f422 6280 bic.w r2, r2, #1024 ; 0x400 800142c: 605a str r2, [r3, #4] 800142e: e00e b.n 800144e if(hi2c->Mode == HAL_I2C_MODE_MEM) 8001430: f890 203e ldrb.w r2, [r0, #62] ; 0x3e 8001434: 2a40 cmp r2, #64 ; 0x40 8001436: d128 bne.n 800148a if(hi2c->EventCount == 0) 8001438: 6d02 ldr r2, [r0, #80] ; 0x50 800143a: b982 cbnz r2, 800145e if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT) 800143c: 6cc2 ldr r2, [r0, #76] ; 0x4c 800143e: 2a01 cmp r2, #1 hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); 8001440: 6c82 ldr r2, [r0, #72] ; 0x48 if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT) 8001442: d106 bne.n 8001452 8001444: b2d2 uxtb r2, r2 hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); 8001446: 611a str r2, [r3, #16] hi2c->EventCount += 2; 8001448: 6d03 ldr r3, [r0, #80] ; 0x50 800144a: 3302 adds r3, #2 hi2c->EventCount++; 800144c: 6503 str r3, [r0, #80] ; 0x50 } 800144e: b00d add sp, #52 ; 0x34 8001450: bdf0 pop {r4, r5, r6, r7, pc} hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress); 8001452: f3c2 2207 ubfx r2, r2, #8, #8 8001456: 611a str r2, [r3, #16] hi2c->EventCount++; 8001458: 6d03 ldr r3, [r0, #80] ; 0x50 800145a: 3301 adds r3, #1 800145c: e7f6 b.n 800144c else if(hi2c->EventCount == 1) 800145e: 6d02 ldr r2, [r0, #80] ; 0x50 8001460: 2a01 cmp r2, #1 8001462: d102 bne.n 800146a hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); 8001464: 6c82 ldr r2, [r0, #72] ; 0x48 8001466: b2d2 uxtb r2, r2 8001468: e7f5 b.n 8001456 else if(hi2c->EventCount == 2) 800146a: 6d02 ldr r2, [r0, #80] ; 0x50 800146c: 2a02 cmp r2, #2 800146e: d1ee bne.n 800144e if(hi2c->State == HAL_I2C_STATE_BUSY_RX) 8001470: f890 203d ldrb.w r2, [r0, #61] ; 0x3d 8001474: 2a22 cmp r2, #34 ; 0x22 8001476: d104 bne.n 8001482 hi2c->Instance->CR1 |= I2C_CR1_START; 8001478: 681a ldr r2, [r3, #0] 800147a: f442 7280 orr.w r2, r2, #256 ; 0x100 800147e: 601a str r2, [r3, #0] 8001480: e7e5 b.n 800144e else if(hi2c->State == HAL_I2C_STATE_BUSY_TX) 8001482: f890 203d ldrb.w r2, [r0, #61] ; 0x3d 8001486: 2a21 cmp r2, #33 ; 0x21 8001488: d1e1 bne.n 800144e hi2c->Instance->DR = (*hi2c->pBuffPtr++); 800148a: 6a42 ldr r2, [r0, #36] ; 0x24 800148c: 1c51 adds r1, r2, #1 800148e: 6241 str r1, [r0, #36] ; 0x24 8001490: 7812 ldrb r2, [r2, #0] 8001492: 611a str r2, [r3, #16] 8001494: e099 b.n 80015ca else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 8001496: 2c00 cmp r4, #0 8001498: d0d9 beq.n 800144e 800149a: 0594 lsls r4, r2, #22 800149c: d5d7 bpl.n 800144e uint32_t CurrentXferOptions = hi2c->XferOptions; 800149e: 6ac1 ldr r1, [r0, #44] ; 0x2c if(hi2c->State == HAL_I2C_STATE_BUSY_TX) 80014a0: f890 203d ldrb.w r2, [r0, #61] ; 0x3d 80014a4: 2a21 cmp r2, #33 ; 0x21 80014a6: d1d2 bne.n 800144e if(hi2c->XferCount != 0U) 80014a8: 8d42 ldrh r2, [r0, #42] ; 0x2a 80014aa: b292 uxth r2, r2 80014ac: 2a00 cmp r2, #0 80014ae: d1ec bne.n 800148a if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 80014b0: 2904 cmp r1, #4 80014b2: d00d beq.n 80014d0 80014b4: 2908 cmp r1, #8 80014b6: d00b beq.n 80014d0 80014b8: f511 3f80 cmn.w r1, #65536 ; 0x10000 80014bc: d008 beq.n 80014d0 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 80014be: 6859 ldr r1, [r3, #4] 80014c0: f421 61e0 bic.w r1, r1, #1792 ; 0x700 80014c4: 6059 str r1, [r3, #4] hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; 80014c6: 2311 movs r3, #17 80014c8: 6303 str r3, [r0, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 80014ca: f880 203e strb.w r2, [r0, #62] ; 0x3e 80014ce: e69f b.n 8001210 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 80014d0: 685a ldr r2, [r3, #4] 80014d2: f422 62e0 bic.w r2, r2, #1792 ; 0x700 80014d6: 605a str r2, [r3, #4] hi2c->Instance->CR1 |= I2C_CR1_STOP; 80014d8: 681a ldr r2, [r3, #0] 80014da: f442 7200 orr.w r2, r2, #512 ; 0x200 80014de: 601a str r2, [r3, #0] hi2c->PreviousState = I2C_STATE_NONE; 80014e0: 2300 movs r3, #0 hi2c->State = HAL_I2C_STATE_READY; 80014e2: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 80014e4: 6303 str r3, [r0, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 80014e6: f880 203d strb.w r2, [r0, #61] ; 0x3d if(hi2c->Mode == HAL_I2C_MODE_MEM) 80014ea: f890 203e ldrb.w r2, [r0, #62] ; 0x3e hi2c->Mode = HAL_I2C_MODE_NONE; 80014ee: f880 303e strb.w r3, [r0, #62] ; 0x3e if(hi2c->Mode == HAL_I2C_MODE_MEM) 80014f2: 2a40 cmp r2, #64 ; 0x40 80014f4: f47f ae8f bne.w 8001216 HAL_I2C_MemTxCpltCallback(hi2c); 80014f8: f7ff fda2 bl 8001040 80014fc: e7a7 b.n 800144e if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 80014fe: 4d8f ldr r5, [pc, #572] ; (800173c ) 8001500: 400d ands r5, r1 8001502: 2d00 cmp r5, #0 8001504: d046 beq.n 8001594 8001506: 0551 lsls r1, r2, #21 8001508: d544 bpl.n 8001594 800150a: 2c00 cmp r4, #0 800150c: d142 bne.n 8001594 if(hi2c->State == HAL_I2C_STATE_BUSY_RX) 800150e: f890 203d ldrb.w r2, [r0, #61] ; 0x3d 8001512: 2a22 cmp r2, #34 ; 0x22 8001514: d19b bne.n 800144e tmp = hi2c->XferCount; 8001516: 8d42 ldrh r2, [r0, #42] ; 0x2a 8001518: b292 uxth r2, r2 if(tmp > 3U) 800151a: 2a03 cmp r2, #3 800151c: d905 bls.n 800152a (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 800151e: 6a42 ldr r2, [r0, #36] ; 0x24 8001520: 691b ldr r3, [r3, #16] 8001522: 1c51 adds r1, r2, #1 8001524: 6241 str r1, [r0, #36] ; 0x24 8001526: 7013 strb r3, [r2, #0] 8001528: e04f b.n 80015ca else if((tmp == 2U) || (tmp == 3U)) 800152a: 3a02 subs r2, #2 800152c: 2a01 cmp r2, #1 if(hi2c->XferOptions != I2C_NEXT_FRAME) 800152e: 6ac2 ldr r2, [r0, #44] ; 0x2c else if((tmp == 2U) || (tmp == 3U)) 8001530: d80d bhi.n 800154e if(hi2c->XferOptions != I2C_NEXT_FRAME) 8001532: 2a02 cmp r2, #2 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001534: 681a ldr r2, [r3, #0] 8001536: bf1d ittte ne 8001538: f422 6280 bicne.w r2, r2, #1024 ; 0x400 800153c: 601a strne r2, [r3, #0] hi2c->Instance->CR1 |= I2C_CR1_POS; 800153e: 681a ldrne r2, [r3, #0] hi2c->Instance->CR1 |= I2C_CR1_ACK; 8001540: f442 6280 orreq.w r2, r2, #1024 ; 0x400 hi2c->Instance->CR1 |= I2C_CR1_POS; 8001544: bf18 it ne 8001546: f442 6200 orrne.w r2, r2, #2048 ; 0x800 hi2c->Instance->CR1 |= I2C_CR1_ACK; 800154a: 601a str r2, [r3, #0] 800154c: e76b b.n 8001426 if(hi2c->XferOptions != I2C_NEXT_FRAME) 800154e: 2a02 cmp r2, #2 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001550: 681a ldr r2, [r3, #0] 8001552: bf14 ite ne 8001554: f422 6280 bicne.w r2, r2, #1024 ; 0x400 hi2c->Instance->CR1 |= I2C_CR1_ACK; 8001558: f442 6280 orreq.w r2, r2, #1024 ; 0x400 800155c: 601a str r2, [r3, #0] __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 800155e: 685a ldr r2, [r3, #4] 8001560: f422 62e0 bic.w r2, r2, #1792 ; 0x700 8001564: 605a str r2, [r3, #4] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001566: 6a42 ldr r2, [r0, #36] ; 0x24 8001568: 691b ldr r3, [r3, #16] 800156a: 1c51 adds r1, r2, #1 800156c: 6241 str r1, [r0, #36] ; 0x24 800156e: 7013 strb r3, [r2, #0] hi2c->XferCount--; 8001570: 8d43 ldrh r3, [r0, #42] ; 0x2a 8001572: 3b01 subs r3, #1 8001574: b29b uxth r3, r3 8001576: 8543 strh r3, [r0, #42] ; 0x2a hi2c->State = HAL_I2C_STATE_READY; 8001578: 2320 movs r3, #32 800157a: f880 303d strb.w r3, [r0, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 800157e: 2300 movs r3, #0 8001580: 6303 str r3, [r0, #48] ; 0x30 if(hi2c->Mode == HAL_I2C_MODE_MEM) 8001582: f890 203e ldrb.w r2, [r0, #62] ; 0x3e hi2c->Mode = HAL_I2C_MODE_NONE; 8001586: f880 303e strb.w r3, [r0, #62] ; 0x3e if(hi2c->Mode == HAL_I2C_MODE_MEM) 800158a: 2a40 cmp r2, #64 ; 0x40 800158c: d151 bne.n 8001632 HAL_I2C_MemRxCpltCallback(hi2c); 800158e: f7ff fd58 bl 8001042 8001592: e75c b.n 800144e else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 8001594: 2c00 cmp r4, #0 8001596: f43f af5a beq.w 800144e 800159a: 0597 lsls r7, r2, #22 800159c: f57f af57 bpl.w 800144e uint32_t CurrentXferOptions = hi2c->XferOptions; 80015a0: 6ac2 ldr r2, [r0, #44] ; 0x2c if(hi2c->XferCount == 3U) 80015a2: 8d41 ldrh r1, [r0, #42] ; 0x2a 80015a4: b289 uxth r1, r1 80015a6: 2903 cmp r1, #3 80015a8: 6a41 ldr r1, [r0, #36] ; 0x24 80015aa: d113 bne.n 80015d4 if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) 80015ac: 2a04 cmp r2, #4 80015ae: d004 beq.n 80015ba 80015b0: 2a08 cmp r2, #8 80015b2: d002 beq.n 80015ba 80015b4: f512 3f80 cmn.w r2, #65536 ; 0x10000 80015b8: d103 bne.n 80015c2 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 80015ba: 681a ldr r2, [r3, #0] 80015bc: f422 6280 bic.w r2, r2, #1024 ; 0x400 80015c0: 601a str r2, [r3, #0] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80015c2: 691b ldr r3, [r3, #16] 80015c4: 1c4a adds r2, r1, #1 80015c6: 6242 str r2, [r0, #36] ; 0x24 80015c8: 700b strb r3, [r1, #0] hi2c->XferCount--; 80015ca: 8d43 ldrh r3, [r0, #42] ; 0x2a 80015cc: 3b01 subs r3, #1 80015ce: b29b uxth r3, r3 80015d0: 8543 strh r3, [r0, #42] ; 0x2a } 80015d2: e73c b.n 800144e else if(hi2c->XferCount == 2U) 80015d4: 8d44 ldrh r4, [r0, #42] ; 0x2a 80015d6: b2a4 uxth r4, r4 80015d8: 2c02 cmp r4, #2 80015da: d1f2 bne.n 80015c2 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 80015dc: 2a04 cmp r2, #4 80015de: d01f beq.n 8001620 80015e0: 2a08 cmp r2, #8 80015e2: d01d beq.n 8001620 80015e4: f512 3f80 cmn.w r2, #65536 ; 0x10000 80015e8: d01a beq.n 8001620 if(CurrentXferOptions != I2C_NEXT_FRAME) 80015ea: 2a02 cmp r2, #2 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 80015ec: 681a ldr r2, [r3, #0] 80015ee: bf14 ite ne 80015f0: f422 6280 bicne.w r2, r2, #1024 ; 0x400 hi2c->Instance->CR1 |= I2C_CR1_ACK; 80015f4: f442 6280 orreq.w r2, r2, #1024 ; 0x400 80015f8: 601a str r2, [r3, #0] __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 80015fa: 685a ldr r2, [r3, #4] 80015fc: f422 7240 bic.w r2, r2, #768 ; 0x300 8001600: 605a str r2, [r3, #4] (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001602: 691b ldr r3, [r3, #16] 8001604: 1c4a adds r2, r1, #1 8001606: 6242 str r2, [r0, #36] ; 0x24 8001608: 700b strb r3, [r1, #0] hi2c->XferCount--; 800160a: 8d43 ldrh r3, [r0, #42] ; 0x2a 800160c: 3b01 subs r3, #1 800160e: b29b uxth r3, r3 8001610: 8543 strh r3, [r0, #42] ; 0x2a (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 8001612: 6a43 ldr r3, [r0, #36] ; 0x24 8001614: 1c5a adds r2, r3, #1 8001616: 6242 str r2, [r0, #36] ; 0x24 8001618: 6802 ldr r2, [r0, #0] 800161a: 6912 ldr r2, [r2, #16] 800161c: 701a strb r2, [r3, #0] 800161e: e7a7 b.n 8001570 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 8001620: 685a ldr r2, [r3, #4] 8001622: f422 7240 bic.w r2, r2, #768 ; 0x300 8001626: 605a str r2, [r3, #4] hi2c->Instance->CR1 |= I2C_CR1_STOP; 8001628: 681a ldr r2, [r3, #0] 800162a: f442 7200 orr.w r2, r2, #512 ; 0x200 800162e: 601a str r2, [r3, #0] 8001630: e7e7 b.n 8001602 HAL_I2C_MasterRxCpltCallback(hi2c); 8001632: f7ff fd00 bl 8001036 8001636: e70a b.n 800144e if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 8001638: 4c41 ldr r4, [pc, #260] ; (8001740 ) 800163a: 400c ands r4, r1 800163c: b174 cbz r4, 800165c 800163e: 0596 lsls r6, r2, #22 8001640: d50c bpl.n 800165c if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET) 8001642: 6999 ldr r1, [r3, #24] if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET) 8001644: 699b ldr r3, [r3, #24] if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET) 8001646: f081 0104 eor.w r1, r1, #4 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET) 800164a: 061d lsls r5, r3, #24 uint8_t TransferDirection = I2C_DIRECTION_RECEIVE; 800164c: f3c1 0180 ubfx r1, r1, #2, #1 SlaveAddrCode = hi2c->Init.OwnAddress1; 8001650: bf54 ite pl 8001652: 8982 ldrhpl r2, [r0, #12] SlaveAddrCode = hi2c->Init.OwnAddress2; 8001654: 8b02 ldrhmi r2, [r0, #24] HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode); 8001656: f7ff fcf1 bl 800103c 800165a: e6f8 b.n 800144e else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 800165c: 4c39 ldr r4, [pc, #228] ; (8001744 ) 800165e: 400c ands r4, r1 8001660: 2c00 cmp r4, #0 8001662: d073 beq.n 800174c 8001664: 0594 lsls r4, r2, #22 8001666: d571 bpl.n 800174c uint32_t CurrentState = hi2c->State; 8001668: f890 203d ldrb.w r2, [r0, #61] ; 0x3d __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 800166c: 6859 ldr r1, [r3, #4] uint32_t CurrentState = hi2c->State; 800166e: b2d2 uxtb r2, r2 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 8001670: f421 61e0 bic.w r1, r1, #1792 ; 0x700 8001674: 6059 str r1, [r3, #4] __HAL_I2C_CLEAR_STOPFLAG(hi2c); 8001676: 2100 movs r1, #0 8001678: 910b str r1, [sp, #44] ; 0x2c 800167a: 6959 ldr r1, [r3, #20] 800167c: 910b str r1, [sp, #44] ; 0x2c 800167e: 6819 ldr r1, [r3, #0] 8001680: f041 0101 orr.w r1, r1, #1 8001684: 6019 str r1, [r3, #0] 8001686: 990b ldr r1, [sp, #44] ; 0x2c hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001688: 6819 ldr r1, [r3, #0] 800168a: f421 6180 bic.w r1, r1, #1024 ; 0x400 800168e: 6019 str r1, [r3, #0] if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 8001690: 6859 ldr r1, [r3, #4] 8001692: 0509 lsls r1, r1, #20 8001694: d50c bpl.n 80016b0 if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)) 8001696: f890 103d ldrb.w r1, [r0, #61] ; 0x3d 800169a: 2922 cmp r1, #34 ; 0x22 800169c: d003 beq.n 80016a6 800169e: f890 103d ldrb.w r1, [r0, #61] ; 0x3d 80016a2: 292a cmp r1, #42 ; 0x2a 80016a4: d129 bne.n 80016fa hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx); 80016a6: 6b81 ldr r1, [r0, #56] ; 0x38 hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx); 80016a8: 6809 ldr r1, [r1, #0] 80016aa: 6849 ldr r1, [r1, #4] 80016ac: b289 uxth r1, r1 80016ae: 8541 strh r1, [r0, #42] ; 0x2a if(hi2c->XferCount != 0U) 80016b0: 8d41 ldrh r1, [r0, #42] ; 0x2a 80016b2: b289 uxth r1, r1 80016b4: b1e1 cbz r1, 80016f0 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 80016b6: 6959 ldr r1, [r3, #20] 80016b8: 074f lsls r7, r1, #29 80016ba: d508 bpl.n 80016ce (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80016bc: 6a41 ldr r1, [r0, #36] ; 0x24 80016be: 691b ldr r3, [r3, #16] 80016c0: 1c4c adds r4, r1, #1 80016c2: 6244 str r4, [r0, #36] ; 0x24 80016c4: 700b strb r3, [r1, #0] hi2c->XferCount--; 80016c6: 8d43 ldrh r3, [r0, #42] ; 0x2a 80016c8: 3b01 subs r3, #1 80016ca: b29b uxth r3, r3 80016cc: 8543 strh r3, [r0, #42] ; 0x2a if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 80016ce: 6801 ldr r1, [r0, #0] 80016d0: 694b ldr r3, [r1, #20] 80016d2: 065e lsls r6, r3, #25 80016d4: d508 bpl.n 80016e8 (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80016d6: 6a43 ldr r3, [r0, #36] ; 0x24 80016d8: 6909 ldr r1, [r1, #16] 80016da: 1c5c adds r4, r3, #1 80016dc: 6244 str r4, [r0, #36] ; 0x24 80016de: 7019 strb r1, [r3, #0] hi2c->XferCount--; 80016e0: 8d43 ldrh r3, [r0, #42] ; 0x2a 80016e2: 3b01 subs r3, #1 80016e4: b29b uxth r3, r3 80016e6: 8543 strh r3, [r0, #42] ; 0x2a hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 80016e8: 6c03 ldr r3, [r0, #64] ; 0x40 80016ea: f043 0304 orr.w r3, r3, #4 80016ee: 6403 str r3, [r0, #64] ; 0x40 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) 80016f0: 6c03 ldr r3, [r0, #64] ; 0x40 80016f2: b123 cbz r3, 80016fe I2C_ITError(hi2c); 80016f4: f7ff fca8 bl 8001048 80016f8: e6a9 b.n 800144e hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx); 80016fa: 6b41 ldr r1, [r0, #52] ; 0x34 80016fc: e7d4 b.n 80016a8 if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \ 80016fe: f1a2 0128 sub.w r1, r2, #40 ; 0x28 8001702: 2902 cmp r1, #2 8001704: d80a bhi.n 800171c hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8001706: 4a10 ldr r2, [pc, #64] ; (8001748 ) 8001708: 62c2 str r2, [r0, #44] ; 0x2c hi2c->State = HAL_I2C_STATE_READY; 800170a: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 800170c: 6303 str r3, [r0, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 800170e: f880 203d strb.w r2, [r0, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8001712: f880 303e strb.w r3, [r0, #62] ; 0x3e HAL_I2C_ListenCpltCallback(hi2c); 8001716: f7ff fc92 bl 800103e 800171a: e698 b.n 800144e if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX)) 800171c: 6b03 ldr r3, [r0, #48] ; 0x30 800171e: 2b22 cmp r3, #34 ; 0x22 8001720: d002 beq.n 8001728 8001722: 2a22 cmp r2, #34 ; 0x22 8001724: f47f ae93 bne.w 800144e hi2c->PreviousState = I2C_STATE_NONE; 8001728: 2300 movs r3, #0 hi2c->State = HAL_I2C_STATE_READY; 800172a: 2220 movs r2, #32 hi2c->PreviousState = I2C_STATE_NONE; 800172c: 6303 str r3, [r0, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 800172e: f880 203d strb.w r2, [r0, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8001732: f880 303e strb.w r3, [r0, #62] ; 0x3e HAL_I2C_SlaveRxCpltCallback(hi2c); 8001736: f7ff fc80 bl 800103a 800173a: e688 b.n 800144e 800173c: 00010040 .word 0x00010040 8001740: 00010002 .word 0x00010002 8001744: 00010010 .word 0x00010010 8001748: ffff0000 .word 0xffff0000 else if((sr2itflags & I2C_FLAG_TRA) != RESET) 800174c: 4e39 ldr r6, [pc, #228] ; (8001834 ) 800174e: 4c3a ldr r4, [pc, #232] ; (8001838 ) 8001750: 402e ands r6, r5 8001752: 400c ands r4, r1 8001754: 2e00 cmp r6, #0 8001756: d036 beq.n 80017c6 if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 8001758: 4d38 ldr r5, [pc, #224] ; (800183c ) 800175a: 400d ands r5, r1 800175c: b33d cbz r5, 80017ae 800175e: 0555 lsls r5, r2, #21 8001760: d525 bpl.n 80017ae 8001762: bb24 cbnz r4, 80017ae uint32_t CurrentState = hi2c->State; 8001764: f890 103d ldrb.w r1, [r0, #61] ; 0x3d if(hi2c->XferCount != 0U) 8001768: 8d42 ldrh r2, [r0, #42] ; 0x2a uint32_t CurrentState = hi2c->State; 800176a: b2c9 uxtb r1, r1 if(hi2c->XferCount != 0U) 800176c: b292 uxth r2, r2 800176e: 2a00 cmp r2, #0 8001770: f43f ae6d beq.w 800144e hi2c->Instance->DR = (*hi2c->pBuffPtr++); 8001774: 6a42 ldr r2, [r0, #36] ; 0x24 8001776: 1c54 adds r4, r2, #1 8001778: 6244 str r4, [r0, #36] ; 0x24 800177a: 7812 ldrb r2, [r2, #0] 800177c: 611a str r2, [r3, #16] hi2c->XferCount--; 800177e: 8d42 ldrh r2, [r0, #42] ; 0x2a 8001780: 3a01 subs r2, #1 8001782: b292 uxth r2, r2 8001784: 8542 strh r2, [r0, #42] ; 0x2a if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)) 8001786: 8d42 ldrh r2, [r0, #42] ; 0x2a 8001788: b292 uxth r2, r2 800178a: 2a00 cmp r2, #0 800178c: f47f ae5f bne.w 800144e 8001790: 2929 cmp r1, #41 ; 0x29 8001792: f47f ae5c bne.w 800144e __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8001796: 685a ldr r2, [r3, #4] 8001798: f422 6280 bic.w r2, r2, #1024 ; 0x400 800179c: 605a str r2, [r3, #4] hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; 800179e: 2321 movs r3, #33 ; 0x21 80017a0: 6303 str r3, [r0, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 80017a2: 2328 movs r3, #40 ; 0x28 80017a4: f880 303d strb.w r3, [r0, #61] ; 0x3d HAL_I2C_SlaveTxCpltCallback(hi2c); 80017a8: f7ff fc46 bl 8001038 80017ac: e64f b.n 800144e else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 80017ae: 2c00 cmp r4, #0 80017b0: f43f ae4d beq.w 800144e 80017b4: 0594 lsls r4, r2, #22 80017b6: f57f ae4a bpl.w 800144e if(hi2c->XferCount != 0U) 80017ba: 8d42 ldrh r2, [r0, #42] ; 0x2a 80017bc: b292 uxth r2, r2 80017be: 2a00 cmp r2, #0 80017c0: f47f ae63 bne.w 800148a 80017c4: e643 b.n 800144e if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET)) 80017c6: 4d1e ldr r5, [pc, #120] ; (8001840 ) 80017c8: 400d ands r5, r1 80017ca: b335 cbz r5, 800181a 80017cc: 0551 lsls r1, r2, #21 80017ce: d524 bpl.n 800181a 80017d0: bb1c cbnz r4, 800181a uint32_t CurrentState = hi2c->State; 80017d2: f890 203d ldrb.w r2, [r0, #61] ; 0x3d if(hi2c->XferCount != 0U) 80017d6: 8d41 ldrh r1, [r0, #42] ; 0x2a uint32_t CurrentState = hi2c->State; 80017d8: b2d2 uxtb r2, r2 if(hi2c->XferCount != 0U) 80017da: b289 uxth r1, r1 80017dc: 2900 cmp r1, #0 80017de: f43f ae36 beq.w 800144e (*hi2c->pBuffPtr++) = hi2c->Instance->DR; 80017e2: 6a41 ldr r1, [r0, #36] ; 0x24 80017e4: 691b ldr r3, [r3, #16] 80017e6: 1c4c adds r4, r1, #1 80017e8: 6244 str r4, [r0, #36] ; 0x24 80017ea: 700b strb r3, [r1, #0] hi2c->XferCount--; 80017ec: 8d43 ldrh r3, [r0, #42] ; 0x2a 80017ee: 3b01 subs r3, #1 80017f0: b29b uxth r3, r3 80017f2: 8543 strh r3, [r0, #42] ; 0x2a if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) 80017f4: 8d43 ldrh r3, [r0, #42] ; 0x2a 80017f6: b29b uxth r3, r3 80017f8: 2b00 cmp r3, #0 80017fa: f47f ae28 bne.w 800144e 80017fe: 2a2a cmp r2, #42 ; 0x2a 8001800: f47f ae25 bne.w 800144e __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8001804: 6802 ldr r2, [r0, #0] 8001806: 6853 ldr r3, [r2, #4] 8001808: f423 6380 bic.w r3, r3, #1024 ; 0x400 800180c: 6053 str r3, [r2, #4] hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; 800180e: 2322 movs r3, #34 ; 0x22 8001810: 6303 str r3, [r0, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 8001812: 2328 movs r3, #40 ; 0x28 8001814: f880 303d strb.w r3, [r0, #61] ; 0x3d 8001818: e78d b.n 8001736 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET)) 800181a: 2c00 cmp r4, #0 800181c: f43f ae17 beq.w 800144e 8001820: 0592 lsls r2, r2, #22 8001822: f57f ae14 bpl.w 800144e if(hi2c->XferCount != 0U) 8001826: 8d42 ldrh r2, [r0, #42] ; 0x2a 8001828: b292 uxth r2, r2 800182a: 2a00 cmp r2, #0 800182c: f47f ae77 bne.w 800151e 8001830: e60d b.n 800144e 8001832: bf00 nop 8001834: 00100004 .word 0x00100004 8001838: 00010004 .word 0x00010004 800183c: 00010080 .word 0x00010080 8001840: 00010040 .word 0x00010040 08001844 : I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8001844: 6a40 ldr r0, [r0, #36] ; 0x24 { 8001846: b508 push {r3, lr} hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 8001848: 6803 ldr r3, [r0, #0] hi2c->hdmatx->XferAbortCallback = NULL; 800184a: 6b41 ldr r1, [r0, #52] ; 0x34 hi2c->Instance->CR1 &= ~I2C_CR1_ACK; 800184c: 681a ldr r2, [r3, #0] 800184e: f422 6280 bic.w r2, r2, #1024 ; 0x400 8001852: 601a str r2, [r3, #0] hi2c->XferCount = 0U; 8001854: 2200 movs r2, #0 8001856: 8542 strh r2, [r0, #42] ; 0x2a hi2c->hdmatx->XferAbortCallback = NULL; 8001858: 634a str r2, [r1, #52] ; 0x34 hi2c->hdmarx->XferAbortCallback = NULL; 800185a: 6b81 ldr r1, [r0, #56] ; 0x38 800185c: 634a str r2, [r1, #52] ; 0x34 if(hi2c->State == HAL_I2C_STATE_ABORT) 800185e: f890 103d ldrb.w r1, [r0, #61] ; 0x3d 8001862: 2960 cmp r1, #96 ; 0x60 8001864: f04f 0120 mov.w r1, #32 hi2c->State = HAL_I2C_STATE_READY; 8001868: f880 103d strb.w r1, [r0, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 800186c: f880 203e strb.w r2, [r0, #62] ; 0x3e if(hi2c->State == HAL_I2C_STATE_ABORT) 8001870: d107 bne.n 8001882 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8001872: 6402 str r2, [r0, #64] ; 0x40 __HAL_I2C_DISABLE(hi2c); 8001874: 681a ldr r2, [r3, #0] 8001876: f022 0201 bic.w r2, r2, #1 800187a: 601a str r2, [r3, #0] HAL_I2C_AbortCpltCallback(hi2c); 800187c: f7ff fbe3 bl 8001046 8001880: bd08 pop {r3, pc} __HAL_I2C_DISABLE(hi2c); 8001882: 681a ldr r2, [r3, #0] 8001884: f022 0201 bic.w r2, r2, #1 8001888: 601a str r2, [r3, #0] HAL_I2C_ErrorCallback(hi2c); 800188a: f7ff fbdb bl 8001044 800188e: bd08 pop {r3, pc} 08001890 : /* Check the parameters */ assert_param(RCC_OscInitStruct != NULL); assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8001890: 6803 ldr r3, [r0, #0] { 8001892: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8001896: 07db lsls r3, r3, #31 { 8001898: 4605 mov r5, r0 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800189a: d410 bmi.n 80018be } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 800189c: 682b ldr r3, [r5, #0] 800189e: 079f lsls r7, r3, #30 80018a0: d45e bmi.n 8001960 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 80018a2: 682b ldr r3, [r5, #0] 80018a4: 0719 lsls r1, r3, #28 80018a6: f100 8095 bmi.w 80019d4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80018aa: 682b ldr r3, [r5, #0] 80018ac: 075a lsls r2, r3, #29 80018ae: f100 80bf bmi.w 8001a30 #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80018b2: 69ea ldr r2, [r5, #28] 80018b4: 2a00 cmp r2, #0 80018b6: f040 812d bne.w 8001b14 { return HAL_ERROR; } } return HAL_OK; 80018ba: 2000 movs r0, #0 80018bc: e014 b.n 80018e8 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 80018be: 4c90 ldr r4, [pc, #576] ; (8001b00 ) 80018c0: 6863 ldr r3, [r4, #4] 80018c2: f003 030c and.w r3, r3, #12 80018c6: 2b04 cmp r3, #4 80018c8: d007 beq.n 80018da || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 80018ca: 6863 ldr r3, [r4, #4] 80018cc: f003 030c and.w r3, r3, #12 80018d0: 2b08 cmp r3, #8 80018d2: d10c bne.n 80018ee 80018d4: 6863 ldr r3, [r4, #4] 80018d6: 03de lsls r6, r3, #15 80018d8: d509 bpl.n 80018ee if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80018da: 6823 ldr r3, [r4, #0] 80018dc: 039c lsls r4, r3, #14 80018de: d5dd bpl.n 800189c 80018e0: 686b ldr r3, [r5, #4] 80018e2: 2b00 cmp r3, #0 80018e4: d1da bne.n 800189c return HAL_ERROR; 80018e6: 2001 movs r0, #1 } 80018e8: b002 add sp, #8 80018ea: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80018ee: 686b ldr r3, [r5, #4] 80018f0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80018f4: d110 bne.n 8001918 80018f6: 6823 ldr r3, [r4, #0] 80018f8: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80018fc: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 80018fe: f7fe fcc3 bl 8000288 8001902: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8001904: 6823 ldr r3, [r4, #0] 8001906: 0398 lsls r0, r3, #14 8001908: d4c8 bmi.n 800189c if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 800190a: f7fe fcbd bl 8000288 800190e: 1b80 subs r0, r0, r6 8001910: 2864 cmp r0, #100 ; 0x64 8001912: d9f7 bls.n 8001904 return HAL_TIMEOUT; 8001914: 2003 movs r0, #3 8001916: e7e7 b.n 80018e8 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8001918: b99b cbnz r3, 8001942 800191a: 6823 ldr r3, [r4, #0] 800191c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8001920: 6023 str r3, [r4, #0] 8001922: 6823 ldr r3, [r4, #0] 8001924: f423 2380 bic.w r3, r3, #262144 ; 0x40000 8001928: 6023 str r3, [r4, #0] tickstart = HAL_GetTick(); 800192a: f7fe fcad bl 8000288 800192e: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8001930: 6823 ldr r3, [r4, #0] 8001932: 0399 lsls r1, r3, #14 8001934: d5b2 bpl.n 800189c if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8001936: f7fe fca7 bl 8000288 800193a: 1b80 subs r0, r0, r6 800193c: 2864 cmp r0, #100 ; 0x64 800193e: d9f7 bls.n 8001930 8001940: e7e8 b.n 8001914 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8001942: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8001946: 6823 ldr r3, [r4, #0] 8001948: d103 bne.n 8001952 800194a: f443 2380 orr.w r3, r3, #262144 ; 0x40000 800194e: 6023 str r3, [r4, #0] 8001950: e7d1 b.n 80018f6 8001952: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8001956: 6023 str r3, [r4, #0] 8001958: 6823 ldr r3, [r4, #0] 800195a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800195e: e7cd b.n 80018fc if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8001960: 4c67 ldr r4, [pc, #412] ; (8001b00 ) 8001962: 6863 ldr r3, [r4, #4] 8001964: f013 0f0c tst.w r3, #12 8001968: d007 beq.n 800197a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 800196a: 6863 ldr r3, [r4, #4] 800196c: f003 030c and.w r3, r3, #12 8001970: 2b08 cmp r3, #8 8001972: d110 bne.n 8001996 8001974: 6863 ldr r3, [r4, #4] 8001976: 03da lsls r2, r3, #15 8001978: d40d bmi.n 8001996 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800197a: 6823 ldr r3, [r4, #0] 800197c: 079b lsls r3, r3, #30 800197e: d502 bpl.n 8001986 8001980: 692b ldr r3, [r5, #16] 8001982: 2b01 cmp r3, #1 8001984: d1af bne.n 80018e6 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8001986: 6823 ldr r3, [r4, #0] 8001988: 696a ldr r2, [r5, #20] 800198a: f023 03f8 bic.w r3, r3, #248 ; 0xf8 800198e: ea43 03c2 orr.w r3, r3, r2, lsl #3 8001992: 6023 str r3, [r4, #0] 8001994: e785 b.n 80018a2 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8001996: 692a ldr r2, [r5, #16] 8001998: 4b5a ldr r3, [pc, #360] ; (8001b04 ) 800199a: b16a cbz r2, 80019b8 __HAL_RCC_HSI_ENABLE(); 800199c: 2201 movs r2, #1 800199e: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80019a0: f7fe fc72 bl 8000288 80019a4: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80019a6: 6823 ldr r3, [r4, #0] 80019a8: 079f lsls r7, r3, #30 80019aa: d4ec bmi.n 8001986 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80019ac: f7fe fc6c bl 8000288 80019b0: 1b80 subs r0, r0, r6 80019b2: 2802 cmp r0, #2 80019b4: d9f7 bls.n 80019a6 80019b6: e7ad b.n 8001914 __HAL_RCC_HSI_DISABLE(); 80019b8: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80019ba: f7fe fc65 bl 8000288 80019be: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80019c0: 6823 ldr r3, [r4, #0] 80019c2: 0798 lsls r0, r3, #30 80019c4: f57f af6d bpl.w 80018a2 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80019c8: f7fe fc5e bl 8000288 80019cc: 1b80 subs r0, r0, r6 80019ce: 2802 cmp r0, #2 80019d0: d9f6 bls.n 80019c0 80019d2: e79f b.n 8001914 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 80019d4: 69aa ldr r2, [r5, #24] 80019d6: 4c4a ldr r4, [pc, #296] ; (8001b00 ) 80019d8: 4b4b ldr r3, [pc, #300] ; (8001b08 ) 80019da: b1da cbz r2, 8001a14 __HAL_RCC_LSI_ENABLE(); 80019dc: 2201 movs r2, #1 80019de: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 80019e0: f7fe fc52 bl 8000288 80019e4: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80019e6: 6a63 ldr r3, [r4, #36] ; 0x24 80019e8: 079b lsls r3, r3, #30 80019ea: d50d bpl.n 8001a08 * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80019ec: f44f 52fa mov.w r2, #8000 ; 0x1f40 80019f0: 4b46 ldr r3, [pc, #280] ; (8001b0c ) 80019f2: 681b ldr r3, [r3, #0] 80019f4: fbb3 f3f2 udiv r3, r3, r2 80019f8: 9301 str r3, [sp, #4] \brief No Operation \details No Operation does nothing. This instruction can be used for code alignment purposes. */ __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) { __ASM volatile ("nop"); 80019fa: bf00 nop do { __NOP(); } while (Delay --); 80019fc: 9b01 ldr r3, [sp, #4] 80019fe: 1e5a subs r2, r3, #1 8001a00: 9201 str r2, [sp, #4] 8001a02: 2b00 cmp r3, #0 8001a04: d1f9 bne.n 80019fa 8001a06: e750 b.n 80018aa if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8001a08: f7fe fc3e bl 8000288 8001a0c: 1b80 subs r0, r0, r6 8001a0e: 2802 cmp r0, #2 8001a10: d9e9 bls.n 80019e6 8001a12: e77f b.n 8001914 __HAL_RCC_LSI_DISABLE(); 8001a14: 601a str r2, [r3, #0] tickstart = HAL_GetTick(); 8001a16: f7fe fc37 bl 8000288 8001a1a: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8001a1c: 6a63 ldr r3, [r4, #36] ; 0x24 8001a1e: 079f lsls r7, r3, #30 8001a20: f57f af43 bpl.w 80018aa if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8001a24: f7fe fc30 bl 8000288 8001a28: 1b80 subs r0, r0, r6 8001a2a: 2802 cmp r0, #2 8001a2c: d9f6 bls.n 8001a1c 8001a2e: e771 b.n 8001914 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8001a30: 4c33 ldr r4, [pc, #204] ; (8001b00 ) 8001a32: 69e3 ldr r3, [r4, #28] 8001a34: 00d8 lsls r0, r3, #3 8001a36: d424 bmi.n 8001a82 pwrclkchanged = SET; 8001a38: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8001a3a: 69e3 ldr r3, [r4, #28] 8001a3c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8001a40: 61e3 str r3, [r4, #28] 8001a42: 69e3 ldr r3, [r4, #28] 8001a44: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001a48: 9300 str r3, [sp, #0] 8001a4a: 9b00 ldr r3, [sp, #0] if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8001a4c: 4e30 ldr r6, [pc, #192] ; (8001b10 ) 8001a4e: 6833 ldr r3, [r6, #0] 8001a50: 05d9 lsls r1, r3, #23 8001a52: d518 bpl.n 8001a86 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001a54: 68eb ldr r3, [r5, #12] 8001a56: 2b01 cmp r3, #1 8001a58: d126 bne.n 8001aa8 8001a5a: 6a23 ldr r3, [r4, #32] 8001a5c: f043 0301 orr.w r3, r3, #1 8001a60: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8001a62: f7fe fc11 bl 8000288 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001a66: f241 3688 movw r6, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8001a6a: 4680 mov r8, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8001a6c: 6a23 ldr r3, [r4, #32] 8001a6e: 079b lsls r3, r3, #30 8001a70: d53f bpl.n 8001af2 if(pwrclkchanged == SET) 8001a72: 2f00 cmp r7, #0 8001a74: f43f af1d beq.w 80018b2 __HAL_RCC_PWR_CLK_DISABLE(); 8001a78: 69e3 ldr r3, [r4, #28] 8001a7a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8001a7e: 61e3 str r3, [r4, #28] 8001a80: e717 b.n 80018b2 FlagStatus pwrclkchanged = RESET; 8001a82: 2700 movs r7, #0 8001a84: e7e2 b.n 8001a4c SET_BIT(PWR->CR, PWR_CR_DBP); 8001a86: 6833 ldr r3, [r6, #0] 8001a88: f443 7380 orr.w r3, r3, #256 ; 0x100 8001a8c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8001a8e: f7fe fbfb bl 8000288 8001a92: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8001a94: 6833 ldr r3, [r6, #0] 8001a96: 05da lsls r2, r3, #23 8001a98: d4dc bmi.n 8001a54 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8001a9a: f7fe fbf5 bl 8000288 8001a9e: eba0 0008 sub.w r0, r0, r8 8001aa2: 2864 cmp r0, #100 ; 0x64 8001aa4: d9f6 bls.n 8001a94 8001aa6: e735 b.n 8001914 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001aa8: b9ab cbnz r3, 8001ad6 8001aaa: 6a23 ldr r3, [r4, #32] if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001aac: f241 3888 movw r8, #5000 ; 0x1388 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001ab0: f023 0301 bic.w r3, r3, #1 8001ab4: 6223 str r3, [r4, #32] 8001ab6: 6a23 ldr r3, [r4, #32] 8001ab8: f023 0304 bic.w r3, r3, #4 8001abc: 6223 str r3, [r4, #32] tickstart = HAL_GetTick(); 8001abe: f7fe fbe3 bl 8000288 8001ac2: 4606 mov r6, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8001ac4: 6a23 ldr r3, [r4, #32] 8001ac6: 0798 lsls r0, r3, #30 8001ac8: d5d3 bpl.n 8001a72 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001aca: f7fe fbdd bl 8000288 8001ace: 1b80 subs r0, r0, r6 8001ad0: 4540 cmp r0, r8 8001ad2: d9f7 bls.n 8001ac4 8001ad4: e71e b.n 8001914 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8001ad6: 2b05 cmp r3, #5 8001ad8: 6a23 ldr r3, [r4, #32] 8001ada: d103 bne.n 8001ae4 8001adc: f043 0304 orr.w r3, r3, #4 8001ae0: 6223 str r3, [r4, #32] 8001ae2: e7ba b.n 8001a5a 8001ae4: f023 0301 bic.w r3, r3, #1 8001ae8: 6223 str r3, [r4, #32] 8001aea: 6a23 ldr r3, [r4, #32] 8001aec: f023 0304 bic.w r3, r3, #4 8001af0: e7b6 b.n 8001a60 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8001af2: f7fe fbc9 bl 8000288 8001af6: eba0 0008 sub.w r0, r0, r8 8001afa: 42b0 cmp r0, r6 8001afc: d9b6 bls.n 8001a6c 8001afe: e709 b.n 8001914 8001b00: 40021000 .word 0x40021000 8001b04: 42420000 .word 0x42420000 8001b08: 42420480 .word 0x42420480 8001b0c: 20000008 .word 0x20000008 8001b10: 40007000 .word 0x40007000 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8001b14: 4c22 ldr r4, [pc, #136] ; (8001ba0 ) 8001b16: 6863 ldr r3, [r4, #4] 8001b18: f003 030c and.w r3, r3, #12 8001b1c: 2b08 cmp r3, #8 8001b1e: f43f aee2 beq.w 80018e6 8001b22: 2300 movs r3, #0 8001b24: 4e1f ldr r6, [pc, #124] ; (8001ba4 ) if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8001b26: 2a02 cmp r2, #2 __HAL_RCC_PLL_DISABLE(); 8001b28: 6033 str r3, [r6, #0] if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8001b2a: d12b bne.n 8001b84 tickstart = HAL_GetTick(); 8001b2c: f7fe fbac bl 8000288 8001b30: 4607 mov r7, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8001b32: 6823 ldr r3, [r4, #0] 8001b34: 0199 lsls r1, r3, #6 8001b36: d41f bmi.n 8001b78 if(RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8001b38: 6a2b ldr r3, [r5, #32] 8001b3a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8001b3e: d105 bne.n 8001b4c __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8001b40: 6ae2 ldr r2, [r4, #44] ; 0x2c 8001b42: 68a9 ldr r1, [r5, #8] 8001b44: f022 020f bic.w r2, r2, #15 8001b48: 430a orrs r2, r1 8001b4a: 62e2 str r2, [r4, #44] ; 0x2c __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8001b4c: 6a69 ldr r1, [r5, #36] ; 0x24 8001b4e: 6862 ldr r2, [r4, #4] 8001b50: 430b orrs r3, r1 8001b52: f422 1274 bic.w r2, r2, #3997696 ; 0x3d0000 8001b56: 4313 orrs r3, r2 8001b58: 6063 str r3, [r4, #4] __HAL_RCC_PLL_ENABLE(); 8001b5a: 2301 movs r3, #1 8001b5c: 6033 str r3, [r6, #0] tickstart = HAL_GetTick(); 8001b5e: f7fe fb93 bl 8000288 8001b62: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001b64: 6823 ldr r3, [r4, #0] 8001b66: 019a lsls r2, r3, #6 8001b68: f53f aea7 bmi.w 80018ba if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8001b6c: f7fe fb8c bl 8000288 8001b70: 1b40 subs r0, r0, r5 8001b72: 2802 cmp r0, #2 8001b74: d9f6 bls.n 8001b64 8001b76: e6cd b.n 8001914 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8001b78: f7fe fb86 bl 8000288 8001b7c: 1bc0 subs r0, r0, r7 8001b7e: 2802 cmp r0, #2 8001b80: d9d7 bls.n 8001b32 8001b82: e6c7 b.n 8001914 tickstart = HAL_GetTick(); 8001b84: f7fe fb80 bl 8000288 8001b88: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8001b8a: 6823 ldr r3, [r4, #0] 8001b8c: 019b lsls r3, r3, #6 8001b8e: f57f ae94 bpl.w 80018ba if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8001b92: f7fe fb79 bl 8000288 8001b96: 1b40 subs r0, r0, r5 8001b98: 2802 cmp r0, #2 8001b9a: d9f6 bls.n 8001b8a 8001b9c: e6ba b.n 8001914 8001b9e: bf00 nop 8001ba0: 40021000 .word 0x40021000 8001ba4: 42420060 .word 0x42420060 08001ba8 : { 8001ba8: b530 push {r4, r5, lr} 8001baa: b089 sub sp, #36 ; 0x24 const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8001bac: 466c mov r4, sp 8001bae: 4b1b ldr r3, [pc, #108] ; (8001c1c ) 8001bb0: f103 0510 add.w r5, r3, #16 8001bb4: 4622 mov r2, r4 8001bb6: 6818 ldr r0, [r3, #0] 8001bb8: 6859 ldr r1, [r3, #4] 8001bba: 3308 adds r3, #8 8001bbc: c203 stmia r2!, {r0, r1} 8001bbe: 42ab cmp r3, r5 8001bc0: 4614 mov r4, r2 8001bc2: d1f7 bne.n 8001bb4 const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; 8001bc4: 4b16 ldr r3, [pc, #88] ; (8001c20 ) 8001bc6: ac04 add r4, sp, #16 8001bc8: f103 0510 add.w r5, r3, #16 8001bcc: 4622 mov r2, r4 8001bce: 6818 ldr r0, [r3, #0] 8001bd0: 6859 ldr r1, [r3, #4] 8001bd2: 3308 adds r3, #8 8001bd4: c203 stmia r2!, {r0, r1} 8001bd6: 42ab cmp r3, r5 8001bd8: 4614 mov r4, r2 8001bda: d1f7 bne.n 8001bcc tmpreg = RCC->CFGR; 8001bdc: 4911 ldr r1, [pc, #68] ; (8001c24 ) 8001bde: 684b ldr r3, [r1, #4] switch (tmpreg & RCC_CFGR_SWS) 8001be0: f003 020c and.w r2, r3, #12 8001be4: 2a08 cmp r2, #8 8001be6: d117 bne.n 8001c18 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8001be8: f3c3 4283 ubfx r2, r3, #18, #4 8001bec: a808 add r0, sp, #32 8001bee: 4402 add r2, r0 if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8001bf0: 03db lsls r3, r3, #15 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8001bf2: f812 2c20 ldrb.w r2, [r2, #-32] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8001bf6: d50c bpl.n 8001c12 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 8001bf8: 6acb ldr r3, [r1, #44] ; 0x2c pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8001bfa: 480b ldr r0, [pc, #44] ; (8001c28 ) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 8001bfc: f003 030f and.w r3, r3, #15 pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8001c00: 4350 muls r0, r2 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; 8001c02: aa08 add r2, sp, #32 8001c04: 4413 add r3, r2 8001c06: f813 3c10 ldrb.w r3, [r3, #-16] pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8001c0a: fbb0 f0f3 udiv r0, r0, r3 } 8001c0e: b009 add sp, #36 ; 0x24 8001c10: bd30 pop {r4, r5, pc} pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8001c12: 4806 ldr r0, [pc, #24] ; (8001c2c ) 8001c14: 4350 muls r0, r2 8001c16: e7fa b.n 8001c0e sysclockfreq = HSE_VALUE; 8001c18: 4803 ldr r0, [pc, #12] ; (8001c28 ) return sysclockfreq; 8001c1a: e7f8 b.n 8001c0e 8001c1c: 080043c8 .word 0x080043c8 8001c20: 080043d8 .word 0x080043d8 8001c24: 40021000 .word 0x40021000 8001c28: 007a1200 .word 0x007a1200 8001c2c: 003d0900 .word 0x003d0900 08001c30 : if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8001c30: 6802 ldr r2, [r0, #0] { 8001c32: b5f8 push {r3, r4, r5, r6, r7, lr} if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8001c34: f012 0f02 tst.w r2, #2 { 8001c38: 4605 mov r5, r0 8001c3a: 4c3c ldr r4, [pc, #240] ; (8001d2c ) if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8001c3c: d011 beq.n 8001c62 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8001c3e: 0757 lsls r7, r2, #29 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8001c40: bf42 ittt mi 8001c42: 6863 ldrmi r3, [r4, #4] 8001c44: f443 63e0 orrmi.w r3, r3, #1792 ; 0x700 8001c48: 6063 strmi r3, [r4, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8001c4a: 0716 lsls r6, r2, #28 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8001c4c: bf42 ittt mi 8001c4e: 6863 ldrmi r3, [r4, #4] 8001c50: f443 5360 orrmi.w r3, r3, #14336 ; 0x3800 8001c54: 6063 strmi r3, [r4, #4] MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8001c56: 6863 ldr r3, [r4, #4] 8001c58: 6881 ldr r1, [r0, #8] 8001c5a: f023 03f0 bic.w r3, r3, #240 ; 0xf0 8001c5e: 430b orrs r3, r1 8001c60: 6063 str r3, [r4, #4] if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8001c62: 07d0 lsls r0, r2, #31 8001c64: d41a bmi.n 8001c9c if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8001c66: 682a ldr r2, [r5, #0] 8001c68: 0751 lsls r1, r2, #29 8001c6a: d456 bmi.n 8001d1a if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8001c6c: 0713 lsls r3, r2, #28 8001c6e: d506 bpl.n 8001c7e MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8001c70: 6863 ldr r3, [r4, #4] 8001c72: 692a ldr r2, [r5, #16] 8001c74: f423 5360 bic.w r3, r3, #14336 ; 0x3800 8001c78: ea43 03c2 orr.w r3, r3, r2, lsl #3 8001c7c: 6063 str r3, [r4, #4] SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8001c7e: f7ff ff93 bl 8001ba8 8001c82: 6863 ldr r3, [r4, #4] 8001c84: 4a2a ldr r2, [pc, #168] ; (8001d30 ) 8001c86: f3c3 1303 ubfx r3, r3, #4, #4 8001c8a: 5cd3 ldrb r3, [r2, r3] 8001c8c: 40d8 lsrs r0, r3 8001c8e: 4b29 ldr r3, [pc, #164] ; (8001d34 ) 8001c90: 6018 str r0, [r3, #0] HAL_InitTick (TICK_INT_PRIORITY); 8001c92: 2000 movs r0, #0 8001c94: f7fe fabc bl 8000210 return HAL_OK; 8001c98: 2000 movs r0, #0 8001c9a: bdf8 pop {r3, r4, r5, r6, r7, pc} if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8001c9c: 6868 ldr r0, [r5, #4] if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8001c9e: 6823 ldr r3, [r4, #0] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8001ca0: 2801 cmp r0, #1 8001ca2: d102 bne.n 8001caa if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8001ca4: 039a lsls r2, r3, #14 8001ca6: d405 bmi.n 8001cb4 8001ca8: bdf8 pop {r3, r4, r5, r6, r7, pc} else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8001caa: 2802 cmp r0, #2 8001cac: d11b bne.n 8001ce6 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8001cae: f013 7f00 tst.w r3, #33554432 ; 0x2000000 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8001cb2: d039 beq.n 8001d28 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8001cb4: 6863 ldr r3, [r4, #4] if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001cb6: f241 3788 movw r7, #5000 ; 0x1388 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8001cba: f023 0303 bic.w r3, r3, #3 8001cbe: 4318 orrs r0, r3 8001cc0: 6060 str r0, [r4, #4] tickstart = HAL_GetTick(); 8001cc2: f7fe fae1 bl 8000288 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8001cc6: 686b ldr r3, [r5, #4] tickstart = HAL_GetTick(); 8001cc8: 4606 mov r6, r0 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8001cca: 2b01 cmp r3, #1 8001ccc: d10e bne.n 8001cec while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) 8001cce: 6863 ldr r3, [r4, #4] 8001cd0: f003 030c and.w r3, r3, #12 8001cd4: 2b04 cmp r3, #4 8001cd6: d0c6 beq.n 8001c66 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001cd8: f7fe fad6 bl 8000288 8001cdc: 1b80 subs r0, r0, r6 8001cde: 42b8 cmp r0, r7 8001ce0: d9f5 bls.n 8001cce return HAL_TIMEOUT; 8001ce2: 2003 movs r0, #3 8001ce4: bdf8 pop {r3, r4, r5, r6, r7, pc} if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8001ce6: f013 0f02 tst.w r3, #2 8001cea: e7e2 b.n 8001cb2 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8001cec: 2b02 cmp r3, #2 8001cee: d10f bne.n 8001d10 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8001cf0: 6863 ldr r3, [r4, #4] 8001cf2: f003 030c and.w r3, r3, #12 8001cf6: 2b08 cmp r3, #8 8001cf8: d0b5 beq.n 8001c66 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001cfa: f7fe fac5 bl 8000288 8001cfe: 1b80 subs r0, r0, r6 8001d00: 42b8 cmp r0, r7 8001d02: d9f5 bls.n 8001cf0 8001d04: e7ed b.n 8001ce2 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) 8001d06: f7fe fabf bl 8000288 8001d0a: 1b80 subs r0, r0, r6 8001d0c: 42b8 cmp r0, r7 8001d0e: d8e8 bhi.n 8001ce2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) 8001d10: 6863 ldr r3, [r4, #4] 8001d12: f013 0f0c tst.w r3, #12 8001d16: d1f6 bne.n 8001d06 8001d18: e7a5 b.n 8001c66 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8001d1a: 6863 ldr r3, [r4, #4] 8001d1c: 68e9 ldr r1, [r5, #12] 8001d1e: f423 63e0 bic.w r3, r3, #1792 ; 0x700 8001d22: 430b orrs r3, r1 8001d24: 6063 str r3, [r4, #4] 8001d26: e7a1 b.n 8001c6c return HAL_ERROR; 8001d28: 2001 movs r0, #1 } 8001d2a: bdf8 pop {r3, r4, r5, r6, r7, pc} 8001d2c: 40021000 .word 0x40021000 8001d30: 0800452b .word 0x0800452b 8001d34: 20000008 .word 0x20000008 08001d38 : return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8001d38: 4b04 ldr r3, [pc, #16] ; (8001d4c ) 8001d3a: 4a05 ldr r2, [pc, #20] ; (8001d50 ) 8001d3c: 685b ldr r3, [r3, #4] 8001d3e: f3c3 2302 ubfx r3, r3, #8, #3 8001d42: 5cd3 ldrb r3, [r2, r3] 8001d44: 4a03 ldr r2, [pc, #12] ; (8001d54 ) 8001d46: 6810 ldr r0, [r2, #0] } 8001d48: 40d8 lsrs r0, r3 8001d4a: 4770 bx lr 8001d4c: 40021000 .word 0x40021000 8001d50: 0800453b .word 0x0800453b 8001d54: 20000008 .word 0x20000008 08001d58 : return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8001d58: 4b04 ldr r3, [pc, #16] ; (8001d6c ) 8001d5a: 4a05 ldr r2, [pc, #20] ; (8001d70 ) 8001d5c: 685b ldr r3, [r3, #4] 8001d5e: f3c3 23c2 ubfx r3, r3, #11, #3 8001d62: 5cd3 ldrb r3, [r2, r3] 8001d64: 4a03 ldr r2, [pc, #12] ; (8001d74 ) 8001d66: 6810 ldr r0, [r2, #0] } 8001d68: 40d8 lsrs r0, r3 8001d6a: 4770 bx lr 8001d6c: 40021000 .word 0x40021000 8001d70: 0800453b .word 0x0800453b 8001d74: 20000008 .word 0x20000008 08001d78 : /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8001d78: 6803 ldr r3, [r0, #0] { 8001d7a: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8001d7e: 07df lsls r7, r3, #31 { 8001d80: 4606 mov r6, r0 if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8001d82: d520 bpl.n 8001dc6 FlagStatus pwrclkchanged = RESET; /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8001d84: 4c30 ldr r4, [pc, #192] ; (8001e48 ) 8001d86: 69e3 ldr r3, [r4, #28] 8001d88: 00dd lsls r5, r3, #3 8001d8a: d429 bmi.n 8001de0 { __HAL_RCC_PWR_CLK_ENABLE(); pwrclkchanged = SET; 8001d8c: 2701 movs r7, #1 __HAL_RCC_PWR_CLK_ENABLE(); 8001d8e: 69e3 ldr r3, [r4, #28] 8001d90: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8001d94: 61e3 str r3, [r4, #28] 8001d96: 69e3 ldr r3, [r4, #28] 8001d98: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001d9c: 9301 str r3, [sp, #4] 8001d9e: 9b01 ldr r3, [sp, #4] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8001da0: 4d2a ldr r5, [pc, #168] ; (8001e4c ) 8001da2: 682b ldr r3, [r5, #0] 8001da4: 05d8 lsls r0, r3, #23 8001da6: d51d bpl.n 8001de4 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 8001da8: 6a23 ldr r3, [r4, #32] if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8001daa: f413 7340 ands.w r3, r3, #768 ; 0x300 8001dae: d12d bne.n 8001e0c return HAL_TIMEOUT; } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8001db0: 6a23 ldr r3, [r4, #32] 8001db2: 6872 ldr r2, [r6, #4] 8001db4: f423 7340 bic.w r3, r3, #768 ; 0x300 8001db8: 4313 orrs r3, r2 8001dba: 6223 str r3, [r4, #32] /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) 8001dbc: b11f cbz r7, 8001dc6 { __HAL_RCC_PWR_CLK_DISABLE(); 8001dbe: 69e3 ldr r3, [r4, #28] 8001dc0: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8001dc4: 61e3 str r3, [r4, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8001dc6: 6830 ldr r0, [r6, #0] 8001dc8: f010 0002 ands.w r0, r0, #2 8001dcc: d01b beq.n 8001e06 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8001dce: 4a1e ldr r2, [pc, #120] ; (8001e48 ) 8001dd0: 68b1 ldr r1, [r6, #8] 8001dd2: 6853 ldr r3, [r2, #4] /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8001dd4: 2000 movs r0, #0 __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8001dd6: f423 4340 bic.w r3, r3, #49152 ; 0xc000 8001dda: 430b orrs r3, r1 8001ddc: 6053 str r3, [r2, #4] 8001dde: e012 b.n 8001e06 FlagStatus pwrclkchanged = RESET; 8001de0: 2700 movs r7, #0 8001de2: e7dd b.n 8001da0 SET_BIT(PWR->CR, PWR_CR_DBP); 8001de4: 682b ldr r3, [r5, #0] 8001de6: f443 7380 orr.w r3, r3, #256 ; 0x100 8001dea: 602b str r3, [r5, #0] tickstart = HAL_GetTick(); 8001dec: f7fe fa4c bl 8000288 8001df0: 4680 mov r8, r0 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8001df2: 682b ldr r3, [r5, #0] 8001df4: 05d9 lsls r1, r3, #23 8001df6: d4d7 bmi.n 8001da8 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8001df8: f7fe fa46 bl 8000288 8001dfc: eba0 0008 sub.w r0, r0, r8 8001e00: 2864 cmp r0, #100 ; 0x64 8001e02: d9f6 bls.n 8001df2 return HAL_TIMEOUT; 8001e04: 2003 movs r0, #3 } 8001e06: b002 add sp, #8 8001e08: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8001e0c: 6872 ldr r2, [r6, #4] 8001e0e: f402 7240 and.w r2, r2, #768 ; 0x300 8001e12: 4293 cmp r3, r2 8001e14: d0cc beq.n 8001db0 __HAL_RCC_BACKUPRESET_FORCE(); 8001e16: 2001 movs r0, #1 8001e18: 4a0d ldr r2, [pc, #52] ; (8001e50 ) temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8001e1a: 6a23 ldr r3, [r4, #32] __HAL_RCC_BACKUPRESET_FORCE(); 8001e1c: 6010 str r0, [r2, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8001e1e: 2000 movs r0, #0 temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8001e20: f423 7140 bic.w r1, r3, #768 ; 0x300 __HAL_RCC_BACKUPRESET_RELEASE(); 8001e24: 6010 str r0, [r2, #0] if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8001e26: 07da lsls r2, r3, #31 RCC->BDCR = temp_reg; 8001e28: 6221 str r1, [r4, #32] if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8001e2a: d5c1 bpl.n 8001db0 tickstart = HAL_GetTick(); 8001e2c: f7fe fa2c bl 8000288 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8001e30: f241 3888 movw r8, #5000 ; 0x1388 tickstart = HAL_GetTick(); 8001e34: 4605 mov r5, r0 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8001e36: 6a23 ldr r3, [r4, #32] 8001e38: 079b lsls r3, r3, #30 8001e3a: d4b9 bmi.n 8001db0 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8001e3c: f7fe fa24 bl 8000288 8001e40: 1b40 subs r0, r0, r5 8001e42: 4540 cmp r0, r8 8001e44: d9f7 bls.n 8001e36 8001e46: e7dd b.n 8001e04 8001e48: 40021000 .word 0x40021000 8001e4c: 40007000 .word 0x40007000 8001e50: 42420440 .word 0x42420440 08001e54 : { /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8001e54: 6803 ldr r3, [r0, #0] /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); /* Return function status */ return HAL_OK; } 8001e56: 2000 movs r0, #0 __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 8001e58: 68da ldr r2, [r3, #12] 8001e5a: f042 0201 orr.w r2, r2, #1 8001e5e: 60da str r2, [r3, #12] __HAL_TIM_ENABLE(htim); 8001e60: 681a ldr r2, [r3, #0] 8001e62: f042 0201 orr.w r2, r2, #1 8001e66: 601a str r2, [r3, #0] } 8001e68: 4770 bx lr 08001e6a : 8001e6a: 4770 bx lr 08001e6c : 8001e6c: 4770 bx lr 08001e6e : 8001e6e: 4770 bx lr 08001e70 : 8001e70: 4770 bx lr 08001e72 : * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { /* Capture compare 1 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8001e72: 6803 ldr r3, [r0, #0] { 8001e74: b510 push {r4, lr} if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8001e76: 691a ldr r2, [r3, #16] { 8001e78: 4604 mov r4, r0 if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8001e7a: 0791 lsls r1, r2, #30 8001e7c: d50e bpl.n 8001e9c { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) 8001e7e: 68da ldr r2, [r3, #12] 8001e80: 0792 lsls r2, r2, #30 8001e82: d50b bpl.n 8001e9c { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 8001e84: f06f 0202 mvn.w r2, #2 8001e88: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8001e8a: 2201 movs r2, #1 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8001e8c: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8001e8e: 7702 strb r2, [r0, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8001e90: 079b lsls r3, r3, #30 8001e92: d077 beq.n 8001f84 { HAL_TIM_IC_CaptureCallback(htim); 8001e94: f7ff ffea bl 8001e6c else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001e98: 2300 movs r3, #0 8001e9a: 7723 strb r3, [r4, #28] } } } /* Capture compare 2 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8001e9c: 6823 ldr r3, [r4, #0] 8001e9e: 691a ldr r2, [r3, #16] 8001ea0: 0750 lsls r0, r2, #29 8001ea2: d510 bpl.n 8001ec6 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) 8001ea4: 68da ldr r2, [r3, #12] 8001ea6: 0751 lsls r1, r2, #29 8001ea8: d50d bpl.n 8001ec6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8001eaa: f06f 0204 mvn.w r2, #4 8001eae: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001eb0: 2202 movs r2, #2 /* Input capture event */ if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001eb2: 699b ldr r3, [r3, #24] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8001eb4: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001eb6: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8001eba: 4620 mov r0, r4 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8001ebc: d068 beq.n 8001f90 HAL_TIM_IC_CaptureCallback(htim); 8001ebe: f7ff ffd5 bl 8001e6c else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001ec2: 2300 movs r3, #0 8001ec4: 7723 strb r3, [r4, #28] } } /* Capture compare 3 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8001ec6: 6823 ldr r3, [r4, #0] 8001ec8: 691a ldr r2, [r3, #16] 8001eca: 0712 lsls r2, r2, #28 8001ecc: d50f bpl.n 8001eee { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) 8001ece: 68da ldr r2, [r3, #12] 8001ed0: 0710 lsls r0, r2, #28 8001ed2: d50c bpl.n 8001eee { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 8001ed4: f06f 0208 mvn.w r2, #8 8001ed8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8001eda: 2204 movs r2, #4 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001edc: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8001ede: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001ee0: 0799 lsls r1, r3, #30 { HAL_TIM_IC_CaptureCallback(htim); 8001ee2: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8001ee4: d05a beq.n 8001f9c HAL_TIM_IC_CaptureCallback(htim); 8001ee6: f7ff ffc1 bl 8001e6c else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001eea: 2300 movs r3, #0 8001eec: 7723 strb r3, [r4, #28] } } /* Capture compare 4 event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 8001eee: 6823 ldr r3, [r4, #0] 8001ef0: 691a ldr r2, [r3, #16] 8001ef2: 06d2 lsls r2, r2, #27 8001ef4: d510 bpl.n 8001f18 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) 8001ef6: 68da ldr r2, [r3, #12] 8001ef8: 06d0 lsls r0, r2, #27 8001efa: d50d bpl.n 8001f18 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8001efc: f06f 0210 mvn.w r2, #16 8001f00: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001f02: 2208 movs r2, #8 /* Input capture event */ if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001f04: 69db ldr r3, [r3, #28] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8001f06: 7722 strb r2, [r4, #28] if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001f08: f413 7f40 tst.w r3, #768 ; 0x300 { HAL_TIM_IC_CaptureCallback(htim); 8001f0c: 4620 mov r0, r4 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8001f0e: d04b beq.n 8001fa8 HAL_TIM_IC_CaptureCallback(htim); 8001f10: f7ff ffac bl 8001e6c else { HAL_TIM_OC_DelayElapsedCallback(htim); HAL_TIM_PWM_PulseFinishedCallback(htim); } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8001f14: 2300 movs r3, #0 8001f16: 7723 strb r3, [r4, #28] } } /* TIM Update event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8001f18: 6823 ldr r3, [r4, #0] 8001f1a: 691a ldr r2, [r3, #16] 8001f1c: 07d1 lsls r1, r2, #31 8001f1e: d508 bpl.n 8001f32 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) 8001f20: 68da ldr r2, [r3, #12] 8001f22: 07d2 lsls r2, r2, #31 8001f24: d505 bpl.n 8001f32 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001f26: f06f 0201 mvn.w r2, #1 HAL_TIM_PeriodElapsedCallback(htim); 8001f2a: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8001f2c: 611a str r2, [r3, #16] HAL_TIM_PeriodElapsedCallback(htim); 8001f2e: f000 fe17 bl 8002b60 } } /* TIM Break input event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8001f32: 6823 ldr r3, [r4, #0] 8001f34: 691a ldr r2, [r3, #16] 8001f36: 0610 lsls r0, r2, #24 8001f38: d508 bpl.n 8001f4c { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) 8001f3a: 68da ldr r2, [r3, #12] 8001f3c: 0611 lsls r1, r2, #24 8001f3e: d505 bpl.n 8001f4c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001f40: f06f 0280 mvn.w r2, #128 ; 0x80 HAL_TIMEx_BreakCallback(htim); 8001f44: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8001f46: 611a str r2, [r3, #16] HAL_TIMEx_BreakCallback(htim); 8001f48: f000 f8c5 bl 80020d6 } } /* TIM Trigger detection event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8001f4c: 6823 ldr r3, [r4, #0] 8001f4e: 691a ldr r2, [r3, #16] 8001f50: 0652 lsls r2, r2, #25 8001f52: d508 bpl.n 8001f66 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) 8001f54: 68da ldr r2, [r3, #12] 8001f56: 0650 lsls r0, r2, #25 8001f58: d505 bpl.n 8001f66 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8001f5a: f06f 0240 mvn.w r2, #64 ; 0x40 HAL_TIM_TriggerCallback(htim); 8001f5e: 4620 mov r0, r4 __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 8001f60: 611a str r2, [r3, #16] HAL_TIM_TriggerCallback(htim); 8001f62: f7ff ff85 bl 8001e70 } } /* TIM commutation event */ if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 8001f66: 6823 ldr r3, [r4, #0] 8001f68: 691a ldr r2, [r3, #16] 8001f6a: 0691 lsls r1, r2, #26 8001f6c: d522 bpl.n 8001fb4 { if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) 8001f6e: 68da ldr r2, [r3, #12] 8001f70: 0692 lsls r2, r2, #26 8001f72: d51f bpl.n 8001fb4 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8001f74: f06f 0220 mvn.w r2, #32 HAL_TIMEx_CommutationCallback(htim); 8001f78: 4620 mov r0, r4 } } } 8001f7a: e8bd 4010 ldmia.w sp!, {r4, lr} __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8001f7e: 611a str r2, [r3, #16] HAL_TIMEx_CommutationCallback(htim); 8001f80: f000 b8a8 b.w 80020d4 HAL_TIM_OC_DelayElapsedCallback(htim); 8001f84: f7ff ff71 bl 8001e6a HAL_TIM_PWM_PulseFinishedCallback(htim); 8001f88: 4620 mov r0, r4 8001f8a: f7ff ff70 bl 8001e6e 8001f8e: e783 b.n 8001e98 HAL_TIM_OC_DelayElapsedCallback(htim); 8001f90: f7ff ff6b bl 8001e6a HAL_TIM_PWM_PulseFinishedCallback(htim); 8001f94: 4620 mov r0, r4 8001f96: f7ff ff6a bl 8001e6e 8001f9a: e792 b.n 8001ec2 HAL_TIM_OC_DelayElapsedCallback(htim); 8001f9c: f7ff ff65 bl 8001e6a HAL_TIM_PWM_PulseFinishedCallback(htim); 8001fa0: 4620 mov r0, r4 8001fa2: f7ff ff64 bl 8001e6e 8001fa6: e7a0 b.n 8001eea HAL_TIM_OC_DelayElapsedCallback(htim); 8001fa8: f7ff ff5f bl 8001e6a HAL_TIM_PWM_PulseFinishedCallback(htim); 8001fac: 4620 mov r0, r4 8001fae: f7ff ff5e bl 8001e6e 8001fb2: e7af b.n 8001f14 8001fb4: bd10 pop {r4, pc} ... 08001fb8 : { uint32_t tmpcr1 = 0U; tmpcr1 = TIMx->CR1; /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001fb8: 4a26 ldr r2, [pc, #152] ; (8002054 ) tmpcr1 = TIMx->CR1; 8001fba: 6803 ldr r3, [r0, #0] if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8001fbc: 4290 cmp r0, r2 8001fbe: d00a beq.n 8001fd6 8001fc0: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001fc4: d007 beq.n 8001fd6 8001fc6: f5a2 3294 sub.w r2, r2, #75776 ; 0x12800 8001fca: 4290 cmp r0, r2 8001fcc: d003 beq.n 8001fd6 8001fce: f502 6280 add.w r2, r2, #1024 ; 0x400 8001fd2: 4290 cmp r0, r2 8001fd4: d111 bne.n 8001ffa { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); tmpcr1 |= Structure->CounterMode; 8001fd6: 684a ldr r2, [r1, #4] tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8001fd8: f023 0370 bic.w r3, r3, #112 ; 0x70 tmpcr1 |= Structure->CounterMode; 8001fdc: 4313 orrs r3, r2 } if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8001fde: 4a1d ldr r2, [pc, #116] ; (8002054 ) 8001fe0: 4290 cmp r0, r2 8001fe2: d015 beq.n 8002010 8001fe4: f1b0 4f80 cmp.w r0, #1073741824 ; 0x40000000 8001fe8: d012 beq.n 8002010 8001fea: f5a2 3294 sub.w r2, r2, #75776 ; 0x12800 8001fee: 4290 cmp r0, r2 8001ff0: d00e beq.n 8002010 8001ff2: f502 6280 add.w r2, r2, #1024 ; 0x400 8001ff6: 4290 cmp r0, r2 8001ff8: d00a beq.n 8002010 8001ffa: 4a17 ldr r2, [pc, #92] ; (8002058 ) 8001ffc: 4290 cmp r0, r2 8001ffe: d007 beq.n 8002010 8002000: f502 6280 add.w r2, r2, #1024 ; 0x400 8002004: 4290 cmp r0, r2 8002006: d003 beq.n 8002010 8002008: f502 6280 add.w r2, r2, #1024 ; 0x400 800200c: 4290 cmp r0, r2 800200e: d103 bne.n 8002018 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; tmpcr1 |= (uint32_t)Structure->ClockDivision; 8002010: 68ca ldr r2, [r1, #12] tmpcr1 &= ~TIM_CR1_CKD; 8002012: f423 7340 bic.w r3, r3, #768 ; 0x300 tmpcr1 |= (uint32_t)Structure->ClockDivision; 8002016: 4313 orrs r3, r2 } /* Set the auto-reload preload */ tmpcr1 &= ~TIM_CR1_ARPE; tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 8002018: 694a ldr r2, [r1, #20] tmpcr1 &= ~TIM_CR1_ARPE; 800201a: f023 0380 bic.w r3, r3, #128 ; 0x80 tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; 800201e: 4313 orrs r3, r2 TIMx->CR1 = tmpcr1; 8002020: 6003 str r3, [r0, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8002022: 688b ldr r3, [r1, #8] 8002024: 62c3 str r3, [r0, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = (uint32_t)Structure->Prescaler; 8002026: 680b ldr r3, [r1, #0] 8002028: 6283 str r3, [r0, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 800202a: 4b0a ldr r3, [pc, #40] ; (8002054 ) 800202c: 4298 cmp r0, r3 800202e: d00b beq.n 8002048 8002030: f503 53a0 add.w r3, r3, #5120 ; 0x1400 8002034: 4298 cmp r0, r3 8002036: d007 beq.n 8002048 8002038: f503 6380 add.w r3, r3, #1024 ; 0x400 800203c: 4298 cmp r0, r3 800203e: d003 beq.n 8002048 8002040: f503 6380 add.w r3, r3, #1024 ; 0x400 8002044: 4298 cmp r0, r3 8002046: d101 bne.n 800204c { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8002048: 690b ldr r3, [r1, #16] 800204a: 6303 str r3, [r0, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter(only for TIM1 and TIM8) value immediatly */ TIMx->EGR = TIM_EGR_UG; 800204c: 2301 movs r3, #1 800204e: 6143 str r3, [r0, #20] 8002050: 4770 bx lr 8002052: bf00 nop 8002054: 40012c00 .word 0x40012c00 8002058: 40014000 .word 0x40014000 0800205c : { 800205c: b510 push {r4, lr} if(htim == NULL) 800205e: 4604 mov r4, r0 8002060: b1a0 cbz r0, 800208c if(htim->State == HAL_TIM_STATE_RESET) 8002062: f890 303d ldrb.w r3, [r0, #61] ; 0x3d 8002066: f003 02ff and.w r2, r3, #255 ; 0xff 800206a: b91b cbnz r3, 8002074 htim->Lock = HAL_UNLOCKED; 800206c: f880 203c strb.w r2, [r0, #60] ; 0x3c HAL_TIM_Base_MspInit(htim); 8002070: f001 f830 bl 80030d4 htim->State= HAL_TIM_STATE_BUSY; 8002074: 2302 movs r3, #2 TIM_Base_SetConfig(htim->Instance, &htim->Init); 8002076: 6820 ldr r0, [r4, #0] htim->State= HAL_TIM_STATE_BUSY; 8002078: f884 303d strb.w r3, [r4, #61] ; 0x3d TIM_Base_SetConfig(htim->Instance, &htim->Init); 800207c: 1d21 adds r1, r4, #4 800207e: f7ff ff9b bl 8001fb8 htim->State= HAL_TIM_STATE_READY; 8002082: 2301 movs r3, #1 return HAL_OK; 8002084: 2000 movs r0, #0 htim->State= HAL_TIM_STATE_READY; 8002086: f884 303d strb.w r3, [r4, #61] ; 0x3d return HAL_OK; 800208a: bd10 pop {r4, pc} return HAL_ERROR; 800208c: 2001 movs r0, #1 } 800208e: bd10 pop {r4, pc} 08002090 : /* Check the parameters */ assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); __HAL_LOCK(htim); 8002090: f890 303c ldrb.w r3, [r0, #60] ; 0x3c { 8002094: b510 push {r4, lr} __HAL_LOCK(htim); 8002096: 2b01 cmp r3, #1 8002098: f04f 0302 mov.w r3, #2 800209c: d018 beq.n 80020d0 htim->State = HAL_TIM_STATE_BUSY; 800209e: f880 303d strb.w r3, [r0, #61] ; 0x3d /* Reset the MMS Bits */ htim->Instance->CR2 &= ~TIM_CR2_MMS; 80020a2: 6803 ldr r3, [r0, #0] /* Select the TRGO source */ htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80020a4: 680c ldr r4, [r1, #0] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80020a6: 685a ldr r2, [r3, #4] /* Reset the MSM Bit */ htim->Instance->SMCR &= ~TIM_SMCR_MSM; /* Set or Reset the MSM Bit */ htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80020a8: 6849 ldr r1, [r1, #4] htim->Instance->CR2 &= ~TIM_CR2_MMS; 80020aa: f022 0270 bic.w r2, r2, #112 ; 0x70 80020ae: 605a str r2, [r3, #4] htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 80020b0: 685a ldr r2, [r3, #4] 80020b2: 4322 orrs r2, r4 80020b4: 605a str r2, [r3, #4] htim->Instance->SMCR &= ~TIM_SMCR_MSM; 80020b6: 689a ldr r2, [r3, #8] 80020b8: f022 0280 bic.w r2, r2, #128 ; 0x80 80020bc: 609a str r2, [r3, #8] htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 80020be: 689a ldr r2, [r3, #8] 80020c0: 430a orrs r2, r1 80020c2: 609a str r2, [r3, #8] htim->State = HAL_TIM_STATE_READY; 80020c4: 2301 movs r3, #1 80020c6: f880 303d strb.w r3, [r0, #61] ; 0x3d __HAL_UNLOCK(htim); 80020ca: 2300 movs r3, #0 80020cc: f880 303c strb.w r3, [r0, #60] ; 0x3c __HAL_LOCK(htim); 80020d0: 4618 mov r0, r3 return HAL_OK; } 80020d2: bd10 pop {r4, pc} 080020d4 : 80020d4: 4770 bx lr 080020d6 : * @brief Hall Break detection callback in non blocking mode * @param htim : TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 80020d6: 4770 bx lr 080020d8 : * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80020d8: 6803 ldr r3, [r0, #0] 80020da: 68da ldr r2, [r3, #12] 80020dc: f422 7290 bic.w r2, r2, #288 ; 0x120 80020e0: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80020e2: 695a ldr r2, [r3, #20] 80020e4: f022 0201 bic.w r2, r2, #1 80020e8: 615a str r2, [r3, #20] /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80020ea: 2320 movs r3, #32 80020ec: f880 303a strb.w r3, [r0, #58] ; 0x3a 80020f0: 4770 bx lr ... 080020f4 : * @param huart: pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80020f4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80020f8: 4681 mov r9, r0 assert_param(IS_UART_MODE(huart->Init.Mode)); /*------- UART-associated USART registers setting : CR2 Configuration ------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80020fa: 6805 ldr r5, [r0, #0] 80020fc: 68c2 ldr r2, [r0, #12] 80020fe: 692b ldr r3, [r5, #16] Set PCE and PS bits according to huart->Init.Parity value Set TE and RE bits according to huart->Init.Mode value Set OVER8 bit according to huart->Init.OverSampling value */ #if defined(USART_CR1_OVER8) tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 8002100: 69c1 ldr r1, [r0, #28] MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8002102: f423 5340 bic.w r3, r3, #12288 ; 0x3000 8002106: 4313 orrs r3, r2 8002108: 612b str r3, [r5, #16] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 800210a: 6883 ldr r3, [r0, #8] 800210c: 6900 ldr r0, [r0, #16] MODIFY_REG(huart->Instance->CR1, 800210e: 68ea ldr r2, [r5, #12] tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 8002110: 4303 orrs r3, r0 8002112: f8d9 0014 ldr.w r0, [r9, #20] MODIFY_REG(huart->Instance->CR1, 8002116: f422 4216 bic.w r2, r2, #38400 ; 0x9600 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 800211a: 4303 orrs r3, r0 MODIFY_REG(huart->Instance->CR1, 800211c: f022 020c bic.w r2, r2, #12 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 8002120: 430b orrs r3, r1 MODIFY_REG(huart->Instance->CR1, 8002122: 4313 orrs r3, r2 8002124: 60eb str r3, [r5, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*------- UART-associated USART registers setting : CR3 Configuration ------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8002126: 696b ldr r3, [r5, #20] 8002128: f8d9 2018 ldr.w r2, [r9, #24] 800212c: f423 7340 bic.w r3, r3, #768 ; 0x300 8002130: 4313 orrs r3, r2 #if defined(USART_CR1_OVER8) /* Check the Over Sampling */ if(huart->Init.OverSampling == UART_OVERSAMPLING_8) 8002132: f5b1 4f00 cmp.w r1, #32768 ; 0x8000 MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8002136: 616b str r3, [r5, #20] 8002138: 4b7e ldr r3, [pc, #504] ; (8002334 ) if(huart->Init.OverSampling == UART_OVERSAMPLING_8) 800213a: d17f bne.n 800223c { /*-------------------------- USART BRR Configuration ---------------------*/ if(huart->Instance == USART1) 800213c: 429d cmp r5, r3 800213e: f04f 0419 mov.w r4, #25 8002142: d147 bne.n 80021d4 { huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8002144: f7ff fe08 bl 8001d58 8002148: fb04 f300 mul.w r3, r4, r0 800214c: f8d9 7004 ldr.w r7, [r9, #4] 8002150: f04f 0864 mov.w r8, #100 ; 0x64 8002154: 007f lsls r7, r7, #1 8002156: fbb3 f3f7 udiv r3, r3, r7 800215a: fbb3 f3f8 udiv r3, r3, r8 800215e: 011f lsls r7, r3, #4 8002160: f7ff fdfa bl 8001d58 8002164: 4360 muls r0, r4 8002166: f8d9 3004 ldr.w r3, [r9, #4] 800216a: 005b lsls r3, r3, #1 800216c: fbb0 f6f3 udiv r6, r0, r3 8002170: f7ff fdf2 bl 8001d58 8002174: 4360 muls r0, r4 8002176: f8d9 3004 ldr.w r3, [r9, #4] 800217a: 005b lsls r3, r3, #1 800217c: fbb0 f3f3 udiv r3, r0, r3 8002180: fbb3 f3f8 udiv r3, r3, r8 8002184: fb08 6313 mls r3, r8, r3, r6 8002188: 00db lsls r3, r3, #3 800218a: 3332 adds r3, #50 ; 0x32 800218c: fbb3 f3f8 udiv r3, r3, r8 8002190: 005b lsls r3, r3, #1 8002192: f403 76f8 and.w r6, r3, #496 ; 0x1f0 8002196: f7ff fddf bl 8001d58 800219a: 4360 muls r0, r4 800219c: f8d9 2004 ldr.w r2, [r9, #4] 80021a0: 0052 lsls r2, r2, #1 80021a2: fbb0 faf2 udiv sl, r0, r2 80021a6: f7ff fdd7 bl 8001d58 } else { huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80021aa: 4360 muls r0, r4 80021ac: f8d9 3004 ldr.w r3, [r9, #4] 80021b0: 005b lsls r3, r3, #1 80021b2: fbb0 f3f3 udiv r3, r0, r3 80021b6: fbb3 f3f8 udiv r3, r3, r8 80021ba: fb08 a313 mls r3, r8, r3, sl 80021be: 00db lsls r3, r3, #3 80021c0: 3332 adds r3, #50 ; 0x32 80021c2: fbb3 f3f8 udiv r3, r3, r8 80021c6: f003 0307 and.w r3, r3, #7 80021ca: 443b add r3, r7 { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); } else { huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80021cc: 4433 add r3, r6 80021ce: 60ab str r3, [r5, #8] 80021d0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80021d4: f7ff fdb0 bl 8001d38 80021d8: fb04 f300 mul.w r3, r4, r0 80021dc: f8d9 7004 ldr.w r7, [r9, #4] 80021e0: f04f 0864 mov.w r8, #100 ; 0x64 80021e4: 007f lsls r7, r7, #1 80021e6: fbb3 f3f7 udiv r3, r3, r7 80021ea: fbb3 f3f8 udiv r3, r3, r8 80021ee: 011f lsls r7, r3, #4 80021f0: f7ff fda2 bl 8001d38 80021f4: 4360 muls r0, r4 80021f6: f8d9 3004 ldr.w r3, [r9, #4] 80021fa: 005b lsls r3, r3, #1 80021fc: fbb0 f6f3 udiv r6, r0, r3 8002200: f7ff fd9a bl 8001d38 8002204: 4360 muls r0, r4 8002206: f8d9 3004 ldr.w r3, [r9, #4] 800220a: 005b lsls r3, r3, #1 800220c: fbb0 f3f3 udiv r3, r0, r3 8002210: fbb3 f3f8 udiv r3, r3, r8 8002214: fb08 6313 mls r3, r8, r3, r6 8002218: 00db lsls r3, r3, #3 800221a: 3332 adds r3, #50 ; 0x32 800221c: fbb3 f3f8 udiv r3, r3, r8 8002220: 005b lsls r3, r3, #1 8002222: f403 76f8 and.w r6, r3, #496 ; 0x1f0 8002226: f7ff fd87 bl 8001d38 800222a: 4360 muls r0, r4 800222c: f8d9 2004 ldr.w r2, [r9, #4] 8002230: 0052 lsls r2, r2, #1 8002232: fbb0 faf2 udiv sl, r0, r2 8002236: f7ff fd7f bl 8001d38 800223a: e7b6 b.n 80021aa if(huart->Instance == USART1) 800223c: 429d cmp r5, r3 800223e: f04f 0419 mov.w r4, #25 8002242: d143 bne.n 80022cc huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate); 8002244: f7ff fd88 bl 8001d58 8002248: fb04 f300 mul.w r3, r4, r0 800224c: f8d9 6004 ldr.w r6, [r9, #4] 8002250: f04f 0864 mov.w r8, #100 ; 0x64 8002254: 00b6 lsls r6, r6, #2 8002256: fbb3 f3f6 udiv r3, r3, r6 800225a: fbb3 f3f8 udiv r3, r3, r8 800225e: 011e lsls r6, r3, #4 8002260: f7ff fd7a bl 8001d58 8002264: 4360 muls r0, r4 8002266: f8d9 3004 ldr.w r3, [r9, #4] 800226a: 009b lsls r3, r3, #2 800226c: fbb0 f7f3 udiv r7, r0, r3 8002270: f7ff fd72 bl 8001d58 8002274: 4360 muls r0, r4 8002276: f8d9 3004 ldr.w r3, [r9, #4] 800227a: 009b lsls r3, r3, #2 800227c: fbb0 f3f3 udiv r3, r0, r3 8002280: fbb3 f3f8 udiv r3, r3, r8 8002284: fb08 7313 mls r3, r8, r3, r7 8002288: 011b lsls r3, r3, #4 800228a: 3332 adds r3, #50 ; 0x32 800228c: fbb3 f3f8 udiv r3, r3, r8 8002290: f003 07f0 and.w r7, r3, #240 ; 0xf0 8002294: f7ff fd60 bl 8001d58 8002298: 4360 muls r0, r4 800229a: f8d9 2004 ldr.w r2, [r9, #4] 800229e: 0092 lsls r2, r2, #2 80022a0: fbb0 faf2 udiv sl, r0, r2 80022a4: f7ff fd58 bl 8001d58 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate); 80022a8: 4360 muls r0, r4 80022aa: f8d9 3004 ldr.w r3, [r9, #4] 80022ae: 009b lsls r3, r3, #2 80022b0: fbb0 f3f3 udiv r3, r0, r3 80022b4: fbb3 f3f8 udiv r3, r3, r8 80022b8: fb08 a313 mls r3, r8, r3, sl 80022bc: 011b lsls r3, r3, #4 80022be: 3332 adds r3, #50 ; 0x32 80022c0: fbb3 f3f8 udiv r3, r3, r8 80022c4: f003 030f and.w r3, r3, #15 80022c8: 433b orrs r3, r7 80022ca: e77f b.n 80021cc 80022cc: f7ff fd34 bl 8001d38 80022d0: fb04 f300 mul.w r3, r4, r0 80022d4: f8d9 6004 ldr.w r6, [r9, #4] 80022d8: f04f 0864 mov.w r8, #100 ; 0x64 80022dc: 00b6 lsls r6, r6, #2 80022de: fbb3 f3f6 udiv r3, r3, r6 80022e2: fbb3 f3f8 udiv r3, r3, r8 80022e6: 011e lsls r6, r3, #4 80022e8: f7ff fd26 bl 8001d38 80022ec: 4360 muls r0, r4 80022ee: f8d9 3004 ldr.w r3, [r9, #4] 80022f2: 009b lsls r3, r3, #2 80022f4: fbb0 f7f3 udiv r7, r0, r3 80022f8: f7ff fd1e bl 8001d38 80022fc: 4360 muls r0, r4 80022fe: f8d9 3004 ldr.w r3, [r9, #4] 8002302: 009b lsls r3, r3, #2 8002304: fbb0 f3f3 udiv r3, r0, r3 8002308: fbb3 f3f8 udiv r3, r3, r8 800230c: fb08 7313 mls r3, r8, r3, r7 8002310: 011b lsls r3, r3, #4 8002312: 3332 adds r3, #50 ; 0x32 8002314: fbb3 f3f8 udiv r3, r3, r8 8002318: f003 07f0 and.w r7, r3, #240 ; 0xf0 800231c: f7ff fd0c bl 8001d38 8002320: 4360 muls r0, r4 8002322: f8d9 2004 ldr.w r2, [r9, #4] 8002326: 0092 lsls r2, r2, #2 8002328: fbb0 faf2 udiv sl, r0, r2 800232c: f7ff fd04 bl 8001d38 8002330: e7ba b.n 80022a8 8002332: bf00 nop 8002334: 40013800 .word 0x40013800 08002338 : static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 8002338: b5f8 push {r3, r4, r5, r6, r7, lr} 800233a: 4604 mov r4, r0 800233c: 460e mov r6, r1 800233e: 4617 mov r7, r2 8002340: 461d mov r5, r3 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8002342: 6821 ldr r1, [r4, #0] 8002344: 680b ldr r3, [r1, #0] 8002346: ea36 0303 bics.w r3, r6, r3 800234a: d101 bne.n 8002350 return HAL_OK; 800234c: 2000 movs r0, #0 } 800234e: bdf8 pop {r3, r4, r5, r6, r7, pc} if(Timeout != HAL_MAX_DELAY) 8002350: 1c6b adds r3, r5, #1 8002352: d0f7 beq.n 8002344 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 8002354: b995 cbnz r5, 800237c CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 8002356: 6823 ldr r3, [r4, #0] __HAL_UNLOCK(huart); 8002358: 2003 movs r0, #3 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 800235a: 68da ldr r2, [r3, #12] 800235c: f422 72d0 bic.w r2, r2, #416 ; 0x1a0 8002360: 60da str r2, [r3, #12] CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8002362: 695a ldr r2, [r3, #20] 8002364: f022 0201 bic.w r2, r2, #1 8002368: 615a str r2, [r3, #20] huart->gState = HAL_UART_STATE_READY; 800236a: 2320 movs r3, #32 800236c: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState = HAL_UART_STATE_READY; 8002370: f884 303a strb.w r3, [r4, #58] ; 0x3a __HAL_UNLOCK(huart); 8002374: 2300 movs r3, #0 8002376: f884 3038 strb.w r3, [r4, #56] ; 0x38 800237a: bdf8 pop {r3, r4, r5, r6, r7, pc} if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout)) 800237c: f7fd ff84 bl 8000288 8002380: 1bc0 subs r0, r0, r7 8002382: 4285 cmp r5, r0 8002384: d2dd bcs.n 8002342 8002386: e7e6 b.n 8002356 08002388 : { 8002388: b510 push {r4, lr} if(huart == NULL) 800238a: 4604 mov r4, r0 800238c: b340 cbz r0, 80023e0 if(huart->gState == HAL_UART_STATE_RESET) 800238e: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 8002392: f003 02ff and.w r2, r3, #255 ; 0xff 8002396: b91b cbnz r3, 80023a0 huart->Lock = HAL_UNLOCKED; 8002398: f880 2038 strb.w r2, [r0, #56] ; 0x38 HAL_UART_MspInit(huart); 800239c: f000 feae bl 80030fc huart->gState = HAL_UART_STATE_BUSY; 80023a0: 2324 movs r3, #36 ; 0x24 __HAL_UART_DISABLE(huart); 80023a2: 6822 ldr r2, [r4, #0] huart->gState = HAL_UART_STATE_BUSY; 80023a4: f884 3039 strb.w r3, [r4, #57] ; 0x39 __HAL_UART_DISABLE(huart); 80023a8: 68d3 ldr r3, [r2, #12] UART_SetConfig(huart); 80023aa: 4620 mov r0, r4 __HAL_UART_DISABLE(huart); 80023ac: f423 5300 bic.w r3, r3, #8192 ; 0x2000 80023b0: 60d3 str r3, [r2, #12] UART_SetConfig(huart); 80023b2: f7ff fe9f bl 80020f4 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80023b6: 6823 ldr r3, [r4, #0] huart->ErrorCode = HAL_UART_ERROR_NONE; 80023b8: 2000 movs r0, #0 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80023ba: 691a ldr r2, [r3, #16] 80023bc: f422 4290 bic.w r2, r2, #18432 ; 0x4800 80023c0: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80023c2: 695a ldr r2, [r3, #20] 80023c4: f022 022a bic.w r2, r2, #42 ; 0x2a 80023c8: 615a str r2, [r3, #20] __HAL_UART_ENABLE(huart); 80023ca: 68da ldr r2, [r3, #12] 80023cc: f442 5200 orr.w r2, r2, #8192 ; 0x2000 80023d0: 60da str r2, [r3, #12] huart->gState= HAL_UART_STATE_READY; 80023d2: 2320 movs r3, #32 huart->ErrorCode = HAL_UART_ERROR_NONE; 80023d4: 63e0 str r0, [r4, #60] ; 0x3c huart->gState= HAL_UART_STATE_READY; 80023d6: f884 3039 strb.w r3, [r4, #57] ; 0x39 huart->RxState= HAL_UART_STATE_READY; 80023da: f884 303a strb.w r3, [r4, #58] ; 0x3a return HAL_OK; 80023de: bd10 pop {r4, pc} return HAL_ERROR; 80023e0: 2001 movs r0, #1 } 80023e2: bd10 pop {r4, pc} 080023e4 : { 80023e4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80023e8: 461f mov r7, r3 if(huart->gState == HAL_UART_STATE_READY) 80023ea: f890 3039 ldrb.w r3, [r0, #57] ; 0x39 { 80023ee: 4604 mov r4, r0 if(huart->gState == HAL_UART_STATE_READY) 80023f0: 2b20 cmp r3, #32 { 80023f2: 460d mov r5, r1 80023f4: 4690 mov r8, r2 if(huart->gState == HAL_UART_STATE_READY) 80023f6: d14e bne.n 8002496 if((pData == NULL) || (Size == 0U)) 80023f8: 2900 cmp r1, #0 80023fa: d049 beq.n 8002490 80023fc: 2a00 cmp r2, #0 80023fe: d047 beq.n 8002490 __HAL_LOCK(huart); 8002400: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 8002404: 2b01 cmp r3, #1 8002406: d046 beq.n 8002496 8002408: 2301 movs r3, #1 800240a: f880 3038 strb.w r3, [r0, #56] ; 0x38 huart->ErrorCode = HAL_UART_ERROR_NONE; 800240e: 2300 movs r3, #0 8002410: 63c3 str r3, [r0, #60] ; 0x3c huart->gState = HAL_UART_STATE_BUSY_TX; 8002412: 2321 movs r3, #33 ; 0x21 8002414: f880 3039 strb.w r3, [r0, #57] ; 0x39 tickstart = HAL_GetTick(); 8002418: f7fd ff36 bl 8000288 800241c: 4606 mov r6, r0 huart->TxXferSize = Size; 800241e: f8a4 8024 strh.w r8, [r4, #36] ; 0x24 huart->TxXferCount = Size; 8002422: f8a4 8026 strh.w r8, [r4, #38] ; 0x26 while(huart->TxXferCount > 0U) 8002426: 8ce3 ldrh r3, [r4, #38] ; 0x26 8002428: b29b uxth r3, r3 800242a: b96b cbnz r3, 8002448 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 800242c: 463b mov r3, r7 800242e: 4632 mov r2, r6 8002430: 2140 movs r1, #64 ; 0x40 8002432: 4620 mov r0, r4 8002434: f7ff ff80 bl 8002338 8002438: b9a8 cbnz r0, 8002466 huart->gState = HAL_UART_STATE_READY; 800243a: 2320 movs r3, #32 __HAL_UNLOCK(huart); 800243c: f884 0038 strb.w r0, [r4, #56] ; 0x38 huart->gState = HAL_UART_STATE_READY; 8002440: f884 3039 strb.w r3, [r4, #57] ; 0x39 return HAL_OK; 8002444: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->TxXferCount--; 8002448: 8ce3 ldrh r3, [r4, #38] ; 0x26 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800244a: 4632 mov r2, r6 huart->TxXferCount--; 800244c: 3b01 subs r3, #1 800244e: b29b uxth r3, r3 8002450: 84e3 strh r3, [r4, #38] ; 0x26 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8002452: 68a3 ldr r3, [r4, #8] if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8002454: 2180 movs r1, #128 ; 0x80 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8002456: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800245a: 4620 mov r0, r4 800245c: 463b mov r3, r7 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 800245e: d10e bne.n 800247e if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8002460: f7ff ff6a bl 8002338 8002464: b110 cbz r0, 800246c return HAL_TIMEOUT; 8002466: 2003 movs r0, #3 8002468: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} huart->Instance->DR = (*tmp & (uint16_t)0x01FF); 800246c: 882b ldrh r3, [r5, #0] 800246e: 6822 ldr r2, [r4, #0] 8002470: f3c3 0308 ubfx r3, r3, #0, #9 8002474: 6053 str r3, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8002476: 6923 ldr r3, [r4, #16] 8002478: b943 cbnz r3, 800248c pData +=2U; 800247a: 3502 adds r5, #2 800247c: e7d3 b.n 8002426 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800247e: f7ff ff5b bl 8002338 8002482: 2800 cmp r0, #0 8002484: d1ef bne.n 8002466 huart->Instance->DR = (*pData++ & (uint8_t)0xFF); 8002486: 6823 ldr r3, [r4, #0] 8002488: 782a ldrb r2, [r5, #0] 800248a: 605a str r2, [r3, #4] 800248c: 3501 adds r5, #1 800248e: e7ca b.n 8002426 return HAL_ERROR; 8002490: 2001 movs r0, #1 8002492: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} return HAL_BUSY; 8002496: 2002 movs r0, #2 } 8002498: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 0800249c : if(huart->RxState == HAL_UART_STATE_READY) 800249c: f890 303a ldrb.w r3, [r0, #58] ; 0x3a 80024a0: 2b20 cmp r3, #32 80024a2: d120 bne.n 80024e6 if((pData == NULL) || (Size == 0U)) 80024a4: b1e9 cbz r1, 80024e2 80024a6: b1e2 cbz r2, 80024e2 __HAL_LOCK(huart); 80024a8: f890 3038 ldrb.w r3, [r0, #56] ; 0x38 80024ac: 2b01 cmp r3, #1 80024ae: d01a beq.n 80024e6 huart->RxXferCount = Size; 80024b0: 85c2 strh r2, [r0, #46] ; 0x2e huart->RxXferSize = Size; 80024b2: 8582 strh r2, [r0, #44] ; 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 80024b4: 2300 movs r3, #0 huart->RxState = HAL_UART_STATE_BUSY_RX; 80024b6: 2222 movs r2, #34 ; 0x22 huart->ErrorCode = HAL_UART_ERROR_NONE; 80024b8: 63c3 str r3, [r0, #60] ; 0x3c huart->RxState = HAL_UART_STATE_BUSY_RX; 80024ba: f880 203a strb.w r2, [r0, #58] ; 0x3a __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 80024be: 6802 ldr r2, [r0, #0] huart->pRxBuffPtr = pData; 80024c0: 6281 str r1, [r0, #40] ; 0x28 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 80024c2: 68d1 ldr r1, [r2, #12] __HAL_UNLOCK(huart); 80024c4: f880 3038 strb.w r3, [r0, #56] ; 0x38 __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 80024c8: f441 7180 orr.w r1, r1, #256 ; 0x100 80024cc: 60d1 str r1, [r2, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 80024ce: 6951 ldr r1, [r2, #20] return HAL_OK; 80024d0: 4618 mov r0, r3 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 80024d2: f041 0101 orr.w r1, r1, #1 80024d6: 6151 str r1, [r2, #20] __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 80024d8: 68d1 ldr r1, [r2, #12] 80024da: f041 0120 orr.w r1, r1, #32 80024de: 60d1 str r1, [r2, #12] return HAL_OK; 80024e0: 4770 bx lr return HAL_ERROR; 80024e2: 2001 movs r0, #1 80024e4: 4770 bx lr return HAL_BUSY; 80024e6: 2002 movs r0, #2 } 80024e8: 4770 bx lr 080024ea : 80024ea: 4770 bx lr 080024ec : if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80024ec: f890 303a ldrb.w r3, [r0, #58] ; 0x3a { 80024f0: b510 push {r4, lr} if(huart->RxState == HAL_UART_STATE_BUSY_RX) 80024f2: 2b22 cmp r3, #34 ; 0x22 80024f4: d136 bne.n 8002564 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 80024f6: 6883 ldr r3, [r0, #8] 80024f8: 6901 ldr r1, [r0, #16] 80024fa: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 80024fe: 6802 ldr r2, [r0, #0] 8002500: 6a83 ldr r3, [r0, #40] ; 0x28 8002502: d123 bne.n 800254c *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8002504: 6852 ldr r2, [r2, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8002506: b9e9 cbnz r1, 8002544 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); 8002508: f3c2 0208 ubfx r2, r2, #0, #9 800250c: f823 2b02 strh.w r2, [r3], #2 huart->pRxBuffPtr += 1U; 8002510: 6283 str r3, [r0, #40] ; 0x28 if(--huart->RxXferCount == 0U) 8002512: 8dc4 ldrh r4, [r0, #46] ; 0x2e 8002514: 3c01 subs r4, #1 8002516: b2a4 uxth r4, r4 8002518: 85c4 strh r4, [r0, #46] ; 0x2e 800251a: b98c cbnz r4, 8002540 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); 800251c: 6803 ldr r3, [r0, #0] 800251e: 68da ldr r2, [r3, #12] 8002520: f022 0220 bic.w r2, r2, #32 8002524: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_PE); 8002526: 68da ldr r2, [r3, #12] 8002528: f422 7280 bic.w r2, r2, #256 ; 0x100 800252c: 60da str r2, [r3, #12] __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); 800252e: 695a ldr r2, [r3, #20] 8002530: f022 0201 bic.w r2, r2, #1 8002534: 615a str r2, [r3, #20] huart->RxState = HAL_UART_STATE_READY; 8002536: 2320 movs r3, #32 8002538: f880 303a strb.w r3, [r0, #58] ; 0x3a HAL_UART_RxCpltCallback(huart); 800253c: f000 fab6 bl 8002aac if(--huart->RxXferCount == 0U) 8002540: 2000 movs r0, #0 } 8002542: bd10 pop {r4, pc} *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF); 8002544: b2d2 uxtb r2, r2 8002546: f823 2b01 strh.w r2, [r3], #1 800254a: e7e1 b.n 8002510 if(huart->Init.Parity == UART_PARITY_NONE) 800254c: b921 cbnz r1, 8002558 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); 800254e: 1c59 adds r1, r3, #1 8002550: 6852 ldr r2, [r2, #4] 8002552: 6281 str r1, [r0, #40] ; 0x28 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); 8002554: 701a strb r2, [r3, #0] 8002556: e7dc b.n 8002512 8002558: 6852 ldr r2, [r2, #4] 800255a: 1c59 adds r1, r3, #1 800255c: 6281 str r1, [r0, #40] ; 0x28 800255e: f002 027f and.w r2, r2, #127 ; 0x7f 8002562: e7f7 b.n 8002554 return HAL_BUSY; 8002564: 2002 movs r0, #2 8002566: bd10 pop {r4, pc} 08002568 : 8002568: 4770 bx lr ... 0800256c : uint32_t isrflags = READ_REG(huart->Instance->SR); 800256c: 6803 ldr r3, [r0, #0] { 800256e: b570 push {r4, r5, r6, lr} uint32_t isrflags = READ_REG(huart->Instance->SR); 8002570: 681a ldr r2, [r3, #0] { 8002572: 4604 mov r4, r0 if(errorflags == RESET) 8002574: 0716 lsls r6, r2, #28 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8002576: 68d9 ldr r1, [r3, #12] uint32_t cr3its = READ_REG(huart->Instance->CR3); 8002578: 695d ldr r5, [r3, #20] if(errorflags == RESET) 800257a: d107 bne.n 800258c if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 800257c: 0696 lsls r6, r2, #26 800257e: d55a bpl.n 8002636 8002580: 068d lsls r5, r1, #26 8002582: d558 bpl.n 8002636 } 8002584: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} UART_Receive_IT(huart); 8002588: f7ff bfb0 b.w 80024ec if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 800258c: f015 0501 ands.w r5, r5, #1 8002590: d102 bne.n 8002598 8002592: f411 7f90 tst.w r1, #288 ; 0x120 8002596: d04e beq.n 8002636 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 8002598: 07d3 lsls r3, r2, #31 800259a: d505 bpl.n 80025a8 800259c: 05ce lsls r6, r1, #23 huart->ErrorCode |= HAL_UART_ERROR_PE; 800259e: bf42 ittt mi 80025a0: 6be3 ldrmi r3, [r4, #60] ; 0x3c 80025a2: f043 0301 orrmi.w r3, r3, #1 80025a6: 63e3 strmi r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80025a8: 0750 lsls r0, r2, #29 80025aa: d504 bpl.n 80025b6 80025ac: b11d cbz r5, 80025b6 huart->ErrorCode |= HAL_UART_ERROR_NE; 80025ae: 6be3 ldr r3, [r4, #60] ; 0x3c 80025b0: f043 0302 orr.w r3, r3, #2 80025b4: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80025b6: 0793 lsls r3, r2, #30 80025b8: d504 bpl.n 80025c4 80025ba: b11d cbz r5, 80025c4 huart->ErrorCode |= HAL_UART_ERROR_FE; 80025bc: 6be3 ldr r3, [r4, #60] ; 0x3c 80025be: f043 0304 orr.w r3, r3, #4 80025c2: 63e3 str r3, [r4, #60] ; 0x3c if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80025c4: 0716 lsls r6, r2, #28 80025c6: d504 bpl.n 80025d2 80025c8: b11d cbz r5, 80025d2 huart->ErrorCode |= HAL_UART_ERROR_ORE; 80025ca: 6be3 ldr r3, [r4, #60] ; 0x3c 80025cc: f043 0308 orr.w r3, r3, #8 80025d0: 63e3 str r3, [r4, #60] ; 0x3c if(huart->ErrorCode != HAL_UART_ERROR_NONE) 80025d2: 6be3 ldr r3, [r4, #60] ; 0x3c 80025d4: 2b00 cmp r3, #0 80025d6: d066 beq.n 80026a6 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 80025d8: 0695 lsls r5, r2, #26 80025da: d504 bpl.n 80025e6 80025dc: 0688 lsls r0, r1, #26 80025de: d502 bpl.n 80025e6 UART_Receive_IT(huart); 80025e0: 4620 mov r0, r4 80025e2: f7ff ff83 bl 80024ec dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80025e6: 6823 ldr r3, [r4, #0] UART_EndRxTransfer(huart); 80025e8: 4620 mov r0, r4 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 80025ea: 695d ldr r5, [r3, #20] if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 80025ec: 6be2 ldr r2, [r4, #60] ; 0x3c 80025ee: 0711 lsls r1, r2, #28 80025f0: d402 bmi.n 80025f8 80025f2: f015 0540 ands.w r5, r5, #64 ; 0x40 80025f6: d01a beq.n 800262e UART_EndRxTransfer(huart); 80025f8: f7ff fd6e bl 80020d8 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80025fc: 6823 ldr r3, [r4, #0] 80025fe: 695a ldr r2, [r3, #20] 8002600: 0652 lsls r2, r2, #25 8002602: d510 bpl.n 8002626 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8002604: 695a ldr r2, [r3, #20] if(huart->hdmarx != NULL) 8002606: 6b60 ldr r0, [r4, #52] ; 0x34 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8002608: f022 0240 bic.w r2, r2, #64 ; 0x40 800260c: 615a str r2, [r3, #20] if(huart->hdmarx != NULL) 800260e: b150 cbz r0, 8002626 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8002610: 4b25 ldr r3, [pc, #148] ; (80026a8 ) 8002612: 6343 str r3, [r0, #52] ; 0x34 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8002614: f7fd ffde bl 80005d4 8002618: 2800 cmp r0, #0 800261a: d044 beq.n 80026a6 huart->hdmarx->XferAbortCallback(huart->hdmarx); 800261c: 6b60 ldr r0, [r4, #52] ; 0x34 } 800261e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} huart->hdmarx->XferAbortCallback(huart->hdmarx); 8002622: 6b43 ldr r3, [r0, #52] ; 0x34 8002624: 4718 bx r3 HAL_UART_ErrorCallback(huart); 8002626: 4620 mov r0, r4 8002628: f7ff ff9e bl 8002568 800262c: bd70 pop {r4, r5, r6, pc} HAL_UART_ErrorCallback(huart); 800262e: f7ff ff9b bl 8002568 huart->ErrorCode = HAL_UART_ERROR_NONE; 8002632: 63e5 str r5, [r4, #60] ; 0x3c 8002634: bd70 pop {r4, r5, r6, pc} if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8002636: 0616 lsls r6, r2, #24 8002638: d527 bpl.n 800268a 800263a: 060d lsls r5, r1, #24 800263c: d525 bpl.n 800268a if(huart->gState == HAL_UART_STATE_BUSY_TX) 800263e: f894 2039 ldrb.w r2, [r4, #57] ; 0x39 8002642: 2a21 cmp r2, #33 ; 0x21 8002644: d12f bne.n 80026a6 if(huart->Init.WordLength == UART_WORDLENGTH_9B) 8002646: 68a2 ldr r2, [r4, #8] 8002648: f5b2 5f80 cmp.w r2, #4096 ; 0x1000 800264c: 6a22 ldr r2, [r4, #32] 800264e: d117 bne.n 8002680 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8002650: 8811 ldrh r1, [r2, #0] 8002652: f3c1 0108 ubfx r1, r1, #0, #9 8002656: 6059 str r1, [r3, #4] if(huart->Init.Parity == UART_PARITY_NONE) 8002658: 6921 ldr r1, [r4, #16] 800265a: b979 cbnz r1, 800267c huart->pTxBuffPtr += 2U; 800265c: 3202 adds r2, #2 huart->pTxBuffPtr += 1U; 800265e: 6222 str r2, [r4, #32] if(--huart->TxXferCount == 0U) 8002660: 8ce2 ldrh r2, [r4, #38] ; 0x26 8002662: 3a01 subs r2, #1 8002664: b292 uxth r2, r2 8002666: 84e2 strh r2, [r4, #38] ; 0x26 8002668: b9ea cbnz r2, 80026a6 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 800266a: 68da ldr r2, [r3, #12] 800266c: f022 0280 bic.w r2, r2, #128 ; 0x80 8002670: 60da str r2, [r3, #12] __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8002672: 68da ldr r2, [r3, #12] 8002674: f042 0240 orr.w r2, r2, #64 ; 0x40 8002678: 60da str r2, [r3, #12] 800267a: bd70 pop {r4, r5, r6, pc} huart->pTxBuffPtr += 1U; 800267c: 3201 adds r2, #1 800267e: e7ee b.n 800265e huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8002680: 1c51 adds r1, r2, #1 8002682: 6221 str r1, [r4, #32] 8002684: 7812 ldrb r2, [r2, #0] 8002686: 605a str r2, [r3, #4] 8002688: e7ea b.n 8002660 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 800268a: 0650 lsls r0, r2, #25 800268c: d50b bpl.n 80026a6 800268e: 064a lsls r2, r1, #25 8002690: d509 bpl.n 80026a6 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8002692: 68da ldr r2, [r3, #12] HAL_UART_TxCpltCallback(huart); 8002694: 4620 mov r0, r4 __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8002696: f022 0240 bic.w r2, r2, #64 ; 0x40 800269a: 60da str r2, [r3, #12] huart->gState = HAL_UART_STATE_READY; 800269c: 2320 movs r3, #32 800269e: f884 3039 strb.w r3, [r4, #57] ; 0x39 HAL_UART_TxCpltCallback(huart); 80026a2: f7ff ff22 bl 80024ea 80026a6: bd70 pop {r4, r5, r6, pc} 80026a8: 080026ad .word 0x080026ad 080026ac : { 80026ac: b508 push {r3, lr} huart->RxXferCount = 0x00U; 80026ae: 2300 movs r3, #0 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80026b0: 6a40 ldr r0, [r0, #36] ; 0x24 huart->RxXferCount = 0x00U; 80026b2: 85c3 strh r3, [r0, #46] ; 0x2e huart->TxXferCount = 0x00U; 80026b4: 84c3 strh r3, [r0, #38] ; 0x26 HAL_UART_ErrorCallback(huart); 80026b6: f7ff ff57 bl 8002568 80026ba: bd08 pop {r3, pc} 080026bc : #define RGB_SensorDataRequest_Length 7 #define RGB_SensorIDAutoSetRequest_Length 7 uint8_t My_RGB_ID = 0; uint8_t My_RGB_ID_Reset_RequestCnt; uint8_t* RGB_Sensor_Func(uint8_t* data){ 80026bc: b5f8 push {r3, r4, r5, r6, r7, lr} RGB_CMD_T type = data[Bluecell_Type]; switch(type){ 80026be: 7845 ldrb r5, [r0, #1] uint8_t* RGB_Sensor_Func(uint8_t* data){ 80026c0: 4604 mov r4, r0 switch(type){ 80026c2: 2d03 cmp r5, #3 80026c4: d05d beq.n 8002782 80026c6: 2d08 cmp r5, #8 80026c8: d07a beq.n 80027c0 80026ca: 2d01 cmp r5, #1 80026cc: d157 bne.n 800277e case RGB_Status_Data_Request: if(My_RGB_ID != 0 && data[bluecell_srcid + 1] == My_RGB_ID){ 80026ce: 4f47 ldr r7, [pc, #284] ; (80027ec ) 80026d0: 7906 ldrb r6, [r0, #4] 80026d2: 783b ldrb r3, [r7, #0] 80026d4: 4639 mov r1, r7 80026d6: b323 cbz r3, 8002722 80026d8: 429e cmp r6, r3 80026da: d141 bne.n 8002760 HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET); 80026dc: 462a mov r2, r5 My_RGB_ID_Reset_RequestCnt = 0; 80026de: 2500 movs r5, #0 HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET); 80026e0: f44f 7180 mov.w r1, #256 ; 0x100 80026e4: 4842 ldr r0, [pc, #264] ; (80027f0 ) 80026e6: f7fe f89d bl 8000824 My_RGB_ID_Reset_RequestCnt = 0; 80026ea: 4b42 ldr r3, [pc, #264] ; (80027f4 ) printf("MY RGB Status Send"); 80026ec: 4842 ldr r0, [pc, #264] ; (80027f8 ) My_RGB_ID_Reset_RequestCnt = 0; 80026ee: 701d strb r5, [r3, #0] printf("MY RGB Status Send"); 80026f0: f000 fe02 bl 80032f8 for(uint8_t i = 0; i<15; i++) printf("%02x ",RGB_Data[i]); 80026f4: 4f41 ldr r7, [pc, #260] ; (80027fc ) 80026f6: 4e42 ldr r6, [pc, #264] ; (8002800 ) 80026f8: 5d79 ldrb r1, [r7, r5] 80026fa: 4630 mov r0, r6 80026fc: 3501 adds r5, #1 80026fe: f000 fdfb bl 80032f8 for(uint8_t i = 0; i<15; i++) 8002702: 2d0f cmp r5, #15 8002704: d1f8 bne.n 80026f8 printf("\r\n"); 8002706: 483f ldr r0, [pc, #252] ; (8002804 ) 8002708: f000 fe6a bl 80033e0 Uart2_Data_Send(&RGB_Data[0],15); 800270c: 4629 mov r1, r5 800270e: 483b ldr r0, [pc, #236] ; (80027fc ) data[bluecell_length] = 4;//2 // 4 byte data[bluecell_srcid + 1] = data[bluecell_srcid + 0]; data[bluecell_srcid + 0] = My_RGB_ID; data[bluecell_srcid + 2] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); data[bluecell_srcid + 3] = 0xEB; Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3); 8002710: f000 fa44 bl 8002b9c HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_RESET); 8002714: 2200 movs r2, #0 8002716: f44f 7180 mov.w r1, #256 ; 0x100 800271a: 4835 ldr r0, [pc, #212] ; (80027f0 ) 800271c: f7fe f882 bl 8000824 8002720: e02d b.n 800277e }else if(My_RGB_ID == 0 && data[bluecell_srcid + 1] == My_RGB_ID){ 8002722: b9ee cbnz r6, 8002760 printf("MY ID IS NOT SET : %02x \r\n",My_RGB_ID); 8002724: 4631 mov r1, r6 8002726: 4838 ldr r0, [pc, #224] ; (8002808 ) 8002728: f000 fde6 bl 80032f8 HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET); 800272c: f44f 7180 mov.w r1, #256 ; 0x100 8002730: 462a mov r2, r5 8002732: 482f ldr r0, [pc, #188] ; (80027f0 ) 8002734: f7fe f876 bl 8000824 data[bluecell_stx] = 0xBE; //0 8002738: 23be movs r3, #190 ; 0xbe 800273a: 7023 strb r3, [r4, #0] data[bluecell_type] = RGB_SensorID_SET;//1 800273c: 2303 movs r3, #3 data[bluecell_length] = 4;//2 // 4 byte 800273e: 2104 movs r1, #4 data[bluecell_type] = RGB_SensorID_SET;//1 8002740: 7063 strb r3, [r4, #1] data[bluecell_srcid + 1] = data[bluecell_srcid + 0]; 8002742: 78e3 ldrb r3, [r4, #3] data[bluecell_length] = 4;//2 // 4 byte 8002744: 70a1 strb r1, [r4, #2] data[bluecell_srcid + 1] = data[bluecell_srcid + 0]; 8002746: 7123 strb r3, [r4, #4] data[bluecell_srcid + 0] = My_RGB_ID; 8002748: 783b ldrb r3, [r7, #0] data[bluecell_srcid + 0] = My_RGB_ID; 800274a: 70e3 strb r3, [r4, #3] data[bluecell_srcid + 2] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 800274c: 1c60 adds r0, r4, #1 800274e: f000 fbff bl 8002f50 data[bluecell_srcid + 3] = 0xEB; 8002752: 23eb movs r3, #235 ; 0xeb Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3); 8002754: 78a1 ldrb r1, [r4, #2] data[bluecell_srcid + 2] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 8002756: 7160 strb r0, [r4, #5] Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3); 8002758: 3103 adds r1, #3 data[bluecell_srcid + 3] = 0xEB; 800275a: 71a3 strb r3, [r4, #6] Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3); 800275c: b2c9 uxtb r1, r1 800275e: e02b b.n 80027b8 My_RGB_ID_Reset_RequestCnt++; 8002760: 4a24 ldr r2, [pc, #144] ; (80027f4 ) printf("NO MY ID IS %02x \r\n",My_RGB_ID); 8002762: 482a ldr r0, [pc, #168] ; (800280c ) My_RGB_ID_Reset_RequestCnt++; 8002764: 7813 ldrb r3, [r2, #0] 8002766: 3301 adds r3, #1 8002768: b2db uxtb r3, r3 if(My_RGB_ID_Reset_RequestCnt >= 17){ 800276a: 2b10 cmp r3, #16 My_RGB_ID_Reset_RequestCnt++; 800276c: 7013 strb r3, [r2, #0] My_RGB_ID = 0; 800276e: bf84 itt hi 8002770: 2300 movhi r3, #0 8002772: 700b strbhi r3, [r1, #0] printf("NO MY ID IS %02x \r\n",My_RGB_ID); 8002774: 7809 ldrb r1, [r1, #0] My_RGB_ID_Reset_RequestCnt = 0; 8002776: bf88 it hi 8002778: 7013 strbhi r3, [r2, #0] printf("My ID aleady exist %02x \r\n",My_RGB_ID); 800277a: f000 fdbd bl 80032f8 } break; default:break; } return data; } 800277e: 4620 mov r0, r4 8002780: bdf8 pop {r3, r4, r5, r6, r7, pc} if(My_RGB_ID == 0 || My_RGB_ID == data[bluecell_srcid + 1]){ 8002782: 4d1a ldr r5, [pc, #104] ; (80027ec ) 8002784: 7829 ldrb r1, [r5, #0] 8002786: b111 cbz r1, 800278e 8002788: 7903 ldrb r3, [r0, #4] 800278a: 428b cmp r3, r1 800278c: d116 bne.n 80027bc HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET); 800278e: 2201 movs r2, #1 8002790: f44f 7180 mov.w r1, #256 ; 0x100 8002794: 4816 ldr r0, [pc, #88] ; (80027f0 ) 8002796: f7fe f845 bl 8000824 data[bluecell_type] = RGB_SensorID_SET_Success; 800279a: 2304 movs r3, #4 800279c: 7063 strb r3, [r4, #1] data[bluecell_srcid] = My_RGB_ID = data[bluecell_srcid + 1]; 800279e: 7923 ldrb r3, [r4, #4] data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 80027a0: 78a1 ldrb r1, [r4, #2] data[bluecell_srcid] = My_RGB_ID = data[bluecell_srcid + 1]; 80027a2: 70e3 strb r3, [r4, #3] data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 80027a4: 1c60 adds r0, r4, #1 data[bluecell_srcid] = My_RGB_ID = data[bluecell_srcid + 1]; 80027a6: 702b strb r3, [r5, #0] data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 80027a8: f000 fbd2 bl 8002f50 printf("My ID SET Success %02x \r\n",My_RGB_ID); 80027ac: 7829 ldrb r1, [r5, #0] data[5] = STH30_CreateCrc(&data[bluecell_type],data[bluecell_length]); 80027ae: 7160 strb r0, [r4, #5] printf("My ID SET Success %02x \r\n",My_RGB_ID); 80027b0: 4817 ldr r0, [pc, #92] ; (8002810 ) 80027b2: f000 fda1 bl 80032f8 Uart2_Data_Send(&data[bluecell_stx],RGB_SensorIDAutoSetRequest_Length); 80027b6: 2107 movs r1, #7 Uart2_Data_Send(&data[bluecell_stx],data[bluecell_length] + 3); 80027b8: 4620 mov r0, r4 80027ba: e7a9 b.n 8002710 printf("My ID aleady exist %02x \r\n",My_RGB_ID); 80027bc: 4815 ldr r0, [pc, #84] ; (8002814 ) 80027be: e7dc b.n 800277a if(My_RGB_ID == data[bluecell_srcid + 1]){ 80027c0: 4d0a ldr r5, [pc, #40] ; (80027ec ) 80027c2: 7902 ldrb r2, [r0, #4] 80027c4: 782b ldrb r3, [r5, #0] 80027c6: 429a cmp r2, r3 80027c8: d1d9 bne.n 800277e HAL_GPIO_WritePin(GPIOA,GPIO_PIN_8,GPIO_PIN_SET); 80027ca: f44f 7180 mov.w r1, #256 ; 0x100 80027ce: 2201 movs r2, #1 80027d0: 4807 ldr r0, [pc, #28] ; (80027f0 ) 80027d2: f7fe f827 bl 8000824 data[bluecell_stx] = 0xBE; //0 80027d6: 23be movs r3, #190 ; 0xbe 80027d8: 7023 strb r3, [r4, #0] data[bluecell_type] = type + 1;//1 80027da: 2309 movs r3, #9 data[bluecell_length] = 4;//2 // 4 byte 80027dc: 2104 movs r1, #4 data[bluecell_type] = type + 1;//1 80027de: 7063 strb r3, [r4, #1] data[bluecell_srcid + 1] = data[bluecell_srcid + 0]; 80027e0: 78e3 ldrb r3, [r4, #3] data[bluecell_length] = 4;//2 // 4 byte 80027e2: 70a1 strb r1, [r4, #2] data[bluecell_srcid + 1] = data[bluecell_srcid + 0]; 80027e4: 7123 strb r3, [r4, #4] data[bluecell_srcid + 0] = My_RGB_ID; 80027e6: 782b ldrb r3, [r5, #0] 80027e8: e7af b.n 800274a 80027ea: bf00 nop 80027ec: 2000008c .word 0x2000008c 80027f0: 40010800 .word 0x40010800 80027f4: 20000148 .word 0x20000148 80027f8: 080043e8 .word 0x080043e8 80027fc: 20000096 .word 0x20000096 8002800: 080043fb .word 0x080043fb 8002804: 080044c3 .word 0x080044c3 8002808: 08004401 .word 0x08004401 800280c: 0800441d .word 0x0800441d 8002810: 08004432 .word 0x08004432 8002814: 0800444c .word 0x0800444c 08002818 : tcs34725IntegrationTime_t _tcs34725IntegrationTime; tcs34725Gain_t _tcs34725Gain; uint8_t TCS34725_I2C_Read(uint8_t addr, uint8_t reg) { 8002818: b57f push {r0, r1, r2, r3, r4, r5, r6, lr} uint8_t TCS34725_I2C[3]={0,}; 800281a: 2300 movs r3, #0 800281c: f8ad 3014 strh.w r3, [sp, #20] 8002820: f88d 3016 strb.w r3, [sp, #22] uint16_t value = 0; uint8_t data = 0; data=HAL_I2C_Mem_Read(&hi2c1, addr, reg, 1, TCS34725_I2C, 1, 10); 8002824: 230a movs r3, #10 8002826: 9302 str r3, [sp, #8] 8002828: 2301 movs r3, #1 uint8_t TCS34725_I2C[3]={0,}; 800282a: aa05 add r2, sp, #20 data=HAL_I2C_Mem_Read(&hi2c1, addr, reg, 1, TCS34725_I2C, 1, 10); 800282c: e88d 000c stmia.w sp, {r2, r3} 8002830: 460a mov r2, r1 8002832: 4601 mov r1, r0 8002834: 4803 ldr r0, [pc, #12] ; (8002844 ) 8002836: f7fe fadd bl 8000df4 // i2c_status(data); value = TCS34725_I2C[0]; return value; } 800283a: f89d 0014 ldrb.w r0, [sp, #20] 800283e: b007 add sp, #28 8002840: f85d fb04 ldr.w pc, [sp], #4 8002844: 20000150 .word 0x20000150 08002848 : void TCS34725_I2C_Write(uint8_t addr, uint8_t reg, uint8_t data) { uint8_t tmp_afe; tmp_afe = data; HAL_I2C_Mem_Write(&hi2c1, addr, reg, 1, &tmp_afe, 1, 10); 8002848: 230a movs r3, #10 { 800284a: b510 push {r4, lr} 800284c: b086 sub sp, #24 tmp_afe = data; 800284e: ac06 add r4, sp, #24 8002850: f804 2d01 strb.w r2, [r4, #-1]! HAL_I2C_Mem_Write(&hi2c1, addr, reg, 1, &tmp_afe, 1, 10); 8002854: 9302 str r3, [sp, #8] 8002856: 2301 movs r3, #1 8002858: 460a mov r2, r1 800285a: 9301 str r3, [sp, #4] 800285c: 4601 mov r1, r0 800285e: 9400 str r4, [sp, #0] 8002860: 4802 ldr r0, [pc, #8] ; (800286c ) 8002862: f7fe fa31 bl 8000cc8 } 8002866: b006 add sp, #24 8002868: bd10 pop {r4, pc} 800286a: bf00 nop 800286c: 20000150 .word 0x20000150 08002870 : uint8_t Green_L; uint8_t Blue_H; uint8_t Blue_L; }RGB_Bit_st; void RGB_data_arrage(uint8_t* rgbval){ 8002870: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} static uint16_t Clear_Calc_data ; static uint16_t Red_Calc_data ; static uint16_t Green_Calc_data ; static uint16_t Blue_Calc_data ; RGB_Bit_st data; memcpy(&data.Clear_L,&rgbval[0],8); 8002874: 6803 ldr r3, [r0, #0] uint16_t Red = (data.Red_H << 8) | data.Red_L; uint16_t Green = (data.Green_H << 8) | data.Green_L; uint16_t Blue = (data.Blue_H << 8) | data.Blue_L; #if 1 // PYJ.2019.03.15_BEGIN -- switch(Cnt){ 8002876: 4d50 ldr r5, [pc, #320] ; (80029b8 ) memcpy(&data.Clear_L,&rgbval[0],8); 8002878: f8cd 3001 str.w r3, [sp, #1] 800287c: 6843 ldr r3, [r0, #4] uint16_t Clear = (data.Clear_H << 8) | data.Clear_L; 800287e: f89d 6000 ldrb.w r6, [sp] memcpy(&data.Clear_L,&rgbval[0],8); 8002882: f8cd 3005 str.w r3, [sp, #5] uint16_t Blue = (data.Blue_H << 8) | data.Blue_L; 8002886: f89d 3006 ldrb.w r3, [sp, #6] 800288a: f89d 1007 ldrb.w r1, [sp, #7] uint16_t Clear = (data.Clear_H << 8) | data.Clear_L; 800288e: f89d e001 ldrb.w lr, [sp, #1] uint16_t Red = (data.Red_H << 8) | data.Red_L; 8002892: f89d 0002 ldrb.w r0, [sp, #2] 8002896: f89d 7003 ldrb.w r7, [sp, #3] uint16_t Green = (data.Green_H << 8) | data.Green_L; 800289a: f89d 2004 ldrb.w r2, [sp, #4] 800289e: f89d 4005 ldrb.w r4, [sp, #5] uint16_t Blue = (data.Blue_H << 8) | data.Blue_L; 80028a2: ea41 2103 orr.w r1, r1, r3, lsl #8 switch(Cnt){ 80028a6: 782b ldrb r3, [r5, #0] uint16_t Clear = (data.Clear_H << 8) | data.Clear_L; 80028a8: ea4e 2e06 orr.w lr, lr, r6, lsl #8 uint16_t Red = (data.Red_H << 8) | data.Red_L; 80028ac: ea47 2700 orr.w r7, r7, r0, lsl #8 uint16_t Green = (data.Green_H << 8) | data.Green_L; 80028b0: ea44 2402 orr.w r4, r4, r2, lsl #8 switch(Cnt){ 80028b4: 2b03 cmp r3, #3 80028b6: d80e bhi.n 80028d6 80028b8: e8df f003 tbb [pc, r3] 80028bc: 36231002 .word 0x36231002 case 0: Clear_Calc_data = Clear; 80028c0: 4b3e ldr r3, [pc, #248] ; (80029bc ) 80028c2: f8a3 e000 strh.w lr, [r3] Red_Calc_data = Red; 80028c6: 4b3e ldr r3, [pc, #248] ; (80029c0 ) 80028c8: 801f strh r7, [r3, #0] Green_Calc_data = Green; 80028ca: 4b3e ldr r3, [pc, #248] ; (80029c4 ) 80028cc: 801c strh r4, [r3, #0] Blue_Calc_data = Blue; 80028ce: 4b3e ldr r3, [pc, #248] ; (80029c8 ) 80028d0: 8019 strh r1, [r3, #0] Cnt = 1; 80028d2: 2301 movs r3, #1 case 2: Clear_Calc_data += Clear; Red_Calc_data += Red; Green_Calc_data += Green; Blue_Calc_data += Blue; Cnt = 3; 80028d4: 702b strb r3, [r5, #0] Uart2_Data_Send(&temp[0],8); #endif // PYJ.2019.03.15_END -- } 80028d6: b003 add sp, #12 80028d8: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} Clear_Calc_data += Clear; 80028dc: 4b37 ldr r3, [pc, #220] ; (80029bc ) 80028de: 881e ldrh r6, [r3, #0] 80028e0: 44b6 add lr, r6 80028e2: f8a3 e000 strh.w lr, [r3] Red_Calc_data += Red; 80028e6: 4b36 ldr r3, [pc, #216] ; (80029c0 ) 80028e8: 8818 ldrh r0, [r3, #0] 80028ea: 4407 add r7, r0 80028ec: 801f strh r7, [r3, #0] Green_Calc_data += Green; 80028ee: 4b35 ldr r3, [pc, #212] ; (80029c4 ) 80028f0: 881a ldrh r2, [r3, #0] 80028f2: 4414 add r4, r2 Blue_Calc_data += Blue; 80028f4: 4a34 ldr r2, [pc, #208] ; (80029c8 ) Green_Calc_data += Green; 80028f6: 801c strh r4, [r3, #0] Blue_Calc_data += Blue; 80028f8: 8813 ldrh r3, [r2, #0] 80028fa: 4419 add r1, r3 80028fc: 8011 strh r1, [r2, #0] Cnt = 2; 80028fe: 2302 movs r3, #2 8002900: e7e8 b.n 80028d4 Clear_Calc_data += Clear; 8002902: 4b2e ldr r3, [pc, #184] ; (80029bc ) 8002904: 881e ldrh r6, [r3, #0] 8002906: 44b6 add lr, r6 8002908: f8a3 e000 strh.w lr, [r3] Red_Calc_data += Red; 800290c: 4b2c ldr r3, [pc, #176] ; (80029c0 ) 800290e: 8818 ldrh r0, [r3, #0] 8002910: 4407 add r7, r0 8002912: 801f strh r7, [r3, #0] Green_Calc_data += Green; 8002914: 4b2b ldr r3, [pc, #172] ; (80029c4 ) 8002916: 881a ldrh r2, [r3, #0] 8002918: 4414 add r4, r2 Blue_Calc_data += Blue; 800291a: 4a2b ldr r2, [pc, #172] ; (80029c8 ) Green_Calc_data += Green; 800291c: 801c strh r4, [r3, #0] Blue_Calc_data += Blue; 800291e: 8813 ldrh r3, [r2, #0] 8002920: 4419 add r1, r3 8002922: 8011 strh r1, [r2, #0] Cnt = 3; 8002924: 2303 movs r3, #3 8002926: e7d5 b.n 80028d4 Clear_Calc_data = (Clear_Calc_data + Clear)/4; 8002928: 4b24 ldr r3, [pc, #144] ; (80029bc ) RGB_Data[Bluecell_DATA] = My_RGB_ID;//Src ID 800292a: f8df 90a4 ldr.w r9, [pc, #164] ; 80029d0 Clear_Calc_data = (Clear_Calc_data + Clear)/4; 800292e: 881e ldrh r6, [r3, #0] RGB_Data[Bluecell_DATA] = My_RGB_ID;//Src ID 8002930: f899 9000 ldrb.w r9, [r9] Clear_Calc_data = (Clear_Calc_data + Clear)/4; 8002934: 4476 add r6, lr 8002936: 10b6 asrs r6, r6, #2 8002938: fa1f f886 uxth.w r8, r6 800293c: f8a3 8000 strh.w r8, [r3] Red_Calc_data = (Red_Calc_data + Red)/4; 8002940: 4b1f ldr r3, [pc, #124] ; (80029c0 ) RGB_Data[Bluecell_DATA + 1] = ((Clear_Calc_data & 0xFF00) >> 8); 8002942: ea4f 2818 mov.w r8, r8, lsr #8 Red_Calc_data = (Red_Calc_data + Red)/4; 8002946: 8818 ldrh r0, [r3, #0] 8002948: 4438 add r0, r7 800294a: 1080 asrs r0, r0, #2 800294c: fa1f fc80 uxth.w ip, r0 8002950: f8a3 c000 strh.w ip, [r3] Green_Calc_data = (Green_Calc_data + Green)/4; 8002954: 4b1b ldr r3, [pc, #108] ; (80029c4 ) RGB_Data[Bluecell_DATA + 3] = ((Red_Calc_data & 0xFF00) >> 8); 8002956: ea4f 2c1c mov.w ip, ip, lsr #8 Green_Calc_data = (Green_Calc_data + Green)/4; 800295a: 881a ldrh r2, [r3, #0] 800295c: 4422 add r2, r4 800295e: 1092 asrs r2, r2, #2 Blue_Calc_data = (Blue_Calc_data + Blue)/4; 8002960: 4c19 ldr r4, [pc, #100] ; (80029c8 ) Green_Calc_data = (Green_Calc_data + Green)/4; 8002962: fa1f fe82 uxth.w lr, r2 8002966: f8a3 e000 strh.w lr, [r3] Blue_Calc_data = (Blue_Calc_data + Blue)/4; 800296a: 8823 ldrh r3, [r4, #0] RGB_Data[Bluecell_DATA + 5] = ((Green_Calc_data & 0xFF00) >> 8); 800296c: ea4f 2e1e mov.w lr, lr, lsr #8 Blue_Calc_data = (Blue_Calc_data + Blue)/4; 8002970: 440b add r3, r1 RGB_Data[Bluecell_STX] = 0xbe; 8002972: 21be movs r1, #190 ; 0xbe Blue_Calc_data = (Blue_Calc_data + Blue)/4; 8002974: 109b asrs r3, r3, #2 8002976: b29f uxth r7, r3 8002978: 8027 strh r7, [r4, #0] RGB_Data[Bluecell_STX] = 0xbe; 800297a: 4c14 ldr r4, [pc, #80] ; (80029cc ) RGB_Data[Bluecell_DATA + 7] = ((Blue_Calc_data & 0xFF00) >> 8); 800297c: 0a3f lsrs r7, r7, #8 RGB_Data[Bluecell_STX] = 0xbe; 800297e: 7021 strb r1, [r4, #0] RGB_Data[Bluecell_Type] = RGB_Status_Data_Response;//Type 8002980: 2105 movs r1, #5 RGB_Data[Bluecell_DATA + 2] = (Clear_Calc_data & 0x00FF); 8002982: 7166 strb r6, [r4, #5] RGB_Data[Bluecell_Type] = RGB_Status_Data_Response;//Type 8002984: 7061 strb r1, [r4, #1] RGB_Data[Bluecell_DATA + 9] = 0;//dst id(Blue_Calc_data & 0x00FF); 8002986: 2600 movs r6, #0 RGB_Data[Bluecell_Length] = 12;//Length 8002988: 210c movs r1, #12 RGB_Data[Bluecell_DATA + 4] = (Red_Calc_data & 0x00FF); 800298a: 71e0 strb r0, [r4, #7] RGB_Data[Bluecell_DATA + 10] = STH30_CreateCrc(&RGB_Data[Bluecell_Type],RGB_Data[Bluecell_Length]);//crc 800298c: 1c60 adds r0, r4, #1 RGB_Data[Bluecell_DATA + 8] = (Blue_Calc_data & 0x00FF); 800298e: 72e3 strb r3, [r4, #11] RGB_Data[Bluecell_Length] = 12;//Length 8002990: 70a1 strb r1, [r4, #2] RGB_Data[Bluecell_DATA] = My_RGB_ID;//Src ID 8002992: f884 9003 strb.w r9, [r4, #3] RGB_Data[Bluecell_DATA + 1] = ((Clear_Calc_data & 0xFF00) >> 8); 8002996: f884 8004 strb.w r8, [r4, #4] RGB_Data[Bluecell_DATA + 3] = ((Red_Calc_data & 0xFF00) >> 8); 800299a: f884 c006 strb.w ip, [r4, #6] RGB_Data[Bluecell_DATA + 5] = ((Green_Calc_data & 0xFF00) >> 8); 800299e: f884 e008 strb.w lr, [r4, #8] RGB_Data[Bluecell_DATA + 6] = (Green_Calc_data & 0x00FF); 80029a2: 7262 strb r2, [r4, #9] RGB_Data[Bluecell_DATA + 7] = ((Blue_Calc_data & 0xFF00) >> 8); 80029a4: 72a7 strb r7, [r4, #10] RGB_Data[Bluecell_DATA + 9] = 0;//dst id(Blue_Calc_data & 0x00FF); 80029a6: 7326 strb r6, [r4, #12] RGB_Data[Bluecell_DATA + 10] = STH30_CreateCrc(&RGB_Data[Bluecell_Type],RGB_Data[Bluecell_Length]);//crc 80029a8: f000 fad2 bl 8002f50 RGB_Data[Bluecell_DATA + 11] = 0xeb; 80029ac: 23eb movs r3, #235 ; 0xeb RGB_Data[Bluecell_DATA + 10] = STH30_CreateCrc(&RGB_Data[Bluecell_Type],RGB_Data[Bluecell_Length]);//crc 80029ae: 7360 strb r0, [r4, #13] RGB_Data[Bluecell_DATA + 11] = 0xeb; 80029b0: 73a3 strb r3, [r4, #14] Cnt = 0; 80029b2: 702e strb r6, [r5, #0] } 80029b4: e78f b.n 80028d6 80029b6: bf00 nop 80029b8: 20000092 .word 0x20000092 80029bc: 20000090 .word 0x20000090 80029c0: 200000fa .word 0x200000fa 80029c4: 20000094 .word 0x20000094 80029c8: 2000008e .word 0x2000008e 80029cc: 20000096 .word 0x20000096 80029d0: 2000008c .word 0x2000008c 080029d4 : void TCS34725_getrawdata(void) { 80029d4: b507 push {r0, r1, r2, lr} RGB_Bit_st data; uint8_t DEV_DATA = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_ID); 80029d6: 2192 movs r1, #146 ; 0x92 80029d8: 2052 movs r0, #82 ; 0x52 80029da: f7ff ff1d bl 8002818 data.Clear_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAL); 80029de: 2194 movs r1, #148 ; 0x94 80029e0: 2052 movs r0, #82 ; 0x52 80029e2: f7ff ff19 bl 8002818 data.Clear_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAH); 80029e6: 2195 movs r1, #149 ; 0x95 data.Clear_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAL); 80029e8: f88d 0001 strb.w r0, [sp, #1] data.Clear_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAH); 80029ec: 2052 movs r0, #82 ; 0x52 80029ee: f7ff ff13 bl 8002818 data.Red_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAL); 80029f2: 2196 movs r1, #150 ; 0x96 data.Clear_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_CDATAH); 80029f4: f88d 0000 strb.w r0, [sp] data.Red_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAL); 80029f8: 2052 movs r0, #82 ; 0x52 80029fa: f7ff ff0d bl 8002818 data.Red_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAH); 80029fe: 2197 movs r1, #151 ; 0x97 data.Red_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAL); 8002a00: f88d 0003 strb.w r0, [sp, #3] data.Red_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAH); 8002a04: 2052 movs r0, #82 ; 0x52 8002a06: f7ff ff07 bl 8002818 data.Green_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAL); 8002a0a: 2198 movs r1, #152 ; 0x98 data.Red_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_RDATAH); 8002a0c: f88d 0002 strb.w r0, [sp, #2] data.Green_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAL); 8002a10: 2052 movs r0, #82 ; 0x52 8002a12: f7ff ff01 bl 8002818 data.Green_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAH); 8002a16: 2199 movs r1, #153 ; 0x99 data.Green_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAL); 8002a18: f88d 0005 strb.w r0, [sp, #5] data.Green_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAH); 8002a1c: 2052 movs r0, #82 ; 0x52 8002a1e: f7ff fefb bl 8002818 data.Blue_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAL); 8002a22: 219a movs r1, #154 ; 0x9a data.Green_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_GDATAH); 8002a24: f88d 0004 strb.w r0, [sp, #4] data.Blue_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAL); 8002a28: 2052 movs r0, #82 ; 0x52 8002a2a: f7ff fef5 bl 8002818 data.Blue_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAH); 8002a2e: 219b movs r1, #155 ; 0x9b data.Blue_L = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAL); 8002a30: f88d 0007 strb.w r0, [sp, #7] data.Blue_H = TCS34725_I2C_Read(TCS34725_ADDRESS, TCS34725_COMMAND_BIT | TCS34725_BDATAH); 8002a34: 2052 movs r0, #82 ; 0x52 8002a36: f7ff feef bl 8002818 8002a3a: f88d 0006 strb.w r0, [sp, #6] RED = (R_DATA_H << 8) | R_DATA_L; GREEN = (G_DATA_H << 8) | G_DATA_L; BLUE = (B_DATA_H << 8) | B_DATA_L; #endif // PYJ.2019.03.16_END -- RGB_data_arrage(&data.Clear_L); 8002a3e: f10d 0001 add.w r0, sp, #1 8002a42: f7ff ff15 bl 8002870 printf("6. B\t:\tHEX : [%04x]\tDEC : [%05d]\r\n", BLUE,BLUE); #else #endif } 8002a46: b003 add sp, #12 8002a48: f85d fb04 ldr.w pc, [sp], #4 08002a4c : reg = TCS34725_I2C_Read(TCS34725_ADDRESS,TCS34725_ENABLE); TCS34725_I2C_Write(TCS34725_ADDRESS,TCS34725_ENABLE, reg & ~(TCS34725_ENABLE_PON | TCS34725_ENABLE_AEN)); } void TCS34725_enable(void) { 8002a4c: b508 push {r3, lr} TCS34725_I2C_Write(TCS34725_ADDRESS, TCS34725_ENABLE, TCS34725_ENABLE_PON); 8002a4e: 2201 movs r2, #1 8002a50: 2100 movs r1, #0 8002a52: 2052 movs r0, #82 ; 0x52 8002a54: f7ff fef8 bl 8002848 HAL_Delay(3); 8002a58: 2003 movs r0, #3 8002a5a: f7fd fc1b bl 8000294 TCS34725_I2C_Write(TCS34725_ADDRESS, TCS34725_ENABLE, TCS34725_ENABLE_PON | TCS34725_ENABLE_AEN); 8002a5e: 2203 movs r2, #3 8002a60: 2100 movs r1, #0 8002a62: 2052 movs r0, #82 ; 0x52 8002a64: f7ff fef0 bl 8002848 switch (_tcs34725IntegrationTime) 8002a68: 4b0f ldr r3, [pc, #60] ; (8002aa8 ) 8002a6a: 781b ldrb r3, [r3, #0] 8002a6c: 2bd5 cmp r3, #213 ; 0xd5 8002a6e: d013 beq.n 8002a98 8002a70: d803 bhi.n 8002a7a 8002a72: b1ab cbz r3, 8002aa0 8002a74: 2bc0 cmp r3, #192 ; 0xc0 8002a76: d011 beq.n 8002a9c 8002a78: bd08 pop {r3, pc} 8002a7a: 2bf6 cmp r3, #246 ; 0xf6 8002a7c: d00a beq.n 8002a94 8002a7e: 2bff cmp r3, #255 ; 0xff 8002a80: d003 beq.n 8002a8a 8002a82: 2beb cmp r3, #235 ; 0xeb 8002a84: d10f bne.n 8002aa6 break; case TCS34725_INTEGRATIONTIME_24MS: HAL_Delay(24); break; case TCS34725_INTEGRATIONTIME_50MS: HAL_Delay(50); 8002a86: 2032 movs r0, #50 ; 0x32 8002a88: e000 b.n 8002a8c HAL_Delay(3); 8002a8a: 2003 movs r0, #3 break; case TCS34725_INTEGRATIONTIME_700MS: HAL_Delay(700); break; } } 8002a8c: e8bd 4008 ldmia.w sp!, {r3, lr} HAL_Delay(700); 8002a90: f7fd bc00 b.w 8000294 HAL_Delay(24); 8002a94: 2018 movs r0, #24 8002a96: e7f9 b.n 8002a8c HAL_Delay(101); 8002a98: 2065 movs r0, #101 ; 0x65 8002a9a: e7f7 b.n 8002a8c HAL_Delay(154); 8002a9c: 209a movs r0, #154 ; 0x9a 8002a9e: e7f5 b.n 8002a8c HAL_Delay(700); 8002aa0: f44f 702f mov.w r0, #700 ; 0x2bc 8002aa4: e7f2 b.n 8002a8c 8002aa6: bd08 pop {r3, pc} 8002aa8: 20000149 .word 0x20000149 08002aac : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { if(huart->Instance == USART1){ 8002aac: 6802 ldr r2, [r0, #0] 8002aae: 4b22 ldr r3, [pc, #136] ; (8002b38 ) { 8002ab0: b510 push {r4, lr} if(huart->Instance == USART1){ 8002ab2: 429a cmp r2, r3 { 8002ab4: 4604 mov r4, r0 if(huart->Instance == USART1){ 8002ab6: d11b bne.n 8002af0 buf[count_in1] = rx1_data[0];//(uint8_t)USART2->DR; 8002ab8: 4b20 ldr r3, [pc, #128] ; (8002b3c ) 8002aba: 4821 ldr r0, [pc, #132] ; (8002b40 ) 8002abc: 781a ldrb r2, [r3, #0] 8002abe: 4921 ldr r1, [pc, #132] ; (8002b44 ) 8002ac0: 7800 ldrb r0, [r0, #0] 8002ac2: 5488 strb r0, [r1, r2] if(buf[count_in1++] == 0xEB){ 8002ac4: 781a ldrb r2, [r3, #0] 8002ac6: b2d2 uxtb r2, r2 8002ac8: 1c50 adds r0, r2, #1 8002aca: 5c8a ldrb r2, [r1, r2] 8002acc: b2c0 uxtb r0, r0 8002ace: 2aeb cmp r2, #235 ; 0xeb 8002ad0: 7018 strb r0, [r3, #0] 8002ad2: d108 bne.n 8002ae6 if(buf[Bluecell_Length] == (count_in1 - 3)) 8002ad4: 781a ldrb r2, [r3, #0] 8002ad6: 7889 ldrb r1, [r1, #2] 8002ad8: 3a03 subs r2, #3 8002ada: 4291 cmp r1, r2 } } void UartDataRecvSet(uint8_t val){ UartDataisReved = val; 8002adc: bf0a itet eq 8002ade: 2201 moveq r2, #1 count_in1 = 0; 8002ae0: 2200 movne r2, #0 UartDataisReved = val; 8002ae2: 4b19 ldreq r3, [pc, #100] ; (8002b48 ) count_in1 = 0; 8002ae4: 701a strb r2, [r3, #0] HAL_UART_Receive_IT(&huart1,&rx1_data[0],1); 8002ae6: 2201 movs r2, #1 8002ae8: 4915 ldr r1, [pc, #84] ; (8002b40 ) 8002aea: 4818 ldr r0, [pc, #96] ; (8002b4c ) 8002aec: f7ff fcd6 bl 800249c if(huart->Instance == USART2){ 8002af0: 6822 ldr r2, [r4, #0] 8002af2: 4b17 ldr r3, [pc, #92] ; (8002b50 ) 8002af4: 429a cmp r2, r3 8002af6: d11d bne.n 8002b34 buf[count_in2] = rx2_data[0]; 8002af8: 4b16 ldr r3, [pc, #88] ; (8002b54 ) 8002afa: 4817 ldr r0, [pc, #92] ; (8002b58 ) 8002afc: 781a ldrb r2, [r3, #0] 8002afe: 4911 ldr r1, [pc, #68] ; (8002b44 ) 8002b00: 7800 ldrb r0, [r0, #0] 8002b02: 5488 strb r0, [r1, r2] if(buf[count_in2++] == 0xEB){ 8002b04: 781a ldrb r2, [r3, #0] 8002b06: b2d2 uxtb r2, r2 8002b08: 1c50 adds r0, r2, #1 8002b0a: 5c8a ldrb r2, [r1, r2] 8002b0c: b2c0 uxtb r0, r0 8002b0e: 2aeb cmp r2, #235 ; 0xeb 8002b10: 7018 strb r0, [r3, #0] 8002b12: d108 bne.n 8002b26 if(buf[Bluecell_Length] == (count_in2 - 3)) 8002b14: 781a ldrb r2, [r3, #0] 8002b16: 7889 ldrb r1, [r1, #2] 8002b18: 3a03 subs r2, #3 8002b1a: 4291 cmp r1, r2 UartDataisReved = val; 8002b1c: bf0a itet eq 8002b1e: 2202 moveq r2, #2 count_in2 = 0; 8002b20: 2200 movne r2, #0 UartDataisReved = val; 8002b22: 4b09 ldreq r3, [pc, #36] ; (8002b48 ) count_in2 = 0; 8002b24: 701a strb r2, [r3, #0] HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8002b26: 2201 movs r2, #1 } 8002b28: e8bd 4010 ldmia.w sp!, {r4, lr} HAL_UART_Receive_IT(&huart2,&rx2_data[0],1); 8002b2c: 490a ldr r1, [pc, #40] ; (8002b58 ) 8002b2e: 480b ldr r0, [pc, #44] ; (8002b5c ) 8002b30: f7ff bcb4 b.w 800249c 8002b34: bd10 pop {r4, pc} 8002b36: bf00 nop 8002b38: 40013800 .word 0x40013800 8002b3c: 20000136 .word 0x20000136 8002b40: 2000024a .word 0x2000024a 8002b44: 20000104 .word 0x20000104 8002b48: 2000014c .word 0x2000014c 8002b4c: 200001d8 .word 0x200001d8 8002b50: 40004400 .word 0x40004400 8002b54: 20000137 .word 0x20000137 8002b58: 200001a4 .word 0x200001a4 8002b5c: 2000024c .word 0x2000024c 08002b60 : if(htim->Instance == TIM7){ 8002b60: 6802 ldr r2, [r0, #0] 8002b62: 4b06 ldr r3, [pc, #24] ; (8002b7c ) 8002b64: 429a cmp r2, r3 8002b66: d107 bne.n 8002b78 UartTimerCnt++; 8002b68: 4a05 ldr r2, [pc, #20] ; (8002b80 ) 8002b6a: 6813 ldr r3, [r2, #0] 8002b6c: 3301 adds r3, #1 8002b6e: 6013 str r3, [r2, #0] LedTimerCnt++; 8002b70: 4a04 ldr r2, [pc, #16] ; (8002b84 ) 8002b72: 6813 ldr r3, [r2, #0] 8002b74: 3301 adds r3, #1 8002b76: 6013 str r3, [r2, #0] 8002b78: 4770 bx lr 8002b7a: bf00 nop 8002b7c: 40001400 .word 0x40001400 8002b80: 20000100 .word 0x20000100 8002b84: 200000fc .word 0x200000fc 08002b88 <_write>: uint8_t UartDataRecvGet(void){ return UartDataisReved; } int _write (int file, uint8_t *ptr, uint16_t len) { 8002b88: b510 push {r4, lr} 8002b8a: 4614 mov r4, r2 HAL_UART_Transmit (&huart1, ptr, len, 10); 8002b8c: 230a movs r3, #10 8002b8e: 4802 ldr r0, [pc, #8] ; (8002b98 <_write+0x10>) 8002b90: f7ff fc28 bl 80023e4 return len; } 8002b94: 4620 mov r0, r4 8002b96: bd10 pop {r4, pc} 8002b98: 200001d8 .word 0x200001d8 08002b9c : void Uart1_Data_Send(uint8_t* data,uint8_t size){ //Firmware Download Cable HAL_UART_Transmit(&huart1, data,size, 10); } void Uart2_Data_Send(uint8_t* data,uint8_t size){ // Controller Comunication Cable HAL_UART_Transmit(&huart2, data,size, 10); 8002b9c: 460a mov r2, r1 8002b9e: 230a movs r3, #10 8002ba0: 4601 mov r1, r0 8002ba2: 4801 ldr r0, [pc, #4] ; (8002ba8 ) 8002ba4: f7ff bc1e b.w 80023e4 8002ba8: 2000024c .word 0x2000024c 08002bac : } void Uart_dataCheck(uint8_t* cnt){ 8002bac: b5f8 push {r3, r4, r5, r6, r7, lr} 8002bae: 4605 mov r5, r0 etError crccheck = 0; #if 1 // PYJ.2019.03.17_BEGIN -- for(uint8_t i = 0; i < (* cnt); i++){ 8002bb0: 2300 movs r3, #0 8002bb2: 4c1f ldr r4, [pc, #124] ; (8002c30 ) printf("%02x ",buf[i]); 8002bb4: 4f1f ldr r7, [pc, #124] ; (8002c34 ) for(uint8_t i = 0; i < (* cnt); i++){ 8002bb6: 782a ldrb r2, [r5, #0] 8002bb8: 1c5e adds r6, r3, #1 8002bba: b2db uxtb r3, r3 8002bbc: 429a cmp r2, r3 8002bbe: d820 bhi.n 8002c02 } printf("\r\n"); 8002bc0: 481d ldr r0, [pc, #116] ; (8002c38 ) 8002bc2: f000 fc0d bl 80033e0 #endif // PYJ.2019.03.17_END -- crccheck = STH30_CheckCrc(&buf[Bluecell_Type],buf[Bluecell_Length],buf[buf[Bluecell_Length] + 1]); 8002bc6: 78a1 ldrb r1, [r4, #2] 8002bc8: 481c ldr r0, [pc, #112] ; (8002c3c ) 8002bca: 1863 adds r3, r4, r1 8002bcc: 785a ldrb r2, [r3, #1] 8002bce: f000 f9da bl 8002f86 if(crccheck == CHECKSUM_ERROR){ 8002bd2: bb10 cbnz r0, 8002c1a for(uint8_t i = 0; i < (*cnt); i++){ printf("%02x ",buf[i]); 8002bd4: 4f17 ldr r7, [pc, #92] ; (8002c34 ) for(uint8_t i = 0; i < (*cnt); i++){ 8002bd6: 782b ldrb r3, [r5, #0] 8002bd8: 1c46 adds r6, r0, #1 8002bda: b2c0 uxtb r0, r0 8002bdc: 4283 cmp r3, r0 8002bde: d816 bhi.n 8002c0e } printf("Original CRC : %02x RecvCRC : %02x \r\n",crccheck,buf[buf[Bluecell_Length] + 1]); 8002be0: 78a3 ldrb r3, [r4, #2] 8002be2: 2100 movs r1, #0 8002be4: 441c add r4, r3 8002be6: 7862 ldrb r2, [r4, #1] 8002be8: 4815 ldr r0, [pc, #84] ; (8002c40 ) 8002bea: f000 fb85 bl 80032f8 RGB_Sensor_Func(&buf[bluecell_stx]); } else{ printf("What Happen?\r\n"); } *cnt = 0; 8002bee: 2100 movs r1, #0 UartDataisReved = val; 8002bf0: 4b14 ldr r3, [pc, #80] ; (8002c44 ) *cnt = 0; 8002bf2: 7029 strb r1, [r5, #0] UartDataisReved = val; 8002bf4: 7019 strb r1, [r3, #0] UartDataRecvSet(0); memset(buf,0x00,buf_size); 8002bf6: 2232 movs r2, #50 ; 0x32 } 8002bf8: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} memset(buf,0x00,buf_size); 8002bfc: 480c ldr r0, [pc, #48] ; (8002c30 ) 8002bfe: f000 bb73 b.w 80032e8 printf("%02x ",buf[i]); 8002c02: 5ce1 ldrb r1, [r4, r3] 8002c04: 4638 mov r0, r7 8002c06: f000 fb77 bl 80032f8 8002c0a: 4633 mov r3, r6 8002c0c: e7d3 b.n 8002bb6 printf("%02x ",buf[i]); 8002c0e: 5c21 ldrb r1, [r4, r0] 8002c10: 4638 mov r0, r7 8002c12: f000 fb71 bl 80032f8 8002c16: 4630 mov r0, r6 8002c18: e7dd b.n 8002bd6 else if(crccheck == NO_ERROR){ 8002c1a: 2801 cmp r0, #1 8002c1c: d103 bne.n 8002c26 RGB_Sensor_Func(&buf[bluecell_stx]); 8002c1e: 4804 ldr r0, [pc, #16] ; (8002c30 ) 8002c20: f7ff fd4c bl 80026bc 8002c24: e7e3 b.n 8002bee printf("What Happen?\r\n"); 8002c26: 4808 ldr r0, [pc, #32] ; (8002c48 ) 8002c28: f000 fbda bl 80033e0 8002c2c: e7df b.n 8002bee 8002c2e: bf00 nop 8002c30: 20000104 .word 0x20000104 8002c34: 080043fb .word 0x080043fb 8002c38: 080044c3 .word 0x080044c3 8002c3c: 20000105 .word 0x20000105 8002c40: 08004467 .word 0x08004467 8002c44: 2000014c .word 0x2000014c 8002c48: 0800448d .word 0x0800448d 08002c4c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8002c4c: b530 push {r4, r5, lr} 8002c4e: b093 sub sp, #76 ; 0x4c RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8002c50: 2228 movs r2, #40 ; 0x28 8002c52: 2100 movs r1, #0 8002c54: a808 add r0, sp, #32 8002c56: f000 fb47 bl 80032e8 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002c5a: 2214 movs r2, #20 8002c5c: 2100 movs r1, #0 8002c5e: a803 add r0, sp, #12 8002c60: f000 fb42 bl 80032e8 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8002c64: 2301 movs r3, #1 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002c66: 2400 movs r4, #0 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8002c68: 2502 movs r5, #2 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8002c6a: 930c str r3, [sp, #48] ; 0x30 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8002c6c: 2310 movs r3, #16 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002c6e: a808 add r0, sp, #32 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8002c70: 930d str r3, [sp, #52] ; 0x34 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002c72: 9400 str r4, [sp, #0] 8002c74: 9401 str r4, [sp, #4] 8002c76: 9402 str r4, [sp, #8] RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; 8002c78: 9508 str r5, [sp, #32] if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002c7a: f7fe fe09 bl 8001890 { Error_Handler(); } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002c7e: 230f movs r3, #15 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8002c80: 4621 mov r1, r4 8002c82: a803 add r0, sp, #12 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002c84: 9303 str r3, [sp, #12] RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; 8002c86: 9404 str r4, [sp, #16] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002c88: 9405 str r4, [sp, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 8002c8a: 9406 str r4, [sp, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8002c8c: 9407 str r4, [sp, #28] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8002c8e: f7fe ffcf bl 8001c30 { Error_Handler(); } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8002c92: 4668 mov r0, sp PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; 8002c94: 9500 str r5, [sp, #0] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2; 8002c96: 9402 str r4, [sp, #8] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8002c98: f7ff f86e bl 8001d78 { Error_Handler(); } } 8002c9c: b013 add sp, #76 ; 0x4c 8002c9e: bd30 pop {r4, r5, pc} 08002ca0
: { 8002ca0: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8002ca4: b089 sub sp, #36 ; 0x24 HAL_Init(); 8002ca6: f7fd fad7 bl 8000258 SystemClock_Config(); 8002caa: f7ff ffcf bl 8002c4c * @param None * @retval None */ static void MX_GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002cae: 2210 movs r2, #16 8002cb0: 2100 movs r1, #0 8002cb2: eb0d 0002 add.w r0, sp, r2 8002cb6: f000 fb17 bl 80032e8 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8002cba: 4b87 ldr r3, [pc, #540] ; (8002ed8 ) __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 8002cbc: f44f 4100 mov.w r1, #32768 ; 0x8000 __HAL_RCC_GPIOC_CLK_ENABLE(); 8002cc0: 699a ldr r2, [r3, #24] HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 8002cc2: 4886 ldr r0, [pc, #536] ; (8002edc ) __HAL_RCC_GPIOC_CLK_ENABLE(); 8002cc4: f042 0210 orr.w r2, r2, #16 8002cc8: 619a str r2, [r3, #24] 8002cca: 699a ldr r2, [r3, #24] HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET); /*Configure GPIO pin : PC15 */ GPIO_InitStruct.Pin = GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; 8002ccc: 2400 movs r4, #0 __HAL_RCC_GPIOC_CLK_ENABLE(); 8002cce: f002 0210 and.w r2, r2, #16 8002cd2: 9201 str r2, [sp, #4] 8002cd4: 9a01 ldr r2, [sp, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8002cd6: 699a ldr r2, [r3, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8002cd8: f04f 0901 mov.w r9, #1 __HAL_RCC_GPIOA_CLK_ENABLE(); 8002cdc: f042 0204 orr.w r2, r2, #4 8002ce0: 619a str r2, [r3, #24] 8002ce2: 699a ldr r2, [r3, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002ce4: 2502 movs r5, #2 __HAL_RCC_GPIOA_CLK_ENABLE(); 8002ce6: f002 0204 and.w r2, r2, #4 8002cea: 9202 str r2, [sp, #8] 8002cec: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8002cee: 699a ldr r2, [r3, #24] huart1.Init.BaudRate = 115200; 8002cf0: f44f 38e1 mov.w r8, #115200 ; 0x1c200 __HAL_RCC_GPIOB_CLK_ENABLE(); 8002cf4: f042 0208 orr.w r2, r2, #8 8002cf8: 619a str r2, [r3, #24] 8002cfa: 699b ldr r3, [r3, #24] HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 8002cfc: 2200 movs r2, #0 __HAL_RCC_GPIOB_CLK_ENABLE(); 8002cfe: f003 0308 and.w r3, r3, #8 8002d02: 9303 str r3, [sp, #12] 8002d04: 9b03 ldr r3, [sp, #12] HAL_GPIO_WritePin(GPIOC, GPIO_PIN_15, GPIO_PIN_RESET); 8002d06: f7fd fd8d bl 8000824 HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8|GPIO_PIN_15, GPIO_PIN_RESET); 8002d0a: 2200 movs r2, #0 8002d0c: f44f 4101 mov.w r1, #33024 ; 0x8100 8002d10: 4873 ldr r0, [pc, #460] ; (8002ee0 ) 8002d12: f7fd fd87 bl 8000824 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET); 8002d16: 2200 movs r2, #0 8002d18: 2138 movs r1, #56 ; 0x38 8002d1a: 4872 ldr r0, [pc, #456] ; (8002ee4 ) 8002d1c: f7fd fd82 bl 8000824 GPIO_InitStruct.Pin = GPIO_PIN_15; 8002d20: f44f 4300 mov.w r3, #32768 ; 0x8000 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8002d24: a904 add r1, sp, #16 8002d26: 486d ldr r0, [pc, #436] ; (8002edc ) GPIO_InitStruct.Pin = GPIO_PIN_15; 8002d28: 9304 str r3, [sp, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002d2a: 9507 str r5, [sp, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8002d2c: f8cd 9014 str.w r9, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002d30: 9406 str r4, [sp, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8002d32: f7fd fc97 bl 8000664 /*Configure GPIO pins : PA8 PA15 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_15; 8002d36: f44f 4301 mov.w r3, #33024 ; 0x8100 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002d3a: a904 add r1, sp, #16 8002d3c: 4868 ldr r0, [pc, #416] ; (8002ee0 ) GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_15; 8002d3e: 9304 str r3, [sp, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002d40: 9507 str r5, [sp, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8002d42: f8cd 9014 str.w r9, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002d46: 9406 str r4, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002d48: f7fd fc8c bl 8000664 /*Configure GPIO pins : PB3 PB4 PB5 */ GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5; 8002d4c: 2338 movs r3, #56 ; 0x38 huart1.Init.Mode = UART_MODE_TX_RX; 8002d4e: 270c movs r7, #12 huart1.Instance = USART1; 8002d50: 4e65 ldr r6, [pc, #404] ; (8002ee8 ) GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002d52: a904 add r1, sp, #16 8002d54: 4863 ldr r0, [pc, #396] ; (8002ee4 ) GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5; 8002d56: 9304 str r3, [sp, #16] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002d58: 9507 str r5, [sp, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8002d5a: f8cd 9014 str.w r9, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002d5e: 9406 str r4, [sp, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002d60: f7fd fc80 bl 8000664 huart1.Init.BaudRate = 115200; 8002d64: 4b61 ldr r3, [pc, #388] ; (8002eec ) huart2.Instance = USART2; 8002d66: 4d62 ldr r5, [pc, #392] ; (8002ef0 ) if (HAL_UART_Init(&huart1) != HAL_OK) 8002d68: 4630 mov r0, r6 huart1.Init.BaudRate = 115200; 8002d6a: e886 0108 stmia.w r6, {r3, r8} huart1.Init.Mode = UART_MODE_TX_RX; 8002d6e: 6177 str r7, [r6, #20] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8002d70: 60b4 str r4, [r6, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8002d72: 60f4 str r4, [r6, #12] huart1.Init.Parity = UART_PARITY_NONE; 8002d74: 6134 str r4, [r6, #16] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002d76: 61b4 str r4, [r6, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8002d78: 61f4 str r4, [r6, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8002d7a: f7ff fb05 bl 8002388 huart2.Instance = USART2; 8002d7e: 4b5d ldr r3, [pc, #372] ; (8002ef4 ) if (HAL_UART_Init(&huart2) != HAL_OK) 8002d80: 4628 mov r0, r5 huart2.Init.BaudRate = 115200; 8002d82: e885 0108 stmia.w r5, {r3, r8} huart2.Init.Mode = UART_MODE_TX_RX; 8002d86: 616f str r7, [r5, #20] huart2.Init.WordLength = UART_WORDLENGTH_8B; 8002d88: 60ac str r4, [r5, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8002d8a: 60ec str r4, [r5, #12] huart2.Init.Parity = UART_PARITY_NONE; 8002d8c: 612c str r4, [r5, #16] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002d8e: 61ac str r4, [r5, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8002d90: 61ec str r4, [r5, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8002d92: f7ff faf9 bl 8002388 htim7.Init.Prescaler = 800 - 1; 8002d96: f240 331f movw r3, #799 ; 0x31f htim7.Instance = TIM7; 8002d9a: f8df 81b0 ldr.w r8, [pc, #432] ; 8002f4c htim7.Init.Prescaler = 800 - 1; 8002d9e: 4a56 ldr r2, [pc, #344] ; (8002ef8 ) if (HAL_TIM_Base_Init(&htim7) != HAL_OK) 8002da0: 4640 mov r0, r8 htim7.Init.Prescaler = 800 - 1; 8002da2: e888 000c stmia.w r8, {r2, r3} htim7.Init.Period = 10- 1; 8002da6: 2309 movs r3, #9 TIM_MasterConfigTypeDef sMasterConfig = {0}; 8002da8: 9404 str r4, [sp, #16] htim7.Init.Period = 10- 1; 8002daa: f8c8 300c str.w r3, [r8, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8002dae: 9405 str r4, [sp, #20] htim7.Init.CounterMode = TIM_COUNTERMODE_UP; 8002db0: f8c8 4008 str.w r4, [r8, #8] htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8002db4: f8c8 4018 str.w r4, [r8, #24] if (HAL_TIM_Base_Init(&htim7) != HAL_OK) 8002db8: f7ff f950 bl 800205c if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK) 8002dbc: a904 add r1, sp, #16 8002dbe: 4640 mov r0, r8 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8002dc0: 9404 str r4, [sp, #16] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8002dc2: 9405 str r4, [sp, #20] if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK) 8002dc4: f7ff f964 bl 8002090 hi2c1.Instance = I2C1; 8002dc8: 484c ldr r0, [pc, #304] ; (8002efc ) hi2c1.Init.ClockSpeed = 100000; 8002dca: 494d ldr r1, [pc, #308] ; (8002f00 ) 8002dcc: 4b4d ldr r3, [pc, #308] ; (8002f04 ) hadc1.Instance = ADC1; 8002dce: 4f4e ldr r7, [pc, #312] ; (8002f08 ) hi2c1.Init.ClockSpeed = 100000; 8002dd0: e880 000a stmia.w r0, {r1, r3} hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8002dd4: f44f 4380 mov.w r3, #16384 ; 0x4000 hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; 8002dd8: 6084 str r4, [r0, #8] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8002dda: 6103 str r3, [r0, #16] hi2c1.Init.OwnAddress1 = 0; 8002ddc: 60c4 str r4, [r0, #12] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8002dde: 6144 str r4, [r0, #20] hi2c1.Init.OwnAddress2 = 0; 8002de0: 6184 str r4, [r0, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8002de2: 61c4 str r4, [r0, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8002de4: 6204 str r4, [r0, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) 8002de6: f7fd feef bl 8000bc8 hadc1.Instance = ADC1; 8002dea: 4b48 ldr r3, [pc, #288] ; (8002f0c ) if (HAL_ADC_Init(&hadc1) != HAL_OK) 8002dec: 4638 mov r0, r7 hadc1.Instance = ADC1; 8002dee: 603b str r3, [r7, #0] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8002df0: f44f 2360 mov.w r3, #917504 ; 0xe0000 hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; 8002df4: 60bc str r4, [r7, #8] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8002df6: 61fb str r3, [r7, #28] hadc1.Init.ContinuousConvMode = DISABLE; 8002df8: 60fc str r4, [r7, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 8002dfa: 617c str r4, [r7, #20] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8002dfc: 607c str r4, [r7, #4] hadc1.Init.NbrOfConversion = 1; 8002dfe: f8c7 9010 str.w r9, [r7, #16] ADC_ChannelConfTypeDef sConfig = {0}; 8002e02: 9404 str r4, [sp, #16] 8002e04: 9405 str r4, [sp, #20] 8002e06: 9406 str r4, [sp, #24] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8002e08: f7fd fafc bl 8000404 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8002e0c: a904 add r1, sp, #16 8002e0e: 4638 mov r0, r7 sConfig.Channel = ADC_CHANNEL_0; 8002e10: 9404 str r4, [sp, #16] sConfig.Rank = ADC_REGULAR_RANK_1; 8002e12: f8cd 9014 str.w r9, [sp, #20] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; 8002e16: 9406 str r4, [sp, #24] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8002e18: f7fd fa4e bl 80002b8 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8002e1c: 4622 mov r2, r4 8002e1e: 4621 mov r1, r4 8002e20: 2025 movs r0, #37 ; 0x25 8002e22: f7fd fb81 bl 8000528 HAL_NVIC_EnableIRQ(USART1_IRQn); 8002e26: 2025 movs r0, #37 ; 0x25 8002e28: f7fd fbb2 bl 8000590 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); 8002e2c: 4622 mov r2, r4 8002e2e: 4621 mov r1, r4 8002e30: 2026 movs r0, #38 ; 0x26 8002e32: f7fd fb79 bl 8000528 HAL_NVIC_EnableIRQ(USART2_IRQn); 8002e36: 2026 movs r0, #38 ; 0x26 8002e38: f7fd fbaa bl 8000590 HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0); 8002e3c: 4622 mov r2, r4 8002e3e: 4621 mov r1, r4 8002e40: 2037 movs r0, #55 ; 0x37 8002e42: f7fd fb71 bl 8000528 HAL_NVIC_EnableIRQ(TIM7_IRQn); 8002e46: 2037 movs r0, #55 ; 0x37 8002e48: f7fd fba2 bl 8000590 HAL_TIM_Base_Start_IT(&htim7); 8002e4c: 4640 mov r0, r8 8002e4e: f7ff f801 bl 8001e54 HAL_UART_Receive_IT(&huart1, &rx1_data,1); 8002e52: 464a mov r2, r9 8002e54: 492e ldr r1, [pc, #184] ; (8002f10 ) 8002e56: 4630 mov r0, r6 8002e58: f7ff fb20 bl 800249c HAL_UART_Receive_IT(&huart2, &rx2_data,1); 8002e5c: 464a mov r2, r9 8002e5e: 492d ldr r1, [pc, #180] ; (8002f14 ) 8002e60: 4628 mov r0, r5 8002e62: f7ff fb1b bl 800249c setbuf(stdout, NULL); // \n ?��?��?��, printf �???????��?���?????? ?��?��?�� 8002e66: 4b2c ldr r3, [pc, #176] ; (8002f18 ) 8002e68: 4621 mov r1, r4 8002e6a: 681b ldr r3, [r3, #0] return UartDataisReved; 8002e6c: 4f2b ldr r7, [pc, #172] ; (8002f1c ) setbuf(stdout, NULL); // \n ?��?��?��, printf �???????��?���?????? ?��?��?�� 8002e6e: 6898 ldr r0, [r3, #8] 8002e70: f000 fabe bl 80033f0 printf("****************************************\r\n"); 8002e74: 482a ldr r0, [pc, #168] ; (8002f20 ) 8002e76: f000 fab3 bl 80033e0 printf("RGB Sensor Project\r\n"); 8002e7a: 482a ldr r0, [pc, #168] ; (8002f24 ) 8002e7c: f000 fab0 bl 80033e0 printf("Build at %s %s\r\n", __DATE__, __TIME__); 8002e80: 4a29 ldr r2, [pc, #164] ; (8002f28 ) 8002e82: 492a ldr r1, [pc, #168] ; (8002f2c ) 8002e84: 482a ldr r0, [pc, #168] ; (8002f30 ) 8002e86: f000 fa37 bl 80032f8 printf("Copyright (c) 2019. BLUECELL\r\n"); 8002e8a: 482a ldr r0, [pc, #168] ; (8002f34 ) 8002e8c: f000 faa8 bl 80033e0 printf("****************************************\r\n"); 8002e90: 4823 ldr r0, [pc, #140] ; (8002f20 ) 8002e92: f000 faa5 bl 80033e0 printf("My ID %02x \r\n",My_RGB_ID); 8002e96: 4b28 ldr r3, [pc, #160] ; (8002f38 ) 8002e98: 4828 ldr r0, [pc, #160] ; (8002f3c ) 8002e9a: 7819 ldrb r1, [r3, #0] 8002e9c: f000 fa2c bl 80032f8 TCS34725_enable(); 8002ea0: f7ff fdd4 bl 8002a4c if(LedTimerCnt > 100){ 8002ea4: 4d26 ldr r5, [pc, #152] ; (8002f40 ) HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 8002ea6: 4e0d ldr r6, [pc, #52] ; (8002edc ) return UartDataisReved; 8002ea8: 783c ldrb r4, [r7, #0] if(uartdatarecv != 0){ 8002eaa: b14c cbz r4, 8002ec0 if(uartdatarecv == 1){ 8002eac: 2c01 cmp r4, #1 8002eae: d103 bne.n 8002eb8 Uart_dataCheck(&count_in1); 8002eb0: 4824 ldr r0, [pc, #144] ; (8002f44 ) Uart_dataCheck(&count_in2); 8002eb2: f7ff fe7b bl 8002bac 8002eb6: e7f7 b.n 8002ea8 }else if(uartdatarecv == 2){ 8002eb8: 2c02 cmp r4, #2 8002eba: d1f5 bne.n 8002ea8 Uart_dataCheck(&count_in2); 8002ebc: 4822 ldr r0, [pc, #136] ; (8002f48 ) 8002ebe: e7f8 b.n 8002eb2 if(LedTimerCnt > 100){ 8002ec0: 682b ldr r3, [r5, #0] 8002ec2: 2b64 cmp r3, #100 ; 0x64 8002ec4: d9f0 bls.n 8002ea8 TCS34725_getrawdata(); 8002ec6: f7ff fd85 bl 80029d4 HAL_GPIO_TogglePin(GPIOC,GPIO_PIN_15); 8002eca: f44f 4100 mov.w r1, #32768 ; 0x8000 8002ece: 4630 mov r0, r6 8002ed0: f7fd fcad bl 800082e LedTimerCnt = 0; 8002ed4: 602c str r4, [r5, #0] 8002ed6: e7e7 b.n 8002ea8 8002ed8: 40021000 .word 0x40021000 8002edc: 40011000 .word 0x40011000 8002ee0: 40010800 .word 0x40010800 8002ee4: 40010c00 .word 0x40010c00 8002ee8: 200001d8 .word 0x200001d8 8002eec: 40013800 .word 0x40013800 8002ef0: 2000024c .word 0x2000024c 8002ef4: 40004400 .word 0x40004400 8002ef8: 40001400 .word 0x40001400 8002efc: 20000150 .word 0x20000150 8002f00: 40005400 .word 0x40005400 8002f04: 000186a0 .word 0x000186a0 8002f08: 200001a8 .word 0x200001a8 8002f0c: 40012400 .word 0x40012400 8002f10: 2000024a .word 0x2000024a 8002f14: 200001a4 .word 0x200001a4 8002f18: 2000000c .word 0x2000000c 8002f1c: 2000014c .word 0x2000014c 8002f20: 0800449b .word 0x0800449b 8002f24: 080044c5 .word 0x080044c5 8002f28: 080044d9 .word 0x080044d9 8002f2c: 080044e2 .word 0x080044e2 8002f30: 080044ee .word 0x080044ee 8002f34: 080044ff .word 0x080044ff 8002f38: 2000008c .word 0x2000008c 8002f3c: 0800451d .word 0x0800451d 8002f40: 200000fc .word 0x200000fc 8002f44: 20000136 .word 0x20000136 8002f48: 20000137 .word 0x20000137 8002f4c: 2000028c .word 0x2000028c 08002f50 : 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 }; uint8_t STH30_CreateCrc(uint8_t *data, uint8_t nbrOfBytes) { 8002f50: b510 push {r4, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8002f52: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8002f54: 4604 mov r4, r0 8002f56: 1a22 subs r2, r4, r0 8002f58: b2d2 uxtb r2, r2 8002f5a: 4291 cmp r1, r2 8002f5c: d801 bhi.n 8002f62 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; else crc = (crc << 1); } } return crc; } 8002f5e: 4618 mov r0, r3 8002f60: bd10 pop {r4, pc} crc ^= (data[byteCtr]); 8002f62: f814 2b01 ldrb.w r2, [r4], #1 8002f66: 4053 eors r3, r2 8002f68: 2208 movs r2, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8002f6a: f013 0f80 tst.w r3, #128 ; 0x80 8002f6e: f102 32ff add.w r2, r2, #4294967295 8002f72: ea4f 0343 mov.w r3, r3, lsl #1 8002f76: bf18 it ne 8002f78: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8002f7c: f012 02ff ands.w r2, r2, #255 ; 0xff else crc = (crc << 1); 8002f80: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8002f82: d1f2 bne.n 8002f6a 8002f84: e7e7 b.n 8002f56 08002f86 : etError STH30_CheckCrc(uint8_t *data, uint8_t nbrOfBytes, uint8_t checksum) { 8002f86: b530 push {r4, r5, lr} uint8_t bit; // bit mask uint8_t crc = 0xFF; // calculated checksum 8002f88: 23ff movs r3, #255 ; 0xff uint8_t byteCtr; // byte counter // calculates 8-Bit checksum with given polynomial for(byteCtr = 0; byteCtr < nbrOfBytes; byteCtr++) 8002f8a: 4605 mov r5, r0 8002f8c: 1a2c subs r4, r5, r0 8002f8e: b2e4 uxtb r4, r4 8002f90: 42a1 cmp r1, r4 8002f92: d803 bhi.n 8002f9c else crc = (crc << 1); } } if(crc != checksum) return CHECKSUM_ERROR; else return NO_ERROR; } 8002f94: 1a9b subs r3, r3, r2 8002f96: 4258 negs r0, r3 8002f98: 4158 adcs r0, r3 8002f9a: bd30 pop {r4, r5, pc} crc ^= (data[byteCtr]); 8002f9c: f815 4b01 ldrb.w r4, [r5], #1 8002fa0: 4063 eors r3, r4 8002fa2: 2408 movs r4, #8 if(crc & 0x80) crc = (crc << 1) ^ POLYNOMIAL; 8002fa4: f013 0f80 tst.w r3, #128 ; 0x80 8002fa8: f104 34ff add.w r4, r4, #4294967295 8002fac: ea4f 0343 mov.w r3, r3, lsl #1 8002fb0: bf18 it ne 8002fb2: f083 0331 eorne.w r3, r3, #49 ; 0x31 for(bit = 8; bit > 0; --bit) 8002fb6: f014 04ff ands.w r4, r4, #255 ; 0xff else crc = (crc << 1); 8002fba: b2db uxtb r3, r3 for(bit = 8; bit > 0; --bit) 8002fbc: d1f2 bne.n 8002fa4 8002fbe: e7e5 b.n 8002f8c 08002fc0 : { /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8002fc0: 4b0e ldr r3, [pc, #56] ; (8002ffc ) { 8002fc2: b082 sub sp, #8 __HAL_RCC_AFIO_CLK_ENABLE(); 8002fc4: 699a ldr r2, [r3, #24] 8002fc6: f042 0201 orr.w r2, r2, #1 8002fca: 619a str r2, [r3, #24] 8002fcc: 699a ldr r2, [r3, #24] 8002fce: f002 0201 and.w r2, r2, #1 8002fd2: 9200 str r2, [sp, #0] 8002fd4: 9a00 ldr r2, [sp, #0] __HAL_RCC_PWR_CLK_ENABLE(); 8002fd6: 69da ldr r2, [r3, #28] 8002fd8: f042 5280 orr.w r2, r2, #268435456 ; 0x10000000 8002fdc: 61da str r2, [r3, #28] 8002fde: 69db ldr r3, [r3, #28] /* System interrupt init*/ /**DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8002fe0: 4a07 ldr r2, [pc, #28] ; (8003000 ) __HAL_RCC_PWR_CLK_ENABLE(); 8002fe2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8002fe6: 9301 str r3, [sp, #4] 8002fe8: 9b01 ldr r3, [sp, #4] __HAL_AFIO_REMAP_SWJ_DISABLE(); 8002fea: 6853 ldr r3, [r2, #4] 8002fec: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8002ff0: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8002ff4: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8002ff6: b002 add sp, #8 8002ff8: 4770 bx lr 8002ffa: bf00 nop 8002ffc: 40021000 .word 0x40021000 8003000: 40010000 .word 0x40010000 08003004 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { 8003004: b510 push {r4, lr} 8003006: 4604 mov r4, r0 8003008: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800300a: 2210 movs r2, #16 800300c: 2100 movs r1, #0 800300e: a802 add r0, sp, #8 8003010: f000 f96a bl 80032e8 if(hadc->Instance==ADC1) 8003014: 6822 ldr r2, [r4, #0] 8003016: 4b10 ldr r3, [pc, #64] ; (8003058 ) 8003018: 429a cmp r2, r3 800301a: d11b bne.n 8003054 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 800301c: f503 436c add.w r3, r3, #60416 ; 0xec00 8003020: 699a ldr r2, [r3, #24] /**ADC1 GPIO Configuration PA0-WKUP ------> ADC1_IN0 */ GPIO_InitStruct.Pin = GPIO_PIN_0; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003022: a902 add r1, sp, #8 __HAL_RCC_ADC1_CLK_ENABLE(); 8003024: f442 7200 orr.w r2, r2, #512 ; 0x200 8003028: 619a str r2, [r3, #24] 800302a: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800302c: 480b ldr r0, [pc, #44] ; (800305c ) __HAL_RCC_ADC1_CLK_ENABLE(); 800302e: f402 7200 and.w r2, r2, #512 ; 0x200 8003032: 9200 str r2, [sp, #0] 8003034: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 8003036: 699a ldr r2, [r3, #24] 8003038: f042 0204 orr.w r2, r2, #4 800303c: 619a str r2, [r3, #24] 800303e: 699b ldr r3, [r3, #24] 8003040: f003 0304 and.w r3, r3, #4 8003044: 9301 str r3, [sp, #4] 8003046: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_0; 8003048: 2301 movs r3, #1 800304a: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800304c: 2303 movs r3, #3 800304e: 9303 str r3, [sp, #12] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003050: f7fd fb08 bl 8000664 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } 8003054: b006 add sp, #24 8003056: bd10 pop {r4, pc} 8003058: 40012400 .word 0x40012400 800305c: 40010800 .word 0x40010800 08003060 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8003060: b510 push {r4, lr} 8003062: 4604 mov r4, r0 8003064: b086 sub sp, #24 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003066: 2210 movs r2, #16 8003068: 2100 movs r1, #0 800306a: a802 add r0, sp, #8 800306c: f000 f93c bl 80032e8 if(hi2c->Instance==I2C1) 8003070: 6822 ldr r2, [r4, #0] 8003072: 4b15 ldr r3, [pc, #84] ; (80030c8 ) 8003074: 429a cmp r2, r3 8003076: d124 bne.n 80030c2 { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8003078: 4c14 ldr r4, [pc, #80] ; (80030cc ) PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800307a: a902 add r1, sp, #8 __HAL_RCC_GPIOB_CLK_ENABLE(); 800307c: 69a3 ldr r3, [r4, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800307e: 4814 ldr r0, [pc, #80] ; (80030d0 ) __HAL_RCC_GPIOB_CLK_ENABLE(); 8003080: f043 0308 orr.w r3, r3, #8 8003084: 61a3 str r3, [r4, #24] 8003086: 69a3 ldr r3, [r4, #24] 8003088: f003 0308 and.w r3, r3, #8 800308c: 9300 str r3, [sp, #0] 800308e: 9b00 ldr r3, [sp, #0] GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8003090: 23c0 movs r3, #192 ; 0xc0 8003092: 9302 str r3, [sp, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8003094: 2312 movs r3, #18 8003096: 9303 str r3, [sp, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8003098: 2303 movs r3, #3 800309a: 9305 str r3, [sp, #20] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800309c: f7fd fae2 bl 8000664 /* Peripheral clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); /* I2C1 interrupt Init */ HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0); 80030a0: 2200 movs r2, #0 __HAL_RCC_I2C1_CLK_ENABLE(); 80030a2: 69e3 ldr r3, [r4, #28] HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0); 80030a4: 201f movs r0, #31 __HAL_RCC_I2C1_CLK_ENABLE(); 80030a6: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 80030aa: 61e3 str r3, [r4, #28] 80030ac: 69e3 ldr r3, [r4, #28] HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0); 80030ae: 4611 mov r1, r2 __HAL_RCC_I2C1_CLK_ENABLE(); 80030b0: f403 1300 and.w r3, r3, #2097152 ; 0x200000 80030b4: 9301 str r3, [sp, #4] 80030b6: 9b01 ldr r3, [sp, #4] HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0); 80030b8: f7fd fa36 bl 8000528 HAL_NVIC_EnableIRQ(I2C1_EV_IRQn); 80030bc: 201f movs r0, #31 80030be: f7fd fa67 bl 8000590 /* USER CODE BEGIN I2C1_MspInit 1 */ /* USER CODE END I2C1_MspInit 1 */ } } 80030c2: b006 add sp, #24 80030c4: bd10 pop {r4, pc} 80030c6: bf00 nop 80030c8: 40005400 .word 0x40005400 80030cc: 40021000 .word 0x40021000 80030d0: 40010c00 .word 0x40010c00 080030d4 : * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { if(htim_base->Instance==TIM7) 80030d4: 6802 ldr r2, [r0, #0] 80030d6: 4b08 ldr r3, [pc, #32] ; (80030f8 ) { 80030d8: b082 sub sp, #8 if(htim_base->Instance==TIM7) 80030da: 429a cmp r2, r3 80030dc: d10a bne.n 80030f4 { /* USER CODE BEGIN TIM7_MspInit 0 */ /* USER CODE END TIM7_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM7_CLK_ENABLE(); 80030de: f503 33fe add.w r3, r3, #130048 ; 0x1fc00 80030e2: 69da ldr r2, [r3, #28] 80030e4: f042 0220 orr.w r2, r2, #32 80030e8: 61da str r2, [r3, #28] 80030ea: 69db ldr r3, [r3, #28] 80030ec: f003 0320 and.w r3, r3, #32 80030f0: 9301 str r3, [sp, #4] 80030f2: 9b01 ldr r3, [sp, #4] /* USER CODE BEGIN TIM7_MspInit 1 */ /* USER CODE END TIM7_MspInit 1 */ } } 80030f4: b002 add sp, #8 80030f6: 4770 bx lr 80030f8: 40001400 .word 0x40001400 080030fc : * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { GPIO_InitTypeDef GPIO_InitStruct = {0}; 80030fc: 2210 movs r2, #16 { 80030fe: b510 push {r4, lr} 8003100: 4604 mov r4, r0 8003102: b088 sub sp, #32 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003104: eb0d 0002 add.w r0, sp, r2 8003108: 2100 movs r1, #0 800310a: f000 f8ed bl 80032e8 if(huart->Instance==USART1) 800310e: 6823 ldr r3, [r4, #0] 8003110: 4a27 ldr r2, [pc, #156] ; (80031b0 ) 8003112: 4293 cmp r3, r2 8003114: d129 bne.n 800316a { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8003116: 4b27 ldr r3, [pc, #156] ; (80031b4 ) PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003118: a904 add r1, sp, #16 __HAL_RCC_USART1_CLK_ENABLE(); 800311a: 699a ldr r2, [r3, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800311c: 4826 ldr r0, [pc, #152] ; (80031b8 ) __HAL_RCC_USART1_CLK_ENABLE(); 800311e: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8003122: 619a str r2, [r3, #24] 8003124: 699a ldr r2, [r3, #24] 8003126: f402 4280 and.w r2, r2, #16384 ; 0x4000 800312a: 9200 str r2, [sp, #0] 800312c: 9a00 ldr r2, [sp, #0] __HAL_RCC_GPIOA_CLK_ENABLE(); 800312e: 699a ldr r2, [r3, #24] 8003130: f042 0204 orr.w r2, r2, #4 8003134: 619a str r2, [r3, #24] 8003136: 699b ldr r3, [r3, #24] 8003138: f003 0304 and.w r3, r3, #4 800313c: 9301 str r3, [sp, #4] 800313e: 9b01 ldr r3, [sp, #4] GPIO_InitStruct.Pin = GPIO_PIN_9; 8003140: f44f 7300 mov.w r3, #512 ; 0x200 8003144: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003146: 2302 movs r3, #2 8003148: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800314a: 2303 movs r3, #3 800314c: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800314e: f7fd fa89 bl 8000664 GPIO_InitStruct.Pin = GPIO_PIN_10; 8003152: f44f 6380 mov.w r3, #1024 ; 0x400 GPIO_InitStruct.Pin = GPIO_PIN_2; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); GPIO_InitStruct.Pin = GPIO_PIN_3; 8003156: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003158: 2300 movs r3, #0 GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800315a: a904 add r1, sp, #16 800315c: 4816 ldr r0, [pc, #88] ; (80031b8 ) GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800315e: 9305 str r3, [sp, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003160: 9306 str r3, [sp, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003162: f7fd fa7f bl 8000664 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8003166: b008 add sp, #32 8003168: bd10 pop {r4, pc} else if(huart->Instance==USART2) 800316a: 4a14 ldr r2, [pc, #80] ; (80031bc ) 800316c: 4293 cmp r3, r2 800316e: d1fa bne.n 8003166 __HAL_RCC_USART2_CLK_ENABLE(); 8003170: 4b10 ldr r3, [pc, #64] ; (80031b4 ) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003172: a904 add r1, sp, #16 __HAL_RCC_USART2_CLK_ENABLE(); 8003174: 69da ldr r2, [r3, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003176: 4810 ldr r0, [pc, #64] ; (80031b8 ) __HAL_RCC_USART2_CLK_ENABLE(); 8003178: f442 3200 orr.w r2, r2, #131072 ; 0x20000 800317c: 61da str r2, [r3, #28] 800317e: 69da ldr r2, [r3, #28] 8003180: f402 3200 and.w r2, r2, #131072 ; 0x20000 8003184: 9202 str r2, [sp, #8] 8003186: 9a02 ldr r2, [sp, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8003188: 699a ldr r2, [r3, #24] 800318a: f042 0204 orr.w r2, r2, #4 800318e: 619a str r2, [r3, #24] 8003190: 699b ldr r3, [r3, #24] 8003192: f003 0304 and.w r3, r3, #4 8003196: 9303 str r3, [sp, #12] 8003198: 9b03 ldr r3, [sp, #12] GPIO_InitStruct.Pin = GPIO_PIN_2; 800319a: 2304 movs r3, #4 800319c: 9304 str r3, [sp, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800319e: 2302 movs r3, #2 80031a0: 9305 str r3, [sp, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80031a2: 2303 movs r3, #3 80031a4: 9307 str r3, [sp, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80031a6: f7fd fa5d bl 8000664 GPIO_InitStruct.Pin = GPIO_PIN_3; 80031aa: 2308 movs r3, #8 80031ac: e7d3 b.n 8003156 80031ae: bf00 nop 80031b0: 40013800 .word 0x40013800 80031b4: 40021000 .word 0x40021000 80031b8: 40010800 .word 0x40010800 80031bc: 40004400 .word 0x40004400 080031c0 : 80031c0: 4770 bx lr 080031c2 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80031c2: e7fe b.n 80031c2 080031c4 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80031c4: e7fe b.n 80031c4 080031c6 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80031c6: e7fe b.n 80031c6 080031c8 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80031c8: e7fe b.n 80031c8 080031ca : 80031ca: 4770 bx lr 080031cc : 80031cc: 4770 bx lr 080031ce : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80031ce: 4770 bx lr 080031d0 : void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80031d0: f7fd b84e b.w 8000270 080031d4 : void I2C1_EV_IRQHandler(void) { /* USER CODE BEGIN I2C1_EV_IRQn 0 */ /* USER CODE END I2C1_EV_IRQn 0 */ HAL_I2C_EV_IRQHandler(&hi2c1); 80031d4: 4801 ldr r0, [pc, #4] ; (80031dc ) 80031d6: f7fd bfcb b.w 8001170 80031da: bf00 nop 80031dc: 20000150 .word 0x20000150 080031e0 : void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 80031e0: 4801 ldr r0, [pc, #4] ; (80031e8 ) 80031e2: f7ff b9c3 b.w 800256c 80031e6: bf00 nop 80031e8: 200001d8 .word 0x200001d8 080031ec : void USART2_IRQHandler(void) { /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 80031ec: 4801 ldr r0, [pc, #4] ; (80031f4 ) 80031ee: f7ff b9bd b.w 800256c 80031f2: bf00 nop 80031f4: 2000024c .word 0x2000024c 080031f8 : void TIM7_IRQHandler(void) { /* USER CODE BEGIN TIM7_IRQn 0 */ /* USER CODE END TIM7_IRQn 0 */ HAL_TIM_IRQHandler(&htim7); 80031f8: 4801 ldr r0, [pc, #4] ; (8003200 ) 80031fa: f7fe be3a b.w 8001e72 80031fe: bf00 nop 8003200: 2000028c .word 0x2000028c 08003204 : */ void SystemInit (void) { /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= 0x00000001U; 8003204: 4b10 ldr r3, [pc, #64] ; (8003248 ) 8003206: 681a ldr r2, [r3, #0] 8003208: f042 0201 orr.w r2, r2, #1 800320c: 601a str r2, [r3, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #if !defined(STM32F105xC) && !defined(STM32F107xC) RCC->CFGR &= 0xF8FF0000U; 800320e: 6859 ldr r1, [r3, #4] 8003210: 4a0e ldr r2, [pc, #56] ; (800324c ) 8003212: 400a ands r2, r1 8003214: 605a str r2, [r3, #4] #else RCC->CFGR &= 0xF0FF0000U; #endif /* STM32F105xC */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= 0xFEF6FFFFU; 8003216: 681a ldr r2, [r3, #0] 8003218: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000 800321c: f422 3280 bic.w r2, r2, #65536 ; 0x10000 8003220: 601a str r2, [r3, #0] /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; 8003222: 681a ldr r2, [r3, #0] 8003224: f422 2280 bic.w r2, r2, #262144 ; 0x40000 8003228: 601a str r2, [r3, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= 0xFF80FFFFU; 800322a: 685a ldr r2, [r3, #4] 800322c: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000 8003230: 605a str r2, [r3, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; #elif defined(STM32F100xB) || defined(STM32F100xE) /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000U; 8003232: f44f 021f mov.w r2, #10420224 ; 0x9f0000 8003236: 609a str r2, [r3, #8] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000U; 8003238: 2200 movs r2, #0 800323a: 62da str r2, [r3, #44] ; 0x2c #endif #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 800323c: f04f 6200 mov.w r2, #134217728 ; 0x8000000 8003240: 4b03 ldr r3, [pc, #12] ; (8003250 ) 8003242: 609a str r2, [r3, #8] 8003244: 4770 bx lr 8003246: bf00 nop 8003248: 40021000 .word 0x40021000 800324c: f8ff0000 .word 0xf8ff0000 8003250: e000ed00 .word 0xe000ed00 08003254 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 8003254: 2100 movs r1, #0 b LoopCopyDataInit 8003256: e003 b.n 8003260 08003258 : CopyDataInit: ldr r3, =_sidata 8003258: 4b0b ldr r3, [pc, #44] ; (8003288 ) ldr r3, [r3, r1] 800325a: 585b ldr r3, [r3, r1] str r3, [r0, r1] 800325c: 5043 str r3, [r0, r1] adds r1, r1, #4 800325e: 3104 adds r1, #4 08003260 : LoopCopyDataInit: ldr r0, =_sdata 8003260: 480a ldr r0, [pc, #40] ; (800328c ) ldr r3, =_edata 8003262: 4b0b ldr r3, [pc, #44] ; (8003290 ) adds r2, r0, r1 8003264: 1842 adds r2, r0, r1 cmp r2, r3 8003266: 429a cmp r2, r3 bcc CopyDataInit 8003268: d3f6 bcc.n 8003258 ldr r2, =_sbss 800326a: 4a0a ldr r2, [pc, #40] ; (8003294 ) b LoopFillZerobss 800326c: e002 b.n 8003274 0800326e : /* Zero fill the bss segment. */ FillZerobss: movs r3, #0 800326e: 2300 movs r3, #0 str r3, [r2], #4 8003270: f842 3b04 str.w r3, [r2], #4 08003274 : LoopFillZerobss: ldr r3, = _ebss 8003274: 4b08 ldr r3, [pc, #32] ; (8003298 ) cmp r2, r3 8003276: 429a cmp r2, r3 bcc FillZerobss 8003278: d3f9 bcc.n 800326e /* Call the clock system intitialization function.*/ bl SystemInit 800327a: f7ff ffc3 bl 8003204 /* Call static constructors */ bl __libc_init_array 800327e: f000 f80f bl 80032a0 <__libc_init_array> /* Call the application's entry point.*/ bl main 8003282: f7ff fd0d bl 8002ca0
bx lr 8003286: 4770 bx lr ldr r3, =_sidata 8003288: 080045e4 .word 0x080045e4 ldr r0, =_sdata 800328c: 20000000 .word 0x20000000 ldr r3, =_edata 8003290: 20000070 .word 0x20000070 ldr r2, =_sbss 8003294: 20000070 .word 0x20000070 ldr r3, = _ebss 8003298: 200002d0 .word 0x200002d0 0800329c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800329c: e7fe b.n 800329c ... 080032a0 <__libc_init_array>: 80032a0: b570 push {r4, r5, r6, lr} 80032a2: 2500 movs r5, #0 80032a4: 4e0c ldr r6, [pc, #48] ; (80032d8 <__libc_init_array+0x38>) 80032a6: 4c0d ldr r4, [pc, #52] ; (80032dc <__libc_init_array+0x3c>) 80032a8: 1ba4 subs r4, r4, r6 80032aa: 10a4 asrs r4, r4, #2 80032ac: 42a5 cmp r5, r4 80032ae: d109 bne.n 80032c4 <__libc_init_array+0x24> 80032b0: f001 f87e bl 80043b0 <_init> 80032b4: 2500 movs r5, #0 80032b6: 4e0a ldr r6, [pc, #40] ; (80032e0 <__libc_init_array+0x40>) 80032b8: 4c0a ldr r4, [pc, #40] ; (80032e4 <__libc_init_array+0x44>) 80032ba: 1ba4 subs r4, r4, r6 80032bc: 10a4 asrs r4, r4, #2 80032be: 42a5 cmp r5, r4 80032c0: d105 bne.n 80032ce <__libc_init_array+0x2e> 80032c2: bd70 pop {r4, r5, r6, pc} 80032c4: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80032c8: 4798 blx r3 80032ca: 3501 adds r5, #1 80032cc: e7ee b.n 80032ac <__libc_init_array+0xc> 80032ce: f856 3025 ldr.w r3, [r6, r5, lsl #2] 80032d2: 4798 blx r3 80032d4: 3501 adds r5, #1 80032d6: e7f2 b.n 80032be <__libc_init_array+0x1e> 80032d8: 080045dc .word 0x080045dc 80032dc: 080045dc .word 0x080045dc 80032e0: 080045dc .word 0x080045dc 80032e4: 080045e0 .word 0x080045e0 080032e8 : 80032e8: 4603 mov r3, r0 80032ea: 4402 add r2, r0 80032ec: 4293 cmp r3, r2 80032ee: d100 bne.n 80032f2 80032f0: 4770 bx lr 80032f2: f803 1b01 strb.w r1, [r3], #1 80032f6: e7f9 b.n 80032ec 080032f8 : 80032f8: b40f push {r0, r1, r2, r3} 80032fa: 4b0a ldr r3, [pc, #40] ; (8003324 ) 80032fc: b513 push {r0, r1, r4, lr} 80032fe: 681c ldr r4, [r3, #0] 8003300: b124 cbz r4, 800330c 8003302: 69a3 ldr r3, [r4, #24] 8003304: b913 cbnz r3, 800330c 8003306: 4620 mov r0, r4 8003308: f000 fada bl 80038c0 <__sinit> 800330c: ab05 add r3, sp, #20 800330e: 9a04 ldr r2, [sp, #16] 8003310: 68a1 ldr r1, [r4, #8] 8003312: 4620 mov r0, r4 8003314: 9301 str r3, [sp, #4] 8003316: f000 fc9b bl 8003c50 <_vfiprintf_r> 800331a: b002 add sp, #8 800331c: e8bd 4010 ldmia.w sp!, {r4, lr} 8003320: b004 add sp, #16 8003322: 4770 bx lr 8003324: 2000000c .word 0x2000000c 08003328 <_puts_r>: 8003328: b570 push {r4, r5, r6, lr} 800332a: 460e mov r6, r1 800332c: 4605 mov r5, r0 800332e: b118 cbz r0, 8003338 <_puts_r+0x10> 8003330: 6983 ldr r3, [r0, #24] 8003332: b90b cbnz r3, 8003338 <_puts_r+0x10> 8003334: f000 fac4 bl 80038c0 <__sinit> 8003338: 69ab ldr r3, [r5, #24] 800333a: 68ac ldr r4, [r5, #8] 800333c: b913 cbnz r3, 8003344 <_puts_r+0x1c> 800333e: 4628 mov r0, r5 8003340: f000 fabe bl 80038c0 <__sinit> 8003344: 4b23 ldr r3, [pc, #140] ; (80033d4 <_puts_r+0xac>) 8003346: 429c cmp r4, r3 8003348: d117 bne.n 800337a <_puts_r+0x52> 800334a: 686c ldr r4, [r5, #4] 800334c: 89a3 ldrh r3, [r4, #12] 800334e: 071b lsls r3, r3, #28 8003350: d51d bpl.n 800338e <_puts_r+0x66> 8003352: 6923 ldr r3, [r4, #16] 8003354: b1db cbz r3, 800338e <_puts_r+0x66> 8003356: 3e01 subs r6, #1 8003358: 68a3 ldr r3, [r4, #8] 800335a: f816 1f01 ldrb.w r1, [r6, #1]! 800335e: 3b01 subs r3, #1 8003360: 60a3 str r3, [r4, #8] 8003362: b9e9 cbnz r1, 80033a0 <_puts_r+0x78> 8003364: 2b00 cmp r3, #0 8003366: da2e bge.n 80033c6 <_puts_r+0x9e> 8003368: 4622 mov r2, r4 800336a: 210a movs r1, #10 800336c: 4628 mov r0, r5 800336e: f000 f8f5 bl 800355c <__swbuf_r> 8003372: 3001 adds r0, #1 8003374: d011 beq.n 800339a <_puts_r+0x72> 8003376: 200a movs r0, #10 8003378: bd70 pop {r4, r5, r6, pc} 800337a: 4b17 ldr r3, [pc, #92] ; (80033d8 <_puts_r+0xb0>) 800337c: 429c cmp r4, r3 800337e: d101 bne.n 8003384 <_puts_r+0x5c> 8003380: 68ac ldr r4, [r5, #8] 8003382: e7e3 b.n 800334c <_puts_r+0x24> 8003384: 4b15 ldr r3, [pc, #84] ; (80033dc <_puts_r+0xb4>) 8003386: 429c cmp r4, r3 8003388: bf08 it eq 800338a: 68ec ldreq r4, [r5, #12] 800338c: e7de b.n 800334c <_puts_r+0x24> 800338e: 4621 mov r1, r4 8003390: 4628 mov r0, r5 8003392: f000 f935 bl 8003600 <__swsetup_r> 8003396: 2800 cmp r0, #0 8003398: d0dd beq.n 8003356 <_puts_r+0x2e> 800339a: f04f 30ff mov.w r0, #4294967295 800339e: bd70 pop {r4, r5, r6, pc} 80033a0: 2b00 cmp r3, #0 80033a2: da04 bge.n 80033ae <_puts_r+0x86> 80033a4: 69a2 ldr r2, [r4, #24] 80033a6: 4293 cmp r3, r2 80033a8: db06 blt.n 80033b8 <_puts_r+0x90> 80033aa: 290a cmp r1, #10 80033ac: d004 beq.n 80033b8 <_puts_r+0x90> 80033ae: 6823 ldr r3, [r4, #0] 80033b0: 1c5a adds r2, r3, #1 80033b2: 6022 str r2, [r4, #0] 80033b4: 7019 strb r1, [r3, #0] 80033b6: e7cf b.n 8003358 <_puts_r+0x30> 80033b8: 4622 mov r2, r4 80033ba: 4628 mov r0, r5 80033bc: f000 f8ce bl 800355c <__swbuf_r> 80033c0: 3001 adds r0, #1 80033c2: d1c9 bne.n 8003358 <_puts_r+0x30> 80033c4: e7e9 b.n 800339a <_puts_r+0x72> 80033c6: 200a movs r0, #10 80033c8: 6823 ldr r3, [r4, #0] 80033ca: 1c5a adds r2, r3, #1 80033cc: 6022 str r2, [r4, #0] 80033ce: 7018 strb r0, [r3, #0] 80033d0: bd70 pop {r4, r5, r6, pc} 80033d2: bf00 nop 80033d4: 08004568 .word 0x08004568 80033d8: 08004588 .word 0x08004588 80033dc: 08004548 .word 0x08004548 080033e0 : 80033e0: 4b02 ldr r3, [pc, #8] ; (80033ec ) 80033e2: 4601 mov r1, r0 80033e4: 6818 ldr r0, [r3, #0] 80033e6: f7ff bf9f b.w 8003328 <_puts_r> 80033ea: bf00 nop 80033ec: 2000000c .word 0x2000000c 080033f0 : 80033f0: 2900 cmp r1, #0 80033f2: f44f 6380 mov.w r3, #1024 ; 0x400 80033f6: bf0c ite eq 80033f8: 2202 moveq r2, #2 80033fa: 2200 movne r2, #0 80033fc: f000 b800 b.w 8003400 08003400 : 8003400: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8003404: 461d mov r5, r3 8003406: 4b51 ldr r3, [pc, #324] ; (800354c ) 8003408: 4604 mov r4, r0 800340a: 681e ldr r6, [r3, #0] 800340c: 460f mov r7, r1 800340e: 4690 mov r8, r2 8003410: b126 cbz r6, 800341c 8003412: 69b3 ldr r3, [r6, #24] 8003414: b913 cbnz r3, 800341c 8003416: 4630 mov r0, r6 8003418: f000 fa52 bl 80038c0 <__sinit> 800341c: 4b4c ldr r3, [pc, #304] ; (8003550 ) 800341e: 429c cmp r4, r3 8003420: d152 bne.n 80034c8 8003422: 6874 ldr r4, [r6, #4] 8003424: f1b8 0f02 cmp.w r8, #2 8003428: d006 beq.n 8003438 800342a: f1b8 0f01 cmp.w r8, #1 800342e: f200 8089 bhi.w 8003544 8003432: 2d00 cmp r5, #0 8003434: f2c0 8086 blt.w 8003544 8003438: 4621 mov r1, r4 800343a: 4630 mov r0, r6 800343c: f000 f9d6 bl 80037ec <_fflush_r> 8003440: 6b61 ldr r1, [r4, #52] ; 0x34 8003442: b141 cbz r1, 8003456 8003444: f104 0344 add.w r3, r4, #68 ; 0x44 8003448: 4299 cmp r1, r3 800344a: d002 beq.n 8003452 800344c: 4630 mov r0, r6 800344e: f000 fb2d bl 8003aac <_free_r> 8003452: 2300 movs r3, #0 8003454: 6363 str r3, [r4, #52] ; 0x34 8003456: 2300 movs r3, #0 8003458: 61a3 str r3, [r4, #24] 800345a: 6063 str r3, [r4, #4] 800345c: 89a3 ldrh r3, [r4, #12] 800345e: 061b lsls r3, r3, #24 8003460: d503 bpl.n 800346a 8003462: 6921 ldr r1, [r4, #16] 8003464: 4630 mov r0, r6 8003466: f000 fb21 bl 8003aac <_free_r> 800346a: 89a3 ldrh r3, [r4, #12] 800346c: f1b8 0f02 cmp.w r8, #2 8003470: f423 634a bic.w r3, r3, #3232 ; 0xca0 8003474: f023 0303 bic.w r3, r3, #3 8003478: 81a3 strh r3, [r4, #12] 800347a: d05d beq.n 8003538 800347c: ab01 add r3, sp, #4 800347e: 466a mov r2, sp 8003480: 4621 mov r1, r4 8003482: 4630 mov r0, r6 8003484: f000 faa6 bl 80039d4 <__swhatbuf_r> 8003488: 89a3 ldrh r3, [r4, #12] 800348a: 4318 orrs r0, r3 800348c: 81a0 strh r0, [r4, #12] 800348e: bb2d cbnz r5, 80034dc 8003490: 9d00 ldr r5, [sp, #0] 8003492: 4628 mov r0, r5 8003494: f000 fb02 bl 8003a9c 8003498: 4607 mov r7, r0 800349a: 2800 cmp r0, #0 800349c: d14e bne.n 800353c 800349e: f8dd 9000 ldr.w r9, [sp] 80034a2: 45a9 cmp r9, r5 80034a4: d13c bne.n 8003520 80034a6: f04f 30ff mov.w r0, #4294967295 80034aa: 89a3 ldrh r3, [r4, #12] 80034ac: f043 0302 orr.w r3, r3, #2 80034b0: 81a3 strh r3, [r4, #12] 80034b2: 2300 movs r3, #0 80034b4: 60a3 str r3, [r4, #8] 80034b6: f104 0347 add.w r3, r4, #71 ; 0x47 80034ba: 6023 str r3, [r4, #0] 80034bc: 6123 str r3, [r4, #16] 80034be: 2301 movs r3, #1 80034c0: 6163 str r3, [r4, #20] 80034c2: b003 add sp, #12 80034c4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80034c8: 4b22 ldr r3, [pc, #136] ; (8003554 ) 80034ca: 429c cmp r4, r3 80034cc: d101 bne.n 80034d2 80034ce: 68b4 ldr r4, [r6, #8] 80034d0: e7a8 b.n 8003424 80034d2: 4b21 ldr r3, [pc, #132] ; (8003558 ) 80034d4: 429c cmp r4, r3 80034d6: bf08 it eq 80034d8: 68f4 ldreq r4, [r6, #12] 80034da: e7a3 b.n 8003424 80034dc: 2f00 cmp r7, #0 80034de: d0d8 beq.n 8003492 80034e0: 69b3 ldr r3, [r6, #24] 80034e2: b913 cbnz r3, 80034ea 80034e4: 4630 mov r0, r6 80034e6: f000 f9eb bl 80038c0 <__sinit> 80034ea: f1b8 0f01 cmp.w r8, #1 80034ee: bf08 it eq 80034f0: 89a3 ldrheq r3, [r4, #12] 80034f2: 6027 str r7, [r4, #0] 80034f4: bf04 itt eq 80034f6: f043 0301 orreq.w r3, r3, #1 80034fa: 81a3 strheq r3, [r4, #12] 80034fc: 89a3 ldrh r3, [r4, #12] 80034fe: 6127 str r7, [r4, #16] 8003500: f013 0008 ands.w r0, r3, #8 8003504: 6165 str r5, [r4, #20] 8003506: d01b beq.n 8003540 8003508: f013 0001 ands.w r0, r3, #1 800350c: f04f 0300 mov.w r3, #0 8003510: bf1f itttt ne 8003512: 426d negne r5, r5 8003514: 60a3 strne r3, [r4, #8] 8003516: 61a5 strne r5, [r4, #24] 8003518: 4618 movne r0, r3 800351a: bf08 it eq 800351c: 60a5 streq r5, [r4, #8] 800351e: e7d0 b.n 80034c2 8003520: 4648 mov r0, r9 8003522: f000 fabb bl 8003a9c 8003526: 4607 mov r7, r0 8003528: 2800 cmp r0, #0 800352a: d0bc beq.n 80034a6 800352c: 89a3 ldrh r3, [r4, #12] 800352e: 464d mov r5, r9 8003530: f043 0380 orr.w r3, r3, #128 ; 0x80 8003534: 81a3 strh r3, [r4, #12] 8003536: e7d3 b.n 80034e0 8003538: 2000 movs r0, #0 800353a: e7b6 b.n 80034aa 800353c: 46a9 mov r9, r5 800353e: e7f5 b.n 800352c 8003540: 60a0 str r0, [r4, #8] 8003542: e7be b.n 80034c2 8003544: f04f 30ff mov.w r0, #4294967295 8003548: e7bb b.n 80034c2 800354a: bf00 nop 800354c: 2000000c .word 0x2000000c 8003550: 08004568 .word 0x08004568 8003554: 08004588 .word 0x08004588 8003558: 08004548 .word 0x08004548 0800355c <__swbuf_r>: 800355c: b5f8 push {r3, r4, r5, r6, r7, lr} 800355e: 460e mov r6, r1 8003560: 4614 mov r4, r2 8003562: 4605 mov r5, r0 8003564: b118 cbz r0, 800356e <__swbuf_r+0x12> 8003566: 6983 ldr r3, [r0, #24] 8003568: b90b cbnz r3, 800356e <__swbuf_r+0x12> 800356a: f000 f9a9 bl 80038c0 <__sinit> 800356e: 4b21 ldr r3, [pc, #132] ; (80035f4 <__swbuf_r+0x98>) 8003570: 429c cmp r4, r3 8003572: d12a bne.n 80035ca <__swbuf_r+0x6e> 8003574: 686c ldr r4, [r5, #4] 8003576: 69a3 ldr r3, [r4, #24] 8003578: 60a3 str r3, [r4, #8] 800357a: 89a3 ldrh r3, [r4, #12] 800357c: 071a lsls r2, r3, #28 800357e: d52e bpl.n 80035de <__swbuf_r+0x82> 8003580: 6923 ldr r3, [r4, #16] 8003582: b363 cbz r3, 80035de <__swbuf_r+0x82> 8003584: 6923 ldr r3, [r4, #16] 8003586: 6820 ldr r0, [r4, #0] 8003588: b2f6 uxtb r6, r6 800358a: 1ac0 subs r0, r0, r3 800358c: 6963 ldr r3, [r4, #20] 800358e: 4637 mov r7, r6 8003590: 4298 cmp r0, r3 8003592: db04 blt.n 800359e <__swbuf_r+0x42> 8003594: 4621 mov r1, r4 8003596: 4628 mov r0, r5 8003598: f000 f928 bl 80037ec <_fflush_r> 800359c: bb28 cbnz r0, 80035ea <__swbuf_r+0x8e> 800359e: 68a3 ldr r3, [r4, #8] 80035a0: 3001 adds r0, #1 80035a2: 3b01 subs r3, #1 80035a4: 60a3 str r3, [r4, #8] 80035a6: 6823 ldr r3, [r4, #0] 80035a8: 1c5a adds r2, r3, #1 80035aa: 6022 str r2, [r4, #0] 80035ac: 701e strb r6, [r3, #0] 80035ae: 6963 ldr r3, [r4, #20] 80035b0: 4298 cmp r0, r3 80035b2: d004 beq.n 80035be <__swbuf_r+0x62> 80035b4: 89a3 ldrh r3, [r4, #12] 80035b6: 07db lsls r3, r3, #31 80035b8: d519 bpl.n 80035ee <__swbuf_r+0x92> 80035ba: 2e0a cmp r6, #10 80035bc: d117 bne.n 80035ee <__swbuf_r+0x92> 80035be: 4621 mov r1, r4 80035c0: 4628 mov r0, r5 80035c2: f000 f913 bl 80037ec <_fflush_r> 80035c6: b190 cbz r0, 80035ee <__swbuf_r+0x92> 80035c8: e00f b.n 80035ea <__swbuf_r+0x8e> 80035ca: 4b0b ldr r3, [pc, #44] ; (80035f8 <__swbuf_r+0x9c>) 80035cc: 429c cmp r4, r3 80035ce: d101 bne.n 80035d4 <__swbuf_r+0x78> 80035d0: 68ac ldr r4, [r5, #8] 80035d2: e7d0 b.n 8003576 <__swbuf_r+0x1a> 80035d4: 4b09 ldr r3, [pc, #36] ; (80035fc <__swbuf_r+0xa0>) 80035d6: 429c cmp r4, r3 80035d8: bf08 it eq 80035da: 68ec ldreq r4, [r5, #12] 80035dc: e7cb b.n 8003576 <__swbuf_r+0x1a> 80035de: 4621 mov r1, r4 80035e0: 4628 mov r0, r5 80035e2: f000 f80d bl 8003600 <__swsetup_r> 80035e6: 2800 cmp r0, #0 80035e8: d0cc beq.n 8003584 <__swbuf_r+0x28> 80035ea: f04f 37ff mov.w r7, #4294967295 80035ee: 4638 mov r0, r7 80035f0: bdf8 pop {r3, r4, r5, r6, r7, pc} 80035f2: bf00 nop 80035f4: 08004568 .word 0x08004568 80035f8: 08004588 .word 0x08004588 80035fc: 08004548 .word 0x08004548 08003600 <__swsetup_r>: 8003600: 4b32 ldr r3, [pc, #200] ; (80036cc <__swsetup_r+0xcc>) 8003602: b570 push {r4, r5, r6, lr} 8003604: 681d ldr r5, [r3, #0] 8003606: 4606 mov r6, r0 8003608: 460c mov r4, r1 800360a: b125 cbz r5, 8003616 <__swsetup_r+0x16> 800360c: 69ab ldr r3, [r5, #24] 800360e: b913 cbnz r3, 8003616 <__swsetup_r+0x16> 8003610: 4628 mov r0, r5 8003612: f000 f955 bl 80038c0 <__sinit> 8003616: 4b2e ldr r3, [pc, #184] ; (80036d0 <__swsetup_r+0xd0>) 8003618: 429c cmp r4, r3 800361a: d10f bne.n 800363c <__swsetup_r+0x3c> 800361c: 686c ldr r4, [r5, #4] 800361e: f9b4 300c ldrsh.w r3, [r4, #12] 8003622: b29a uxth r2, r3 8003624: 0715 lsls r5, r2, #28 8003626: d42c bmi.n 8003682 <__swsetup_r+0x82> 8003628: 06d0 lsls r0, r2, #27 800362a: d411 bmi.n 8003650 <__swsetup_r+0x50> 800362c: 2209 movs r2, #9 800362e: 6032 str r2, [r6, #0] 8003630: f043 0340 orr.w r3, r3, #64 ; 0x40 8003634: 81a3 strh r3, [r4, #12] 8003636: f04f 30ff mov.w r0, #4294967295 800363a: bd70 pop {r4, r5, r6, pc} 800363c: 4b25 ldr r3, [pc, #148] ; (80036d4 <__swsetup_r+0xd4>) 800363e: 429c cmp r4, r3 8003640: d101 bne.n 8003646 <__swsetup_r+0x46> 8003642: 68ac ldr r4, [r5, #8] 8003644: e7eb b.n 800361e <__swsetup_r+0x1e> 8003646: 4b24 ldr r3, [pc, #144] ; (80036d8 <__swsetup_r+0xd8>) 8003648: 429c cmp r4, r3 800364a: bf08 it eq 800364c: 68ec ldreq r4, [r5, #12] 800364e: e7e6 b.n 800361e <__swsetup_r+0x1e> 8003650: 0751 lsls r1, r2, #29 8003652: d512 bpl.n 800367a <__swsetup_r+0x7a> 8003654: 6b61 ldr r1, [r4, #52] ; 0x34 8003656: b141 cbz r1, 800366a <__swsetup_r+0x6a> 8003658: f104 0344 add.w r3, r4, #68 ; 0x44 800365c: 4299 cmp r1, r3 800365e: d002 beq.n 8003666 <__swsetup_r+0x66> 8003660: 4630 mov r0, r6 8003662: f000 fa23 bl 8003aac <_free_r> 8003666: 2300 movs r3, #0 8003668: 6363 str r3, [r4, #52] ; 0x34 800366a: 89a3 ldrh r3, [r4, #12] 800366c: f023 0324 bic.w r3, r3, #36 ; 0x24 8003670: 81a3 strh r3, [r4, #12] 8003672: 2300 movs r3, #0 8003674: 6063 str r3, [r4, #4] 8003676: 6923 ldr r3, [r4, #16] 8003678: 6023 str r3, [r4, #0] 800367a: 89a3 ldrh r3, [r4, #12] 800367c: f043 0308 orr.w r3, r3, #8 8003680: 81a3 strh r3, [r4, #12] 8003682: 6923 ldr r3, [r4, #16] 8003684: b94b cbnz r3, 800369a <__swsetup_r+0x9a> 8003686: 89a3 ldrh r3, [r4, #12] 8003688: f403 7320 and.w r3, r3, #640 ; 0x280 800368c: f5b3 7f00 cmp.w r3, #512 ; 0x200 8003690: d003 beq.n 800369a <__swsetup_r+0x9a> 8003692: 4621 mov r1, r4 8003694: 4630 mov r0, r6 8003696: f000 f9c1 bl 8003a1c <__smakebuf_r> 800369a: 89a2 ldrh r2, [r4, #12] 800369c: f012 0301 ands.w r3, r2, #1 80036a0: d00c beq.n 80036bc <__swsetup_r+0xbc> 80036a2: 2300 movs r3, #0 80036a4: 60a3 str r3, [r4, #8] 80036a6: 6963 ldr r3, [r4, #20] 80036a8: 425b negs r3, r3 80036aa: 61a3 str r3, [r4, #24] 80036ac: 6923 ldr r3, [r4, #16] 80036ae: b953 cbnz r3, 80036c6 <__swsetup_r+0xc6> 80036b0: f9b4 300c ldrsh.w r3, [r4, #12] 80036b4: f013 0080 ands.w r0, r3, #128 ; 0x80 80036b8: d1ba bne.n 8003630 <__swsetup_r+0x30> 80036ba: bd70 pop {r4, r5, r6, pc} 80036bc: 0792 lsls r2, r2, #30 80036be: bf58 it pl 80036c0: 6963 ldrpl r3, [r4, #20] 80036c2: 60a3 str r3, [r4, #8] 80036c4: e7f2 b.n 80036ac <__swsetup_r+0xac> 80036c6: 2000 movs r0, #0 80036c8: e7f7 b.n 80036ba <__swsetup_r+0xba> 80036ca: bf00 nop 80036cc: 2000000c .word 0x2000000c 80036d0: 08004568 .word 0x08004568 80036d4: 08004588 .word 0x08004588 80036d8: 08004548 .word 0x08004548 080036dc <__sflush_r>: 80036dc: 898a ldrh r2, [r1, #12] 80036de: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80036e2: 4605 mov r5, r0 80036e4: 0710 lsls r0, r2, #28 80036e6: 460c mov r4, r1 80036e8: d45a bmi.n 80037a0 <__sflush_r+0xc4> 80036ea: 684b ldr r3, [r1, #4] 80036ec: 2b00 cmp r3, #0 80036ee: dc05 bgt.n 80036fc <__sflush_r+0x20> 80036f0: 6c0b ldr r3, [r1, #64] ; 0x40 80036f2: 2b00 cmp r3, #0 80036f4: dc02 bgt.n 80036fc <__sflush_r+0x20> 80036f6: 2000 movs r0, #0 80036f8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80036fc: 6ae6 ldr r6, [r4, #44] ; 0x2c 80036fe: 2e00 cmp r6, #0 8003700: d0f9 beq.n 80036f6 <__sflush_r+0x1a> 8003702: 2300 movs r3, #0 8003704: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8003708: 682f ldr r7, [r5, #0] 800370a: 602b str r3, [r5, #0] 800370c: d033 beq.n 8003776 <__sflush_r+0x9a> 800370e: 6d60 ldr r0, [r4, #84] ; 0x54 8003710: 89a3 ldrh r3, [r4, #12] 8003712: 075a lsls r2, r3, #29 8003714: d505 bpl.n 8003722 <__sflush_r+0x46> 8003716: 6863 ldr r3, [r4, #4] 8003718: 1ac0 subs r0, r0, r3 800371a: 6b63 ldr r3, [r4, #52] ; 0x34 800371c: b10b cbz r3, 8003722 <__sflush_r+0x46> 800371e: 6c23 ldr r3, [r4, #64] ; 0x40 8003720: 1ac0 subs r0, r0, r3 8003722: 2300 movs r3, #0 8003724: 4602 mov r2, r0 8003726: 6ae6 ldr r6, [r4, #44] ; 0x2c 8003728: 6a21 ldr r1, [r4, #32] 800372a: 4628 mov r0, r5 800372c: 47b0 blx r6 800372e: 1c43 adds r3, r0, #1 8003730: 89a3 ldrh r3, [r4, #12] 8003732: d106 bne.n 8003742 <__sflush_r+0x66> 8003734: 6829 ldr r1, [r5, #0] 8003736: 291d cmp r1, #29 8003738: d84b bhi.n 80037d2 <__sflush_r+0xf6> 800373a: 4a2b ldr r2, [pc, #172] ; (80037e8 <__sflush_r+0x10c>) 800373c: 40ca lsrs r2, r1 800373e: 07d6 lsls r6, r2, #31 8003740: d547 bpl.n 80037d2 <__sflush_r+0xf6> 8003742: 2200 movs r2, #0 8003744: 6062 str r2, [r4, #4] 8003746: 6922 ldr r2, [r4, #16] 8003748: 04d9 lsls r1, r3, #19 800374a: 6022 str r2, [r4, #0] 800374c: d504 bpl.n 8003758 <__sflush_r+0x7c> 800374e: 1c42 adds r2, r0, #1 8003750: d101 bne.n 8003756 <__sflush_r+0x7a> 8003752: 682b ldr r3, [r5, #0] 8003754: b903 cbnz r3, 8003758 <__sflush_r+0x7c> 8003756: 6560 str r0, [r4, #84] ; 0x54 8003758: 6b61 ldr r1, [r4, #52] ; 0x34 800375a: 602f str r7, [r5, #0] 800375c: 2900 cmp r1, #0 800375e: d0ca beq.n 80036f6 <__sflush_r+0x1a> 8003760: f104 0344 add.w r3, r4, #68 ; 0x44 8003764: 4299 cmp r1, r3 8003766: d002 beq.n 800376e <__sflush_r+0x92> 8003768: 4628 mov r0, r5 800376a: f000 f99f bl 8003aac <_free_r> 800376e: 2000 movs r0, #0 8003770: 6360 str r0, [r4, #52] ; 0x34 8003772: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8003776: 6a21 ldr r1, [r4, #32] 8003778: 2301 movs r3, #1 800377a: 4628 mov r0, r5 800377c: 47b0 blx r6 800377e: 1c41 adds r1, r0, #1 8003780: d1c6 bne.n 8003710 <__sflush_r+0x34> 8003782: 682b ldr r3, [r5, #0] 8003784: 2b00 cmp r3, #0 8003786: d0c3 beq.n 8003710 <__sflush_r+0x34> 8003788: 2b1d cmp r3, #29 800378a: d001 beq.n 8003790 <__sflush_r+0xb4> 800378c: 2b16 cmp r3, #22 800378e: d101 bne.n 8003794 <__sflush_r+0xb8> 8003790: 602f str r7, [r5, #0] 8003792: e7b0 b.n 80036f6 <__sflush_r+0x1a> 8003794: 89a3 ldrh r3, [r4, #12] 8003796: f043 0340 orr.w r3, r3, #64 ; 0x40 800379a: 81a3 strh r3, [r4, #12] 800379c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80037a0: 690f ldr r7, [r1, #16] 80037a2: 2f00 cmp r7, #0 80037a4: d0a7 beq.n 80036f6 <__sflush_r+0x1a> 80037a6: 0793 lsls r3, r2, #30 80037a8: bf18 it ne 80037aa: 2300 movne r3, #0 80037ac: 680e ldr r6, [r1, #0] 80037ae: bf08 it eq 80037b0: 694b ldreq r3, [r1, #20] 80037b2: eba6 0807 sub.w r8, r6, r7 80037b6: 600f str r7, [r1, #0] 80037b8: 608b str r3, [r1, #8] 80037ba: f1b8 0f00 cmp.w r8, #0 80037be: dd9a ble.n 80036f6 <__sflush_r+0x1a> 80037c0: 4643 mov r3, r8 80037c2: 463a mov r2, r7 80037c4: 6a21 ldr r1, [r4, #32] 80037c6: 4628 mov r0, r5 80037c8: 6aa6 ldr r6, [r4, #40] ; 0x28 80037ca: 47b0 blx r6 80037cc: 2800 cmp r0, #0 80037ce: dc07 bgt.n 80037e0 <__sflush_r+0x104> 80037d0: 89a3 ldrh r3, [r4, #12] 80037d2: f043 0340 orr.w r3, r3, #64 ; 0x40 80037d6: 81a3 strh r3, [r4, #12] 80037d8: f04f 30ff mov.w r0, #4294967295 80037dc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80037e0: 4407 add r7, r0 80037e2: eba8 0800 sub.w r8, r8, r0 80037e6: e7e8 b.n 80037ba <__sflush_r+0xde> 80037e8: 20400001 .word 0x20400001 080037ec <_fflush_r>: 80037ec: b538 push {r3, r4, r5, lr} 80037ee: 690b ldr r3, [r1, #16] 80037f0: 4605 mov r5, r0 80037f2: 460c mov r4, r1 80037f4: b1db cbz r3, 800382e <_fflush_r+0x42> 80037f6: b118 cbz r0, 8003800 <_fflush_r+0x14> 80037f8: 6983 ldr r3, [r0, #24] 80037fa: b90b cbnz r3, 8003800 <_fflush_r+0x14> 80037fc: f000 f860 bl 80038c0 <__sinit> 8003800: 4b0c ldr r3, [pc, #48] ; (8003834 <_fflush_r+0x48>) 8003802: 429c cmp r4, r3 8003804: d109 bne.n 800381a <_fflush_r+0x2e> 8003806: 686c ldr r4, [r5, #4] 8003808: f9b4 300c ldrsh.w r3, [r4, #12] 800380c: b17b cbz r3, 800382e <_fflush_r+0x42> 800380e: 4621 mov r1, r4 8003810: 4628 mov r0, r5 8003812: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8003816: f7ff bf61 b.w 80036dc <__sflush_r> 800381a: 4b07 ldr r3, [pc, #28] ; (8003838 <_fflush_r+0x4c>) 800381c: 429c cmp r4, r3 800381e: d101 bne.n 8003824 <_fflush_r+0x38> 8003820: 68ac ldr r4, [r5, #8] 8003822: e7f1 b.n 8003808 <_fflush_r+0x1c> 8003824: 4b05 ldr r3, [pc, #20] ; (800383c <_fflush_r+0x50>) 8003826: 429c cmp r4, r3 8003828: bf08 it eq 800382a: 68ec ldreq r4, [r5, #12] 800382c: e7ec b.n 8003808 <_fflush_r+0x1c> 800382e: 2000 movs r0, #0 8003830: bd38 pop {r3, r4, r5, pc} 8003832: bf00 nop 8003834: 08004568 .word 0x08004568 8003838: 08004588 .word 0x08004588 800383c: 08004548 .word 0x08004548 08003840 <_cleanup_r>: 8003840: 4901 ldr r1, [pc, #4] ; (8003848 <_cleanup_r+0x8>) 8003842: f000 b8a9 b.w 8003998 <_fwalk_reent> 8003846: bf00 nop 8003848: 080037ed .word 0x080037ed 0800384c : 800384c: 2300 movs r3, #0 800384e: b510 push {r4, lr} 8003850: 4604 mov r4, r0 8003852: 6003 str r3, [r0, #0] 8003854: 6043 str r3, [r0, #4] 8003856: 6083 str r3, [r0, #8] 8003858: 8181 strh r1, [r0, #12] 800385a: 6643 str r3, [r0, #100] ; 0x64 800385c: 81c2 strh r2, [r0, #14] 800385e: 6103 str r3, [r0, #16] 8003860: 6143 str r3, [r0, #20] 8003862: 6183 str r3, [r0, #24] 8003864: 4619 mov r1, r3 8003866: 2208 movs r2, #8 8003868: 305c adds r0, #92 ; 0x5c 800386a: f7ff fd3d bl 80032e8 800386e: 4b05 ldr r3, [pc, #20] ; (8003884 ) 8003870: 6224 str r4, [r4, #32] 8003872: 6263 str r3, [r4, #36] ; 0x24 8003874: 4b04 ldr r3, [pc, #16] ; (8003888 ) 8003876: 62a3 str r3, [r4, #40] ; 0x28 8003878: 4b04 ldr r3, [pc, #16] ; (800388c ) 800387a: 62e3 str r3, [r4, #44] ; 0x2c 800387c: 4b04 ldr r3, [pc, #16] ; (8003890 ) 800387e: 6323 str r3, [r4, #48] ; 0x30 8003880: bd10 pop {r4, pc} 8003882: bf00 nop 8003884: 080041cd .word 0x080041cd 8003888: 080041ef .word 0x080041ef 800388c: 08004227 .word 0x08004227 8003890: 0800424b .word 0x0800424b 08003894 <__sfmoreglue>: 8003894: b570 push {r4, r5, r6, lr} 8003896: 2568 movs r5, #104 ; 0x68 8003898: 1e4a subs r2, r1, #1 800389a: 4355 muls r5, r2 800389c: 460e mov r6, r1 800389e: f105 0174 add.w r1, r5, #116 ; 0x74 80038a2: f000 f94f bl 8003b44 <_malloc_r> 80038a6: 4604 mov r4, r0 80038a8: b140 cbz r0, 80038bc <__sfmoreglue+0x28> 80038aa: 2100 movs r1, #0 80038ac: e880 0042 stmia.w r0, {r1, r6} 80038b0: 300c adds r0, #12 80038b2: 60a0 str r0, [r4, #8] 80038b4: f105 0268 add.w r2, r5, #104 ; 0x68 80038b8: f7ff fd16 bl 80032e8 80038bc: 4620 mov r0, r4 80038be: bd70 pop {r4, r5, r6, pc} 080038c0 <__sinit>: 80038c0: 6983 ldr r3, [r0, #24] 80038c2: b510 push {r4, lr} 80038c4: 4604 mov r4, r0 80038c6: bb33 cbnz r3, 8003916 <__sinit+0x56> 80038c8: 6483 str r3, [r0, #72] ; 0x48 80038ca: 64c3 str r3, [r0, #76] ; 0x4c 80038cc: 6503 str r3, [r0, #80] ; 0x50 80038ce: 4b12 ldr r3, [pc, #72] ; (8003918 <__sinit+0x58>) 80038d0: 4a12 ldr r2, [pc, #72] ; (800391c <__sinit+0x5c>) 80038d2: 681b ldr r3, [r3, #0] 80038d4: 6282 str r2, [r0, #40] ; 0x28 80038d6: 4298 cmp r0, r3 80038d8: bf04 itt eq 80038da: 2301 moveq r3, #1 80038dc: 6183 streq r3, [r0, #24] 80038de: f000 f81f bl 8003920 <__sfp> 80038e2: 6060 str r0, [r4, #4] 80038e4: 4620 mov r0, r4 80038e6: f000 f81b bl 8003920 <__sfp> 80038ea: 60a0 str r0, [r4, #8] 80038ec: 4620 mov r0, r4 80038ee: f000 f817 bl 8003920 <__sfp> 80038f2: 2200 movs r2, #0 80038f4: 60e0 str r0, [r4, #12] 80038f6: 2104 movs r1, #4 80038f8: 6860 ldr r0, [r4, #4] 80038fa: f7ff ffa7 bl 800384c 80038fe: 2201 movs r2, #1 8003900: 2109 movs r1, #9 8003902: 68a0 ldr r0, [r4, #8] 8003904: f7ff ffa2 bl 800384c 8003908: 2202 movs r2, #2 800390a: 2112 movs r1, #18 800390c: 68e0 ldr r0, [r4, #12] 800390e: f7ff ff9d bl 800384c 8003912: 2301 movs r3, #1 8003914: 61a3 str r3, [r4, #24] 8003916: bd10 pop {r4, pc} 8003918: 08004544 .word 0x08004544 800391c: 08003841 .word 0x08003841 08003920 <__sfp>: 8003920: b5f8 push {r3, r4, r5, r6, r7, lr} 8003922: 4b1c ldr r3, [pc, #112] ; (8003994 <__sfp+0x74>) 8003924: 4607 mov r7, r0 8003926: 681e ldr r6, [r3, #0] 8003928: 69b3 ldr r3, [r6, #24] 800392a: b913 cbnz r3, 8003932 <__sfp+0x12> 800392c: 4630 mov r0, r6 800392e: f7ff ffc7 bl 80038c0 <__sinit> 8003932: 3648 adds r6, #72 ; 0x48 8003934: 68b4 ldr r4, [r6, #8] 8003936: 6873 ldr r3, [r6, #4] 8003938: 3b01 subs r3, #1 800393a: d503 bpl.n 8003944 <__sfp+0x24> 800393c: 6833 ldr r3, [r6, #0] 800393e: b133 cbz r3, 800394e <__sfp+0x2e> 8003940: 6836 ldr r6, [r6, #0] 8003942: e7f7 b.n 8003934 <__sfp+0x14> 8003944: f9b4 500c ldrsh.w r5, [r4, #12] 8003948: b16d cbz r5, 8003966 <__sfp+0x46> 800394a: 3468 adds r4, #104 ; 0x68 800394c: e7f4 b.n 8003938 <__sfp+0x18> 800394e: 2104 movs r1, #4 8003950: 4638 mov r0, r7 8003952: f7ff ff9f bl 8003894 <__sfmoreglue> 8003956: 6030 str r0, [r6, #0] 8003958: 2800 cmp r0, #0 800395a: d1f1 bne.n 8003940 <__sfp+0x20> 800395c: 230c movs r3, #12 800395e: 4604 mov r4, r0 8003960: 603b str r3, [r7, #0] 8003962: 4620 mov r0, r4 8003964: bdf8 pop {r3, r4, r5, r6, r7, pc} 8003966: f64f 73ff movw r3, #65535 ; 0xffff 800396a: 81e3 strh r3, [r4, #14] 800396c: 2301 movs r3, #1 800396e: 6665 str r5, [r4, #100] ; 0x64 8003970: 81a3 strh r3, [r4, #12] 8003972: 6025 str r5, [r4, #0] 8003974: 60a5 str r5, [r4, #8] 8003976: 6065 str r5, [r4, #4] 8003978: 6125 str r5, [r4, #16] 800397a: 6165 str r5, [r4, #20] 800397c: 61a5 str r5, [r4, #24] 800397e: 2208 movs r2, #8 8003980: 4629 mov r1, r5 8003982: f104 005c add.w r0, r4, #92 ; 0x5c 8003986: f7ff fcaf bl 80032e8 800398a: 6365 str r5, [r4, #52] ; 0x34 800398c: 63a5 str r5, [r4, #56] ; 0x38 800398e: 64a5 str r5, [r4, #72] ; 0x48 8003990: 64e5 str r5, [r4, #76] ; 0x4c 8003992: e7e6 b.n 8003962 <__sfp+0x42> 8003994: 08004544 .word 0x08004544 08003998 <_fwalk_reent>: 8003998: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800399c: 4680 mov r8, r0 800399e: 4689 mov r9, r1 80039a0: 2600 movs r6, #0 80039a2: f100 0448 add.w r4, r0, #72 ; 0x48 80039a6: b914 cbnz r4, 80039ae <_fwalk_reent+0x16> 80039a8: 4630 mov r0, r6 80039aa: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 80039ae: 68a5 ldr r5, [r4, #8] 80039b0: 6867 ldr r7, [r4, #4] 80039b2: 3f01 subs r7, #1 80039b4: d501 bpl.n 80039ba <_fwalk_reent+0x22> 80039b6: 6824 ldr r4, [r4, #0] 80039b8: e7f5 b.n 80039a6 <_fwalk_reent+0xe> 80039ba: 89ab ldrh r3, [r5, #12] 80039bc: 2b01 cmp r3, #1 80039be: d907 bls.n 80039d0 <_fwalk_reent+0x38> 80039c0: f9b5 300e ldrsh.w r3, [r5, #14] 80039c4: 3301 adds r3, #1 80039c6: d003 beq.n 80039d0 <_fwalk_reent+0x38> 80039c8: 4629 mov r1, r5 80039ca: 4640 mov r0, r8 80039cc: 47c8 blx r9 80039ce: 4306 orrs r6, r0 80039d0: 3568 adds r5, #104 ; 0x68 80039d2: e7ee b.n 80039b2 <_fwalk_reent+0x1a> 080039d4 <__swhatbuf_r>: 80039d4: b570 push {r4, r5, r6, lr} 80039d6: 460e mov r6, r1 80039d8: f9b1 100e ldrsh.w r1, [r1, #14] 80039dc: b090 sub sp, #64 ; 0x40 80039de: 2900 cmp r1, #0 80039e0: 4614 mov r4, r2 80039e2: 461d mov r5, r3 80039e4: da07 bge.n 80039f6 <__swhatbuf_r+0x22> 80039e6: 2300 movs r3, #0 80039e8: 602b str r3, [r5, #0] 80039ea: 89b3 ldrh r3, [r6, #12] 80039ec: 061a lsls r2, r3, #24 80039ee: d410 bmi.n 8003a12 <__swhatbuf_r+0x3e> 80039f0: f44f 6380 mov.w r3, #1024 ; 0x400 80039f4: e00e b.n 8003a14 <__swhatbuf_r+0x40> 80039f6: aa01 add r2, sp, #4 80039f8: f000 fc4e bl 8004298 <_fstat_r> 80039fc: 2800 cmp r0, #0 80039fe: dbf2 blt.n 80039e6 <__swhatbuf_r+0x12> 8003a00: 9a02 ldr r2, [sp, #8] 8003a02: f402 4270 and.w r2, r2, #61440 ; 0xf000 8003a06: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8003a0a: 425a negs r2, r3 8003a0c: 415a adcs r2, r3 8003a0e: 602a str r2, [r5, #0] 8003a10: e7ee b.n 80039f0 <__swhatbuf_r+0x1c> 8003a12: 2340 movs r3, #64 ; 0x40 8003a14: 2000 movs r0, #0 8003a16: 6023 str r3, [r4, #0] 8003a18: b010 add sp, #64 ; 0x40 8003a1a: bd70 pop {r4, r5, r6, pc} 08003a1c <__smakebuf_r>: 8003a1c: 898b ldrh r3, [r1, #12] 8003a1e: b573 push {r0, r1, r4, r5, r6, lr} 8003a20: 079d lsls r5, r3, #30 8003a22: 4606 mov r6, r0 8003a24: 460c mov r4, r1 8003a26: d507 bpl.n 8003a38 <__smakebuf_r+0x1c> 8003a28: f104 0347 add.w r3, r4, #71 ; 0x47 8003a2c: 6023 str r3, [r4, #0] 8003a2e: 6123 str r3, [r4, #16] 8003a30: 2301 movs r3, #1 8003a32: 6163 str r3, [r4, #20] 8003a34: b002 add sp, #8 8003a36: bd70 pop {r4, r5, r6, pc} 8003a38: ab01 add r3, sp, #4 8003a3a: 466a mov r2, sp 8003a3c: f7ff ffca bl 80039d4 <__swhatbuf_r> 8003a40: 9900 ldr r1, [sp, #0] 8003a42: 4605 mov r5, r0 8003a44: 4630 mov r0, r6 8003a46: f000 f87d bl 8003b44 <_malloc_r> 8003a4a: b948 cbnz r0, 8003a60 <__smakebuf_r+0x44> 8003a4c: f9b4 300c ldrsh.w r3, [r4, #12] 8003a50: 059a lsls r2, r3, #22 8003a52: d4ef bmi.n 8003a34 <__smakebuf_r+0x18> 8003a54: f023 0303 bic.w r3, r3, #3 8003a58: f043 0302 orr.w r3, r3, #2 8003a5c: 81a3 strh r3, [r4, #12] 8003a5e: e7e3 b.n 8003a28 <__smakebuf_r+0xc> 8003a60: 4b0d ldr r3, [pc, #52] ; (8003a98 <__smakebuf_r+0x7c>) 8003a62: 62b3 str r3, [r6, #40] ; 0x28 8003a64: 89a3 ldrh r3, [r4, #12] 8003a66: 6020 str r0, [r4, #0] 8003a68: f043 0380 orr.w r3, r3, #128 ; 0x80 8003a6c: 81a3 strh r3, [r4, #12] 8003a6e: 9b00 ldr r3, [sp, #0] 8003a70: 6120 str r0, [r4, #16] 8003a72: 6163 str r3, [r4, #20] 8003a74: 9b01 ldr r3, [sp, #4] 8003a76: b15b cbz r3, 8003a90 <__smakebuf_r+0x74> 8003a78: f9b4 100e ldrsh.w r1, [r4, #14] 8003a7c: 4630 mov r0, r6 8003a7e: f000 fc1d bl 80042bc <_isatty_r> 8003a82: b128 cbz r0, 8003a90 <__smakebuf_r+0x74> 8003a84: 89a3 ldrh r3, [r4, #12] 8003a86: f023 0303 bic.w r3, r3, #3 8003a8a: f043 0301 orr.w r3, r3, #1 8003a8e: 81a3 strh r3, [r4, #12] 8003a90: 89a3 ldrh r3, [r4, #12] 8003a92: 431d orrs r5, r3 8003a94: 81a5 strh r5, [r4, #12] 8003a96: e7cd b.n 8003a34 <__smakebuf_r+0x18> 8003a98: 08003841 .word 0x08003841 08003a9c : 8003a9c: 4b02 ldr r3, [pc, #8] ; (8003aa8 ) 8003a9e: 4601 mov r1, r0 8003aa0: 6818 ldr r0, [r3, #0] 8003aa2: f000 b84f b.w 8003b44 <_malloc_r> 8003aa6: bf00 nop 8003aa8: 2000000c .word 0x2000000c 08003aac <_free_r>: 8003aac: b538 push {r3, r4, r5, lr} 8003aae: 4605 mov r5, r0 8003ab0: 2900 cmp r1, #0 8003ab2: d043 beq.n 8003b3c <_free_r+0x90> 8003ab4: f851 3c04 ldr.w r3, [r1, #-4] 8003ab8: 1f0c subs r4, r1, #4 8003aba: 2b00 cmp r3, #0 8003abc: bfb8 it lt 8003abe: 18e4 addlt r4, r4, r3 8003ac0: f000 fc2c bl 800431c <__malloc_lock> 8003ac4: 4a1e ldr r2, [pc, #120] ; (8003b40 <_free_r+0x94>) 8003ac6: 6813 ldr r3, [r2, #0] 8003ac8: 4610 mov r0, r2 8003aca: b933 cbnz r3, 8003ada <_free_r+0x2e> 8003acc: 6063 str r3, [r4, #4] 8003ace: 6014 str r4, [r2, #0] 8003ad0: 4628 mov r0, r5 8003ad2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8003ad6: f000 bc22 b.w 800431e <__malloc_unlock> 8003ada: 42a3 cmp r3, r4 8003adc: d90b bls.n 8003af6 <_free_r+0x4a> 8003ade: 6821 ldr r1, [r4, #0] 8003ae0: 1862 adds r2, r4, r1 8003ae2: 4293 cmp r3, r2 8003ae4: bf01 itttt eq 8003ae6: 681a ldreq r2, [r3, #0] 8003ae8: 685b ldreq r3, [r3, #4] 8003aea: 1852 addeq r2, r2, r1 8003aec: 6022 streq r2, [r4, #0] 8003aee: 6063 str r3, [r4, #4] 8003af0: 6004 str r4, [r0, #0] 8003af2: e7ed b.n 8003ad0 <_free_r+0x24> 8003af4: 4613 mov r3, r2 8003af6: 685a ldr r2, [r3, #4] 8003af8: b10a cbz r2, 8003afe <_free_r+0x52> 8003afa: 42a2 cmp r2, r4 8003afc: d9fa bls.n 8003af4 <_free_r+0x48> 8003afe: 6819 ldr r1, [r3, #0] 8003b00: 1858 adds r0, r3, r1 8003b02: 42a0 cmp r0, r4 8003b04: d10b bne.n 8003b1e <_free_r+0x72> 8003b06: 6820 ldr r0, [r4, #0] 8003b08: 4401 add r1, r0 8003b0a: 1858 adds r0, r3, r1 8003b0c: 4282 cmp r2, r0 8003b0e: 6019 str r1, [r3, #0] 8003b10: d1de bne.n 8003ad0 <_free_r+0x24> 8003b12: 6810 ldr r0, [r2, #0] 8003b14: 6852 ldr r2, [r2, #4] 8003b16: 4401 add r1, r0 8003b18: 6019 str r1, [r3, #0] 8003b1a: 605a str r2, [r3, #4] 8003b1c: e7d8 b.n 8003ad0 <_free_r+0x24> 8003b1e: d902 bls.n 8003b26 <_free_r+0x7a> 8003b20: 230c movs r3, #12 8003b22: 602b str r3, [r5, #0] 8003b24: e7d4 b.n 8003ad0 <_free_r+0x24> 8003b26: 6820 ldr r0, [r4, #0] 8003b28: 1821 adds r1, r4, r0 8003b2a: 428a cmp r2, r1 8003b2c: bf01 itttt eq 8003b2e: 6811 ldreq r1, [r2, #0] 8003b30: 6852 ldreq r2, [r2, #4] 8003b32: 1809 addeq r1, r1, r0 8003b34: 6021 streq r1, [r4, #0] 8003b36: 6062 str r2, [r4, #4] 8003b38: 605c str r4, [r3, #4] 8003b3a: e7c9 b.n 8003ad0 <_free_r+0x24> 8003b3c: bd38 pop {r3, r4, r5, pc} 8003b3e: bf00 nop 8003b40: 20000138 .word 0x20000138 08003b44 <_malloc_r>: 8003b44: b570 push {r4, r5, r6, lr} 8003b46: 1ccd adds r5, r1, #3 8003b48: f025 0503 bic.w r5, r5, #3 8003b4c: 3508 adds r5, #8 8003b4e: 2d0c cmp r5, #12 8003b50: bf38 it cc 8003b52: 250c movcc r5, #12 8003b54: 2d00 cmp r5, #0 8003b56: 4606 mov r6, r0 8003b58: db01 blt.n 8003b5e <_malloc_r+0x1a> 8003b5a: 42a9 cmp r1, r5 8003b5c: d903 bls.n 8003b66 <_malloc_r+0x22> 8003b5e: 230c movs r3, #12 8003b60: 6033 str r3, [r6, #0] 8003b62: 2000 movs r0, #0 8003b64: bd70 pop {r4, r5, r6, pc} 8003b66: f000 fbd9 bl 800431c <__malloc_lock> 8003b6a: 4a23 ldr r2, [pc, #140] ; (8003bf8 <_malloc_r+0xb4>) 8003b6c: 6814 ldr r4, [r2, #0] 8003b6e: 4621 mov r1, r4 8003b70: b991 cbnz r1, 8003b98 <_malloc_r+0x54> 8003b72: 4c22 ldr r4, [pc, #136] ; (8003bfc <_malloc_r+0xb8>) 8003b74: 6823 ldr r3, [r4, #0] 8003b76: b91b cbnz r3, 8003b80 <_malloc_r+0x3c> 8003b78: 4630 mov r0, r6 8003b7a: f000 fb17 bl 80041ac <_sbrk_r> 8003b7e: 6020 str r0, [r4, #0] 8003b80: 4629 mov r1, r5 8003b82: 4630 mov r0, r6 8003b84: f000 fb12 bl 80041ac <_sbrk_r> 8003b88: 1c43 adds r3, r0, #1 8003b8a: d126 bne.n 8003bda <_malloc_r+0x96> 8003b8c: 230c movs r3, #12 8003b8e: 4630 mov r0, r6 8003b90: 6033 str r3, [r6, #0] 8003b92: f000 fbc4 bl 800431e <__malloc_unlock> 8003b96: e7e4 b.n 8003b62 <_malloc_r+0x1e> 8003b98: 680b ldr r3, [r1, #0] 8003b9a: 1b5b subs r3, r3, r5 8003b9c: d41a bmi.n 8003bd4 <_malloc_r+0x90> 8003b9e: 2b0b cmp r3, #11 8003ba0: d90f bls.n 8003bc2 <_malloc_r+0x7e> 8003ba2: 600b str r3, [r1, #0] 8003ba4: 18cc adds r4, r1, r3 8003ba6: 50cd str r5, [r1, r3] 8003ba8: 4630 mov r0, r6 8003baa: f000 fbb8 bl 800431e <__malloc_unlock> 8003bae: f104 000b add.w r0, r4, #11 8003bb2: 1d23 adds r3, r4, #4 8003bb4: f020 0007 bic.w r0, r0, #7 8003bb8: 1ac3 subs r3, r0, r3 8003bba: d01b beq.n 8003bf4 <_malloc_r+0xb0> 8003bbc: 425a negs r2, r3 8003bbe: 50e2 str r2, [r4, r3] 8003bc0: bd70 pop {r4, r5, r6, pc} 8003bc2: 428c cmp r4, r1 8003bc4: bf0b itete eq 8003bc6: 6863 ldreq r3, [r4, #4] 8003bc8: 684b ldrne r3, [r1, #4] 8003bca: 6013 streq r3, [r2, #0] 8003bcc: 6063 strne r3, [r4, #4] 8003bce: bf18 it ne 8003bd0: 460c movne r4, r1 8003bd2: e7e9 b.n 8003ba8 <_malloc_r+0x64> 8003bd4: 460c mov r4, r1 8003bd6: 6849 ldr r1, [r1, #4] 8003bd8: e7ca b.n 8003b70 <_malloc_r+0x2c> 8003bda: 1cc4 adds r4, r0, #3 8003bdc: f024 0403 bic.w r4, r4, #3 8003be0: 42a0 cmp r0, r4 8003be2: d005 beq.n 8003bf0 <_malloc_r+0xac> 8003be4: 1a21 subs r1, r4, r0 8003be6: 4630 mov r0, r6 8003be8: f000 fae0 bl 80041ac <_sbrk_r> 8003bec: 3001 adds r0, #1 8003bee: d0cd beq.n 8003b8c <_malloc_r+0x48> 8003bf0: 6025 str r5, [r4, #0] 8003bf2: e7d9 b.n 8003ba8 <_malloc_r+0x64> 8003bf4: bd70 pop {r4, r5, r6, pc} 8003bf6: bf00 nop 8003bf8: 20000138 .word 0x20000138 8003bfc: 2000013c .word 0x2000013c 08003c00 <__sfputc_r>: 8003c00: 6893 ldr r3, [r2, #8] 8003c02: b410 push {r4} 8003c04: 3b01 subs r3, #1 8003c06: 2b00 cmp r3, #0 8003c08: 6093 str r3, [r2, #8] 8003c0a: da08 bge.n 8003c1e <__sfputc_r+0x1e> 8003c0c: 6994 ldr r4, [r2, #24] 8003c0e: 42a3 cmp r3, r4 8003c10: db02 blt.n 8003c18 <__sfputc_r+0x18> 8003c12: b2cb uxtb r3, r1 8003c14: 2b0a cmp r3, #10 8003c16: d102 bne.n 8003c1e <__sfputc_r+0x1e> 8003c18: bc10 pop {r4} 8003c1a: f7ff bc9f b.w 800355c <__swbuf_r> 8003c1e: 6813 ldr r3, [r2, #0] 8003c20: 1c58 adds r0, r3, #1 8003c22: 6010 str r0, [r2, #0] 8003c24: 7019 strb r1, [r3, #0] 8003c26: b2c8 uxtb r0, r1 8003c28: bc10 pop {r4} 8003c2a: 4770 bx lr 08003c2c <__sfputs_r>: 8003c2c: b5f8 push {r3, r4, r5, r6, r7, lr} 8003c2e: 4606 mov r6, r0 8003c30: 460f mov r7, r1 8003c32: 4614 mov r4, r2 8003c34: 18d5 adds r5, r2, r3 8003c36: 42ac cmp r4, r5 8003c38: d101 bne.n 8003c3e <__sfputs_r+0x12> 8003c3a: 2000 movs r0, #0 8003c3c: e007 b.n 8003c4e <__sfputs_r+0x22> 8003c3e: 463a mov r2, r7 8003c40: f814 1b01 ldrb.w r1, [r4], #1 8003c44: 4630 mov r0, r6 8003c46: f7ff ffdb bl 8003c00 <__sfputc_r> 8003c4a: 1c43 adds r3, r0, #1 8003c4c: d1f3 bne.n 8003c36 <__sfputs_r+0xa> 8003c4e: bdf8 pop {r3, r4, r5, r6, r7, pc} 08003c50 <_vfiprintf_r>: 8003c50: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8003c54: b09d sub sp, #116 ; 0x74 8003c56: 460c mov r4, r1 8003c58: 4617 mov r7, r2 8003c5a: 9303 str r3, [sp, #12] 8003c5c: 4606 mov r6, r0 8003c5e: b118 cbz r0, 8003c68 <_vfiprintf_r+0x18> 8003c60: 6983 ldr r3, [r0, #24] 8003c62: b90b cbnz r3, 8003c68 <_vfiprintf_r+0x18> 8003c64: f7ff fe2c bl 80038c0 <__sinit> 8003c68: 4b7c ldr r3, [pc, #496] ; (8003e5c <_vfiprintf_r+0x20c>) 8003c6a: 429c cmp r4, r3 8003c6c: d157 bne.n 8003d1e <_vfiprintf_r+0xce> 8003c6e: 6874 ldr r4, [r6, #4] 8003c70: 89a3 ldrh r3, [r4, #12] 8003c72: 0718 lsls r0, r3, #28 8003c74: d55d bpl.n 8003d32 <_vfiprintf_r+0xe2> 8003c76: 6923 ldr r3, [r4, #16] 8003c78: 2b00 cmp r3, #0 8003c7a: d05a beq.n 8003d32 <_vfiprintf_r+0xe2> 8003c7c: 2300 movs r3, #0 8003c7e: 9309 str r3, [sp, #36] ; 0x24 8003c80: 2320 movs r3, #32 8003c82: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8003c86: 2330 movs r3, #48 ; 0x30 8003c88: f04f 0b01 mov.w fp, #1 8003c8c: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8003c90: 46b8 mov r8, r7 8003c92: 4645 mov r5, r8 8003c94: f815 3b01 ldrb.w r3, [r5], #1 8003c98: 2b00 cmp r3, #0 8003c9a: d155 bne.n 8003d48 <_vfiprintf_r+0xf8> 8003c9c: ebb8 0a07 subs.w sl, r8, r7 8003ca0: d00b beq.n 8003cba <_vfiprintf_r+0x6a> 8003ca2: 4653 mov r3, sl 8003ca4: 463a mov r2, r7 8003ca6: 4621 mov r1, r4 8003ca8: 4630 mov r0, r6 8003caa: f7ff ffbf bl 8003c2c <__sfputs_r> 8003cae: 3001 adds r0, #1 8003cb0: f000 80c4 beq.w 8003e3c <_vfiprintf_r+0x1ec> 8003cb4: 9b09 ldr r3, [sp, #36] ; 0x24 8003cb6: 4453 add r3, sl 8003cb8: 9309 str r3, [sp, #36] ; 0x24 8003cba: f898 3000 ldrb.w r3, [r8] 8003cbe: 2b00 cmp r3, #0 8003cc0: f000 80bc beq.w 8003e3c <_vfiprintf_r+0x1ec> 8003cc4: 2300 movs r3, #0 8003cc6: f04f 32ff mov.w r2, #4294967295 8003cca: 9304 str r3, [sp, #16] 8003ccc: 9307 str r3, [sp, #28] 8003cce: 9205 str r2, [sp, #20] 8003cd0: 9306 str r3, [sp, #24] 8003cd2: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8003cd6: 931a str r3, [sp, #104] ; 0x68 8003cd8: 2205 movs r2, #5 8003cda: 7829 ldrb r1, [r5, #0] 8003cdc: 4860 ldr r0, [pc, #384] ; (8003e60 <_vfiprintf_r+0x210>) 8003cde: f000 fb0f bl 8004300 8003ce2: f105 0801 add.w r8, r5, #1 8003ce6: 9b04 ldr r3, [sp, #16] 8003ce8: 2800 cmp r0, #0 8003cea: d131 bne.n 8003d50 <_vfiprintf_r+0x100> 8003cec: 06d9 lsls r1, r3, #27 8003cee: bf44 itt mi 8003cf0: 2220 movmi r2, #32 8003cf2: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8003cf6: 071a lsls r2, r3, #28 8003cf8: bf44 itt mi 8003cfa: 222b movmi r2, #43 ; 0x2b 8003cfc: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53 8003d00: 782a ldrb r2, [r5, #0] 8003d02: 2a2a cmp r2, #42 ; 0x2a 8003d04: d02c beq.n 8003d60 <_vfiprintf_r+0x110> 8003d06: 2100 movs r1, #0 8003d08: 200a movs r0, #10 8003d0a: 9a07 ldr r2, [sp, #28] 8003d0c: 46a8 mov r8, r5 8003d0e: f898 3000 ldrb.w r3, [r8] 8003d12: 3501 adds r5, #1 8003d14: 3b30 subs r3, #48 ; 0x30 8003d16: 2b09 cmp r3, #9 8003d18: d96d bls.n 8003df6 <_vfiprintf_r+0x1a6> 8003d1a: b371 cbz r1, 8003d7a <_vfiprintf_r+0x12a> 8003d1c: e026 b.n 8003d6c <_vfiprintf_r+0x11c> 8003d1e: 4b51 ldr r3, [pc, #324] ; (8003e64 <_vfiprintf_r+0x214>) 8003d20: 429c cmp r4, r3 8003d22: d101 bne.n 8003d28 <_vfiprintf_r+0xd8> 8003d24: 68b4 ldr r4, [r6, #8] 8003d26: e7a3 b.n 8003c70 <_vfiprintf_r+0x20> 8003d28: 4b4f ldr r3, [pc, #316] ; (8003e68 <_vfiprintf_r+0x218>) 8003d2a: 429c cmp r4, r3 8003d2c: bf08 it eq 8003d2e: 68f4 ldreq r4, [r6, #12] 8003d30: e79e b.n 8003c70 <_vfiprintf_r+0x20> 8003d32: 4621 mov r1, r4 8003d34: 4630 mov r0, r6 8003d36: f7ff fc63 bl 8003600 <__swsetup_r> 8003d3a: 2800 cmp r0, #0 8003d3c: d09e beq.n 8003c7c <_vfiprintf_r+0x2c> 8003d3e: f04f 30ff mov.w r0, #4294967295 8003d42: b01d add sp, #116 ; 0x74 8003d44: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8003d48: 2b25 cmp r3, #37 ; 0x25 8003d4a: d0a7 beq.n 8003c9c <_vfiprintf_r+0x4c> 8003d4c: 46a8 mov r8, r5 8003d4e: e7a0 b.n 8003c92 <_vfiprintf_r+0x42> 8003d50: 4a43 ldr r2, [pc, #268] ; (8003e60 <_vfiprintf_r+0x210>) 8003d52: 4645 mov r5, r8 8003d54: 1a80 subs r0, r0, r2 8003d56: fa0b f000 lsl.w r0, fp, r0 8003d5a: 4318 orrs r0, r3 8003d5c: 9004 str r0, [sp, #16] 8003d5e: e7bb b.n 8003cd8 <_vfiprintf_r+0x88> 8003d60: 9a03 ldr r2, [sp, #12] 8003d62: 1d11 adds r1, r2, #4 8003d64: 6812 ldr r2, [r2, #0] 8003d66: 9103 str r1, [sp, #12] 8003d68: 2a00 cmp r2, #0 8003d6a: db01 blt.n 8003d70 <_vfiprintf_r+0x120> 8003d6c: 9207 str r2, [sp, #28] 8003d6e: e004 b.n 8003d7a <_vfiprintf_r+0x12a> 8003d70: 4252 negs r2, r2 8003d72: f043 0302 orr.w r3, r3, #2 8003d76: 9207 str r2, [sp, #28] 8003d78: 9304 str r3, [sp, #16] 8003d7a: f898 3000 ldrb.w r3, [r8] 8003d7e: 2b2e cmp r3, #46 ; 0x2e 8003d80: d110 bne.n 8003da4 <_vfiprintf_r+0x154> 8003d82: f898 3001 ldrb.w r3, [r8, #1] 8003d86: f108 0101 add.w r1, r8, #1 8003d8a: 2b2a cmp r3, #42 ; 0x2a 8003d8c: d137 bne.n 8003dfe <_vfiprintf_r+0x1ae> 8003d8e: 9b03 ldr r3, [sp, #12] 8003d90: f108 0802 add.w r8, r8, #2 8003d94: 1d1a adds r2, r3, #4 8003d96: 681b ldr r3, [r3, #0] 8003d98: 9203 str r2, [sp, #12] 8003d9a: 2b00 cmp r3, #0 8003d9c: bfb8 it lt 8003d9e: f04f 33ff movlt.w r3, #4294967295 8003da2: 9305 str r3, [sp, #20] 8003da4: 4d31 ldr r5, [pc, #196] ; (8003e6c <_vfiprintf_r+0x21c>) 8003da6: 2203 movs r2, #3 8003da8: f898 1000 ldrb.w r1, [r8] 8003dac: 4628 mov r0, r5 8003dae: f000 faa7 bl 8004300 8003db2: b140 cbz r0, 8003dc6 <_vfiprintf_r+0x176> 8003db4: 2340 movs r3, #64 ; 0x40 8003db6: 1b40 subs r0, r0, r5 8003db8: fa03 f000 lsl.w r0, r3, r0 8003dbc: 9b04 ldr r3, [sp, #16] 8003dbe: f108 0801 add.w r8, r8, #1 8003dc2: 4303 orrs r3, r0 8003dc4: 9304 str r3, [sp, #16] 8003dc6: f898 1000 ldrb.w r1, [r8] 8003dca: 2206 movs r2, #6 8003dcc: 4828 ldr r0, [pc, #160] ; (8003e70 <_vfiprintf_r+0x220>) 8003dce: f108 0701 add.w r7, r8, #1 8003dd2: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8003dd6: f000 fa93 bl 8004300 8003dda: 2800 cmp r0, #0 8003ddc: d034 beq.n 8003e48 <_vfiprintf_r+0x1f8> 8003dde: 4b25 ldr r3, [pc, #148] ; (8003e74 <_vfiprintf_r+0x224>) 8003de0: bb03 cbnz r3, 8003e24 <_vfiprintf_r+0x1d4> 8003de2: 9b03 ldr r3, [sp, #12] 8003de4: 3307 adds r3, #7 8003de6: f023 0307 bic.w r3, r3, #7 8003dea: 3308 adds r3, #8 8003dec: 9303 str r3, [sp, #12] 8003dee: 9b09 ldr r3, [sp, #36] ; 0x24 8003df0: 444b add r3, r9 8003df2: 9309 str r3, [sp, #36] ; 0x24 8003df4: e74c b.n 8003c90 <_vfiprintf_r+0x40> 8003df6: fb00 3202 mla r2, r0, r2, r3 8003dfa: 2101 movs r1, #1 8003dfc: e786 b.n 8003d0c <_vfiprintf_r+0xbc> 8003dfe: 2300 movs r3, #0 8003e00: 250a movs r5, #10 8003e02: 4618 mov r0, r3 8003e04: 9305 str r3, [sp, #20] 8003e06: 4688 mov r8, r1 8003e08: f898 2000 ldrb.w r2, [r8] 8003e0c: 3101 adds r1, #1 8003e0e: 3a30 subs r2, #48 ; 0x30 8003e10: 2a09 cmp r2, #9 8003e12: d903 bls.n 8003e1c <_vfiprintf_r+0x1cc> 8003e14: 2b00 cmp r3, #0 8003e16: d0c5 beq.n 8003da4 <_vfiprintf_r+0x154> 8003e18: 9005 str r0, [sp, #20] 8003e1a: e7c3 b.n 8003da4 <_vfiprintf_r+0x154> 8003e1c: fb05 2000 mla r0, r5, r0, r2 8003e20: 2301 movs r3, #1 8003e22: e7f0 b.n 8003e06 <_vfiprintf_r+0x1b6> 8003e24: ab03 add r3, sp, #12 8003e26: 9300 str r3, [sp, #0] 8003e28: 4622 mov r2, r4 8003e2a: 4b13 ldr r3, [pc, #76] ; (8003e78 <_vfiprintf_r+0x228>) 8003e2c: a904 add r1, sp, #16 8003e2e: 4630 mov r0, r6 8003e30: f3af 8000 nop.w 8003e34: f1b0 3fff cmp.w r0, #4294967295 8003e38: 4681 mov r9, r0 8003e3a: d1d8 bne.n 8003dee <_vfiprintf_r+0x19e> 8003e3c: 89a3 ldrh r3, [r4, #12] 8003e3e: 065b lsls r3, r3, #25 8003e40: f53f af7d bmi.w 8003d3e <_vfiprintf_r+0xee> 8003e44: 9809 ldr r0, [sp, #36] ; 0x24 8003e46: e77c b.n 8003d42 <_vfiprintf_r+0xf2> 8003e48: ab03 add r3, sp, #12 8003e4a: 9300 str r3, [sp, #0] 8003e4c: 4622 mov r2, r4 8003e4e: 4b0a ldr r3, [pc, #40] ; (8003e78 <_vfiprintf_r+0x228>) 8003e50: a904 add r1, sp, #16 8003e52: 4630 mov r0, r6 8003e54: f000 f88a bl 8003f6c <_printf_i> 8003e58: e7ec b.n 8003e34 <_vfiprintf_r+0x1e4> 8003e5a: bf00 nop 8003e5c: 08004568 .word 0x08004568 8003e60: 080045a8 .word 0x080045a8 8003e64: 08004588 .word 0x08004588 8003e68: 08004548 .word 0x08004548 8003e6c: 080045ae .word 0x080045ae 8003e70: 080045b2 .word 0x080045b2 8003e74: 00000000 .word 0x00000000 8003e78: 08003c2d .word 0x08003c2d 08003e7c <_printf_common>: 8003e7c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8003e80: 4691 mov r9, r2 8003e82: 461f mov r7, r3 8003e84: 688a ldr r2, [r1, #8] 8003e86: 690b ldr r3, [r1, #16] 8003e88: 4606 mov r6, r0 8003e8a: 4293 cmp r3, r2 8003e8c: bfb8 it lt 8003e8e: 4613 movlt r3, r2 8003e90: f8c9 3000 str.w r3, [r9] 8003e94: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8003e98: 460c mov r4, r1 8003e9a: f8dd 8020 ldr.w r8, [sp, #32] 8003e9e: b112 cbz r2, 8003ea6 <_printf_common+0x2a> 8003ea0: 3301 adds r3, #1 8003ea2: f8c9 3000 str.w r3, [r9] 8003ea6: 6823 ldr r3, [r4, #0] 8003ea8: 0699 lsls r1, r3, #26 8003eaa: bf42 ittt mi 8003eac: f8d9 3000 ldrmi.w r3, [r9] 8003eb0: 3302 addmi r3, #2 8003eb2: f8c9 3000 strmi.w r3, [r9] 8003eb6: 6825 ldr r5, [r4, #0] 8003eb8: f015 0506 ands.w r5, r5, #6 8003ebc: d107 bne.n 8003ece <_printf_common+0x52> 8003ebe: f104 0a19 add.w sl, r4, #25 8003ec2: 68e3 ldr r3, [r4, #12] 8003ec4: f8d9 2000 ldr.w r2, [r9] 8003ec8: 1a9b subs r3, r3, r2 8003eca: 429d cmp r5, r3 8003ecc: db2a blt.n 8003f24 <_printf_common+0xa8> 8003ece: f894 3043 ldrb.w r3, [r4, #67] ; 0x43 8003ed2: 6822 ldr r2, [r4, #0] 8003ed4: 3300 adds r3, #0 8003ed6: bf18 it ne 8003ed8: 2301 movne r3, #1 8003eda: 0692 lsls r2, r2, #26 8003edc: d42f bmi.n 8003f3e <_printf_common+0xc2> 8003ede: f104 0243 add.w r2, r4, #67 ; 0x43 8003ee2: 4639 mov r1, r7 8003ee4: 4630 mov r0, r6 8003ee6: 47c0 blx r8 8003ee8: 3001 adds r0, #1 8003eea: d022 beq.n 8003f32 <_printf_common+0xb6> 8003eec: 6823 ldr r3, [r4, #0] 8003eee: 68e5 ldr r5, [r4, #12] 8003ef0: f003 0306 and.w r3, r3, #6 8003ef4: 2b04 cmp r3, #4 8003ef6: bf18 it ne 8003ef8: 2500 movne r5, #0 8003efa: f8d9 2000 ldr.w r2, [r9] 8003efe: f04f 0900 mov.w r9, #0 8003f02: bf08 it eq 8003f04: 1aad subeq r5, r5, r2 8003f06: 68a3 ldr r3, [r4, #8] 8003f08: 6922 ldr r2, [r4, #16] 8003f0a: bf08 it eq 8003f0c: ea25 75e5 biceq.w r5, r5, r5, asr #31 8003f10: 4293 cmp r3, r2 8003f12: bfc4 itt gt 8003f14: 1a9b subgt r3, r3, r2 8003f16: 18ed addgt r5, r5, r3 8003f18: 341a adds r4, #26 8003f1a: 454d cmp r5, r9 8003f1c: d11b bne.n 8003f56 <_printf_common+0xda> 8003f1e: 2000 movs r0, #0 8003f20: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8003f24: 2301 movs r3, #1 8003f26: 4652 mov r2, sl 8003f28: 4639 mov r1, r7 8003f2a: 4630 mov r0, r6 8003f2c: 47c0 blx r8 8003f2e: 3001 adds r0, #1 8003f30: d103 bne.n 8003f3a <_printf_common+0xbe> 8003f32: f04f 30ff mov.w r0, #4294967295 8003f36: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8003f3a: 3501 adds r5, #1 8003f3c: e7c1 b.n 8003ec2 <_printf_common+0x46> 8003f3e: 2030 movs r0, #48 ; 0x30 8003f40: 18e1 adds r1, r4, r3 8003f42: f881 0043 strb.w r0, [r1, #67] ; 0x43 8003f46: 1c5a adds r2, r3, #1 8003f48: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8003f4c: 4422 add r2, r4 8003f4e: 3302 adds r3, #2 8003f50: f882 1043 strb.w r1, [r2, #67] ; 0x43 8003f54: e7c3 b.n 8003ede <_printf_common+0x62> 8003f56: 2301 movs r3, #1 8003f58: 4622 mov r2, r4 8003f5a: 4639 mov r1, r7 8003f5c: 4630 mov r0, r6 8003f5e: 47c0 blx r8 8003f60: 3001 adds r0, #1 8003f62: d0e6 beq.n 8003f32 <_printf_common+0xb6> 8003f64: f109 0901 add.w r9, r9, #1 8003f68: e7d7 b.n 8003f1a <_printf_common+0x9e> ... 08003f6c <_printf_i>: 8003f6c: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8003f70: 4617 mov r7, r2 8003f72: 7e0a ldrb r2, [r1, #24] 8003f74: b085 sub sp, #20 8003f76: 2a6e cmp r2, #110 ; 0x6e 8003f78: 4698 mov r8, r3 8003f7a: 4606 mov r6, r0 8003f7c: 460c mov r4, r1 8003f7e: 9b0c ldr r3, [sp, #48] ; 0x30 8003f80: f101 0e43 add.w lr, r1, #67 ; 0x43 8003f84: f000 80bc beq.w 8004100 <_printf_i+0x194> 8003f88: d81a bhi.n 8003fc0 <_printf_i+0x54> 8003f8a: 2a63 cmp r2, #99 ; 0x63 8003f8c: d02e beq.n 8003fec <_printf_i+0x80> 8003f8e: d80a bhi.n 8003fa6 <_printf_i+0x3a> 8003f90: 2a00 cmp r2, #0 8003f92: f000 80c8 beq.w 8004126 <_printf_i+0x1ba> 8003f96: 2a58 cmp r2, #88 ; 0x58 8003f98: f000 808a beq.w 80040b0 <_printf_i+0x144> 8003f9c: f104 0542 add.w r5, r4, #66 ; 0x42 8003fa0: f884 2042 strb.w r2, [r4, #66] ; 0x42 8003fa4: e02a b.n 8003ffc <_printf_i+0x90> 8003fa6: 2a64 cmp r2, #100 ; 0x64 8003fa8: d001 beq.n 8003fae <_printf_i+0x42> 8003faa: 2a69 cmp r2, #105 ; 0x69 8003fac: d1f6 bne.n 8003f9c <_printf_i+0x30> 8003fae: 6821 ldr r1, [r4, #0] 8003fb0: 681a ldr r2, [r3, #0] 8003fb2: f011 0f80 tst.w r1, #128 ; 0x80 8003fb6: d023 beq.n 8004000 <_printf_i+0x94> 8003fb8: 1d11 adds r1, r2, #4 8003fba: 6019 str r1, [r3, #0] 8003fbc: 6813 ldr r3, [r2, #0] 8003fbe: e027 b.n 8004010 <_printf_i+0xa4> 8003fc0: 2a73 cmp r2, #115 ; 0x73 8003fc2: f000 80b4 beq.w 800412e <_printf_i+0x1c2> 8003fc6: d808 bhi.n 8003fda <_printf_i+0x6e> 8003fc8: 2a6f cmp r2, #111 ; 0x6f 8003fca: d02a beq.n 8004022 <_printf_i+0xb6> 8003fcc: 2a70 cmp r2, #112 ; 0x70 8003fce: d1e5 bne.n 8003f9c <_printf_i+0x30> 8003fd0: 680a ldr r2, [r1, #0] 8003fd2: f042 0220 orr.w r2, r2, #32 8003fd6: 600a str r2, [r1, #0] 8003fd8: e003 b.n 8003fe2 <_printf_i+0x76> 8003fda: 2a75 cmp r2, #117 ; 0x75 8003fdc: d021 beq.n 8004022 <_printf_i+0xb6> 8003fde: 2a78 cmp r2, #120 ; 0x78 8003fe0: d1dc bne.n 8003f9c <_printf_i+0x30> 8003fe2: 2278 movs r2, #120 ; 0x78 8003fe4: 496f ldr r1, [pc, #444] ; (80041a4 <_printf_i+0x238>) 8003fe6: f884 2045 strb.w r2, [r4, #69] ; 0x45 8003fea: e064 b.n 80040b6 <_printf_i+0x14a> 8003fec: 681a ldr r2, [r3, #0] 8003fee: f101 0542 add.w r5, r1, #66 ; 0x42 8003ff2: 1d11 adds r1, r2, #4 8003ff4: 6019 str r1, [r3, #0] 8003ff6: 6813 ldr r3, [r2, #0] 8003ff8: f884 3042 strb.w r3, [r4, #66] ; 0x42 8003ffc: 2301 movs r3, #1 8003ffe: e0a3 b.n 8004148 <_printf_i+0x1dc> 8004000: f011 0f40 tst.w r1, #64 ; 0x40 8004004: f102 0104 add.w r1, r2, #4 8004008: 6019 str r1, [r3, #0] 800400a: d0d7 beq.n 8003fbc <_printf_i+0x50> 800400c: f9b2 3000 ldrsh.w r3, [r2] 8004010: 2b00 cmp r3, #0 8004012: da03 bge.n 800401c <_printf_i+0xb0> 8004014: 222d movs r2, #45 ; 0x2d 8004016: 425b negs r3, r3 8004018: f884 2043 strb.w r2, [r4, #67] ; 0x43 800401c: 4962 ldr r1, [pc, #392] ; (80041a8 <_printf_i+0x23c>) 800401e: 220a movs r2, #10 8004020: e017 b.n 8004052 <_printf_i+0xe6> 8004022: 6820 ldr r0, [r4, #0] 8004024: 6819 ldr r1, [r3, #0] 8004026: f010 0f80 tst.w r0, #128 ; 0x80 800402a: d003 beq.n 8004034 <_printf_i+0xc8> 800402c: 1d08 adds r0, r1, #4 800402e: 6018 str r0, [r3, #0] 8004030: 680b ldr r3, [r1, #0] 8004032: e006 b.n 8004042 <_printf_i+0xd6> 8004034: f010 0f40 tst.w r0, #64 ; 0x40 8004038: f101 0004 add.w r0, r1, #4 800403c: 6018 str r0, [r3, #0] 800403e: d0f7 beq.n 8004030 <_printf_i+0xc4> 8004040: 880b ldrh r3, [r1, #0] 8004042: 2a6f cmp r2, #111 ; 0x6f 8004044: bf14 ite ne 8004046: 220a movne r2, #10 8004048: 2208 moveq r2, #8 800404a: 4957 ldr r1, [pc, #348] ; (80041a8 <_printf_i+0x23c>) 800404c: 2000 movs r0, #0 800404e: f884 0043 strb.w r0, [r4, #67] ; 0x43 8004052: 6865 ldr r5, [r4, #4] 8004054: 2d00 cmp r5, #0 8004056: 60a5 str r5, [r4, #8] 8004058: f2c0 809c blt.w 8004194 <_printf_i+0x228> 800405c: 6820 ldr r0, [r4, #0] 800405e: f020 0004 bic.w r0, r0, #4 8004062: 6020 str r0, [r4, #0] 8004064: 2b00 cmp r3, #0 8004066: d13f bne.n 80040e8 <_printf_i+0x17c> 8004068: 2d00 cmp r5, #0 800406a: f040 8095 bne.w 8004198 <_printf_i+0x22c> 800406e: 4675 mov r5, lr 8004070: 2a08 cmp r2, #8 8004072: d10b bne.n 800408c <_printf_i+0x120> 8004074: 6823 ldr r3, [r4, #0] 8004076: 07da lsls r2, r3, #31 8004078: d508 bpl.n 800408c <_printf_i+0x120> 800407a: 6923 ldr r3, [r4, #16] 800407c: 6862 ldr r2, [r4, #4] 800407e: 429a cmp r2, r3 8004080: bfde ittt le 8004082: 2330 movle r3, #48 ; 0x30 8004084: f805 3c01 strble.w r3, [r5, #-1] 8004088: f105 35ff addle.w r5, r5, #4294967295 800408c: ebae 0305 sub.w r3, lr, r5 8004090: 6123 str r3, [r4, #16] 8004092: f8cd 8000 str.w r8, [sp] 8004096: 463b mov r3, r7 8004098: aa03 add r2, sp, #12 800409a: 4621 mov r1, r4 800409c: 4630 mov r0, r6 800409e: f7ff feed bl 8003e7c <_printf_common> 80040a2: 3001 adds r0, #1 80040a4: d155 bne.n 8004152 <_printf_i+0x1e6> 80040a6: f04f 30ff mov.w r0, #4294967295 80040aa: b005 add sp, #20 80040ac: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80040b0: f881 2045 strb.w r2, [r1, #69] ; 0x45 80040b4: 493c ldr r1, [pc, #240] ; (80041a8 <_printf_i+0x23c>) 80040b6: 6822 ldr r2, [r4, #0] 80040b8: 6818 ldr r0, [r3, #0] 80040ba: f012 0f80 tst.w r2, #128 ; 0x80 80040be: f100 0504 add.w r5, r0, #4 80040c2: 601d str r5, [r3, #0] 80040c4: d001 beq.n 80040ca <_printf_i+0x15e> 80040c6: 6803 ldr r3, [r0, #0] 80040c8: e002 b.n 80040d0 <_printf_i+0x164> 80040ca: 0655 lsls r5, r2, #25 80040cc: d5fb bpl.n 80040c6 <_printf_i+0x15a> 80040ce: 8803 ldrh r3, [r0, #0] 80040d0: 07d0 lsls r0, r2, #31 80040d2: bf44 itt mi 80040d4: f042 0220 orrmi.w r2, r2, #32 80040d8: 6022 strmi r2, [r4, #0] 80040da: b91b cbnz r3, 80040e4 <_printf_i+0x178> 80040dc: 6822 ldr r2, [r4, #0] 80040de: f022 0220 bic.w r2, r2, #32 80040e2: 6022 str r2, [r4, #0] 80040e4: 2210 movs r2, #16 80040e6: e7b1 b.n 800404c <_printf_i+0xe0> 80040e8: 4675 mov r5, lr 80040ea: fbb3 f0f2 udiv r0, r3, r2 80040ee: fb02 3310 mls r3, r2, r0, r3 80040f2: 5ccb ldrb r3, [r1, r3] 80040f4: f805 3d01 strb.w r3, [r5, #-1]! 80040f8: 4603 mov r3, r0 80040fa: 2800 cmp r0, #0 80040fc: d1f5 bne.n 80040ea <_printf_i+0x17e> 80040fe: e7b7 b.n 8004070 <_printf_i+0x104> 8004100: 6808 ldr r0, [r1, #0] 8004102: 681a ldr r2, [r3, #0] 8004104: f010 0f80 tst.w r0, #128 ; 0x80 8004108: 6949 ldr r1, [r1, #20] 800410a: d004 beq.n 8004116 <_printf_i+0x1aa> 800410c: 1d10 adds r0, r2, #4 800410e: 6018 str r0, [r3, #0] 8004110: 6813 ldr r3, [r2, #0] 8004112: 6019 str r1, [r3, #0] 8004114: e007 b.n 8004126 <_printf_i+0x1ba> 8004116: f010 0f40 tst.w r0, #64 ; 0x40 800411a: f102 0004 add.w r0, r2, #4 800411e: 6018 str r0, [r3, #0] 8004120: 6813 ldr r3, [r2, #0] 8004122: d0f6 beq.n 8004112 <_printf_i+0x1a6> 8004124: 8019 strh r1, [r3, #0] 8004126: 2300 movs r3, #0 8004128: 4675 mov r5, lr 800412a: 6123 str r3, [r4, #16] 800412c: e7b1 b.n 8004092 <_printf_i+0x126> 800412e: 681a ldr r2, [r3, #0] 8004130: 1d11 adds r1, r2, #4 8004132: 6019 str r1, [r3, #0] 8004134: 6815 ldr r5, [r2, #0] 8004136: 2100 movs r1, #0 8004138: 6862 ldr r2, [r4, #4] 800413a: 4628 mov r0, r5 800413c: f000 f8e0 bl 8004300 8004140: b108 cbz r0, 8004146 <_printf_i+0x1da> 8004142: 1b40 subs r0, r0, r5 8004144: 6060 str r0, [r4, #4] 8004146: 6863 ldr r3, [r4, #4] 8004148: 6123 str r3, [r4, #16] 800414a: 2300 movs r3, #0 800414c: f884 3043 strb.w r3, [r4, #67] ; 0x43 8004150: e79f b.n 8004092 <_printf_i+0x126> 8004152: 6923 ldr r3, [r4, #16] 8004154: 462a mov r2, r5 8004156: 4639 mov r1, r7 8004158: 4630 mov r0, r6 800415a: 47c0 blx r8 800415c: 3001 adds r0, #1 800415e: d0a2 beq.n 80040a6 <_printf_i+0x13a> 8004160: 6823 ldr r3, [r4, #0] 8004162: 079b lsls r3, r3, #30 8004164: d507 bpl.n 8004176 <_printf_i+0x20a> 8004166: 2500 movs r5, #0 8004168: f104 0919 add.w r9, r4, #25 800416c: 68e3 ldr r3, [r4, #12] 800416e: 9a03 ldr r2, [sp, #12] 8004170: 1a9b subs r3, r3, r2 8004172: 429d cmp r5, r3 8004174: db05 blt.n 8004182 <_printf_i+0x216> 8004176: 68e0 ldr r0, [r4, #12] 8004178: 9b03 ldr r3, [sp, #12] 800417a: 4298 cmp r0, r3 800417c: bfb8 it lt 800417e: 4618 movlt r0, r3 8004180: e793 b.n 80040aa <_printf_i+0x13e> 8004182: 2301 movs r3, #1 8004184: 464a mov r2, r9 8004186: 4639 mov r1, r7 8004188: 4630 mov r0, r6 800418a: 47c0 blx r8 800418c: 3001 adds r0, #1 800418e: d08a beq.n 80040a6 <_printf_i+0x13a> 8004190: 3501 adds r5, #1 8004192: e7eb b.n 800416c <_printf_i+0x200> 8004194: 2b00 cmp r3, #0 8004196: d1a7 bne.n 80040e8 <_printf_i+0x17c> 8004198: 780b ldrb r3, [r1, #0] 800419a: f104 0542 add.w r5, r4, #66 ; 0x42 800419e: f884 3042 strb.w r3, [r4, #66] ; 0x42 80041a2: e765 b.n 8004070 <_printf_i+0x104> 80041a4: 080045ca .word 0x080045ca 80041a8: 080045b9 .word 0x080045b9 080041ac <_sbrk_r>: 80041ac: b538 push {r3, r4, r5, lr} 80041ae: 2300 movs r3, #0 80041b0: 4c05 ldr r4, [pc, #20] ; (80041c8 <_sbrk_r+0x1c>) 80041b2: 4605 mov r5, r0 80041b4: 4608 mov r0, r1 80041b6: 6023 str r3, [r4, #0] 80041b8: f000 f8ec bl 8004394 <_sbrk> 80041bc: 1c43 adds r3, r0, #1 80041be: d102 bne.n 80041c6 <_sbrk_r+0x1a> 80041c0: 6823 ldr r3, [r4, #0] 80041c2: b103 cbz r3, 80041c6 <_sbrk_r+0x1a> 80041c4: 602b str r3, [r5, #0] 80041c6: bd38 pop {r3, r4, r5, pc} 80041c8: 200002cc .word 0x200002cc 080041cc <__sread>: 80041cc: b510 push {r4, lr} 80041ce: 460c mov r4, r1 80041d0: f9b1 100e ldrsh.w r1, [r1, #14] 80041d4: f000 f8a4 bl 8004320 <_read_r> 80041d8: 2800 cmp r0, #0 80041da: bfab itete ge 80041dc: 6d63 ldrge r3, [r4, #84] ; 0x54 80041de: 89a3 ldrhlt r3, [r4, #12] 80041e0: 181b addge r3, r3, r0 80041e2: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 80041e6: bfac ite ge 80041e8: 6563 strge r3, [r4, #84] ; 0x54 80041ea: 81a3 strhlt r3, [r4, #12] 80041ec: bd10 pop {r4, pc} 080041ee <__swrite>: 80041ee: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80041f2: 461f mov r7, r3 80041f4: 898b ldrh r3, [r1, #12] 80041f6: 4605 mov r5, r0 80041f8: 05db lsls r3, r3, #23 80041fa: 460c mov r4, r1 80041fc: 4616 mov r6, r2 80041fe: d505 bpl.n 800420c <__swrite+0x1e> 8004200: 2302 movs r3, #2 8004202: 2200 movs r2, #0 8004204: f9b1 100e ldrsh.w r1, [r1, #14] 8004208: f000 f868 bl 80042dc <_lseek_r> 800420c: 89a3 ldrh r3, [r4, #12] 800420e: 4632 mov r2, r6 8004210: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8004214: 81a3 strh r3, [r4, #12] 8004216: f9b4 100e ldrsh.w r1, [r4, #14] 800421a: 463b mov r3, r7 800421c: 4628 mov r0, r5 800421e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8004222: f000 b817 b.w 8004254 <_write_r> 08004226 <__sseek>: 8004226: b510 push {r4, lr} 8004228: 460c mov r4, r1 800422a: f9b1 100e ldrsh.w r1, [r1, #14] 800422e: f000 f855 bl 80042dc <_lseek_r> 8004232: 1c43 adds r3, r0, #1 8004234: 89a3 ldrh r3, [r4, #12] 8004236: bf15 itete ne 8004238: 6560 strne r0, [r4, #84] ; 0x54 800423a: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800423e: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8004242: 81a3 strheq r3, [r4, #12] 8004244: bf18 it ne 8004246: 81a3 strhne r3, [r4, #12] 8004248: bd10 pop {r4, pc} 0800424a <__sclose>: 800424a: f9b1 100e ldrsh.w r1, [r1, #14] 800424e: f000 b813 b.w 8004278 <_close_r> ... 08004254 <_write_r>: 8004254: b538 push {r3, r4, r5, lr} 8004256: 4605 mov r5, r0 8004258: 4608 mov r0, r1 800425a: 4611 mov r1, r2 800425c: 2200 movs r2, #0 800425e: 4c05 ldr r4, [pc, #20] ; (8004274 <_write_r+0x20>) 8004260: 6022 str r2, [r4, #0] 8004262: 461a mov r2, r3 8004264: f7fe fc90 bl 8002b88 <_write> 8004268: 1c43 adds r3, r0, #1 800426a: d102 bne.n 8004272 <_write_r+0x1e> 800426c: 6823 ldr r3, [r4, #0] 800426e: b103 cbz r3, 8004272 <_write_r+0x1e> 8004270: 602b str r3, [r5, #0] 8004272: bd38 pop {r3, r4, r5, pc} 8004274: 200002cc .word 0x200002cc 08004278 <_close_r>: 8004278: b538 push {r3, r4, r5, lr} 800427a: 2300 movs r3, #0 800427c: 4c05 ldr r4, [pc, #20] ; (8004294 <_close_r+0x1c>) 800427e: 4605 mov r5, r0 8004280: 4608 mov r0, r1 8004282: 6023 str r3, [r4, #0] 8004284: f000 f85e bl 8004344 <_close> 8004288: 1c43 adds r3, r0, #1 800428a: d102 bne.n 8004292 <_close_r+0x1a> 800428c: 6823 ldr r3, [r4, #0] 800428e: b103 cbz r3, 8004292 <_close_r+0x1a> 8004290: 602b str r3, [r5, #0] 8004292: bd38 pop {r3, r4, r5, pc} 8004294: 200002cc .word 0x200002cc 08004298 <_fstat_r>: 8004298: b538 push {r3, r4, r5, lr} 800429a: 2300 movs r3, #0 800429c: 4c06 ldr r4, [pc, #24] ; (80042b8 <_fstat_r+0x20>) 800429e: 4605 mov r5, r0 80042a0: 4608 mov r0, r1 80042a2: 4611 mov r1, r2 80042a4: 6023 str r3, [r4, #0] 80042a6: f000 f855 bl 8004354 <_fstat> 80042aa: 1c43 adds r3, r0, #1 80042ac: d102 bne.n 80042b4 <_fstat_r+0x1c> 80042ae: 6823 ldr r3, [r4, #0] 80042b0: b103 cbz r3, 80042b4 <_fstat_r+0x1c> 80042b2: 602b str r3, [r5, #0] 80042b4: bd38 pop {r3, r4, r5, pc} 80042b6: bf00 nop 80042b8: 200002cc .word 0x200002cc 080042bc <_isatty_r>: 80042bc: b538 push {r3, r4, r5, lr} 80042be: 2300 movs r3, #0 80042c0: 4c05 ldr r4, [pc, #20] ; (80042d8 <_isatty_r+0x1c>) 80042c2: 4605 mov r5, r0 80042c4: 4608 mov r0, r1 80042c6: 6023 str r3, [r4, #0] 80042c8: f000 f84c bl 8004364 <_isatty> 80042cc: 1c43 adds r3, r0, #1 80042ce: d102 bne.n 80042d6 <_isatty_r+0x1a> 80042d0: 6823 ldr r3, [r4, #0] 80042d2: b103 cbz r3, 80042d6 <_isatty_r+0x1a> 80042d4: 602b str r3, [r5, #0] 80042d6: bd38 pop {r3, r4, r5, pc} 80042d8: 200002cc .word 0x200002cc 080042dc <_lseek_r>: 80042dc: b538 push {r3, r4, r5, lr} 80042de: 4605 mov r5, r0 80042e0: 4608 mov r0, r1 80042e2: 4611 mov r1, r2 80042e4: 2200 movs r2, #0 80042e6: 4c05 ldr r4, [pc, #20] ; (80042fc <_lseek_r+0x20>) 80042e8: 6022 str r2, [r4, #0] 80042ea: 461a mov r2, r3 80042ec: f000 f842 bl 8004374 <_lseek> 80042f0: 1c43 adds r3, r0, #1 80042f2: d102 bne.n 80042fa <_lseek_r+0x1e> 80042f4: 6823 ldr r3, [r4, #0] 80042f6: b103 cbz r3, 80042fa <_lseek_r+0x1e> 80042f8: 602b str r3, [r5, #0] 80042fa: bd38 pop {r3, r4, r5, pc} 80042fc: 200002cc .word 0x200002cc 08004300 : 8004300: b510 push {r4, lr} 8004302: b2c9 uxtb r1, r1 8004304: 4402 add r2, r0 8004306: 4290 cmp r0, r2 8004308: 4603 mov r3, r0 800430a: d101 bne.n 8004310 800430c: 2000 movs r0, #0 800430e: bd10 pop {r4, pc} 8004310: 781c ldrb r4, [r3, #0] 8004312: 3001 adds r0, #1 8004314: 428c cmp r4, r1 8004316: d1f6 bne.n 8004306 8004318: 4618 mov r0, r3 800431a: bd10 pop {r4, pc} 0800431c <__malloc_lock>: 800431c: 4770 bx lr 0800431e <__malloc_unlock>: 800431e: 4770 bx lr 08004320 <_read_r>: 8004320: b538 push {r3, r4, r5, lr} 8004322: 4605 mov r5, r0 8004324: 4608 mov r0, r1 8004326: 4611 mov r1, r2 8004328: 2200 movs r2, #0 800432a: 4c05 ldr r4, [pc, #20] ; (8004340 <_read_r+0x20>) 800432c: 6022 str r2, [r4, #0] 800432e: 461a mov r2, r3 8004330: f000 f828 bl 8004384 <_read> 8004334: 1c43 adds r3, r0, #1 8004336: d102 bne.n 800433e <_read_r+0x1e> 8004338: 6823 ldr r3, [r4, #0] 800433a: b103 cbz r3, 800433e <_read_r+0x1e> 800433c: 602b str r3, [r5, #0] 800433e: bd38 pop {r3, r4, r5, pc} 8004340: 200002cc .word 0x200002cc 08004344 <_close>: 8004344: 2258 movs r2, #88 ; 0x58 8004346: 4b02 ldr r3, [pc, #8] ; (8004350 <_close+0xc>) 8004348: f04f 30ff mov.w r0, #4294967295 800434c: 601a str r2, [r3, #0] 800434e: 4770 bx lr 8004350: 200002cc .word 0x200002cc 08004354 <_fstat>: 8004354: 2258 movs r2, #88 ; 0x58 8004356: 4b02 ldr r3, [pc, #8] ; (8004360 <_fstat+0xc>) 8004358: f04f 30ff mov.w r0, #4294967295 800435c: 601a str r2, [r3, #0] 800435e: 4770 bx lr 8004360: 200002cc .word 0x200002cc 08004364 <_isatty>: 8004364: 2258 movs r2, #88 ; 0x58 8004366: 4b02 ldr r3, [pc, #8] ; (8004370 <_isatty+0xc>) 8004368: 2000 movs r0, #0 800436a: 601a str r2, [r3, #0] 800436c: 4770 bx lr 800436e: bf00 nop 8004370: 200002cc .word 0x200002cc 08004374 <_lseek>: 8004374: 2258 movs r2, #88 ; 0x58 8004376: 4b02 ldr r3, [pc, #8] ; (8004380 <_lseek+0xc>) 8004378: f04f 30ff mov.w r0, #4294967295 800437c: 601a str r2, [r3, #0] 800437e: 4770 bx lr 8004380: 200002cc .word 0x200002cc 08004384 <_read>: 8004384: 2258 movs r2, #88 ; 0x58 8004386: 4b02 ldr r3, [pc, #8] ; (8004390 <_read+0xc>) 8004388: f04f 30ff mov.w r0, #4294967295 800438c: 601a str r2, [r3, #0] 800438e: 4770 bx lr 8004390: 200002cc .word 0x200002cc 08004394 <_sbrk>: 8004394: 4b04 ldr r3, [pc, #16] ; (80043a8 <_sbrk+0x14>) 8004396: 4602 mov r2, r0 8004398: 6819 ldr r1, [r3, #0] 800439a: b909 cbnz r1, 80043a0 <_sbrk+0xc> 800439c: 4903 ldr r1, [pc, #12] ; (80043ac <_sbrk+0x18>) 800439e: 6019 str r1, [r3, #0] 80043a0: 6818 ldr r0, [r3, #0] 80043a2: 4402 add r2, r0 80043a4: 601a str r2, [r3, #0] 80043a6: 4770 bx lr 80043a8: 20000140 .word 0x20000140 80043ac: 200002d0 .word 0x200002d0 080043b0 <_init>: 80043b0: b5f8 push {r3, r4, r5, r6, r7, lr} 80043b2: bf00 nop 80043b4: bcf8 pop {r3, r4, r5, r6, r7} 80043b6: bc08 pop {r3} 80043b8: 469e mov lr, r3 80043ba: 4770 bx lr 080043bc <_fini>: 80043bc: b5f8 push {r3, r4, r5, r6, r7, lr} 80043be: bf00 nop 80043c0: bcf8 pop {r3, r4, r5, r6, r7} 80043c2: bc08 pop {r3} 80043c4: 469e mov lr, r3 80043c6: 4770 bx lr